WO2022244998A1 - Display device and control method therefor - Google Patents

Display device and control method therefor Download PDF

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Publication number
WO2022244998A1
WO2022244998A1 PCT/KR2022/005733 KR2022005733W WO2022244998A1 WO 2022244998 A1 WO2022244998 A1 WO 2022244998A1 KR 2022005733 W KR2022005733 W KR 2022005733W WO 2022244998 A1 WO2022244998 A1 WO 2022244998A1
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WO
WIPO (PCT)
Prior art keywords
voltage
resistor
voltage divider
divider circuit
output
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PCT/KR2022/005733
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French (fr)
Korean (ko)
Inventor
정성범
주성용
강정일
Original Assignee
삼성전자주식회사
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Publication of WO2022244998A1 publication Critical patent/WO2022244998A1/en

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0067Converter structures employing plural converter units, other than for parallel operation of the units on a single load
    • H02M1/007Plural converter units in cascade
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0003Details of control, feedback or regulation circuits
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/14Arrangements for reducing ripples from dc input or output
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243Details of the generation of driving signals
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation

Definitions

  • the present disclosure relates to a display device and a control method thereof, and more particularly, to a display device converting power and supplying power to each component and a control method thereof.
  • the DC-DC converter circuit using the magnetic material L1 has a problem in that the size and heat generation of the inductor greatly increase when the circuit is configured with high capacity and large current.
  • a voltage dividing converter using a capacitor (C1) rather than an inductor may be used.
  • a voltage divider using a capacitor is a converter that can step up or step down a voltage using a capacitor without a magnetic substance. Since a magnetic substance is not used, a compact and ultra-thin design is possible, and it has high efficiency and no heat generation.
  • the capacitor used in the voltage divider using a capacitor is an MLCC (Multi Layer Ceramic Capacitor) considering the capacity and size, but there is a problem that there are almost no high-capacity MLCC with a high withstand voltage of 100V or more. That is, there is a problem in that the number of parallel connections of MLCCs greatly increases for high-capacity application.
  • MLCC Multi Layer Ceramic Capacitor
  • due to DC bias characteristics in which capacitance decreases as the voltage applied to the MLCC increases there is a problem of selecting an MLCC having a withstand voltage margin twice or more higher than the required withstand voltage.
  • PL Product Liability
  • voltage divider converters using capacitors are designed with step-up and step-down ratios that are multiples of 2, such as 2 and 4 (1:2, 2:1, 1:4, and 4:1), and the step-up and step-down ratios are fixed, so the output voltage can be varied. There is an unavoidable problem.
  • the present disclosure has been made in accordance with the above-described needs, and an object of the present disclosure is to provide a display device capable of performing a high-capacity DC-DC conversion operation using a conventional capacitor and a control method thereof.
  • a display device includes a power supply circuit and a plurality of capacitors, and a first voltage divider circuit for dividing and outputting a voltage supplied from the power supply circuit, and a plurality of voltage dividers. and a second voltage divider circuit that divides and outputs a voltage supplied from the power supply circuit, wherein an output terminal of the first voltage divider circuit and an output terminal of the second voltage divider circuit are connected in series to the first voltage divider circuit.
  • An output voltage based on the first output voltage of the voltage divider circuit and the second output voltage of the second voltage divider circuit may be provided.
  • one end of the output terminals of the first voltage divider circuit may be connected to one of the output terminals of the second voltage divider circuit, and the other end of the output terminals of the second voltage divider circuit may be connected to ground.
  • a second resistor having one end connected to the other end of the first resistor and the other end connected to the earth ground, and a voltage at one end of the second resistor. It may further include a first feedback circuit for controlling the output of the power supply circuit.
  • the method further includes a third resistor having one end connected to the other end of the first resistor and one end of the second resistor, and a first transistor connected to the other end of the third resistor, wherein the first transistor is PWM input through a gate.
  • the voltage of one end of the second resistor may be changed based on the duty of the control signal.
  • the other end of the output end of the first voltage divider circuit may be connected to a ground different from the earth ground.
  • a fourth resistor having one end connected to the input terminal of the first voltage divider circuit, a fifth resistor having one end connected to the other end of the fourth resistor and the other end connected to a ground different from the earth ground, and one end of the fifth resistor It may further include a second feedback circuit for controlling the output of the power supply circuit based on the voltage.
  • a sixth resistor having one end connected to the other end of the fourth resistor and one end of the fifth resistor and a second transistor connected to the other end of the sixth resistor, wherein the second transistor is PWM input through a gate.
  • a voltage of one end of the fifth resistor may be changed based on the duty of the control signal.
  • the first voltage divider circuit is controlled based on a first PWM signal and a second PWM signal obtained by inverting the first PWM signal, and the second voltage divider circuit has a predetermined phase difference with the first PWM signal.
  • 3 PWM signals and the third PWM signal may be controlled based on the inverted fourth PWM signal.
  • the period T of the first PWM signal may be the same as the period of the third PWM signal, and the predetermined phase difference may be greater than or equal to -T/4 and less than or equal to T/4.
  • the power supply circuit includes a first sub power supply circuit and a second sub power supply circuit, wherein the first voltage divider circuit divides and outputs a voltage supplied from the first sub power supply circuit, and The voltage divider circuit may divide and output the voltage supplied from the second sub power supply circuit.
  • a control method of a display device includes supplying voltage by a power supply circuit, dividing the voltage by a first voltage dividing circuit, and connecting an output terminal and an output terminal of the first voltage dividing circuit in series. and dividing the voltage by a second voltage divider circuit connected thereto and providing an output voltage based on the first output voltage of the first voltage divider circuit and the second output voltage of the second voltage divider circuit.
  • one end of the output terminals of the first voltage divider circuit may be connected to one of the output terminals of the second voltage divider circuit, and the other end of the output terminals of the second voltage divider circuit may be connected to ground.
  • the display device further includes a first resistor having one end connected to the input terminal of the second voltage divider circuit, a second resistor having one end connected to the other end of the first resistor and the other end connected to the ground, and a first feedback circuit.
  • the first feedback circuit may control an output of the power supply circuit based on a voltage of one end of the second resistor.
  • the display device further includes a third resistor having one end connected to the other end of the first resistor and one end of the second resistor, and a first transistor connected to the other end of the third resistor, and controlling the output comprises A voltage of one end of the second resistor may be changed based on a duty of a pulse width modulation (PWM) control signal input through a gate of the first transistor.
  • PWM pulse width modulation
  • the other end of the output end of the first voltage divider circuit may be connected to a ground different from the earth ground.
  • the display device includes a fourth resistor having one end connected to the input terminal of the first voltage divider circuit, a fifth resistor having one end connected to the other end of the fourth resistor and the other end connected to a ground different from the earth ground, and a second feedback A circuit may be further included, and in the providing, the second feedback circuit may control an output of the power supply circuit based on a voltage of one end of the fifth resistor.
  • the display device further includes a sixth resistor having one end connected to the other end of the fourth resistor and one end of the fifth resistor, and a second transistor connected to the other end of the sixth resistor, and controlling the output comprises A voltage of one end of the fifth resistor may be changed based on a duty cycle of a PWM control signal input through a gate of the second transistor.
  • the step of dividing the voltage may include controlling the first voltage dividing circuit based on a first PWM signal and a second PWM signal obtained by inverting the first PWM signal, and a third voltage dividing circuit having a predetermined phase difference with the first PWM signal.
  • the second voltage divider circuit may be controlled based on a fourth PWM signal obtained by inverting the PWM signal and the third PWM signal.
  • the period T of the first PWM signal may be the same as the period of the third PWM signal, and the predetermined phase difference may be greater than or equal to -T/4 and less than or equal to T/4.
  • the first sub power supply circuit and the second sub power supply circuit included in the power supply circuit supply voltage, and in the voltage dividing step, the first sub power supply circuit supplies the first sub power supply.
  • the voltage supplied from the circuit may be divided and output, and the second voltage divider circuit may divide and output the voltage supplied from the second sub power supply circuit.
  • a plurality of voltage-dividing converters are connected in a cascade, so that a high-capacity DC-DC converting operation is possible even when a relatively low-capacity MLCC is used.
  • the display device may reduce ripple by controlling the plurality of voltage dividing converters using a plurality of PWM signals having a phase difference.
  • FIG. 2 is a block diagram illustrating a configuration of a display device according to an exemplary embodiment of the present disclosure.
  • FIG. 3 is a diagram for specifically explaining the configuration of a display device according to an embodiment of the present disclosure.
  • FIG. 4 is a diagram for specifically explaining the configuration of a display device according to another embodiment of the present disclosure.
  • FIG. 5 is a diagram specifically illustrating a configuration of a display device according to another exemplary embodiment of the present disclosure.
  • FIG. 6 is a diagram for explaining a control method for reducing ripple according to an embodiment of the present disclosure.
  • FIG. 7 is a diagram for explaining a result of a control method for reducing ripple according to an embodiment of the present disclosure.
  • FIG. 8 is a flowchart illustrating a method of controlling a display device according to an embodiment of the present disclosure.
  • expressions such as “has,” “can have,” “includes,” or “can include” indicate the existence of a corresponding feature (eg, numerical value, function, operation, or component such as a part). , which does not preclude the existence of additional features.
  • the term user may refer to a person using an electronic device or a device (eg, an artificial intelligence electronic device) using an electronic device.
  • a device eg, an artificial intelligence electronic device
  • the display device 100 includes a power supply circuit 110 , a first voltage divider circuit 120 and a second voltage divider circuit 130 .
  • the display device 100 may supply power to each component.
  • the display device 100 may convert AC power into DC power and supply it to the internal components of the display device 100 .
  • the display device 100 may convert power into a plurality of DC power sources having a plurality of voltage levels, and supply the plurality of DC power sources to a plurality of components inside the display device 100, respectively.
  • the display device 100 may be implemented as a device that is detachable from an external device, and any device capable of supplying power may be used.
  • the power supply circuit 110 may generate power and supply the generated power to the first voltage divider circuit 120 and the second voltage divider circuit 130 .
  • the power supply circuit (Isolated Converter, 110) may supply the output from the main winding and the output from the auxiliary winding to the first voltage divider circuit 120 and the second voltage divider circuit 130.
  • the first voltage divider circuit (SC Converter, 120) includes a plurality of capacitors, and can divide and output the voltage supplied from the power supply circuit 110.
  • the first voltage divider circuit 120 may not include an inductor and may be implemented as a capacitor. Also, the first voltage divider circuit 120 may receive a voltage supplied from one of the output by the main winding and the output by the auxiliary winding of the power supply circuit 110, divide the input voltage, and output the divided voltage.
  • the second voltage dividing circuit (SC converter) 130 includes a plurality of capacitors, and may divide and output voltage supplied from the power supply circuit 110 .
  • the second voltage divider circuit 130 may be implemented with a capacitor without including an inductor.
  • the second voltage divider circuit 130 may receive a voltage supplied from the other one of the output by the main winding and the output by the auxiliary winding of the power supply circuit 110, divide the input voltage, and output the divided voltage.
  • the output terminal of the first voltage divider circuit 120 and the output terminal of the second voltage divider circuit 130 are connected in series, and the display device 100 provides the first output voltage of the first voltage divider circuit 120 and the output terminal of the second voltage divider circuit 130.
  • the display device 100 provides the first output voltage of the first voltage divider circuit 120 and the output terminal of the second voltage divider circuit 130.
  • one end of the output terminals of the first voltage divider circuit 120 may be connected to one of the output terminals of the second voltage divider circuit 130, and the other end of the output terminals of the second voltage divider circuit 130 may be connected to ground.
  • the first voltage divider circuit 120 and the second voltage divider circuit 130 may be connected in a cascade structure to share the load. Accordingly, the capacitance and size of the capacitors included in each of the first voltage divider circuit 120 and the second voltage divider circuit 130 can be reduced (reducing the withstand voltage of the MLCC), and the first voltage divider circuit 120 and the second voltage divider circuit (130) The size of each can be reduced. In addition, as the capacity of the capacitor decreases, problems such as ignition and heat generation can be solved.
  • the display device 100 includes a first resistor having one end connected to the input terminal of the second voltage divider circuit 130, a second resistor having one end connected to the other end of the first resistor and the other end connected to the earth ground, and A first feedback circuit for controlling the output of the power supply circuit 110 based on the voltage of one end of the second resistor may be further included.
  • the display device 100 further includes a third resistor having one end connected to the other end of the first resistor and one end of the second resistor, and a first transistor connected to the other end of the third resistor, wherein the first transistor is input through a gate.
  • a voltage of one end of the second resistor may be changed based on a duty of a pulse width modulation (PWM) control signal. That is, the output voltage of the second voltage divider circuit 130 can be changed by changing the reference voltage of the first feedback circuit.
  • PWM pulse width modulation
  • the other end of the output end of the first voltage divider circuit 120 may be connected to a ground different from the earth ground.
  • the display device 100 includes a fourth resistor having one end connected to the input terminal of the first voltage divider circuit 120, and a fifth resistor having one end connected to the other end of the fourth resistor and the other end connected to a ground different from the earth ground. and a second feedback circuit for controlling the output of the power supply circuit 110 based on the voltage of one end of the fifth resistor.
  • the display device 100 further includes a sixth resistor having one end connected to the other end of the fourth resistor and one end of the fifth resistor, and a second transistor connected to the other end of the sixth resistor, the second transistor being input through a gate.
  • a voltage of one end of the fifth resistor may be changed based on the duty cycle of the PWM control signal. That is, the output voltage of the first voltage divider circuit 120 can be changed by changing the reference voltage of the second feedback circuit.
  • This embodiment is almost the same as the previous embodiment, but the difference is that the output voltage of the first voltage divider circuit 120 is changed.
  • the display device 100 while the output voltage of the second voltage divider 130 is connected to ground, the display device 100 has a variable output voltage obtained by summing the output voltages of the first voltage divider 120 and the second voltage divider 130.
  • the fixed output voltage of the second voltage divider circuit 130 may be additionally output.
  • the power supply circuit 110 includes a first sub power supply circuit and a second sub power supply circuit, and the first voltage divider circuit 120 is supplied from the first sub power supply circuit.
  • the voltage is divided and output, and the second voltage divider circuit 130 may divide and output the voltage supplied from the second sub power supply circuit.
  • the first voltage divider circuit 120 is controlled based on the first PWM signal and the second PWM signal obtained by inverting the first PWM signal, and the second voltage divider circuit 130 calculates a phase difference between the first PWM signal and a preset phase. It can be controlled based on the third PWM signal having and the fourth PWM signal inverted by the third PWM signal.
  • the period T of the first PWM signal is equal to the period of the third PWM signal, and the predetermined phase difference may be greater than or equal to -T/4 and less than or equal to T/4. Through this operation, the ripple can be reduced.
  • the first voltage divider circuit 120 and the second voltage divider circuit 130 are connected in a cascade, and even if the voltage divider circuit is configured using a relatively low capacitance capacitor, high-capacity DC-DC conversion is performed. action is possible
  • the display device 100 may include three or more cascade-connected voltage divider circuits.
  • FIGS. 3 to 7 describe individual embodiments for convenience of description. However, the individual embodiments of FIGS. 3 to 7 may be implemented in any combination.
  • FIG. 3 is a diagram for specifically explaining the configuration of the display device 100 according to an embodiment of the present disclosure.
  • the power supply circuit 110 may supply two powers, Vin1 and Vin2, the first voltage divider circuit 120 may divide and output Vin2, and the second voltage divider 130 may divide and output Vin1.
  • One end of the output terminals of the first voltage divider circuit 120 may be connected to one of the output terminals of the second voltage divider circuit 130, and the other end of the output terminals of the second voltage divider circuit 130 may be connected to ground. Accordingly, Vout obtained by summing the output voltage of the first voltage divider circuit 120 and the output voltage of the second voltage divider circuit 130 may be output.
  • the first voltage divider circuit 120 and the output voltage of the second voltage divider circuit 130 are summed and output, a high capacity output is possible and the first voltage divider circuit 120 and the second voltage divider circuit 130 respectively Since the output voltage is relatively low, capacitances of capacitors included in the first voltage divider circuit 120 and the second voltage divider circuit 130 may also be reduced. That is, as the voltage divider circuit is configured using a relatively low capacitance capacitor, the capacitance and size of the capacitor can be reduced, and problems such as ignition and heat generation can be reduced.
  • the display device 100 includes a first resistor R1 having one end connected to the input terminal of the second voltage divider circuit 130, and a second resistor R2 having one end connected to the other end of the first resistor and the other end connected to the earth ground. ) and a first feedback circuit (IC1, PC1) for controlling the output of the power supply circuit 100 based on the voltage of one end of the second resistor.
  • values of the first resistor and the second resistor may be determined based on the conduction voltage of IC1 .
  • the reference voltage is set with a predetermined margin on the conduction voltage, and the voltage across one end of the second resistor during normal operation is the reference voltage Values of the first resistor and the second resistor may be determined so that
  • This feedback operation controls only the input voltage of the second voltage divider circuit 130, and it is possible to simplify control and secure reliability.
  • the output voltage can be compensated in the case of variable output voltage or sudden load change.
  • the display device 100 further includes a third resistor R3 having one end connected to the other end of the first resistor and one end of the second resistor, and a first transistor Q9 connected to the other end of the third resistor.
  • the transistor may change the voltage of one end of the second resistor based on the duty of a pulse width modulation (PWM) control signal input through a gate.
  • PWM pulse width modulation
  • the resistance value decreases as the second resistor and the third resistor are connected in parallel, and the voltage across one end of the second resistor becomes lower. That is, the degree to which the voltage applied to one end of the second resistor is lowered may be changed by changing the duty cycle of the PWM control signal, and in this case, Vin1 may be changed through the above-described feedback operation. And, Vout can be changed according to the change of Vin1.
  • output voltages of various sizes can be provided according to duty changes of the PWM control signal.
  • the duty of the PWM control signal when the duty of the PWM control signal is increased, the voltage applied to one end of the second resistor is lowered, and Vin1 is increased through the feedback circuit, so that Vout is increased.
  • the duty cycle of the PWM control signal when the duty cycle of the PWM control signal is decreased, the voltage applied to one end of the second resistor is increased, and Vin1 is decreased through the feedback circuit, thereby reducing Vout.
  • values of the first resistor, the second resistor, and the third resistor may be determined based on the basic duty of the PWM control signal. For example, based on the case where the duty cycle of the PWM control signal is 50%, the reference voltage (a conduction voltage + a predetermined margin) of IC1 is determined, and the values of the first resistor, the second resistor, and the third resistor are determined therefrom. can That is, during normal operation, the duty cycle of the PWM control signal is 50%, and the output voltage can be controlled by increasing or decreasing the duty cycle of the PWM control signal.
  • FIG. 4 is a diagram for specifically explaining the configuration of a display device 100 according to another embodiment of the present disclosure.
  • FIG. 4 is almost similar to FIG. 3 , but the difference is that a feedback circuit or the like is connected to the first voltage divider circuit 120 .
  • the other end of the output end of the first voltage divider circuit 120 is connected to a ground different from the earth ground
  • the display device 100 includes a fourth resistor R1, one end of which is connected to the input end of the first voltage divider circuit 120;
  • a fifth resistor R2 having one end connected to the other end of the fourth resistor and the other end connected to a ground different from the earth ground, and a second control output of the power supply circuit 100 based on a voltage of one end of the fifth resistor.
  • Feedback circuits IC1 and PC1 may be further included.
  • the display device 100 further includes a sixth resistor R3 having one end connected to the other end of the fourth resistor and one end of the fifth resistor, and a second transistor Q9 connected to the other end of the sixth resistor.
  • the transistor may change the voltage of one end of the fifth resistor based on the duty cycle of the PWM control signal input through the gate.
  • the display device 100 of FIG. 4 fixes the variable output voltage Vout2 obtained by summing the output voltages of the first voltage divider circuit 120 and the second voltage divider circuit 130 as well as the second voltage divider circuit 130.
  • An output voltage Vout1 may be additionally output.
  • FIG. 5 is a diagram specifically illustrating a configuration of a display device 100 according to another embodiment of the present disclosure.
  • the power supply circuit 110 includes a first sub power supply circuit and a second sub power supply circuit, and the first voltage divider circuit 120 provides a voltage supplied from the first sub power supply circuit.
  • the second voltage divider circuit 130 may divide and output the voltage supplied from the second sub power supply circuit.
  • FIG. 6 is a diagram for explaining a control method for reducing ripple according to an embodiment of the present disclosure.
  • Q1 to Q8 denote transistors included in the first voltage divider circuit 120 and the second voltage divider circuit 130 in FIGS. 3 to 5 .
  • Q1 to Q4 are transistors included in the second voltage divider circuit 130
  • Q5 to Q8 are transistors included in the first voltage divider circuit 120
  • PWM_A is a signal for controlling Q1 and Q3
  • PWM_B is a signal for controlling Q2 and Q3.
  • PWM_C is a signal for controlling Q5 and Q7
  • PWM_D is a signal for controlling Q6 and Q8.
  • FIG. 6 shows a case without a phase difference
  • the lower part of FIG. 6 shows a case with a phase difference according to the present disclosure.
  • the first voltage divider 120 may be controlled based on PWM_C and PWM_D obtained by inverting PWM_C
  • the second voltage dividing circuit 130 may be controlled based on PWM_A and PWM_B obtained by inverting PWM_A.
  • the cycle (T) of PWM_C is equal to the cycle of PWM_A, and the preset phase difference may be greater than or equal to -T/4 and less than or equal to T/4.
  • a phase difference between PWM_A and PWM_C is T/4, and thus a phase difference between PWM_B and PWM_D may be T/4.
  • FIG. 7 is a diagram for explaining a result of a control method for reducing ripple according to an embodiment of the present disclosure.
  • FIG. 7 The left side of FIG. 7 is the result of the same control as the upper part of FIG. 6, and the right side of FIG. 7 is the result of the same control as the lower part of FIG.
  • the uppermost graph on the left and right sides of FIG. 7 is the output of the first voltage divider circuit 120, and the second graph is the output of the second voltage divider circuit 130. And, the third graph shows the summed output Vout. That is, even if the control method for reducing the ripple is used, the outputs of the first voltage divider circuit 120 and the second voltage divider circuit 130 do not change, but the sum of the two outputs Vout has a reduced ripple. According to the example of FIG. 7 , since the ripple is reduced by about half, an output voltage with improved quality can be provided.
  • FIG. 8 is a flowchart illustrating a method of controlling a display device according to an embodiment of the present disclosure.
  • the power supply circuit supplies voltage (S810). Then, the first voltage divider circuit divides the voltage, and the second voltage divider circuit connected in series with the output terminal of the first voltage divider circuit divides the voltage (S820). Then, an output voltage based on the first output voltage of the first voltage divider circuit and the second output voltage of the second voltage divider circuit is provided (S830).
  • one end of the output terminals of the first voltage divider circuit may be connected to one of the output terminals of the second voltage divider circuit, and the other end of the output terminals of the second voltage divider circuit may be connected to the ground.
  • the display device further includes a first resistor having one end connected to the input terminal of the second voltage divider circuit, a second resistor having one end connected to the other end of the first resistor and the other end connected to ground, and a first feedback circuit.
  • the first feedback circuit may control the output of the power supply circuit based on the voltage of one end of the second resistor.
  • the display device further includes a third resistor having one end connected to the other end of the first resistor and one end of the second resistor, and a first transistor connected to the other end of the third resistor, and controlling the output may include a gate of the first transistor.
  • the voltage of one end of the second resistor may be changed based on the duty of a PWM (Pulse Width Modulation) control signal input through.
  • PWM Pulse Width Modulation
  • the other end of the output end of the first voltage divider circuit may be connected to a ground different from the earth ground.
  • the display device further includes a fourth resistor having one end connected to the input terminal of the first voltage divider circuit, a fifth resistor having one end connected to the other end of the fourth resistor and the other end connected to a ground different from the earth ground, and a second feedback circuit.
  • the second feedback circuit may control the output of the power supply circuit based on the voltage of one end of the fifth resistor.
  • the display device further includes a sixth resistor having one end connected to the other end of the fourth resistor and one end of the fifth resistor, and a second transistor connected to the other end of the sixth resistor, and controlling the output comprises a gate of the second transistor. It is possible to change the voltage of one end of the fifth resistor based on the duty of the PWM control signal input through .
  • the first PWM signal is controlled based on the first PWM signal and the second PWM signal obtained by inverting the first PWM signal, and the third PWM signal has a predetermined phase difference with the first PWM signal.
  • the second voltage divider circuit may be controlled based on the fourth PWM signal obtained by inverting the signal and the third PWM signal.
  • the period T of the first PWM signal is equal to the period of the third PWM signal, and the predetermined phase difference may be greater than or equal to -T/4 and less than or equal to T/4.
  • the first sub-power supply circuit includes the first sub-power supply circuit.
  • the voltage supplied from the supply circuit may be divided and output, and the second voltage divider circuit may divide and output the voltage supplied from the second sub power supply circuit.
  • a plurality of voltage-dividing converters are connected in a cascade, so that a high-capacity DC-DC converting operation is possible even when a relatively low-capacity MLCC is used.
  • the display device may reduce ripple by controlling the plurality of voltage dividing converters using a plurality of PWM signals having a phase difference.
  • a device is a device capable of calling a stored command from a storage medium and operating according to the called command, and may include an electronic device (eg, the electronic device A) according to the disclosed embodiments.
  • the processor may perform a function corresponding to the command directly or by using other components under the control of the processor.
  • An instruction may include code generated or executed by a compiler or interpreter.
  • the device-readable storage medium may be provided in the form of a non-transitory storage medium.
  • 'non-temporary' only means that the storage medium does not contain a signal and is tangible, but does not distinguish whether data is stored semi-permanently or temporarily in the storage medium.
  • the method according to the various embodiments described above may be included in a computer program product and provided.
  • Computer program products may be traded between sellers and buyers as commodities.
  • the computer program product may be distributed in the form of a device-readable storage medium (eg compact disc read only memory (CD-ROM)) or online through an application store (eg Play StoreTM).
  • CD-ROM compact disc read only memory
  • application store eg Play StoreTM
  • at least part of the computer program product may be temporarily stored or temporarily created in a storage medium such as a manufacturer's server, an application store server, or a relay server's memory.
  • the various embodiments described above use software, hardware, or a combination thereof in a recording medium readable by a computer or similar device. can be implemented in In some cases, the embodiments described herein may be implemented in a processor itself. According to software implementation, embodiments such as procedures and functions described in this specification may be implemented as separate software modules. Each of the software modules may perform one or more functions and operations described herein.
  • Non-transitory computer-readable medium may be stored in a non-transitory computer-readable medium.
  • Computer instructions stored in such a non-transitory computer readable medium when executed by a processor of a specific device, cause the specific device to perform processing operations in the device according to various embodiments described above.
  • a non-transitory computer readable medium is a medium that stores data semi-permanently and is readable by a device, not a medium that stores data for a short moment, such as a register, cache, or memory.
  • Specific examples of the non-transitory computer readable medium may include a CD, DVD, hard disk, Blu-ray disk, USB, memory card, ROM, and the like.
  • each of the components may be composed of a single object or a plurality of entities, and some sub-components among the aforementioned sub-components may be omitted, or other sub-components may be used. Components may be further included in various embodiments. Alternatively or additionally, some components (eg, modules or programs) may be integrated into one entity and perform the same or similar functions performed by each corresponding component prior to integration. According to various embodiments, operations performed by modules, programs, or other components are executed sequentially, in parallel, iteratively, or heuristically, or at least some operations are executed in a different order, are omitted, or other operations are added. It can be.

Abstract

A display device is disclosed. The present display device comprises: a first voltage-dividing circuit which includes a power supply circuit and a plurality of capacitors, and which divides voltage supplied from the power supply circuit to output the divided voltage; and a second voltage-dividing circuit which includes a plurality of capacitors, and which divides the voltage supplied from the power supply circuit to output the divided voltage, wherein an output end of the first voltage-dividing circuit and an output end of the second voltage-dividing circuit are connected in series to provide an output voltage based on a first output voltage of the first voltage-dividing circuit and a second output voltage of the second voltage-dividing circuit.

Description

디스플레이 장치 및 그 제어 방법Display device and its control method
본 개시는 디스플레이 장치 및 그 제어 방법에 대한 것으로, 더욱 상세하게는 전력을 변환하여 각 구성으로 전원을 공급하는 디스플레이 장치 및 그 제어 방법에 대한 것이다.The present disclosure relates to a display device and a control method thereof, and more particularly, to a display device converting power and supplying power to each component and a control method thereof.
OLED TV 등의 자발광 디스플레이가 도입됨에 따라 저전압 대전류 부하용 직류 변환 장치가 개발되고 있다.With the introduction of self-luminous displays such as OLED TVs, DC converters for low-voltage, high-current loads are being developed.
종래 도 1a와 같이, 자성체(L1)가 이용된 DC-DC 컨버터 회로는 고용량 대전류로 회로를 구성하는 경우 인덕터(inductor)의 크기 및 발열이 크게 증가하는 문제가 있다. 또한, DC-DC 컨버터 회로를 초소형, 초박형으로 제작하기 위해서는 부품의 크기에 대한 제약 조건이 존재하나, 자성체의 경우 초박형 부품이 없어 약 6mm 이하의 초박형 컨버터의 제작은 어려운 상황이다.As shown in FIG. 1A, the DC-DC converter circuit using the magnetic material L1 has a problem in that the size and heat generation of the inductor greatly increase when the circuit is configured with high capacity and large current. In addition, there are constraints on the size of parts in order to manufacture a DC-DC converter circuit in an ultra-small and ultra-thin form, but in the case of a magnetic material, there are no ultra-thin parts, so it is difficult to manufacture an ultra-thin converter of about 6 mm or less.
그에 따라, 도 1b와 같이, 인덕터가 아닌 커패시터(capacitor, C1)를 이용한 분압 변환기가 이용될 수 있다. 커패시터를 이용한 분압 변환기는 자성체 없이 커패시터를 이용하여 전압을 승압 또는 강압할 수 있는 컨버터로, 자성체가 이용되지 않아 소형, 초박형 설계가 가능하며, 효율이 높고 발열이 없는 특징이 있다.Accordingly, as shown in FIG. 1B , a voltage dividing converter using a capacitor (C1) rather than an inductor may be used. A voltage divider using a capacitor is a converter that can step up or step down a voltage using a capacitor without a magnetic substance. Since a magnetic substance is not used, a compact and ultra-thin design is possible, and it has high efficiency and no heat generation.
커패시터를 이용한 분압 변환기에 사용되는 커패시터는 용량, 크기 등을 고려 하여 MLCC(Multi Layer Ceramic Capacitor)가 사용되나, 100V 이상의 높은 내압의 고용량 MLCC가 거의 없는 문제가 있다. 즉, 고용량 적용을 위해서는 MLCC의 병렬 연결 개수가 크게 증가하는 문제가 있다. 또한, MLCC에 인가되는 전압이 증가할수록 정전용량이 낮아지는 DC Bias 특성으로 인해, 필요로 하는 내압 대비 2배 이상의 높은 내압 마진을 가지는 MLCC를 선정해야 하는 문제도 있다. 그리고, MLCC Crack 불량 등으로 인한 발화, 발열 등의 PL(Product Liability) 사고 문제도 있으며, 전압이 높을수록 PL 사고 발생 위험도는 대폭 증가하게 된다.The capacitor used in the voltage divider using a capacitor is an MLCC (Multi Layer Ceramic Capacitor) considering the capacity and size, but there is a problem that there are almost no high-capacity MLCC with a high withstand voltage of 100V or more. That is, there is a problem in that the number of parallel connections of MLCCs greatly increases for high-capacity application. In addition, due to DC bias characteristics in which capacitance decreases as the voltage applied to the MLCC increases, there is a problem of selecting an MLCC having a withstand voltage margin twice or more higher than the required withstand voltage. In addition, there are PL (Product Liability) accidents such as ignition and heat due to defective MLCC cracks, and the higher the voltage, the greater the risk of PL accidents.
이상의 문제점으로 인해 MLCC는 50V 이하의 MLCC는 많이 개발되어 있으나, 50V 이상의 고용량 MLCC는 거의 개발되어 있지 않다.Due to the above problems, many MLCCs of 50V or less have been developed, but high-capacity MLCCs of 50V or more have hardly been developed.
또한, 커패시터를 이용한 분압 변환기는 승압 강압 비율이 2, 4 등 2의 배수로 설계되며(1:2, 2:1, 1:4, 4:1), 승압 강압 비율이 고정되어 있어 출력 전압 가변이 불가한 문제점이 있다.In addition, voltage divider converters using capacitors are designed with step-up and step-down ratios that are multiples of 2, such as 2 and 4 (1:2, 2:1, 1:4, and 4:1), and the step-up and step-down ratios are fixed, so the output voltage can be varied. There is an unavoidable problem.
그에 따라, 이상과 같은 문제가 해결된 회로를 개발할 필요가 있다.Accordingly, it is necessary to develop a circuit in which the above problem is solved.
본 개시는 상술한 필요성에 따른 것으로, 본 개시의 목적은 종래의 커패시터를 이용하면서도 고용량의 DC-DC 컨버팅 동작이 가능한 디스플레이 장치 및 그 제어 방법을 제공함에 있다.SUMMARY OF THE INVENTION The present disclosure has been made in accordance with the above-described needs, and an object of the present disclosure is to provide a display device capable of performing a high-capacity DC-DC conversion operation using a conventional capacitor and a control method thereof.
이상과 같은 목적을 달성하기 위한 본 개시의 일 실시 예에 따르면, 디스플레이 장치는 전원 공급 회로, 복수의 커패시터를 포함하며, 상기 전원 공급 회로로부터 공급되는 전압을 분압하여 출력하는 제1 분압 회로 및 복수의 커패시터를 포함하며, 상기 전원 공급 회로로부터 공급되는 전압을 분압하여 출력하는 제2 분압 회로를 포함하며, 상기 제1 분압 회로의 출력단 및 상기 제2 분압 회로의 출력단은 직렬로 연결되어 상기 제1 분압 회로의 제1 출력 전압 및 상기 제2 분압 회로의 제2 출력 전압에 기초한 출력 전압을 제공할 수 있다.According to an embodiment of the present disclosure for achieving the above object, a display device includes a power supply circuit and a plurality of capacitors, and a first voltage divider circuit for dividing and outputting a voltage supplied from the power supply circuit, and a plurality of voltage dividers. and a second voltage divider circuit that divides and outputs a voltage supplied from the power supply circuit, wherein an output terminal of the first voltage divider circuit and an output terminal of the second voltage divider circuit are connected in series to the first voltage divider circuit. An output voltage based on the first output voltage of the voltage divider circuit and the second output voltage of the second voltage divider circuit may be provided.
또한, 상기 제1 분압 회로의 출력단 중 일단은 상기 제2 분압 회로의 출력단 중 일단에 연결되고, 상기 제2 분압 회로의 출력단 중 타단은 대지 접지에 연결될 수 있다.Also, one end of the output terminals of the first voltage divider circuit may be connected to one of the output terminals of the second voltage divider circuit, and the other end of the output terminals of the second voltage divider circuit may be connected to ground.
그리고, 일단이 상기 제2 분압 회로의 입력단에 연결된 제1 저항, 일단이 상기 제1 저항의 타단에 연결되고, 타단이 상기 대지 접지에 연결된 제2 저항 및 상기 제2 저항의 일단의 전압에 기초하여 상기 전원 공급 회로의 출력을 제어하는 제1 피드백 회로를 더 포함할 수 있다.And, based on a first resistor having one end connected to the input terminal of the second voltage divider circuit, a second resistor having one end connected to the other end of the first resistor and the other end connected to the earth ground, and a voltage at one end of the second resistor. It may further include a first feedback circuit for controlling the output of the power supply circuit.
또한, 일단이 상기 제1 저항의 타단 및 상기 제2 저항의 일단에 연결된 제3 저항 및 상기 제3 저항의 타단에 연결된 제1 트랜지스터를 더 포함하고, 상기 제1 트랜지스터는 게이트를 통해 입력된 PWM(Pulse Width Modulation) 제어 신호의 듀티에 기초하여 상기 제2 저항의 일단의 전압을 변경할 수 있다.The method further includes a third resistor having one end connected to the other end of the first resistor and one end of the second resistor, and a first transistor connected to the other end of the third resistor, wherein the first transistor is PWM input through a gate. (Pulse Width Modulation) The voltage of one end of the second resistor may be changed based on the duty of the control signal.
그리고, 상기 제1 분압 회로의 출력단 중 타단은 상기 대지 접지와 상이한 접지에 연결될 수 있다.Also, the other end of the output end of the first voltage divider circuit may be connected to a ground different from the earth ground.
또한, 일단이 상기 제1 분압 회로의 입력단에 연결된 제4 저항, 일단이 상기 제4 저항의 타단에 연결되고, 타단이 상기 대지 접지와 상이한 접지에 연결된 제5 저항 및 상기 제5 저항의 일단의 전압에 기초하여 상기 전원 공급 회로의 출력을 제어하는 제2 피드백 회로를 더 포함할 수 있다.In addition, a fourth resistor having one end connected to the input terminal of the first voltage divider circuit, a fifth resistor having one end connected to the other end of the fourth resistor and the other end connected to a ground different from the earth ground, and one end of the fifth resistor It may further include a second feedback circuit for controlling the output of the power supply circuit based on the voltage.
그리고, 일단이 상기 제4 저항의 타단 및 상기 제5 저항의 일단에 연결된 제6 저항 및 상기 제6 저항의 타단에 연결된 제2 트랜지스터를 더 포함하고, 상기 제2 트랜지스터는 게이트를 통해 입력된 PWM 제어 신호의 듀티에 기초하여 상기 제5 저항의 일단의 전압을 변경할 수 있다.And, a sixth resistor having one end connected to the other end of the fourth resistor and one end of the fifth resistor and a second transistor connected to the other end of the sixth resistor, wherein the second transistor is PWM input through a gate. A voltage of one end of the fifth resistor may be changed based on the duty of the control signal.
또한, 상기 제1 분압 회로는 제1 PWM 신호 및 상기 제1 PWM 신호가 반전된 제2 PWM 신호에 기초하여 제어되고, 상기 제2 분압 회로는 상기 제1 PWM 신호와 기설정된 위상 차를 갖는 제3 PWM 신호 및 상기 제3 PWM 신호가 반전된 제4 PWM 신호에 기초하여 제어될 수 있다.The first voltage divider circuit is controlled based on a first PWM signal and a second PWM signal obtained by inverting the first PWM signal, and the second voltage divider circuit has a predetermined phase difference with the first PWM signal. 3 PWM signals and the third PWM signal may be controlled based on the inverted fourth PWM signal.
그리고, 상기 제1 PWM 신호의 주기(T)는 상기 제3 PWM 신호의 주기와 동일하고, 상기 기설정된 위상 차는 -T/4 이상이고, T/4 이하일 수 있다.The period T of the first PWM signal may be the same as the period of the third PWM signal, and the predetermined phase difference may be greater than or equal to -T/4 and less than or equal to T/4.
또한, 상기 전원 공급 회로는 제1 서브 전원 공급 회로 및 제2 서브 전원 공급 회로를 포함하며, 상기 제1 분압 회로는 상기 제1 서브 전원 공급 회로로부터 공급되는 전압을 분압하여 출력하고, 상기 제2 분압 회로는 상기 제2 서브 전원 공급 회로로부터 공급되는 전압을 분압하여 출력할 수 있다.In addition, the power supply circuit includes a first sub power supply circuit and a second sub power supply circuit, wherein the first voltage divider circuit divides and outputs a voltage supplied from the first sub power supply circuit, and The voltage divider circuit may divide and output the voltage supplied from the second sub power supply circuit.
한편, 본 개시의 일 실시 예에 따르면, 디스플레이 장치의 제어 방법은 전원 공급 회로가 전압을 공급하는 단계, 제1 분압 회로가 상기 전압을 분압하고, 상기 제1 분압 회로의 출력단과 출력단이 직렬로 연결된 제2 분압 회로가 상기 전압을 분압하는 단계 및 상기 제1 분압 회로의 제1 출력 전압 및 상기 제2 분압 회로의 제2 출력 전압에 기초한 출력 전압을 제공하는 단계를 포함한다.Meanwhile, according to an embodiment of the present disclosure, a control method of a display device includes supplying voltage by a power supply circuit, dividing the voltage by a first voltage dividing circuit, and connecting an output terminal and an output terminal of the first voltage dividing circuit in series. and dividing the voltage by a second voltage divider circuit connected thereto and providing an output voltage based on the first output voltage of the first voltage divider circuit and the second output voltage of the second voltage divider circuit.
또한, 상기 제1 분압 회로의 출력단 중 일단은 상기 제2 분압 회로의 출력단 중 일단에 연결되고, 상기 제2 분압 회로의 출력단 중 타단은 대지 접지에 연결될 수 있다.Also, one end of the output terminals of the first voltage divider circuit may be connected to one of the output terminals of the second voltage divider circuit, and the other end of the output terminals of the second voltage divider circuit may be connected to ground.
그리고, 상기 디스플레이 장치는 일단이 상기 제2 분압 회로의 입력단에 연결된 제1 저항, 일단이 상기 제1 저항의 타단에 연결되고, 타단이 상기 대지 접지에 연결된 제2 저항 및 제1 피드백 회로를 더 포함하고, 상기 제공하는 단계는 상기 제1 피드백 회로가 상기 제2 저항의 일단의 전압에 기초하여 상기 전원 공급 회로의 출력을 제어할 수 있다.The display device further includes a first resistor having one end connected to the input terminal of the second voltage divider circuit, a second resistor having one end connected to the other end of the first resistor and the other end connected to the ground, and a first feedback circuit. In the providing step, the first feedback circuit may control an output of the power supply circuit based on a voltage of one end of the second resistor.
또한, 상기 디스플레이 장치는 일단이 상기 제1 저항의 타단 및 상기 제2 저항의 일단에 연결된 제3 저항 및 상기 제3 저항의 타단에 연결된 제1 트랜지스터를 더 포함하고, 상기 출력을 제어하는 단계는 상기 제1 트랜지스터의 게이트를 통해 입력된 PWM(Pulse Width Modulation) 제어 신호의 듀티에 기초하여 상기 제2 저항의 일단의 전압을 변경할 수 있다.The display device further includes a third resistor having one end connected to the other end of the first resistor and one end of the second resistor, and a first transistor connected to the other end of the third resistor, and controlling the output comprises A voltage of one end of the second resistor may be changed based on a duty of a pulse width modulation (PWM) control signal input through a gate of the first transistor.
그리고, 상기 제1 분압 회로의 출력단 중 타단은 상기 대지 접지와 상이한 접지에 연결될 수 있다.Also, the other end of the output end of the first voltage divider circuit may be connected to a ground different from the earth ground.
또한, 상기 디스플레이 장치는 일단이 상기 제1 분압 회로의 입력단에 연결된 제4 저항, 일단이 상기 제4 저항의 타단에 연결되고, 타단이 상기 대지 접지와 상이한 접지에 연결된 제5 저항 및 제2 피드백 회로를 더 포함하고, 상기 제공하는 단계는 상기 제2 피드백 회로가 상기 제5 저항의 일단의 전압에 기초하여 상기 전원 공급 회로의 출력을 제어할 수 있다.In addition, the display device includes a fourth resistor having one end connected to the input terminal of the first voltage divider circuit, a fifth resistor having one end connected to the other end of the fourth resistor and the other end connected to a ground different from the earth ground, and a second feedback A circuit may be further included, and in the providing, the second feedback circuit may control an output of the power supply circuit based on a voltage of one end of the fifth resistor.
그리고, 상기 디스플레이 장치는 일단이 상기 제4 저항의 타단 및 상기 제5 저항의 일단에 연결된 제6 저항 및 상기 제6 저항의 타단에 연결된 제2 트랜지스터를 더 포함하고, 상기 출력을 제어하는 단계는 상기 제2 트랜지스터의 게이트를 통해 입력된 PWM 제어 신호의 듀티에 기초하여 상기 제5 저항의 일단의 전압을 변경할 수 있다.The display device further includes a sixth resistor having one end connected to the other end of the fourth resistor and one end of the fifth resistor, and a second transistor connected to the other end of the sixth resistor, and controlling the output comprises A voltage of one end of the fifth resistor may be changed based on a duty cycle of a PWM control signal input through a gate of the second transistor.
또한, 상기 분압하는 단계는 제1 PWM 신호 및 상기 제1 PWM 신호가 반전된 제2 PWM 신호에 기초하여 상기 제1 분압 회로를 제어하고, 상기 제1 PWM 신호와 기설정된 위상 차를 갖는 제3 PWM 신호 및 상기 제3 PWM 신호가 반전된 제4 PWM 신호에 기초하여 상기 제2 분압 회로를 제어할 수 있다.In addition, the step of dividing the voltage may include controlling the first voltage dividing circuit based on a first PWM signal and a second PWM signal obtained by inverting the first PWM signal, and a third voltage dividing circuit having a predetermined phase difference with the first PWM signal. The second voltage divider circuit may be controlled based on a fourth PWM signal obtained by inverting the PWM signal and the third PWM signal.
그리고, 상기 제1 PWM 신호의 주기(T)는 상기 제3 PWM 신호의 주기와 동일하고, 상기 기설정된 위상 차는 -T/4 이상이고, T/4 이하일 수 있다.The period T of the first PWM signal may be the same as the period of the third PWM signal, and the predetermined phase difference may be greater than or equal to -T/4 and less than or equal to T/4.
또한, 상기 공급하는 단계는 상기 전원 공급 회로에 포함된 제1 서브 전원 공급 회로 및 제2 서브 전원 공급 회로가 전압을 공급하고, 상기 분압하는 단계는 상기 제1 분압 회로가 상기 제1 서브 전원 공급 회로로부터 공급되는 전압을 분압하여 출력하고, 상기 제2 분압 회로가 상기 제2 서브 전원 공급 회로로부터 공급되는 전압을 분압하여 출력할 수 있다.In the supplying step, the first sub power supply circuit and the second sub power supply circuit included in the power supply circuit supply voltage, and in the voltage dividing step, the first sub power supply circuit supplies the first sub power supply. The voltage supplied from the circuit may be divided and output, and the second voltage divider circuit may divide and output the voltage supplied from the second sub power supply circuit.
이상과 같은 본 개시의 다양한 실시 예에 따르면, 디스플레이 장치는 복수의 분압 변환기가 Cascade로 연결되어, 상대적으로 낮은 용량의 MLCC를 이용하더라도 고용량의 DC-DC 컨버팅 동작이 가능하다.According to various embodiments of the present disclosure as described above, in a display device, a plurality of voltage-dividing converters are connected in a cascade, so that a high-capacity DC-DC converting operation is possible even when a relatively low-capacity MLCC is used.
또한, 디스플레이 장치는 위상차가 존재하는 복수의 PWM 신호를 이용하여 복수의 분압 변환기를 제어함에 따라 리플(ripple)을 저감할 수 있다.In addition, the display device may reduce ripple by controlling the plurality of voltage dividing converters using a plurality of PWM signals having a phase difference.
도 1a 및 도 1b는 종래 기술을 설명하기 위한 도면들이다.1A and 1B are drawings for explaining the prior art.
도 2는 본 개시의 일 실시 예에 따른 디스플레이 장치의 구성을 나타내는 블록도이다.2 is a block diagram illustrating a configuration of a display device according to an exemplary embodiment of the present disclosure.
도 3은 본 개시의 일 실시 예에 따른 디스플레이 장치의 구성을 구체적으로 설명하기 위한 도면이다.3 is a diagram for specifically explaining the configuration of a display device according to an embodiment of the present disclosure.
도 4는 본 개시의 다른 실시 예에 따른 디스플레이 장치의 구성을 구체적으로 설명하기 위한 도면이다.4 is a diagram for specifically explaining the configuration of a display device according to another embodiment of the present disclosure.
도 5는 본 개시의 또 다른 실시 예에 따른 디스플레이 장치의 구성을 구체적으로 설명하기 위한 도면이다.5 is a diagram specifically illustrating a configuration of a display device according to another exemplary embodiment of the present disclosure.
도 6은 본 개시의 일 실시 예에 따른 리플을 저감하기 위한 제어 방법을 설명하기 위한 도면이다.6 is a diagram for explaining a control method for reducing ripple according to an embodiment of the present disclosure.
도 7은 본 개시의 일 실시 예에 따른 리플을 저감하기 위한 제어 방법의 결과를 설명하기 위한 도면이다.7 is a diagram for explaining a result of a control method for reducing ripple according to an embodiment of the present disclosure.
도 8은 본 개시의 일 실시 예에 따른 디스플레이 장치의 제어 방법을 설명하기 위한 흐름도이다.8 is a flowchart illustrating a method of controlling a display device according to an embodiment of the present disclosure.
이하에서는 첨부 도면을 참조하여 본 개시를 상세히 설명한다.Hereinafter, the present disclosure will be described in detail with reference to the accompanying drawings.
본 개시의 실시 예에서 사용되는 용어는 본 개시에서의 기능을 고려하면서 가능한 현재 널리 사용되는 일반적인 용어들을 선택하였으나, 이는 당 분야에 종사하는 기술자의 의도 또는 판례, 새로운 기술의 출현 등에 따라 달라질 수 있다. 또한, 특정한 경우는 출원인이 임의로 선정한 용어도 있으며, 이 경우 해당되는 개시의 설명 부분에서 상세히 그 의미를 기재할 것이다. 따라서 본 개시에서 사용되는 용어는 단순한 용어의 명칭이 아닌, 그 용어가 가지는 의미와 본 개시의 전반에 걸친 내용을 토대로 정의되어야 한다.The terms used in the embodiments of the present disclosure have been selected from general terms that are currently widely used as much as possible while considering the functions in the present disclosure, but they may vary depending on the intention or precedent of a person skilled in the art, the emergence of new technologies, and the like. . In addition, in a specific case, there is also a term arbitrarily selected by the applicant, and in this case, the meaning will be described in detail in the description of the disclosure. Therefore, terms used in the present disclosure should be defined based on the meaning of the term and the general content of the present disclosure, not simply the name of the term.
본 명세서에서, "가진다," "가질 수 있다," "포함한다," 또는 "포함할 수 있다" 등의 표현은 해당 특징(예: 수치, 기능, 동작, 또는 부품 등의 구성요소)의 존재를 가리키며, 추가적인 특징의 존재를 배제하지 않는다.In this specification, expressions such as “has,” “can have,” “includes,” or “can include” indicate the existence of a corresponding feature (eg, numerical value, function, operation, or component such as a part). , which does not preclude the existence of additional features.
A 또는/및 B 중 적어도 하나라는 표현은 "A" 또는 "B" 또는 "A 및 B" 중 어느 하나를 나타내는 것으로 이해되어야 한다.The expression at least one of A and/or B should be understood to denote either "A" or "B" or "A and B".
본 명세서에서 사용된 "제1," "제2," "첫째," 또는 "둘째,"등의 표현들은 다양한 구성요소들을, 순서 및/또는 중요도에 상관없이 수식할 수 있고, 한 구성요소를 다른 구성요소와 구분하기 위해 사용될 뿐 해당 구성요소들을 한정하지 않는다.Expressions such as "first," "second," "first," or "second," as used herein, may modify various components regardless of order and/or importance, and may refer to one component It is used only to distinguish it from other components and does not limit the corresponding components.
단수의 표현은 문맥상 명백하게 다르게 뜻하지 않는 한, 복수의 표현을 포함한다. 본 출원에서, "포함하다" 또는 "구성되다" 등의 용어는 명세서상에 기재된 특징, 숫자, 단계, 동작, 구성요소, 부품 또는 이들을 조합한 것이 존재함을 지정하려는 것이지, 하나 또는 그 이상의 다른 특징들이나 숫자, 단계, 동작, 구성요소, 부품 또는 이들을 조합한 것들의 존재 또는 부가 가능성을 미리 배제하지 않는 것으로 이해되어야 한다.Singular expressions include plural expressions unless the context clearly dictates otherwise. In this application, the terms "comprise" or "consist of" are intended to designate that there is a feature, number, step, operation, component, part, or combination thereof described in the specification, but one or more other It should be understood that the presence or addition of features, numbers, steps, operations, components, parts, or combinations thereof is not precluded.
본 명세서에서, 사용자라는 용어는 전자 장치를 사용하는 사람 또는 전자 장치를 사용하는 장치(예: 인공 지능 전자 장치)를 지칭할 수 있다.In this specification, the term user may refer to a person using an electronic device or a device (eg, an artificial intelligence electronic device) using an electronic device.
이하 첨부된 도면들을 참조하여 본 개시의 다양한 실시 예를 보다 상세하게 설명한다.Hereinafter, various embodiments of the present disclosure will be described in more detail with reference to the accompanying drawings.
도 2는 본 개시의 일 실시 예에 따른 디스플레이 장치(100)의 구성을 나타내는 블록도이다. 도 2에 도시된 바와 같이 디스플레이 장치(100)는 전원 공급 회로(110), 제1 분압 회로(120) 및 제2 분압 회로(130)를 포함한다.2 is a block diagram showing the configuration of a display device 100 according to an embodiment of the present disclosure. As shown in FIG. 2 , the display device 100 includes a power supply circuit 110 , a first voltage divider circuit 120 and a second voltage divider circuit 130 .
디스플레이 장치(100)는 각 구성으로 전원을 공급할 수 있다. 예를 들어, 디스플레이 장치(100)는 AC 전원을 DC 전원으로 변환하여 디스플레이 장치(100)의 내부 구성으로 공급할 수 있다. 또는, 디스플레이 장치(100)는 전원을 복수의 전압 레벨을 갖는 복수의 DC 전원으로 변환하고, 디스플레이 장치(100) 내부의 복수의 구성에 각각 복수의 DC 전원을 공급할 수도 있다.The display device 100 may supply power to each component. For example, the display device 100 may convert AC power into DC power and supply it to the internal components of the display device 100 . Alternatively, the display device 100 may convert power into a plurality of DC power sources having a plurality of voltage levels, and supply the plurality of DC power sources to a plurality of components inside the display device 100, respectively.
다만, 이에 한정되는 것은 아니며, 디스플레이 장치(100)는 외부 장치에 탈부착되는 장치로 구현될 수도 있으며, 전원을 공급할 수 있는 장치라면 어떠한 장치라도 무방하다.However, it is not limited thereto, and the display device 100 may be implemented as a device that is detachable from an external device, and any device capable of supplying power may be used.
전원 공급 회로(110)는 전원을 생성하고, 생성된 전원을 제1 분압 회로(120) 및 제2 분압 회로(130)로 공급할 수 있다.The power supply circuit 110 may generate power and supply the generated power to the first voltage divider circuit 120 and the second voltage divider circuit 130 .
예를 들어, 전원 공급 회로(Isolated Converter, 110)는 메인 권선에 의한 출력 및 보조 권선에 의한 출력을 제1 분압 회로(120) 및 제2 분압 회로(130)로 공급할 수 있다.For example, the power supply circuit (Isolated Converter, 110) may supply the output from the main winding and the output from the auxiliary winding to the first voltage divider circuit 120 and the second voltage divider circuit 130.
*제1 분압 회로(분압 변환기(SC Converter), 120)는 복수의 커패시터를 포함하며, 전원 공급 회로(110)로부터 공급되는 전압을 분압하여 출력할 수 있다.* The first voltage divider circuit (SC Converter, 120) includes a plurality of capacitors, and can divide and output the voltage supplied from the power supply circuit 110.
예를 들어, 제1 분압 회로(120)는 인덕터를 포함하지 않고, 커패시터로 구현될 수 있다. 그리고, 제1 분압 회로(120)는 전원 공급 회로(110)의 메인 권선에 의한 출력 및 보조 권선에 의한 출력 중 하나로부터 공급되는 전압을 입력받고, 입력된 전압을 분압하여 출력할 수 있다.For example, the first voltage divider circuit 120 may not include an inductor and may be implemented as a capacitor. Also, the first voltage divider circuit 120 may receive a voltage supplied from one of the output by the main winding and the output by the auxiliary winding of the power supply circuit 110, divide the input voltage, and output the divided voltage.
제2 분압 회로(분압 변환기(SC Converter), 130)는 복수의 커패시터를 포함하며, 전원 공급 회로(110)로부터 공급되는 전압을 분압하여 출력할 수 있다.The second voltage dividing circuit (SC converter) 130 includes a plurality of capacitors, and may divide and output voltage supplied from the power supply circuit 110 .
예를 들어, 제2 분압 회로(130)는 인덕터를 포함하지 않고, 커패시터로 구현될 수 있다. 그리고, 제2 분압 회로(130)는 전원 공급 회로(110)의 메인 권선에 의한 출력 및 보조 권선에 의한 출력 중 다른 하나로부터 공급되는 전압을 입력받고, 입력된 전압을 분압하여 출력할 수 있다.For example, the second voltage divider circuit 130 may be implemented with a capacitor without including an inductor. In addition, the second voltage divider circuit 130 may receive a voltage supplied from the other one of the output by the main winding and the output by the auxiliary winding of the power supply circuit 110, divide the input voltage, and output the divided voltage.
제1 분압 회로(120)의 출력단 및 제2 분압 회로(130)의 출력단은 직렬로 연결되며, 디스플레이 장치(100)는 제1 분압 회로(120)의 제1 출력 전압 및 제2 분압 회로(130)의 제2 출력 전압에 기초한 출력 전압을 제공할 수 있다. 예를 들어, 제1 분압 회로(120)의 출력단 중 일단은 제2 분압 회로(130)의 출력단 중 일단에 연결되고, 제2 분압 회로(130)의 출력단 중 타단은 대지 접지에 연결될 수 있다.The output terminal of the first voltage divider circuit 120 and the output terminal of the second voltage divider circuit 130 are connected in series, and the display device 100 provides the first output voltage of the first voltage divider circuit 120 and the output terminal of the second voltage divider circuit 130. ) It is possible to provide an output voltage based on the second output voltage. For example, one end of the output terminals of the first voltage divider circuit 120 may be connected to one of the output terminals of the second voltage divider circuit 130, and the other end of the output terminals of the second voltage divider circuit 130 may be connected to ground.
즉, 제1 분압 회로(120) 및 제2 분압 회로(130)는 Cascade 구조로 연결되어 부하를 분담할 수 있다. 그에 따라, 제1 분압 회로(120) 및 제2 분압 회로(130) 각각에 포함된 커패시터의 용량 및 크기를 줄일 수 있고(MLCC의 내압 저감), 제1 분압 회로(120) 및 제2 분압 회로(130) 각각의 크기를 줄일 수 있다. 또한, 커패시터의 용량이 작아짐에 따라 발화, 발열 등의 문제가 해소될 수 있다.That is, the first voltage divider circuit 120 and the second voltage divider circuit 130 may be connected in a cascade structure to share the load. Accordingly, the capacitance and size of the capacitors included in each of the first voltage divider circuit 120 and the second voltage divider circuit 130 can be reduced (reducing the withstand voltage of the MLCC), and the first voltage divider circuit 120 and the second voltage divider circuit (130) The size of each can be reduced. In addition, as the capacity of the capacitor decreases, problems such as ignition and heat generation can be solved.
일 실시 예에 따르면, 디스플레이 장치(100)는 일단이 제2 분압 회로(130)의 입력단에 연결된 제1 저항, 일단이 제1 저항의 타단에 연결되고, 타단이 대지 접지에 연결된 제2 저항 및 제2 저항의 일단의 전압에 기초하여 전원 공급 회로(110)의 출력을 제어하는 제1 피드백 회로를 더 포함할 수 있다.According to an embodiment, the display device 100 includes a first resistor having one end connected to the input terminal of the second voltage divider circuit 130, a second resistor having one end connected to the other end of the first resistor and the other end connected to the earth ground, and A first feedback circuit for controlling the output of the power supply circuit 110 based on the voltage of one end of the second resistor may be further included.
또한, 디스플레이 장치(100)는 일단이 제1 저항의 타단 및 제2 저항의 일단에 연결된 제3 저항 및 제3 저항의 타단에 연결된 제1 트랜지스터를 더 포함하고, 제1 트랜지스터는 게이트를 통해 입력된 PWM(Pulse Width Modulation) 제어 신호의 듀티에 기초하여 제2 저항의 일단의 전압을 변경할 수 있다. 즉, 제1 피드백 회로의 기준 전압을 변경함으로써 제2 분압 회로(130)의 출력 전압을 변경할 수 있다.In addition, the display device 100 further includes a third resistor having one end connected to the other end of the first resistor and one end of the second resistor, and a first transistor connected to the other end of the third resistor, wherein the first transistor is input through a gate. A voltage of one end of the second resistor may be changed based on a duty of a pulse width modulation (PWM) control signal. That is, the output voltage of the second voltage divider circuit 130 can be changed by changing the reference voltage of the first feedback circuit.
출력 전압을 변경하는 동작에 따라 부하 급변에 따른 출력 전압 보상이 가능하고, 종래 출력 전압의 가변이 불가한 문제를 해결할 수 있다. 또한, 제2 분압 회로(130)의 출력 전압만을 제어하여 제어의 단순화 및 신뢰성 확보가 가능하다. 피드백 동작 및 출력 전압을 변경하는 동작에 대하여는 후술하는 도면을 통해 좀더 구체적으로 설명한다.According to the operation of changing the output voltage, it is possible to compensate for the output voltage according to the sudden load change, and it is possible to solve the conventional problem of not being able to change the output voltage. In addition, it is possible to simplify control and secure reliability by controlling only the output voltage of the second voltage divider circuit 130 . The feedback operation and the operation of changing the output voltage will be described in more detail through drawings to be described later.
다른 실시 예에 따르면, 제1 분압 회로(120)의 출력단 중 타단은 대지 접지와 상이한 접지에 연결될 수 있다. 그리고, 디스플레이 장치(100)는 일단이 제1 분압 회로(120)의 입력단에 연결된 제4 저항, 일단이 제4 저항의 타단에 연결되고, 타단이 대지 접지와 상이한 접지에 연결된 제5 저항을 포함하며, 및 제5 저항의 일단의 전압에 기초하여 전원 공급 회로(110)의 출력을 제어하는 제2 피드백 회로를 더 포함할 수 있다.According to another embodiment, the other end of the output end of the first voltage divider circuit 120 may be connected to a ground different from the earth ground. Further, the display device 100 includes a fourth resistor having one end connected to the input terminal of the first voltage divider circuit 120, and a fifth resistor having one end connected to the other end of the fourth resistor and the other end connected to a ground different from the earth ground. and a second feedback circuit for controlling the output of the power supply circuit 110 based on the voltage of one end of the fifth resistor.
또한, 디스플레이 장치(100)는 일단이 제4 저항의 타단 및 제5 저항의 일단에 연결된 제6 저항 및 제6 저항의 타단에 연결된 제2 트랜지스터를 더 포함하고, 제2 트랜지스터는 게이트를 통해 입력된 PWM 제어 신호의 듀티에 기초하여 제5 저항의 일단의 전압을 변경할 수 있다. 즉, 제2 피드백 회로의 기준 전압을 변경함으로써 제1 분압 회로(120)의 출력 전압을 변경할 수 있다.In addition, the display device 100 further includes a sixth resistor having one end connected to the other end of the fourth resistor and one end of the fifth resistor, and a second transistor connected to the other end of the sixth resistor, the second transistor being input through a gate. A voltage of one end of the fifth resistor may be changed based on the duty cycle of the PWM control signal. That is, the output voltage of the first voltage divider circuit 120 can be changed by changing the reference voltage of the second feedback circuit.
이러한 실시 예는 바로 이전에 상술한 실시 예와 거의 동일하나, 제1 분압 회로(120)의 출력 전압을 변경하는 점이 차이이다. 특히, 제2 분압 회로(130)의 출력 전압은 대지 접지와 연결된 상태로, 디스플레이 장치(100)는 제1 분압 회로(120) 및 제2 분압 회로(130)의 출력 전압이 합산된 가변 출력 전압 뿐만 아니라 제2 분압 회로(130)의 고정 출력 전압을 추가로 출력할 수 있다.This embodiment is almost the same as the previous embodiment, but the difference is that the output voltage of the first voltage divider circuit 120 is changed. In particular, while the output voltage of the second voltage divider 130 is connected to ground, the display device 100 has a variable output voltage obtained by summing the output voltages of the first voltage divider 120 and the second voltage divider 130. In addition, the fixed output voltage of the second voltage divider circuit 130 may be additionally output.
한편, 또 다른 실시 예에 따르면, 전원 공급 회로(110)는 제1 서브 전원 공급 회로 및 제2 서브 전원 공급 회로를 포함하며, 제1 분압 회로(120)는 제1 서브 전원 공급 회로로부터 공급되는 전압을 분압하여 출력하고, 제2 분압 회로(130)는 제2 서브 전원 공급 회로로부터 공급되는 전압을 분압하여 출력할 수도 있다. 이 경우, 제1 서브 전원 공급 회로 및 제2 서브 전원 공급 회로를 통해 온도 분담이 가능한 이점이 있다.Meanwhile, according to another embodiment, the power supply circuit 110 includes a first sub power supply circuit and a second sub power supply circuit, and the first voltage divider circuit 120 is supplied from the first sub power supply circuit. The voltage is divided and output, and the second voltage divider circuit 130 may divide and output the voltage supplied from the second sub power supply circuit. In this case, there is an advantage in that temperature sharing is possible through the first sub power supply circuit and the second sub power supply circuit.
한편, 제1 분압 회로(120)는 제1 PWM 신호 및 제1 PWM 신호가 반전된 제2 PWM 신호에 기초하여 제어되고, 제2 분압 회로(130)는 제1 PWM 신호와 기설정된 위상 차를 갖는 제3 PWM 신호 및 제3 PWM 신호가 반전된 제4 PWM 신호에 기초하여 제어될 수 있다. 여기서, 제1 PWM 신호의 주기(T)는 제3 PWM 신호의 주기와 동일하고, 기설정된 위상 차는 -T/4 이상이고, T/4 이하일 수 있다. 이러한 동작을 통해 리플을 저감할 수 있다.Meanwhile, the first voltage divider circuit 120 is controlled based on the first PWM signal and the second PWM signal obtained by inverting the first PWM signal, and the second voltage divider circuit 130 calculates a phase difference between the first PWM signal and a preset phase. It can be controlled based on the third PWM signal having and the fourth PWM signal inverted by the third PWM signal. Here, the period T of the first PWM signal is equal to the period of the third PWM signal, and the predetermined phase difference may be greater than or equal to -T/4 and less than or equal to T/4. Through this operation, the ripple can be reduced.
이상과 같이 디스플레이 장치(100)는 제1 분압 회로(120) 및 제2 분압 회로(130)가 Cascade로 연결되어, 상대적으로 낮은 용량의 커패시터를 이용하여 분압 회로를 구성하더라도 고용량의 DC-DC 컨버팅 동작이 가능하다.As described above, in the display device 100, the first voltage divider circuit 120 and the second voltage divider circuit 130 are connected in a cascade, and even if the voltage divider circuit is configured using a relatively low capacitance capacitor, high-capacity DC-DC conversion is performed. action is possible
도 2에서는 설명의 편의를 위해, 제1 분압 회로(120) 및 제2 분압 회로(130)의 두 개의 분압 회로가 Cascade로 연결된 것을 가정하였으나, 이에 한정되는 것은 아니다. 예를 들어, 디스플레이 장치(100)는 3개 이상의 Cascade로 연결된 분압 회로를 포함할 수도 있다.In FIG. 2 , for convenience of description, it is assumed that two voltage divider circuits, the first voltage divider 120 and the second voltage divider 130, are connected in a cascade, but the present invention is not limited thereto. For example, the display device 100 may include three or more cascade-connected voltage divider circuits.
이하에서는 도 3 내지 도 7을 통해 디스플레이 장치(100)의 동작을 좀더 구체적으로 설명한다. 도 3 내지 도 7에서는 설명의 편의를 위해 개별적인 실시 예에 대하여 설명한다. 다만, 도 3 내지 도 7의 개별적인 실시 예는 얼마든지 조합된 상태로 실시될 수도 있다.Hereinafter, the operation of the display device 100 will be described in more detail with reference to FIGS. 3 to 7 . 3 to 7 describe individual embodiments for convenience of description. However, the individual embodiments of FIGS. 3 to 7 may be implemented in any combination.
도 3은 본 개시의 일 실시 예에 따른 디스플레이 장치(100)의 구성을 구체적으로 설명하기 위한 도면이다.3 is a diagram for specifically explaining the configuration of the display device 100 according to an embodiment of the present disclosure.
전원 공급 회로(110)는 Vin1, Vin2의 두 개의 전원을 공급하고, 제1 분압 회로(120)는 Vin2를 분압하여 출력하고, 제2 분압 회로(130)는 Vin1을 분압하여 출력할 수 있다.The power supply circuit 110 may supply two powers, Vin1 and Vin2, the first voltage divider circuit 120 may divide and output Vin2, and the second voltage divider 130 may divide and output Vin1.
제1 분압 회로(120)의 출력단 중 일단은 제2 분압 회로(130)의 출력단 중 일단에 연결되고, 제2 분압 회로(130)의 출력단 중 타단은 대지 접지에 연결될 수 있다. 그에 따라, 제1 분압 회로(120)의 출력 전압과 제2 분압 회로(130)의 출력 전압이 합산된 Vout이 출력될 수 있다.One end of the output terminals of the first voltage divider circuit 120 may be connected to one of the output terminals of the second voltage divider circuit 130, and the other end of the output terminals of the second voltage divider circuit 130 may be connected to ground. Accordingly, Vout obtained by summing the output voltage of the first voltage divider circuit 120 and the output voltage of the second voltage divider circuit 130 may be output.
제1 분압 회로(120)의 출력 전압과 제2 분압 회로(130)의 출력 전압이 합산되어 출력됨에 따라 고용량의 출력이 가능하면서도 제1 분압 회로(120) 및 제2 분압 회로(130) 각각의 출력 전압은 상대적으로 낮기 때문에 제1 분압 회로(120) 및 제2 분압 회로(130)에 포함된 커패시터의 용량도 줄일 수 있다. 즉, 상대적으로 낮은 용량의 커패시터를 이용하여 분압 회로를 구성함에 따라, 커패시터의 용량 및 크기를 줄일 수 있고, 발화, 발열 등의 문제를 줄일 수 있다.As the output voltage of the first voltage divider circuit 120 and the output voltage of the second voltage divider circuit 130 are summed and output, a high capacity output is possible and the first voltage divider circuit 120 and the second voltage divider circuit 130 respectively Since the output voltage is relatively low, capacitances of capacitors included in the first voltage divider circuit 120 and the second voltage divider circuit 130 may also be reduced. That is, as the voltage divider circuit is configured using a relatively low capacitance capacitor, the capacitance and size of the capacitor can be reduced, and problems such as ignition and heat generation can be reduced.
한편, 디스플레이 장치(100)는 일단이 제2 분압 회로(130)의 입력단에 연결된 제1 저항(R1), 일단이 제1 저항의 타단에 연결되고, 타단이 대지 접지에 연결된 제2 저항(R2) 및 제2 저항의 일단의 전압에 기초하여 전원 공급 회로(100)의 출력을 제어하는 제1 피드백 회로(IC1, PC1)를 더 포함할 수 있다.Meanwhile, the display device 100 includes a first resistor R1 having one end connected to the input terminal of the second voltage divider circuit 130, and a second resistor R2 having one end connected to the other end of the first resistor and the other end connected to the earth ground. ) and a first feedback circuit (IC1, PC1) for controlling the output of the power supply circuit 100 based on the voltage of one end of the second resistor.
예를 들어, 어떠한 이유로 Vin1이 증가하게 되면 제2 저항의 일단에 걸리는 전압이 증가하게 된다. 제2 저항의 일단의 전압이 증가하면 IC1이 도통되고, PC1의 2차측 발광 및 1차측 수광에 따라 PWM IC의 PWM 듀티가 변경되어 Vin1을 제어하게 된다.For example, if Vin1 increases for some reason, the voltage applied to one end of the second resistor increases. When the voltage at one end of the second resistor increases, IC1 is turned on, and the PWM duty of the PWM IC is changed according to the secondary side light emission and primary side light receiving of PC1 to control Vin1.
반대로 Vin1이 감소하게 되면 제2 저항의 일단에 걸리는 전압이 감소하게 된다. 제2 저항의 일단의 전압이 감소하면 IC1이 차단되거나 흐르는 전류가 감소하게 되고, PC1의 2차측 발광량이 줄거나 발광이 없어 PWM IC의 PWM 듀티가 변경되어 Vin1을 제어하게 된다.Conversely, when Vin1 decreases, the voltage applied to one end of the second resistor decreases. When the voltage at one end of the second resistor decreases, IC1 is blocked or current flowing decreases, and the amount of light emitted from the secondary side of PC1 decreases or there is no light, so the PWM duty of the PWM IC is changed to control Vin1.
이상과 같은 피드백 제어를 위해 제1 저항 및 제2 저항의 값은 IC1의 도통 전압에 기초하여 결정될 수 있다. 가령, 제2 저항의 일단에 걸리는 전압이 양방향으로 변경될 때의 피드백 제어를 위해 도통 전압에 기 설정된 마진을 두어 기준 전압을 설정하고, 정상 동작 시에 제2 저항의 일단에 걸리는 전압이 기준 전압이 되도록 제1 저항 및 제2 저항의 값이 결정될 수 있다.For feedback control as described above, values of the first resistor and the second resistor may be determined based on the conduction voltage of IC1 . For example, for feedback control when the voltage across one end of the second resistor is changed in both directions, the reference voltage is set with a predetermined margin on the conduction voltage, and the voltage across one end of the second resistor during normal operation is the reference voltage Values of the first resistor and the second resistor may be determined so that
이러한 피드백 동작은 제2 분압 회로(130)의 입력 전압만을 제어하는 것으로, 제어의 단순화 및 신뢰성 확보가 가능하다. 또한, 출력 전압의 가변, 부하 급변의 경우에 출력 전압을 보상할 수 있다.This feedback operation controls only the input voltage of the second voltage divider circuit 130, and it is possible to simplify control and secure reliability. In addition, the output voltage can be compensated in the case of variable output voltage or sudden load change.
한편, 디스플레이 장치(100)는 일단이 제1 저항의 타단 및 제2 저항의 일단에 연결된 제3 저항(R3) 및 제3 저항의 타단에 연결된 제1 트랜지스터(Q9)를 더 포함하고, 제1 트랜지스터는 게이트를 통해 입력된 PWM(Pulse Width Modulation) 제어 신호의 듀티에 기초하여 제2 저항의 일단의 전압을 변경할 수 있다.Meanwhile, the display device 100 further includes a third resistor R3 having one end connected to the other end of the first resistor and one end of the second resistor, and a first transistor Q9 connected to the other end of the third resistor. The transistor may change the voltage of one end of the second resistor based on the duty of a pulse width modulation (PWM) control signal input through a gate.
즉, 제1 트랜지스터가 턴 온되는 동안은 제2 저항 및 제3 저항이 병렬 연결됨에 따라 저항값이 작아지고, 제2 저항의 일단에 걸리는 전압은 더 낮아지게 된다. 즉, PWM 제어 신호의 듀티를 변경함에 따라 제2 저항의 일단에 걸리는 전압이 낮아지는 정도를 변경할 수 있으며, 이 경우 상술한 피드백 동작을 통해 Vin1을 변경할 수 있다. 그리고, Vin1의 변경에 따라 Vout의 변경이 가능하다. 특히, 종래 분압 변환기와 같이 승압 강압 비율이 2의 배수로 고정된 것과는 달리, PWM 제어 신호의 듀티 변경에 따라 다양한 크기의 출력 전압을 제공할 수 있다.That is, while the first transistor is turned on, the resistance value decreases as the second resistor and the third resistor are connected in parallel, and the voltage across one end of the second resistor becomes lower. That is, the degree to which the voltage applied to one end of the second resistor is lowered may be changed by changing the duty cycle of the PWM control signal, and in this case, Vin1 may be changed through the above-described feedback operation. And, Vout can be changed according to the change of Vin1. In particular, unlike conventional voltage divider converters in which the step-down ratio is fixed to a multiple of 2, output voltages of various sizes can be provided according to duty changes of the PWM control signal.
예를 들어, PWM 제어 신호의 듀티를 증가시키면 제2 저항의 일단에 걸리는 전압이 낮아지고, 피드백 회로를 통해 Vin1이 증가하여 Vout이 증가하게 된다. 또는, PWM 제어 신호의 듀티를 감소시키면 제2 저항의 일단에 걸리는 전압이 증가하고, 피드백 회로를 통해 Vin1이 감소하여 Vout이 감소하게 된다.For example, when the duty of the PWM control signal is increased, the voltage applied to one end of the second resistor is lowered, and Vin1 is increased through the feedback circuit, so that Vout is increased. Alternatively, when the duty cycle of the PWM control signal is decreased, the voltage applied to one end of the second resistor is increased, and Vin1 is decreased through the feedback circuit, thereby reducing Vout.
여기서, 제1 저항, 제2 저항 및 제3 저항의 값은 PWM 제어 신호의 기본 듀티에 기초하여 결정될 수 있다. 예를 들어, PWM 제어 신호의 듀티가 50%인 경우를 기준으로 IC1의 기준 전압(도통 전압 + 기 설정된 마진)을 결정하고, 이로부터 제1 저항, 제2 저항 및 제3 저항의 값이 결정될 수 있다. 즉, 정상 동작 시에 PWM 제어 신호의 듀티는 50%이고, PWM 제어 신호의 듀티를 증가시키기나 감소시켜 출력 전압을 제어할 수 있다.Here, values of the first resistor, the second resistor, and the third resistor may be determined based on the basic duty of the PWM control signal. For example, based on the case where the duty cycle of the PWM control signal is 50%, the reference voltage (a conduction voltage + a predetermined margin) of IC1 is determined, and the values of the first resistor, the second resistor, and the third resistor are determined therefrom. can That is, during normal operation, the duty cycle of the PWM control signal is 50%, and the output voltage can be controlled by increasing or decreasing the duty cycle of the PWM control signal.
도 4는 본 개시의 다른 실시 예에 따른 디스플레이 장치(100)의 구성을 구체적으로 설명하기 위한 도면이다.4 is a diagram for specifically explaining the configuration of a display device 100 according to another embodiment of the present disclosure.
도 4는 도 3과 거의 유사하나, 피드백 회로 등이 제1 분압 회로(120)에 연결된 점이 차이이다. 구체적으로, 제1 분압 회로(120)의 출력단 중 타단은 대지 접지와 상이한 접지에 연결되고, 디스플레이 장치(100)는 일단이 제1 분압 회로(120)의 입력단에 연결된 제4 저항(R1), 일단이 제4 저항의 타단에 연결되고, 타단이 대지 접지와 상이한 접지에 연결된 제5 저항(R2) 및 제5 저항의 일단의 전압에 기초하여 전원 공급 회로(100)의 출력을 제어하는 제2 피드백 회로(IC1, PC1)를 더 포함할 수 있다.FIG. 4 is almost similar to FIG. 3 , but the difference is that a feedback circuit or the like is connected to the first voltage divider circuit 120 . Specifically, the other end of the output end of the first voltage divider circuit 120 is connected to a ground different from the earth ground, and the display device 100 includes a fourth resistor R1, one end of which is connected to the input end of the first voltage divider circuit 120; A fifth resistor R2 having one end connected to the other end of the fourth resistor and the other end connected to a ground different from the earth ground, and a second control output of the power supply circuit 100 based on a voltage of one end of the fifth resistor. Feedback circuits IC1 and PC1 may be further included.
또한, 디스플레이 장치(100)는 일단이 제4 저항의 타단 및 제5 저항의 일단에 연결된 제6 저항(R3) 및 제6 저항의 타단에 연결된 제2 트랜지스터(Q9)를 더 포함하고, 제2 트랜지스터는 게이트를 통해 입력된 PWM 제어 신호의 듀티에 기초하여 제5 저항의 일단의 전압을 변경할 수 있다.In addition, the display device 100 further includes a sixth resistor R3 having one end connected to the other end of the fourth resistor and one end of the fifth resistor, and a second transistor Q9 connected to the other end of the sixth resistor. The transistor may change the voltage of one end of the fifth resistor based on the duty cycle of the PWM control signal input through the gate.
여기서, 피드백 동작 및 Vout를 변경하는 동작은 도 3과 동일하므로 중복되는 설명은 생략한다.Here, since the feedback operation and the operation of changing Vout are the same as those of FIG. 3, duplicate descriptions are omitted.
도 4에서는 도 3과는 달리 두 종류의 전압을 출력할 수 있다. 구체적으로, 도 4의 디스플레이 장치(100)는 제1 분압 회로(120) 및 제2 분압 회로(130)의 출력 전압이 합산된 가변 출력 전압(Vout2) 뿐만 아니라 제2 분압 회로(130)의 고정 출력 전압(Vout1)을 추가로 출력할 수 있다.Unlike FIG. 3 , in FIG. 4 , two types of voltages may be output. Specifically, the display device 100 of FIG. 4 fixes the variable output voltage Vout2 obtained by summing the output voltages of the first voltage divider circuit 120 and the second voltage divider circuit 130 as well as the second voltage divider circuit 130. An output voltage Vout1 may be additionally output.
도 5는 본 개시의 또 다른 실시 예에 따른 디스플레이 장치(100)의 구성을 구체적으로 설명하기 위한 도면이다.5 is a diagram specifically illustrating a configuration of a display device 100 according to another embodiment of the present disclosure.
도 5에 도시된 바와 같이, 전원 공급 회로(110)는 제1 서브 전원 공급 회로 및 제2 서브 전원 공급 회로를 포함하며, 제1 분압 회로(120)는 제1 서브 전원 공급 회로로부터 공급되는 전압을 분압하여 출력하고, 제2 분압 회로(130)는 제2 서브 전원 공급 회로로부터 공급되는 전압을 분압하여 출력할 수 있다.As shown in FIG. 5 , the power supply circuit 110 includes a first sub power supply circuit and a second sub power supply circuit, and the first voltage divider circuit 120 provides a voltage supplied from the first sub power supply circuit. The second voltage divider circuit 130 may divide and output the voltage supplied from the second sub power supply circuit.
이 경우, 제1 서브 전원 공급 회로 및 제2 서브 전원 공급 회로를 통해 온도 분담이 가능한 이점이 있다.In this case, there is an advantage in that temperature sharing is possible through the first sub power supply circuit and the second sub power supply circuit.
도 6은 본 개시의 일 실시 예에 따른 리플을 저감하기 위한 제어 방법을 설명하기 위한 도면이다.6 is a diagram for explaining a control method for reducing ripple according to an embodiment of the present disclosure.
도 6에서 Q1 내지 Q8은 도 3 내지 도 5에서의 제1 분압 회로(120) 및 제2 분압 회로(130)에 포함된 트랜지스터를 나타낸다. Q1 내지 Q4는 제2 분압 회로(130)에 포함된 트랜지스터이고, Q5 내지 Q8은 제1 분압 회로(120)에 포함된 트랜지스터이며, PWM_A는 Q1 및 Q3를 제어하기 위한 신호이고, PWM_B는 Q2 및 Q4를 제어하기 위한 신호이고, PWM_C는 Q5 및 Q7을 제어하기 위한 신호이고, PWM_D는 Q6 및 Q8을 제어하기 위한 신호이다.In FIG. 6 , Q1 to Q8 denote transistors included in the first voltage divider circuit 120 and the second voltage divider circuit 130 in FIGS. 3 to 5 . Q1 to Q4 are transistors included in the second voltage divider circuit 130, Q5 to Q8 are transistors included in the first voltage divider circuit 120, PWM_A is a signal for controlling Q1 and Q3, and PWM_B is a signal for controlling Q2 and Q3. A signal for controlling Q4, PWM_C is a signal for controlling Q5 and Q7, and PWM_D is a signal for controlling Q6 and Q8.
도 6의 상단은 위상 차가 없는 경우를 도시하였으며, 도 6의 하단은 본 개시에 따라 위상 차가 있는 경우를 도시하였다.The upper part of FIG. 6 shows a case without a phase difference, and the lower part of FIG. 6 shows a case with a phase difference according to the present disclosure.
즉, 제1 분압 회로(120)는 PWM_C 및 PWM_C가 반전된 PWM_D에 기초하여 제어되고, 제2 분압 회로(130)는 PWM_A 및 PWM_A가 반전된 PWM_B에 기초하여 제어될 수 있다.That is, the first voltage divider 120 may be controlled based on PWM_C and PWM_D obtained by inverting PWM_C, and the second voltage dividing circuit 130 may be controlled based on PWM_A and PWM_B obtained by inverting PWM_A.
그리고, PWM_C의 주기(T)는 PWM_A의 주기와 동일하고, 기설정된 위상 차는 -T/4 이상이고, T/4 이하일 수 있다. 가령, PWM_A 및 PWM_C의 위상 차는 T/4이고, 그에 따라 PWM_B 및 PWM_D의 위상 차는 T/4일 수 있다.In addition, the cycle (T) of PWM_C is equal to the cycle of PWM_A, and the preset phase difference may be greater than or equal to -T/4 and less than or equal to T/4. For example, a phase difference between PWM_A and PWM_C is T/4, and thus a phase difference between PWM_B and PWM_D may be T/4.
이러한 동작에 따른 효과는 도 7에서 설명한다.Effects of this operation are described in FIG. 7 .
도 7은 본 개시의 일 실시 예에 따른 리플을 저감하기 위한 제어 방법의 결과를 설명하기 위한 도면이다.7 is a diagram for explaining a result of a control method for reducing ripple according to an embodiment of the present disclosure.
도 7의 좌측은 도 6의 상단과 같은 제어에 따른 결과이고, 도 7의 우측은 도 6의 하단과 같은 제어에 따른 결과이다.The left side of FIG. 7 is the result of the same control as the upper part of FIG. 6, and the right side of FIG. 7 is the result of the same control as the lower part of FIG.
도 7의 좌측 및 우측에서 가장 상단의 그래프는 제1 분압 회로(120)의 출력이고, 두 번째 그래프는 제2 분압 회로(130)의 출력이다. 그리고, 세 번째 그래프는 합산된 출력 Vout을 나타낸다. 즉, 리플을 저감하기 위한 제어 방법이 이용되더라도 제1 분압 회로(120) 및 제2 분압 회로(130)의 출력은 변화가 없으나, 두 출력의 합산된 출력 Vout은 리플이 감소하게 된다. 도 7의 예에 따르면, 리플이 절반 정도로 감소하게 되어 좀더 품질이 향상된 출력 전압을 제공할 수 있다.The uppermost graph on the left and right sides of FIG. 7 is the output of the first voltage divider circuit 120, and the second graph is the output of the second voltage divider circuit 130. And, the third graph shows the summed output Vout. That is, even if the control method for reducing the ripple is used, the outputs of the first voltage divider circuit 120 and the second voltage divider circuit 130 do not change, but the sum of the two outputs Vout has a reduced ripple. According to the example of FIG. 7 , since the ripple is reduced by about half, an output voltage with improved quality can be provided.
도 8은 본 개시의 일 실시 예에 따른 디스플레이 장치의 제어 방법을 설명하기 위한 흐름도이다.8 is a flowchart illustrating a method of controlling a display device according to an embodiment of the present disclosure.
먼저, 전원 공급 회로가 전압을 공급한다(S810). 그리고, 제1 분압 회로가 전압을 분압하고, 제1 분압 회로의 출력단과 출력단이 직렬로 연결된 제2 분압 회로가 전압을 분압한다(S820). 그리고, 제1 분압 회로의 제1 출력 전압 및 제2 분압 회로의 제2 출력 전압에 기초한 출력 전압을 제공한다(S830).First, the power supply circuit supplies voltage (S810). Then, the first voltage divider circuit divides the voltage, and the second voltage divider circuit connected in series with the output terminal of the first voltage divider circuit divides the voltage (S820). Then, an output voltage based on the first output voltage of the first voltage divider circuit and the second output voltage of the second voltage divider circuit is provided (S830).
여기서, 제1 분압 회로의 출력단 중 일단은 제2 분압 회로의 출력단 중 일단에 연결되고, 제2 분압 회로의 출력단 중 타단은 대지 접지에 연결될 수 있다.Here, one end of the output terminals of the first voltage divider circuit may be connected to one of the output terminals of the second voltage divider circuit, and the other end of the output terminals of the second voltage divider circuit may be connected to the ground.
그리고, 디스플레이 장치는 일단이 제2 분압 회로의 입력단에 연결된 제1 저항, 일단이 제1 저항의 타단에 연결되고, 타단이 대지 접지에 연결된 제2 저항 및 제1 피드백 회로를 더 포함하고, 제공하는 단계(S830)는 제1 피드백 회로가 제2 저항의 일단의 전압에 기초하여 전원 공급 회로의 출력을 제어할 수 있다.The display device further includes a first resistor having one end connected to the input terminal of the second voltage divider circuit, a second resistor having one end connected to the other end of the first resistor and the other end connected to ground, and a first feedback circuit. In the step S830, the first feedback circuit may control the output of the power supply circuit based on the voltage of one end of the second resistor.
여기서, 디스플레이 장치는 일단이 제1 저항의 타단 및 제2 저항의 일단에 연결된 제3 저항 및 제3 저항의 타단에 연결된 제1 트랜지스터를 더 포함하고, 출력을 제어하는 단계는 제1 트랜지스터의 게이트를 통해 입력된 PWM(Pulse Width Modulation) 제어 신호의 듀티에 기초하여 제2 저항의 일단의 전압을 변경할 수 있다.Here, the display device further includes a third resistor having one end connected to the other end of the first resistor and one end of the second resistor, and a first transistor connected to the other end of the third resistor, and controlling the output may include a gate of the first transistor. The voltage of one end of the second resistor may be changed based on the duty of a PWM (Pulse Width Modulation) control signal input through.
한편, 제1 분압 회로의 출력단 중 타단은 대지 접지와 상이한 접지에 연결될 수 있다.Meanwhile, the other end of the output end of the first voltage divider circuit may be connected to a ground different from the earth ground.
여기서, 디스플레이 장치는 일단이 제1 분압 회로의 입력단에 연결된 제4 저항, 일단이 제4 저항의 타단에 연결되고, 타단이 대지 접지와 상이한 접지에 연결된 제5 저항 및 제2 피드백 회로를 더 포함하고, 제공하는 단계(S830)는 제2 피드백 회로가 제5 저항의 일단의 전압에 기초하여 전원 공급 회로의 출력을 제어할 수 있다.Here, the display device further includes a fourth resistor having one end connected to the input terminal of the first voltage divider circuit, a fifth resistor having one end connected to the other end of the fourth resistor and the other end connected to a ground different from the earth ground, and a second feedback circuit. In the providing step (S830), the second feedback circuit may control the output of the power supply circuit based on the voltage of one end of the fifth resistor.
그리고, 디스플레이 장치는 일단이 제4 저항의 타단 및 제5 저항의 일단에 연결된 제6 저항 및 제6 저항의 타단에 연결된 제2 트랜지스터를 더 포함하고, 출력을 제어하는 단계는 제2 트랜지스터의 게이트를 통해 입력된 PWM 제어 신호의 듀티에 기초하여 제5 저항의 일단의 전압을 변경할 수 있다.The display device further includes a sixth resistor having one end connected to the other end of the fourth resistor and one end of the fifth resistor, and a second transistor connected to the other end of the sixth resistor, and controlling the output comprises a gate of the second transistor. It is possible to change the voltage of one end of the fifth resistor based on the duty of the PWM control signal input through .
한편, 분압하는 단계(S820)는 제1 PWM 신호 및 제1 PWM 신호가 반전된 제2 PWM 신호에 기초하여 제1 분압 회로를 제어하고, 제1 PWM 신호와 기설정된 위상 차를 갖는 제3 PWM 신호 및 제3 PWM 신호가 반전된 제4 PWM 신호에 기초하여 제2 분압 회로를 제어할 수 있다.In the step of dividing the voltage (S820), the first PWM signal is controlled based on the first PWM signal and the second PWM signal obtained by inverting the first PWM signal, and the third PWM signal has a predetermined phase difference with the first PWM signal. The second voltage divider circuit may be controlled based on the fourth PWM signal obtained by inverting the signal and the third PWM signal.
여기서, 제1 PWM 신호의 주기(T)는 제3 PWM 신호의 주기와 동일하고, 기설정된 위상 차는 -T/4 이상이고, T/4 이하일 수 있다.Here, the period T of the first PWM signal is equal to the period of the third PWM signal, and the predetermined phase difference may be greater than or equal to -T/4 and less than or equal to T/4.
한편, 공급하는 단계(S810)는 전원 공급 회로에 포함된 제1 서브 전원 공급 회로 및 제2 서브 전원 공급 회로가 전압을 공급하고, 분압하는 단계(S820)는 제1 분압 회로가 제1 서브 전원 공급 회로로부터 공급되는 전압을 분압하여 출력하고, 제2 분압 회로가 제2 서브 전원 공급 회로로부터 공급되는 전압을 분압하여 출력할 수 있다.Meanwhile, in the supplying step (S810), the first sub-power supply circuit and the second sub-power supply circuit included in the power supply circuit supply voltage, and in the voltage dividing step (S820), the first sub-power supply circuit includes the first sub-power supply circuit. The voltage supplied from the supply circuit may be divided and output, and the second voltage divider circuit may divide and output the voltage supplied from the second sub power supply circuit.
이상과 같은 본 개시의 다양한 실시 예에 따르면, 디스플레이 장치는 복수의 분압 변환기가 Cascade로 연결되어, 상대적으로 낮은 용량의 MLCC를 이용하더라도 고용량의 DC-DC 컨버팅 동작이 가능하다.According to various embodiments of the present disclosure as described above, in a display device, a plurality of voltage-dividing converters are connected in a cascade, so that a high-capacity DC-DC converting operation is possible even when a relatively low-capacity MLCC is used.
또한, 디스플레이 장치는 위상차가 존재하는 복수의 PWM 신호를 이용하여 복수의 분압 변환기를 제어함에 따라 리플(ripple)을 저감할 수 있다.In addition, the display device may reduce ripple by controlling the plurality of voltage dividing converters using a plurality of PWM signals having a phase difference.
한편, 본 개시의 일시 예에 따르면, 이상에서 설명된 다양한 실시 예들은 기기(machine)(예: 컴퓨터)로 읽을 수 있는 저장 매체(machine-readable storage media)에 저장된 명령어를 포함하는 소프트웨어로 구현될 수 있다. 기기는, 저장 매체로부터 저장된 명령어를 호출하고, 호출된 명령어에 따라 동작이 가능한 장치로서, 개시된 실시 예들에 따른 전자 장치(예: 전자 장치(A))를 포함할 수 있다. 명령이 프로세서에 의해 실행될 경우, 프로세서가 직접, 또는 프로세서의 제어 하에 다른 구성요소들을 이용하여 명령에 해당하는 기능을 수행할 수 있다. 명령은 컴파일러 또는 인터프리터에 의해 생성 또는 실행되는 코드를 포함할 수 있다. 기기로 읽을 수 있는 저장매체는, 비일시적(non-transitory) 저장매체의 형태로 제공될 수 있다. 여기서, '비일시적'은 저장매체가 신호(signal)를 포함하지 않으며 실재(tangible)한다는 것을 의미할 뿐 데이터가 저장매체에 반영구적 또는 임시적으로 저장됨을 구분하지 않는다.Meanwhile, according to an exemplary embodiment of the present disclosure, the various embodiments described above may be implemented as software including instructions stored in a machine-readable storage media (eg, a computer). can A device is a device capable of calling a stored command from a storage medium and operating according to the called command, and may include an electronic device (eg, the electronic device A) according to the disclosed embodiments. When a command is executed by a processor, the processor may perform a function corresponding to the command directly or by using other components under the control of the processor. An instruction may include code generated or executed by a compiler or interpreter. The device-readable storage medium may be provided in the form of a non-transitory storage medium. Here, 'non-temporary' only means that the storage medium does not contain a signal and is tangible, but does not distinguish whether data is stored semi-permanently or temporarily in the storage medium.
또한, 본 개시의 일 실시 예에 따르면, 이상에서 설명된 다양한 실시 예들에 따른 방법은 컴퓨터 프로그램 제품(computer program product)에 포함되어 제공될 수 있다. 컴퓨터 프로그램 제품은 상품으로서 판매자 및 구매자 간에 거래될 수 있다. 컴퓨터 프로그램 제품은 기기로 읽을 수 있는 저장 매체(예: compact disc read only memory (CD-ROM))의 형태로, 또는 어플리케이션 스토어(예: 플레이 스토어TM)를 통해 온라인으로 배포될 수 있다. 온라인 배포의 경우에, 컴퓨터 프로그램 제품의 적어도 일부는 제조사의 서버, 어플리케이션 스토어의 서버, 또는 중계 서버의 메모리와 같은 저장 매체에 적어도 일시 저장되거나, 임시적으로 생성될 수 있다.Also, according to an embodiment of the present disclosure, the method according to the various embodiments described above may be included in a computer program product and provided. Computer program products may be traded between sellers and buyers as commodities. The computer program product may be distributed in the form of a device-readable storage medium (eg compact disc read only memory (CD-ROM)) or online through an application store (eg Play Store™). In the case of online distribution, at least part of the computer program product may be temporarily stored or temporarily created in a storage medium such as a manufacturer's server, an application store server, or a relay server's memory.
또한, 본 개시의 일 실시 예에 따르면, 이상에서 설명된 다양한 실시 예들은 소프트웨어(software), 하드웨어(hardware) 또는 이들의 조합을 이용하여 컴퓨터(computer) 또는 이와 유사한 장치로 읽을 수 있는 기록 매체 내에서 구현될 수 있다. 일부 경우에 있어 본 명세서에서 설명되는 실시 예들이 프로세서 자체로 구현될 수 있다. 소프트웨어적인 구현에 의하면, 본 명세서에서 설명되는 절차 및 기능과 같은 실시 예들은 별도의 소프트웨어 모듈들로 구현될 수 있다. 소프트웨어 모듈들 각각은 본 명세서에서 설명되는 하나 이상의 기능 및 동작을 수행할 수 있다.In addition, according to one embodiment of the present disclosure, the various embodiments described above use software, hardware, or a combination thereof in a recording medium readable by a computer or similar device. can be implemented in In some cases, the embodiments described herein may be implemented in a processor itself. According to software implementation, embodiments such as procedures and functions described in this specification may be implemented as separate software modules. Each of the software modules may perform one or more functions and operations described herein.
한편, 상술한 다양한 실시 예들에 따른 기기의 프로세싱 동작을 수행하기 위한 컴퓨터 명령어(computer instructions)는 비일시적 컴퓨터 판독 가능 매체(non-transitory computer-readable medium)에 저장될 수 있다. 이러한 비일시적 컴퓨터 판독 가능 매체에 저장된 컴퓨터 명령어는 특정 기기의 프로세서에 의해 실행되었을 때 상술한 다양한 실시 예에 따른 기기에서의 처리 동작을 특정 기기가 수행하도록 한다. 비일시적 컴퓨터 판독 가능 매체란 레지스터, 캐쉬, 메모리 등과 같이 짧은 순간 동안 데이터를 저장하는 매체가 아니라 반영구적으로 데이터를 저장하며, 기기에 의해 판독(reading)이 가능한 매체를 의미한다. 비일시적 컴퓨터 판독 가능 매체의 구체적인 예로는, CD, DVD, 하드 디스크, 블루레이 디스크, USB, 메모리카드, ROM 등이 있을 수 있다.Meanwhile, computer instructions for performing the processing operation of the device according to various embodiments described above may be stored in a non-transitory computer-readable medium. Computer instructions stored in such a non-transitory computer readable medium, when executed by a processor of a specific device, cause the specific device to perform processing operations in the device according to various embodiments described above. A non-transitory computer readable medium is a medium that stores data semi-permanently and is readable by a device, not a medium that stores data for a short moment, such as a register, cache, or memory. Specific examples of the non-transitory computer readable medium may include a CD, DVD, hard disk, Blu-ray disk, USB, memory card, ROM, and the like.
또한, 상술한 다양한 실시 예들에 따른 구성 요소(예: 모듈 또는 프로그램) 각각은 단수 또는 복수의 개체로 구성될 수 있으며, 전술한 해당 서브 구성 요소들 중 일부 서브 구성 요소가 생략되거나, 또는 다른 서브 구성 요소가 다양한 실시 예에 더 포함될 수 있다. 대체적으로 또는 추가적으로, 일부 구성 요소들(예: 모듈 또는 프로그램)은 하나의 개체로 통합되어, 통합되기 이전의 각각의 해당 구성 요소에 의해 수행되는 기능을 동일 또는 유사하게 수행할 수 있다. 다양한 실시예들에 따른, 모듈, 프로그램 또는 다른 구성 요소에 의해 수행되는 동작들은 순차적, 병렬적, 반복적 또는 휴리스틱하게 실행되거나, 적어도 일부 동작이 다른 순서로 실행되거나, 생략되거나, 또는 다른 동작이 추가될 수 있다.In addition, each of the components (eg, modules or programs) according to various embodiments described above may be composed of a single object or a plurality of entities, and some sub-components among the aforementioned sub-components may be omitted, or other sub-components may be used. Components may be further included in various embodiments. Alternatively or additionally, some components (eg, modules or programs) may be integrated into one entity and perform the same or similar functions performed by each corresponding component prior to integration. According to various embodiments, operations performed by modules, programs, or other components are executed sequentially, in parallel, iteratively, or heuristically, or at least some operations are executed in a different order, are omitted, or other operations are added. It can be.
이상에서는 본 개시의 바람직한 실시 예에 대하여 도시하고 설명하였지만, 본 개시는 상술한 특정의 실시 예에 한정되지 아니하며, 청구범위에서 청구하는 본 개시의 요지를 벗어남이 없이 당해 개시에 속하는 기술분야에서 통상의 지식을 가진 자에 의해 다양한 변형실시가 가능한 것은 물론이고, 이러한 변형실시들은 본 개시의 기술적 사상이나 전망으로부터 개별적으로 이해되어져서는 안될 것이다.Although the preferred embodiments of the present disclosure have been shown and described above, the present disclosure is not limited to the specific embodiments described above, and is common in the technical field belonging to the present disclosure without departing from the gist of the present disclosure claimed in the claims. Of course, various modifications and implementations are possible by those with knowledge of, and these modifications should not be individually understood from the technical spirit or perspective of the present disclosure.

Claims (15)

  1. 디스플레이 장치에 있어서,In the display device,
    전원 공급 회로;power supply circuit;
    복수의 커패시터를 포함하며, 상기 전원 공급 회로로부터 공급되는 전압을 분압하여 출력하는 제1 분압 회로; 및a first voltage divider circuit including a plurality of capacitors and dividing and outputting the voltage supplied from the power supply circuit; and
    복수의 커패시터를 포함하며, 상기 전원 공급 회로로부터 공급되는 전압을 분압하여 출력하는 제2 분압 회로;를 포함하며,A second voltage divider circuit including a plurality of capacitors and dividing and outputting the voltage supplied from the power supply circuit;
    상기 제1 분압 회로의 출력단 및 상기 제2 분압 회로의 출력단은 직렬로 연결되어 상기 제1 분압 회로의 제1 출력 전압 및 상기 제2 분압 회로의 제2 출력 전압에 기초한 출력 전압을 제공하는, 디스플레이 장치.wherein an output end of the first voltage divider circuit and an output end of the second voltage divider circuit are connected in series to provide an output voltage based on a first output voltage of the first voltage divider circuit and a second output voltage of the second voltage divider circuit. Device.
  2. 제1항에 있어서,According to claim 1,
    상기 제1 분압 회로의 출력단 중 일단은,One end of the output terminal of the first voltage divider circuit,
    상기 제2 분압 회로의 출력단 중 일단에 연결되고,connected to one of the output terminals of the second voltage divider circuit;
    상기 제2 분압 회로의 출력단 중 타단은,The other end of the output end of the second voltage divider circuit,
    대지 접지에 연결된, 디스플레이 장치.A display device connected to earth ground.
  3. 제2항에 있어서,According to claim 2,
    일단이 상기 제2 분압 회로의 입력단에 연결된 제1 저항;a first resistor having one end connected to an input terminal of the second voltage divider circuit;
    일단이 상기 제1 저항의 타단에 연결되고, 타단이 상기 대지 접지에 연결된 제2 저항; 및a second resistor having one end connected to the other end of the first resistor and the other end connected to the earth ground; and
    상기 제2 저항의 일단의 전압에 기초하여 상기 전원 공급 회로의 출력을 제어하는 제1 피드백 회로;를 더 포함하는, 디스플레이 장치.A first feedback circuit for controlling an output of the power supply circuit based on the voltage of one end of the second resistor; further comprising a display device.
  4. 제3항에 있어서,According to claim 3,
    일단이 상기 제1 저항의 타단 및 상기 제2 저항의 일단에 연결된 제3 저항; 및a third resistor having one end connected to the other end of the first resistor and one end of the second resistor; and
    상기 제3 저항의 타단에 연결된 제1 트랜지스터;를 더 포함하고,A first transistor connected to the other end of the third resistor; further comprising,
    상기 제1 트랜지스터는,The first transistor,
    게이트를 통해 입력된 PWM(Pulse Width Modulation) 제어 신호의 듀티에 기초하여 상기 제2 저항의 일단의 전압을 변경하는, 디스플레이 장치.A display device that changes a voltage of one end of the second resistor based on a duty of a pulse width modulation (PWM) control signal input through a gate.
  5. 제2항에 있어서,According to claim 2,
    상기 제1 분압 회로의 출력단 중 타단은,The other end of the output end of the first voltage divider circuit,
    상기 대지 접지와 상이한 접지에 연결된, 디스플레이 장치.A display device connected to a ground different from the earth ground.
  6. 제5항에 있어서,According to claim 5,
    일단이 상기 제1 분압 회로의 입력단에 연결된 제4 저항;a fourth resistor having one end connected to an input terminal of the first voltage divider circuit;
    일단이 상기 제4 저항의 타단에 연결되고, 타단이 상기 대지 접지와 상이한 접지에 연결된 제5 저항; 및a fifth resistor having one end connected to the other end of the fourth resistor and the other end connected to a ground different from the earth ground; and
    상기 제5 저항의 일단의 전압에 기초하여 상기 전원 공급 회로의 출력을 제어하는 제2 피드백 회로;를 더 포함하는, 디스플레이 장치.A second feedback circuit for controlling an output of the power supply circuit based on the voltage of one end of the fifth resistor; further comprising a display device.
  7. 제6항에 있어서,According to claim 6,
    일단이 상기 제4 저항의 타단 및 상기 제5 저항의 일단에 연결된 제6 저항; 및a sixth resistor having one end connected to the other end of the fourth resistor and one end of the fifth resistor; and
    상기 제6 저항의 타단에 연결된 제2 트랜지스터;를 더 포함하고,A second transistor connected to the other end of the sixth resistor; further comprising,
    상기 제2 트랜지스터는,The second transistor,
    게이트를 통해 입력된 PWM 제어 신호의 듀티에 기초하여 상기 제5 저항의 일단의 전압을 변경하는, 디스플레이 장치.A display device that changes a voltage of one end of the fifth resistor based on a duty cycle of a PWM control signal input through a gate.
  8. 제1항에 있어서,According to claim 1,
    상기 제1 분압 회로는,The first voltage divider circuit,
    제1 PWM 신호 및 상기 제1 PWM 신호가 반전된 제2 PWM 신호에 기초하여 제어되고,Controlled based on a first PWM signal and a second PWM signal obtained by inverting the first PWM signal;
    상기 제2 분압 회로는,The second voltage divider circuit,
    상기 제1 PWM 신호와 기설정된 위상 차를 갖는 제3 PWM 신호 및 상기 제3 PWM 신호가 반전된 제4 PWM 신호에 기초하여 제어되는, 디스플레이 장치.A display device controlled based on a third PWM signal having a predetermined phase difference with the first PWM signal and a fourth PWM signal obtained by inverting the third PWM signal.
  9. 제8항에 있어서,According to claim 8,
    상기 제1 PWM 신호의 주기(T)는,The period (T) of the first PWM signal is
    상기 제3 PWM 신호의 주기와 동일하고,The same as the period of the third PWM signal,
    상기 기설정된 위상 차는,The preset phase difference is,
    -T/4 이상이고, T/4 이하인, 디스플레이 장치.-T/4 or more and T/4 or less, a display device.
  10. 제1항에 있어서,According to claim 1,
    상기 전원 공급 회로는,The power supply circuit,
    제1 서브 전원 공급 회로; 및a first sub power supply circuit; and
    제2 서브 전원 공급 회로;를 포함하며,A second sub power supply circuit; includes,
    상기 제1 분압 회로는,The first voltage divider circuit,
    상기 제1 서브 전원 공급 회로로부터 공급되는 전압을 분압하여 출력하고,Dividing and outputting a voltage supplied from the first sub power supply circuit;
    상기 제2 분압 회로는,The second voltage divider circuit,
    상기 제2 서브 전원 공급 회로로부터 공급되는 전압을 분압하여 출력하는, 디스플레이 장치.A display device that divides and outputs a voltage supplied from the second sub power supply circuit.
  11. 디스플레이 장치의 제어 방법에 있어서,In the control method of the display device,
    전원 공급 회로가 전압을 공급하는 단계;supplying a voltage by a power supply circuit;
    제1 분압 회로가 상기 전압을 분압하고, 상기 제1 분압 회로의 출력단과 출력단이 직렬로 연결된 제2 분압 회로가 상기 전압을 분압하는 단계; 및dividing the voltage by a first voltage divider circuit and dividing the voltage by a second voltage divider circuit having an output terminal connected in series to an output terminal of the first voltage divider circuit; and
    상기 제1 분압 회로의 제1 출력 전압 및 상기 제2 분압 회로의 제2 출력 전압에 기초한 출력 전압을 제공하는 단계;를 포함하는, 제어 방법.and providing an output voltage based on the first output voltage of the first voltage divider circuit and the second output voltage of the second voltage divider circuit.
  12. 제11항에 있어서,According to claim 11,
    상기 제1 분압 회로의 출력단 중 일단은,One end of the output terminal of the first voltage divider circuit,
    상기 제2 분압 회로의 출력단 중 일단에 연결되고,connected to one of the output terminals of the second voltage divider circuit;
    상기 제2 분압 회로의 출력단 중 타단은,The other end of the output end of the second voltage divider circuit,
    대지 접지에 연결된, 제어 방법.A control method connected to earth ground.
  13. 제12항에 있어서,According to claim 12,
    상기 디스플레이 장치는,The display device,
    일단이 상기 제2 분압 회로의 입력단에 연결된 제1 저항;a first resistor having one end connected to an input terminal of the second voltage divider circuit;
    일단이 상기 제1 저항의 타단에 연결되고, 타단이 상기 대지 접지에 연결된 제2 저항; 및a second resistor having one end connected to the other end of the first resistor and the other end connected to the earth ground; and
    제1 피드백 회로;를 더 포함하고,A first feedback circuit; further comprising,
    상기 제공하는 단계는,The step of providing,
    상기 제1 피드백 회로가 상기 제2 저항의 일단의 전압에 기초하여 상기 전원 공급 회로의 출력을 제어하는, 제어 방법.The control method, wherein the first feedback circuit controls the output of the power supply circuit based on the voltage at one end of the second resistor.
  14. 제13항에 있어서,According to claim 13,
    상기 디스플레이 장치는,The display device,
    일단이 상기 제1 저항의 타단 및 상기 제2 저항의 일단에 연결된 제3 저항; 및a third resistor having one end connected to the other end of the first resistor and one end of the second resistor; and
    상기 제3 저항의 타단에 연결된 제1 트랜지스터;를 더 포함하고,A first transistor connected to the other end of the third resistor; further comprising,
    상기 출력을 제어하는 단계는,The step of controlling the output is,
    상기 제1 트랜지스터의 게이트를 통해 입력된 PWM(Pulse Width Modulation) 제어 신호의 듀티에 기초하여 상기 제2 저항의 일단의 전압을 변경하는, 제어 방법.The control method of changing the voltage of one end of the second resistor based on the duty of a PWM (Pulse Width Modulation) control signal input through the gate of the first transistor.
  15. 제12항에 있어서,According to claim 12,
    상기 제1 분압 회로의 출력단 중 타단은,The other end of the output end of the first voltage divider circuit,
    상기 대지 접지와 상이한 접지에 연결된, 제어 방법.connected to a ground different from the earth ground.
PCT/KR2022/005733 2021-05-18 2022-04-21 Display device and control method therefor WO2022244998A1 (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010213368A (en) * 2009-03-06 2010-09-24 Seiko Epson Corp Dc-dc converter circuit, electro-optic device, and electronic device
KR20130046196A (en) * 2011-10-27 2013-05-07 삼성전자주식회사 Apparatus for supplying multi-ouput power and display apparatus using the apparatus for supplying multi-ouput power
KR20130046199A (en) * 2011-10-27 2013-05-07 삼성전자주식회사 Apparatus for supplying multi-ouput power and display apparatus using the apparatus for supplying multi-ouput power
KR20200083789A (en) * 2018-12-28 2020-07-09 한국자동차연구원 High-voltage direct current converters for automobiles
KR20210031215A (en) * 2019-09-11 2021-03-19 삼성전자주식회사 Electronic apparatus and control method thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010213368A (en) * 2009-03-06 2010-09-24 Seiko Epson Corp Dc-dc converter circuit, electro-optic device, and electronic device
KR20130046196A (en) * 2011-10-27 2013-05-07 삼성전자주식회사 Apparatus for supplying multi-ouput power and display apparatus using the apparatus for supplying multi-ouput power
KR20130046199A (en) * 2011-10-27 2013-05-07 삼성전자주식회사 Apparatus for supplying multi-ouput power and display apparatus using the apparatus for supplying multi-ouput power
KR20200083789A (en) * 2018-12-28 2020-07-09 한국자동차연구원 High-voltage direct current converters for automobiles
KR20210031215A (en) * 2019-09-11 2021-03-19 삼성전자주식회사 Electronic apparatus and control method thereof

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