WO2022242665A1 - 一种数据存储方法及相关装置 - Google Patents

一种数据存储方法及相关装置 Download PDF

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Publication number
WO2022242665A1
WO2022242665A1 PCT/CN2022/093465 CN2022093465W WO2022242665A1 WO 2022242665 A1 WO2022242665 A1 WO 2022242665A1 CN 2022093465 W CN2022093465 W CN 2022093465W WO 2022242665 A1 WO2022242665 A1 WO 2022242665A1
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Prior art keywords
memory
data
target
instruction
target data
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PCT/CN2022/093465
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English (en)
French (fr)
Inventor
方炜
缪勰
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华为技术有限公司
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Publication of WO2022242665A1 publication Critical patent/WO2022242665A1/zh

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2053Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant
    • G06F11/2089Redundant storage control functionality
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2053Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant
    • G06F11/2094Redundant storage or storage space

Definitions

  • the present application relates to the technical field of data processing, and in particular to a data storage method and a related device.
  • the server includes a primary storage device and a secondary storage device.
  • the primary storage device is abnormal, the data interaction service is migrated to the secondary storage device, so as to ensure that the data interaction service is not interrupted.
  • the portable terminal For portable terminals, such as smart phones or tablet computers, due to the limited cost and volume of the terminal, it is generally impossible to use a redundant backup method. Therefore, the portable terminal usually solves the abnormal problem of the storage device by triggering the reset of the storage device. However, triggering the reset of the storage device will perform a power-off reset on the storage device, resulting in the loss of data in the volatile memory in the storage device, thereby affecting the normal operation of the terminal.
  • An embodiment of the present application provides a data storage method.
  • the terminal When a terminal needs to write target data into an external memory, the terminal stores the target data in an internal memory. In this way, when the external memory is powered off and reset, the terminal can resend the target data backed up in the internal memory to the external memory, avoiding the problem of data loss caused by the external memory after power off and reset, and ensuring the normal operation of the terminal.
  • the first aspect of the present application provides a data storage method, which is applied to a terminal including an internal memory and an external memory.
  • the method includes: when the terminal needs to store the target data for a long time, the operating system in the terminal stores the target data in a first memory, and the first memory is an internal memory.
  • the target data is non-temporarily stored data. That is, the storage requirement of the target data is: after the terminal is powered off, the target data can still be stored in the terminal.
  • the terminal may include one or more internal memories, and the first memory may be any internal memory in the terminal. Internal memory is also called internal memory or main memory, and internal memory is usually used to temporarily store computing data in the processor.
  • the operating system sends a first instruction to the second memory, the first instruction includes the target data, and the first instruction is used to instruct the second memory to write the target data.
  • the second memory is an external memory for long-term data storage.
  • the second memory includes a volatile memory and a nonvolatile memory, the volatile memory is used to temporarily store the target data to be written into the nonvolatile memory, and the nonvolatile memory
  • the memory is used for long-term storage of the target data.
  • the data writing speed of the volatile memory is faster, but the volatile memory cannot save the data after power off.
  • the data writing speed of non-volatile memory is slow, but non-volatile memory can still retain data after power failure. Therefore, the process of writing the target data in the second memory includes: the second memory first writes the target data into the volatile memory, and then writes the target data in the volatile memory into the non-volatile memory. target address.
  • the volatile memory in the second memory By setting the volatile memory in the second memory, it can be ensured that the data issued by the operating system can be quickly written into the volatile memory, and then written from the volatile memory to the non-volatile memory, avoiding the When the data issued by the operating system is directly written into the non-volatile memory, the writing speed is too slow, which affects the normal delivery of data write commands by the operating system.
  • the operating system can restore the data in the second memory based on the target data in the first memory.
  • the terminal when the terminal needs to write the target data into the external memory, the terminal stores the target data in the internal memory. In this way, when the external memory is powered off and reset, the terminal can resend the target data backed up in the internal memory to the external memory, avoiding the problem of data loss caused by the external memory after power off and reset, and ensuring the normal operation of the terminal.
  • restoring the data in the second memory based on the target data in the first memory specifically includes: the operating system obtains the first A first message sent by the second memory, where the first message is used to indicate that the reset of the second memory is successful.
  • the operating system sends a second instruction to the second memory.
  • the second instruction is generated according to the target data in the first memory.
  • the operating system may obtain the target data in the first memory, and generate a second instruction according to the target data.
  • the second instruction includes the target data, and the second instruction is used to instruct the second memory to write the target data.
  • the second memory receives the second instruction, it writes the target data in the second instruction into the volatile memory, and then writes the target data from the volatile memory into the non-volatile memory. sexual memory.
  • the operating system re-sends the target data stored in the first memory to the second memory, which can effectively avoid the problem of data loss caused by the power-off and reset of the second memory, and ensure that the terminal of normal operation.
  • the method further includes: during the operation of the second memory, when the second memory fails to write data normally due to an abnormality in the second memory, the second memory sends a message to the operating system A second message, where the second message is used to indicate that an abnormality occurs in the second memory.
  • the operating system acquires a second message sent by the second memory, where the second message is used to indicate that an abnormality occurs in the second memory.
  • the operating system sends a third instruction to the second memory, where the third instruction is used to instruct the second memory to perform a reset operation.
  • the second memory After the second memory receives the third instruction indicating to execute the reset operation, the second memory executes the reset operation according to the third instruction, so as to eliminate the abnormality occurring in the second memory. After the second memory performs the reset operation, the data in the volatile memory of the second memory is lost due to power-off.
  • the method further includes: the operating system acquires a third message sent by the second memory.
  • the third message is a response message to the first instruction, and the third message is used to indicate that the target data has been written into the non-volatile memory.
  • the operating system deletes the target data in the first memory.
  • the terminal can delete the data stored in the first memory.
  • the stored target data so as to ensure that there is enough free storage space in the first memory.
  • the operating system storing the target data in the first memory includes: the operating system storing the target data in a target storage space in the first memory, where the target storage space is Pre-allocated storage space.
  • the target storage space is used for temporarily storing data to be written into the second memory.
  • the terminal divides a storage space of a specific capacity in the first memory, and designates the storage space as a target storage space for temporarily storing data to be written into the second memory. Since the target storage space is a storage space with a small capacity in the internal memory, the division of the target storage space in the internal memory by the terminal will not affect the normal storage of computing data of the processor in the internal memory.
  • the capacity of the target storage space is greater than or equal to the capacity of the volatile memory, so as to ensure that all data in the volatile memory of the second storage can be backed up in the target storage space middle.
  • the method further includes: an operating system sending a fourth instruction to the second memory, where the fourth instruction is used to query data stored in the volatile memory.
  • the operating system acquires a fourth message sent by the second memory, where the fourth message is used to indicate the first data stored in the volatile memory.
  • the operating system deletes the second data in the first memory. Wherein, both the second data and the first data are included in the target data, and the first data and the second data are different.
  • the terminal deletes the data that is no longer in the volatile memory from the first memory by querying the data still stored in the volatile memory of the second memory, so as to ensure that the first memory has enough free storage space.
  • the sending the fourth instruction to the second memory includes: if the second memory executes instructions in an out-of-order execution manner, and the data stored in the target storage space If the amount of data is greater than or equal to the preset threshold, the operating system sends the fourth instruction to the second memory.
  • the second memory does not process the instructions sequentially according to the order in which the instructions are received. That is to say, the second memory may process the instructions received later, so that the data received later is first written from the volatile memory to the non-volatile memory; for some instructions received earlier, The second memory may not be executed all the time, resulting in that the first received data is always stored in the volatile memory.
  • the operating system deletes part of the data in the target storage space by querying the data content stored in the volatile memory, which can well ensure that the volatile data can be completely stored in the target storage space of the first memory. data stored in volatile memory.
  • the method further includes: if the second memory executes instructions sequentially, and the amount of data stored in the target storage space is greater than or equal to a preset threshold, then The operating system deletes third data in the target storage space, where the third data is data first written into the target storage space in the target storage space.
  • the operating system deletes data that has been successfully written into the non-volatile memory in the target storage space based on a first-in-first-out approach, so as to ensure that there is sufficient free space in the target storage space.
  • a second aspect of the present application provides a terminal, including: a processing unit and a transceiver unit.
  • the processing unit is configured to store target data in a first memory, and the first memory is an internal memory;
  • the transceiver unit is configured to send a first instruction to a second memory, and the first instruction includes the target data, the first instruction is used to instruct the second memory to write the target data, the second memory is an external memory, the second memory includes a volatile memory and a non-volatile memory, the The volatile memory is used for temporarily storing the target data to be written into the non-volatile memory, and the non-volatile memory is used for storing the target data; the transceiver unit is also used for After the second memory is reset, restore the data in the second memory based on the target data in the first memory.
  • the transceiving unit is further configured to acquire a first message sent by the second memory, where the first message is used to indicate that the second memory is reset successfully; the transceiving unit, It is also used to send a second instruction to the second memory, the second instruction is generated according to the target data in the first memory, the second instruction includes the target data, and the second The instruction is used to instruct the second memory to write the target data.
  • the transceiving unit is further configured to acquire a second message sent by the second memory, where the second message is used to indicate that an abnormality occurs in the second memory; the transceiving unit, It is also used to send a third instruction to the second memory, where the third instruction is used to instruct the second memory to perform a reset operation.
  • the transceiver unit is further configured to acquire a third message sent by the second memory, where the third message is used to indicate that the target data has been written into the non-volatile permanent memory; the processing unit is further configured to delete the target data in the first memory.
  • the processing unit is further configured to store the target data in a target storage space in the first memory, where the target storage space is a pre-allocated storage space.
  • the capacity of the target storage space is greater than or equal to the capacity of the volatile memory.
  • the transceiving unit is further configured to send a fourth instruction to the second memory, where the fourth instruction is used to query data stored in the volatile memory; the The transceiver unit is further configured to acquire a fourth message sent by the second memory, the fourth message is used to indicate the first data stored in the volatile memory; the processing unit is further configured to delete the The second data in the first memory; wherein, both the second data and the first data are included in the target data, and the first data and the second data are different.
  • the transceiver unit is further configured to execute instructions in the second memory in an out-of-order execution manner, and the amount of data stored in the target storage space is greater than or equal to a preset threshold, then send the fourth instruction to the second memory.
  • the processing unit is further configured to: if the second memory executes instructions sequentially, and the amount of data stored in the target storage space is greater than or equal to a preset threshold , then delete the third data in the target storage space, where the third data is the first data written in the target storage space in the target storage space.
  • the third aspect of the present application provides a terminal, the terminal includes: an internal memory, an external memory, and a processor; the external memory stores codes, the processor is configured to execute the codes, and when the codes are executed , the terminal executes the method in any one implementation manner in the first aspect.
  • a fourth aspect of the present application provides a computer-readable storage medium, in which a computer program is stored, and when the computer program is run on a computer, the computer executes the method according to any one of the implementation manners in the first aspect.
  • the fifth aspect of the present application provides a computer program product, which, when running on a computer, causes the computer to execute the method in any one of the implementation manners in the first aspect.
  • a sixth aspect of the present application provides a chip, including one or more processors. Part or all of the processor is used to read and execute the computer program stored in the memory, so as to execute the method in any possible implementation manner of any aspect above.
  • the chip includes a memory, and the memory and the processor are connected to the memory through a circuit or wires.
  • the chip further includes a communication interface, and the processor is connected to the communication interface.
  • the communication interface is used to receive data and/or information to be processed, and the processor obtains the data and/or information from the communication interface, processes the data and/or information, and outputs the processing result through the communication interface.
  • the communication interface may be an input-output interface.
  • FIG. 1 is a schematic structural diagram of a storage device provided in an embodiment of the present application.
  • FIG. 2 is a schematic structural diagram of a terminal 101 provided in an embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of an application scenario provided by an embodiment of the present application.
  • FIG. 4 is a schematic flow diagram of a data storage method 400 provided in an embodiment of the present application.
  • FIG. 5 is another schematic flowchart of a data storage method 400 provided by an embodiment of the present application.
  • FIG. 6 is a schematic diagram of the application architecture of the data storage method provided by the embodiment of the present application.
  • FIG. 7 is a schematic flow diagram of a data storage method 700 provided in an embodiment of the present application.
  • FIG. 8 is a schematic structural diagram of a terminal 800 provided in an embodiment of the present application.
  • FIG. 9 is a schematic structural diagram of a computer-readable storage medium 900 provided by an embodiment of the present application.
  • the server includes a primary storage device and a secondary storage device.
  • the primary storage device is abnormal, the data interaction service is migrated to the secondary storage device, so as to ensure that the data interaction service is not interrupted.
  • the portable terminal For portable terminals, such as smart phones or tablet computers, due to the limited cost and volume of the terminal, it is generally impossible to use a redundant backup method. Therefore, the portable terminal usually solves the abnormal problem of the storage device by triggering the reset of the storage device. However, triggering the reset of the storage device will perform a power-off reset on the storage device, resulting in the loss of data in the volatile memory in the storage device, thereby affecting the normal operation of the terminal.
  • FIG. 1 is a schematic structural diagram of a storage device provided in an embodiment of the present application.
  • the operating system in the terminal performs data interaction with the storage device through a drive component.
  • Storage devices include volatile memory and nonvolatile memory.
  • the data writing speed of volatile memory is faster, but volatile memory cannot save data after power failure.
  • the data writing speed of non-volatile memory is slow, but non-volatile memory can still retain data after power failure. Therefore, when the operating system in the terminal writes data to the storage device, the data is first written into the volatile memory of the storage device, and then written from the volatile memory to the non-volatile memory.
  • the operating system triggers a power-off reset of the storage device, and the data in the volatile memory of the storage device is lost. Since the data in the volatile memory has not yet been written into the non-volatile memory, and the data in the volatile memory is lost after the power is turned off, part of the data written into the storage device by the operating system is lost. In the case that the data lost in the volatile memory is critical data, it may cause damage to the file system of the terminal and affect the normal operation of the terminal.
  • an embodiment of the present application provides a data storage method, which can be applied to a terminal.
  • the terminal needs to write the target data into the external memory
  • the terminal stores the target data in the internal memory.
  • the terminal can resend the target data backed up in the internal memory to the external memory, avoiding the problem of data loss caused by the external memory after power off and reset, and ensuring the normal operation of the terminal.
  • the terminal involved in this embodiment of the present application may be a terminal having an internal memory and an external memory.
  • the terminal may be, for example, a personal computer (personal computer, PC), a notebook computer, a server, a mobile phone (mobile phone), a tablet computer, a mobile internet device (mobile internet device, MID), a wearable device, a virtual reality ( virtual reality (VR) equipment, augmented reality (augmented reality, AR) equipment, wireless terminals in industrial control (industrial control), wireless terminals in self driving (self driving), wireless in remote surgery (remote medical surgery) Terminals, wireless terminals in smart grid, wireless terminals in transportation safety, wireless terminals in smart city, wireless terminals in smart home, etc.
  • the terminal can be a device running Android system, IOS system, windows system and other systems.
  • the data storage method provided in the embodiment of the present application will be introduced below by taking the terminal as an example of a smart phone.
  • FIG. 2 is a schematic structural diagram of a terminal 101 provided in an embodiment of the present application.
  • the terminal 101 includes a processor 103 , and the processor 103 is coupled to a system bus 105 .
  • the processor 103 may be one or more processors, each of which may include one or more processor cores.
  • a display adapter (video adapter) 107 which can drive a display 109, and the display 109 is coupled to the system bus 105.
  • the system bus 105 is coupled to an input-output (I/O) bus through a bus bridge 111 .
  • the I/O interface 115 is coupled to the I/O bus.
  • the I/O interface 115 communicates with various I/O devices, such as an input device 117 (such as a touch screen, etc.), an external memory 121, (such as a hard disk, a floppy disk, a CD or a flash drive), a multimedia interface, etc.).
  • Transceiver 123 (which can send and/or receive radio communication signals), camera 155 (which can capture still and moving digital video images) and external USB port 125 .
  • the interface connected to the I/O interface 115 may be a USB interface.
  • the processor 103 may be any conventional processor, including a reduced instruction set computing (reduced instruction set computing, RISC) processor, a complex instruction set computing (complex instruction set computing, CISC) processor or a combination of the above.
  • the processor may be a special purpose device such as an ASIC.
  • the terminal 101 can communicate with the software deployment server 149 through the network interface 129 .
  • the network interface 129 is a hardware network interface, such as a network card.
  • the network 127 may be an external network, such as the Internet, or an internal network, such as Ethernet or a virtual private network (virtual private network, VPN).
  • the network 127 may also be a wireless network, such as a WiFi network, a cellular network, and the like.
  • Hard disk drive interface 131 is coupled to system bus 105 .
  • the hardware driver interface is connected to the hard disk drive 133 .
  • Internal memory 135 is coupled to system bus 105 .
  • Data running on the internal memory 135 may include an operating system (OS) 137 of the terminal 101, application programs 143, and a scheduler.
  • OS operating system
  • the operating system includes a Shell 139 and a kernel (kernel) 141.
  • Shell 139 is an interface between the user and the kernel of the operating system.
  • the shell is the outermost layer of the operating system. The shell manages the interaction between the user and the operating system: waiting for user input, interpreting user input to the operating system, and processing various operating system output.
  • Kernel 141 consists of those parts of the operating system that manage memory, files, peripherals, and system resources.
  • the kernel 141 directly interacts with the hardware.
  • the operating system kernel usually runs processes, and provides inter-process communication, CPU time slice management, interrupt, memory management, IO management, and the like.
  • the application program 143 includes programs related to instant messaging.
  • the terminal 101 can download the application program 143 from the software deployment server 149 .
  • FIG. 3 is a schematic diagram of an application scenario provided by an embodiment of the present application.
  • the software in the terminal runs in the user state and the operating system respectively
  • the hardware in the terminal is a storage device.
  • the application program runs in the user mode
  • the driver components of the file system (file system, FS), block layer (BLOCK Layer) and storage device run in the operating system.
  • the file system is a software mechanism responsible for managing and storing file information in the operating system, and the file system is also called a file management system.
  • a file system is a system that organizes and allocates the space of a file storage device, is responsible for file storage, and protects and retrieves stored files. Specifically, it is responsible for creating files for users, storing, reading, modifying, and dumping files, controlling file access, and revoking files when users no longer use them.
  • the block layer is the interface for the file system to access storage devices, and it is the bridge connecting the file system and drive components.
  • Driver components are special programs added to the operating system.
  • the driver component contains information about the hardware device, and is used to realize the communication between the software in the terminal and the storage device.
  • the application program when an application program in the user mode needs to read data in the storage device or write data to the storage device, the application program sends a data read request or a data write request to the file system.
  • the file system sends a corresponding data processing request to the block layer according to the obtained data read request or data write request.
  • the block layer generates the corresponding IO request according to the issued data processing request, and sends it to the driver component.
  • the drive component communicates with the storage device according to the received IO request, so as to realize data reading or writing.
  • FIG. 4 is a schematic flowchart of a data storage method 400 provided in an embodiment of the present application. As shown in FIG. 4, the method 400 includes the following steps 401-407.
  • Step 401 the operating system stores target data into a first memory, and the first memory is an internal memory.
  • the operating system in the terminal can store the target data in the first memory as the internal memory, so as to realize the backup of the target data.
  • the target data is non-temporarily stored data. That is, the storage requirement of the target data is: after the terminal is powered off, the target data can still be stored in the terminal.
  • the terminal may include one or more internal memories, and the first memory may be any internal memory in the terminal.
  • Internal memory is also called internal memory or main memory, and internal memory is usually used to temporarily store computing data in the processor.
  • the internal memory is the bridge between the external memory and the processor, and all programs in the terminal run in the memory.
  • the internal storage may be a storage device such as a memory stick.
  • the internal memory may be a storage device such as a running memory.
  • Step 402 the operating system sends a first instruction to the second memory, the first instruction includes the target data, and the first instruction is used to instruct the second memory to write the target data.
  • the operating system After acquiring the target data to be written into the second memory, the operating system generates a first instruction according to the target data, and sends the first instruction to the second memory through the driving component.
  • the first instruction includes the target data and a target address, and the first instruction is used to instruct the second memory to write the target data into the target address.
  • the operating system may execute step 401 and step 402 serially, that is, the operating system first executes step 401 and then executes step 402; the operating system may also execute step 401 and step 402 in parallel. This is not specifically limited.
  • the second memory is an external memory for long-term data storage.
  • the terminal may include one or more external storages, and the second storage may be any external storage in the terminal.
  • the external memory refers to the memory in the terminal other than the internal memory and processor cache.
  • the external storage may be a storage device such as a hard disk, a floppy disk, an optical disk, or a USB flash disk.
  • the external memory may be a storage device such as a built-in memory or an SD card.
  • the first memory may be an 8 gigabyte (GB) running memory in a smart phone
  • the second memory may be a built-in memory in a smart phone with a capacity of 256 GB.
  • the second memory includes a volatile memory and a nonvolatile memory, the volatile memory is used to temporarily store the target data to be written into the nonvolatile memory, and the nonvolatile memory
  • the memory is used for long-term storage of the target data.
  • the data writing speed of the volatile memory is faster, but the volatile memory cannot save the data after power off.
  • the data writing speed of non-volatile memory is slow, but non-volatile memory can still retain data after power failure. Therefore, the process of writing the target data in the second memory includes: the second memory first writes the target data into the volatile memory, and then writes the target data in the volatile memory into the non-volatile memory. target address.
  • the first instruction is used to instruct to write target data with a size of 4 bytes (kB) into address segments 0-3.
  • the second memory first writes the 4kB target data into the volatile memory according to the first instruction, and then writes the target data stored in the volatile memory into the address segment 0- 3 in.
  • the volatile memory may be a static random-access memory (Static Random-Access Memory, SRAM) or a dynamic random-access memory (Dynamic Random-Access Memory, DRAM).
  • SRAM static random-access memory
  • DRAM dynamic random-access memory
  • the non-volatile memory can be Universal Flash Storage (UFS), embedded multimedia card (Embedded Multi Media Card, eMMC) or non-volatile high-speed transmission bus (Non-Volatile Memory express, NVMe)
  • Step 403 the operating system acquires a second message sent by the second memory, where the second message is used to indicate that the second memory is abnormal.
  • the second memory when the second memory fails to write data normally due to an abnormality in the second memory, the second memory sends a second message to the operating system, and the second message is used to indicate that the second memory Abnormal.
  • the reasons for the abnormality of the second storage include but not limited to factors such as unstable transmission link, abnormality of the internal controller of the second storage, or abnormality of the storage medium.
  • Step 404 the operating system sends a third instruction to the second memory, where the third instruction is used to instruct the second memory to perform a reset operation.
  • the operating system After obtaining the second message reported by the second memory, the operating system sets the state of the second memory as abnormal, so as to block the data read request and data write request submitted by the application program. That is, the operating system interrupts sending an instruction to write data or an instruction to read data to the second memory. Then, the operating system sends a third instruction for instructing the second memory to perform a reset operation to the second memory.
  • the second memory After the second memory receives the third instruction indicating to execute the reset operation, the second memory executes the reset operation according to the third instruction, so as to eliminate the abnormality occurring in the second memory. After the second memory performs the reset operation, the data in the volatile memory of the second memory is lost due to power-off.
  • Step 405 the operating system obtains the first message sent by the second memory.
  • the second memory After the second memory successfully executes the reset operation, the second memory sends the first message to the operating system.
  • the first message is used to indicate that the reset of the second memory is successful.
  • the operating system can confirm that the second memory has returned to normal.
  • Step 406 the operating system sends a second instruction to the second memory.
  • the second instruction sent by the operating system to the second memory is generated according to the target data in the first memory.
  • the operating system may acquire the target data in the first memory, and generate the second instruction according to the target data.
  • the second instruction includes the target data, and the second instruction is used to instruct the second memory to write the target data.
  • Step 407 the second memory writes the target data according to the second instruction.
  • the second memory after the second memory receives the second instruction, it writes the target data in the second instruction into the volatile memory, and then writes the target data from the volatile memory into the non-volatile memory. sexual memory.
  • the second instruction includes the target address where the target data needs to be written. Therefore, after the second memory acquires the second instruction, it will rewrite the target data to the target address. That is to say, even if the second memory has written the target data into the non-volatile memory before performing the reset operation, the second memory only re-covers the target data on the target address without The problem of data disorder occurs.
  • the operating system resends the target data stored in the first memory to the second memory, which can effectively avoid the problem of data loss caused by power-off and reset of the second memory, and ensure normal operation of the terminal.
  • the terminal may pre-allocate a target storage space in the first memory, and the target storage space is used for temporarily storing data to be written into the second memory.
  • the terminal divides a storage space of a specific capacity in the first memory, and designates the storage space as a target storage space for temporarily storing data to be written into the second memory. Since the target storage space is a storage space with a small capacity in the internal memory, the division of the target storage space in the internal memory by the terminal will not affect the normal storage of computing data of the processor in the internal memory.
  • the operation data to be written into the second memory and the processor can be effectively isolated, ensuring the independence of data .
  • the capacity of the target storage space allocated by the terminal in the first storage is greater than or equal to the capacity of the volatile storage of the second storage, so as to ensure that all data in the volatile storage of the second storage can be backed up in the target storage space middle.
  • the capacity of the target storage space in the first memory may be 1MB, 2MB or 10MB.
  • the operating system when the operating system obtains the target data to be written into the second memory, the operating system may store the target data in the target storage space of the first memory.
  • the terminal can delete all data stored in the first memory.
  • the stored target data so as to ensure that there is enough free storage space in the first storage.
  • the terminal may delete data in the first memory in various ways.
  • the terminal deletes the data in the first memory according to the message that the command has been completed fed back by the second memory.
  • the method 400 may further include: the operating system acquires a third message sent by the second memory.
  • the third message is a response message to the first instruction, and the third message is used to indicate that the target data has been written into the non-volatile memory.
  • the operating system deletes the target data in the first memory.
  • the second memory After the second memory completes the first instruction issued by the operating system (that is, the task of writing the target data into the non-volatile memory), the second memory returns a third message to the operating system to indicate The second memory has finished writing the target data.
  • the operating system may delete the target data in the first memory according to the third message.
  • the terminal queries the data still stored in the volatile memory of the second memory, so as to delete the data no longer in the volatile memory from the first memory.
  • FIG. 5 is another schematic flowchart of a data storage method 400 provided in an embodiment of the present application. As shown in FIG. 5, the method 400 further includes the following steps 408-410.
  • Step 408 the operating system sends a fourth instruction to the second memory, where the fourth instruction is used to query data stored in the volatile memory.
  • the operating system may periodically send an instruction to query data in the volatile memory to the second memory. For example, the operating system sends an instruction for querying data in the volatile memory to the second memory every 1 ms.
  • the operating system may also send an instruction to query the data in the volatile memory to the second memory when the target storage space for storing the data to be written in the first memory is about to be saturated. For example, when the amount of data stored in the target storage space in the first memory is greater than or equal to a preset threshold, the operating system sends the fourth instruction to the second memory.
  • the preset threshold may be determined according to the capacity of the target storage space and the capacity of the volatile memory in the second memory. For example, in a case where the capacity of the target storage space is 10 MB and the capacity of the volatile memory in the second memory is 1 MB, the preset threshold may be set to 9 MB.
  • the operating system can delete at least 8MB of data in the target storage space.
  • the preset threshold is 9MB, there is still 1MB of free space left in the target storage space, and the capacity of the free space is the same as the capacity of the volatile memory. In this way, the operating system can ensure that there is enough free space in the target storage space to store subsequent data before deleting other data in the target storage space.
  • Step 409 the operating system acquires the fourth message sent by the second memory.
  • the second memory After the second memory receives the fourth instruction issued by the operating system, the second memory generates a fourth message according to the data stored in the volatile memory, and sends the fourth message to the operating system, and the fourth The message is used to indicate the first data stored in the volatile memory. For example, the fourth message indicates that the first data stored in the volatile memory is data to be written into the address segment 10-19.
  • Step 410 the operating system deletes the second data in the first memory.
  • both the second data and the first data are included in the target data, and the first data and the second data are different.
  • the second data is data that has been written from the volatile memory to the non-volatile memory in the target data.
  • the target data stored in the first memory is the data to be written into the address segment 0-19
  • the first data is the data to be written into the address segment 10-19
  • the second data is the data to be written into the address segment
  • the data of segment 0-9 the second data has been written from the volatile memory to the non-volatile memory. Therefore, the operating system can delete the second data to be written into address segments 0-9 according to the fourth message. That is to say, the operating system can delete the data that is no longer in the volatile memory from the first memory according to the fourth message.
  • the operating system may delete part of the data in the target storage space through the second method when the second memory executes instructions in an out-of-order manner.
  • the second memory does not process the instructions sequentially according to the order in which the instructions are received. That is to say, the second memory may process the instructions received later, so that the data received later is first written from the volatile memory to the non-volatile memory; for some instructions received earlier, The second memory may not be executed all the time, resulting in that the first received data is always stored in the volatile memory.
  • the operating system deletes part of the data in the target storage space through the second method, which can well ensure that the data stored in the volatile memory can be completely stored in the target storage space of the first storage.
  • the operating system may also delete part of the data in the target storage space through the second method.
  • the second memory processes the instructions sequentially according to the order in which the instructions are received. That is, the data received first by the second memory will be written into the non-volatile memory first, and the data received later by the second memory will be written into the non-volatile memory later.
  • the terminal deletes the data firstly written into the target storage space.
  • the operating system in the terminal deletes the target storage space The third data in the target storage space, where the third data is the data firstly written in the target storage space.
  • the operating system can delete some data in the target storage space, so as to ensure that after deleting some data in the target storage space, the remaining data in the target storage space
  • the data volume of the data is greater than or equal to the capacity of the volatile memory. That is, after the operating system deletes the third data in the target storage space, the amount of remaining data in the target storage space is greater than or equal to the capacity of the volatile memory.
  • the capacity of the target storage space is 10MB and the capacity of the volatile memory is 1MB
  • the operating system can delete the first written data in the target storage space when 9MB of data has been stored in the target storage space. 8MB data. In this way, after the operating system deletes 8MB of data, 1MB of data remains in the target storage space, which ensures that all the data stored in the volatile memory is still stored in the target storage space.
  • the operating system deletes data that has been successfully written into the non-volatile memory in the target storage space based on a first-in-first-out approach, so as to ensure that there is enough free space in the target storage space.
  • the way the second memory in the terminal executes instructions is usually fixed, and only when the firmware of the terminal is upgraded, the way the second memory executes instructions changes. Moreover, the firmware upgrade of the terminal often needs to be restarted. Therefore, in practical applications, the terminal may acquire the manner in which the second memory executes instructions after startup, and select the manner in which data in the first memory is deleted according to the manner in which the second memory executes instructions. For example, when the second memory executes instructions in order, the terminal deletes the data in the first memory based on the third method above; when the second memory executes instructions out of order, the terminal deletes the data in the first memory based on the above method The second way is to delete the data in the first memory.
  • FIG. 6 is a schematic diagram of an application architecture of the data storage method provided by the embodiment of the present application.
  • the operating system of the terminal includes a file system, a block layer, a target storage space in the first memory, a data recovery module, an exception handling module, and a driver component (not shown in the figure); the device layer of the terminal includes Second storage.
  • the drive component is used to transmit interaction information between the operating system and the second memory.
  • the process of the driver component transmitting the interaction information between the modules in the operating system and the second storage is omitted, and the interaction between the modules in the operating system and the second storage is directly described.
  • the block layer when data needs to be written into the second memory, the block layer sends a data write instruction including target data to the second memory, and stores the target data into the target storage space.
  • the second memory reports a message indicating that the second memory has an exception to the exception handling module.
  • the exception handling module triggers the reset of the second memory, and notifies the data recovery module of the successful reset of the second memory after the second memory is successfully reset.
  • the data recovery module takes out the target data from the target storage space, and resends the target data to the second storage.
  • FIG. 7 is a schematic flowchart of a data storage method 700 provided in an embodiment of the present application.
  • the method 700 includes the following steps 701-710.
  • Step 701 the block layer stores the target data in the target storage space of the first memory.
  • the block layer After the block layer obtains the data write request issued by the file system, the block layer stores the target data indicated in the data write request in the target storage space of the first memory, so as to realize the backup of the target data.
  • Step 702 the block layer sends the first instruction including the target data to the second memory.
  • the block layer After storing the target data in the target storage space, the block layer generates a first instruction according to the target data, and sends the first instruction to the second memory through the driving component.
  • the first instruction includes target data and a target address, and the first instruction is used to instruct the second memory to write the target data into the target address in the non-volatile memory.
  • Step 703 the second memory sends a second message indicating that an exception occurs to the exception handling module.
  • an abnormality occurs in the second memory, which causes the second memory to fail to write the target data normally.
  • the second memory sends a second message to the exception handling module, and the second message indicates that an exception occurs in the second memory.
  • Step 704 the exception handling module sends a third instruction for executing a reset operation to the second memory.
  • the exception handling module After obtaining the second message reported by the second memory, the exception handling module sets the state of the second memory as abnormal, so as to block the data read request and data write request submitted by the application program. Then, the exception handling module sends a third instruction for instructing the second memory to perform a reset operation to the second memory.
  • Step 705 the second memory performs a reset operation.
  • the second memory executes a reset operation according to the received third instruction, so as to eliminate the abnormality occurring in the second memory.
  • Step 706 the second memory sends a first message indicating that the reset is successful to the exception handling module.
  • the second memory After executing the reset operation, the second memory sends a first message to the exception handling module, where the first message is used to indicate that the second memory has been successfully reset.
  • Step 707 the exception handling module sends a message indicating to perform data recovery to the data recovery module.
  • the exception processing module After the exception processing module obtains the first message, the exception processing module sends a message to the data recovery module to notify the data recovery module to perform data recovery.
  • Step 708 the data recovery module generates a second instruction according to the target data.
  • the data recovery module Based on the message sent by the exception handling module for instructing to perform data recovery, the data recovery module acquires target data in the target storage space, and generates a second instruction according to the target data.
  • the second instruction includes the target data, and the second instruction is used to instruct the second memory to write the target data.
  • Step 709 the data recovery module sends the second instruction including the target data to the second memory.
  • Step 710 the second memory writes target data according to the second instruction.
  • the second memory After obtaining the second instruction, the second memory rewrites the target data into the volatile memory according to the target data in the second instruction, and then writes the target data from the volatile memory into the non-volatile memory volatile memory.
  • the second memory may return a message indicating that the target data is successfully written to the data recovery module.
  • the data recovery module can notify the exception handling module that data recovery has been successfully performed.
  • the exception handling module sets the state of the second memory to be normal, so that the block layer continues to process the data read request and data write request submitted by the application program.
  • FIG. 8 is a schematic structural diagram of a terminal 800 provided in an embodiment of the present application.
  • the terminal 800 includes: a processing unit 801 and a transceiver unit 802 .
  • the processing unit 801 is configured to store target data in a first memory, and the first memory is an internal memory;
  • the transceiver unit 802 is configured to send a first instruction to a second memory, and the first instruction includes the The target data, the first instruction is used to instruct the second memory to write the target data, the second memory is an external memory, the second memory includes a volatile memory and a non-volatile memory,
  • the volatile memory is used to temporarily store the target data to be written into the non-volatile memory, and the non-volatile memory is used to store the target data;
  • the transceiver unit 802 also uses After the second memory is reset, data in the second memory is restored based on the target data in the first memory.
  • the transceiving unit 802 is further configured to obtain a first message sent by the second memory, where the first message is used to indicate that the reset of the second memory is successful; the transceiving unit 802, further configured to send a second instruction to the second memory, the second instruction is generated according to the target data in the first memory, the second instruction includes the target data, the The second instruction is used to instruct the second memory to write the target data.
  • the transceiving unit 802 is further configured to obtain a second message sent by the second memory, where the second message is used to indicate that an abnormality occurs in the second memory; the transceiving unit 802. Further, send a third instruction to the second memory, where the third instruction is used to instruct the second memory to perform a reset operation.
  • the transceiving unit 802 is further configured to acquire a third message sent by the second memory, where the third message is used to indicate that the target data has been written into the non-volatile A volatile memory: the processing unit 801 is further configured to delete the target data in the first memory.
  • the processing unit 801 is further configured to store the target data in a target storage space in the first memory, where the target storage space is a pre-allocated storage space.
  • the capacity of the target storage space is greater than or equal to the capacity of the volatile memory.
  • the transceiving unit 802 is further configured to send a fourth instruction to the second memory, where the fourth instruction is used to query data stored in the volatile memory;
  • the transceiving unit 802 is further configured to acquire a fourth message sent by the second memory, the fourth message is used to indicate the first data stored in the volatile memory;
  • the processing unit 801 is further configured to Then delete the second data in the first memory; wherein, both the second data and the first data are included in the target data, and the first data and the second data are different.
  • the transceiver unit 802 is further configured to execute instructions in the second memory in an out-of-order execution manner, and the amount of data stored in the target storage space is greater than or equal to the predetermined If the threshold is set, the fourth instruction is sent to the second memory.
  • the processing unit 801 is further configured to: if the second memory executes instructions sequentially, and the amount of data stored in the target storage space is greater than or equal to the preset threshold, then delete the third data in the target storage space, where the third data is the data first written in the target storage space in the target storage space.
  • the data storage method provided by the embodiment of the present application can be specifically executed by a chip in the terminal, and the chip includes: a processing unit and a communication unit.
  • the processing unit can be, for example, a processor, and the communication unit can be, for example, an input/output interface, a pin or circuit etc.
  • the processing unit may execute the computer-executed instructions stored in the storage unit, so that the chip in the server executes the data storage method described in the embodiments shown in FIGS. 1 to 7 above.
  • the storage unit is a storage unit in the chip, such as a register, a cache, etc.
  • the storage unit can also be a storage unit located outside the chip in the wireless access device end, such as a read-only memory (read-only memory, ROM) Or other types of static storage devices that can store static information and instructions, random access memory (random access memory, RAM), etc.
  • ROM read-only memory
  • RAM random access memory
  • the present application also provides a computer-readable storage medium.
  • the method disclosed in FIG. Computer program instructions on other non-transitory media or articles of manufacture.
  • Figure 9 schematically illustrates a conceptual partial view of an example computer-readable storage medium comprising a computer program for executing a computer process on a computing device, arranged in accordance with at least some embodiments presented herein.
  • computer readable storage medium 900 is provided using signal bearing medium 901 .
  • the signal-bearing medium 901 may include one or more program instructions 902 that, when executed by one or more processors, may provide the functions or portions of the functions described above with respect to FIG. 2 .
  • program instructions 902 in FIG. 9 also describe example instructions.
  • signal bearing media 901 may include computer readable media 903 such as, but not limited to, a hard drive, compact disc (CD), digital video disc (DVD), digital tape, memory, ROM or RAM, and the like.
  • computer readable media 903 such as, but not limited to, a hard drive, compact disc (CD), digital video disc (DVD), digital tape, memory, ROM or RAM, and the like.
  • signal bearing media 901 may comprise computer recordable media 904 such as, but not limited to, memory, read/write (R/W) CDs, R/W DVDs, and the like.
  • signal bearing media 901 may include communication media 905, such as, but not limited to, digital and/or analog communication media (eg, fiber optic cables, waveguides, wired communication links, wireless communication links, etc.).
  • signal bearing medium 901 may be conveyed by a wireless form of communication medium 905 (eg, a wireless communication medium that complies with the IEEE 802.9 standard or other transmission protocol).
  • One or more program instructions 902 may be, for example, computer-executable instructions or logic-implemented instructions.
  • the computing device may be configured to respond to program instructions 902 communicated to the computing device via one or more of computer-readable media 903 , computer-recordable media 904 , and/or communication media 905 , providing various operations, functions, or actions.
  • the disclosed system, device and method can be implemented in other ways.
  • the device embodiments described above are only illustrative.
  • the division of the units is only a logical function division. In actual implementation, there may be other division methods.
  • multiple units or components can be combined or May be integrated into another system, or some features may be ignored, or not implemented.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection of devices or units may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, each unit may exist separately physically, or two or more units may be integrated into one unit.
  • the above-mentioned integrated units can be implemented in the form of hardware or in the form of software functional units.
  • the integrated unit is realized in the form of a software function unit and sold or used as an independent product, it can be stored in a computer-readable storage medium.
  • the technical solution of the present application is essentially or part of the contribution to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium , including several instructions to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the methods described in the various embodiments of the present application.
  • the aforementioned storage medium includes: various media capable of storing program codes such as U disk, mobile hard disk, read-only memory, random access memory, magnetic disk or optical disk.

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Abstract

本申请公开了一种数据存储方法,该方法应用于包括有内存储器和外存储器的终端中。该方法包括:终端将目标数据存储至第一存储器,第一存储器为内存储器;终端向第二存储器发送第一指令,第一指令包括目标数据,第一指令用于指示所述第二存储器写入目标数据,第二存储器为外存储器,第二存储器包括易失性存储器和非易失性存储器;在所述第二存储器复位后,终端基于所述第一存储器中的所述目标数据恢复所述第二存储器中的数据。通过本方案,在外存储器下电复位时,终端能够将备份于内存储器中的目标数据重新发送给外存储器,避免了外存储器下电复位后所引起的数据丢失的问题,保证了终端的正常运行。

Description

一种数据存储方法及相关装置
本申请要求于2021年5月21日提交中国专利局、申请号为202110560361.1、发明名称为“一种数据存储方法及相关装置”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请涉及数据处理技术领域,尤其涉及一种数据存储方法及相关装置。
背景技术
在数据存储领域中,在存储设备的运行过程中,传输链路不稳定、存储设备的内部控制器异常或者存储介质异常等因素可能会导致存储设备无法正常运行。在存储设备无法正常运行的情况下,终端的操作系统与存储设备之间无法进行数据交互,进而影响终端的正常运行。
在服务器领域,一般能够通过冗余备份方法来解决存储设备无法正常运行的问题。服务器中包括主存储设备和从存储设备,在主存储设备异常后,则将数据交互业务迁移到从存储设备,从而保障数据交互业务不中断。
对于便携终端,例如智能手机或平板电脑等终端,由于成本及终端体积受限,通常无法使用冗余备份方法。因此,便携终端通常是通过触发存储设备复位来解决存储设备异常的问题。然而,触发存储设备复位会对存储设备进行下电复位,导致存储设备内的易失性存储器的数据丢失,进而影响终端的正常运行。
发明内容
本申请实施例提供了一种数据存储方法,终端在需要向外存储器写入目标数据的情况下,终端将目标数据存储于内存储器中。这样,在外存储器下电复位时,终端能够将备份于内存储器中的目标数据重新发送给外存储器,避免了外存储器下电复位后所引起的数据丢失的问题,保证了终端的正常运行。
本申请第一方面提供一种数据存储方法,该方法应用于包括有内存储器和外存储器的终端中。该方法包括:在终端需要长期存储目标数据的情况下,终端中的操作系统将目标数据存储至第一存储器,所述第一存储器为内存储器。其中,目标数据为非临时性存储的数据。即目标数据的存储要求为:终端断电后,目标数据仍能够存储于终端中。终端可以包括一个或多个内存储器,所述第一存储器可以为终端中的任意一个内存储器。内存储器也称为内存或主存,内存储器通常用于临时存放处理器中的运算数据。
操作系统向第二存储器发送第一指令,所述第一指令包括所述目标数据,所述第一指令用于指示所述第二存储器写入所述目标数据。其中,所述第二存储器为外存储器,用于长期存储数据。
所述第二存储器包括易失性存储器和非易失性存储器,所述易失性存储器用于临时存储待写入至所述非易失性存储器的所述目标数据,所述非易失性存储器用于长期存储所述目标数据。其中,易失性存储器的数据写入速度较快,但是易失性存储器在断电后无法保 存数据。非易失性存储器的数据写入速度较慢,但是非易失性存储器在断电后仍然能保存数据。因此,第二存储器写入目标数据的过程包括:第二存储器先将目标数据写入到易失性存储器中,然后再将易失性存储器中的目标数据写入到非易失性存储器中的目标地址。通过在第二存储器中设置易失性存储器,可以保证操作系统下发的数据能够快速地写入至易失性存储器中,然后再从易失性存储器中写入非易失性存储器,避免了操作系统下发的数据直接写入非易失性存储器时由于写入速度过慢而影响操作系统正常下发数据写入指令。
在所述第二存储器复位后,所述第二存储器中的易失性存储器所存储的数据丢失,操作系统可以基于所述第一存储器中的目标数据恢复所述第二存储器中的数据。
本实施例中,终端在需要向外存储器写入目标数据的情况下,终端将目标数据存储于内存储器中。这样,在外存储器下电复位时,终端能够将备份于内存储器中的目标数据重新发送给外存储器,避免了外存储器下电复位后所引起的数据丢失的问题,保证了终端的正常运行。
在一种可能的实现方式中,所述在所述第二存储器复位后,基于所述第一存储器中的所述目标数据恢复所述第二存储器中的数据具体包括:操作系统获取所述第二存储器发送的第一消息,所述第一消息用于指示所述第二存储器复位成功。操作系统向所述第二存储器发送第二指令。其中,所述第二指令是根据所述第一存储器中的所述目标数据生成的。操作系统在确认第二存储器复位成功后,可以获取第一存储器中的目标数据,并且根据所述目标数据生成第二指令。所述第二指令包括所述目标数据,所述第二指令用于指示所述第二存储器写入所述目标数据。这样,第二存储器在接收到第二指令之后,则将第二指令中的目标数据写入到易失性存储器中,然后再从易失性存储器中将所述目标数据写入到非易失性存储器。
本方案中,在第二存储器复位后,操作系统则重新向第二存储器发送第一存储器中所存储的目标数据,能够有效避免第二存储器下电复位后所引起的数据丢失的问题,保证终端的正常运行。
在一种可能的实现方式中,所述方法还包括:在第二存储器的运行过程中,当第二存储器出现异常而导致第二存储器无法正常写入数据时,第二存储器则向操作系统发送第二消息,所述第二消息用于指示第二存储器出现异常。操作系统获取所述第二存储器发送的第二消息,所述第二消息用于指示所述第二存储器出现异常。操作系统向所述第二存储器发送第三指令,所述第三指令用于指示所述第二存储器执行复位操作。
在第二存储器接收到指示执行复位操作的第三指令之后,第二存储器则根据第三指令执行复位操作,以消除第二存储器中所出现的异常。在第二存储器执行复位操作之后,第二存储器的易失性存储器中的数据由于断电而丢失。
在一种可能的实现方式中,所述方法还包括:操作系统获取所述第二存储器发送的第三消息。所述第三消息为所述第一指令的响应消息,所述第三消息用于指示所述目标数据已写入至所述非易失性存储器。操作系统删除所述第一存储器中的所述目标数据。
本方案中,由于第一存储器中用于存储待写入第二存储器的数据的存储空间有限,因 此在数据已写入至第二存储器的非易失性存储器之后,终端可以删除第一存储器中所存储的目标数据,以保证第一存储器中有足够的空闲存储空间。
在一种可能的实现方式中,所述操作系统将目标数据存储至第一存储器,包括:操作系统将所述目标数据存储至所述第一存储器中的目标存储空间,所述目标存储空间为预分配的存储空间。所述目标存储空间用于临时存储待写入第二存储器的数据。
具体地,在终端的启动过程中,终端在第一存储器中划分一个特定容量大小的存储空间,并将该存储空间指定为用于临时存储待写入第二存储器的数据的目标存储空间。由于所述目标存储空间是内存储器中容量较小的一个存储空间,因此终端在内存储器中划分目标存储空间并不会影响内存储器正常存储处理器的运算数据。
本方案中,通过在第一存储器中分配独立的目标存储空间来存储待写入第二存储器的数据,能够有效地隔离待写入第二存储器的与处理器的运算数据,保证数据之间的独立性。
在一种可能的实现方式中,所述目标存储空间的容量大于或等于所述易失性存储器的容量,以保证在第二存储器的易失性存储器中的所有数据均能够备份在目标存储空间中。
在一种可能的实现方式中,所述方法还包括:操作系统向所述第二存储器发送第四指令,所述第四指令用于查询所述易失性存储器中所存储的数据。操作系统获取所述第二存储器发送的第四消息,所述第四消息用于指示所述易失性存储器中所存储的第一数据。操作系统删除所述第一存储器中的第二数据。其中,所述第二数据和所述第一数据均包含于所述目标数据中,且所述第一数据和所述第二数据不同。
本方案中,终端通过查询仍存储于第二存储器的易失性存储器中的数据,来实现将已经不在易失性存储器中的数据从第一存储器中删除,从而保证第一存储器中有足够的空闲存储空间。
在一种可能的实现方式中,所述向所述第二存储器发送第四指令,包括:若所述第二存储器执行指令的方式为乱序执行,且所述目标存储空间所存储的数据的数据量大于或等于预设阈值,则操作系统向所述第二存储器发送所述第四指令。
当第二存储器执行的指令的方式为乱序执行时,第二存储器并不会根据接收指令的顺序来有序地处理指令。也就是说,第二存储器可能会先处理后接收到的指令,从而将后接收到的数据先从易失性存储器中写入到非易失性存储器中;对于先接收到的某一些指令,第二存储器可能一直没有执行,导致了先接收到的数据一直存储于易失性存储器中。在这种情况下,操作系统通过查询易失性存储器中所存储的数据内容,来删除目标存储空间中的部分数据,能够很好地保证第一存储器的目标存储空间中能够完整地保存有易失性存储器中所存储的数据。
在一种可能的实现方式中,所述方法还包括:若所述第二存储器执行指令的方式为顺序执行,且所述目标存储空间所存储的数据的数据量大于或等于预设阈值,则操作系统删除所述目标存储空间中的第三数据,所述第三数据为所述目标存储空间中最先写入所述目标存储空间的数据。
简单来说,操作系统基于先进先出的方式来删除目标存储空间中已被成功写入非易失性存储器的数据,从而保证目标存储空间中存在足够的空闲空间。
本申请第二方面提供一种终端,包括:处理单元和收发单元。所述处理单元,用于将目标数据存储至第一存储器,所述第一存储器为内存储器;所述收发单元,用于向第二存储器发送第一指令,所述第一指令包括所述目标数据,所述第一指令用于指示所述第二存储器写入所述目标数据,所述第二存储器为外存储器,所述第二存储器包括易失性存储器和非易失性存储器,所述易失性存储器用于临时存储待写入至所述非易失性存储器的所述目标数据,所述非易失性存储器用于存储所述目标数据;所述收发单元,还用于在所述第二存储器复位后,基于所述第一存储器中的所述目标数据恢复所述第二存储器中的数据。
在一种可能的实现方式中,所述收发单元,还用于获取所述第二存储器发送的第一消息,所述第一消息用于指示所述第二存储器复位成功;所述收发单元,还用于向所述第二存储器发送第二指令,所述第二指令是根据所述第一存储器中的所述目标数据生成的,所述第二指令包括所述目标数据,所述第二指令用于指示所述第二存储器写入所述目标数据。
在一种可能的实现方式中,所述收发单元,还用于获取所述第二存储器发送的第二消息,所述第二消息用于指示所述第二存储器出现异常;所述收发单元,还用于向所述第二存储器发送第三指令,所述第三指令用于指示所述第二存储器执行复位操作。
在一种可能的实现方式中,所述收发单元,还用于获取所述第二存储器发送的第三消息,所述第三消息用于指示所述目标数据已写入至所述非易失性存储器;所述处理单元,还用于删除所述第一存储器中的所述目标数据。
在一种可能的实现方式中,所述处理单元,还用于将所述目标数据存储至所述第一存储器中的目标存储空间,所述目标存储空间为预分配的存储空间。
在一种可能的实现方式中,所述目标存储空间的容量大于或等于所述易失性存储器的容量。
在一种可能的实现方式中,所述收发单元,还用于向所述第二存储器发送第四指令,所述第四指令用于查询所述易失性存储器中所存储的数据;所述收发单元,还用于获取所述第二存储器发送的第四消息,所述第四消息用于指示所述易失性存储器中所存储的第一数据;所述处理单元,还用于删除所述第一存储器中的第二数据;其中,所述第二数据和所述第一数据均包含于所述目标数据中,且所述第一数据和所述第二数据不同。
在一种可能的实现方式中,所述收发单元,还用于若所述第二存储器执行指令的方式为乱序执行,且所述目标存储空间所存储的数据的数据量大于或等于预设阈值,则向所述第二存储器发送所述第四指令。
在一种可能的实现方式中,所述处理单元,还用于若所述第二存储器执行指令的方式为顺序执行,且所述目标存储空间所存储的数据的数据量大于或等于预设阈值,则删除所述目标存储空间中的第三数据,所述第三数据为所述目标存储空间中最先写入所述目标存储空间的数据。
本申请第三方面提供一种终端,该终端包括:内存储器、外存储器和处理器;所述外存储器存储有代码,所述处理器被配置为执行所述代码,当所述代码被执行时,所述终 端执行如第一方面中的任意一种实现方式的方法。
本申请第四方面提供一种计算机可读存储介质,计算机可读存储介质中存储有计算机程序,当其在计算机上运行时,使得计算机执行如第一方面中的任意一种实现方式的方法。
本申请第五方面提供一种计算机程序产品,当其在计算机上运行时,使得计算机执行如第一方面中的任意一种实现方式的方法。
本申请第六方面提供一种芯片,包括一个或多个处理器。处理器中的部分或全部用于读取并执行存储器中存储的计算机程序,以执行上述任一方面任意可能的实现方式中的方法。
可选地,该芯片该包括存储器,该存储器与该处理器通过电路或电线与存储器连接。可选地,该芯片还包括通信接口,处理器与该通信接口连接。通信接口用于接收需要处理的数据和/或信息,处理器从该通信接口获取该数据和/或信息,并对该数据和/或信息进行处理,并通过该通信接口输出处理结果。该通信接口可以是输入输出接口。本申请提供的方法可以由一个芯片实现,也可以由多个芯片协同实现。
附图说明
图1为本申请实施例提供的一种存储设备的结构示意图;
图2为本申请实施例提供的一种终端101的结构示意图;
图3为本申请实施例提供的一种应用场景的架构示意图;
图4为本申请实施例提供的一种数据存储方法400的流程示意图;
图5为本申请实施例提供的数据存储方法400的另一流程示意图;
图6为本申请实施例提供的数据存储方法的应用架构示意图;
图7为本申请实施例提供的一种数据存储方法700的流程示意图;
图8为本申请实施例提供的一种终端800的结构示意图;
图9为本申请实施例提供的一种计算机可读存储介质900的结构示意图。
具体实施方式
下面结合附图,对本申请的实施例进行描述,显然,所描述的实施例仅仅是本申请一部分的实施例,而不是全部的实施例。本领域普通技术人员可知,随着技术的发展和新场景的出现,本申请实施例提供的技术方案对于类似的技术问题,同样适用。
本申请的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象,而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换,以便这里描述的实施例能够以除了在这里图示或描述的内容以外的顺序实施。此外,术语“包括”和“具有”以及他们的任何变形,意图在于覆盖不排他的包含,例如,包含了一系列步骤或模块的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或模块,而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或模块。在本申请中出现的对步骤进行的命名或者编号,并不意味着必须按照命名或者 编号所指示的时间/逻辑先后顺序执行方法流程中的步骤,已经命名或者编号的流程步骤可以根据要实现的技术目的变更执行次序,只要能达到相同或者相类似的技术效果即可。
在数据存储领域中,在存储设备的运行过程中,传输链路不稳定、存储设备的内部控制器异常或者存储介质异常等因素可能会导致存储设备无法正常运行。在存储设备无法正常运行的情况下,终端的操作系统与存储设备之间无法进行数据交互,进而影响终端的正常运行。
在服务器领域,一般能够通过冗余备份方法来解决存储设备无法正常运行的问题。服务器中包括主存储设备和从存储设备,在主存储设备异常后,则将数据交互业务迁移到从存储设备,从而保障数据交互业务不中断。
对于便携终端,例如智能手机或平板电脑等终端,由于成本及终端体积受限,通常无法使用冗余备份方法。因此,便携终端通常是通过触发存储设备复位来解决存储设备异常的问题。然而,触发存储设备复位会对存储设备进行下电复位,导致存储设备内的易失性存储器的数据丢失,进而影响终端的正常运行。
可以参阅图1,图1为本申请实施例提供的一种存储设备的结构示意图。如图1所示,终端中的操作系统通过驱动组件与存储设备进行数据交互。存储设备中包括易失性存储器和非易失性存储器。易失性存储器的数据写入速度较快,但是易失性存储器在断电后无法保存数据。非易失性存储器的数据写入速度较慢,但是非易失性存储器在断电后仍然能保存数据。因此,在终端中的操作系统向存储设备写入数据的过程中,数据先被写入到存储设备的易失性存储器中,然后再从易失性存储器写入到非易失性存储器中。
当存储设备在数据写入的过程中发生异常时,操作系统触发存储设备下电复位,存储设备的易失性存储器中的数据则丢失。由于易失性存储器中的数据还没来得及写入到非易失性存储器中,且易失性存储器断电后丢失了数据,因此操作系统写入到存储设备中的部分数据丢失。在易失性存储器所丢失的数据为关键数据的情况下,可能会导致终端的文件系统损坏,影响终端的正常运行。
有鉴于此,本申请实施例提供了一种数据存储方法,该方法可以应用于终端中。终端在需要向外存储器写入目标数据的情况下,终端将目标数据存储于内存储器中。这样,在外存储器下电复位时,终端能够将备份于内存储器中的目标数据重新发送给外存储器,避免了外存储器下电复位后所引起的数据丢失的问题,保证了终端的正常运行。
本申请实施例所涉及的终端可以为具有内存储器和外存储器的终端。示例性地,该终端例如可以是个人电脑(personal computer,PC)、笔记本电脑、服务器、手机(mobile phone)、平板电脑、移动互联网设备(mobile internet device,MID)、可穿戴设备,虚拟现实(virtual reality,VR)设备、增强现实(augmented reality,AR)设备、工业控制(industrial control)中的无线终端、无人驾驶(self driving)中的无线终端、远程手术(remote medical surgery)中的无线终端、智能电网(smart grid)中的无线终端、运输安全(transportation safety)中的无线终端、智慧城市(smart city)中的无线终端、智慧家庭(smart home)中的无线终端等。该终端可以是运行安卓系统、IOS系统、windows系统以 及其他系统的设备。为便于理解,以下将以终端为智能手机为例,对本申请实施例提供的数据存储方法进行介绍。
可以参阅图2,图2为本申请实施例提供的一种终端101的结构示意图。如图2所示,终端101包括处理器103,处理器103和系统总线105耦合。处理器103可以是一个或者多个处理器,其中每个处理器都可以包括一个或多个处理器核。显示适配器(video adapter)107,显示适配器可以驱动显示器109,显示器109和系统总线105耦合。系统总线105通过总线桥111和输入输出(I/O)总线耦合。I/O接口115和I/O总线耦合。I/O接口115和多种I/O设备进行通信,比如输入设备117(如:触摸屏等),外存储器121,(例如,硬盘、软盘、光盘或优盘),多媒体接口等)。收发器123(可以发送和/或接收无线电通信信号),摄像头155(可以捕捉静态和动态数字视频图像)和外部USB端口125。其中,可选地,和I/O接口115相连接的接口可以是USB接口。
其中,处理器103可以是任何传统处理器,包括精简指令集计算(reduced instruction set Computing,RISC)处理器、复杂指令集计算(complex instruction set computing,CISC)处理器或上述的组合。可选地,处理器可以是诸如ASIC的专用装置。
终端101可以通过网络接口129和软件部署服务器149通信。示例性的,网络接口129是硬件网络接口,比如,网卡。网络127可以是外部网络,比如因特网,也可以是内部网络,比如以太网或者虚拟私人网络(virtual private network,VPN)。可选地,网络127还可以是无线网络,比如WiFi网络,蜂窝网络等。
硬盘驱动器接口131和系统总线105耦合。硬件驱动接口和硬盘驱动器133相连接。内存储器135和系统总线105耦合。运行在内存储器135的数据可以包括终端101的操作系统(OS)137、应用程序143和调度表。
操作系统包括Shell 139和内核(kernel)141。Shell 139是介于使用者和操作系统的内核间的一个接口。shell是操作系统最外面的一层。shell管理使用者与操作系统之间的交互:等待使用者的输入,向操作系统解释使用者的输入,并且处理各种各样的操作系统的输出结果。
内核141由操作系统中用于管理存储器、文件、外设和系统资源的那些部分组成。内核141直接与硬件交互,操作系统内核通常运行进程,并提供进程间的通信,提供CPU时间片管理、中断、内存管理和IO管理等等。
示例性地,在终端101为智能手机的情况下,应用程序143包括即时通讯相关的程序。在一个实施例中,在需要执行应用程序143时,终端101可以从软件部署服务器149下载应用程序143。
可以参阅图3,图3为本申请实施例提供的一种应用场景的架构示意图。如图3所示,以终端为智能手机为例,终端中的软件分别运行在用户态和操作系统,终端中的硬件则为存储设备。在终端中,应用程序运行在用户态,文件系统(file system,FS)、块层(BLOCK Layer)和存储设备的驱动组件则运行在操作系统。
其中,文件系统是操作系统中负责管理和存储文件信息的软件机构,文件系统也称为 文件管理系统。从系统角度来看,文件系统是对文件存储设备的空间进行组织和分配,负责文件存储并对存入的文件进行保护和检索的系统。具体地说,它负责为用户建立文件,存入、读出、修改、转储文件,控制文件的存取,当用户不再使用时撤销文件等。
块层是文件系统访问存储设备的接口,是连接文件系统和驱动组件的桥梁。
驱动组件是添加到操作系统中的特殊程序。驱动组件中包含有关硬件设备的信息,用于实现终端中的软件与存储设备之间的通信。
在终端的运行过程中,用户态的应用程序在需要读取存储设备中的数据或者将数据写入存储设备时,应用程序向文件系统发送数据读取请求或者数据写入请求。文件系统根据获取到的数据读取请求或者数据写入请求,向块层下发相应的数据处理请求。块层根据下发的数据处理请求,生成相应的IO请求,并下发给驱动组件。驱动组件根据接收到的IO请求与存储设备进行通信,从而实现数据的读取或写入。
可以参阅图4,图4为本申请实施例提供的一种数据存储方法400的流程示意图。如图4所示,该方法400包括以下的步骤401-407。
步骤401,操作系统将目标数据存储至第一存储器,所述第一存储器为内存储器。
在终端需要长期存储目标数据的情况下,终端中的操作系统可以将目标数据存储至作为内存储器的第一存储器中,以实现目标数据的备份。
其中,目标数据为非临时性存储的数据。即目标数据的存储要求为:终端断电后,目标数据仍能够存储于终端中。
终端可以包括一个或多个内存储器,所述第一存储器可以为终端中的任意一个内存储器。内存储器也称为内存或主存,内存储器通常用于临时存放处理器中的运算数据。内存储器是外存储器与处理器进行沟通的桥梁,终端中的所有程序都在内存中运行。示例性地,在终端为计算机的情况下,内存储器可以为内存条等存储设备。在终端为智能手机的情况下,内存储器可以为运行内存等存储设备。
步骤402,操作系统向第二存储器发送第一指令,所述第一指令包括所述目标数据,所述第一指令用于指示所述第二存储器写入所述目标数据。
在获取到待写入第二存储器的目标数据后,操作系统则根据目标数据生成第一指令,并通过驱动组件向第二存储器发送所述第一指令。所述第一指令包括所述目标数据和目标地址,所述第一指令用于指示所述第二存储器将所述目标数据写入所述目标地址。
本实施例中,操作系统可以是串行地执行步骤401与步骤402,即操作系统先执行步骤401,再执行步骤402;操作系统也可以是并行地执行步骤401与步骤402,本实施例对此不做具体限定。
其中,所述第二存储器为外存储器,用于长期存储数据。终端可以包括一个或多个外存储器,所述第二存储器可以为终端中的任意一个外存储器。外存储器是指终端中除内存储器和处理器缓存之外的存储器。示例性地,在终端为计算机的情况下,外存储器可以为硬盘、软盘、光盘或优盘等存储设备。在终端为智能手机的情况下,外存储器可以为内置存储器或SD卡等存储设备。例如,所述第一存储器可以为智能手机中容量为8吉字节(GB) 的运行内存,所述第二存储器可以为智能手机中容量为256GB的内置存储器。
所述第二存储器包括易失性存储器和非易失性存储器,所述易失性存储器用于临时存储待写入至所述非易失性存储器的所述目标数据,所述非易失性存储器用于长期存储所述目标数据。其中,易失性存储器的数据写入速度较快,但是易失性存储器在断电后无法保存数据。非易失性存储器的数据写入速度较慢,但是非易失性存储器在断电后仍然能保存数据。因此,第二存储器写入目标数据的过程包括:第二存储器先将目标数据写入到易失性存储器中,然后再将易失性存储器中的目标数据写入到非易失性存储器中的目标地址。
例如,假设第一指令用于指示将大小为4字节(kB)的目标数据写入到地址段0-3中。那么,第二存储器根据第一指令先将4kB的目标数据写入到易失性存储器中,然后再从易失性存储器中所存储的目标数据写入到非易失性存储器的地址段0-3中。
本实施例中,易失性存储器可以为静态随机存取存储器(Static Random-Access Memory,SRAM)或动态随机存取存储器(Dynamic Random Access Memory,DRAM)。非易失性存储器可以为通用闪存存储(Universal Flash Storage,UFS)、嵌入式多媒体卡(Embedded Multi Media Card,eMMC)或非易失性高速传输总线(Non-Volatile Memory express,NVMe)
步骤403,操作系统获取所述第二存储器发送的第二消息,所述第二消息用于指示所述第二存储器出现异常。
在第二存储器的运行过程中,当第二存储器出现异常而导致第二存储器无法正常写入数据时,第二存储器则向操作系统发送第二消息,所述第二消息用于指示第二存储器出现异常。其中,第二存储器出现异常的原因包括但不限于:传输链路不稳定、第二存储器的内部控制器异常或者存储介质异常等因素。
步骤404,操作系统向所述第二存储器发送第三指令,所述第三指令用于指示所述第二存储器执行复位操作。
在获取到第二存储器所上报的第二消息之后,操作系统则将第二存储器的状态置为异常,以阻塞应用程序所提交的数据读取请求以及数据写入请求。即,操作系统中断向第二存储器发送写入数据的指令或者读取数据的指令。然后,操作系统向第二存储器发送用于指示第二存储器执行复位操作的第三指令。
在第二存储器接收到指示执行复位操作的第三指令之后,第二存储器则根据第三指令执行复位操作,以消除第二存储器中所出现的异常。在第二存储器执行复位操作之后,第二存储器的易失性存储器中的数据由于断电而丢失。
步骤405,操作系统获取所述第二存储器发送的第一消息。
在第二存储器成功执行复位操作后,第二存储器则向操作系统发送第一消息。该第一消息用于指示所述第二存储器复位成功。操作系统通过获取第一消息,能够确认第二存储器已恢复正常。
步骤406,操作系统向所述第二存储器发送第二指令。
其中,操作系统向第二存储器所发送的所述第二指令是根据所述第一存储器中的目标数据生成的。操作系统在确认第二存储器复位成功后,可以获取第一存储器中的目标数据, 并且根据所述目标数据生成第二指令。所述第二指令包括所述目标数据,所述第二指令用于指示第二存储器写入所述目标数据。
步骤407,第二存储器根据第二指令写入所述目标数据。
这样,第二存储器在接收到第二指令之后,则将第二指令中的目标数据写入到易失性存储器中,然后再从易失性存储器中将所述目标数据写入到非易失性存储器。
应理解,第二指令中包括目标数据所需要写入的目标地址。因此,第二存储器在获取到第二指令之后,会将所述目标数据重新写入到目标地址上。也就是说,即便第二存储器在执行复位操作之前已经将所述目标数据写入到非易失性存储器中,第二存储器也仅仅是将所述目标数据重新覆盖于目标地址上,而不会产生数据紊乱的问题。
本实施例中,在第二存储器复位后,操作系统则重新向第二存储器发送第一存储器中所存储的目标数据,能够有效避免第二存储器下电复位后所引起的数据丢失的问题,保证终端的正常运行。
可选的,为了保证第一存储器能够正常存储处理器的运算数据,终端可以在第一存储器中预先分配一个目标存储空间,所述目标存储空间用于临时存储待写入第二存储器的数据。示例性地,在终端的启动过程中,终端在第一存储器中划分一个特定容量大小的存储空间,并将该存储空间指定为用于临时存储待写入第二存储器的数据的目标存储空间。由于所述目标存储空间是内存储器中容量较小的一个存储空间,因此终端在内存储器中划分目标存储空间并不会影响内存储器正常存储处理器的运算数据。此外,通过在第一存储器中分配独立的目标存储空间来存储待写入第二存储器的数据,能够有效地隔离待写入第二存储器的与处理器的运算数据,保证数据之间的独立性。
终端在第一存储器中所分配的目标存储空间的容量大于或等于第二存储器的易失性存储器的容量,以保证在第二存储器的易失性存储器中的所有数据均能够备份在目标存储空间中。例如,在第二存储器的易失性存储器的容量为1MB的情况下,第一存储器中的目标存储空间的容量可以为1MB、2MB或者10MB。
在终端预分配了目标存储空间的情况下,在操作系统获取到待写入第二存储器的目标数据时,操作系统可以将所述目标数据存储于所述第一存储器的目标存储空间中。
应理解,由于第一存储器中用于存储待写入第二存储器的数据的存储空间有限,因此在数据已写入至第二存储器的非易失性存储器之后,终端可以删除第一存储器中所存储的目标数据,以保证第一存储器中有足够的空闲存储空间。
在本实施例中,终端可以通过多种方式来删除第一存储器中的数据。
方式一,终端根据第二存储器所反馈的指令已完成的消息,删除第一存储器中的数据。
示例性地,所述方法400还可以包括:操作系统获取所述第二存储器发送的第三消息。所述第三消息为所述第一指令的响应消息,所述第三消息用于指示所述目标数据已写入至所述非易失性存储器。操作系统删除所述第一存储器中的所述目标数据。
简单来说,第二存储器在完成操作系统所下发的第一指令(即完成将目标数据写入非 易失性存储器的任务)之后,第二存储器则向操作系统返回第三消息,以指示第二存储器已完成目标数据的写入。操作系统则可以根据所述第三消息,删除第一存储器中的目标数据。
方式二,终端查询仍存储于第二存储器的易失性存储器中的数据,从而将已经不在易失性存储器中的数据从第一存储器中删除。
示例性地,可以参阅图5,图5为本申请实施例提供的数据存储方法400的另一流程示意图。如图5所示,该方法400还包括以下的步骤408-410。
步骤408,操作系统向所述第二存储器发送第四指令,所述第四指令用于查询所述易失性存储器中所存储的数据。
操作系统可以是周期性地向第二存储器发送查询易失性存储器中的数据的指令。例如,操作系统每隔1ms则向第二存储器发送一次用于查询易失性存储器中的数据的指令。
操作系统也可以是在第一存储器中用于存储待写入数据的目标存储空间将要饱和的情况下,向第二存储器发送查询易失性存储器中的数据的指令。例如,在第一存储器中的目标存储空间所存储的数据的数据量大于或等于预设阈值时,操作系统则向所述第二存储器发送所述第四指令。其中,所述预设阈值可以根据所述目标存储空间的容量以及第二存储器中的易失性存储器的容量来确定。例如,在所述目标存储空间的容量为10MB,第二存储器中的易失性存储器的容量为1MB的情况下,所述预设阈值可以设置为9MB。这样,操作系统每次查询完易失性存储器中的数据之后,操作系统至少能够删除目标存储空间中8MB大小的数据。并且,在预设阈值为9MB的情况下,目标存储空间中还剩下1MB的空闲空间,该空闲空间的容量大小于易失性存储器的容量大小相同。这样,操作系统能够保证在删除目标存储空间中的其他数据之前,目标存储空间中还有足够的空闲空间来存储后续到来的数据。
步骤409,操作系统获取所述第二存储器发送的第四消息。
第二存储器在接收到操作系统下发的第四指令后,第二存储器则根据易失性存储器中所存储的数据生成第四消息,并向操作系统发送所述第四消息,所述第四消息用于指示所述易失性存储器中所存储的第一数据。例如,所述第四消息指示易失性存储器中所存储的第一数据为待写入至地址段10-19的数据。
步骤410,操作系统删除所述第一存储器中的第二数据。
其中,所述第二数据和所述第一数据均包含于所述目标数据中,且所述第一数据和所述第二数据不同。所述第二数据为所述目标数据中已从易失性存储器中写入至非易失性存储器的数据。例如,假设第一存储器中所存储的目标数据为待写入至地址段0-19的数据,第一数据为待写入至地址段10-19的数据,第二数据为待写入至地址段0-9的数据,第二数据已从易失性存储器中写入至非易失性存储器中。因此,操作系统可以根据第四消息删除待写入至地址段0-9的第二数据。也就是说,操作系统可以根据所述第四消息,将已经不在易失性存储器中的数据从第一存储器中删除。
可选的,操作系统可以是在第二存储器执行指令的方式为乱序执行的情况下,通过方式二来删除目标存储空间中的部分数据。当第二存储器执行的指令的方式为乱序执行时, 第二存储器并不会根据接收指令的顺序来有序地处理指令。也就是说,第二存储器可能会先处理后接收到的指令,从而将后接收到的数据先从易失性存储器中写入到非易失性存储器中;对于先接收到的某一些指令,第二存储器可能一直没有执行,导致了先接收到的数据一直存储于易失性存储器中。在这种情况下,操作系统通过方式二来删除目标存储空间中的部分数据,能够很好地保证第一存储器的目标存储空间中能够完整地保存有易失性存储器中所存储的数据。
此外,在第二存储器执行指令的方式为顺序执行的情况下,操作系统也可以是通过方式二来删除目标存储空间中的部分数据。当第二存储器执行的指令的方式为顺序执行时,第二存储器会根据接收指令的顺序来有序地处理指令。即,第二存储器先接收到的数据会被先写入到非易失性存储器中,第二存储器后接收到的数据则会被后写入到非易失性存储器中。
方式三,在目标存储空间已存储较多数据的情况下,终端删除先写入目标存储空间的数据。
示例性地,若所述第二存储器执行指令的方式为顺序执行,且所述目标存储空间所存储的数据的数据量大于或等于预设阈值,终端中的操作系统则删除所述目标存储空间中的第三数据,所述第三数据为所述目标存储空间中最先写入所述目标存储空间的数据。
可选的,为了避免误删除易失性存储器仍存储的数据,操作系统可以删除目标存储空间中的部分数据,以保证在删除目标存储空间中的部分数据后,所述目标存储空间中剩下的数据的数据量大于或等于易失性存储器的容量。即,操作系统删除目标存储空间中的第三数据之后,目标存储空间中的剩余数据的数据量大于或等于易失性存储器的容量。例如,在目标存储空间的容量为10MB,易失性存储器的容量为1MB的情况下,操作系统可以是在目标存储空间中已存储有9MB数据的情况下,删除目标存储空间中先写入的8MB数据。这样一来,在操作系统删除了8MB的数据之后,目标存储空间中还剩下1MB的数据,保证了目标存储空间中仍存储有易失性存储器中所存储的所有数据。
简单来说,在方式三中,操作系统基于先进先出的方式来删除目标存储空间中已被成功写入非易失性存储器的数据,从而保证目标存储空间中存在足够的空闲空间。
一般来说,终端中的第二存储器执行指令的方式通常是固定不变的,只有在终端的固件进行升级的情况下,第二存储器执行指令的方式才会发生变化。并且,终端升级固件往往需要重启。因此,在实际应用中,终端可以在启动后获取第二存储器执行指令的方式,并且根据第二存储器执行指令的方式选择删除第一存储器中的数据的方式。例如,在第二存储器执行指令的方式为顺序执行时,终端则基于上述的方式三来删除第一存储器中的数据;在第二存储器执行指令的方式为乱序执行时,终端则基于上述的方式二来删除第一存储器中的数据。
为了便于理解,以下将结合具体例子对本申请实施例提供的数据存储方法进行详细的介绍。
可以参阅图6,图6为本申请实施例提供的数据存储方法的应用架构示意图。如图6 所示,终端的操作系统中包括文件系统、块层、第一存储器中的目标存储空间、数据恢复模块、异常处理模块和驱动组件(图中未示出);终端的设备层包括第二存储器。其中,文件系统、块层和驱动组件可以参考图3对应的架构的介绍,在此不再赘述。此外,在本实施例中,驱动组件用于传递操作系统与第二存储器之间的交互信息。为便于叙述,本实施例中省去驱动组件传递操作系统中的模块与第二存储器之间的交互信息的过程,而直接叙述操作系统中的模块与第二存储器之间的交互。
在图6中,在需要往第二存储器中写入数据的情况下,块层向第二存储器发送包括目标数据的数据写入指令,并将目标数据存储到目标存储空间中。当第二存储器在写入数据的过程中出现异常时,第二存储器向异常处理模块上报指示第二存储器出现异常的消息。异常处理模块则触发第二存储器复位,并在第二存储器复位成功后将第二存储器成功复位的消息通知数据恢复模块。数据恢复模块则从目标存储空间中取出目标数据,并向第二存储器重新发送目标数据。
可以参阅图7,图7为本申请实施例提供的一种数据存储方法700的流程示意图。所述方法700包括以下的步骤701-步骤710。
步骤701,块层将目标数据存储于第一存储器的目标存储空间中。
在块层获取到文件系统下发的数据写入请求之后,块层则将该数据写入请求中所指示的目标数据存储于第一存储器的目标存储空间中,以实现目标数据的备份。
步骤702,块层向第二存储器发送包括目标数据的第一指令。
在将目标数据存储于目标存储空间后,块层则根据目标数据生成第一指令,并通过驱动组件向第二存储器发送所述第一指令。所述第一指令包括目标数据和目标地址,所述第一指令用于指示所述第二存储器将所述目标数据写入非易失性存储器中的目标地址。
步骤703,第二存储器向异常处理模块发送指示出现异常的第二消息。
在第二存储器根据第一指令执行目标数据的写入操作的过程中,第二存储器出现异常,导致第二存储器无法正常写入目标数据。第二存储器则向异常处理模块发送第二消息,所述第二消息指示第二存储器出现异常。
步骤704,异常处理模块向第二存储器发送执行复位操作的第三指令。
在获取到第二存储器所上报的第二消息之后,异常处理模块则将第二存储器的状态置为异常,以阻塞应用程序所提交的数据读取请求以及数据写入请求。然后,异常处理模块向第二存储器发送用于指示第二存储器执行复位操作的第三指令。
步骤705,第二存储器执行复位操作。
第二存储器根据所接收到的第三指令,执行复位操作,以消除第二存储器中所出现的异常。
步骤706,第二存储器向异常处理模块发送指示复位成功的第一消息。
在执行复位操作之后,第二存储器则向异常处理模块发送第一消息,所述第一消息用于指示第二存储器已复位成功。
步骤707,异常处理模块向数据恢复模块发送指示执行数据恢复的消息。
在异常处理模块获取到第一消息之后,异常处理模块则向数据恢复模块发送消息,以 通知数据恢复模块执行数据恢复。
步骤708,数据恢复模块根据目标数据生成第二指令。
基于异常处理模块所发送的用于指示执行数据恢复的消息,数据恢复模块获取目标存储空间中的目标数据,并根据目标数据生成第二指令。其中,所述第二指令包括所述目标数据,所述第二指令用于指示第二存储器写入所述目标数据。
步骤709,数据恢复模块向第二存储器发送包括目标数据的第二指令。
步骤710,第二存储器根据第二指令写入目标数据。
在获取到第二指令后,第二存储器根据第二指令中的目标数据,重新将目标数据写入到易失性存储器中,然后再从易失性存储器中将所述目标数据写入到非易失性存储器。
在第二存储器成功写入目标数据之后,第二存储器可以向数据恢复模块返回指示成功写入目标数据的消息。这样,数据恢复模块可以通知异常处理模块已成功执行数据恢复。最后,异常处理模块将第二存储器的状态置为正常,以使得块层继续处理应用程序所提交的数据读取请求以及数据写入请求。
在图1至图7所对应的实施例的基础上,为了更好的实施本申请实施例的上述方案,下面还提供用于实施上述方案的相关设备。
具体可以参阅图8,图8为本申请实施例提供的一种终端800的结构示意图,该终端800包括:处理单元801和收发单元802。所述处理单元801,用于将目标数据存储至第一存储器,所述第一存储器为内存储器;所述收发单元802,用于向第二存储器发送第一指令,所述第一指令包括所述目标数据,所述第一指令用于指示所述第二存储器写入所述目标数据,所述第二存储器为外存储器,所述第二存储器包括易失性存储器和非易失性存储器,所述易失性存储器用于临时存储待写入至所述非易失性存储器的所述目标数据,所述非易失性存储器用于存储所述目标数据;所述收发单元802,还用于在所述第二存储器复位后,基于所述第一存储器中的所述目标数据恢复所述第二存储器中的数据。
在一种可能的实现方式中,所述收发单元802,还用于获取所述第二存储器发送的第一消息,所述第一消息用于指示所述第二存储器复位成功;所述收发单元802,还用于向所述第二存储器发送第二指令,所述第二指令是根据所述第一存储器中的所述目标数据生成的,所述第二指令包括所述目标数据,所述第二指令用于指示所述第二存储器写入所述目标数据。
在一种可能的实现方式中,所述收发单元802,还用于获取所述第二存储器发送的第二消息,所述第二消息用于指示所述第二存储器出现异常;所述收发单元802,还用于向所述第二存储器发送第三指令,所述第三指令用于指示所述第二存储器执行复位操作。
在一种可能的实现方式中,所述收发单元802,还用于获取所述第二存储器发送的第三消息,所述第三消息用于指示所述目标数据已写入至所述非易失性存储器;所述处理单元801,还用于删除所述第一存储器中的所述目标数据。
在一种可能的实现方式中,所述处理单元801,还用于将所述目标数据存储至所述第一存储器中的目标存储空间,所述目标存储空间为预分配的存储空间。
在一种可能的实现方式中,所述目标存储空间的容量大于或等于所述易失性存储器的容量。
在一种可能的实现方式中,所述收发单元802,还用于向所述第二存储器发送第四指令,所述第四指令用于查询所述易失性存储器中所存储的数据;所述收发单元802,还用于获取所述第二存储器发送的第四消息,所述第四消息用于指示所述易失性存储器中所存储的第一数据;所述处理单元801,还用于删除所述第一存储器中的第二数据;其中,所述第二数据和所述第一数据均包含于所述目标数据中,且所述第一数据和所述第二数据不同。
在一种可能的实现方式中,所述收发单元802,还用于若所述第二存储器执行指令的方式为乱序执行,且所述目标存储空间所存储的数据的数据量大于或等于预设阈值,则向所述第二存储器发送所述第四指令。
在一种可能的实现方式中,所述处理单元801,还用于若所述第二存储器执行指令的方式为顺序执行,且所述目标存储空间所存储的数据的数据量大于或等于预设阈值,则删除所述目标存储空间中的第三数据,所述第三数据为所述目标存储空间中最先写入所述目标存储空间的数据。
本申请实施例提供的数据存储方法具体可以由终端中的芯片来执行,该芯片包括:处理单元和通信单元,处理单元例如可以是处理器,通信单元例如可以是输入/输出接口、管脚或电路等。该处理单元可执行存储单元存储的计算机执行指令,以使服务器内的芯片执行上述图1至图7所示实施例描述的数据存储方法。可选的,存储单元为芯片内的存储单元,如寄存器、缓存等,存储单元还可以是无线接入设备端内的位于芯片外部的存储单元,如只读存储器(read-only memory,ROM)或可存储静态信息和指令的其他类型的静态存储设备,随机存取存储器(random access memory,RAM)等。
参照图9,本申请还提供了一种计算机可读存储介质,在一些实施例中,上述图4所公开的方法可以实施为以机器可读格式被编码在计算机可读存储介质上或者被编码在其它非瞬时性介质或者制品上的计算机程序指令。
图9示意性地示出根据这里展示的至少一些实施例而布置的示例计算机可读存储介质的概念性局部视图,示例计算机可读存储介质包括用于在计算设备上执行计算机进程的计算机程序。
在一个实施例中,计算机可读存储介质900是使用信号承载介质901来提供的。信号承载介质901可以包括一个或多个程序指令902,其当被一个或多个处理器运行时可以提供以上针对图2描述的功能或者部分功能。因此,例如,参考图4中所示的实施例,步骤401-407的一个或多个特征可以由与信号承载介质901相关联的一个或多个指令来承担。此外,图9中的程序指令902也描述示例指令。
在一些示例中,信号承载介质901可以包含计算机可读介质903,诸如但不限于,硬盘驱动器、紧密盘(CD)、数字视频光盘(DVD)、数字磁带、存储器、ROM或RAM等等。
在一些实施方式中,信号承载介质901可以包含计算机可记录介质904,诸如但不限于,存储器、读/写(R/W)CD、R/W DVD、等等。在一些实施方式中,信号承载介质901可以包含通信介质905,诸如但不限于,数字和/或模拟通信介质(例如,光纤电缆、波导、有线通信链路、无线通信链路、等等)。因此,例如,信号承载介质901可以由无线形式的通信介质905(例如,遵守IEEE 802.9标准或者其它传输协议的无线通信介质)来传达。
一个或多个程序指令902可以是,例如,计算机可执行指令或者逻辑实施指令。在一些示例中,计算设备的计算设备可以被配置为,响应于通过计算机可读介质903、计算机可记录介质904、和/或通信介质905中的一个或多个传达到计算设备的程序指令902,提供各种操作、功能、或者动作。
应该理解,这里描述的布置仅仅是用于示例的目的。因而,本领域技术人员将理解,其它布置和其它元素(例如,机器、接口、功能、顺序、和功能组等等)能够被取而代之地使用,并且一些元素可以根据所期望的结果而一并省略。另外,所描述的元素中的许多是可以被实现为离散的或者分布式的组件的、或者以任何适当的组合和位置来结合其它组件实施的功能实体。
所属领域的技术人员可以清楚地了解到,为描述的方便和简洁,上述描述的系统,装置和单元的具体工作过程,可以参考前述方法实施例中的对应过程,在此不再赘述。
在本申请所提供的几个实施例中,应该理解到,所揭露的系统,装置和方法,可以通过其它的方式实现。例如,以上所描述的装置实施例仅仅是示意性的,例如,所述单元的划分,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式,例如多个单元或组件可以结合或者可以集成到另一个系统,或一些特征可以忽略,或不执行。另一点,所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口,装置或单元的间接耦合或通信连接,可以是电性,机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的,作为单元显示的部件可以是或者也可以不是物理单元,即可以位于一个地方,或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外,在本申请各个实施例中的各功能单元可以集成在一个处理单元中,也可以是各个单元单独物理存在,也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现,也可以采用软件功能单元的形式实现。
所述集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时,可以存储在一个计算机可读取存储介质中。基于这样的理解,本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来,该计算机软件产品存储在一个存储介质中,包括若干指令用以使得一台计算机设备(可以是个人计算机,服务器,或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括:U盘、移动硬盘、只读存储器、随机存取存储器、磁碟或者光盘等各种可以存储程序代码的介质。

Claims (12)

  1. 一种数据存储方法,其特征在于,包括:
    将目标数据存储至第一存储器,所述第一存储器为内存储器;
    向第二存储器发送第一指令,所述第一指令包括所述目标数据,所述第一指令用于指示所述第二存储器写入所述目标数据,所述第二存储器为外存储器,所述第二存储器包括易失性存储器和非易失性存储器,所述易失性存储器用于临时存储待写入至所述非易失性存储器的所述目标数据,所述非易失性存储器用于存储所述目标数据;
    在所述第二存储器复位后,基于所述第一存储器中的所述目标数据恢复所述第二存储器中的数据。
  2. 根据权利要求1所述的方法,其特征在于,所述在所述第二存储器复位后,基于所述第一存储器中的所述目标数据恢复所述第二存储器中的数据包括:
    获取所述第二存储器发送的第一消息,所述第一消息用于指示所述第二存储器复位成功;
    向所述第二存储器发送第二指令,所述第二指令是根据所述第一存储器中的所述目标数据生成的,所述第二指令包括所述目标数据,所述第二指令用于指示所述第二存储器写入所述目标数据。
  3. 根据权利要求2所述的方法,其特征在于,所述方法还包括:
    获取所述第二存储器发送的第二消息,所述第二消息用于指示所述第二存储器出现异常;
    向所述第二存储器发送第三指令,所述第三指令用于指示所述第二存储器执行复位操作。
  4. 根据权利要求1-3任意一项所述的方法,其特征在于,所述方法还包括:
    获取所述第二存储器发送的第三消息,所述第三消息用于指示所述目标数据已写入至所述非易失性存储器;
    删除所述第一存储器中的所述目标数据。
  5. 根据权利要求1-3任意一项所述的方法,其特征在于,所述将目标数据存储至第一存储器,包括:
    将所述目标数据存储至所述第一存储器中的目标存储空间,所述目标存储空间为预分配的存储空间。
  6. 根据权利要求5所述的方法,其特征在于,所述目标存储空间的容量大于或等于所述易失性存储器的容量。
  7. 根据权利要求5或6所述的方法,其特征在于,所述方法还包括:
    向所述第二存储器发送第四指令,所述第四指令用于查询所述易失性存储器中所存储的数据;
    获取所述第二存储器发送的第四消息,所述第四消息用于指示所述易失性存储器中所存储的第一数据;
    删除所述第一存储器中的第二数据,所述第二数据和所述第一数据均包含于所述目标数据中,且所述第一数据和所述第二数据不同。
  8. 根据权利要求7所述的方法,其特征在于,所述向所述第二存储器发送第四指令,包括:
    若所述第二存储器执行指令的方式为乱序执行,且所述目标存储空间所存储的数据的数据量大于或等于预设阈值,则向所述第二存储器发送所述第四指令。
  9. 根据权利要求5或6所述的方法,其特征在于,所述方法还包括:
    若所述第二存储器执行指令的方式为顺序执行,且所述目标存储空间所存储的数据的数据量大于或等于预设阈值,则删除所述目标存储空间中的第三数据,所述第三数据为所述目标存储空间中最先写入所述目标存储空间的数据。
  10. 一种终端,其特征在于,包括内存储器、外存储器和处理器;所述外存储器或所述内存储器存储有代码,所述处理器被配置为执行所述代码,当所述代码被执行时,所述终端执行如权利要求1至9任一项所述的方法。
  11. 一种计算机可读存储介质,其特征在于,包括计算机可读指令,当所述计算机可读指令在计算机上运行时,使得所述计算机执行如权利要求1至9中任一项所述的方法。
  12. 一种计算机程序产品,其特征在于,包括计算机可读指令,当所述计算机可读指令在计算机上运行时,使得所述计算机执行如权利要求1至9任一项所述的方法。
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105117308A (zh) * 2015-09-29 2015-12-02 联想(北京)有限公司 一种数据处理方法、装置和系统
CN106933706A (zh) * 2017-03-10 2017-07-07 联想(北京)有限公司 非易失性内存的掉电保护方法及装置
CN107765990A (zh) * 2016-08-17 2018-03-06 中兴通讯股份有限公司 一种系统磁盘管理方法和装置
US20200151068A1 (en) * 2018-11-14 2020-05-14 International Business Machines Corporation Dispersed storage network failover units used to improve local reliability
CN111581018A (zh) * 2020-04-20 2020-08-25 深圳震有科技股份有限公司 一种数据恢复方法、智能终端及存储介质

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105117308A (zh) * 2015-09-29 2015-12-02 联想(北京)有限公司 一种数据处理方法、装置和系统
CN107765990A (zh) * 2016-08-17 2018-03-06 中兴通讯股份有限公司 一种系统磁盘管理方法和装置
CN106933706A (zh) * 2017-03-10 2017-07-07 联想(北京)有限公司 非易失性内存的掉电保护方法及装置
US20200151068A1 (en) * 2018-11-14 2020-05-14 International Business Machines Corporation Dispersed storage network failover units used to improve local reliability
CN111581018A (zh) * 2020-04-20 2020-08-25 深圳震有科技股份有限公司 一种数据恢复方法、智能终端及存储介质

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