WO2022228333A1 - 一种基于amd平台的点灯方法、装置、设备及可读介质 - Google Patents

一种基于amd平台的点灯方法、装置、设备及可读介质 Download PDF

Info

Publication number
WO2022228333A1
WO2022228333A1 PCT/CN2022/088711 CN2022088711W WO2022228333A1 WO 2022228333 A1 WO2022228333 A1 WO 2022228333A1 CN 2022088711 W CN2022088711 W CN 2022088711W WO 2022228333 A1 WO2022228333 A1 WO 2022228333A1
Authority
WO
WIPO (PCT)
Prior art keywords
hard disk
status information
cpu
nvme
cpld
Prior art date
Application number
PCT/CN2022/088711
Other languages
English (en)
French (fr)
Inventor
谢武志
Original Assignee
山东英信计算机技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 山东英信计算机技术有限公司 filed Critical 山东英信计算机技术有限公司
Priority to US18/270,171 priority Critical patent/US20240045751A1/en
Publication of WO2022228333A1 publication Critical patent/WO2022228333A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766—Error or fault reporting or storing
    • G06F11/0772—Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/32—Monitoring with visual or acoustical indication of the functioning of the machine
    • G06F11/324—Display of status information
    • G06F11/325—Display of status information by lamps or LED's
    • G06F11/326—Display of status information by lamps or LED's for error or online/offline status
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/073—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3089—Monitoring arrangements determined by the means or processing involved in sensing the monitored data, e.g. interfaces, connectors, sensors, probes, agents
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026—PCI express

Definitions

  • the present application relates to the field of server technology, and in particular, to a lighting method, apparatus, device and readable medium based on an AMD platform.
  • the server of the platform, the control method of NVME hard disk lighting is mainly that the CPU transmits the VPP format information to the backplane CPLD through the I2C (Inter-Integrated Circuit, serial transmission bus) interface, and the CPLD obtains the lamp information that needs to be lit from the VPP format information.
  • I2C Inter-Integrated Circuit, serial transmission bus
  • VPP format Bit bit information includes: Bit7 output represents EMIL (Electro-Mechanical Interlock Control, Electro-Mechanical Interlock Control) information; Bit6 input represents manual fixed latch sensing presence information; Bit5 input represents PWRFLT (Power Fault, power error) Information; Bit4 input represents PRSNT (Drive Present status, PCIE card in-position status) information, 0 means present, 1 means not in place; Bit3 input represents Button (button) information, 0 means pressed, 1 means not pressed; Bit2 The output represents PWREN (Power Enable, power start) information, 0 means the power supply is enabled, 1 means the power supply is not enabled; Bit1 output represents the PWRLED (Power LED, power light signal) information, which is equivalent to the in-position light signal under the SFF8485 specification; Bit0 output represents ATNLED (attention light) information, which is equivalent to the error light under the SFF8485 specification.
  • EMIL Electro-Mechanical Interlock Control
  • Bit6 input represents manual fixed latch sensing presence information
  • the Enterprise mode in the platform does not define an error signal. In this mode, nothing like Bit 0 in VPP is used to display the error light.
  • the VPP format information includes: Bit3 input represents Reserved (reserved) information; Bit2 output represents DUALPORTEN (dual port enable) information; Bit1 output represents IFDET (interface detection signal) information; Bit0 represents PRSNT (in-position signal) information.
  • FIG 1 shows the prior art Schematic diagram of platform lighting control.
  • the CPU central processing unit is connected to the CPLD backplane through the VPP virtual pin port, and is connected to the NVME hard disk through PCIE.
  • the NVME hard disk sends IFDET information, PRSNT information and ACTLED information to the CPLD backplane, and the CPLD backplane sends the NVME hard disk. Send hard disk power enable information.
  • Figure 2 shows the prior art The information corresponding to the platform VPP pins, as shown in Figure 2, The VPP in the enterprise mode of the platform only defines the IFDET information, PRSNT information and DUALPORTEN, and does not include the error light signal. At the same time, the control of the LED ACT light is controlled by the ACTLED information sent by the CPLD backplane through the hard disk.
  • One aspect of the embodiments of the present application provides a lighting method based on an AMD platform, comprising the following steps: sending packets in groups to the NVME hard disk management system by the CPU to obtain status information of the NVME hard disk; sending to the CPLD backplane; and in response to receiving the status information, the CPLD backplane lights up a corresponding error light based on the status information.
  • sending packets by the CPU to the NVME hard disk management system to obtain the status information of the NVME hard disk includes: sending the first group of commands to the NVME hard disk management system by the CPU, and judging whether a response is received within a preset time. Transmit NVME error status information; in response to receiving the returned NVME error status information, send the next set of commands to the NVME hard disk management system; in response to not receiving the returned NVME error status information within the preset time After the time elapses, send the next set of commands to the NVME hard disk management system.
  • the method further includes: sending, by the CPU, the status information to the CPLD backplane through the BMC in response to receiving the returned NVME error status information.
  • sending packets by the CPU to the NVME hard disk management system to obtain the status information of the NVME hard disk includes: sending, by the CPU, a management component transmission protocol packet to the NVME hard disk management system group to obtain the status information of the NVME hard disk.
  • sending packets by the CPU to the NVME hard disk management system to obtain the status information of the NVME hard disk includes: sending, by the CPU, a transmission protocol packet to the NVME hard disk management system through the PCIE interface to obtain the status information of the NVME hard disk.
  • sending the obtained status information by the CPU to the CPLD backplane through the BMC includes: sending the obtained status information by the CPU to the BMC through the system management bus SMBUS; receiving the status information sent by the CPU by the BMC, and sending the status information to the BMC The information is sent to the CPLD backplane through the system management bus SMBUS.
  • the CPLD backplane lighting the corresponding error light based on the status information includes: in response to receiving the status information, the CPLD backplane finding the error corresponding to the faulty hard disk based on the status information Lamp number; the corresponding lamp will be lit by the CPLD backplane based on the error lamp number.
  • a lighting device based on an AMD platform including: a first module, configured to be configured to send packets in groups by the CPU to the NVME hard disk management system to obtain status information of the NVME hard disk; The second module is configured for the CPU to send the acquired status information to the CPLD backplane through the BMC; and the third module is configured for, in response to receiving the status information, the CPLD backplane points the corresponding error lights based on the status information Bright.
  • a computer device including: at least one processor; and a memory, where the memory stores computer-readable instructions that can be executed on the processor, and the computer-readable instructions are processed by the at least one processor.
  • the processor executes the steps of the AMD platform-based lighting method in any of the foregoing embodiments.
  • a computer-readable storage medium stores computer-readable instructions that can be executed on a processor, and when the computer-readable instructions are executed by at least one processor , at least one processor executes the steps of the AMD platform-based lighting method in any of the foregoing embodiments.
  • Fig. 1 is the schematic diagram of AMD platform lighting control in the prior art
  • Fig. 2 is the structural representation of information corresponding to AMD platform VPP pins in the prior art
  • FIG. 3 is a schematic diagram of an embodiment of an AMD platform-based lighting method according to one or more embodiments
  • FIG. 4 is a schematic structural diagram of an embodiment of an AMD platform-based lighting method according to one or more embodiments
  • FIG. 5 is a schematic diagram of an embodiment of a lighting device based on an AMD platform in accordance with one or more embodiments;
  • FIG. 6 is a schematic diagram of an embodiment of a computer device in accordance with one or more embodiments.
  • FIG. 7 is a schematic diagram of an embodiment of a computer-readable storage medium in accordance with one or more embodiments.
  • an embodiment of the present application provides a lighting method based on an AMD platform.
  • FIG. 3 shows a schematic diagram of a lighting method based on an AMD platform provided by an embodiment of the present application. As shown in Figure 3, the embodiment of the present application includes the following steps:
  • the obtained status information is sent by the CPU to the CPLD backplane through the BMC;
  • the CPLD backplane lights the corresponding error light based on the status information.
  • the CPU communicates with the NVME HDD Management Interface through the PCIE interface; the CPU transmits the MCTP packet to obtain whether the internal state of the NVME HDD is correct; after the CPU obtains the state, it transmits it to the BMC through the SMBUS; the BMC transmits it to the BMC through the SMBUS.
  • CPLD CPLD then lights LED_ERROR according to the internal state of NVME.
  • FIG. 4 shows a schematic structural diagram of a lighting method based on an AMD platform provided by an embodiment of the present application.
  • the full name of the CPU is Central Processing Unit, the central processing unit, which is one of the main equipment of electronic computers, the core accessories in the computer, and its function is mainly to interpret computer-readable instructions and process data in computer software;
  • the full name of PCIE Peripheral Component Interconnect Express which belongs to high-speed serial point-to-point dual-channel high-bandwidth transmission, the connected devices allocate exclusive channel bandwidth and do not share bus bandwidth;
  • NVME full name Non-Volatile Memory Express, non-volatile memory, NVME hard disk management system includes NVME PIC function controller, management endpoint and management interface controller; BMC full name Board Management Controller, baseboard management controller, by monitoring the power supply, temperature, etc.
  • CPLD full name Complex Programmable Logic Device, complex Programmable logic device, using CMOS EPROM, EEPROM, flash memory and SRAM and other programming technologies, thus constitutes a high-density, high-speed and low-power programmable logic device
  • VPP full name Virtual Pin Port, virtual pin port.
  • the central processing unit CPU interacts with the NVME through PCIE, and sends information to the baseboard management controller BMC through the system management bus SMBUS (System Management Bus).
  • the baseboard management controller BMC sends information to the complex programmable controller through the system management bus SMBUS.
  • the logic device CPLD sends information, and the complex programmable logic device CPLD displays the error LED_ERROR.
  • the NVME hard disk management system includes the NVME PIC function controller NVMe Controller PIC Function, the management endpoint Management Endpoint and the management interface controller Controller Management Interface.
  • the NVME hard disk management system sends the interface detection signal information IFDET, the in-position signal information PRSNT and the active signal information ACT.
  • the complex programmable logic device CPLD backplane sends the hard disk power enable information HDD Power EN to the NVME hard disk management system, and the central processing unit CPU sends the complex programmable logic through the virtual pin port VPP.
  • the CPLD backplane of the device sends VPP format information, and the CPLD backplane of the complex programmable logic device displays the active light signal LED_ACT.
  • the enterprise mode in the AMD platform does not define an error light signal.
  • AMD does not have a bit 0 similar to the Intel VPP for displaying the error light signal.
  • AMD's VPP format information includes: Bit3 input represents Reserved (reserved) information; Bit2 output represents DUALPORTEN (dual port enable) information; Bit1 output represents IFDET (interface detection signal) information; Bit0 represents PRSNT (in-position signal) information.
  • the CPU central processing unit is connected to the CPLD backplane through the VPP virtual pin port, and is connected to the NVME hard disk through PCIE.
  • the NVME hard disk sends IFDET information, PRSNT information and ACTLED information to the CPLD backplane, and the CPLD backplane sends the hard disk power enable to the NVME hard disk. information.
  • the problem that the error light information cannot be transmitted through the VPP in the enterprise mode of the AMD platform, so that the error light cannot be lit, is solved.
  • the CPU obtains the internal state of the hard disk and controls the CPLD to light the error light through the BMC. Support the control of error lights in enterprise mode of AMD platform.
  • sending packets by groups to the NVME hard disk management system by the CPU to obtain the status information of the NVME hard disk includes: sending the first group of commands to the NVME hard disk management system by the CPU, and judging whether there is a Receive the returned NVME error status information; in response to receiving the returned NVME error status information, send the next set of commands to the NVME hard disk management system; in response to not receiving the returned NVME error status information within a preset time, Send the next set of commands to the NVME hard disk management system after a preset time has elapsed.
  • the CPU sends the command byte 0 to the command byte 9 to the NVME hard disk management system, and judges whether the status information of the returned NVME error is received within a preset time; in response to receiving the returned NVME error If the status information of the NVME is not received within the preset time or the status information of the NVME error is not received within the preset time, continue to send the command byte 10 to the command byte 15 to the NVME hard disk management system until all the internal status information of the NVME hard disk is confirmed whether there is any error.
  • the lighting method based on the AMD platform further includes: in response to receiving and returning the status information of the NVME error, sending the status information by the CPU to the CPLD backplane through the BMC.
  • sending a packet by the CPU to the NVME hard disk management system to obtain the status information of the NVME hard disk includes: sending a management component transmission protocol packet by the CPU to the NVME hard disk management system to obtain the status of the NVME hard disk information.
  • the packet means that the data must undergo some processing in the communication system before it can be transmitted in the network. For example, after the data is cut into several blocks, it can be transmitted on the network according to a certain communication protocol. Delivery, a process that is like packing a package, is called subsealing.
  • sending a packet by the CPU to the NVME hard disk management system to obtain the status information of the NVME hard disk includes: sending a transmission protocol packet by the CPU to the NVME hard disk management system through the PCIE interface to obtain the NVME hard disk information. status information.
  • sending the obtained status information by the CPU to the CPLD backplane through the BMC includes: sending the obtained status information by the CPU to the BMC through the system management bus SMBUS; receiving the status information sent by the CPU by the BMC, And send the status information to the CPLD backplane through the system management bus SMBUS.
  • the CPLD backplane lighting the corresponding error light based on the status information includes: in response to receiving the status information, the CPLD backplane finding the faulty hard disk based on the status information Corresponding error light number; the corresponding light will be lit by the CPLD backplane based on the error light number.
  • This application solves the problem that the error light information cannot be transmitted through the VPP in the enterprise mode of the AMD platform, so the error light cannot be turned on.
  • the CPU obtains the internal state of the hard disk and controls the CPLD to light the error light through the BMC, thus realizing the enterprise mode of the AMD platform.
  • the control of error lights is supported below.
  • an embodiment of the present application provides a lighting device based on an AMD platform.
  • FIG. 5 is a schematic diagram of a lighting device based on an AMD platform provided by an embodiment of the present application.
  • the embodiment of the present application includes the following modules: the first module S11 is configured to send packets in groups to the NVME hard disk management system by the CPU to obtain the status information of the NVME hard disk; the second module S12 is configured to be configured by the NVME hard disk management system.
  • the CPU sends the acquired status information to the CPLD backplane through the BMC; and the third module S13 is configured to, in response to receiving the status information, cause the CPLD backplane to light up the corresponding error light based on the status information.
  • the first module S11 is further configured to: send the first group of commands to the NVME hard disk management system by the CPU, and determine whether the status information of the NVME error is received within a preset time; After receiving the returned NVME error status information, send the next set of commands to the NVME hard disk management system; in response to not receiving the returned NVME error status information within the preset time, send the NVME hard disk management system to the NVME hard disk management system after the preset time. Send the next set of commands.
  • the first module S11 is further configured to: in response to receiving the returned state information of the NVME error, the CPU sends the state information to the CPLD backplane through the BMC.
  • the first module S11 is further configured to: send the management component transmission protocol packet by the CPU to the NVME hard disk management system, so as to obtain the status information of the NVME hard disk.
  • the first module S11 is further configured to: send the transmission protocol packet by the CPU to the NVME hard disk management system through the PCIE interface, so as to obtain the status information of the NVME hard disk.
  • the second module S12 is further configured to: the CPU sends the acquired status information to the BMC through the system management bus SMBUS; the BMC receives the status information sent by the CPU, and sends the status information through the system management The bus SMBUS is sent to the CPLD backplane.
  • the third module S13 is further configured to: in response to receiving the status information, the CPLD backplane finds the error light number corresponding to the faulty hard disk based on the status information; The corresponding lamp lights up.
  • FIG. 6 shows a schematic diagram of a computer device provided by an embodiment of the present application.
  • the embodiment of the present application includes the following devices: at least one processor S21; and a memory S22, where the memory S22 stores computer-readable instructions S23 that can be executed on the processor, and the computer-readable instructions S23 are processed by at least one
  • the device S21 is executed, at least one processor S23 executes the steps of the lighting method based on the AMD platform in any of the above-mentioned embodiments: the CPU sends packets to the NVME hard disk management system to obtain the status information of the NVME hard disk; The status information is sent to the CPLD backplane through the BMC; and in response to receiving the status information, the CPLD backplane lights up a corresponding error light based on the status information.
  • sending packets by groups to the NVME hard disk management system by the CPU to obtain the status information of the NVME hard disk includes: sending the first group of commands to the NVME hard disk management system by the CPU, and judging whether there is a Receive the returned NVME error status information; in response to receiving the returned NVME error status information, send the next set of commands to the NVME hard disk management system; in response to not receiving the returned NVME error status information within a preset time, Send the next set of commands to the NVME hard disk management system after a preset time has elapsed.
  • the method further includes: in response to receiving and returning the status information of the NVME error, the CPU sends the status information to the CPLD backplane through the BMC.
  • sending a packet by the CPU to the NVME hard disk management system to obtain the status information of the NVME hard disk includes: sending a management component transmission protocol packet by the CPU to the NVME hard disk management system to obtain the status of the NVME hard disk information.
  • sending a packet by the CPU to the NVME hard disk management system to obtain the status information of the NVME hard disk includes: sending a transmission protocol packet by the CPU to the NVME hard disk management system through the PCIE interface to obtain the NVME hard disk information. status information.
  • sending the obtained status information by the CPU to the CPLD backplane through the BMC includes: sending the obtained status information by the CPU to the BMC through the system management bus SMBUS; receiving the status information sent by the CPU by the BMC, And send the status information to the CPLD backplane through the system management bus SMBUS.
  • the CPLD backplane lighting the corresponding error light based on the status information includes: in response to receiving the status information, the CPLD backplane finding the faulty hard disk based on the status information Corresponding error light number; the corresponding light will be lit by the CPLD backplane based on the error light number.
  • FIG. 7 shows a schematic diagram of a non-volatile computer-readable storage medium provided by an embodiment of the present application.
  • the non-volatile computer-readable storage medium S31 stores computer-readable instructions S32 that can be executed on the processor.
  • the computer-readable instructions S32 are executed by at least one processor, at least one processor executes the above The steps of the AMD platform-based lighting method in any one of the embodiments.
  • the computer-readable instructions of the lighting method based on the AMD platform can Stored in a computer-readable storage medium, the computer-readable instructions, when executed, may include the processes of the foregoing method embodiments.
  • the storage medium of the computer-readable instructions may be a magnetic disk, an optical disk, a read only memory (ROM), or a random access memory (RAM), or the like.
  • the above-mentioned embodiments of the computer-readable instructions can achieve the same or similar effects as any of the foregoing method embodiments corresponding thereto.
  • the steps and system units of the lighting method based on the AMD platform can also be implemented by using a controller and a computer-readable storage medium for storing computer-readable instructions for enabling the controller to implement the functions of the above steps or units.
  • functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium.
  • Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of computer-readable instructions from one place to another.
  • a storage medium can be any available medium that can be accessed by a general purpose or special purpose computer.
  • the computer-readable medium may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage devices, magnetic disk storage devices or other magnetic storage devices, or may be used to carry or store instructions in the form of or data structures and any other medium that can be accessed by a general purpose or special purpose computer or a general purpose or special purpose processor. Also, any connection is properly termed a computer-readable medium.
  • coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave are used to send software from a website, server, or other remote source
  • coaxial cable Cable, fiber optic cable, twisted pair, DSL or wireless technologies such as infrared, radio and microwave are all included in the definition of medium.
  • magnetic disks and optical disks include compact disks (CDs), laser disks, optical disks, digital versatile disks (DVDs), floppy disks, blu-ray disks, where disks usually reproduce data magnetically, while optical disks reproduce data optically with lasers . Combinations of the above should also be included within the scope of computer-readable media.
  • the storage medium can be a read-only memory, a magnetic disk or an optical disk, and the like.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Debugging And Monitoring (AREA)
  • Circuit Arrangement For Electric Light Sources In General (AREA)

Abstract

本申请公开了一种基于AMD平台的点灯方法，包括以下步骤：由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息；由CPU将获取的状态信息通过BMC发送给CPLD背板；以及响应于接收到状态信息，由CPLD背板基于状态信息将对应的错误灯号点亮。本申请还公开了一种基于AMD平台的点灯装置、计算机设备和可读存储介质。

Description

一种基于AMD平台的点灯方法、装置、设备及可读介质
相关申请的交叉引用
本申请要求于2021年4月25日提交中国专利局，申请号为202110450144.7，申请名称为“一种基于AMD平台的点灯方法、装置、设备及可读介质”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及服务器技术领域，尤其涉及一种基于AMD平台的点灯方法、装置、设备及可读介质。
背景技术
在
Figure PCTCN2022088711-appb-000001
平台的服务器，NVME硬盘点灯的控制方式主要是CPU通过I2C(Inter-Integrated Circuit，串行传输总线)接口传送VPP格式信息到背板CPLD，CPLD从VPP格式信息获取需要点灯的灯号信息，其中，VPP格式Bit位信息包括：Bit7输出代表EMIL(Electro-Mechanical Interlock Control，电子机械联锁控制)信息；Bit6输入代表手动固定闩锁感应在位信息；Bit5输入代表PWRFLT(Power Fault，电源错误)信息；Bit4输入代表PRSNT(Drive Present status，PCIE卡在位状态)信息，0表示在位，1表示不在位；Bit3输入代表Button(按钮)信息，0表示按下，1表示未按下；Bit2输出代表PWREN(Power Enable，电源启动)信息，0表示电源使能，1表示电源未使能；Bit1输出代表PWRLED(Power LED，电源灯号)信息，相当于SFF8485规范下的在位灯号；Bit0输出代表ATNLED(注意灯号)信息，相当于SFF8485规范下的错误灯号。
但
Figure PCTCN2022088711-appb-000002
平台中的Enterprise企业模式，并未定义到错误灯号，在此模式下，
Figure PCTCN2022088711-appb-000003
没有类似于
Figure PCTCN2022088711-appb-000004
VPP中的Bit 0用来显示错误灯号。
Figure PCTCN2022088711-appb-000005
的VPP格式信息包括：Bit3输入代表Reserved(保留)信息；Bit2输出代表DUALPORTEN(双端口使能)信息；Bit1输出代表IFDET(接口检测信号)信息；Bit0代表PRSNT(在位信号)信息。
图1为现有技术中
Figure PCTCN2022088711-appb-000006
平台点灯控制示意图，CPU中央处理器通过VPP虚拟管脚 端口连接到CPLD背板，通过PCIE连接到NVME硬盘，NVME硬盘向CPLD背板发送IFDET信息、PRSNT信息和ACTLED信息，CPLD背板向NVME硬盘发送硬盘电源使能信息。图2示出的是现有技术
Figure PCTCN2022088711-appb-000007
平台VPP管脚对应的信息，如图2所示，
Figure PCTCN2022088711-appb-000008
平台Enterprise企业模式下的VPP只定义了IFDET信息、PRSNT信息和DUALPORTEN，并没有包含错误灯号，同时LED ACT灯的控制是CPLD背板通过硬盘发送的ACTLED信息进行控制的。
发明内容
本申请实施例的一方面提供了一种基于AMD平台的点灯方法，包括以下步骤：由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息；由CPU将获取的状态信息通过BMC发送给CPLD背板；以及响应于接收到状态信息，由CPLD背板基于状态信息将对应的错误灯号点亮。
在一些实施方式中，由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息包括：由CPU向NVME硬盘管理系统发送第一组命令，并判断预设时间内是否有接收到回传NVME错误的状态信息；响应于接收到回传NVME错误的状态信息,向NVME硬盘管理系统发送下一组命令；响应于预设时间内没有接收到回传NVME错误的状态信息，在预设时间经过后向NVME硬盘管理系统发送下一组命令。
在一些实施方式中，还包括：响应于接收回传NVME错误的状态信息，由CPU将状态信息通过BMC发送给CPLD背板。
在一些实施方式中，由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息包括：由CPU向NVME硬盘管理系统分组发送管理组件传输协议封包，以获取NVME硬盘的状态信息。
在一些实施方式中，由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息包括：由CPU通过PCIE接口向NVME硬盘管理系统分组发送传输协议封包，以获取NVME硬盘的状态信息。
在一些实施方式中，由CPU将获取的状态信息通过BMC发送给CPLD背板包括：由CPU将获取的状态信息通过系统管理总线SMBUS发送给BMC；由BMC接收CPU发送的状态信息，并将状态信息通过系统管理总线SMBUS发送给CPLD背板。
在一些实施方式中，响应于接收到状态信息，由CPLD背板基于状态信息将对应的错误灯号点亮包括：响应于接收到状态信息，由CPLD背板基于状态信息找到错误硬盘 对应的错误灯号；由CPLD背板基于错误灯号将对应的灯点亮。
本申请实施例的另一方面，还提供了一种基于AMD平台的点灯装置，包括：第一模块，配置用于由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息；第二模块，配置用于由CPU将获取的状态信息通过BMC发送给CPLD背板；以及第三模块，配置用于响应于接收到状态信息，由CPLD背板基于状态信息将对应的错误灯号点亮。
本申请实施例的再一方面，还提供了一种计算机设备，包括：至少一个处理器；以及存储器，存储器存储有可在处理器上运行的计算机可读指令，计算机可读指令由至少一个处理器执行时，至少一个处理器执行上述任一实施例中基于AMD平台的点灯方法的步骤。
本申请实施例的再一方面，还提供了一种计算机可读存储介质，计算机可读存储介质存储有可在处理器上运行的计算机可读指令，计算机可读指令由至少一个处理器执行时，至少一个处理器执行上述任一实施例中基于AMD平台的点灯方法的步骤。
附图说明
为了更清楚地说明本申请实施例或相关技术方案，下面将对实施例或相关描述中可能涉及的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是涉及本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的实施例。
图1为现有技术中AMD平台点灯控制的示意图；
图2为现有技术中AMD平台VPP管脚对应信息的结构示意图；
图3为根据一个或多个实施例中的基于AMD平台的点灯方法的实施例的示意图；
图4为根据一个或多个实施例中的基于AMD平台的点灯方法的实施例的结构示意图；
图5为根据一个或多个实施例中的基于AMD平台的点灯装置的实施例的示意图；
图6为根据一个或多个实施例中的计算机设备的实施例的示意图；
图7为根据一个或多个实施例中的计算机可读存储介质的实施例的示意图。
具体实施方式
为使本申请的技术方案和优点更加清楚明白，以下结合具体实施例，并参照附图，对本申请实施例进一步详细说明。
需要说明的是，本申请实施例中所有使用“第一”和“第二”的表述均是为了区分两个相同名称非相同的实体或者非相同的参量，可见“第一”“第二”仅为了表述的方便，不应理解为对本申请实施例的限定，后续实施例对此不再一一说明。
在第一方面，本申请实施例提供了一种基于AMD平台的点灯方法。图3示出的是本申请实施例提供的基于AMD平台的点灯方法的示意图。如图3所示，本申请实施例包括如下步骤：
S01、由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息；
S02、由CPU将获取的状态信息通过BMC发送给CPLD背板；以及
S03、响应于接收到状态信息，由CPLD背板基于状态信息将对应的错误灯号点亮。
在本实施例中，CPU透过PCIE接口与NVME HDD Management Interface通信；CPU传送MCTP封包，获得NVME HDD内部状态是否有误；CPU取得状态后，透过SMBUS传送给BMC；BMC透过SMBUS传送给CPLD；CPLD再根据获得NVME内部的状态来点LED_ERROR灯号。
图4示出的是本申请实施例提供的基于AMD平台的点灯方法的结构示意图。如图4所示，CPU全称Central Processing Unit，中央处理器，是电子计算机的主要设备之一，电脑中的核心配件，其功能主要是解释计算机可读指令以及处理计算机软件中的数据；PCIE全称Peripheral Component Interconnect Express，属于高速串行点对点双通道高带宽传输，所连接的设备分配独享通道带宽，不共享总线带宽；NVME全称Non-Volatile Memory Express，非易失性存储器，NVME硬盘管理系统包括NVME PIC功能控制器、管理终点和管理界面控制器；BMC全称Board Management Controller，基板管理控制器，通过监控系统的电源、温度等来保证系统处于正常运行的状态；CPLD全称Complex Programmable Logic Device，复杂可编程逻辑器件，采用CMOS EPROM、EEPROM、快闪存储器和SRAM等编程技术，从而构成了高密度、高速度和低功耗的可编程逻辑器件；VPP全称Virtual Pin Port，虚拟管脚端口。
在本实施例中，中央处理器CPU通过PCIE与NVME进行交互，通过系统管理总线SMBUS(System Management Bus)向基板管理控制器BMC发送信息，基板管理控制器BMC通过系统管理总线SMBUS向复杂可编程逻辑器件CPLD发送信息，复杂可编程逻 辑器件CPLD显示错误灯号LED_ERROR。NVME硬盘管理系统包括NVME PIC功能控制器NVMe Controller PIC Function、管理终点Management Endpoint和管理界面控制器Controller Management Interface，NVME硬盘管理系统将接口检测信号信息IFDET、在位信号信息PRSNT和活动信号信息ACT发送给复杂可编程逻辑器件CPLD背板，复杂可编程逻辑器件CPLD背板将硬盘电源使能信息HDD Power EN发送给NVME硬盘管理系统，同时中央处理器CPU通过虚拟管脚端口VPP向复杂可编程逻辑器件CPLD背板发送VPP格式信息，复杂可编程逻辑器件CPLD背板显示活动灯号LED_ACT。
在本实施例中，AMD平台中的Enterprise企业模式，并未定义到错误灯号，在此模式下，AMD没有类似于Intel VPP中的Bit 0用来显示错误灯号。AMD的VPP格式信息包括：Bit3输入代表Reserved(保留)信息；Bit2输出代表DUALPORTEN(双端口使能)信息；Bit1输出代表IFDET(接口检测信号)信息；Bit0代表PRSNT(在位信号)信息。CPU中央处理器通过VPP虚拟管脚端口连接到CPLD背板，通过PCIE连接到NVME硬盘，NVME硬盘向CPLD背板发送IFDET信息、PRSNT信息和ACTLED信息，CPLD背板向NVME硬盘发送硬盘电源使能信息。
在本实施例中，解决了AMD平台企业模式下无法通过VPP传送错误灯号信息，从而无法点错误灯号的问题，通过CPU获取硬盘内部状态从而通过BMC控制CPLD点亮错误灯号，实现了AMD平台企业模式下支持错误灯号的控制。
在本申请的一些实施例中，由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息包括：由CPU向NVME硬盘管理系统发送第一组命令，并判断预设时间内是否有接收到回传NVME错误的状态信息；响应于接收到回传NVME错误的状态信息,向NVME硬盘管理系统发送下一组命令；响应于预设时间内没有接收到回传NVME错误的状态信息，在预设时间经过后向NVME硬盘管理系统发送下一组命令。
在本实施例中，由CPU向NVME硬盘管理系统发送命令字节0到命令字节9，并判断预设时间内是否有接收到回传NVME错误的状态信息；响应于接收到回传NVME错误的状态信息或预设时间内没有接收到回传NVME错误的状态信息，继续向NVME硬盘管理系统发送命令字节10到命令字节15，直到所有的NVME硬盘内部状态信息全部确认是否有错误。
在本申请的一些实施例中，基于AMD平台的点灯方法还包括：响应于接收回传NVME错误的状态信息，由CPU将状态信息通过BMC发送给CPLD背板。
在本申请的一些实施例中，由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息包括：由CPU向NVME硬盘管理系统分组发送管理组件传输协 议封包，以获取NVME硬盘的状态信息。
在本实施例中，封包指的是数据要在通讯系统中必须要先经过某些处理，才能在网络当中传递，例如将数据切割为数个区块之后，才能在网络上依照某种通讯协议来传送，这种过程就好像将包裹打包一样，称为分封。
在本申请的一些实施例中，由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息包括：由CPU通过PCIE接口向NVME硬盘管理系统分组发送传输协议封包，以获取NVME硬盘的状态信息。
在本申请的一些实施例中，由CPU将获取的状态信息通过BMC发送给CPLD背板包括：由CPU将获取的状态信息通过系统管理总线SMBUS发送给BMC；由BMC接收CPU发送的状态信息，并将状态信息通过系统管理总线SMBUS发送给CPLD背板。
在本申请的一些实施例中，响应于接收到状态信息，由CPLD背板基于状态信息将对应的错误灯号点亮包括：响应于接收到状态信息，由CPLD背板基于状态信息找到错误硬盘对应的错误灯号；由CPLD背板基于错误灯号将对应的灯点亮。
需要特别指出的是，上述基于AMD平台的点灯方法的各个实施例中的各个步骤均可以相互交叉、替换、增加、删减，因此，这些合理的排列组合变换之于基于AMD平台的点灯方法也应当属于本申请的保护范围，并且不应将本申请的保护范围局限在实施例之上。
本申请解决了AMD平台企业模式下无法通过VPP传送错误灯号信息，从而无法点错误灯号的问题，通过CPU获取硬盘内部状态从而通过BMC控制CPLD点亮错误灯号，实现了AMD平台企业模式下支持错误灯号的控制。
在第二方面，本申请实施例提供了一种基于AMD平台的点灯装置。图5示出的是本申请实施例提供的基于AMD平台的点灯装置的示意图。如图5所示，本申请实施例包括如下模块：第一模块S11，配置用于由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息；第二模块S12，配置用于由CPU将获取的状态信息通过BMC发送给CPLD背板；以及第三模块S13，配置用于响应于接收到状态信息，由CPLD背板基于状态信息将对应的错误灯号点亮。
在本申请的一些实施例中，第一模块S11进一步配置用于：由CPU向NVME硬盘管理系统发送第一组命令，并判断预设时间内是否有接收到回传NVME错误的状态信息；响应于接收到回传NVME错误的状态信息,向NVME硬盘管理系统发送下一组命令；响应于预设时间内没有接收到回传NVME错误的状态信息，在预设时间经过后向NVME硬盘管理系统发送下一组命令。
在本申请的一些实施例中，第一模块S11进一步配置用于：响应于接收回传NVME错误的状态信息，由CPU将状态信息通过BMC发送给CPLD背板。
在本申请的一些实施例中，第一模块S11进一步配置用于：由CPU向NVME硬盘管理系统分组发送管理组件传输协议封包，以获取NVME硬盘的状态信息。
在本申请的一些实施例中，第一模块S11进一步配置用于：由CPU通过PCIE接口向NVME硬盘管理系统分组发送传输协议封包，以获取NVME硬盘的状态信息。
在本申请的一些实施例中，第二模块S12进一步配置用于：由CPU将获取的状态信息通过系统管理总线SMBUS发送给BMC；由BMC接收CPU发送的状态信息，并将状态信息通过系统管理总线SMBUS发送给CPLD背板。
在本申请的一些实施例中，第三模块S13进一步配置用于：响应于接收到状态信息，由CPLD背板基于状态信息找到错误硬盘对应的错误灯号；由CPLD背板基于错误灯号将对应的灯点亮。
在第三方面，本申请实施例提供了一种计算机设备。图6示出的是本申请实施例提供的计算机设备的示意图。如图6所示，本申请实施例包括如下装置：至少一个处理器S21；以及存储器S22，存储器S22存储有可在处理器上运行的计算机可读指令S23，计算机可读指令S23由至少一个处理器S21执行时，至少一个处理器S23执行上述任一实施例中基于AMD平台的点灯方法的步骤：由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息；由CPU将获取的状态信息通过BMC发送给CPLD背板；以及响应于接收到状态信息，由CPLD背板基于状态信息将对应的错误灯号点亮。
在本申请的一些实施例中，由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息包括：由CPU向NVME硬盘管理系统发送第一组命令，并判断预设时间内是否有接收到回传NVME错误的状态信息；响应于接收到回传NVME错误的状态信息,向NVME硬盘管理系统发送下一组命令；响应于预设时间内没有接收到回传NVME错误的状态信息，在预设时间经过后向NVME硬盘管理系统发送下一组命令。
在本申请的一些实施例中，还包括：响应于接收回传NVME错误的状态信息，由CPU将状态信息通过BMC发送给CPLD背板。
在本申请的一些实施例中，由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息包括：由CPU向NVME硬盘管理系统分组发送管理组件传输协议封包，以获取NVME硬盘的状态信息。
在本申请的一些实施例中，由CPU向NVME硬盘管理系统分组发送封包，以获取 NVME硬盘的状态信息包括：由CPU通过PCIE接口向NVME硬盘管理系统分组发送传输协议封包，以获取NVME硬盘的状态信息。
在本申请的一些实施例中，由CPU将获取的状态信息通过BMC发送给CPLD背板包括：由CPU将获取的状态信息通过系统管理总线SMBUS发送给BMC；由BMC接收CPU发送的状态信息，并将状态信息通过系统管理总线SMBUS发送给CPLD背板。
在本申请的一些实施例中，响应于接收到状态信息，由CPLD背板基于状态信息将对应的错误灯号点亮包括：响应于接收到状态信息，由CPLD背板基于状态信息找到错误硬盘对应的错误灯号；由CPLD背板基于错误灯号将对应的灯点亮。
在第四方面，本申请实施例还提供了一个或多个存储有计算机可读指令的非易失性计算机可读存储介质。图7示出的是本申请实施例提供的非易失性计算机可读存储介质的示意图。如图7所示，非易失性计算机可读存储介质S31存储有可在处理器上运行的计算机可读指令S32，计算机可读指令S32由至少一个处理器执行时，至少一个处理器执行上述任一实施例中基于AMD平台的点灯方法的步骤。
最后需要说明的是，本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程，可以通过计算机可读指令来指令相关硬件来完成，基于AMD平台的点灯方法的计算机可读指令可存储于一计算机可读取存储介质中，该计算机可读指令在执行时，可包括如上述各方法的实施例的流程。其中，计算机可读指令的存储介质可为磁碟、光盘、只读存储记忆体(ROM)或随机存储记忆体(RAM)等。上述计算机可读指令的实施例，可以达到与之对应的前述任意方法实施例相同或者相类似的效果。
此外，基于AMD平台的点灯方法步骤以及系统单元也可以利用控制器以及用于存储使得控制器实现上述步骤或单元功能的计算机可读指令的计算机可读存储介质实现。
本领域技术人员还将明白的是，结合这里的公开所描述的各种示例性逻辑块、模块、电路和算法步骤可以被实现为电子硬件、计算机软件或两者的组合。为了清楚地说明硬件和软件的这种可互换性，已经就各种示意性组件、方块、模块、电路和步骤的功能对其进行了一般性的描述。这种功能是被实现为软件还是被实现为硬件取决于具体应用以及施加给整个系统的设计约束。本领域技术人员可以针对每种具体应用以各种方式来实现的功能，但是这种实现决定不应被解释为导致脱离本申请实施例公开的范围。
在一个或多个示例性设计中，功能可以在硬件、软件、固件或其任意组合中实现。如果在软件中实现，则可以将功能作为一个或多个指令或代码存储在计算机可读介质上或通过计算机可读介质来传送。计算机可读介质包括计算机存储介质和通信介质，该通信介质包括有助于将计算机可读指令从一个位置传送到另一个位置的任何介质。存储介 质可以是能够被通用或专用计算机访问的任何可用介质。作为例子而非限制性的，该计算机可读介质可以包括RAM、ROM、EEPROM、CD-ROM或其它光盘存储设备、磁盘存储设备或其它磁性存储设备，或者是可以用于携带或存储形式为指令或数据结构的所需程序代码并且能够被通用或专用计算机或者通用或专用处理器访问的任何其它介质。此外，任何连接都可以适当地称为计算机可读介质。例如，如果使用同轴线缆、光纤线缆、双绞线、数字用户线路(DSL)或诸如红外线、无线电和微波的无线技术来从网站、服务器或其它远程源发送软件，则上述同轴线缆、光纤线缆、双绞线、DSL或诸如红外线、无线电和微波的无线技术均包括在介质的定义。如这里所使用的，磁盘和光盘包括压缩盘(CD)、激光盘、光盘、数字多功能盘(DVD)、软盘、蓝光盘，其中磁盘通常磁性地再现数据，而光盘利用激光光学地再现数据。上述内容的组合也应当包括在计算机可读介质的范围内。
以上是本申请公开的示例性实施例，但是应当注意，在不背离权利要求限定的本申请实施例公开的范围的前提下，可以进行多种改变和修改。根据这里描述的公开实施例的方法权利要求的功能、步骤和/或动作不需以任何特定顺序执行。此外，尽管本申请实施例公开的元素可以以个体形式描述或要求，但除非明确限制为单数，也可以理解为多个。
应当理解的是，在本文中使用的，除非上下文清楚地支持例外情况，单数形式“一个”旨在也包括复数形式。还应当理解的是，在本文中使用的“和/或”是指包括一个或者一个以上相关联地列出的项目的任意和所有可能组合。
上述本申请实施例公开实施例序号仅仅为了描述，不代表实施例的优劣。
本领域普通技术人员可以理解实现上述实施例的全部或部分步骤可以通过硬件来完成，也可以通过程序来指令相关的硬件完成，程序可以存储于一种计算机可读存储介质中，上述提到的存储介质可以是只读存储器，磁盘或光盘等。
所属领域的普通技术人员应当理解：以上任何实施例的讨论仅为示例性的，并非旨在暗示本申请实施例公开的范围(包括权利要求)被限于这些例子；在本申请实施例的思路下，以上实施例或者不同实施例中的技术特征之间也可以进行组合，并存在如上的本申请实施例的不同方面的许多其它变化，为了简明它们没有在细节中提供。因此，凡在本申请实施例的精神和原则之内，所做的任何省略、修改、等同替换、改进等，均应包含在本申请实施例的保护范围之内。

Claims (10)

  1. 一种基于AMD平台的点灯方法，其特征在于，包括在AMD平台企业模式下执行以下步骤：
    由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息；
    由所述CPU将获取的所述状态信息通过BMC发送给CPLD背板；以及
    响应于接收到所述状态信息，由所述CPLD背板基于所述状态信息将对应的错误灯号点亮。
  2. 根据权利要求1所述的基于AMD平台的点灯方法，其特征在于，由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息包括：
    由CPU向NVME硬盘管理系统发送第一组命令，并判断预设时间内是否有接收到回传所述NVME错误的状态信息；
    响应于接收到回传所述NVME错误的状态信息，向所述NVME硬盘管理系统发送下一组命令；以及
    响应于预设时间内没有接收到回传所述NVME错误的状态信息，在预设时间经过后向所述NVME硬盘管理系统发送下一组命令。
  3. 根据权利要求2所述的基于AMD平台的点灯方法，其特征在于，还包括：
    响应于接收回传所述NVME错误的状态信息，由所述CPU将所述状态信息通过BMC发送给CPLD背板。
  4. 根据权利要求1所述的基于AMD平台的点灯方法，其特征在于，由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息包括：
    由CPU向NVME硬盘管理系统分组发送管理组件传输协议封包，以获取NVME硬盘的状态信息。
  5. 根据权利要求1所述的基于AMD平台的点灯方法，其特征在于，由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息包括：
    由CPU通过PCIE接口向NVME硬盘管理系统分组发送传输协议封包，以获取NVME硬盘的状态信息。
  6. 根据权利要求1-5任一项所述的基于AMD平台的点灯方法，其特征在于，由所述CPU将获取的所述状态信息通过BMC发送给CPLD背板包括：
    由所述CPU将获取的所述状态信息通过系统管理总线发送给BMC；以及
    由所述BMC接收所述CPU发送的所述状态信息，并将所述状态信息通过系统管理总线发送给CPLD背板。
  7. 根据权利要求1-6任一项所述的基于AMD平台的点灯方法，其特征在于，响应于接收到所述状态信息，由所述CPLD背板基于所述状态信息将对应的错误灯号点亮包括：
    响应于接收到所述状态信息，由所述CPLD背板基于所述状态信息找到错误硬盘对应的错误灯号；以及
    由所述CPLD背板基于所述错误灯号将对应的灯点亮。
  8. 一种基于AMD平台的点灯装置，其特征在于，包括：
    第一模块，配置用于由CPU向NVME硬盘管理系统分组发送封包，以获取NVME硬盘的状态信息；
    第二模块，配置用于由所述CPU将获取的所述状态信息通过BMC发送给CPLD背板；以及
    第三模块，配置用于响应于接收到所述状态信息，由所述CPLD背板基于所述状态信息将对应的错误灯号点亮。
  9. 一种计算机设备，其特征在于，包括：
    至少一个处理器；以及
    存储器，所述存储器存储有可在所述处理器上运行的计算机可读指令，所述计算机可读指令由所述至少一个处理器执行时，所述至少一个处理器执行权利要求1-7任一项所述方法的步骤。
  10. 一种非易失性计算机可读存储介质，所述非易失性计算机可读存储介质存储有计算机可读指令，其特征在于，所述计算机可读指令被至少一个处理器执行时，所述至少一个处理器执行权利要求1-7任一项所述方法的步骤。
PCT/CN2022/088711 2021-04-25 2022-04-24 一种基于amd平台的点灯方法、装置、设备及可读介质 WO2022228333A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US18/270,171 US20240045751A1 (en) 2021-04-25 2022-04-24 Lighting Method and Apparatus Based on AMD Platform, Device and Readable Medium

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202110450144.7 2021-04-25
CN202110450144.7A CN113204474B (zh) 2021-04-25 2021-04-25 一种基于amd平台的点灯方法、装置、设备及可读介质

Publications (1)

Publication Number Publication Date
WO2022228333A1 true WO2022228333A1 (zh) 2022-11-03

Family

ID=77028466

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2022/088711 WO2022228333A1 (zh) 2021-04-25 2022-04-24 一种基于amd平台的点灯方法、装置、设备及可读介质

Country Status (3)

Country Link
US (1) US20240045751A1 (zh)
CN (1) CN113204474B (zh)
WO (1) WO2022228333A1 (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113204474B (zh) * 2021-04-25 2023-02-28 山东英信计算机技术有限公司 一种基于amd平台的点灯方法、装置、设备及可读介质
CN113727485A (zh) * 2021-08-31 2021-11-30 云尖信息技术有限公司 一种点灯系统及单bit点灯码流实现点双色灯的方法
CN114758715B (zh) * 2022-04-29 2023-12-22 浪潮(山东)计算机科技有限公司 一种硬盘故障灯点亮方法、装置、设备及可读存储介质
CN114691586B (zh) * 2022-05-26 2022-10-04 阿里巴巴（中国）有限公司 服务器、传输数据的方法以及带外管理芯片

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11203210A (ja) * 1998-01-09 1999-07-30 Hitachi Ltd 情報処理システム
CN107145430A (zh) * 2017-04-21 2017-09-08 深圳市同泰怡信息技术有限公司 一种基于I2C接口通过CPLD来实现NVMe SSD点灯的方法
CN108829567A (zh) * 2018-05-29 2018-11-16 郑州云海信息技术有限公司 支持双重点灯的单块NVMe硬盘背板及硬盘背板的点灯方法
CN110806964A (zh) * 2019-10-31 2020-02-18 苏州浪潮智能科技有限公司 一种硬盘点灯的方法、设备以及存储介质
CN112069040A (zh) * 2020-09-27 2020-12-11 山东云海国创云计算装备产业创新中心有限公司 一种硬盘点灯方法、装置及相关组件
CN113204474A (zh) * 2021-04-25 2021-08-03 山东英信计算机技术有限公司 一种基于amd平台的点灯方法、装置、设备及可读介质

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107766213A (zh) * 2017-09-29 2018-03-06 郑州云海信息技术有限公司 一种实现nvme硬盘点灯的方法及系统
CN109240894A (zh) * 2018-08-30 2019-01-18 郑州云海信息技术有限公司 一种硬盘点灯的方法、系统和计算机可读存储介质
CN109240896A (zh) * 2018-09-21 2019-01-18 郑州云海信息技术有限公司 一种服务器及其硬盘点灯系统
CN111090568A (zh) * 2019-10-31 2020-05-01 苏州浪潮智能科技有限公司 一种背板cpld点灯的方法和设备

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11203210A (ja) * 1998-01-09 1999-07-30 Hitachi Ltd 情報処理システム
CN107145430A (zh) * 2017-04-21 2017-09-08 深圳市同泰怡信息技术有限公司 一种基于I2C接口通过CPLD来实现NVMe SSD点灯的方法
CN108829567A (zh) * 2018-05-29 2018-11-16 郑州云海信息技术有限公司 支持双重点灯的单块NVMe硬盘背板及硬盘背板的点灯方法
CN110806964A (zh) * 2019-10-31 2020-02-18 苏州浪潮智能科技有限公司 一种硬盘点灯的方法、设备以及存储介质
CN112069040A (zh) * 2020-09-27 2020-12-11 山东云海国创云计算装备产业创新中心有限公司 一种硬盘点灯方法、装置及相关组件
CN113204474A (zh) * 2021-04-25 2021-08-03 山东英信计算机技术有限公司 一种基于amd平台的点灯方法、装置、设备及可读介质

Also Published As

Publication number Publication date
US20240045751A1 (en) 2024-02-08
CN113204474A (zh) 2021-08-03
CN113204474B (zh) 2023-02-28

Similar Documents

Publication Publication Date Title
WO2022228333A1 (zh) 一种基于amd平台的点灯方法、装置、设备及可读介质
US10884965B2 (en) PCI express tunneling over a multi-protocol I/O interconnect
US8898358B2 (en) Multi-protocol communication on an I2C bus
EP3234788B1 (en) DATA TRANSMISSION USING PCIe PROTOCOL VIA USB PORT
TWI676895B (zh) 擴充座組配技術
KR102191237B1 (ko) 네트워크 액세스 기능을 갖는 저장 장치
US10268483B2 (en) Data protocol for managing peripheral devices
US10515043B2 (en) Smart interface card control method and apparatus through a virtualized management interface
US20130339552A1 (en) Active cable management
CN107817953B (zh) 一种双控存储设备访问硬盘的方法及装置
CN104054064B (zh) 基于接口耦合的灵活的端口配置
US20180081849A1 (en) Verifying a communication bus connection to a peripheral device
TW202013135A (zh) 用於管理計算裝置之電腦實施方法、計算裝置及非暫態電腦可讀取儲存媒體
CN108845763A (zh) 一种可集中管理硬盘状态的系统及方法
US20160246746A1 (en) Sas configuration management
US20140136648A1 (en) Storage apparatus, network interface apparatus, and storage control method
TW201935239A (zh) 硬碟監控系統
WO2019052124A1 (zh) 一种数据处理方法及电子设备
US9753876B1 (en) Processing of inbound back-to-back completions in a communication system
US10795846B1 (en) Scalable NVMe storage management over system management bus
CN112286458B (zh) 一种盘片、存储系统及盘片配置方法
CN109561032B (zh) 一种交换机模块及包括其的交换机
WO2024036857A1 (zh) 管理i2c链路的方法、装置、设备及非易失性可读介质
TW202205101A (zh) 具自動更新韌體功能的usb集線裝置及具有該usb集線裝置的主機系統
WO2020014836A1 (zh) 获取光模块链路协商信息的方法、设备和系统

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22794804

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 18270171

Country of ref document: US

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 22794804

Country of ref document: EP

Kind code of ref document: A1