WO2022227318A1 - Time synchronization method and apparatus, and computer device and storage medium - Google Patents

Abstract

The present application relates to a time synchronization method and apparatus, and a computer device and a storage medium. The method comprises: sending primitive information, wherein the primitive information comprises a first timestamp, and the first timestamp is the local time of a first time node when the primitive information is sent; receiving reply information, which is sent by a second time node, wherein the reply information comprises a second timestamp and a third timestamp, the second timestamp is the local time when the second time node receives the primitive information, and the third timestamp is the local time when the second time node sends the second timestamp; acquiring the local time of the first time node when the reply information is received, so as to obtain a fourth timestamp; and determining a synchronization time of the first time node according to the first timestamp, the second timestamp, the third timestamp and the fourth timestamp. Therefore, according to primitive information exchange between a first time node and a second time node, the time of the first time node can be synchronized in a timely, accurate and efficient manner.

Description

Time synchronization method, apparatus, computer equipment and storage medium

Related applications

This application claims the priority of the Chinese patent application filed on April 30, 2021, the application number is 202110485780.3, and the title is "Time Synchronization Method, Apparatus, Computer Equipment and Storage Medium", which is hereby incorporated by reference in its entirety.

technical field

The present application relates to the field of communication technologies, and in particular, to a time synchronization method, apparatus, computer equipment and storage medium.

Background technique

With the development of communication technology, a technology for time synchronization of optical fiber switches has appeared. In the traditional technology, an FC node or an FC switch is usually selected as a time synchronization server in a high-speed serial transmission bus (FC, Fiber Channel) network, and the other FC nodes are used as time synchronization clients for time synchronization. In the traditional way, in order to obtain high-precision synchronization time, the time is usually provided to the FC node by sending the time synchronization ELS frame. Specifically, the time synchronization ELS frame interacts multiple times between the time synchronization server and the time synchronization client, so as to calculate the deviation and link delay between the time synchronization server and the time synchronization client, so as to dynamically analyze the FC nodes. Time compensation can achieve high time synchronization accuracy, which is ns level.

However, since the ELS frame time synchronization method needs to occupy the FC bus bandwidth, when the FC frame exchange occupies the FC channel, the ELS frame synchronization method cannot be initiated, which will increase the time deviation between the server and the client in the short term. Therefore, how to achieve time synchronization accurately and efficiently is an urgent problem to be solved.

SUMMARY OF THE INVENTION

Based on this, it is necessary to provide a time synchronization method, device, computer equipment and storage medium that can accurately and efficiently realize time synchronization in view of the above technical problems.

A time synchronization method, the method is applied to a first time node, comprising:

Sending primitive information; wherein, the primitive information includes a first timestamp, and the first timestamp is the local time of the first time node when the primitive information is sent;

Receive reply information sent by a second time node; the reply information is information generated by the second time node according to the primitive information, the reply information includes a second time stamp and a third time stamp, the second time stamp The time stamp is the local time when the second time node receives the primitive information, and the third time stamp is the local time when the second time node sends the second time stamp;

obtaining the local time of the first time node when receiving the reply information, and obtaining a fourth timestamp;

The synchronization time of the first time node is determined according to the first time stamp, the second time stamp, the third time stamp and the fourth time stamp.

In one embodiment, the sending primitive information includes:

The primitive information is sent between data frames of the high-speed serial transmission bus according to a preset time interval.

In one embodiment, the synchronization time of the first time node is determined according to the first time stamp, the second time stamp, the third time stamp and the fourth time stamp, include:

A first error between the second time node and the first time node is determined according to the first time stamp, the second time stamp, the third time stamp and the fourth time stamp ;

Obtain the timing result between the first timestamp and the next first timestamp, obtain the first timing result, and obtain the first timing result according to the first timestamp, the next first timestamp and the first timing result , determine the first time deviation;

determining a second time offset according to the first time stamp, the next first time stamp and the first error;

According to the first time offset and the second time offset, the synchronization time of the first time node is determined.

A time synchronization method, the method is applied to a second time node, comprising:

Obtain the timing result between two pulse signals, and obtain the second timing result;

When the pulse signal is detected for the second time, the local time of the second time node is latched to obtain the target time;

obtaining the second error between the target time and the timing time;

According to the second timing result and the second error, the local time is corrected to obtain the synchronization time of the second time node.

In one embodiment, the obtaining of the timing result between two pulse signals to obtain the second timing result includes:

When the pulse signal is detected for the first time, start timing;

When the pulse signal is detected for the second time, the timing result between the two pulse signals is obtained, and the second timing result is obtained.

In one embodiment, the local time is corrected according to the second timing result and the second error to obtain the synchronization time of the second time node, including:

According to the second timing result and the second error, the clock cycle of the second time node is corrected to obtain a target clock cycle;

The local time is corrected by using the target clock period to obtain the synchronization time of the second time node.

A time synchronization device, the device is applied to a first time node, comprising:

a primitive information sending module, configured to send primitive information; wherein, the primitive information includes a first time stamp, and the first time stamp is the local time of the first time node when the primitive information is sent;

A reply information receiving module, configured to receive reply information sent by a second time node; the reply information is information generated by the second time node according to the primitive information, and the reply information includes a second time stamp and a third time stamp. time stamp, the second time stamp is the local time when the second time node receives the primitive information, and the third time stamp is the local time when the second time node sends the second time stamp time;

a local time determination module, configured to acquire the local time of the first time node when the reply information is received, and obtain a fourth time stamp;

A first time synchronization module, configured to determine the synchronization time of the first time node according to the first time stamp, the second time stamp, the third time stamp and the fourth time stamp.

A time synchronization device, the device is applied to a second time node, comprising:

The timing result determination module is used to obtain the timing result between two pulse signals to obtain the second timing result;

a local time latch module, configured to latch the local time of the second time node to obtain the target time when the pulse signal is detected for the second time;

a second error determination module, configured to obtain the second error between the target time and the timing time;

A second time synchronization module, configured to correct the local time according to the second timing result and the second error to obtain the synchronization time of the second time node.

A computer device includes a memory and a processor, the memory stores a computer program, and the processor implements the method described in any one of the above embodiments when the processor executes the computer program.

A computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, implements the method described in any one of the foregoing embodiments.

The above-mentioned time synchronization method, device, computer equipment and storage medium, by sending primitive information; wherein, the primitive information includes a first time stamp, and the first time stamp is the local time of the first time node when the primitive information is sent; The reply information sent by the second time node; the reply information is the information generated by the second time node according to the primitive information, the reply information includes the second time stamp and the third time stamp, and the second time stamp is when the second time node receives the primitive information The third time stamp is the local time when the second time node sends the second time stamp; the local time of the first time node when the reply message is received is obtained, and the fourth time stamp is obtained; according to the first time stamp, the second time stamp The timestamp, the third timestamp, and the fourth timestamp determine the synchronization time of the first time node. Therefore, the time of the first time node can be synchronized accurately and efficiently according to the primitive information exchange between the first time node and the second time node without occupying the FC channel.

Description of drawings

FIG. 1 is an application environment diagram of a time synchronization method in an embodiment of the present application.

FIG. 2 is a schematic flowchart of a time synchronization method in an embodiment of the present application.

FIG. 3 is a schematic diagram of time synchronization sending of primitives in an embodiment of the present application.

FIG. 4 is a schematic diagram of primitive time synchronization in an embodiment of the present application.

FIG. 5 is a schematic flowchart of an implementation manner of step S400 in an embodiment of the present application.

FIG. 6 is a schematic flowchart of a time synchronization method in an embodiment of the present application.

FIG. 7 is a schematic flowchart of an implementation manner of step S400 ′ in an embodiment of the present application.

FIG. 8 is a schematic flowchart of a time synchronization method in a specific embodiment of the present application.

FIG. 9 is an internal structural diagram of a time synchronization module in an embodiment of the present application.

FIG. 10 is a structural block diagram of a time synchronization apparatus according to an embodiment of the present application.

FIG. 11 is a structural block diagram of a time synchronization apparatus according to an embodiment of the present application.

FIG. 12 is an internal structure diagram of a computer device in an embodiment of the application.

FIG. 13 is an internal structural diagram of a computer device in an embodiment of the present application.

Detailed ways

In order to make the purpose, technical solutions and advantages of the present application more clearly understood, the present application will be described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, but not to limit the present application.

The time synchronization method provided by this application can be applied to the application environment shown in FIG. 1 . The first time node 102 communicates with the second time node 104 through the network. The first time node 102 and the second time node 104 are FC nodes in a high-speed serial transmission bus (FC, Fiber Channel). The first time node 102 may be a time synchronization client, and the second time node 104 may be a time synchronization server. An initialization operation is required during time synchronization, and it is configured as the first time node or the second time node according to the design requirements. The implementation method is realized through the configuration register.

In one embodiment, as shown in FIG. 2 , a time synchronization method is provided, and the method is applied to the first time node 102 in FIG. 1 as an example for description, including the following steps:

Step S100, sending primitive information; wherein, the primitive information includes a first time stamp, and the first time stamp is the local time of the first time node when the primitive information is sent.

Step S200, receiving reply information sent by the second time node; the reply information is information generated by the second time node according to the primitive information, the reply information includes a second time stamp and a third time stamp, and the second time stamp is the second time node The local time when the primitive information is received, and the third time stamp is the local time when the second time node sends the second time stamp.

Step S300: Obtain the local time of the first time node when the reply information is received, and obtain a fourth time stamp.

Step S400: Determine the synchronization time of the first time node according to the first time stamp, the second time stamp, the third time stamp and the fourth time stamp.

Among them, the primitive generally refers to a program segment composed of several instructions, which is used to realize a specific function, and the control of the computer process is usually completed by the primitive. The primitive information refers to information including the local time of the first time node when the primitive is sent. The first timestamp is the local time of the first time node when the primitive information is sent. The second time stamp is the local time when the second time node receives the primitive information, and the third time stamp is the local time when the second time node sends the second time stamp.

Specifically, the first time node of the time synchronization client sends the primitive information including the first time stamp to the second time node of the time synchronization server to initiate the time synchronization process. After receiving the primitive information at the second time, it generates reply information including the second time stamp and the third time stamp, and returns the reply information to the first time node. After receiving the reply information sent by the second time node, the first time node parses the reply information to obtain the corresponding second time stamp and third time stamp. Next, the first time node obtains the local time of the first time node when the reply information is received, and obtains a fourth time stamp. Finally, according to the first time stamp, the second time stamp, the third time stamp and the fourth time stamp obtained during the interaction between the first time node and the second time node, the time of the first time node is synchronized to obtain the first time stamp. The synchronization time of the time node.

Among them, the first time node and the second time node directly interact through primitives, do not occupy FC frames or FC channels, and can perform time synchronization in time, so that the obtained synchronization time is also more accurate.

In the above method for time synchronization, primitive information is sent; wherein the primitive information includes a first timestamp, and the first timestamp is the local time of the first time node when the primitive information is sent; and the reply information sent by the second time node is received; The reply information is information generated by the second time node according to the primitive information. The reply information includes a second time stamp and a third time stamp. The second time stamp is the local time when the second time node receives the primitive information, and the third time stamp The local time when the second time stamp is sent for the second time node; the local time of the first time node when the reply message is received is obtained, and the fourth time stamp is obtained; according to the first time stamp, the second time stamp, the third time stamp and the The fourth timestamp determines the synchronization time of the first time node. Therefore, the time of the first time node can be synchronized in time according to the primitive information exchange between the first time node and the second time node without occupying the FC channel.

In one embodiment, it is a possible implementation manner of step S100, including:

According to the preset time interval, the primitive information is sent between the data frames of the high-speed serial transmission bus.

The preset time interval is a time synchronization period set in advance. The first time node continuously sends primitive messages to the second time node according to the time interval, and the accuracy of time synchronization can be improved through multiple interactions.

Specifically, the first time node sends primitive information to the second time node between data frames (FC frames) of the high-speed serial transmission bus according to a preset time interval. Figure 3 is a schematic diagram of primitive time synchronization transmission. As shown in Figure 3, the FC protocol stipulates that at least 6 IDLE codes should be spaced between two FC frames. In the gap between two FC frames, three time primitives SYNx and SYNy are used. , SYNz replaces three IDLE codes, and applies the replaced primitive information SYNx, SYNy, SYNz for data transmission, for example, the first time node sends the primitive information to the second time node, or the second time node sends the first time node. Send reply message. Figure 4 is a schematic diagram of primitive time synchronization. As shown in Figure 4, after three IDLE codes are replaced with three time primitive information SYNx, SYNy, SYNz, the replaced primitive information SYNx, SYNy, SYNz is changed from the first The time node is sent to the second time node. Among them, _T11 and _T21 are the time points when the primitive information is sent twice, which are two first time stamps; _T12 and _T22 are two second time stamps; _T13 and _T23 are two third time stamps stamp; T ₁₄ and T ₂₄ are two fourth time stamps. The time interval between _T11 and _T21 is the preset time interval.

In the above embodiment, according to the preset time interval, the primitive information is continuously sent to the first time node between the data frames of the high-speed serial transmission bus, the FC channel is not occupied, and the time is improved by multiple primitive interactions. Accuracy of synchronization.

In one embodiment, as shown in FIG. 5 , it is a schematic flowchart of an implementable implementation manner of step S400, which specifically includes:

Step S411: Determine the first error between the second time node and the first time node according to the first time stamp, the second time stamp, the third time stamp and the fourth time stamp.

Specifically, the first error offset ₁ between the second time node and the first time node is determined according to formula (1), and the specific formula (1) is:

Wherein, T1 is the _first time stamp, T2 is the _second time stamp, T3 is the _third time stamp, and T4 is the _fourth time stamp.

Step S412: Obtain the timing result between the first time stamp and the next first time stamp, obtain the first time stamp, and determine the first time stamp according to the first time stamp, the next first time stamp and the first time stamp. time offset.

Wherein, the first timing result T _Count1 is the timing result between the first time stamp T ₁₁ and the next first time stamp T ₂₁ , that is, the time starts at the first time stamp T ₁₁ and starts at the next first time stamp T ₂₁ End the timing, and determine the timing result at this time as the first timing result T _Count1 . In some embodiments, after the first time node receives the reply information, the second time node waits to receive the first time node reply primitive T_RDY, and if it does not receive the first time node reply primitive T_RDY, it will wait until the first time node The second time node waits to receive the first time node reply primitive T_RDY. At this time, the count value T _Count1 between T ₁₁ and T ₂₁ is recorded twice.

Specifically, since the primitive information sent by the first time node to the second time node is continuously sent according to preset time intervals, the first time stamp is the local time of the first time node when the primitive information is sent. Each of the secondary transmission primitive information corresponds to a first time stamp, the first time stamp T ₁₁ and the next first time stamp T ₂₁ . According to formula (2), through the first time stamp T ₁₁ , the next first time stamp T ₂₁ and the first timing result T _Count1 , the first time offset δ ₁ can be determined. The specific formula (2) is:

In some embodiments, when the first time node sends primitive information to the second time node, it is necessary to determine the link status of the serdes interface, and when the serdes link is idle, record the local time, obtain the first timestamp, and send the first time stamp to the second time node. Two time nodes send primitive information.

It should be noted that after multiple primitive interactions, the first time node logic calculates the time offset and link delay between the first time node logic and the second time node logic, and determines the first time offset and the second time offset according to the The synchronization time of a time node can be dynamically corrected in each synchronization cycle, which ensures the high precision of time synchronization. The second time node can not only adjust the deviation from the first time node, but also correct and fine-tune its own frequency according to the two timing cycles of the second time node, so as to achieve the purpose of high-precision primitive time synchronization.

Step S413: Determine the second time offset according to the first timestamp, the next first timestamp and the first error.

Specifically, according to the master-slave node deviation calculation module shown in formula (3), the second time deviation δ ₂ is determined, and the specific formula (3) is:

Step S420: Determine the synchronization time of the first time node according to the first time offset and the second time offset.

Specifically, the synchronization time δ' of the first time node is determined according to formula (4), and the specific formula (4) is:

δ'=δ+δ ₁ +δ ₂ (4)

Among them, when the clock frequency is 125MHz, δ is the clock period of 8.000ns. It should be noted that the above description takes 125 MHz as the clock frequency and 8.000 ns as the clock period. In the actual synchronization process, the calculation needs to be performed with the actual clock frequency and clock period.

In the above embodiment, through the first time stamp, the second time stamp, the third time stamp and the fourth time stamp, the first error and the first time deviation between the second time node and the first time node can be further determined. Compared with the second time deviation, it should be noted that the second time node performs timing with each connected first time node in turn according to the timing cycle, which ensures the validity of time synchronization and one-to-many time synchronization. The completion time is short. Both the first time node and the second time node need to send and receive primitive information once. In extreme cases, a time synchronization primitive is inserted in the gap between the longest frames of the two frames. The completion time is to receive two frames. Maximum FC frame time.

In one embodiment, as shown in FIG. 6 , a time synchronization method is provided, and the method is applied to the second time node 104 in FIG. 1 as an example for description, including the following steps:

In step S100', the timing result between two pulse signals is obtained, and the second timing result is obtained.

Step S200', when the pulse signal is detected for the second time, the local time of the second time node is latched to obtain the target time.

Step S300', acquiring the second error between the target time and the timing time.

Step S400', correcting the local time according to the second timing result and the second error to obtain the synchronization time of the second time node.

Specifically, at the second time node, a timing result between two pulse signals is acquired, and a second timing result is obtained. And when the pulse signal is detected for the second time, the local time of the second time node is latched, the target time is obtained, and the second error between the target time and the timing time is determined. According to the second timing result and the second error, the local time of the second time node is corrected to obtain the synchronization time of the second time node.

In the above time synchronization method, the second timing result is obtained by acquiring the timing result between two pulse signals, and when the pulse signal is detected for the second time, the local time of the second time node is latched to obtain the target time. Obtain the second error between the target time and the timing time. According to the second timing result and the second error, the local time is corrected to obtain the synchronization time of the second time node. Therefore, the local time can be corrected according to the standard timing time, the second error between the local target time and the timing time, and the accuracy of the time synchronization of the first time node is improved.

In one embodiment, it is a possible implementation manner of step S100', including:

When the pulse signal is detected for the first time, the timing is started; when the pulse signal is detected for the second time, the timing result between the two pulse signals is obtained, and the second timing result is obtained.

Specifically, when the second time node receives the rising edge of the 1PPS pulse signal for the first time, the first time node count is started. Next, continue to detect the 1PPS pulse signal, and when the rising edge of the 1PPS pulse signal is received for the second time, buffer the current counting result to obtain the second timing result T _Count2 , and restart counting to provide a basis for the next cycle of detection.

In the above-mentioned embodiment, when the pulse signal is detected for the first time, the timing is started, and when the pulse signal is detected for the second time, the timing result between the two pulse signals is obtained, and the second timing result is obtained, which can be used as a follow-up basis. The second timing result provides a basis for correcting the local time and improves the accuracy of the time synchronization of the first time node.

In one embodiment, as shown in FIG. 7 , it is a schematic flowchart of an implementable implementation manner of step S400 ′, which specifically includes:

Step S410', correcting the clock period of the second time node according to the second timing result and the second error to obtain the target clock period.

Step S420', using the target clock period to correct the local time to obtain the synchronization time of the second time node.

Specifically, the target clock period δ _f is determined according to formula (5), and the specific formula (5) is:

Among them, offset ₂ is the second error, 125MHz is the clock frequency, and 8.000 is the clock period in ns. It should be noted that the above description takes 125 MHz as the clock frequency and 8.000 ns as the clock period, and in the actual synchronization process, the calculation needs to be performed with the actual clock frequency and clock period.

After the target clock period is obtained, the local time is corrected by using the target clock period, and the synchronization time of the second time node can be obtained.

In the above embodiment, according to the second timing result and the second error, the clock cycle of the second time node is corrected to obtain the target clock cycle; the target clock cycle is used to correct the local time, which improves the synchronization time of the second time node. accuracy.

In a specific embodiment, as shown in FIG. 8, a time synchronization method is provided, including a master time node (second time node 104) and a slave time node (first time node 102), respectively Time synchronization with slave time nodes, including the following steps:

As shown in Figure 8, the time synchronization module initializes the operation, and configures the module as the master time node or the slave time node according to the design requirements, and the implementation method is realized by the configuration register. After initialization, determine whether the current node is the main time node. If it is the master time node, it is divided into two branches: the master time node time synchronization branch and the slave time node time synchronization branch.

In the time synchronization branch of the main time node, the frequency offset correction module of the main time node is used to detect whether a 1PPS pulse signal is received. If so, the second error offset ₂ between the local time (target time) and the timing time is calculated, and two The second timing result T _Count2 between the secondary 1PPS pulse signals is calculated, and the frequency offset between the main time node and the 1PPS pulse signal is calculated according to formula (5) to obtain the target clock period δ _f . Finally, the local time of the master time node is corrected according to the target clock cycle _δf , and the synchronization time of the master time node is obtained.

The time synchronization branch of the slave time node, the action of the master time node timing the slave time node, needs to be explained in conjunction with the action of the slave time node. After the time synchronization module initializes the operation and determines that the current node is the slave time node, the slave time node regularly sends the TIME primitive to the link to the master time node. Next, the link status of the serdes interface is judged, and if the serdes link is idle, the local time at which the TIME primitive is sent is recorded from the time node to obtain the first timestamp T ₁ . After receiving the TIME primitive, the master time node records the local time of receiving the TIME primitive, and obtains a second timestamp T ₂ . Next, the master time node sends the second time stamp T ₂ and the current local time third time stamp T ₃ to the slave time node. After receiving the second time stamp T ₂ and the current local time third time stamp T ₃ sent by the master time node from the time node, cache the second time stamp T ₂ and the current local time third time stamp T ₃ , and record Receive the _fourth timestamp T4 _of the primary time node _T2 and the current local time third timestamp T3, and record the first timestamp between the current first timestamp _T11 and the next first timestamp _T21 The timing result T _Count1 . Finally, according to formula (1), formula (2), formula (3) and formula (4), it is determined that the local time of the slave time node is corrected to obtain the synchronization time of the slave time node.

Figure 9 is the internal structure diagram of the time synchronization module. As shown in Figure 9, when the node is configured as the main time node, a "main time node frequency offset correction module" is added. Deviation compensation, to compensate the clock deviation between the main time node and the external GPS and other timing equipment. When the node is configured as a slave time node, the "master-slave node deviation calculation module" and "slave node frequency deviation correction module" are added, and the "master-slave node deviation calculation module" calculates the master-slave node time deviation according to the real-time timing results, and then Compensate for slave node time. The "slave node frequency deviation correction module" calculates the frequency deviation between the master and slave nodes according to the synchronization messages sent by the master node at two adjacent times, and completes the deviation correction for the frequency of the slave nodes.

The above-mentioned embodiment does not occupy the bandwidth of the FC channel, and can achieve high-precision time synchronization, so that one master node can simultaneously perform high-precision time synchronization on multiple slave nodes.

It should be understood that although the steps in the flowcharts of FIGS. 1-9 are shown in sequence according to the arrows, these steps are not necessarily executed in the sequence shown by the arrows. Unless explicitly stated herein, the execution of these steps is not strictly limited to the order, and these steps may be performed in other orders. Moreover, at least a part of the steps in FIGS. 1-9 may include multiple steps or multiple stages. These steps or stages are not necessarily executed and completed at the same time, but may be executed at different times. The execution of these steps or stages The order is also not necessarily sequential, but may be performed alternately or alternately with other steps or at least a portion of the steps or phases within the other steps.

In one embodiment, as shown in FIG. 10, a time synchronization apparatus is provided, including: a primitive information sending module 101, a reply information receiving module 102, a local time determination module 103 and a first time synchronization module 104, wherein:

The primitive information sending module 101 is used for sending primitive information; wherein, the primitive information includes a first time stamp, and the first time stamp is the local time of the first time node when the primitive information is sent;

The reply information receiving module 102 is configured to receive reply information sent by the second time node; the reply information is information generated by the second time node according to the primitive information, and the reply information includes a second time stamp and a third time stamp, and the second time stamp is the local time when the second time node receives the primitive information, and the third time stamp is the local time when the second time node sends the second time stamp;

a local time determination module 103, configured to obtain the local time of the first time node when the reply message is received, and obtain a fourth time stamp;

The first time synchronization module 104 is configured to determine the synchronization time of the first time node according to the first time stamp, the second time stamp, the third time stamp and the fourth time stamp.

In one embodiment, the primitive information sending module 101 is further configured to: send primitive information between data frames of the high-speed serial transmission bus according to a preset time interval.

In one embodiment, the first time synchronization module 104 is further configured to: determine the relationship between the second time node and the first time node according to the first time stamp, the second time stamp, the third time stamp and the fourth time stamp obtain the timing result between the first timestamp and the next first timestamp, obtain the first timing result, and determine according to the first timestamp, the next first timestamp and the first timing result determine the first time offset; determine the second time offset according to the first timestamp, the next first timestamp and the first error; determine the synchronization time of the first time node according to the first time offset and the second time offset .

In one embodiment, as shown in FIG. 11 , a time synchronization apparatus is provided, including: a timing result determination module 111 , a local time latch module 112 , a second error determination module 113 and a second time synchronization module 114 , wherein :

The timing result determination module 111 is used to obtain the timing result between two pulse signals, and obtain the second timing result;

The local time latch module 112 is configured to latch the local time of the second time node to obtain the target time when the pulse signal is detected for the second time;

The second error determination module 113 is configured to obtain the second error between the target time and the timing time;

The second time synchronization module 114 is configured to correct the local time according to the second timing result and the second error to obtain the synchronization time of the second time node.

In one embodiment, the timing result determination module 111 is further configured to: start timing when the pulse signal is detected for the first time; acquire the timing result between the two pulse signals when the pulse signal is detected for the second time, Get the second timing result.

In one embodiment, the second time synchronization module 114 is further configured to: correct the clock cycle of the second time node according to the second timing result and the second error to obtain the target clock cycle; use the target clock cycle to compare the local time Correction is made to obtain the synchronization time of the second time node.

For the specific limitation of the time synchronization apparatus, reference may be made to the limitation of the time synchronization method above, which will not be repeated here. Each module in the above-mentioned time synchronization apparatus may be implemented in whole or in part by software, hardware and combinations thereof. The above-mentioned modules can be embedded in or independent of the processor in the computer equipment in the form of hardware, or can be stored in the memory in the computer equipment in the form of software, so that the processor calls and executes the corresponding operations of the above-mentioned various modules.

In one embodiment, a computer device is provided, and the computer device may be a terminal, applied to the first time node, and its internal structure diagram may be as shown in FIG. 12 . The computer equipment includes a processor, memory, a communication interface, a display screen, and an input device connected by a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium, an internal memory. The nonvolatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the execution of the operating system and computer programs in the non-volatile storage medium. The communication interface of the computer device is used for wired or wireless communication with an external terminal, and the wireless communication can be realized by WIFI, operator network, NFC (Near Field Communication) or other technologies. The computer program, when executed by the processor, implements a time synchronization method. The display screen of the computer equipment may be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer equipment may be a touch layer covered on the display screen, or a button, a trackball or a touchpad set on the shell of the computer equipment , or an external keyboard, trackpad, or mouse.

In one embodiment, a computer device is provided, and the computer device may be a server, applied to the second time node, and its internal structure diagram may be as shown in FIG. 13 . The computer device includes a processor, memory, and a network interface connected by a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium, an internal memory. The nonvolatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the execution of the operating system and computer programs in the non-volatile storage medium. The computer device's database is used to store time synchronization data. The network interface of the computer device is used to communicate with an external terminal through a network connection. The computer program, when executed by the processor, implements a time synchronization method.

Those skilled in the art can understand that the structures shown in FIG. 12 and FIG. 13 are only block diagrams of partial structures related to the solution of the present application, and do not constitute a limitation on the computer equipment to which the solution of the present application is applied. A computer device may include more or fewer components than those shown in the figures, or combine certain components, or have a different arrangement of components.

In one embodiment, a computer device is provided, including a memory and a processor, a computer program is stored in the memory, and the processor implements the following steps when executing the computer program:

Sending primitive information; wherein, the primitive information includes a first timestamp, and the first timestamp is the local time of the first time node when the primitive information is sent;

Receive the reply information sent by the second time node; the reply information is the information generated by the second time node according to the primitive information, the reply information includes the second time stamp and the third time stamp, and the second time stamp is the primitive received by the second time node The local time when the information is sent, and the third time stamp is the local time when the second time node sends the second time stamp;

Obtain the local time of the first time node when the reply message is received, and obtain the fourth timestamp;

The synchronization time of the first time node is determined according to the first time stamp, the second time stamp, the third time stamp and the fourth time stamp.

In one embodiment, the processor further implements the following steps when executing the computer program: sending primitive information between data frames of the high-speed serial transmission bus according to a preset time interval.

In one embodiment, when the processor executes the computer program, the following steps are further implemented: according to the first time stamp, the second time stamp, the third time stamp and the fourth time stamp, determining the difference between the second time node and the first time node obtain the timing result between the first timestamp and the next first timestamp, obtain the first timing result, and determine according to the first timestamp, the next first timestamp and the first timing result determine the first time offset; determine the second time offset according to the first timestamp, the next first timestamp and the first error; determine the synchronization time of the first time node according to the first time offset and the second time offset .

In one embodiment, a computer device is provided, including a memory and a processor, a computer program is stored in the memory, and the processor implements the following steps when executing the computer program:

Obtain the timing result between two pulse signals, and obtain the second timing result;

When the pulse signal is detected for the second time, the local time of the second time node is latched to obtain the target time;

Obtain the second error between the target time and the timing time;

According to the second timing result and the second error, the local time is corrected to obtain the synchronization time of the second time node.

In one embodiment, when the processor executes the computer program, the following steps are further implemented: when the pulse signal is detected for the first time, start timing; when the pulse signal is detected for the second time, obtain the timing result between the two pulse signals , to get the second timing result.

In one embodiment, the processor further implements the following steps when executing the computer program: correcting the clock cycle of the second time node according to the second timing result and the second error to obtain a target clock cycle; using the target clock cycle to compare the local time Correction is made to obtain the synchronization time of the second time node.

In one embodiment, a computer-readable storage medium is provided on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

Sending primitive information; wherein, the primitive information includes a first timestamp, and the first timestamp is the local time of the first time node when the primitive information is sent;

Receive the reply information sent by the second time node; the reply information is the information generated by the second time node according to the primitive information, the reply information includes the second time stamp and the third time stamp, and the second time stamp is the primitive received by the second time node The local time when the information is sent, and the third time stamp is the local time when the second time node sends the second time stamp;

Obtain the local time of the first time node when the reply message is received, and obtain the fourth timestamp;

The synchronization time of the first time node is determined according to the first time stamp, the second time stamp, the third time stamp and the fourth time stamp.

In one embodiment, the computer program further implements the following steps when executed by the processor: sending primitive information between data frames of the high-speed serial transmission bus according to preset time intervals.

In one embodiment, when the computer program is executed by the processor, the following steps are further implemented: determining the second time node and the first time node according to the first time stamp, the second time stamp, the third time stamp and the fourth time stamp The first error between; obtain the timing result between the first timestamp and the next first timestamp, obtain the first timing result, and according to the first timestamp, the next first timestamp and the first timing result, Determine the first time offset; determine the second time offset according to the first timestamp, the next first timestamp and the first error; determine the synchronization of the first time node according to the first time offset and the second time offset time.

In one embodiment, a computer-readable storage medium is provided on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

Obtain the timing result between two pulse signals, and obtain the second timing result;

When the pulse signal is detected for the second time, the local time of the second time node is latched to obtain the target time;

Obtain the second error between the target time and the timing time;

According to the second timing result and the second error, the local time is corrected to obtain the synchronization time of the second time node.

In one embodiment, when the computer program is executed by the processor, the following steps are further implemented: when the pulse signal is detected for the first time, start timing; when the pulse signal is detected for the second time, obtain the timing between two pulse signals As a result, the second timing result is obtained.

In one embodiment, when the computer program is executed by the processor, the following steps are further implemented: correcting the clock cycle of the second time node according to the second timing result and the second error to obtain the target clock cycle; The time is corrected to obtain the synchronization time of the second time node.

Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be implemented by instructing relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage In the medium, when the computer program is executed, it may include the processes of the above-mentioned method embodiments. Wherein, any reference to memory, storage, database or other media used in the various embodiments provided in this application may include at least one of non-volatile and volatile memory. Non-volatile memory may include read-only memory (Read-Only Memory, ROM), magnetic tape, floppy disk, flash memory, or optical memory, and the like. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, the RAM may be in various forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM).

The technical features of the above embodiments can be combined arbitrarily. In order to make the description simple, all possible combinations of the technical features in the above embodiments are not described. However, as long as there is no contradiction in the combination of these technical features It is considered to be the range described in this specification.

The above-mentioned embodiments only represent several embodiments of the present application, and the descriptions thereof are specific and detailed, but should not be construed as a limitation on the scope of the invention patent. It should be noted that, for those skilled in the art, without departing from the concept of the present application, several modifications and improvements can be made, which all belong to the protection scope of the present application. Therefore, the scope of protection of the patent of the present application shall be subject to the appended claims.

Claims (10)

1. A time synchronization method, the method is applied to a first time node, comprising:

   Sending primitive information; wherein, the primitive information includes a first timestamp, and the first timestamp is the local time of the first time node when the primitive information is sent;

   Receive reply information sent by a second time node; the reply information is information generated by the second time node according to the primitive information, the reply information includes a second time stamp and a third time stamp, the second time stamp The time stamp is the local time when the second time node receives the primitive information, and the third time stamp is the local time when the second time node sends the second time stamp;

   obtaining the local time of the first time node when receiving the reply information, and obtaining a fourth timestamp;

   The synchronization time of the first time node is determined according to the first time stamp, the second time stamp, the third time stamp and the fourth time stamp.
2. The method of claim 1, wherein the sending primitive information comprises:

   The primitive information is sent between data frames of the high-speed serial transmission bus according to a preset time interval.
3. The method according to claim 2, wherein the first time node is determined according to the first time stamp, the second time stamp, the third time stamp and the fourth time stamp synchronization time, including:

   A first error between the second time node and the first time node is determined according to the first time stamp, the second time stamp, the third time stamp and the fourth time stamp ;

   Obtain the timing result between the first timestamp and the next first timestamp, obtain the first timing result, and obtain the first timing result according to the first timestamp, the next first timestamp and the first timing result , determine the first time deviation;

   determining a second time offset according to the first time stamp, the next first time stamp and the first error;

   According to the first time offset and the second time offset, the synchronization time of the first time node is determined.
4. A time synchronization method, the method is applied to a second time node, comprising:

   Obtain the timing result between two pulse signals, and obtain the second timing result;

   When the pulse signal is detected for the second time, the local time of the second time node is latched to obtain the target time;

   obtaining the second error between the target time and the timing time;

   According to the second timing result and the second error, the local time is corrected to obtain the synchronization time of the second time node.
5. The method according to claim 4, wherein the obtaining a timing result between two pulse signals to obtain a second timing result comprises:

   When the pulse signal is detected for the first time, start timing;

   When the pulse signal is detected for the second time, the timing result between the two pulse signals is obtained, and the second timing result is obtained.
6. The method according to claim 4, wherein, according to the second timing result and the second error, modifying the local time to obtain the synchronization time of the second time node, comprising:

   According to the second timing result and the second error, the clock cycle of the second time node is corrected to obtain a target clock cycle;

   The local time is corrected by using the target clock period to obtain the synchronization time of the second time node.
7. A time synchronization device, the device is applied to a first time node, comprising:

   a primitive information sending module, configured to send primitive information; wherein, the primitive information includes a first time stamp, and the first time stamp is the local time of the first time node when the primitive information is sent;

   A reply information receiving module, configured to receive reply information sent by a second time node; the reply information is information generated by the second time node according to the primitive information, and the reply information includes a second time stamp and a third time stamp. time stamp, the second time stamp is the local time when the second time node receives the primitive information, and the third time stamp is the local time when the second time node sends the second time stamp time;

   a local time determination module, configured to acquire the local time of the first time node when the reply information is received, and obtain a fourth time stamp;

   A first time synchronization module, configured to determine the synchronization time of the first time node according to the first time stamp, the second time stamp, the third time stamp and the fourth time stamp.
8. A time synchronization device, the device is applied to a second time node, comprising:

   The timing result determination module is used to obtain the timing result between two pulse signals to obtain the second timing result;

   a local time latch module, configured to latch the local time of the second time node to obtain the target time when the pulse signal is detected for the second time;

   a second error determination module, configured to obtain the second error between the target time and the timing time;

   A second time synchronization module, configured to correct the local time according to the second timing result and the second error to obtain the synchronization time of the second time node.
9. A computer device, comprising a memory and a processor, wherein the memory stores a computer program, wherein the processor implements the steps of the method according to any one of claims 1 to 3 when the processor executes the computer program, or realizes The steps of the method of any one of claims 4 to 6.
10. A computer-readable storage medium on which a computer program is stored, wherein the computer program, when executed by a processor, implements the steps of the method of any one of claims 1 to 3, or implements claims 4 to 6 The steps of any one of the methods.

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