WO2022205237A1 - 链路训练方法及相关设备 - Google Patents

链路训练方法及相关设备 Download PDF

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Publication number
WO2022205237A1
WO2022205237A1 PCT/CN2021/084765 CN2021084765W WO2022205237A1 WO 2022205237 A1 WO2022205237 A1 WO 2022205237A1 CN 2021084765 W CN2021084765 W CN 2021084765W WO 2022205237 A1 WO2022205237 A1 WO 2022205237A1
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WO
WIPO (PCT)
Prior art keywords
link
training
clock
cable
equalization
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Application number
PCT/CN2021/084765
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English (en)
French (fr)
Inventor
钱广
王晶晶
李小伟
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to PCT/CN2021/084765 priority Critical patent/WO2022205237A1/zh
Priority to CN202180096504.6A priority patent/CN117178524A/zh
Priority to EP21933897.7A priority patent/EP4311173A4/en
Publication of WO2022205237A1 publication Critical patent/WO2022205237A1/zh
Priority to US18/475,727 priority patent/US20240028068A1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/10—Arrangements for initial synchronisation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices

Definitions

  • the present application relates to the field of communication technologies, and in particular, to a link training method and related equipment.
  • the demand for high resolution and high frame rate in various industries such as industrial, medical and consumer electronics is also increasingly strong.
  • the increase in resolution and frame rate will inevitably require higher rates and larger bandwidths.
  • the higher the rate the more important the balanced matching of the sender and receiver.
  • the transmitting end adopts fixed parameter configuration for transmission, under different cables and environments, it is difficult for the receiving end to achieve balanced matching, resulting in the inability to recover the signal.
  • LT Link Training
  • the sender and receiver can adjust dynamic parameters according to the current transmission environment, each other's performance and status, so as to achieve the best balance and matching between the two sides.
  • HDMI2.1 and DP1.4 only support one-way training, and the training process can only be performed by the sender to actively query the training status of the receiver, which requires high software requirements and costs a lot. After the training is successful, the hardware environment such as equipment and cables will not change. In the case of , using the same rate to re-train the usage time is basically the same as the previous training, it cannot be accelerated, and the training takes a long time.
  • USB supports two-way training, but the training is highly constrained.
  • the embodiment of the present application discloses a link training method and related equipment, which can realize that the link training of the bidirectional transmission link is independent of each other.
  • an embodiment of the present application provides a link training method, which is applied to a first device.
  • the first device is connected to a second device through a cable.
  • the first device includes a first sending end and a first receiving end.
  • the two devices include a second sending end and a second receiving end;
  • the cable includes at least one first link from the first sending end to the second receiving end and at least one second link from the second sending end to the first receiving end; the method Including: performing link training on at least one first link; in the case where link training is not performed on at least one second link, or before the link training on at least one second link is successful, the link training is successful
  • the at least one first link of the device sends data to the second device.
  • the link between the first device and the second device includes at least one first link from the first sending end of the first device to the second receiving end of the second device, and the second device's link At least one second link from the second transmitting end to the first receiving end of the first device; performing link training of the link between the first device and the second device includes performing the link of the at least one first link training, and performing link training on the at least one second link, that is, link training on the bidirectional transmission link; in the case that the at least one second link does not perform link training, or when the at least one second link does not perform link training Before the link training of the two links is successful, if the link training of the at least one first link is successful, data may be sent to the second device through the at least one first link whose link training is successful, specifically, the The first sending end sends data to the second receiving end; therefore, in the embodiment of the present application, the link training of the bidirectional transmission link can be independent of each other, and the training processes in each direction are not coupled to each other,
  • the cable further includes an auxiliary link (SideBand Link, SL); performing link training on at least one first link includes: sending the first rate to the second device through the auxiliary link, The first rate is the link training rate of at least one first link; in the case where the parameters of the first transmitting end are configured as the first training parameter value, the clock locking of at least one first link is performed at the first rate , balance calculation and link check.
  • auxiliary link SideBand Link
  • the cable further includes an auxiliary link for performing link training on at least one first link, and the first device sends a first rate to the second device through the auxiliary link, where the first rate is the at least one The link training rate of a first link, so that the second device can know the training rate of the at least one first link; the first device also configures the parameters of the first transmitter as the first training parameter value, and then uses the first The clock lock, balance calculation and link check of the at least one first link are performed at a rate, and the second device also cooperates with the first device to perform clock lock, balance calculation and link check of the at least one first link at the first rate.
  • Link check if the clock lock, balance calculation, and link check are all successful, the link training of the at least one first link is successful, and the first device sends the training rate to the second device through the auxiliary link, thereby Making the first device and the second device use the same training rate to perform link training is beneficial to the successful link training of the at least one first link.
  • performing clock locking, equalization calculation and link checking of at least one first link includes: sending a first clock recovery sequence to a second receiving end through the first sending end; sending a first clock recovery sequence through the auxiliary link Receive the first clock locking result from the second device, where the first clock locking result is that the clock is successfully locked or the clock has failed; The receiving end sends a first equalization sequence, and the first equalization sequence is used for equalization calculation by the second device; receives the first equalization calculation result or the first link check result from the second device through the auxiliary link, wherein the first equalization calculation The result is that the balance calculation fails, and the result of the first link check is that the link check succeeds or the link check fails.
  • the first device sends a first clock recovery sequence to the second receiving end through the first sending end, and the first clock recovery sequence is used for the second device to perform clock recovery and locking, so that the second The clocks of the device and the first device are synchronized; after the second device completes clock recovery and locking, it will send the first clock locking result to the first device through the auxiliary link.
  • the first clock The locking result is that the clock is locked successfully; when the second device fails to lock the clock, the first clock locking result is that the clock fails to lock, wherein if the second device clock and lock are over, it is also considered that the second device has failed to lock the clock.
  • the first device sends the first equalization sequence to the second receiving end through the first transmitting end, and the first equalizing sequence is used for the second device to perform equalization calculation; when the second device When the equalization calculation fails, the first equalization calculation result is sent through the auxiliary link, and the first equalization calculation result is that the equalization calculation fails.
  • the link check is performed, and after the link check is completed, the first link check result is sent to the first device through the auxiliary link; when the link check of the second device fails, the first link check The result of the link check is that the link check fails; when the link check of the second device succeeds, the result of the first link check is that the link check succeeds.
  • the second device may also choose to send the first equalization calculation result through the auxiliary link. In this case, the first equalization calculation result is that the equalization calculation is successful.
  • the first clock locking result includes a clock locking result of each first link in the at least one first link, and there is a first link whose clock locking fails in the at least one first link
  • the first clock locking result is that the clock locking fails; otherwise, the first clock locking result is that the clock locking succeeds.
  • the first clock locking result received by the first device from the second device includes the clock locking result of each first link in the at least one first link, and the at least one first link
  • the successful clock locking of a link requires that each of the at least one first link is successfully clock locked, and as long as there is a first link whose clock locking fails in the at least one first link, the at least one first link One link fails to lock the clock; therefore, the second device sends the clock locking result of each first link in the at least one first link to the first device through the first clock locking result, which is beneficial for the first device to determine The clock lock result of the at least one first link.
  • the parameters of the first transmitting end include a voltage swing of each first link; the method further includes: judging the voltage swing of the first link whose clock lock fails in the at least one first link Whether the configuration of the amplitude traverses all the preset values of the voltage swing; if not, the configuration of the voltage swing of the first link whose clock lock fails is updated from the first value to the second value, wherein all the voltage swings
  • the preset value includes a first value and a second value, and the second value is an unconfigured value of the voltage swing of the first link whose clock lock fails; the first link whose clock lock fails is sent to the second device through the auxiliary link
  • the information that the configuration update of the voltage swing of the link is completed; wherein, the first training parameter value includes the voltage swing training value, and when the configuration of the voltage swing of the first link whose clock lock fails is updated for the first time, the first value is the voltage Swing training value.
  • the parameters of the first transmitting end include the voltage swing of each first link. If the value of the voltage swing configured on the first transmitting end is too high or too low, the clock of the second receiving end cannot be locked. success, that is, the second device cannot lock the clock successfully; when the clock of the second receiving end fails to lock, that is, there is a first link that fails to lock the clock in the at least one first link, and the first device determines that the clock locking fails Whether the configuration of the voltage swing of the first link traverses all the preset voltage swing values; if not, the first device adjusts the configuration of the voltage swing of the first link whose clock lock fails, for example, locks the clock The configuration of the voltage swing of the failed first link is updated to its unconfigured value, and then the first device informs the second device through the auxiliary link of the configuration update of the voltage swing of the first link whose clock has failed to lock. Complete; in this way, the second device can perform clock recovery and locking again, so that the second device can be successfully clock locked by
  • the first balance calculation result includes a balance calculation result of each first link in the at least one first link, and there is a first link whose balance calculation fails in the at least one first link
  • the result of the first equalization calculation is that the equalization calculation fails.
  • the first equalization calculation result received by the first device from the second device includes the equalization calculation result of each first link in the at least one first link, and the at least one first link
  • the successful balance calculation of the link requires that each first link in the at least one first link has a successful balance calculation, and as long as there is a first link that fails the balance calculation in the at least one first link, the at least one first link
  • the balance calculation fails for one link; therefore, the second device sends the balance calculation result of each first link in the at least one first link to the first device through the first balance calculation result, which is beneficial for the first device to determine The equalization calculation result of the at least one first link.
  • the first equalization calculation result further includes a clock out-of-lock condition of each of the at least one first link; the method further includes: judging whether the at least one first link is There is a first link whose clock is out of lock; if there is a first link whose clock is out of lock in at least one of the first links, the first rate is sent to the second device through the auxiliary link, and the first rate is sent to the second device through the first sending end.
  • the two receivers send the first clock recovery sequence.
  • the failure of the equalization calculation may be caused by the loss of the link clock during the equalization calculation. Therefore, when the equalization calculation of the second device fails, the first equalization calculation received by the first device from the second device
  • the calculation result also includes the clock loss of each first link in the at least one first link. If there is a first link whose clock loses lock in the at least one first link, it means that the second device is balanced
  • the calculation failure may be caused by the link loss of the first link; in this case, the first device can re-send the first rate to the second device through the auxiliary link, and send the second device through the first sending end to the second device again.
  • the receiving end sends the first clock recovery sequence, and after the second device re-receives the first rate and the first clock recovery sequence, it re-trains the link, thereby facilitating successful link training.
  • the parameters of the first sending end include sending end feedforward equalization (Feed Forward Equalization, FFE) parameters of each first link; if there is no clock loss in at least one first link the first link, the method further includes: judging whether the configuration of the feed-forward equalization parameters of the transmitting end of the first link in which the equalization calculation fails in at least one first link traverses all the preset values of the transmitting-end feed-forward equalization; if not , then update the configuration of the feed-forward equalization parameters at the transmitting end of the first link where the equalization calculation fails from the third value to the fourth value, wherein all the preset values of the transmitting end feed-forward equalization include the third value and the fourth value , and the fourth value is the unconfigured value of the feed-forward equalization parameter of the transmitter of the first link where the equalization calculation fails; send the feed-forward equalization parameter of the transmitter of the first link that fails the equalization calculation to the second device through the auxiliary link The information that the configuration update is completed; wherein
  • FFE Fee Forward
  • the parameters of the first transmitting end include the transmitting end feed-forward equalization parameters of each first link, and the configuration of the value of the transmitting end feed-forward equalizing parameters will affect the link equalization, that is, whether the equalization calculation can be affected. Success; when the equalization calculation at the second receiving end fails, that is, there is a first link in the at least one first link that fails the equalization calculation, the first device judges the transmit-end feedforward equalization of the first link whose equalization calculation fails.
  • the first device adjusts the configuration of the feed-forward equalizing parameters at the sending end of the first link whose equalization calculation fails, for example, sets the first link whose equalization calculation fails.
  • the configuration of the feed-forward equalization parameter at the transmitter of a link is updated to its unconfigured value, and then the first device informs the second device through the auxiliary link of the feed-forward equalization parameter at the transmitter of the first link whose equalization calculation fails.
  • the configuration update is completed; in this way, the second device can perform the equalization calculation again, so that the second device can make the equalization calculation by adjusting the feedforward equalization parameters of the transmitting end of the first link when the second device cannot successfully equalize the calculation. If successful, it is beneficial to realize the successful balance calculation of link training.
  • the first link check result includes a link check result of each first link in the at least one first link, and there is a link check failure in the at least one first link.
  • the first link check result is that the link check fails; otherwise, the first link check result is that the link check succeeds, and the link training of at least one first link succeeds.
  • the first link check result received by the first device from the second device includes a link check result of each of the at least one first link, and the at least one first link
  • the successful link check of the first link requires that each of the at least one first link has a successful link check, as long as there is a first link that fails the link check in the at least one first link , the link check of the at least one first link fails; therefore, the second device sends the link check result of each first link in the at least one first link to the first link check result through the first link check result.
  • the device is helpful for the first device to determine the link check result of the at least one first link.
  • the cable stores the cable information of the cable; the first device stores the device information of the first device; the second device stores the device information of the second device; the method further includes: obtaining The device information of the first device, the cable information of the cable is obtained from the cable, and the device information of the second device is obtained from the second device through the auxiliary link; according to the device information of the first device, the cable of the cable The information and the device information of the second device determine the first rate; the first training parameter value is determined according to the first rate.
  • the cable stores cable information of the cable, and the cable information includes information such as cable capability information, manufacturer information, cable identification code, insertion loss information, and length information;
  • the first device stores information such as cable information.
  • the device information of the first device, the second device stores the device information of the second device, and the device information includes information such as device capability information, device name, serial number, production time, and port information of ports in the device;
  • the first device obtains its own Store the device information of the first device, obtain the cable information of the cable from the cable, and obtain the device information of the second device from the second device through the auxiliary link; since the cable information can be used to characterize the cable capability , the device information can be used to characterize the device capability, so the first device can determine the training rate according to the device information of the first device, the cable information of the cable, and the device information of the second device;
  • the first training parameter value configured by the terminal, exemplarily, determines the first rate according to the capability information of the first device, the capability information of the second device, and the capability
  • Loss information to determine the value of the first training parameter in this way, it is not necessary to start training with the lowest rate and the parameters of the first transmitter are configured as initial values, but the parameters of the first transmitter can be configured to determine the rate at the determined rate. Start training at the first training parameter value of , which is conducive to training at a higher rate and reducing training time.
  • the method further includes: storing at least one item of the following information: the first rate, the cable information of the cable, the device information of the second device, the forward and reverse insertion status of the cable, Or the value configured by the parameters of the first sender after the link training of at least one first link is successful.
  • the first device after the link training is successful, the first device will train the speed, the cable information of the cable (including the identification code of the cable), the device information of the second device (including the port information of the second receiving end) , the forward and reverse insertion state of the cable, the value of the parameter configuration of the first sending end (including the value of the voltage swing of each first link in the at least one first link and the value of the sending end feedforward equalization parameter) At least one of the parameters is stored; when the first device and the second device are connected to the cable for training again, these parameter values can be directly used, thereby reducing the training time and increasing the training rate.
  • an embodiment of the present application provides a link training method, which is applied to a second device.
  • the second device is connected to the first device through a cable.
  • the first device includes a first sending end and a first receiving end.
  • the two devices include a second sending end and a second receiving end;
  • the cable includes at least one first link from the first sending end to the second receiving end and at least one second link from the second sending end to the first receiving end;
  • the method Including: performing link training on at least one first link; in the case where link training is not performed on at least one second link, or before the link training on at least one second link succeeds, the link training is successful at least one of the first links receives data from the first device.
  • the cable further includes an auxiliary link; performing link training on at least one first link includes: receiving the first rate from the first device through the auxiliary link; When the parameters of the end are configured as the second training parameter value, clock locking, equalization calculation, and link checking of at least one first link are performed at the first rate.
  • performing clock locking, equalization calculation and link checking of at least one first link includes: receiving a first clock recovery sequence from the first sending end through the second receiving end; The recovery sequence performs clock locking, and sends the first clock locking result to the first device through the auxiliary link, where the first clock locking result is clock locking success or clock locking failure; in the case of successful clock locking, the second receiving The terminal receives the first equalization sequence from the first sending end; performs equalization calculation according to the first equalization sequence; in the case that the equalization calculation fails, sends the first equalization calculation result to the first device through the auxiliary link, wherein the first equalization calculation The result is that the balance calculation fails; if the balance calculation is successful, a link check is performed, and the first link check result is sent to the first device through the auxiliary link, wherein the first link check result is that the link check is successful or Link check failed.
  • the second device may also choose to send the first equalization calculation result through the auxiliary link.
  • the character delimitation succeeds, the period synchronization succeeds, or the bit error rate is less than the error rate If the code rate is 1, the equalization calculation fails; otherwise, the equalization calculation succeeds.
  • the parameters configured by the second receiving end include continuous time linear equalization (Continuous Time Linear Equalization, CTLE) parameters; before performing equalization calculation according to the first equalization sequence, the method further includes: judging at least one Whether there is a first link whose clock loses lock in the first link; if there is a first link whose clock loses lock in at least one first link, the continuous time linear equalization parameter for the first link whose clock loses lock The configuration of the device is updated, and the information that the clock of the first link is out of lock is sent to the first device through the auxiliary link.
  • CTLE Continuous Time Linear Equalization
  • the failure of the equalization calculation may be caused by the loss of the link clock during the equalization calculation. Therefore, before the second device performs the equalization calculation, it is determined whether there is a clock in the at least one first link.
  • the first link that loses lock if there is a first link whose clock loses lock, the configuration of the continuous time linear equalization parameter of the first link whose clock loses lock is updated, and then the auxiliary link is used to notify the clock loss of the first link.
  • the first device can re-send the first rate to the second device through the auxiliary link, and send the first clock recovery sequence to the second receiving end through the first sending end , after the second device re-receives the first rate and the first clock recovery sequence, it performs link training again, which is beneficial to make the link training successful.
  • the link check fails; otherwise, the link check succeeds, and the link training of at least one first link succeeds.
  • the cable stores cable information of the cable; the method further includes: acquiring the cable information of the cable from the cable; Two training parameter values.
  • the second training parameter value is determined according to the first rate and insertion loss information in the cable information.
  • the method further includes: storing at least one item of the following information: the first rate, the cable information of the cable, the device information of the first device, the forward and reverse insertion status of the cable, Or the value of the parameter configuration of the second receiving end after the link training of at least one first link is successful; wherein, the device information of the first device is obtained from the first device through the auxiliary link.
  • the second device will train the speed, cable information of the cable (including the identification code of the cable), and device information of the first device (including the port information of the first sending end) , the forward and reverse insertion state of the cable, the value of the parameter configuration of the second receiving end (including the value of the continuous time linear equalization parameter of each first link in the at least one first link and the decision feedback equalization (Decision Feedback Equalization). , DFE) parameter value) at least one item is stored; when the first device and the second device reconnect the cable for training again, these parameter values can be directly used to reduce the training time and improve the training rate.
  • DFE Decision Feedback Equalization
  • an embodiment of the present application provides a link training method, which is applied to a first device.
  • the first device is connected to a second device through a cable, the first device includes a first sending end, and the first device stores a first device.
  • Device information of a device the second device includes a second receiving end, the second device stores the device information of the second device;
  • the cable includes a main link, and the cable stores the cable information of the cable;
  • the method includes: obtaining The device information of the first device, the cable information of the cable is obtained from the cable, and the device information of the second device is obtained from the second device through the auxiliary link; according to the device information of the first device, the cable of the cable
  • the information and the device information of the second device determine the first rate, and determine at least one first link from the first sending end to the second receiving end from the main link; determine the first training parameter value according to the first rate;
  • the parameters of a transmitting end are configured as the first training parameter value, clock locking, equalization calculation and link checking of at
  • the first device stores the device information of the first device
  • the second device stores the device information of the second device
  • the cable stores the cable information of the cable
  • the first device can obtain its own storage
  • the device information of the first device, the cable information of the cable is obtained from the cable
  • the device information of the second device is obtained from the second device through the auxiliary link
  • the first link training method is determined according to the three pieces of information.
  • the first device can also determine at least one first link from the first transmitter to the second receiver from the main link, Therefore, when the parameters of the first transmitting end are configured as the first training parameter values, clock locking, equalization calculation, and link checking of at least one first link are performed at the first rate, thereby realizing the at least one first link. link training. In this way, it is not necessary to start training with the lowest rate and the parameters of the first sender are configured as initial values, but can be trained at the determined first rate and the parameters of the first sender are configured with the determined values of the first training parameters. Start training, it is beneficial to train at a higher rate and reduce training time.
  • the cable further includes an auxiliary link
  • the method further includes: sending a first rate to the second device through the auxiliary link, where the first rate is a link of at least one first link training rate.
  • the cable further includes an auxiliary link, and performing clock locking, equalization calculation and link checking of at least one first link, including: sending the first Clock recovery sequence; receiving the first clock locking result from the second device through the auxiliary link, wherein the first clock locking result is that the clock locking is successful or the clock locking fails; in the case that the first clock locking result is that the clock is locking successfully,
  • the first equalization sequence is sent by the first transmitter to the second receiver, and the first equalization sequence is used for equalization calculation by the second device; the first equalization calculation result or the first link check is received from the second device through the auxiliary link
  • the first balance calculation result is that the balance calculation fails
  • the first link check result is that the link check succeeds or the link check fails.
  • the first clock locking result includes a clock locking result of each first link in the at least one first link, and there is a first link whose clock locking fails in the at least one first link
  • the first clock locking result is that the clock locking fails; otherwise, the first clock locking result is that the clock locking succeeds.
  • the parameter of the first transmitting end includes a voltage swing of each first link; the method further includes: judging the voltage swing of the first link whose clock lock fails in the at least one first link Whether the configuration traverses all the voltage swing preset values; if not, update the voltage swing configuration of the first link whose clock lock fails from the first value to the second value, wherein all the voltage swing preset values
  • the set value includes a first value and a second value, and the second value is an unconfigured value of the voltage swing of the first link whose clock lock fails; the first link whose clock lock fails is sent to the second device through the auxiliary link information about the completion of updating the configuration of the voltage swing; wherein, the first training parameter value includes the voltage swing training value, and when the configuration of the voltage swing of the first link whose clock lock fails is updated for the first time, the first value is the voltage swing Amplitude training value.
  • the first balance calculation result includes a balance calculation result of each first link in the at least one first link, and there is a first link whose balance calculation fails in the at least one first link
  • the result of the first equalization calculation is that the equalization calculation fails.
  • the first equalization calculation result further includes a clock out-of-lock condition of each first link in the at least one first link; the method further includes: judging whether there is a clock in the at least one first link The first link whose clock loses lock; if there is a first link whose clock loses lock in at least one first link, the first rate is sent to the second device through the auxiliary link, and the second device is sent through the first sending end to the second device.
  • the receiver sends the first clock recovery sequence.
  • the parameters of the first transmitting end include the transmitting end feedforward equalization parameters of each first link; if there is no first link whose clock is out of lock in at least one of the first links, the method further Including: judging whether the configuration of the sending end feedforward equalization parameter of the first link where the equalization calculation fails in at least one first link traverses all the preset values of the sending end feedforward equalization; The configuration of the feed-forward equalization parameter at the transmitting end of a link is updated from the third value to the fourth value, wherein all the preset feed-forward equalization values of the transmitting end include the third value and the fourth value, and the fourth value is the equalization calculation failure The unconfigured value of the feed-forward equalization parameter of the first link of the first link; the information that the configuration update of the feed-forward equalization parameter of the first link of the first link where the equalization calculation fails is sent to the second device through the auxiliary link; wherein , the first training parameter value includes the sending end feedforward equalization training value, and
  • the first link check result includes a link check result of each first link in the at least one first link, and there is a link check failure in the at least one first link.
  • the first link check result is that the link check fails; otherwise, the first link check result is that the link check succeeds, and the link training of at least one first link succeeds.
  • the method further includes: storing at least one item of the following information: the first rate, the cable information of the cable, the device information of the second device, the forward and reverse insertion status of the cable, or The value of the parameter configuration of the first sender after the link training of at least one first link is successful.
  • an embodiment of the present application provides a link training method, which is applied to a second device.
  • the second device is connected to the first device through a cable, the first device includes a first sending end, and the second device includes a second device.
  • a receiving end the cable includes a main link and an auxiliary link, and the cable stores the cable information of the cable;
  • the method includes: acquiring the cable information of the cable from the cable; receiving the cable information from the first device through the auxiliary link determine the second training parameter value according to the cable information of the cable and the first rate; when the parameters of the second receiving end are configured as the second training parameter value, perform at least one first training session at the first rate Clock locking, equalization calculation, and link checking of links, wherein at least one first link is the link from the first sender to the second receiver, and at least one first link is determined by the first device from the main link .
  • performing clock locking, equalization calculation and link checking of at least one first link includes: receiving a first clock recovery sequence from the first sending end through the second receiving end; The recovery sequence performs clock locking, and sends the first clock locking result to the first device through the auxiliary link, where the first clock locking result is clock locking success or clock locking failure; in the case of successful clock locking, the second receiving The terminal receives the first equalization sequence from the first sending end; performs equalization calculation according to the first equalization sequence; in the case that the equalization calculation fails, sends the first equalization calculation result to the first device through the auxiliary link, wherein the first equalization calculation The result is that the balance calculation fails; if the balance calculation is successful, a link check is performed, and the first link check result is sent to the first device through the auxiliary link, wherein the first link check result is that the link check is successful or Link check failed.
  • the character delimitation succeeds, the period synchronization succeeds, or the bit error rate is less than the error rate If the code rate is 1, the equalization calculation fails; otherwise, the equalization calculation succeeds.
  • the parameters configured by the second receiving end include continuous-time linear equalization parameters; before performing equalization calculation according to the first equalization sequence, the method further includes: judging whether there is a clock failure in at least one first link The first link that is locked; if there is a first link whose clock loses lock in at least one first link, update the configuration of the continuous time linear equalization parameter of the first link whose clock loses lock, and pass the auxiliary link The channel sends information that the clock of the first link is out of lock and the clock of the first link is out of lock to the first device.
  • the failure of the equalization calculation may be caused by the loss of the link clock during the equalization calculation. Therefore, before the second device performs the equalization calculation, it is determined whether there is a clock in the at least one first link.
  • the first link that loses lock if there is a first link whose clock loses lock, the configuration of the continuous time linear equalization parameter of the first link whose clock loses lock is updated, and then the auxiliary link is used to notify the clock loss of the first link.
  • the first device can re-send the first rate to the second device through the auxiliary link, and send the first clock recovery sequence to the second receiving end through the first sending end , after the second device re-receives the first rate and the first clock recovery sequence, it performs link training again, which is beneficial to make the link training successful.
  • the link check fails; otherwise, the link check succeeds, and the link training of at least one first link succeeds.
  • the method further includes: storing at least one item of the following information: the first rate, the cable information of the cable, the device information of the first device, the forward and reverse insertion status of the cable, or The value of the parameter configuration of the second receiving end after the link training of at least one first link is successful; wherein, the device information of the first device is obtained from the first device through the auxiliary link.
  • the second device will train the speed, cable information of the cable (including the identification code of the cable), and device information of the first device (including the port information of the first sending end) , the forward and reverse insertion state of the cable, the value of the parameter configuration of the second receiving end (including the value of the continuous time linear equalization parameter and the value of the decision feedback equalization parameter of each first link in the at least one first link) At least one of the parameters is stored; when the first device and the second device are connected to the cable for training again, these parameter values can be directly used, thereby reducing the training time and increasing the training rate.
  • an embodiment of the present application provides a link training apparatus, which is applied to a first device, the first device and the second device are connected by a cable, and the cable includes at least one first link and at least one second link
  • the link training device includes: a training unit for performing link training on at least one first link, where the at least one first link is a link from a first device to a second device; a sending unit for In the case that at least one second link has not undergone link training, or before the link training of at least one second link is successful, data is sent to the second device through at least one first link that has been successfully trained, at least A second link is a link from the second device to the first device.
  • the first device includes a first sending end
  • the second device includes a second receiving end
  • at least one first link is a link from the first sending end to the second receiving end
  • the cable also Including an auxiliary link
  • the training unit is specifically configured to: send a first rate to the second device through the auxiliary link, where the first rate is at least one first link
  • the parameters of the first transmitting end are configured as the first training parameter values, clock locking, equalization calculation and link checking of at least one first link are performed at the first rate.
  • the training unit is specifically configured to: send the first clock recovery to the second receiving end through the first sending end sequence; receive the first clock locking result from the second device through the auxiliary link, wherein the first clock locking result is that the clock is successfully locked or the clock has failed;
  • a transmitter sends a first equalization sequence to a second receiver, and the first equalization sequence is used for equalization calculation by the second device; receives the first equalization calculation result or the first link inspection result from the second device through the auxiliary link,
  • the first balance calculation result is that the balance calculation fails
  • the first link check result is that the link check succeeds or the link check fails.
  • the first clock locking result includes a clock locking result of each first link in the at least one first link, and there is a first link whose clock locking fails in the at least one first link
  • the first clock locking result is that the clock locking fails; otherwise, the first clock locking result is that the clock locking succeeds.
  • the parameters of the first transmitting end include a voltage swing of each first link; the training unit is further configured to: determine the voltage of the first link whose clock lock fails in the at least one first link Whether the swing configuration traverses all the voltage swing preset values; if not, the voltage swing configuration of the first link whose clock lock fails is updated from the first value to the second value, wherein all the voltage swings
  • the preset amplitude value includes a first value and a second value, and the second value is an unconfigured value of the voltage swing of the first link whose clock lock fails; Information that the configuration update of the voltage swing of the link is completed; wherein, the first training parameter value includes the voltage swing training value, and when the configuration of the voltage swing of the first link whose clock lock fails is updated for the first time, the first value is Voltage swing training value.
  • the first balance calculation result includes a balance calculation result of each first link in the at least one first link, and there is a first link whose balance calculation fails in the at least one first link
  • the result of the first equalization calculation is that the equalization calculation fails.
  • the first equalization calculation result further includes a clock out-of-lock condition of each of the at least one first link; the training unit is further configured to: determine whether the at least one first link is in Whether there is a first link whose clock loses lock; if there is a first link whose clock loses lock in at least one of the first links, send the first rate to the second device through the auxiliary link, and send the first link to the second device through the first sending end.
  • the second receiving end sends the first clock recovery sequence.
  • the parameters of the first transmitting end include the transmitting end feedforward equalization parameters of each first link; if there is no first link whose clock is out of lock in at least one of the first links, the training unit It is also used for: judging whether the configuration of the transmit-end feed-forward equalization parameters of the first link in which the equalization calculation fails in at least one first link traverses all the transmit-end feed-forward equalization preset values; if not, the equalization calculation fails.
  • the first link check result includes a link check result of each first link in the at least one first link, and there is a link check failure in the at least one first link.
  • the first link check result is that the link check fails; otherwise, the first link check result is that the link check succeeds, and the link training of at least one first link succeeds.
  • the cable stores the cable information of the cable; the first device stores the device information of the first device; the second device stores the device information of the second device; the training unit is further configured to: Obtain the device information of the first device, obtain the cable information of the cable from the cable, and obtain the device information of the second device from the second device through the auxiliary link; The cable information and the device information of the second device determine the first rate; the first training parameter value is determined according to the first rate.
  • the training unit is further configured to: store at least one item of the following information: the first rate, the cable information of the cable, the device information of the second device, the forward and reverse insertion status of the cable , or the value configured by the parameters of the first transmitting end after the link training of at least one first link is successful.
  • an embodiment of the present application provides a link training apparatus, which is applied to a second device.
  • the second device is connected to the first device through a cable, and the cable includes at least one first link and at least one second link
  • the link training device includes: a training unit for performing link training on at least one first link, where the at least one first link is a link from a first device to a second device; a receiving unit for performing link training on at least one first link
  • link training is not performed on at least one second link, or before the link training of at least one second link is successful, data from the first device is received through at least one first link whose link training is successful,
  • the at least one second link is a link from the second device to the first device.
  • the first device includes a first sending end
  • the second device includes a second receiving end
  • at least one first link is a link from the first sending end to the second receiving end
  • the cable also Including an auxiliary link
  • the training unit is specifically used to: receive the first rate from the first device through the auxiliary link; configure the parameters of the second receiving end as the second In the case of training parameter values, clock locking, equalization calculation, and link checking of at least one first link are performed at the first rate.
  • the training unit is specifically configured to: receive the first clock recovery from the first transmitter through the second receiver sequence; perform clock locking according to the first clock recovery sequence, and send the first clock locking result to the first device through the auxiliary link, wherein the first clock locking result is clock locking success or clock locking failure; in the case of successful clock locking
  • receive the first equalization sequence from the first transmitting end through the second receiving end perform equalizing calculation according to the first equalizing sequence; in the case that the equalizing calculation fails, send the first equalizing calculation result to the first device through the auxiliary link
  • the first balance calculation result is that the balance calculation fails; if the balance calculation is successful, a link check is performed, and the first link check result is sent to the first device through the auxiliary link, where the first link check result is For link check success or link check failure.
  • the character delimitation succeeds, the period synchronization succeeds, or the bit error rate is less than the error rate If the code rate is 1, the equalization calculation fails; otherwise, the equalization calculation succeeds.
  • the parameters configured by the second receiving end include continuous-time linear equalization parameters; the training unit is further configured to: before performing equalization calculation according to the first equalization sequence, determine whether there is a presence in at least one first link The first link whose clock loses lock; if there is a first link whose clock loses lock in at least one first link, update the configuration of the continuous time linear equalization parameter of the first link whose clock loses lock, and pass The auxiliary link sends to the first device information that the clock of the first link is out of lock.
  • the link check fails; otherwise, the link check succeeds, and the link training of at least one first link succeeds.
  • the cable stores the cable information of the cable; the training unit is further configured to: obtain the cable information of the cable from the cable; determine the cable information according to the cable information and the first rate The second training parameter value.
  • the training unit is further configured to: store at least one item of the following information: the first rate, the cable information of the cable, the device information of the first device, the forward and reverse insertion status of the cable , or the value configured by the parameters of the second receiving end after the link training of at least one first link is successful; wherein, the device information of the first device is obtained from the first device through the auxiliary link.
  • an embodiment of the present application provides a link training device, where the link training device includes a processor, a first transmitting end and a first receiving end coupled to the processor, and the link training device and the second device connected by a cable; the second device includes a second sending end and a second receiving end; the cable includes at least one first link from the first sending end to the second receiving end and at least one first link from the second sending end to the first receiving end Two links; the processor is configured to: perform link training of at least one first link; in the case where link training is not performed on at least one second link, or before the link training of at least one second link is successful , sending data to the second device through the at least one first link successfully trained on the link.
  • the cable further includes an auxiliary link; in terms of performing link training on at least one first link, the processor is specifically configured to: send the first rate to the second device through the auxiliary link, The first rate is the link training rate of at least one first link; in the case where the parameters of the first transmitting end are configured as the first training parameter value, the clock locking of at least one first link is performed at the first rate , balance calculation and link check.
  • the processor is specifically configured to: send the first clock recovery to the second receiving end through the first sending end sequence; receive the first clock locking result from the second device through the auxiliary link, wherein the first clock locking result is that the clock is successfully locked or the clock has failed;
  • a transmitter sends a first equalization sequence to a second receiver, and the first equalization sequence is used for equalization calculation by the second device; receives the first equalization calculation result or the first link inspection result from the second device through the auxiliary link,
  • the first balance calculation result is that the balance calculation fails
  • the first link check result is that the link check succeeds or the link check fails.
  • the first clock locking result includes a clock locking result of each first link in the at least one first link, and there is a first link whose clock locking fails in the at least one first link
  • the first clock locking result is that the clock locking fails; otherwise, the first clock locking result is that the clock locking succeeds.
  • the parameter of the first transmitting end includes a voltage swing of each first link; the processor is further configured to: determine the voltage of the first link whose clock lock fails in the at least one first link Whether the swing configuration traverses all the voltage swing preset values; if not, the voltage swing configuration of the first link whose clock lock fails is updated from the first value to the second value, wherein all the voltage swings
  • the preset amplitude value includes a first value and a second value, and the second value is an unconfigured value of the voltage swing of the first link whose clock lock fails; Information that the configuration update of the voltage swing of the link is completed; wherein, the first training parameter value includes the voltage swing training value, and when the configuration of the voltage swing of the first link whose clock lock fails is updated for the first time, the first value is Voltage swing training value.
  • the first balance calculation result includes a balance calculation result of each first link in the at least one first link, and there is a first link that fails the balance calculation in the at least one first link
  • the result of the first equalization calculation is that the equalization calculation fails.
  • the first equalization calculation result further includes a clock out-of-lock condition of each first link in the at least one first link; the processor is further configured to: determine whether the at least one first link has Whether there is a first link whose clock loses lock; if there is a first link whose clock loses lock in at least one of the first links, send the first rate to the second device through the auxiliary link, and send the first link to the second device through the first sending end.
  • the second receiving end sends the first clock recovery sequence.
  • the parameters of the first transmitting end include the transmitting end feedforward equalization parameters of each first link; if there is no first link whose clock is out of lock in at least one of the first links, the processor It is also used for: judging whether the configuration of the transmit-end feed-forward equalization parameters of the first link in which the equalization calculation fails in at least one first link traverses all the transmit-end feed-forward equalization preset values; if not, the equalization calculation fails.
  • the first link check result includes a link check result of each first link in the at least one first link, and there is a link check failure in the at least one first link.
  • the first link check result is that the link check fails; otherwise, the first link check result is that the link check succeeds, and the link training of at least one first link succeeds.
  • the cable stores the cable information of the cable; the first device stores the device information of the first device; the second device stores the device information of the second device; the processor is further configured to: Obtain the device information of the first device, obtain the cable information of the cable from the cable, and obtain the device information of the second device from the second device through the auxiliary link; The cable information and the device information of the second device determine the first rate; the first training parameter value is determined according to the first rate.
  • the processor is further configured to: store at least one item of the following information: the first rate, the cable information of the cable, the device information of the second device, the forward and reverse insertion status of the cable , or the value configured by the parameters of the first transmitting end after the link training of at least one first link is successful.
  • an embodiment of the present application provides a link training device, the link training device includes a processor, and a second transmitting end and a second receiving end coupled to the processor, the link training device and the first device Connected by a cable; the first device includes a first sending end and a first receiving end; the cable includes at least one first link from the first sending end to the second receiving end and at least one first link from the second sending end to the first receiving end Two links; the processor is configured to: perform link training of at least one first link; in the case where link training is not performed on at least one second link, or before the link training of at least one second link is successful , and receive data from the first device through at least one first link whose link training is successful.
  • the cable further includes an auxiliary link; in terms of performing link training on at least one first link, the processor is specifically configured to: receive the first rate from the first device through the auxiliary link ; Under the condition that the parameter of the second receiving end is configured as the second training parameter value, perform clock locking, equalization calculation and link checking of at least one first link at the first rate.
  • the processor is specifically configured to: receive, through the second receiving end, the first clock recovery from the first sending end sequence; perform clock locking according to the first clock recovery sequence, and send the first clock locking result to the first device through the auxiliary link, wherein the first clock locking result is clock locking success or clock locking failure; in the case of successful clock locking
  • receive the first equalization sequence from the first transmitting end through the second receiving end perform equalizing calculation according to the first equalizing sequence; in the case that the equalizing calculation fails, send the first equalizing calculation result to the first device through the auxiliary link
  • the first balance calculation result is that the balance calculation fails; if the balance calculation is successful, a link check is performed, and the first link check result is sent to the first device through the auxiliary link, where the first link check result is For link check success or link check failure.
  • the character delimitation succeeds, the period synchronization succeeds, or the bit error rate is less than the error rate If the code rate is 1, the equalization calculation fails; otherwise, the equalization calculation succeeds.
  • the parameters configured by the second receiving end include continuous-time linear equalization parameters; the processor is further configured to: before performing equalization calculation according to the first equalization sequence, determine whether there is a presence in at least one of the first links The first link whose clock loses lock; if there is a first link whose clock loses lock in at least one first link, update the configuration of the continuous time linear equalization parameter of the first link whose clock loses lock, and pass The auxiliary link sends to the first device information that the clock of the first link is out of lock.
  • the link check fails; otherwise, the link check succeeds, and the link training of at least one first link succeeds.
  • the cable stores cable information of the cable; the processor is further configured to: obtain the cable information of the cable from the cable; determine according to the cable information of the cable and the first rate The second training parameter value.
  • the processor is further configured to: store at least one item of the following information: the first rate, the cable information of the cable, the device information of the first device, the forward and reverse insertion status of the cable , or the value configured by the parameters of the second receiving end after the link training of at least one first link is successful; wherein, the device information of the first device is obtained from the first device through the auxiliary link.
  • an embodiment of the present application provides a first device, including a processor, a memory, a communication interface, and one or more programs, wherein the one or more programs are stored in the above-mentioned memory and are configured by the above-mentioned
  • the processor executes the above program comprising instructions for performing the steps in the method according to any one of the above first or third aspects.
  • an embodiment of the present application provides a second device, including a processor, a memory, a communication interface, and one or more programs, where the one or more programs are stored in the memory and configured by the above
  • the processor executes the above program comprising instructions for performing the steps in the method according to any one of the above second or fourth aspects.
  • an embodiment of the present application provides a link training apparatus, including a processor and a transmission interface, where the processor is configured to call a program stored in a memory, so that the link training apparatus implements the following: The method of any one of the first to fourth aspects above.
  • an embodiment of the present application provides a computer-readable storage medium, where the computer-readable storage medium includes a computer program, and when the computer program is executed on a computer or a processor, the computer or the computer program is executed.
  • the processor performs the method according to any one of the first to fourth aspects above.
  • an embodiment of the present application provides a computer program product, where the computer program product includes a computer program, when the computer program runs on a computer or a processor, the computer or the processor causes the computer or the processor to perform The method of any one of the first to fourth aspects above.
  • FIG. 1 is a schematic diagram of a state of high-definition multimedia interface link training provided by an embodiment of the present application.
  • FIG. 2 is a schematic flowchart of a clock recovery phase during training of a display interface link provided by an embodiment of the present application.
  • FIG. 3 is a schematic flowchart of an equalization phase during training of a display interface link provided by an embodiment of the present application.
  • FIG. 4 is a schematic state diagram of a universal serial bus link training provided by an embodiment of the present application.
  • FIG. 5 is a schematic flowchart of a universal serial bus link training provided by an embodiment of the present application.
  • FIG. 6 is a transition diagram of a link training state (Link Training States, LTS) provided by an embodiment of the present application.
  • LTS Link Training States
  • FIG. 7 is a schematic flowchart of link training of a transmitting end device according to an embodiment of the present application.
  • FIG. 8 is a schematic flowchart of link training of a receiving end device according to an embodiment of the present application.
  • FIG. 9 is a schematic structural diagram of a communication system provided by an embodiment of the present application.
  • FIG. 10 is a schematic diagram of an internal connection between interfaces provided by an embodiment of the present application.
  • FIG. 11 is a schematic flowchart of a link training method provided by an embodiment of the present application.
  • FIG. 12 is a schematic structural diagram of a link training apparatus provided by an embodiment of the present application.
  • FIG. 13 is a schematic structural diagram of another link training apparatus provided by an embodiment of the present application.
  • FIG. 14 is a schematic structural diagram of an electronic device provided by an embodiment of the present application.
  • FIG. 15 is a schematic structural diagram of another electronic device provided by an embodiment of the present application.
  • At least one (item) refers to one or more, and "a plurality” refers to two or more.
  • “And/or” is used to describe the relationship between related objects, indicating that there can be three kinds of relationships, for example, “A and/or B” can mean: only A, only B, and both A and B exist , where A and B can be singular or plural.
  • the character “/” generally indicates that the associated objects are an “or” relationship.
  • At least one item(s) below” or similar expressions thereof refer to any combination of these items, including any combination of single item(s) or plural items(s).
  • At least one (a) of a, b or c can mean: a, b, c, "a and b", “a and c", “b and c", or "a and b and c" ", where a, b, c can be single or multiple.
  • Cable information including cable capability information, manufacturer information, cable identification code, insertion loss information, length and other information; cable information can be used to characterize the capability of the cable.
  • Insertion loss information the insertion loss of the cable at each supported rate.
  • Device information including device capability information, device name, serial number, production time and other information that can identify a specific device, as well as port information of ports in the device; device information can be used to characterize the capabilities of the device.
  • Port information including port number and other information that can identify a specific port of the device; the port information can be used to characterize the capability of the port.
  • the training of HDMI2.1 includes 6 states: LTS:1, LTS:2, LTS:3, LTS:4, LTS:P, LTS:L.
  • the core state is LTS: 3.
  • the access source device also called source
  • the access end device also called sink
  • a single rate training takes up to 200ms, and the training takes a long time. Before each training, the training-related parameters of the sender and receiver are reset to their default values. If the equipment and cables do not change (such as unplugging, re-training, etc.), it still takes the same time to train again. Refer to the parameters of the previous training to speed up the training.
  • the sender can only actively query the receiver for the equilibrium state, and the query interval cannot exceed 2ms, which requires high software and costs a lot.
  • TxFFE transmitter feedforward equalization
  • the training of the display interface mainly includes two stages: clock recovery (Clock Recovery, CR) and equalization (Equalization, EQ).
  • Display Interface Transmitter selects the maximum number of links and rate to start training, resets all parameters and sends TPS1.
  • the display interface receiver (DP Rx) starts clock recovery. If the receiver clock recovery stage fails, the transmitter can adjust the voltage swing (Voltage Swing, also referred to as Swing) and pre-emphasis (Pre-emphasis). When all voltage swings and pre-emphasis are adjusted and the receiver cannot recover the clock, the DPTx slows down. If the rate is reduced to the minimum and the clock cannot be recovered, the link will be down (4 link ⁇ 2 link ⁇ 1 link).
  • Voltage Swing also referred to as Swing
  • Pre-emphasis pre-emphasis
  • DP Rx checks all links for LANEx_CR_Done (Lane x clock recovery complete), LANEx_CHANNEL_EQ_DONE (Lane x equalization calculation complete), LANEx_SYMBOL_LOCKED (Lane x symbol lock), and INTERLANE_ALIGN_DONE (Inter-Lane alignment complete). When all four conditions are satisfied, the training is successful. If the CR fails, drop the link and re-enter the CR stage. If the other three conditions fail, then request DP Tx to adjust Voltage Swing and Pre-emphasis and check loop (up to 5 times). If the cycle detection is unsuccessful, the speed will be lowered in turn and re-enter the CR stage.
  • the training-related parameters of the sender and receiver are reset to their default values. If the equipment and cables do not change (such as unplugging, waking up from standby, etc.), it still takes the same time to train again. , cannot refer to the parameters of the previous training to speed up the training.
  • USB4.0 can support bidirectional transmission and training, and its training includes two states: CLd and training (Training).
  • CLd state the main function is to use the auxiliary links to initialize each link separately.
  • the sender and receiver negotiate a set of optimal TxFFE parameters to complete the equalization coarse adjustment; including 5 sub-states; CLd only represents one state, in which the transmitter and receiver of the link adapter are inactive (active). )state.
  • Training state The main function is to transmit the parameters of the link through both ends of the link (including the link number used during training between the USB host and the storage device, the training sequence number sent, etc.), symbol synchronization (i.e. find the boundaries of the sequence); which includes 4 sub-states.
  • the USB protocol supports two-way training, but during two-way training, a pair of links (two directions) are trained at the same time. The two-direction training process is coupled together, and the two-way training rate and the number of links must be exactly the same.
  • the downlink rate and uplink rate must be exactly the same during training, and the rates and modes of the two pairs of links must also be exactly the same.
  • the constraints are strong and not flexible enough; among them, the USB link can work in several modes of Gen 1/Gen 2/Gen 3, and the transmission methods in different modes are different.
  • the training-related parameters of the sender and receiver are reset to their default values. If the equipment and cables are not changed (such as unplugging, waking up from standby, etc.), it still takes the same time to train again. , cannot refer to the parameters of the previous training to speed up the training.
  • the service transmission must be successfully trained in both directions. For audio and video service scenarios, the lighting time is later.
  • FIG. 6 is a link training state transition diagram provided by an embodiment of the present application.
  • the link training state includes but is not limited to the following states:
  • the idle state indicates that the link is in an idle state, and the link is in a non-transmitting state, that is, no data is transmitted.
  • check whether the link is plugged in and ready that is, check whether the devices that need to be connected at both ends of the cable are plugged in and are ready for link training; Whether the device at the receiving end of the link (referred to as the sending end device) and the device at the receiving end of the link (referred to as the receiving end device) is inserted and ready for link training.
  • the capability interaction state S1 is entered.
  • the capabilities that require interaction include the capabilities of the cable and the device.
  • Other business capabilities, link capabilities include the number of supported links, the maximum transmission rate supported in the downlink direction and the uplink direction, etc.
  • the devices connected at both ends of the cable exchange capabilities through the auxiliary links in the cable.
  • the transmitting end device obtains the cable information of the cable (including cable capability information, manufacturer information, cable identification code, insertion loss information, length and other information) from the cable, and obtains the cable information from the receiving end through the auxiliary link.
  • the device information of the receiving end device (including the port information of the receiving end) is obtained from the device; the receiving end device obtains the cable information of the cable from the cable, and the device information of the transmitting end device is obtained from the transmitting end device through the auxiliary link ( Including the port information of the sender).
  • the cable information of the cable can be obtained from the cable only by one of the devices connected at both ends of the cable, and then sent to the other device through the auxiliary link.
  • This application does not make any specific limitations. Among them, after the ability interaction is completed, the training decision state S2 is entered.
  • the number of links and training rate used for training are decided according to the capability of the cable and the capabilities of the devices connected at both ends of the cable.
  • the devices connected at both ends of the cable can be divided into master devices (or downstream devices) and slave devices (or upstream devices).
  • the master device includes the downstream port (Main Downstream Port, MDP) and the slave device includes the upstream port (Main Upstream Port).
  • the downstream direction is the direction from the downstream port to the upstream port, that is, the direction from the master device to the slave device, the master device is the sending end device, and the slave device is the receiving end device;
  • the upstream direction is the direction from the upstream port to the downstream port, That is, the direction from the slave device to the master device, the slave device is the sender device, and the master device is the receiver device.
  • the master device decides the number of links used for training in the uplink and downlink directions; when the slave device has special needs, the slave device can request the master device to adjust the number of links used for training in the uplink and downlink directions through the auxiliary link. .
  • the training rate of the link training is decided by the transmitting end device and sent to the receiving end device.
  • the slave device decides the training rate in the uplink direction and sends it to the master device; during link training in the downlink direction, the master device decides the rate in the downlink direction and sends it to the slave device.
  • the link training in the uplink direction fails, the slave device needs to decide to slow down the training or retrain according to its own strategy.
  • the master device needs to decide to slow down the training or retrain according to its own strategy.
  • the idle state S0 is returned; if the decision on the number of links and the training rate is successful, the parameter acquisition or estimation state S3 is entered.
  • Parameter acquisition or estimation differs between first-time link training and non-first-time link training.
  • the devices connected at both ends of the cable have not previously performed data transmission through the cable; or have not previously performed link training when connected through the cable; or have previously been connected through the cable
  • Link training was performed with a cable connection but the previous link training was unsuccessful; or link training was performed with the cable connection before and the previous link training was successful, but the previous link was not saved Information about the success of the training.
  • the transmitting end device determines the values of the training parameters required for this training (referred to as training parameters) according to the capabilities of the cable, the capabilities of the transmitting end device, and the capabilities of the receiving end device.
  • the training rate is determined according to the capability of the cable, the capability of the transmitting end device, and the capability of the receiving end device, and then the training parameter value of this training is determined according to the training rate, for example, the training rate and the training parameter are preset.
  • the mapping relationship of the preset values, after the training rate is determined, the training parameter values of this training can be determined from the preset values of the training parameters according to the mapping relationship; Estimating the training parameter values of this training, for example, estimating a set of training parameter values as the training parameter values of this training according to the insertion loss information in the cable information.
  • the receiving end device according to the training rate sent by the transmitting end device, determines a set of training parameter values for this training.
  • the devices connected to both ends of the cable are not trained for the first time, it means that the devices connected to both ends of the cable have been trained before.
  • the devices connected to the terminal respectively obtain the respectively stored training parameter values as the parameter values required for this training.
  • the transmitting-end device can match the stored information about the previous link training success according to the training rate, cable information, and device information of the receiving-end device (including the port information of the receiving end of the link) for this training.
  • Set the training parameter value as the training parameter value of this training; if a set of training parameter value cannot be obtained by matching, a set of training parameter value can be estimated as the training parameter of this training according to the insertion loss information in the cable information value.
  • the receiving end device can match a set of training parameters from the stored information about the previous link training success according to the training rate, cable information, and device information of the transmitting end device (including the port information of the transmitting end of the link) for this training. value, as the training parameter value of this training; if a set of training parameter values cannot be obtained by matching, a set of training parameter values can be estimated as the training parameter value of this training according to the insertion loss information in the cable information.
  • the training parameters required by the transmitter device include: voltage swing (Voltage Swing), transmitter pre-emphasis strength (TxFFE, also known as transmitter feedforward equalization parameters);
  • the training parameters required by the receiver device include: the receiver Parameters of continuous time linear equalizer (CTLE) (referred to as continuous time linear equalization parameters), and parameters of the receiver decision feedback equalizer (DFE) (referred to as decision feedback equalization parameters).
  • CTLE receiver Parameters of continuous time linear equalizer
  • DFE receiver decision feedback equalizer
  • the training can be initiated to perform clock recovery and lock state S4; the training in the downlink direction and the training in the uplink direction can be performed synchronously or asynchronously; the training in the downlink direction
  • the training in the upstream direction is independent of each other and does not interfere or affect each other.
  • the transmitting end device sends a clock recovery sequence to the receiving end device on the link; after receiving the clock recovery end device, the receiving end device performs clock recovery and locking according to the clock recovery sequence.
  • the clock lock fails, it returns to the training decision state S2; if the clock lock succeeds, it enters the balance calculation and link check state S5.
  • the transmitting end device sends the equalization sequence to the receiving end device on the link; after the receiving end device receives the equalizing sequence, it first checks whether all working link clocks are out of lock; if any link clocks are out of lock , return to the clock recovery and lock state S4; otherwise, perform equalization calculation.
  • the receiving end device performs the equalization calculation according to the received equalization sequence. If the equalization calculation fails, it returns to the training decision state S2; if the equalization calculation succeeds, the receiving end device needs to check the link.
  • the link inspection includes the bit error rate check and Channel alignment check, etc.; if the link check fails, it also returns to the training decision state S2; if the link check succeeds, it enters the link hold state S6.
  • the receiving end device continuously checks the link status, and when the link is abnormal, it actively informs the sending end device through the auxiliary link.
  • the receiving end device detects that the link is abnormal, it can actively report it to the sending end device.
  • the sending end device can also query the current link status from the receiving end device as needed.
  • the link is abnormal, it returns to the training decision state S2; when the link is disconnected, it returns to the idle state S0.
  • FIG. 7 is a schematic flowchart of link training of a transmitting end device provided by an embodiment of the present application.
  • the cable in FIG. 7 includes at least one link and an auxiliary link from the transmitting end of the transmitting end device to the receiving end of the receiving end device, and the auxiliary link includes at least one first auxiliary link from the transmitting end device to the receiving end device.
  • at least one second auxiliary link from the receiving end device to the transmitting end device, the receiving end device can be the receiving end device in Figure 8, and the flow of this link training includes but is not limited to the following steps:
  • the training rate needs to be determined before acquiring or estimating the training parameter value.
  • For the process of determining the training rate refer to the aforementioned training decision state S2; for the process of acquiring the training parameter value, refer to the aforementioned parameter acquisition or estimation state S3.
  • the sending end device determines the training rate according to the capabilities of the cable, the sending end device, and the receiving end device. For example, the sending end device determines the training rate according to the device information of the sending end device, the cable information of the cable, the receiving end device The device information of the device determines the training rate, and then determines the training parameter value according to the training rate.
  • the sender device has a non-volatile memory (Non-Volatile memory, NVM), and the non-volatile memory can be used to store the parameter values related to the link training when the link training is successful; after any link training is successful, the All parameter values related to this link training are stored in the non-volatile memory, and when training again, the parameter values that were successfully trained on the previous link can be used.
  • NVM Non-Volatile memory
  • the transmitting end device matches a set of training parameter values from the non-volatile memory according to the cable information of the cable, the device information of the receiving end device (the port information of the receiving end), and the training rate determined by the training decision. . If there is no cable information stored in the cable, after the training is successful, the transmitting end device is not powered off and has not been disconnected (such as unplugging or plugging), and the parameter values of the previous successful training can be used for the retraining.
  • the transmitting end device cannot obtain the training parameter value through matching, for example, if the transmitting end has no non-volatile memory but has cable information of the cable, the parameters related to link training can be performed through the cable information of the cable. an estimate of the value. If the sending end device cannot obtain the training parameter value through matching, and there is no cable information for estimating the training parameter value, the sending end device resets the sending end training-related parameters to the initial values.
  • the training parameter value obtained or estimated by the sender device refers to the training value of the parameter to be configured on the sender, that is, the training parameter value obtained or estimated by the sender device is configured on the sender.
  • step 701 is an optional operation, for example, the transmitting end device may perform link training at the default rate and the initial value of the parameter, so that step 701 may not be performed.
  • the parameters of the sending end are configured as training parameter values, that is, the parameters of the sending end of each link in the at least one link are configured as the training parameter values. parameter value.
  • the clock recovery sequence is sent from the transmitter of the transmitter device to the receiver of the receiver device, and the clock recovery sequence is transmitted through at least one link from the transmitter device to the receiver device, and each chain in the at least one link is transmitted. All channels need to transmit this clock recovery sequence.
  • the clock recovery sequence can be understood as 0101 alternating data, and the clock recovery sequence is used for the receiving end device to perform clock recovery and locking on each link in the at least one link. After that, the transmitting end device waits for the receiving end device to feedback the clock locking result.
  • the rate at which the transmitting end device sends the clock recovery sequence to the receiving end device is the training rate of this training.
  • the transmitting end device receives the clock locking result from the receiving end device through the auxiliary link, and the received clock locking result includes the clock locking result of each link in the at least one link; when the clock locking result in the at least one link is When the clock of each link is successfully locked, it means that the clock of this training is successfully locked; when there is a link that fails to be clocked in the at least one link, it means that the clock of this training fails to be locked. For any link whose clock lock fails, steps 704 and 705 are executed.
  • step 701 Obtaining or estimating the training parameter value will only result in one of these multiple voltage swing presets. If the value of the voltage swing configured on the transmitter is too low or too high, the clock on the receiver cannot be locked. Therefore, when the clock lock fails, the transmitter device can adjust the value of the voltage swing configured by the transmitter. After notifying the receiver device through the auxiliary link, the receiver device continues to lock and recover the clock until the clock lock is successful or the voltage The swing configuration has traversed all voltage swing presets.
  • step 705 if the configuration of the voltage swing of the link that fails to clock lock does not traverse all the preset voltage swing values, step 705 is performed; if the configuration of the voltage swing of the link that fails to clock lock has traversed all the voltage swings If the preset value is set, step 712 is executed, that is, when the voltage swing configuration of a certain link has traversed all the voltage swing preset values, but the receiver still cannot complete the clock recovery and locking, enter the training decision , decides whether to slow down or retrain.
  • the voltage swing configured at the transmitting end can be adjusted among multiple preset voltage swing values, that is, the transmitting end can support zero to multiple voltage swing adjustable. If the configuration of the voltage swing of the link that fails to lock the clock does not traverse all the preset voltage swings, adjust the voltage swing of the link that fails to lock the clock to the next level, and notify the receiving end device through the auxiliary link.
  • the transmitter device adjusts the voltage swing, it can be adjusted in a certain order, for example, up or down in sequence; it can also be adjusted out of sequence, for example, it can be adjusted dynamically according to the state of the receiver. After the transmitter device adjusts the voltage swing, it will again determine whether all the link clocks are recovered and locked successfully. If all the link clocks are recovered and locked successfully, then the balance calculation is entered, and step 706 is executed.
  • the transmitting end device when it receives the clock locking result sent by the receiving end device through the auxiliary link, and determines that the clocks of all links are successfully locked, it starts to send the equalization sequence to the receiving end.
  • the equalization sequence is sent from the transmitting end of the transmitting end device to the receiving end of the receiving end device, and the equalizing sequence is transmitted through at least one link from the transmitting end device to the receiving end device, and each link in the at least one link needs to transmit the equalization sequence.
  • the equalization sequence refers to data in a certain format, and the receiving end performs equalization calculation according to the data. After sending the equalization sequence to the receiving device, the transmitting end device waits to receive the equalization calculation result or link check result fed back from the receiving end device.
  • the rate at which the transmitting end device sends the equalization sequence to the receiving end device is the training rate of this training.
  • step 713 is executed
  • the reasons for link training failure include: balance calculation failure and link check failure; when link training fails, it is also necessary to determine whether link training failure is caused by balance calculation failure or link check failure. Therefore, it is judged whether the receiving end device reports that the link check fails. If the receiving end device reports that the link check fails, it means that the link training failure is caused by the link check failure, and step 712 is performed; otherwise, step 709 is performed.
  • the sending end device receives the link check result from the receiving end device through the auxiliary link, and the received link check result includes the link check result of each link in the at least one link; when the at least one link When the link check of each link in the path is successful, it indicates that the link check of this training is successful; when there is a link that fails the balance calculation in the at least one link, it means that the balance calculation of this training fails. Therefore, when there is a link that fails the link check in the at least one link, it may be considered that the receiving end device feeds back the link check failure. When the link check fails, step 712 is performed.
  • the link check can only be performed after the equalization calculation is successful. If the equalization calculation at the receiving end fails, the sender must be informed that the equalization calculation fails; and if the equalization calculation at the receiving end is successful, it is optional to inform the sender that the equalization calculation is successful.
  • the transmitting end device receives the equalization calculation result from the receiving end device through the auxiliary link, and the received equalization calculation result includes the equalization calculation result of each link in the at least one link; When the link balance calculation is successful, it means that the balance calculation of this training is successful; when there is a link that fails the balance calculation in the at least one link, it means that the balance calculation of this training fails.
  • step 709 is performed to determine the reason for the failure of the equalization calculation.
  • step 702 determines whether the clock is out of lock. If the clock is out of lock, keep the current training rate unchanged, re-initiate the training, and return to step 702; if no clock out of lock occurs, go to step 710 .
  • its adjustable transmit-end feed-forward equalization parameters have multiple values, that is, there are multiple transmit-end feed-forward equalization preset values, and each link has multiple transmit-end feed-forward equalization parameters.
  • the preset values are the same, and obtaining or estimating the training parameter value in step 701 will only obtain one of the multiple preset feedforward equalization values of the transmitter.
  • the value of the transmit-end feedforward equalization parameter configured by the transmit-end is related to whether the receive-end equalization calculation is successful. Therefore, when the equalization calculation fails, the transmitting end device can adjust the value of the transmitting end feedforward equalization parameter configured by the transmitting end.
  • step 711 is executed; If the configuration has traversed all the preset feed-forward equalization values of the transmitter, step 713 is executed, that is, when the configuration of the feed-forward equalization parameters of the transmitter of a certain link has traversed all the preset values of feed-forward equalization of the transmitter, but When the receiving end still cannot successfully balance the calculation, it enters into the training decision to decide whether to slow down the training or retrain.
  • the transmitter feedforward equalization parameter configured by the transmitter can be adjusted among multiple transmitter feedforward equalization preset values, that is, the transmitter can support zero to multiple levels of transmitter feedforward equalization parameter adjustment. If the configuration of the transmit-end feedforward equalization parameters of the link that fails the equalization calculation does not traverse all the preset values of the transmit-end feedforward equalization, adjust the transmit-end feedforward equalization parameters of the link that fails the equalization calculation to the next level, and pass the The auxiliary link informs the receiving end device.
  • the transmitter device adjusts the feedforward equalization parameters of the transmitter, it can be adjusted in a certain order, for example, up or down in sequence; it can also be adjusted out of sequence, for example, it can be adjusted dynamically according to the state of the receiver. After the sending end device adjusts the sending end feedforward equalization parameters, it will again determine whether the receiving end device has failed to feed back the equalization calculation.
  • the training decision is entered to decide whether to reduce the training rate for retraining or perform retraining at the current rate.
  • the link training is successful, and data is sent to the receiving end device.
  • the link in the cable includes a bidirectional link
  • service data can be transmitted through the successfully trained link as needed, without waiting for the link in the other direction to be successfully trained. Only start to transmit business data. It should be understood that the training rate is also the transmission rate during data transmission.
  • the value of the voltage swing finally used by the transmitter and the value of the feedforward equalization parameter of the transmitter are stored in the non-volatile device, so as to facilitate subsequent use and speed up the training rate.
  • the parameters to be saved include: the training rate, the cable information of the cable (including the identification code of the cable), the value of the voltage swing configuration of each link when the training is successful, and the value of the feedforward equalization parameter configuration of the transmitting end. value, the device information of the receiving end device (including the port information of the receiving end), the forward and reverse insertion status of the cable, etc.
  • the storage of parameters to be saved supports one or more groups. It should be noted that step 714 is an optional operation.
  • the transmitting end device may not store the training rate, the device information of the receiving end device, the cable information of the cable, and the parameter configuration values of the transmitting end after the link training is successful. .
  • FIG. 8 is a schematic flowchart of link training of a receiving end device provided by an embodiment of the present application.
  • the cable in FIG. 8 includes at least one link and an auxiliary link from the transmitting end of the transmitting end device to the receiving end of the receiving end device, and the auxiliary link includes at least one first auxiliary link from the transmitting end device to the receiving end device.
  • at least one second auxiliary link from the receiving end device to the transmitting end device, the transmitting end device can be the transmitting end device in Figure 7, and the flow of this link training includes but is not limited to the following steps:
  • the training rate is determined by the sender device and sent to the receiver device. During the first training, the training rate from the sender device is received, and then the training parameter value is determined according to the training rate.
  • the process of acquiring the training parameter value may refer to the aforementioned parameter acquisition or estimation state S3.
  • the receiving end device has a non-volatile memory, which can be used to store the parameter values related to the link training when the link training is successful; The relevant parameter values are stored in the non-volatile memory, and when training again, the parameter values that were successfully trained on the previous link can be used.
  • the receiving end device matches a set of training parameter values from the non-volatile memory according to the cable information of the cable, the device information of the transmitting end device (the port information of the receiving end), and the received training rate. If there is no cable information stored in the cable, after the training is successful, the receiving end device is not powered off and has not been disconnected (such as unplugging or plugging), and the parameter values of the previous successful training can be used for retraining.
  • the receiving end device cannot obtain the training parameter value through matching, for example, if the transmitting end has no non-volatile memory but has the cable information of the cable, the parameters related to the link training can be carried out through the cable information of the cable. an estimate of the value. If the receiving end device cannot obtain the training parameter value through matching, and there is no cable information for estimating the training parameter value, the receiving end device resets the training-related parameters of the transmitting end to the initial value.
  • the training parameter value obtained or estimated by the receiving end device refers to the training value of the parameter to be configured on the receiving end, that is, the training parameter value obtained or estimated by the receiving end device is configured on the receiving end.
  • the acquisition or estimation of parameters is an optional operation, for example, the receiving end device performs link training when the parameters of the transmitting end are configured as initial values.
  • the parameters of the receiving end are also configured as training parameter values. Since at least one link is included between the sending end device and the receiving end device, configure the parameters of the receiving end as the training parameter value, that is, configure the receiving end parameter of each link in the at least one link to the training parameter value .
  • the clock recovery sequence from the transmitting end device is also received.
  • the clock recovery sequence is sent by the transmitter of the transmitter device to the receiver of the receiver device, and the clock recovery sequence is transmitted through at least one link from the transmitter device to the receiver device, and each link in the at least one link is The clock recovery sequence needs to be transmitted, and the receiver device receives the clock recovery sequence on each of the at least one link.
  • the clock recovery sequence can be understood as 0101 alternating data, and the clock recovery sequence is used for the receiving end device to perform clock recovery and locking on each link in the at least one link.
  • the clock recovery and locking operations need to be completed within a preset period of time. For any link in the at least one link, it is judged that the clock locking fails, it may be that the time elapsed for the clock recovery and locking operations has not yet When the preset duration is reached, that is, the clock recovery and locking operations of the link have not been completed. Therefore, when it is judged that not all the links have been successfully clocked and locked, it can be further judged whether all the links have been clocked and locked, that is, whether all the links have been recovered and locked. All link clock recovery and locking operations have been completed, indicating that the link clock locking has indeed failed. For the link whose clock locking fails, go to step 806; if not all link clock recovery and locking operations have been completed, then After waiting for all link clock recovery and locking operations to be completed, step 804 is executed to determine whether all link clock recovery and locking operations are successful.
  • the receiving end device will feed back the clock locking result to the transmitting end device through the auxiliary link, and the clock locking result is the clock locking failure, and the clock locking result includes the clock locking result of each link in the at least one link.
  • the clock locking result so the transmitting end device knows which link in the at least one link has failed to lock the clock.
  • the transmitting end device may adjust the voltage swing configuration of the link that fails to lock the clock, and after adjusting the configuration of the voltage swing of the link that fails to lock the clock, pass the auxiliary chain
  • the channel informs the receiving device that it has adjusted the configuration of the voltage swing of the link that failed to clock lock.
  • the receiving end device After detecting that the clocks of all links are successfully locked, the receiving end device sends the clock locking result to the transmitting end device through the auxiliary link, and the clock locking result is that the clock locking is successful. After that, enter into the equalization calculation and wait for the equalization sequence sent by the sender device to be received.
  • the receiving end device since the receiving end device needs to perform the equalization calculation according to the equalization sequence, it first needs to judge whether it has received the equalization sequence from the transmitting end device, and then perform the subsequent equalization calculation specific operation if the equalizing sequence from the transmitting end device is received. After the equalization calculation is performed, but the equalization calculation fails, the transmitting end device will adjust the configuration of the transmitting end feedforward equalization parameters of the transmitting end, and then inform the receiving end device to perform equalization again through the information that the configuration update of the transmitting end feedforward equalization parameters is completed.
  • step 810 is performed, Determine whether there is a link with a clock out of lock.
  • step 811 check whether the current clocks of all the links in the at least one link are stable. If there is a link with a clock out of lock, for the link in which the clock is out of lock, go to step 811; otherwise, start the balance calculation, and go to step 812, waiting for the equilibrium calculation result.
  • the equalization calculation compensates for the non-ideality of the channel and eliminates inter-symbol interference through some circuit designs; the process of equalization calculation is to continuously adjust some parameters in these circuit designs to determine whether the signal reaches an ideal state; after the receiving end receives the equalization sequence Only then perform equalization calculation, continuously adjust its own configuration, and identify and judge the equalization sequence.
  • the continuous time linear equalization parameter of the receiving end of the link is properly adjusted, and the result of the link's clock out of lock is notified to the transmitting end device through the auxiliary link; waiting for transmission
  • the terminal re-initiates training, that is, re-clocks and locks.
  • the continuous-time linear equalization parameter configured at the receiver should be adjusted, and the original value cannot be used.
  • the balance calculation of each link in the at least one link is successful; when there is a link that fails the balance calculation in the at least one link, the balance calculation of this training fail.
  • the equalization calculation is the rough adjustment of the equalization at the receiving end, which needs to satisfy the successful delimitation of all link characters, the successful synchronization of each link cycle, and the bit error rate of each link is less than the bit error rate 1; among which, the bit error rate 1 is a specific value. . Therefore, for any link of the at least one link, it is checked whether it satisfies the success of character delimitation, successful period synchronization, and the bit error rate is less than the bit error rate of 1. If all are satisfied, then the any link is balanced.
  • Step 813 is executed for the link that does not satisfy the success of character delimitation, the success of period synchronization and the bit error rate less than 1.
  • step 815 is executed.
  • the equalization calculation operation needs to be completed within a preset period of time. For any link in the at least one link, if it does not satisfy the success of character delimitation, successful period synchronization, and the bit error rate is less than the bit error rate of 1, there are It may be that the elapsed time of the equalization calculation operation has not reached the preset duration, that is, the equalization calculation operation of the link has not been completed.
  • step 812 is executed to determine whether the link balance calculation is successful.
  • the transmitting end device receives the equalization calculation result from the receiving end device through the auxiliary link, and the received equalization calculation result includes the equalization calculation result of each link in the at least one link. For the link whose equalization calculation fails, the transmitting end The device adjusts the configuration of the feedforward equalization parameters at the sending end of the link. After the configuration is completed, the sending end device sends the information that the configuration update of the feedforward equalization parameters at the receiving end is completed to the receiving end device through the auxiliary link. After receiving the information about the completion of updating the configuration of the feedforward equalization parameters of the transmitting end of the link, the device at the receiving end restarts the timer and continues the equalization calculation. Therefore, after step 814 is performed again, step 809 is performed.
  • a link check is performed on each link in the at least one link.
  • the link check of each link in the at least one link is successful; when there is a link that fails the balance calculation in the at least one link, the balance calculation of this training is successful. fail.
  • the link check is balanced and fine-tuned, and the channel alignment between all links must be satisfied, and the bit error rate of each link is less than the bit error rate 2; among them, the bit error rate 2 is similar to the bit error rate 1, and the bit error rate 2 ⁇ bit error rate rate 1. Therefore, for any link in the at least one link, it is checked whether it satisfies the channel alignment and the bit error rate is less than the bit error rate 2.
  • step 816 is performed.
  • Step 818 is executed when the link check of each link in the at least one link is successful.
  • the link check operation needs to be completed within a preset period of time. For any link in the at least one link, if the channel alignment is not satisfied and the bit error rate is less than the bit error rate of 2, there may be a link check. The elapsed time of the operation has not reached the preset time period, that is, the link check operation of the link has not been completed. Therefore, when it is determined that any link does not satisfy the channel alignment and the bit error rate is less than the bit error rate 2, it can be further determined whether the link check of any link has timed out, that is, it can be determined whether the link check operation of any link has been completed.
  • step 815 is executed to determine whether any link link check is successful.
  • the receiving end device sends the link check result to the sending end device through the auxiliary link, and the link check result includes A link check result of each link in the at least one link, where the link check result is a link check failure.
  • the link training is successful, and the link checking is successfully fed back to the sender, and the sender device is notified to start sending data.
  • each link in the at least one link passes the link check, it means that the link training is successful, and the link check result is sent to the sending end device through the auxiliary link, and the link check result includes the at least one link.
  • the link check result of each link in the link, the link check result is that the link check is successful.
  • the links in the cable include bidirectional links
  • service data can be transmitted through the successfully trained link as needed, without waiting for the link in the other direction.
  • the business data will be transmitted. Therefore, after the link training is successful, the receiving end device can notify the sending end device that it can start transmitting data.
  • the value of the continuous-time linear equalization parameter and the value of the decision feedback equalization parameter finally used by the receiving end are stored in the non-volatile device, so as to facilitate subsequent use and speed up the training rate.
  • the parameters that need to be saved include: the training rate, the cable information of the cable (including the cable identification code), the value of the continuous-time linear equalization parameter configuration of each link when the training is successful, and the value of the decision feedback equalization parameter configuration. value, the device information of the sending end device (including the port information of the sending end), the forward and reverse insertion status of the cable, etc.
  • the storage of parameters to be saved supports one or more groups. It should be noted that step 819 is an optional operation.
  • the receiving end device may not store the training rate, the device information of the transmitting end device, the cable information of the cable, and the parameter configuration values of the receiving end after the link training is successful. .
  • FIG. 9 is a schematic structural diagram of a communication system provided by an embodiment of the present application.
  • the communication system includes a first device 91, a second device 92, and a cable 93 connecting the first device 91 and the second device 92; wherein the first device 91 includes at least one first interface 911, a second A processor 912 and a first memory 913, the second device 92 includes at least one second interface 921, a second processor 922 and a second memory 923, the cable 93 includes a main link (Main-Link) 931, an auxiliary link 932 and a third memory 933.
  • Main-Link main link
  • the first memory 913 stores the device information of the first device 91, and the training parameters that can be used to store the link training;
  • the second memory 923 stores the device information of the second device 92, and can be used to store the chain
  • the third memory 933 stores the cable information of the cable 93;
  • the first memory 913, the second memory 923, and the third memory 933 may be non-volatile devices, and the non-volatile devices Including erasable programmable read only memory (Electrically Erasable Programmable read only memory, EEPROM), flash memory (FLASH), embedded multimedia memory (Embedded Multi Media Card, eMMC) and so on.
  • EEPROM Electrical Erasable Programmable read only memory
  • FLASH FLASH
  • embedded multimedia memory Embedded Multi Media Card
  • the first interface 911 and the second interface 921 are divided into an uplink port and a downlink port; when the first interface 911 is an uplink port, the second interface 921 is a downlink port ; When the first interface 911 is a downstream port, the second interface 921 is an upstream port.
  • the technical solutions provided by this application are described below by taking the first device 91 as the master device, the first interface 911 as the downlink port, the second device 92 as the slave device, and the second interface 921 as the uplink port. This is not specifically limited.
  • the first interface 911 of the first device 91 includes a plurality of pins, for example, the plurality of pins may include a plurality of sending pins and a plurality of receiving pins, in an optional case, the first The transmitting end 9111 may include a part of a plurality of transmitting pins, and the first receiving end 9112 may include a part of a plurality of receiving pins.
  • FIG. 10 is a schematic diagram of the internal connection of the first interface 911 and the second interface 921 .
  • the pins on the first interface 911 are divided into a first sending end 9111 , a first receiving end 9112 , a third sending end 9113 and a fourth receiving end 9114 according to their functions.
  • Multiple pins are divided into a second receiving end 9211, a second sending end 9212, a third receiving end 9213 and a fourth sending end 9214 according to their functions; the first sending end 9111 and the second receiving end 9211 are connected through the main link 931, There are m first links between the first sending end 9111 and the second receiving end 9211, where m is an integer greater than 0; the second sending end 9212 and the first receiving end 9112 are connected through the main link 931, and the second sending end There are n second links between 9212 and the first receiving end 9112, where n is an integer greater than 0; the third sending end 9113 and the third receiving end 9213 are connected through the auxiliary link 932, and the third sending end 9113 There is at least one first auxiliary link between the receiving end 9213
  • the cable 93 there are m+n+2 links in the cable 93, which are m first links, n second links, 1 first auxiliary link, and 1 second auxiliary link, respectively.
  • the first auxiliary link and the second auxiliary link are fixed, and the first auxiliary link is used for the first device 91 to send data to the second device 92 or the second device 92 to receive data from the first device 91,
  • the second auxiliary link is used for the first device 91 to receive data from the second device 92 or the second device 92 to send data to the first device 91, so the third sending end 9113, the third receiving end 9213, the fourth sending end 9214 and The functions of the pins included in the fourth receiving end 9114 are unchanged.
  • the functions of the pins included in the third sending end 9113 and the fourth sending end 9214 are only sending functions.
  • the third receiving end 9213 and the fourth receiving end 9114 include The function of the pin is the receive function only.
  • the number of m first links and n second links can be adjusted as needed, such as increasing the number of first links, reducing the number of second links, or reducing the number of first links, The number of second links is increased, so the functions of the first transmitter 9111, the first receiver 9112, the second receiver 9211 and the second transmitter 9212 are variable, that is, the first transmitter 9111, the first receiver
  • the functions of the pins included in the terminal 9112 , the second receiving terminal 9211 and the second transmitting terminal 9212 may be a sending function or a receiving function, which is specifically determined by the first device 91 or determined by the first device 91 according to the requirements of the second device 92 .
  • the first device 91 is the transmitting end device, and the second device 92 is the receiving end device; for the second link, the first device 91 is the receiving end device, and the second device 92 is the transmitting end device.
  • link training solution provided by the present application is described below with reference to FIG. 9 and FIG. 10 .
  • the first device 91 checks whether the first device 91 and the second device 92 have both been plugged into the cable 93, and checks whether the first device 91 and the second device 92 are both ready for link training; the second device 92 also checks the first Whether both the device 91 and the second device 92 have been plugged into the cable 93, and check whether the first device 91 and the second device 92 are both ready for link training.
  • Capability interaction is performed between the first device 91 and the second device 92; the first device 91 obtains the device information of the second device 92 (including the second receiving end 9211, the second sending end 9212) from the second memory 923 through the auxiliary link 932 port information), and obtain the cable information of the cable 93 from the third memory 933; the second device 92 obtains the device information of the first device 91 (including the first sending end 9111) from the first memory 913 through the auxiliary link 932 , the port information of the first receiving end 9112 ), and the cable information of the cable 93 is obtained from the third memory 933 .
  • the first device 91 decides the number of links in the uplink direction and the downlink direction, that is, the first device 91 decides the number of the first link and the second link, and specifically, determines the values of m and n.
  • the data transmission in the downlink direction is generally greater than the data outbound transmission in the uplink direction, so the value of m can be greater than the value of n; when the second device 92 has special requirements, it can request through the auxiliary link 932.
  • the first device 91 adjusts the number of links used for training in the uplink and downlink directions.
  • the first device 91 decides the training rate in the downlink direction, that is, the first device 91 decides the training rate on the first link, which is recorded as the first rate;
  • the capability of the second device 92 and the capability of the cable 93 determine the training rate on the first link.
  • the second device 92 decides the training rate in the uplink direction, that is, the second device 92 decides the training rate on the second link, which is recorded as the second rate;
  • the capability of the second device 92 and the capability of the cable 93 determine the training rate on the second link.
  • the first device 91 determines the first rate of the current training of the first link according to the device information of the first device 91, the device information of the second device 92, and the cable information of the cable 93, and then according to the current training
  • the first rate of training determines a set of first training parameter values; when the first device 91 only obtains the cable information of the cable 93, a set of first training parameter values can be estimated according to the cable information of the cable 93;
  • the parameter value of the first sending end 9111 is configured as the first training parameter value; wherein, the parameters of the sending ends of the m first links are all configured as the first training parameter value.
  • the first device 91 will send the decided first rate of this training to the second device 92, and the second device 92 determines a set of second training parameter values according to the first rate of this training; or the second device 92 may A set of second training parameter values is estimated according to the cable information of the cable 93; then the parameter value of the second receiving end 9211 is configured as the second training parameter value; wherein, the parameters of the receiving ends of the m first links are all Configured to be the second training parameter value. After that, link training of the first link can be performed.
  • the first device 91 When it is not the first training, the first device 91 according to the first rate of this training, the device information of the second device 92 (including the port information of the second receiving end 9211 ), the cable information of the cable 93 (including the cable 93 at least one of the positive and negative insertion states of the cable 93 matches a set of first training parameter values from the first memory 913; when a set of first training parameter values cannot be matched, the 93 cable information to estimate a set of first training parameter values; then configure the parameter value of the first sending end 9111 as the first training parameter value; wherein, the parameters of the sending ends of m first links are all configured as this first training parameter value The first training parameter value.
  • the second device 92 uses the first rate of this training, the device information of the first device 91 (including the port information of the first sending end 9111 ), and the cable information of the cable 93 (including the identification code of the cable 93 ). ), at least one of the positive and negative insertion states of the cable 93 matches a set of second training parameter values from the second memory 923; when a set of second training parameter values cannot be matched, the A set of second training parameter values is estimated from the cable information; then the parameter values of the second receiving end 9211 are configured as the second training parameter values; wherein, the parameters of the receiving ends of the m first links are all configured as the second training parameter values parameter value. After that, link training of the first link can be performed.
  • the second device 92 determines the second rate of the current training of the second link according to the device information of the first device 91, the device information of the second device 92, and the cable information of the cable 93, and then according to the current training
  • the second rate of training determines a set of third training parameter values; when the second device 92 only obtains the cable information of the cable 93, a set of third training parameter values can be estimated according to the cable information of the cable 93;
  • the parameter value of the second sending end 9212 is configured as the third training parameter value; wherein, the parameters of the sending ends of the n second links are all configured as the third training parameter value.
  • the second device 92 will send the decided second rate of this training to the first device 91, and the first device 91 determines a set of fourth training parameter values according to the second rate of this training; or the first device 91 may A set of fourth training parameter values is estimated according to the cable information of the cable 93; then the parameter value of the first receiving end 9112 is configured as the fourth training parameter value; wherein, the parameters of the receiving ends of the n second links are all Configured to be the fourth training parameter value. After that, link training of the second link can be performed.
  • the second device 92 retrieves the data from the second memory 923 according to the second rate of the current training, the device information of the first device 91 (including the port information of the first receiving end 9112 ), and the cable information of the cable 93 . At least one of the positive and negative insertion states of the middle and cable 93 matches a set of third training parameter values; when a set of third training parameter values cannot be matched, a set of third training parameter values can be estimated according to the cable information of the cable 93 the third training parameter value; then configure the parameter value of the second sending end 9212 as the third training parameter value; wherein, the parameters of the sending ends of the n second links are all configured as the third training parameter value.
  • the first device 91 uses the second rate of this training, the device information of the second device 92 (including the port information of the second sending end 9212 ), and the cable information of the cable 93 (including the identification code of the cable 93 ) ), at least one of the positive and negative insertion states of the cable 93 matches a set of fourth training parameter values from the first memory 913; A set of fourth training parameter values is estimated from the cable information; then the parameter values of the first receiving end 9112 are configured as the fourth training parameter values; wherein, the parameters of the receiving ends of the n second links are all configured as the fourth training parameter values parameter value. After that, link training of the second link can be performed.
  • the first device 91 sends the first clock recovery sequence to the second receiving end 9211 through the first sending end 9111 at the first rate; after the second device 92 receives the first clock recovery sequence through the second receiving end 9211, according to the first clock recovery sequence
  • the clock recovery sequence performs clock recovery and lock.
  • the first clock recovery sequence needs to be transmitted in the m first links, and each first link in the m first links needs to perform clock recovery and locking.
  • the second device 92 sends the first clock locking result to the first device 91 after each clock recovery and locking is completed, that is, the second device 92 sends the first clock locking result to the fourth receiving end 9114 through the fourth sending end 9214 , the first device 91 receives the first clock locking result through the fourth receiving end 9114 .
  • the first clock locking result includes the clock locking result of each of the m first links.
  • the first sending end 9111 communicates with the first link.
  • the link clock locking between the second receiving end 9211 fails, otherwise the link clock locking between the first sending end 9111 and the second receiving end 9211 succeeds.
  • the first device 91 adjusts the configuration of its voltage swing, and then the first device 91 sends the voltage to the third receiving end 9213 through the third transmitting end 9113
  • the second device 92 continues to perform clock recovery and locking until all the first link clocks are successfully locked after receiving the information of the completion of the configuration update of the voltage swing through the third receiving terminal 9213. , and enter into balance calculation and link check. If all the preset voltage swing values available for adjustment have been traversed, and all the first link clocks cannot be successfully locked, it means that the first link link training fails, and a training decision needs to be made again.
  • the second device 92 sends the second clock recovery sequence to the first receiving end 9112 through the second sending end 9212 at the second rate; after the first device 91 receives the second clock recovery sequence through the first receiving end 9112, according to the second clock recovery sequence
  • the clock recovery sequence performs clock recovery and lock.
  • the second clock recovery sequence needs to be transmitted in the n second links, and each second link in the n second links needs to perform clock recovery and locking.
  • the first device 91 sends the second clock locking result to the second device 92 after each clock recovery and locking is completed, that is, the first device 91 sends the second clock locking result to the third receiving end 9213 through the third sending end 9113 , the second device 92 receives the second clock locking result through the third receiving end 9213 .
  • the second clock locking result includes the clock locking result of each of the n second links.
  • the second device 92 adjusts the configuration of its voltage swing, and then the second device 92 sends the voltage to the fourth receiving end 9114 through the fourth transmitting end 9214
  • the first device 91 continues to perform clock recovery and locking until all the second link clocks are successfully locked after receiving the information that the configuration update of the voltage swing is completed through the fourth receiving terminal 9114. , and enter into balance calculation and link check. If all the preset voltage swing values that can be adjusted have been traversed, and all the second link clocks cannot be successfully locked, it means that the second link link training has failed, and a training decision needs to be made again.
  • the first device 91 sends the first equalization sequence to the second receiving end 9211 through the first transmitting end 9111 at the first rate; after the second device 92 receives the first equalizing sequence through the second receiving end 9211, it first checks whether there is a clock or not.
  • the first link that loses lock if there is a first link whose clock loses lock, adjust the configuration of the continuous time linear equalization parameter of the first link whose clock loses lock, and send the clock to the first device 91 through the auxiliary link 932
  • the information that the clock of the first link that is out of lock is out of lock, that is, the second device 92 sends the information that the clock of the first link is out of lock to the fourth receiving end 9114 through the fourth transmitting end 9214, and the first device 91
  • the fourth receiving end 9114 receives the clock loss information of the first link whose clock loses lock, and then enters into retraining; if there is no first link whose clock loses lock, equalization calculation is performed according to the first equalization sequence.
  • the first equalization sequence needs to be transmitted in the m first links, and equalization calculation needs to be performed on each of the m first links.
  • the second device 92 sends the first equalization calculation result to the first device 91, that is, the second device 92 sends the first equalization calculation result to the fourth receiving end 9114 through the fourth transmitting end 9214, and the first equalizing calculation result is sent to the fourth receiving end 9114.
  • a device 91 receives the first equalization calculation result through the fourth receiving end 9114 .
  • the first balance calculation result includes the balance calculation result of each of the m first links. When there is a first link that fails the balance calculation among the m first links, the first sender 9111 communicates with the first link.
  • the link balance calculation between the second receiving end 9211 fails; otherwise, the link balance calculation between the first sending end 9111 and the second receiving end 9211 succeeds.
  • the first device 91 will adjust the configuration of the feedforward equalization parameters at its transmitter, and then the first device 91 sends a message to the third receiver through the third transmitter 9113 9213 sends the information that the configuration update of the feed-forward equalization parameters of the transmitting end is completed.
  • the second device 92 continues to perform the equalization calculation until all the The first link balance calculation is successful, and the link check is entered. If all the preset feedforward equalization preset values of the transmitting end that can be adjusted have been traversed, and the equalization calculation of all the first links cannot be made successfully, it means that the link training of the first link fails.
  • the second device 92 After the m first links have been successfully balanced and calculated, the second device 92 starts to check the links. After each link check is completed, the second device 92 sends the first link check result to the first device 91. That is, the second device 92 sends the first link check result to the fourth receiving end 9114 through the fourth sending end 9214 , and the first device 91 receives the first link checking result through the fourth receiving end 9114 .
  • the first link check result includes the link check result of each of the m first links.
  • the The link link check between the terminal 9111 and the second receiving terminal 9211 fails, that is, the link link training between the first transmitting terminal 9111 and the second receiving terminal 9211 fails; otherwise, the first transmitting terminal 9111 and the second receiving terminal 9211 The link training between the receivers 9211 is successful.
  • the second device 92 sends the second equalization sequence to the first receiving end 9112 through the second transmitting end 9212 at the second rate; after the first device 91 receives the second equalizing sequence through the first receiving end 9112, it first checks whether there is a clock or not.
  • the second link that loses lock if there is a second link whose clock loses lock, adjust the configuration of the continuous time linear equalization parameter of the second link whose clock loses lock, and send the clock to the second device 92 through the auxiliary link 932
  • the information that the clock of the second link that is out of lock is out of lock, that is, the first device 91 sends the information that the clock of the second link is out of lock to the third receiving end 9213 through the third transmitting end 9113, and the second device 92
  • the third receiving end 9213 receives the clock loss information of the second link whose clock loses lock, and then enters into retraining; if there is no second link whose clock loses lock, equalization calculation is performed according to the second equalization sequence.
  • the second equalization sequence needs to be transmitted in the n second links, and equalization calculation needs to be performed on each of the n second links.
  • the first device 91 will send the second equalization calculation result to the second device 92, that is, the first device 91 sends the second equalization calculation result to the third receiving end 9213 through the third transmitting end 9113,
  • the second device 92 receives the second equalization calculation result through the third receiving end 9213 .
  • the second balance calculation result includes the balance calculation result of each of the n second links.
  • the second sender 9212 communicates with the second link.
  • the link balance calculation between the first receiving end 9112 fails; otherwise, the link balance calculation between the second sending end 9212 and the first receiving end 9112 succeeds.
  • the second device 92 adjusts the configuration of the feedforward equalization parameter at its transmitter, and then the second device 92 sends the information to the fourth receiver through the fourth transmitter 9214.
  • 9114 sends the information that the configuration update of the feedforward equalization parameter of the transmitting end is completed.
  • the first device 91 continues to perform the equalization calculation until all the The second link balance calculation is successful, and the link check is entered. If all the preset feedforward equalization preset values of the transmitting end that can be adjusted have been traversed, and the equalization calculation of all the second links cannot be made successfully, it means that the link training of the second link has failed.
  • the first device 91 After the n second links have been successfully balanced and calculated, the first device 91 starts to check the link. After each link check is completed, the first device 91 sends the second link check result to the second device 92. That is, the first device 91 sends the second link check result to the third receiving end 9213 through the third sending end 9113 , and the second device 92 receives the second link checking result through the third receiving end 9213 .
  • the second link check result includes the link check result of each of the n second links.
  • the second link is sent
  • the link link check between the terminal 9212 and the first receiving terminal 9112 fails, that is, the link link training between the second transmitting terminal 9212 and the first receiving terminal 9112 fails; otherwise, the second transmitting terminal 9212 and the first receiving terminal 9112
  • the link training between the receivers 9112 is successful.
  • the first sending end 9111 can send data to the second receiving end 9211 without waiting for the connection between the second sending end 9212 and the first receiving end 9112 If the link between the second sending end 9212 and the first receiving end 9112 is more successful than the link between the first sending end 9111 and the second receiving end 9211, the link training is successful.
  • the second sending end 9212 can send data to the first receiving end 9112 without waiting for the first sending end 9111 to communicate with the first receiving end 9112.
  • the data is sent only after the link training between the two receiving ends 9211 is successful.
  • the second device 92 continuously checks the link status of the first link, and informs the first device 91 through the auxiliary link when the first link is abnormal.
  • the first device 91 may also query the second device 92 for the link status of the current first link as required.
  • the first device 91 continuously checks the link status of the second link, and informs the second device 92 through the auxiliary link when the second link is abnormal.
  • the second device 92 may also query the first device 91 for the link status of the current second link as required.
  • the link training operation performed by the first device 91 may be performed by the first processor 912 ; the link training operation performed by the second device 92 may be performed by the second processor 922 .
  • the first interface 911 has processing capability, that is, when the first interface 911 includes a first slave processor, the first slave processor is coupled to the first transmitter 9111, the first receiver 9112, the third transmitter The terminal 9113 and the fourth receiving terminal 9114, for example, the first slave processor is a chip with processing capability
  • the above-mentioned first device 91 performs the link training operation, which is performed by the first slave processor in the first interface 911, that is,
  • the link training operation in this embodiment of the present application may be performed by hardware logic or a processor in the interface circuit; similarly, when the second interface 921 includes a second slave processor, the second slave processor is coupled to The second receiving end 9211, the second sending end 9212, the third receiving end 9213 and the fourth sending end 9214, for example, the second slave processor is a chip with processing capability, the second device 92 perform
  • FIG. 11 is a schematic flowchart of a link training method provided by an embodiment of the present application.
  • the method is applied to a communication system.
  • the communication system includes a first device, a second device, and a connection between the first device and the second device.
  • the cable of the device, the first device includes a first sending end and a first receiving end, the second device includes a second sending end and a second receiving end; the cable includes at least one first chain from the first sending end to the second receiving end and at least one second link from the second sending end to the first receiving end;
  • the method can be applied to the communication system shown in FIG. 9 ; the method includes but is not limited to the following steps:
  • the first device performs link training for at least one first link.
  • the first device sends link training to the first link through the at least one first link that is successfully trained through the link training of the at least one second link before the link training of the at least one second link is successful.
  • the second device sends data.
  • the second device performs link training on at least one first link.
  • the second device receives information from at least one first link that has been successfully trained through the link training under the condition that at least one second link has not undergone link training, or before the link training of at least one second link is successful. Data of the first device.
  • the link between the first device and the second device includes at least one first link from the first sending end of the first device to the second receiving end of the second device, and the second device's link At least one second link from the second transmitting end to the first receiving end of the first device; performing link training of the link between the first device and the second device includes performing the link of the at least one first link training, and performing link training on the at least one second link, that is, link training on the bidirectional transmission link; in the case that the at least one second link does not perform link training, or when the at least one second link does not perform link training Before the link training of the two links is successful, if the link training of the at least one first link is successful, data may be sent to the second device through the at least one first link whose link training is successful, specifically, the The first sending end sends data to the second receiving end; therefore, in the embodiment of the present application, the link training of the bidirectional transmission link can be independent of each other, and the training processes in each direction are not coupled to each other,
  • the cable further includes an auxiliary link; the first device performs link training on at least one first link, including: the first device sends the first rate to the second device through the auxiliary link, Wherein, the first rate is the link training rate of at least one first link; the first device performs at least one first link at the first rate under the condition that the parameter of the first transmitting end is configured as the first training parameter value clock locking, equalization calculations, and link checking.
  • the cable further includes an auxiliary link for performing link training on at least one first link, and the first device sends a first rate to the second device through the auxiliary link, where the first rate is the at least one The link training rate of a first link, so that the second device can know the training rate of the at least one first link; the first device also configures the parameters of the first transmitter as the first training parameter value, and then uses the first The clock lock, balance calculation and link check of the at least one first link are performed at a rate, and the second device also cooperates with the first device to perform clock lock, balance calculation and link check of the at least one first link at the first rate.
  • Link check if the clock lock, balance calculation, and link check are all successful, the link training of the at least one first link is successful, and the first device sends the training rate to the second device through the auxiliary link, thereby Making the first device and the second device use the same training rate to perform link training is beneficial to the successful link training of the at least one first link.
  • the first device performs clock locking, equalization calculation and link check on at least one first link, including: the first device sends the first clock recovery to the second receiving end through the first sending end Sequence: the first device receives the first clock locking result from the second device through the auxiliary link, wherein the first clock locking result is that the clock locking is successful or the clock locking fails; the first device is the clock locking success when the first clock locking result is In the case of , the first equalization sequence is sent to the second receiving end through the first transmitting end, and the first equalizing sequence is used for the second device to perform equalization calculation; the first device receives the first equalization calculation from the second device through the auxiliary link The result or the first link check result, where the first balance calculation result is the balance calculation failure, and the first link check result is the link check success or the link check failure.
  • the first device sends a first clock recovery sequence to the second receiving end through the first sending end, and the first clock recovery sequence is used for the second device to perform clock recovery and locking, so that the second The clocks of the device and the first device are synchronized; after the second device completes clock recovery and locking, it will send the first clock locking result to the first device through the auxiliary link.
  • the first clock The locking result is that the clock is locked successfully; when the second device fails to lock the clock, the first clock locking result is that the clock fails to lock, wherein if the second device clock and lock are over, it is also considered that the second device has failed to lock the clock.
  • the first device sends the first equalization sequence to the second receiving end through the first transmitting end, and the first equalizing sequence is used for the second device to perform equalization calculation; when the second device When the equalization calculation fails, the first equalization calculation result is sent through the auxiliary link, and the first equalization calculation result is that the equalization calculation fails.
  • the link check is performed, and after the link check is completed, the first link check result is sent to the first device through the auxiliary link; when the link check of the second device fails, the first link check The result of the link check is that the link check fails; when the link check of the second device succeeds, the result of the first link check is that the link check succeeds.
  • the second device may also choose to send the first equalization calculation result through the auxiliary link. In this case, the first equalization calculation result is that the equalization calculation is successful.
  • the first clock locking result includes a clock locking result of each first link in the at least one first link, and there is a first link whose clock locking fails in the at least one first link
  • the first clock locking result is that the clock locking fails; otherwise, the first clock locking result is that the clock locking succeeds.
  • the first clock locking result received by the first device from the second device includes the clock locking result of each first link in the at least one first link, and the at least one first link
  • the successful clock locking of a link requires that each of the at least one first link is successfully clock locked, and as long as there is a first link whose clock locking fails in the at least one first link, the at least one first link One link fails to lock the clock; therefore, the second device sends the clock locking result of each first link in the at least one first link to the first device through the first clock locking result, which is beneficial for the first device to determine The clock lock result of the at least one first link.
  • the parameters of the first transmitting end include a voltage swing of each first link; the method further includes: the first device judging at least one first link whose clock lock fails in the first link Whether the configuration of the voltage swing of the first link traverses all the preset voltage swing values; if not, the first device updates the configuration of the voltage swing of the first link whose clock lock fails from the first value to the second value, wherein , all preset voltage swing values include a first value and a second value, where the second value is an unconfigured value for the voltage swing of the first link whose clock lock fails; The device sends information that the configuration update of the voltage swing of the first link whose clock lock fails is completed; wherein, the first training parameter value includes a voltage swing training value, and the configuration of the voltage swing of the first link whose clock lock fails is in When first updated, the first value is the voltage swing training value.
  • the parameters of the first transmitting end include the voltage swing of each first link. If the value of the voltage swing configured on the first transmitting end is too high or too low, the clock of the second receiving end cannot be locked. success, that is, the second device cannot lock the clock successfully; when the clock of the second receiving end fails to lock, that is, there is a first link that fails to lock the clock in the at least one first link, and the first device determines that the clock locking fails Whether the configuration of the voltage swing of the first link traverses all the preset voltage swing values; if not, the first device adjusts the configuration of the voltage swing of the first link whose clock lock fails, for example, locks the clock The configuration of the voltage swing of the failed first link is updated to its unconfigured value, and then the first device informs the second device through the auxiliary link of the configuration update of the voltage swing of the first link whose clock has failed to lock. Complete; in this way, the second device can perform clock recovery and locking again, so that the second device can be successfully clock locked by
  • the first balance calculation result includes a balance calculation result of each first link in the at least one first link, and there is a first link that fails the balance calculation in the at least one first link
  • the result of the first equalization calculation is that the equalization calculation fails.
  • the first equalization calculation result received by the first device from the second device includes the equalization calculation result of each first link in the at least one first link, and the at least one first link
  • the successful balance calculation of the link requires that each first link in the at least one first link has a successful balance calculation, and as long as there is a first link that fails the balance calculation in the at least one first link, the at least one first link
  • the balance calculation fails for one link; therefore, the second device sends the balance calculation result of each first link in the at least one first link to the first device through the first balance calculation result, which is beneficial for the first device to determine The equalization calculation result of the at least one first link.
  • the first equalization calculation result further includes a clock out-of-lock condition of each first link in the at least one first link; the method further includes: the first device judging the at least one first link Whether there is a first link with a clock out of lock in the path; if there is a first link with a clock out of lock in at least one of the first links, the first device sends the first rate to the second device through the auxiliary link, and sends the second device through the auxiliary link.
  • the first sending end sends the first clock recovery sequence to the second receiving end.
  • the failure of the equalization calculation may be caused by the loss of the link clock during the equalization calculation. Therefore, when the equalization calculation of the second device fails, the first equalization calculation received by the first device from the second device
  • the calculation result also includes the clock loss of each first link in the at least one first link. If there is a first link whose clock loses lock in the at least one first link, it means that the second device is balanced
  • the calculation failure may be caused by the link loss of the first link; in this case, the first device can re-send the first rate to the second device through the auxiliary link, and send the second device through the first sending end to the second device again.
  • the receiving end sends the first clock recovery sequence, and after the second device re-receives the first rate and the first clock recovery sequence, it re-trains the link, thereby facilitating successful link training.
  • the parameters of the first transmitting end include the transmitting end feedforward equalization parameters of each first link; if there is no first link whose clock is out of lock in at least one of the first links, the method It also includes: the first device judges whether the configuration of the transmit-end feed-forward equalization parameter of the first link whose equalization calculation fails in at least one first link traverses all the transmit-end feed-forward equalization preset values; if not, the first device Then, the configuration of the feed-forward equalization parameter of the first link where the equalization calculation fails is updated from the third value to the fourth value, wherein all the preset values of the feed-forward equalization of the transmitter include the third value and the fourth value, The fourth value is the value that has not been configured for the feedforward equalization parameter of the transmitter of the first link whose equalization calculation fails; the first device sends the feedforward of the transmitter of the first link whose equalization calculation fails to the second device through the auxiliary link.
  • the first training parameter value includes the transmission end feedforward equalization training value, and the configuration of the transmission end feedforward equalization parameter of the first link where the equalization calculation fails is updated for the first time, the third value Feedforward equalization training values for the transmitter.
  • the parameters of the first transmitting end include the transmitting end feed-forward equalization parameters of each first link, and the configuration of the value of the transmitting end feed-forward equalizing parameters will affect the link equalization, that is, whether the equalization calculation can be affected. Success; when the equalization calculation at the second receiving end fails, that is, there is a first link in the at least one first link that fails the equalization calculation, the first device judges the transmit-end feedforward equalization of the first link whose equalization calculation fails.
  • the first device adjusts the configuration of the feed-forward equalizing parameters at the sending end of the first link whose equalization calculation fails, for example, sets the first link whose equalization calculation fails.
  • the configuration of the feed-forward equalization parameter at the transmitter of a link is updated to its unconfigured value, and then the first device informs the second device through the auxiliary link of the feed-forward equalization parameter at the transmitter of the first link whose equalization calculation fails.
  • the configuration update is completed; in this way, the second device can perform the equalization calculation again, so that the second device can make the equalization calculation by adjusting the feedforward equalization parameters of the transmitting end of the first link when the second device cannot successfully equalize the calculation. If successful, it is beneficial to realize the successful balance calculation of link training.
  • the first link check result includes a link check result of each first link in the at least one first link, and there is a link check failure in the at least one first link.
  • the first link check result is that the link check fails; otherwise, the first link check result is that the link check succeeds, and the link training of at least one first link succeeds.
  • the first link check result received by the first device from the second device includes a link check result of each of the at least one first link, and the at least one first link
  • the successful link check of the first link requires that each of the at least one first link has a successful link check, as long as there is a first link that fails the link check in the at least one first link , the link check of the at least one first link fails; therefore, the second device sends the link check result of each first link in the at least one first link to the first link check result through the first link check result.
  • the device is helpful for the first device to determine the link check result of the at least one first link.
  • the cable stores the cable information of the cable; the first device stores the device information of the first device; the second device stores the device information of the second device; the method further includes: first A device obtains the device information of the first device, obtains the cable information of the cable from the cable, and obtains the device information of the second device from the second device through the auxiliary link; the first device obtains the device information of the first device according to the device information of the first device. , the cable information of the cable, and the device information of the second device to determine the first rate; the first device determines the first training parameter value according to the first rate.
  • the cable stores cable information of the cable, and the cable information includes information such as cable capability information, manufacturer information, cable identification code, insertion loss information, and length information;
  • the first device stores information such as cable information.
  • the device information of the first device, the second device stores the device information of the second device, and the device information includes information such as device capability information, device name, serial number, production time, and port information of ports in the device;
  • the first device obtains its own Store the device information of the first device, obtain the cable information of the cable from the cable, and obtain the device information of the second device from the second device through the auxiliary link; since the cable information can be used to characterize the cable capability , the device information can be used to characterize the device capability, so the first device can determine the training rate according to the device information of the first device, the cable information of the cable, and the device information of the second device;
  • the first training parameter value configured by the terminal, exemplarily, determines the first rate according to the capability information of the first device, the capability information of the second device, and the capability
  • Loss information to determine the value of the first training parameter in this way, it is not necessary to start training with the lowest rate and the parameters of the first transmitter are configured as initial values, but the parameters of the first transmitter can be configured to determine the rate at the determined rate. Start training at the first training parameter value of , which is conducive to training at a higher rate and reducing training time.
  • the method further includes: the first device stores at least one item of the following information: the first rate, the cable information of the cable, the device information of the second device, the forward and reverse of the cable The insertion state, or the value configured by the parameters of the first transmitting end after the link training of at least one first link is successful.
  • the first device after the link training is successful, the first device will train the speed, the cable information of the cable (including the identification code of the cable), the device information of the second device (including the port information of the second receiving end) , the forward and reverse insertion state of the cable, the value of the parameter configuration of the first sending end (including the value of the voltage swing of each first link in the at least one first link and the value of the sending end feedforward equalization parameter) At least one of the parameters is stored; when the first device and the second device are connected to the cable for training again, these parameter values can be directly used, thereby reducing the training time and increasing the training rate.
  • the cable further includes an auxiliary link; the second device performs link training on at least one first link, including: the second device receives the first rate from the first device through the auxiliary link ; the second device performs clock locking, equalization calculation and link checking of at least one first link at the first rate under the condition that the parameter of the second receiving end is configured as the second training parameter value.
  • the second device performs clock locking, equalization calculation and link checking of at least one first link, including: the second device receives the first clock recovery from the first sending end through the second receiving end sequence; the second device performs clock locking according to the first clock recovery sequence, and sends the first clock locking result to the first device through the auxiliary link, wherein the first clock locking result is clock locking success or clock locking failure; the second device In the case of successful clock locking, the second receiving end receives the first equalization sequence from the first transmitting end; the second device performs equalization calculation according to the first equalization sequence; when the equalization calculation fails, the second device passes through the auxiliary chain The route sends the first equalization calculation result to the first device, wherein the first equalization calculation result is that the equalization calculation fails; the second device performs a link check when the equalization calculation succeeds, and sends the result to the first device through the auxiliary link The first link check result, where the first link check result is that the link check succeeds or the link check fails.
  • the equalization is that the link check succeeds or
  • the character delimitation succeeds, the period synchronization succeeds, or the bit error rate is less than the error rate If the code rate is 1, the equalization calculation fails; otherwise, the equalization calculation succeeds.
  • the parameters configured by the second receiving end include continuous time linear equalization parameters; before the second device performs equalization calculation according to the first equalization sequence, the method further includes: the second device determines at least one first equalization sequence. Whether there is a first link whose clock is out of lock in the link; if there is a first link whose clock is out of lock in at least one first link, the second device linearly equalizes the continuous time of the first link whose clock is out of lock The configuration of the parameters is updated, and the information that the clock of the first link is out of lock is sent to the first device through the auxiliary link.
  • the failure of the equalization calculation may be caused by the loss of the link clock during the equalization calculation. Therefore, before the second device performs the equalization calculation, it is determined whether there is a clock in the at least one first link.
  • the first link that loses lock if there is a first link whose clock loses lock, the configuration of the continuous time linear equalization parameter of the first link whose clock loses lock is updated, and then the auxiliary link is used to notify the clock loss of the first link.
  • the first device can re-send the first rate to the second device through the auxiliary link, and send the first clock recovery sequence to the second receiving end through the first sending end , after the second device re-receives the first rate and the first clock recovery sequence, it performs link training again, which is beneficial to make the link training successful.
  • the link check fails; otherwise, the link check succeeds, and the link training of at least one first link succeeds.
  • the cable stores cable information of the cable; the method further includes: acquiring the cable information of the cable from the cable; Two training parameter values.
  • the second training parameter value is determined according to the first rate and insertion loss information in the cable information.
  • the method further includes: the second device stores at least one item of the following information: the first rate, the cable information of the cable, the device information of the first device, the forward and reverse of the cable The insertion state, or the value configured by the parameters of the second receiving end after the link training of at least one first link is successful; wherein, the device information of the first device is obtained from the first device through the auxiliary link.
  • the second device will train the speed, cable information of the cable (including the identification code of the cable), and device information of the first device (including the port information of the first sending end) , the forward and reverse insertion state of the cable, the value of the parameter configuration of the second receiving end (including the value of the continuous time linear equalization parameter and the value of the decision feedback equalization parameter of each first link in the at least one first link) At least one of the parameters is stored; when the first device and the second device are connected to the cable for training again, these parameter values can be directly used, thereby reducing the training time and increasing the training rate.
  • FIG. 12 is a schematic structural diagram of a link training apparatus provided by an embodiment of the present application.
  • the link training apparatus 1200 is applied to a first device, and the first device and the second device are connected by a cable. It includes at least one first link and at least one second link, and the link training device includes: a training unit 1201 for performing link training on at least one first link, where at least one first link is run by a first device A link to the second device; the sending unit 1202 is configured to pass the link training successfully when at least one second link does not perform link training, or before the link training of at least one second link succeeds At least one first link of the device sends data to the second device, and at least one second link is a link from the second device to the first device.
  • the first device includes a first sending end
  • the second device includes a second receiving end
  • at least one first link is a link from the first sending end to the second receiving end
  • the cable also Including auxiliary links
  • the training unit 1201 is specifically configured to: send a first rate to the second device through the auxiliary link, where the first rate is at least one first chain
  • the link training rate of the link in the case that the parameters of the first transmitting end are configured as the first training parameter value, clock locking, equalization calculation and link checking of at least one first link are performed at the first rate.
  • the training unit 1201 is specifically configured to: send the first clock to the second receiving end through the first sending end recovery sequence; receiving the first clock locking result from the second device through the auxiliary link, wherein the first clock locking result is that the clock locking succeeds or the clock locking fails; when the first clock locking result is that the clock locking succeeds, pass the The first sending end sends the first equalization sequence to the second receiving end, and the first equalization sequence is used for the second device to perform equalization calculation; the first equalization calculation result or the first link check result from the second device is received through the auxiliary link , wherein the first balance calculation result is that the balance calculation fails, and the first link check result is that the link check succeeds or the link check fails.
  • the first clock locking result includes a clock locking result of each first link in the at least one first link, and there is a first link whose clock locking fails in the at least one first link
  • the first clock locking result is that the clock locking fails; otherwise, the first clock locking result is that the clock locking succeeds.
  • the parameters of the first transmitting end include the voltage swing of each first link; the training unit 1201 is further configured to: determine the voltage of the first link whose clock lock fails in the at least one first link Whether the voltage swing configuration traverses all the voltage swing preset values; if not, the voltage swing configuration of the first link whose clock lock fails is updated from the first value to the second value, where all voltages
  • the preset value of the swing includes a first value and a second value, and the second value is an unconfigured value of the voltage swing of the first link whose clock lock fails; Information about the completion of updating the configuration of the voltage swing of a link; wherein, the first training parameter value includes the training value of the voltage swing, and when the configuration of the voltage swing of the first link whose clock lock fails is updated for the first time, the first value is the voltage swing training value.
  • the first balance calculation result includes a balance calculation result of each first link in the at least one first link, and there is a first link that fails the balance calculation in the at least one first link
  • the result of the first equalization calculation is that the equalization calculation fails.
  • the first equalization calculation result further includes the clock loss of each first link in the at least one first link; the training unit 1201 is further configured to: determine the at least one first link Whether there is a first link whose clock is out of lock in at least one first link; if there is a first link whose clock is out of lock in at least one first link, send the first rate to the second device through the auxiliary link, and send the first rate through the first sending end
  • the first clock recovery sequence is sent to the second receiver.
  • the parameters of the first transmitting end include the transmitting end feedforward equalization parameters of each first link; if there is no first link whose clock is out of lock in at least one of the first links, the training unit 1201 is further used for: judging whether the configuration of the transmit-end feed-forward equalization parameter of the first link where the equalization calculation fails in at least one first link traverses all the transmit-end feed-forward equalization preset values; if not, the equalization calculation is performed.
  • the configuration of the sending end feedforward equalization parameter of the failed first link is updated from the third value to the fourth value, wherein all the sending end feedforward equalization preset values include the third value and the fourth value, and the fourth value is The unconfigured value of the feedforward equalization parameter at the sending end of the first link where the equalization calculation fails; the configuration update of the feedforward equalization parameter at the sending end of the first link where the equalization calculation fails is sent to the second device through the auxiliary link. information; wherein, the first training parameter value includes the sending end feedforward equalization training value, and the third value is the sending end feedforward equalization training when the configuration of the sending end feedforward equalization parameter of the first link whose equalization calculation fails is updated for the first time. value.
  • the first link check result includes a link check result of each first link in the at least one first link, and there is a link check failure in the at least one first link.
  • the first link check result is that the link check fails; otherwise, the first link check result is that the link check succeeds, and the link training of at least one first link succeeds.
  • the cable stores the cable information of the cable; the first device stores the device information of the first device; the second device stores the device information of the second device; the training unit 1201 is further configured to : Obtain the device information of the first device, obtain the cable information of the cable from the cable, and obtain the device information of the second device from the second device through the auxiliary link; The cable information and the device information of the second device determine the first rate; the first training parameter value is determined according to the first rate.
  • the training unit 1201 is further configured to: store at least one item of the following information: the first rate, the cable information of the cable, the device information of the second device, the forward and reverse insertion of the cable state, or the value configured by the parameters of the first sender after the link training of at least one first link is successful.
  • the link training apparatus 1200 provided in this embodiment of the present application includes but is not limited to the above-mentioned unit modules.
  • the link training apparatus 1200 may further include a storage unit 1203 .
  • the storage unit 1203 may be used to store program codes and data of the link training apparatus 1200 .
  • link training of at least one first link is performed, when the at least one second link does not perform link training, or when the at least one second link is not trained.
  • link training of the link is successful, if the link training of the at least one first link is successful, data can be sent to the second device through the at least one first link whose link training is successful; therefore, the embodiment of the present application
  • the link training that can realize the bidirectional transmission link is independent of each other, and the training processes in each direction are not coupled with each other. Therefore, the training rate and the number of links of the bidirectional transmission link are not strongly bound, and the flexibility of link training is greatly improved.
  • FIG. 13 is a schematic structural diagram of another link training apparatus provided by an embodiment of the present application.
  • the link training apparatus 1300 is applied to a first device, and the first device and the second device are connected by a cable.
  • the cable includes at least one first link and at least one second link
  • the link training device includes: a training unit 1301 for performing link training on at least one first link, where the at least one first link is a A link from a device to a second device; the receiving unit 1302 is configured to pass link training when at least one second link does not perform link training, or before the link training of at least one second link succeeds At least one successful first link receives data from the first device, and at least one second link is a link from the second device to the first device.
  • the first device includes a first sending end
  • the second device includes a second receiving end
  • at least one first link is a link from the first sending end to the second receiving end
  • the cable also Including an auxiliary link
  • the training unit 1301 is specifically configured to: receive the first rate from the first device through the auxiliary link; configure the parameters of the second receiving end as the first In the case of two training parameter values, clock locking, equalization calculation, and link checking of at least one first link are performed at the first rate.
  • the training unit 1301 is specifically configured to: receive the first clock from the first transmitter through the second receiver recovery sequence; perform clock locking according to the first clock recovery sequence, and send a first clock locking result to the first device through the auxiliary link, wherein the first clock locking result is clock locking success or clock locking failure; In this case, receive the first equalization sequence from the first transmitting end through the second receiving end; perform equalizing calculation according to the first equalizing sequence; in the case that the equalizing calculation fails, send the first equalizing calculation result to the first device through the auxiliary link , where the first balance calculation result is that the balance calculation fails; if the balance calculation is successful, a link check is performed, and the first link check result is sent to the first device through the auxiliary link, where the first link check The result is link check success or link check failure.
  • the character delimitation succeeds, the period synchronization succeeds, or the bit error rate is less than the error rate If the code rate is 1, the equalization calculation fails; otherwise, the equalization calculation succeeds.
  • the parameters configured by the second receiving end include continuous time linear equalization parameters; the training unit 1301 is further configured to: before performing equalization calculation according to the first equalization sequence, determine whether the at least one first link has There is a first link whose clock is out of lock; if there is a first link whose clock is out of lock in at least one of the first links, update the configuration of the continuous-time linear equalization parameter of the first link whose clock is out of lock, and Send the information that the clock of the first link is out of lock and the clock of the first link is out of lock to the first device through the auxiliary link.
  • the link check fails; otherwise, the link check succeeds, and the link training of at least one first link succeeds.
  • the cable stores the cable information of the cable; the training unit 1301 is further configured to: obtain the cable information of the cable from the cable; according to the cable information of the cable and the first rate A second training parameter value is determined.
  • the training unit 1301 is further configured to: store at least one item of the following information: the first rate, the cable information of the cable, the device information of the first device, the forward and reverse insertion of the cable state, or a value configured by a parameter of the second receiving end after the link training of at least one of the first links is successful; wherein, the device information of the first device is obtained from the first device through the auxiliary link.
  • the link training apparatus 1300 provided in this embodiment of the present application includes, but is not limited to, the above-mentioned unit modules.
  • the link training apparatus 1300 may further include a storage unit 1303 .
  • the storage unit 1303 may be used to store program codes and data of the link training apparatus 1300 .
  • link training of at least one first link is performed, in the case where link training is not performed on the at least one second link, or when the at least one second link is not trained.
  • the link training of the bidirectional transmission link is independent of each other, and the training processes in each direction are not coupled with each other, so the training rate of the bidirectional transmission link and the number of links are not strongly bound, and the flexibility of link training is Significant improvement; after the link in one direction of the bidirectional transmission link is successfully trained, service transmission can be performed in that direction, and it is not necessary to wait for the bidirectional link to be successfully trained before starting service transmission, so service transmission is earlier. , which can adapt to more and more complex scenarios.
  • FIG. 14 is a schematic structural diagram of an electronic device provided by an embodiment of the present application. It should be understood that the electronic device 1400 may be the aforementioned first device or the second device.
  • the electronic device 1400 may include an antenna system 1410, a radio frequency (RF) circuit 1420, a processor 1430, a memory 1440, a camera 1450, an audio circuit 1460, a display screen 1470, one or more sensors 1480, a wireless transceiver 1490, etc. .
  • RF radio frequency
  • Antenna system 1410 may be one or more antennas, or may be an antenna array composed of multiple antennas.
  • the radio frequency circuit 1420 which may include one or more analog radio frequency transceivers, which may also include one or more digital radio frequency transceivers, is coupled to the antenna system 1410 . It should be understood that, in various embodiments of the present application, coupling refers to mutual connection in a specific manner, including direct connection or indirect connection through other devices, such as various interfaces, transmission lines, and buses.
  • the radio frequency circuit 1420 can be used for various types of cellular wireless communications.
  • the processor 1430 may include a communication processor, and the communication processor may be used to control the radio frequency circuit 1420 to receive and transmit signals through the antenna system 1410, and the signals may be voice signals, media signals or control signals.
  • the processor 1430 may include various general-purpose processing devices, such as a general-purpose central processing unit (Central Processing Unit, CPU), a system on a chip (System on Chip, SOC), a processor integrated on the SOC, a separate processor chip or a controller, etc.; the processor 1430 may also include a dedicated processing device, such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or a digital signal processor (Digital Signal Processor).
  • ASIC application specific integrated circuit
  • FPGA field programmable gate array
  • Digital Signal Processor Digital Signal Processor
  • the processor 1430 may be a processor group composed of multiple processors, and the multiple processors are coupled to each other through one or more buses.
  • the processor may include an analog-to-digital converter (ADC), a digital-to-analog converter (DAC) to realize the connection of signals between different components of the device.
  • ADC analog-to-digital converter
  • DAC digital-to-analog converter
  • the memory 1440 is coupled to the processor 1430, in particular, the memory 1440 may be coupled to the processor 1430 through one or more memory controllers.
  • the memory 1440 may be used to store computer program instructions, including a computer operating system (Operation System, OS), various user application programs and user data, and the like.
  • the processor 1430 may read computer program instructions or user data from the memory 1440, or store the computer program instructions or user data into the memory 1440 to implement related processing functions.
  • the memory 1440 can be a non-power-down volatile memory, such as EMMC (Embedded Multi Media Card, embedded multimedia card), UFS (Universal Flash Storage, universal flash storage) or read-only memory (Read-Only Memory, ROM), Or other types of static storage devices that can store static information and instructions, and can also be power-down volatile memory (volatile memory), such as random access memory (Random Access Memory, RAM), static random access memory (Static).
  • EMMC embedded Multi Media Card, embedded multimedia card
  • UFS Universal Flash Storage, universal flash storage
  • read-only memory Read-Only Memory
  • volatile memory volatile memory
  • volatile memory such as random access memory (Random Access Memory, RAM), static random access memory (Static).
  • SRAM random-access memory
  • dynamic storage devices that can store information and instructions
  • SRAM electrically Erasable Programmable Read-Only Memory
  • EEPROM Electrically Erasable Programmable Read-Only Memory
  • CD-ROM Compact Disc
  • optical disc storage including compact disc, laser disc, digital versatile disc or Blu-ray disc, etc.
  • magnetic disk storage media or other magnetic storage devices, but not limited thereto.
  • the memory 1440 may be independent of the processor 1430 , or the memory 1440 may be integrated with the processor 1430 .
  • the camera 1450 is used for capturing images or videos, and the audio circuit 1460 is coupled with the processor 1430 .
  • the audio circuit 1460 may include a microphone 1461 and a speaker 1462.
  • the microphone 1461 may receive sound input from the outside world, and the speaker 1462 may implement audio data playback.
  • the display screen 1470 is used to provide the user with various display interfaces or various menu information that can be selected.
  • the content displayed on the display screen 1470 includes, but is not limited to, a soft keyboard, a virtual mouse, virtual keys and icons, etc. These display contents are associated with specific internal modules or functions, and the display screen 1470 may also accept user input.
  • the display screen 1470 may include a display panel 1471 and a touch panel 1472 .
  • Sensors 1480 may include image sensors, motion sensors, proximity sensors, ambient noise sensors, sound sensors, accelerometers, temperature sensors, gyroscopes, or other types of sensors, as well as various combinations thereof.
  • the processor 1430 drives the sensor 1480 through the sensor controller 142 in the I/O subsystem 140 to receive various information such as audio information, image information or motion information, and the sensor 1480 transmits the received information to the processor 1430 for processing.
  • the wireless transceiver 1490, the wireless transceiver 1490 can provide wireless connection capability to other devices. Fidelity, WiFi) network, Wireless Personal Area Network (Wireless Personal Area Network, WPAN) or its WLAN, etc.
  • the wireless transceiver 1490 may be a Bluetooth compatible transceiver for wirelessly coupling the processor 1430 to peripheral devices such as a Bluetooth headset, wireless mouse, etc.
  • the device 1430 is wirelessly coupled to a wireless network or other device.
  • the electronic device 1400 may also include other input devices 144 coupled to the processor 1430 to receive various user inputs, such as receiving entered numbers, names, addresses, and media selections, etc.
  • Other input devices 144 may include keyboards, physical buttons (pressing a button) , rocker buttons, etc.), dials or slide switches, etc.
  • the electronic device 1400 may also include the I/O subsystem 140 and power supply 1401 described above. It should be understood that the electronic device 1400 in FIG. 14 is only an example, and the specific form of the electronic device 1400 is not limited, and the electronic device 1400 may also include other existing components not shown in FIG. 14 or other components that may be added in the future part.
  • FIG. 15 is a schematic structural diagram of another electronic device provided by an embodiment of the present application.
  • the electronic device may be the aforementioned first device or the second device, and the electronic device 1500 includes: at least one CPU, a memory, and the type of the memory may include, for example, SRAM and ROM, a microcontroller (Micro controller Unit, MCU), a WLAN subsystem , bus, transmission interface, etc.
  • the electronic device 1500 may also include application processors (Application Processors, APs), other special-purpose processors such as NPUs, and other special-purpose processors such as power management subsystems, clock management subsystems, and power consumption management subsystems. subsystem.
  • Application Processors Application Processors
  • APs Application Processors
  • other special-purpose processors such as NPUs
  • other special-purpose processors such as power management subsystems, clock management subsystems, and power consumption management subsystems. subsystem.
  • the connectors include various types of interfaces, transmission lines or buses. These interfaces are usually electrical communication interfaces, but may also be mechanical interfaces or other forms of interfaces. This embodiment does not limit this.
  • the CPU may be a single-core (single-CPU) processor or a multi-core (multi-CPU) processor; coupled to each other by one or more buses.
  • the CPU implements any one of the link training methods in the foregoing method embodiments by invoking program instructions stored in the above-mentioned memory or off-chip memory.
  • the CPU and the MCU jointly implement any one of the link training methods in the foregoing method embodiments, for example, the CPU completes some steps in the link training method, and the MCU completes the link training method. other steps.
  • the AP or other dedicated processor implements any one of the link training methods in the foregoing method embodiments by invoking program instructions stored in the above-mentioned on-chip memory or off-chip memory.
  • the transmission interface may be an interface for receiving and sending data of the processor chip, and the transmission interface usually includes a variety of interfaces.
  • the transmission interface may include an Inter-Integrated Circuit (I2C). Interface, Serial Peripheral Interface (SPI), Universal Asynchronous Receiver-Transmitter (UART) interface, General-purpose input/output (GPIO) interface, etc. It should be understood that these interfaces may implement different functions by multiplexing the same physical interface.
  • I2C Inter-Integrated Circuit
  • SPI Serial Peripheral Interface
  • UART Universal Asynchronous Receiver-Transmitter
  • GPIO General-purpose input/output
  • the transmission interface may further include High Definition Multimedia Interface (HDMI), V-By-One interface, Embedded Display Port (eDP), mobile industry processing Interface (Mobile Industry Processor Interface, MIPI) or Display Port (DP) and so on.
  • HDMI High Definition Multimedia Interface
  • V-By-One interface V-By-One interface
  • eDP Embedded Display Port
  • MIPI Mobile Industry Processor Interface
  • DP Display Port
  • the above-mentioned parts are integrated on the same chip; in another optional case, the memory may be an independent chip.
  • the WLAN subsystem may include, for example, radio frequency circuitry and baseband.
  • the chip involved in the embodiments of this application is a system fabricated on the same semiconductor substrate by an integrated circuit process, also called a semiconductor chip, which can be fabricated on a substrate (usually a semiconductor such as silicon) using an integrated circuit process A collection of integrated circuits formed on a material), the outer layers of which are usually encapsulated by a semiconductor encapsulation material.
  • the integrated circuit may include various functional devices, each of which includes a logic gate circuit, a metal-oxide-semiconductor (Metal-Oxide-Semiconductor, MOS) transistor, a bipolar transistor or a diode and other transistors, as well as capacitors, resistors, etc. or other components such as inductors.
  • MOS metal-oxide-semiconductor
  • An embodiment of the present application further provides a link training apparatus, including a processor and a transmission interface, where the processor is configured to call a program stored in a memory, so that the link training apparatus implements the above method embodiments method in .
  • Embodiments of the present application further provide a computer-readable storage medium, where the computer-readable storage medium includes a computer program, and when the computer program runs on a computer or a processor, the computer or the processor causes the computer or the processor to perform As in the above method embodiment.
  • An embodiment of the present application further provides a computer program product, the computer program product includes a computer program, when the computer program is run on a computer or a processor, the computer or the processor is made to perform the above-mentioned method implementation method in the example.
  • the uplink port and the downlink port respectively read the capabilities of the peer device, the downlink port determines the number of links in the uplink and downlink directions, and the uplink port determines the uplink direction.
  • the training rate of the downlink port determines the training rate in the downlink direction.
  • the sender and receiver of the uplink port and downlink port obtain the parameter values that have been successfully trained in the history according to the training rate, or estimate a set of training parameter values according to the insertion loss information in the cable information. Initiate training.
  • the receiver performs clock recovery on each link according to the clock recovery sequence sent by the sender, and the receiver performs balance calculation and link check on each link according to the balance sequence sent by the sender.
  • the transmitter waits for the receiver to feed back the training status of each link. If any link fails to train successfully, the transmitter adjusts the voltage swing value or the transmitter feedforward equalization value.
  • the direction training is successful. After successful training in a certain direction, the sending end and the receiving end save the training parameter values of this training, which can be directly obtained and used in the next training to speed up the training speed.
  • the traffic in this direction can start to be transmitted (eg, video, audio traffic transmission).
  • the number of links in the uplink direction may not be equal to the number of links in the downlink direction, and the training rate in the uplink direction may not be equal to the training rate in the downlink direction.
  • the auxiliary information exchange is completed by the full-duplex auxiliary link.
  • the acquired or estimated parameter values include: the voltage swing value and the feedforward equalization value at the transmitting end, the continuous-time linear equalizing value and the decision feedback equalizing value at the receiving end.
  • the training in the uplink direction and the training in the downlink direction can be performed synchronously or asynchronously. If the parameter values related to the training cannot be obtained and there is no cable information, the parameter values of the previous successful training can still be used when the first device and the second device are not disconnected. After the first device and the second device are disconnected, the training-related parameters can be reset to initial values.
  • the equalization calculation is the equalization coarse adjustment, and its exit conditions include: all link character delimitation, period synchronization, bit error rate 1 check; when any condition is not satisfied, the sender adjusts the sender feedforward equalization value of the link; coarse
  • the bit error rate check is added in the tuning stage to reduce the failure probability of link check (equalization fine tuning).
  • the link check includes channel alignment and BER 2 checks on each link (BER 2 ⁇ BER 1).
  • the information that the transmitter needs to store includes but is not limited to: device information of the receiver device (including the port information of the receiver), voltage swing value of each link, feedforward equalization value of each link transmitter, cable Positive and negative insertion state;
  • the information that the receiving end needs to store includes but is not limited to: the device information of the transmitting end device (including the port information of the transmitting end), the continuous time linear equalization value of each link, the decision feedback equalization value of each link, the line
  • the cable is plugged forward and backward.
  • the storage medium is a non-volatile device, such as erasable programmable read-only memory, flash memory, embedded multimedia memory, and the like.
  • the training of two-way transmission links can be made independent of each other, the training processes are not coupled with each other, the two-way rate and the number of links are not strongly bound, and the flexibility is greatly improved; after successful training in a certain direction, the services in that direction It can be transmitted without waiting for successful training in both directions.
  • the service transmission is earlier, and it can adapt to more and more complex scenarios; the values of training-related parameters can be estimated through cable information, and the successfully trained parameter values can be stored in the non- Among the volatile devices, refresh is supported, which can be used directly in the next training, reducing training time and improving training speed; in complex scenarios such as unplugging, cable replacement, and equipment replacement, the training speed can still be accelerated; it can effectively shorten the physical
  • the link establishment time has a good effect on application scenarios such as system startup that requires quick screen clicks; completes the training-related information exchange through the two-way auxiliary link, and actively informs the alternative software for rotation training, which can reduce software requirements and reduce software overhead.
  • the size of the sequence numbers of the above-mentioned processes does not mean the sequence of execution, and the execution sequence of each process should be determined by its functions and internal logic, and should not be dealt with in the embodiments of the present application. implementation constitutes any limitation.
  • the disclosed system, apparatus and method may be implemented in other manners.
  • the apparatus embodiments described above are only illustrative.
  • the division of the above units is only a logical function division.
  • multiple units or components may be combined or may be Integration into another system, or some features can be ignored, or not implemented.
  • the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of devices or units, and may be in electrical, mechanical or other forms.
  • the units described above as separate components may or may not be physically separated, and components shown as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit.
  • the above functions are implemented in the form of software functional units and sold or used as independent products, they may be stored in a computer-readable storage medium.
  • the technical solution of the present application can be embodied in the form of a software product in essence, or the part that contributes to the prior art or the part of the technical solution.
  • the computer software product is stored in a storage medium, including Several instructions are used to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the above-mentioned methods of the various embodiments of the present application.
  • the aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic disk or optical disk and other media that can store program codes .
  • the modules in the apparatus of the embodiment of the present application may be combined, divided and deleted according to actual needs.

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Abstract

本申请实施例提供一种链路训练方法及相关设备，其中，第一设备与第二设备通过线缆连接，第一设备包括第一发送端和第一接收端，第二设备包括第二发送端和第二接收端；线缆包括第一发送端到第二接收端的至少一条第一链路以及第二发送端到第一接收端的至少一条第二链路；第一设备进行至少一条第一链路的链路训练；在至少一条第二链路未进行链路训练的情况下，或者在至少一条第二链路的链路训练成功之前，第一设备通过链路训练成功的至少一条第一链路向第二设备发送数据。采用本申请实施例，能够实现双向传输链路的链路训练相互独立。

Description

链路训练方法及相关设备 技术领域
本申请涉及通信技术领域，尤其涉及一种链路训练方法及相关设备。
背景技术
随着视频处理技术的不断提高，高分辨率、高帧率在工业、医疗以及消费电子等各行各业的需求也日趋强烈。分辨率和帧率的提高，势必需要更高的速率和更大的带宽。而速率越高，对发送端和接收端的均衡匹配就越重要。若发送端采用固定参数配置传输，在不同线缆和环境下，接收端难以达到均衡匹配，从而导致无法恢复信号。通过链路训练(Link Training，LT)，发送端和接收端可根据当前传输环境、彼此的性能和状态进行动态参数调整，使双方的均衡匹配达到最佳。
现有的高速媒体类接口中，高清多媒体接口(High Definition Multimedia Interface，HDMI)2.1、显示接口(Display Port，DP)1.4、通用串行总线(Universal Serial Bus，USB)4.0等均使用了训练的技术来完成链路建立。但这些方法均存在一些局限性。HDMI2.1和DP1.4仅支持单向训练，且训练过程只能由发送端主动查询接收端训练状态，对软件要求高，开销大；训练成功后，在设备、线缆等硬件环境不改变的情况下，使用相同速率再次训练使用时间与前一次训练基本一致，无法加速，训练耗时长。USB支持双向训练，但训练具有强约束性，如需要一对链路(Lane)同时训练，上下行方向的训练速率必须完全一致，业务传输需要等到上下行方向的所有链路训练成功之后才能进行。然而，随着应用场景的复杂化和多样化，现有的链路训练方法难以适应新的场景，例如双向低延时视音频传输、开机快速点屏等新场景。
发明内容
本申请实施例公开了一种链路训练方法及相关设备，能够实现双向传输链路的链路训练相互独立。
第一方面，本申请实施例提供了一种链路训练方法，应用于第一设备，第一设备与第二设备通过线缆连接，第一设备包括第一发送端和第一接收端，第二设备包括第二发送端和第二接收端；线缆包括第一发送端到第二接收端的至少一条第一链路以及第二发送端到第一接收端的至少一条第二链路；该方法包括：进行至少一条第一链路的链路训练；在至少一条第二链路未进行链路训练的情况下，或者在至少一条第二链路的链路训练成功之前，通过链路训练成功的至少一条第一链路向第二设备发送数据。
在本申请实施例中，第一设备与第二设备之间的链路包括从第一设备的第一发送端到第二设备的第二接收端的至少一条第一链路，以及第二设备的第二发送端到第一设备的第一接收端的至少一条第二链路；进行第一设备与第二设备之间的链路的链路训练包括对进行该至少一条第一链路的链路训练，以及进行该至少一条第二链路的链路训练，也即双向 传输链路的链路训练；在该至少一条第二链路未进行链路训练的情况下，或者在该至少一条第二链路的链路训练成功之前，若该至少一条第一链路的链路训练成功，就可通过链路训练成功的该至少一条第一链路向第二设备发送数据，具体地为通过第一发送端向第二接收端发送数据；因此，本申请实施例中，能够实现双向传输链路的链路训练相互独立，每个方向上的训练流程互不耦合，故双向传输链路的训练速率和链路数不强绑定，链路训练的灵活性大幅提升；在双向传输链路中的其中一个方向上的链路训练成功后，该方向上即可进行业务传输，不必等到双向的链路都训练成功才开始进行业务传输，故业务传输更早，可适应更多、更复杂的场景。
在一种可能的实现方式中，线缆还包括辅助链路(SideBand Link，SL)；进行至少一条第一链路的链路训练，包括：通过辅助链路向第二设备发送第一速率，其中，第一速率为至少一条第一链路的链路训练速率；在将第一发送端的参数配置为第一训练参数值的情况下，以第一速率进行至少一条第一链路的时钟锁定、均衡计算和链路检查。
在本申请实施例中，线缆还包括辅助链路，进行至少一条第一链路的链路训练，第一设备通过辅助链路向第二设备发送第一速率，该第一速率为该至少一条第一链路的链路训练速率，从而第二设备可以知晓该至少一条第一链路的训练速率；第一设备还将第一发送端的参数配置为第一训练参数值，然后以该第一速率进行该至少一条第一链路的时钟锁定、均衡计算和链路检查，第二设备也在该第一速率下配合第一设备进行该至少一条第一链路的时钟锁定、均衡计算和链路检查；在时钟锁定、均衡计算和链路检查均成功的情况下，该至少一条第一链路的链路训练成功，第一设备将训练速率通过辅助链路发给第二设备，从而使得第一设备和第二设备采用相同的训练速率进行链路训练，有利于该至少一条第一链路的链路训练成功。
在一种可能的实现方式中，进行至少一条第一链路的时钟锁定、均衡计算和链路检查，包括：通过第一发送端向第二接收端发送第一时钟恢复序列；通过辅助链路接收来自第二设备的第一时钟锁定结果，其中，第一时钟锁定结果为时钟锁定成功或时钟锁定失败；在第一时钟锁定结果为时钟锁定成功的情况下，通过第一发送端向第二接收端发送第一均衡序列，第一均衡序列用于第二设备进行均衡计算；通过辅助链路接收来自第二设备的第一均衡计算结果或第一链路检查结果，其中，第一均衡计算结果为均衡计算失败，第一链路检查结果为链路检查成功或链路检查失败。
在本申请实施例中，第一设备通过第一发送端向第二接收端发送第一时钟恢复序列，该第一时钟恢复序列是用于第二设备进行时钟恢复和锁定的，以使得第二设备与第一设备的时钟是同步的；第二设备在完成时钟恢复和锁定后，会通过辅助链路向第一设备发送第一时钟锁定结果，当第二设备时钟锁定成功时，第一时钟锁定结果为时钟锁定成功；当第二设备时钟锁定失败时，第一时钟锁定结果为时钟锁定失败，其中，若第二设备时钟和锁定超，也认为第二设备时钟锁定失败。在第一时钟锁定结果为时钟锁定成功的情况下，第一设备通过第一发送端向第二接收端发送第一均衡序列，第一均衡序列用于第二设备进行均衡计算；当第二设备均衡计算失败时，会通过辅助链路发送第一均衡计算结果，第一均衡计算结果为均衡计算失败。当第二设备均衡计算成功时，进行链路检查，在链路检查完成后，通过辅助链路向第一设备发送第一链路检查结果；当第二设备链路检查失败时，第 一链路检查结果为链路检查失败；当第二设备链路检成功时，第一链路检查结果为链路检查成功。如此，链路训练中，时钟锁定成功，可以使得第一设备与第二设备时钟同步；而均衡计算和链路检查可以使得链路均衡，当该至少一条第一链路的时钟锁定、均衡计算和链路检查均成功时，可以认为该至少一条第一链路的链路训练成功。示例性的，当第二设备均衡计算成功时，第二设备也可以选择通过辅助链路发送第一均衡计算结果，此种情况下，第一均衡计算结果为均衡计算成功。
在一种可能的实现方式中，第一时钟锁定结果包括至少一条第一链路中的每条第一链路的时钟锁定结果，在至少一条第一链路中存在时钟锁定失败的第一链路的情况下，第一时钟锁定结果为时钟锁定失败；否则，第一时钟锁定结果为时钟锁定成功。
在本申请实施例中，第一设备从第二设备处接收到的第一时钟锁定结果包括该至少一条第一链路中的每条第一链路的时钟锁定结果，而该至少一条第一链路的时钟锁定成功要求该至少一条第一链路中的每条第一链路都时钟锁定成功，只要该至少一条第一链路中存在时钟锁定失败的第一链路，该至少一条第一链路就时钟锁定失败；故第二设备将该至少一条第一链路中的每条第一链路的时钟锁定结果通过第一时钟锁定结果发给第一设备，有利于第一设备确定该至少一条第一链路的时钟锁定结果。
在一种可能的实现方式中，第一发送端的参数包括每条第一链路的电压摆幅；该方法还包括：判断至少一条第一链路中时钟锁定失败的第一链路的电压摆幅的配置是否遍历所有的电压摆幅预设值；若否，则将时钟锁定失败的第一链路的电压摆幅的配置从第一数值更新为第二数值，其中，所有的电压摆幅预设值包括第一数值和第二数值，第二数值为时钟锁定失败的第一链路的电压摆幅未配置过的数值；通过辅助链路向第二设备发送时钟锁定失败的第一链路的电压摆幅的配置更新完成的信息；其中，第一训练参数值包括电压摆幅训练值，时钟锁定失败的第一链路的电压摆幅的配置在首次更新时，第一值为电压摆幅训练值。
在本申请实施例中，第一发送端的参数包括每条第一链路的电压摆幅，第一发送端配置的电压摆幅的数值过高或过低，都会使得第二接收端无法时钟锁定成功，也即使得第二设备无法时钟锁定成功；当第二接收端时钟锁定失败时，也即该至少一条第一链路中存在时钟锁定失败的第一链路，第一设备判断时钟锁定失败的第一链路的电压摆幅的配置是否遍历所有的电压摆幅预设值；若否，第一设备则调整时钟锁定失败的第一链路的电压摆幅的配置，例如，将时钟锁定失败的第一链路的电压摆幅的配置更新为其还未配置过的数值，然后第一设备通过辅助链路告知第二设备该时钟锁定失败的第一链路的电压摆幅的配置更新完成；如此，第二设备就可以再次进行时钟恢复和锁定，从而在第二设备无法时钟锁定成功的情况下，通过调整第一链路的电压摆幅来使得第二设备时钟锁定成功。
在一种可能的实现方式中，第一均衡计算结果包括至少一条第一链路中的每条第一链路的均衡计算结果，在至少一条第一链路中存在均衡计算失败的第一链路的情况下，第一均衡计算结果为均衡计算失败。
在本申请实施例中，第一设备从第二设备处接收到的第一均衡计算结果包括该至少一条第一链路中的每条第一链路的均衡计算结果，而该至少一条第一链路的均衡计算成功要求该至少一条第一链路中的每条第一链路都均衡计算成功，只要该至少一条第一链路中存 在均衡计算失败的第一链路，该至少一条第一链路就均衡计算失败；故第二设备将该至少一条第一链路中的每条第一链路的均衡计算结果通过第一均衡计算结果发给第一设备，有利于第一设备确定该至少一条第一链路的均衡计算结果。
在一种可能的实现方式中，第一均衡计算结果还包括至少一条第一链路中的每条第一链路的时钟失锁情况；该方法还包括：判断至少一条第一链路中是否存在时钟失锁的第一链路；若至少一条第一链路中存在时钟失锁的第一链路，则通过辅助链路向第二设备发送第一速率，以及通过第一发送端向第二接收端发送第一时钟恢复序列。
在本申请实施例中，均衡计算失败可能是因为在进行均衡计算时，链路时钟失锁导致的，故在第二设备均衡计算失败时，第一设备从第二设备接收到的第一均衡计算结果还包括该至少一条第一链路中的每条第一链路的时钟失锁情况，如果该至少一条第一链路中存在时钟失锁的第一链路，则说明第二设备均衡计算失败可能是因为有第一链路发生链路失锁导致的；此种情况下，第一设备可以重新通过辅助链路向第二设备发送第一速率，以及通过第一发送端向第二接收端发送第一时钟恢复序列，第二设备重新接收到第一速率、第一时钟恢复序列后，重新进行链路训练，从而有利于使得链路训练成功。
在一种可能的实现方式中，第一发送端的参数包括每条第一链路的发送端前馈均衡(Feed Forward Equalization，FFE)参数；若至少一条第一链路中不存在时钟失锁的第一链路，该方法还包括：判断至少一条第一链路中均衡计算失败的第一链路的发送端前馈均衡参数的配置是否遍历所有的发送端前馈均衡预设值；若否，则将均衡计算失败的第一链路的发送端前馈均衡参数的配置从第三数值更新为第四数值，其中，所有的发送端前馈均衡预设值包括第三数值和第四数值，第四数值为均衡计算失败的第一链路的发送端前馈均衡参数未配置过的数值；通过辅助链路向第二设备发送均衡计算失败的第一链路的发送端前馈均衡参数的配置更新完成的信息；其中，第一训练参数值包括发送端前馈均衡训练值，均衡计算失败的第一链路的发送端前馈均衡参数的配置在首次更新时，第三值为发送端前馈均衡训练值。
在本申请实施例中，第一发送端的参数包括每条第一链路的发送端前馈均衡参数，发送端前馈均衡参数的数值的配置会影响链路均衡，也即影响均衡计算能否成功；当第二接收端均衡计算失败时，也即该至少一条第一链路中存在均衡计算失败的第一链路，第一设备判断均衡计算失败的第一链路的发送端前馈均衡参数的配置是否遍历所有的发送端前馈均衡预设值；若否，第一设备则调整均衡计算失败的第一链路的发送端前馈均衡参数的配置，例如，将均衡计算失败的第一链路的发送端前馈均衡参数的配置更新为其还未配置过的数值，然后第一设备通过辅助链路告知第二设备该均衡计算失败的第一链路的发送端前馈均衡参数的配置更新完成；如此，第二设备就可以再次进行均衡计算，从而在第二设备无法均衡计算成功的情况下，通过调整第一链路的发送端前馈均衡参数来使得第二设备均衡计算成功，有利于实现链路训练的均衡计算成功。
在一种可能的实现方式中，第一链路检查结果包括至少一条第一链路中的每条第一链路的链路检查结果，在至少一条第一链路中存在链路检查失败的第一链路的情况下，第一链路检查结果为链路检查失败；否则，第一链路检查结果为链路检查成功，至少一条第一链路的链路训练成功。
在本申请实施例中，第一设备从第二设备处接收到的第一链路检查结果包括该至少一条第一链路中的每条第一链路的链路检查结果，而该至少一条第一链路的链路检查成功要求该至少一条第一链路中的每条第一链路都链路检查成功，只要该至少一条第一链路中存在链路检查失败的第一链路，该至少一条第一链路就链路检查失败；故第二设备将该至少一条第一链路中的每条第一链路的链路检查结果通过第一链路检查结果发给第一设备，有利于第一设备确定该至少一条第一链路的链路检查结果。
在一种可能的实现方式中，线缆存储有线缆的线缆信息；第一设备存储有第一设备的设备信息；第二设备存储有第二设备的设备信息；该方法还包括：获取第一设备的设备信息，从线缆中获取线缆的线缆信息，以及通过辅助链路从第二设备中获取第二设备的设备信息；根据第一设备的设备信息、线缆的线缆信息和第二设备的设备信息确定第一速率；根据第一速率确定第一训练参数值。
在本申请实施例中，线缆存储有线缆的线缆信息，线缆信息包括线缆能力信息、厂商信息、线缆的识别码、插损信息以及长度信息等信息；第一设备存储有第一设备的设备信息，第二设备存储有第二设备的设备信息，设备信息包括设备能力信息、设备名称、序列号、生产时间以及设备中的端口的端口信息等信息；第一设备获取自己存储的第一设备的设备信息，从线缆中获取线缆的线缆信息，以及通过辅助链路从第二设备中获取第二设备的设备信息；由于线缆信息可以用于表征线缆能力，设备信息可以用于表征设备能力，因此第一设备可以根据第一设备的设备信息、线缆的线缆信息和第二设备的设备信息确定训练速率；然后根据训练速率确定需要在第一发送端配置的第一训练参数值，示例性的，根据第一设备的能力信息、第二设备的能力信息、线缆的能力信息确定第一速率，然后根据第一速率和线缆信息中的插损信息确定第一训练参数值；如此，无需在最低速率、第一发送端的参数配置为初始值的情况下开始训练，而是可以在确定出来的速率下、第一发送端的参数配置为确定出的第一训练参数值下开始训练，有利于实现在较高速率下训练，减少训练时间。
在一种可能的实现方式中，该方法还包括：将以下信息中的至少一项存储：第一速率，线缆的线缆信息，第二设备的设备信息，线缆的正反插状态，或至少一条第一链路的链路训练成功后第一发送端的参数配置的值。
在本申请实施例中，链路训练成功以后，第一设备将训练速率、线缆的线缆信息(包括线缆的识别码)、第二设备的设备信息(包括第二接收端的端口信息)、线缆的正反插状态、第一发送端的参数配置的值(包括该至少一条第一链路中的每条第一链路的电压摆幅的值和发送端前馈均衡参数的值)中的至少一项存储起来；第一设备和第二设备再通该线缆再次训练时，可直接使用这些参数值，减少训练时间，提高训练速率。
第二方面，本申请实施例提供了一种链路训练方法，应用于第二设备，第二设备与第一设备通过线缆连接，第一设备包括第一发送端和第一接收端，第二设备包括第二发送端和第二接收端；线缆包括第一发送端到第二接收端的至少一条第一链路以及第二发送端到第一接收端的至少一条第二链路；该方法包括：进行至少一条第一链路的链路训练；在至少一条第二链路未进行链路训练的情况下，或者在至少一条第二链路的链路训练成功之前， 通过链路训练成功的至少一条第一链路接收来自第一设备的数据。
在一种可能的实现方式中，线缆还包括辅助链路；进行至少一条第一链路的链路训练，包括：通过辅助链路接收来自第一设备的第一速率；在将第二接收端的参数配置为第二训练参数值的情况下，以第一速率进行至少一条第一链路的时钟锁定、均衡计算和链路检查。
在一种可能的实现方式中，进行至少一条第一链路的时钟锁定、均衡计算和链路检查，包括：通过第二接收端接收来自第一发送端的第一时钟恢复序列；根据第一时钟恢复序列进行时钟锁定，并通过辅助链路向第一设备发送第一时钟锁定结果，其中，第一时钟锁定结果为时钟锁定成功或时钟锁定失败；在时钟锁定成功的情况下，通过第二接收端接收来自第一发送端的第一均衡序列；根据第一均衡序列进行均衡计算；在均衡计算失败的情况下，通过辅助链路向第一设备发送第一均衡计算结果，其中，第一均衡计算结果为均衡计算失败；在均衡计算成功的情况下，进行链路检查，并通过辅助链路向第一设备发送第一链路检查结果，其中，第一链路检查结果为链路检查成功或链路检查失败。示例性的，当第二设备均衡计算成功时，第二设备也可以选择通过辅助链路发送第一均衡计算结果，此种情况下，第一均衡计算结果为均衡计算成功。
在一种可能的实现方式中，在至少一条第一链路中存在时钟锁定失败的第一链路的情况下，为时钟锁定失败；否则，为时钟锁定成功。
在一种可能的实现方式中，在至少一条第一链路中存在不满足以下条件中的至少一项的第一链路的情况下：字符定界成功、周期同步成功或误码率小于误码率1，为均衡计算失败；否则，为均衡计算成功。
在一种可能的实现方式中，第二接收端配置的参数包括连续时间线性均衡(Continuous Time Linear Equalization，CTLE)参数；在根据第一均衡序列进行均衡计算之前，该方法还包括：判断至少一条第一链路中是否存在时钟失锁的第一链路；若至少一条第一链路中存在时钟失锁的第一链路，则对时钟失锁的第一链路的连续时间线性均衡参数的配置进行更新，且通过辅助链路向第一设备发送时钟失锁的第一链路时钟失锁的信息。
在本申请实施例中，均衡计算失败可能是因为在进行均衡计算时，链路时钟失锁导致的，故在第二设备在进行均衡计算之前，判断该至少一条第一链路中是否存在时钟失锁的第一链路，如果存在时钟失锁的第一链路，则时钟失锁的第一链路的连续时间线性均衡参数的配置进行更新，然后通过辅助链路告知该时钟失锁的第一链路时钟失锁的信息；此种情况下，第一设备可以重新通过辅助链路向第二设备发送第一速率，以及通过第一发送端向第二接收端发送第一时钟恢复序列，第二设备重新接收到第一速率、第一时钟恢复序列后，重新进行链路训练，从而有利于使得链路训练成功。
在一种可能的实现方式中，在至少一条第一链路中存在不满足以下条件中的至少一项的第一链路的情况下：通道对齐或误码率小于误码率2，为链路检查失败；否则，为链路检查成功，至少一条第一链路的链路训练成功。
在一种可能的实现方式中，线缆存储有线缆的线缆信息；该方法还包括：从线缆中获取线缆的线缆信息；根据线缆的线缆信息和第一速率确定第二训练参数值。示例性的，根据第一速率和线缆信息中的插损信息确定第二训练参数值。
在一种可能的实现方式中，该方法还包括：将以下信息中的至少一项存储：第一速率， 线缆的线缆信息，第一设备的设备信息，线缆的正反插状态，或至少一条第一链路的链路训练成功后第二接收端的参数配置的值；其中，第一设备的设备信息通过辅助链路从第一设备中获取。
在本申请实施例中，链路训练成功以后，第二设备将训练速率、线缆的线缆信息(包括线缆的识别码)、第一设备的设备信息(包括第一发送端的端口信息)、线缆的正反插状态、第二接收端的参数配置的值(包括该至少一条第一链路中的每条第一链路的连续时间线性均衡参数的值和判决反馈均衡(Decision Feedback Equalization，DFE)参数的值)中的至少一项存储起来；第一设备和第二设备再通该线缆再次训练时，可直接使用这些参数值，减少训练时间，提高训练速率。
需要说明的是，第二方面的有益效果可以参照第一方面的描述，此处不再重复描述。
第三方面，本申请实施例提供了一种链路训练方法，应用于第一设备，第一设备与第二设备通过线缆连接，第一设备包括第一发送端，第一设备存储有第一设备的设备信息；第二设备包括第二接收端，第二设备存储有第二设备的设备信息；线缆包括主链路，线缆存储有线缆的线缆信息；该方法包括：获取第一设备的设备信息，从线缆中获取线缆的线缆信息，以及通过辅助链路从第二设备中获取第二设备的设备信息；根据第一设备的设备信息、线缆的线缆信息和第二设备的设备信息确定第一速率，以及从主链路中确定第一发送端到第二接收端的至少一条第一链路；根据第一速率确定第一训练参数值；在将第一发送端的参数配置为第一训练参数值的情况下，以第一速率进行至少一条第一链路的时钟锁定、均衡计算和链路检查。
在本申请实施例中，第一设备存储有第一设备的设备信息，第二设备存储有第二设备的设备信息，线缆存储有线缆的线缆信息，故第一设备可以获取自己存储第一设备的设备信息，从线缆中获取线缆的线缆信息，以及通过辅助链路从第二设备中获取第二设备的设备信息，并根据这三个信息确定链路训练的第一速率，进一步根据第一速率估算或者匹配出一组训练所需的第一训练参数值；第一设备还能从主链路中确定第一发送端到第二接收端的至少一条第一链路，故在将第一发送端的参数配置为第一训练参数值的情况下，以第一速率进行至少一条第一链路的时钟锁定、均衡计算和链路检查，从而实现该至少一条第一链路的链路训练。如此，无需在最低速率、第一发送端的参数配置为初始值的情况下开始训练，而是可以在确定出来的第一速率下、第一发送端的参数配置为确定出的第一训练参数值下开始训练，有利于实现在较高速率下训练，减少训练时间。
在一种可能的实现方式中，线缆还包括辅助链路，该方法还包括：通过辅助链路向第二设备发送第一速率，其中，第一速率为至少一条第一链路的链路训练速率。
在一种可能的实现方式中，线缆还包括辅助链路，进行至少一条第一链路的时钟锁定、均衡计算和链路检查，包括：通过第一发送端向第二接收端发送第一时钟恢复序列；通过辅助链路接收来自第二设备的第一时钟锁定结果，其中，第一时钟锁定结果为时钟锁定成功或时钟锁定失败；在第一时钟锁定结果为时钟锁定成功的情况下，通过第一发送端向第二接收端发送第一均衡序列，第一均衡序列用于第二设备进行均衡计算；通过辅助链路接收来自第二设备的第一均衡计算结果或第一链路检查结果，其中，第一均衡计算结果为均 衡计算失败，第一链路检查结果为链路检查成功或链路检查失败。
在一种可能的实现方式中，第一时钟锁定结果包括至少一条第一链路中的每条第一链路的时钟锁定结果，在至少一条第一链路中存在时钟锁定失败的第一链路的情况下，第一时钟锁定结果为时钟锁定失败；否则，第一时钟锁定结果为时钟锁定成功。
在一种可能的实现方式中，第一发送端的参数包括每条第一链路的电压摆幅；方法还包括：判断至少一条第一链路中时钟锁定失败的第一链路的电压摆幅的配置是否遍历所有的电压摆幅预设值；若否，则将时钟锁定失败的第一链路的电压摆幅的配置从第一数值更新为第二数值，其中，所有的电压摆幅预设值包括第一数值和第二数值，第二数值为时钟锁定失败的第一链路的电压摆幅未配置过的数值；通过辅助链路向第二设备发送时钟锁定失败的第一链路的电压摆幅的配置更新完成的信息；其中，第一训练参数值包括电压摆幅训练值，时钟锁定失败的第一链路的电压摆幅的配置在首次更新时，第一值为电压摆幅训练值。
在一种可能的实现方式中，第一均衡计算结果包括至少一条第一链路中的每条第一链路的均衡计算结果，在至少一条第一链路中存在均衡计算失败的第一链路的情况下，第一均衡计算结果为均衡计算失败。
在一种可能的实现方式中，第一均衡计算结果还包括至少一条第一链路中的每条第一链路的时钟失锁情况；方法还包括：判断至少一条第一链路中是否存在时钟失锁的第一链路；若至少一条第一链路中存在时钟失锁的第一链路，则通过辅助链路向第二设备发送第一速率，以及通过第一发送端向第二接收端发送第一时钟恢复序列。
在一种可能的实现方式中，第一发送端的参数包括每条第一链路的发送端前馈均衡参数；若至少一条第一链路中不存在时钟失锁的第一链路，方法还包括：判断至少一条第一链路中均衡计算失败的第一链路的发送端前馈均衡参数的配置是否遍历所有的发送端前馈均衡预设值；若否，则将均衡计算失败的第一链路的发送端前馈均衡参数的配置从第三数值更新为第四数值，其中，所有的发送端前馈均衡预设值包括第三数值和第四数值，第四数值为均衡计算失败的第一链路的发送端前馈均衡参数未配置过的数值；通过辅助链路向第二设备发送均衡计算失败的第一链路的发送端前馈均衡参数的配置更新完成的信息；其中，第一训练参数值包括发送端前馈均衡训练值，均衡计算失败的第一链路的发送端前馈均衡参数的配置在首次更新时，第三值为发送端前馈均衡训练值。
在一种可能的实现方式中，第一链路检查结果包括至少一条第一链路中的每条第一链路的链路检查结果，在至少一条第一链路中存在链路检查失败的第一链路的情况下，第一链路检查结果为链路检查失败；否则，第一链路检查结果为链路检查成功，至少一条第一链路的链路训练成功。
在一种可能的实现方式中，方法还包括：将以下信息中的至少一项存储：第一速率，线缆的线缆信息，第二设备的设备信息，线缆的正反插状态，或至少一条第一链路的链路训练成功后第一发送端的参数配置的值。
需要说明的是，第三方面的有益效果可以参照第一方面的描述，此处不再重复描述。
第四方面，本申请实施例提供了一种链路训练方法，应用于第二设备，第二设备与第 一设备通过线缆连接，第一设备包括第一发送端，第二设备包括第二接收端；线缆包括主链路以及辅助链路，线缆存储有线缆的线缆信息；该方法包括：从线缆中获取线缆的线缆信息；通过辅助链路接收来自第一设备的第一速率；根据线缆的线缆信息和第一速率确定第二训练参数值；在将第二接收端的参数配置为第二训练参数值的情况下，以第一速率进行至少一条第一链路的时钟锁定、均衡计算和链路检查，其中，至少一条第一链路为第一发送端到第二接收端的链路，至少一条第一链路由第一设备从主链路中确定。
在一种可能的实现方式中，进行至少一条第一链路的时钟锁定、均衡计算和链路检查，包括：通过第二接收端接收来自第一发送端的第一时钟恢复序列；根据第一时钟恢复序列进行时钟锁定，并通过辅助链路向第一设备发送第一时钟锁定结果，其中，第一时钟锁定结果为时钟锁定成功或时钟锁定失败；在时钟锁定成功的情况下，通过第二接收端接收来自第一发送端的第一均衡序列；根据第一均衡序列进行均衡计算；在均衡计算失败的情况下，通过辅助链路向第一设备发送第一均衡计算结果，其中，第一均衡计算结果为均衡计算失败；在均衡计算成功的情况下，进行链路检查，并通过辅助链路向第一设备发送第一链路检查结果，其中，第一链路检查结果为链路检查成功或链路检查失败。
在一种可能的实现方式中，在至少一条第一链路中存在时钟锁定失败的第一链路的情况下，为时钟锁定失败；否则，为时钟锁定成功。
在一种可能的实现方式中，在至少一条第一链路中存在不满足以下条件中的至少一项的第一链路的情况下：字符定界成功、周期同步成功或误码率小于误码率1，为均衡计算失败；否则，为均衡计算成功。
在一种可能的实现方式中，第二接收端配置的参数包括连续时间线性均衡参数；在根据第一均衡序列进行均衡计算之前，方法还包括：判断至少一条第一链路中是否存在时钟失锁的第一链路；若至少一条第一链路中存在时钟失锁的第一链路，则对时钟失锁的第一链路的连续时间线性均衡参数的配置进行更新，且通过辅助链路向第一设备发送时钟失锁的第一链路时钟失锁的信息。
在本申请实施例中，均衡计算失败可能是因为在进行均衡计算时，链路时钟失锁导致的，故在第二设备在进行均衡计算之前，判断该至少一条第一链路中是否存在时钟失锁的第一链路，如果存在时钟失锁的第一链路，则时钟失锁的第一链路的连续时间线性均衡参数的配置进行更新，然后通过辅助链路告知该时钟失锁的第一链路时钟失锁的信息；此种情况下，第一设备可以重新通过辅助链路向第二设备发送第一速率，以及通过第一发送端向第二接收端发送第一时钟恢复序列，第二设备重新接收到第一速率、第一时钟恢复序列后，重新进行链路训练，从而有利于使得链路训练成功。
在一种可能的实现方式中，在至少一条第一链路中存在不满足以下条件中的至少一项的第一链路的情况下：通道对齐或误码率小于误码率2，为链路检查失败；否则，为链路检查成功，至少一条第一链路的链路训练成功。
在一种可能的实现方式中，方法还包括：将以下信息中的至少一项存储：第一速率，线缆的线缆信息，第一设备的设备信息，线缆的正反插状态，或至少一条第一链路的链路训练成功后第二接收端的参数配置的值；其中，第一设备的设备信息通过辅助链路从第一设备中获取。
在本申请实施例中，链路训练成功以后，第二设备将训练速率、线缆的线缆信息(包括线缆的识别码)、第一设备的设备信息(包括第一发送端的端口信息)、线缆的正反插状态、第二接收端的参数配置的值(包括该至少一条第一链路中的每条第一链路的连续时间线性均衡参数的值和判决反馈均衡参数的值)中的至少一项存储起来；第一设备和第二设备再通该线缆再次训练时，可直接使用这些参数值，减少训练时间，提高训练速率。
需要说明的是，第四方面的有益效果可以参照第一方面或第三方面的描述，此处不再重复描述。
第五方面，本申请实施例提供了一种链路训练装置，应用于第一设备，第一设备与第二设备通过线缆连接，线缆包括至少一条第一链路和至少一条第二链路，链路训练装置包括：训练单元，用于进行至少一条第一链路的链路训练，至少一条第一链路为由第一设备到第二设备的链路；发送单元，用于在至少一条第二链路未进行链路训练的情况下，或者在至少一条第二链路的链路训练成功之前，通过链路训练成功的至少一条第一链路向第二设备发送数据，至少一条第二链路为由第二设备到第一设备的链路。
在一种可能的实现方式中，第一设备包括第一发送端，第二设备包括第二接收端，至少一条第一链路为由第一发送端到第二接收端的链路；线缆还包括辅助链路；在进行至少一条第一链路的链路训练方面，训练单元具体用于：通过辅助链路向第二设备发送第一速率，其中，第一速率为至少一条第一链路的链路训练速率；在将第一发送端的参数配置为第一训练参数值的情况下，以第一速率进行至少一条第一链路的时钟锁定、均衡计算和链路检查。
在一种可能的实现方式中，在进行至少一条第一链路的时钟锁定、均衡计算和链路检查方面，训练单元具体用于：通过第一发送端向第二接收端发送第一时钟恢复序列；通过辅助链路接收来自第二设备的第一时钟锁定结果，其中，第一时钟锁定结果为时钟锁定成功或时钟锁定失败；在第一时钟锁定结果为时钟锁定成功的情况下，通过第一发送端向第二接收端发送第一均衡序列，第一均衡序列用于第二设备进行均衡计算；通过辅助链路接收来自第二设备的第一均衡计算结果或第一链路检查结果，其中，第一均衡计算结果为均衡计算失败，第一链路检查结果为链路检查成功或链路检查失败。
在一种可能的实现方式中，第一时钟锁定结果包括至少一条第一链路中的每条第一链路的时钟锁定结果，在至少一条第一链路中存在时钟锁定失败的第一链路的情况下，第一时钟锁定结果为时钟锁定失败；否则，第一时钟锁定结果为时钟锁定成功。
在一种可能的实现方式中，第一发送端的参数包括每条第一链路的电压摆幅；训练单元还用于：判断至少一条第一链路中时钟锁定失败的第一链路的电压摆幅的配置是否遍历所有的电压摆幅预设值；若否，则将时钟锁定失败的第一链路的电压摆幅的配置从第一数值更新为第二数值，其中，所有的电压摆幅预设值包括第一数值和第二数值，第二数值为时钟锁定失败的第一链路的电压摆幅未配置过的数值；通过辅助链路向第二设备发送时钟锁定失败的第一链路的电压摆幅的配置更新完成的信息；其中，第一训练参数值包括电压摆幅训练值，时钟锁定失败的第一链路的电压摆幅的配置在首次更新时，第一值为电压摆幅训练值。
在一种可能的实现方式中，第一均衡计算结果包括至少一条第一链路中的每条第一链路的均衡计算结果，在至少一条第一链路中存在均衡计算失败的第一链路的情况下，第一均衡计算结果为均衡计算失败。
在一种可能的实现方式中，第一均衡计算结果还包括至少一条第一链路中的每条第一链路的时钟失锁情况；训练单元还用于：判断至少一条第一链路中是否存在时钟失锁的第一链路；若至少一条第一链路中存在时钟失锁的第一链路，则通过辅助链路向第二设备发送第一速率，以及通过第一发送端向第二接收端发送第一时钟恢复序列。
在一种可能的实现方式中，第一发送端的参数包括每条第一链路的发送端前馈均衡参数；若至少一条第一链路中不存在时钟失锁的第一链路，训练单元还用于：判断至少一条第一链路中均衡计算失败的第一链路的发送端前馈均衡参数的配置是否遍历所有的发送端前馈均衡预设值；若否，则将均衡计算失败的第一链路的发送端前馈均衡参数的配置从第三数值更新为第四数值，其中，所有的发送端前馈均衡预设值包括第三数值和第四数值，第四数值为均衡计算失败的第一链路的发送端前馈均衡参数未配置过的数值；通过辅助链路向第二设备发送均衡计算失败的第一链路的发送端前馈均衡参数的配置更新完成的信息；其中，第一训练参数值包括发送端前馈均衡训练值，均衡计算失败的第一链路的发送端前馈均衡参数的配置在首次更新时，第三值为发送端前馈均衡训练值。
在一种可能的实现方式中，第一链路检查结果包括至少一条第一链路中的每条第一链路的链路检查结果，在至少一条第一链路中存在链路检查失败的第一链路的情况下，第一链路检查结果为链路检查失败；否则，第一链路检查结果为链路检查成功，至少一条第一链路的链路训练成功。
在一种可能的实现方式中，线缆存储有线缆的线缆信息；第一设备存储有第一设备的设备信息；第二设备存储有第二设备的设备信息；训练单元还用于：获取第一设备的设备信息，从线缆中获取线缆的线缆信息，以及通过辅助链路从第二设备中获取第二设备的设备信息；根据第一设备的设备信息、线缆的线缆信息和第二设备的设备信息确定第一速率；根据第一速率确定第一训练参数值。
在一种可能的实现方式中，训练单元还用于：将以下信息中的至少一项存储：第一速率，线缆的线缆信息，第二设备的设备信息，线缆的正反插状态，或至少一条第一链路的链路训练成功后第一发送端的参数配置的值。
需要说明的是，第五方面的有益效果可以参照第一方面的描述，此处不再重复描述。
第六方面，本申请实施例提供了一种链路训练装置，应用于第二设备，第二设备与第一设备通过线缆连接，线缆包括至少一条第一链路和至少一条第二链路，链路训练装置包括：训练单元，用于进行至少一条第一链路的链路训练，至少一条第一链路为由第一设备到第二设备的链路；接收单元，用于在至少一条第二链路未进行链路训练的情况下，或者在至少一条第二链路的链路训练成功之前，通过链路训练成功的至少一条第一链路接收来自第一设备的数据，至少一条第二链路为由第二设备到第一设备的链路。
在一种可能的实现方式中，第一设备包括第一发送端，第二设备包括第二接收端，至少一条第一链路为由第一发送端到第二接收端的链路；线缆还包括辅助链路；在进行至少 一条第一链路的链路训练方面，训练单元具体用于：通过辅助链路接收来自第一设备的第一速率；在将第二接收端的参数配置为第二训练参数值的情况下，以第一速率进行至少一条第一链路的时钟锁定、均衡计算和链路检查。
在一种可能的实现方式中，在进行至少一条第一链路的时钟锁定、均衡计算和链路检查方面，训练单元具体用于：通过第二接收端接收来自第一发送端的第一时钟恢复序列；根据第一时钟恢复序列进行时钟锁定，并通过辅助链路向第一设备发送第一时钟锁定结果，其中，第一时钟锁定结果为时钟锁定成功或时钟锁定失败；在时钟锁定成功的情况下，通过第二接收端接收来自第一发送端的第一均衡序列；根据第一均衡序列进行均衡计算；在均衡计算失败的情况下，通过辅助链路向第一设备发送第一均衡计算结果，其中，第一均衡计算结果为均衡计算失败；在均衡计算成功的情况下，进行链路检查，并通过辅助链路向第一设备发送第一链路检查结果，其中，第一链路检查结果为链路检查成功或链路检查失败。
在一种可能的实现方式中，在至少一条第一链路中存在时钟锁定失败的第一链路的情况下，为时钟锁定失败；否则，为时钟锁定成功。
在一种可能的实现方式中，在至少一条第一链路中存在不满足以下条件中的至少一项的第一链路的情况下：字符定界成功、周期同步成功或误码率小于误码率1，为均衡计算失败；否则，为均衡计算成功。
在一种可能的实现方式中，第二接收端配置的参数包括连续时间线性均衡参数；训练单元还用于：在根据第一均衡序列进行均衡计算之前，判断至少一条第一链路中是否存在时钟失锁的第一链路；若至少一条第一链路中存在时钟失锁的第一链路，则对时钟失锁的第一链路的连续时间线性均衡参数的配置进行更新，且通过辅助链路向第一设备发送时钟失锁的第一链路时钟失锁的信息。
在一种可能的实现方式中，在至少一条第一链路中存在不满足以下条件中的至少一项的第一链路的情况下：通道对齐或误码率小于误码率2，为链路检查失败；否则，为链路检查成功，至少一条第一链路的链路训练成功。
在一种可能的实现方式中，线缆存储有线缆的线缆信息；训练单元还用于：从线缆中获取线缆的线缆信息；根据线缆的线缆信息和第一速率确定第二训练参数值。
在一种可能的实现方式中，训练单元还用于：将以下信息中的至少一项存储：第一速率，线缆的线缆信息，第一设备的设备信息，线缆的正反插状态，或至少一条第一链路的链路训练成功后第二接收端的参数配置的值；其中，第一设备的设备信息通过辅助链路从第一设备中获取。
需要说明的是，第六方面的有益效果可以参照第一方面的描述，此处不再重复描述。
第七方面，本申请实施例提供了一种链路训练装置，该链路训练装置包括处理器、以及耦合于处理器的第一发送端和第一接收端，链路训练装置与第二设备通过线缆连接；第二设备包括第二发送端和第二接收端；线缆包括第一发送端到第二接收端的至少一条第一链路以及第二发送端到第一接收端的至少一条第二链路；处理器用于：进行至少一条第一链路的链路训练；在至少一条第二链路未进行链路训练的情况下，或者在至少一条第二链 路的链路训练成功之前，通过链路训练成功的至少一条第一链路向第二设备发送数据。
在一种可能的实现方式中，线缆还包括辅助链路；在进行至少一条第一链路的链路训练方面，处理器具体用于：通过辅助链路向第二设备发送第一速率，其中，第一速率为至少一条第一链路的链路训练速率；在将第一发送端的参数配置为第一训练参数值的情况下，以第一速率进行至少一条第一链路的时钟锁定、均衡计算和链路检查。
在一种可能的实现方式中，在进行至少一条第一链路的时钟锁定、均衡计算和链路检查方面，处理器具体用于：通过第一发送端向第二接收端发送第一时钟恢复序列；通过辅助链路接收来自第二设备的第一时钟锁定结果，其中，第一时钟锁定结果为时钟锁定成功或时钟锁定失败；在第一时钟锁定结果为时钟锁定成功的情况下，通过第一发送端向第二接收端发送第一均衡序列，第一均衡序列用于第二设备进行均衡计算；通过辅助链路接收来自第二设备的第一均衡计算结果或第一链路检查结果，其中，第一均衡计算结果为均衡计算失败，第一链路检查结果为链路检查成功或链路检查失败。
在一种可能的实现方式中，第一时钟锁定结果包括至少一条第一链路中的每条第一链路的时钟锁定结果，在至少一条第一链路中存在时钟锁定失败的第一链路的情况下，第一时钟锁定结果为时钟锁定失败；否则，第一时钟锁定结果为时钟锁定成功。
在一种可能的实现方式中，第一发送端的参数包括每条第一链路的电压摆幅；处理器还用于：判断至少一条第一链路中时钟锁定失败的第一链路的电压摆幅的配置是否遍历所有的电压摆幅预设值；若否，则将时钟锁定失败的第一链路的电压摆幅的配置从第一数值更新为第二数值，其中，所有的电压摆幅预设值包括第一数值和第二数值，第二数值为时钟锁定失败的第一链路的电压摆幅未配置过的数值；通过辅助链路向第二设备发送时钟锁定失败的第一链路的电压摆幅的配置更新完成的信息；其中，第一训练参数值包括电压摆幅训练值，时钟锁定失败的第一链路的电压摆幅的配置在首次更新时，第一值为电压摆幅训练值。
在一种可能的实现方式中，第一均衡计算结果包括至少一条第一链路中的每条第一链路的均衡计算结果，在至少一条第一链路中存在均衡计算失败的第一链路的情况下，第一均衡计算结果为均衡计算失败。
在一种可能的实现方式中，第一均衡计算结果还包括至少一条第一链路中的每条第一链路的时钟失锁情况；处理器还用于：判断至少一条第一链路中是否存在时钟失锁的第一链路；若至少一条第一链路中存在时钟失锁的第一链路，则通过辅助链路向第二设备发送第一速率，以及通过第一发送端向第二接收端发送第一时钟恢复序列。
在一种可能的实现方式中，第一发送端的参数包括每条第一链路的发送端前馈均衡参数；若至少一条第一链路中不存在时钟失锁的第一链路，处理器还用于：判断至少一条第一链路中均衡计算失败的第一链路的发送端前馈均衡参数的配置是否遍历所有的发送端前馈均衡预设值；若否，则将均衡计算失败的第一链路的发送端前馈均衡参数的配置从第三数值更新为第四数值，其中，所有的发送端前馈均衡预设值包括第三数值和第四数值，第四数值为均衡计算失败的第一链路的发送端前馈均衡参数未配置过的数值；通过辅助链路向第二设备发送均衡计算失败的第一链路的发送端前馈均衡参数的配置更新完成的信息；其中，第一训练参数值包括发送端前馈均衡训练值，均衡计算失败的第一链路的发送端前 馈均衡参数的配置在首次更新时，第三值为发送端前馈均衡训练值。
在一种可能的实现方式中，第一链路检查结果包括至少一条第一链路中的每条第一链路的链路检查结果，在至少一条第一链路中存在链路检查失败的第一链路的情况下，第一链路检查结果为链路检查失败；否则，第一链路检查结果为链路检查成功，至少一条第一链路的链路训练成功。
在一种可能的实现方式中，线缆存储有线缆的线缆信息；第一设备存储有第一设备的设备信息；第二设备存储有第二设备的设备信息；处理器还用于：获取第一设备的设备信息，从线缆中获取线缆的线缆信息，以及通过辅助链路从第二设备中获取第二设备的设备信息；根据第一设备的设备信息、线缆的线缆信息和第二设备的设备信息确定第一速率；根据第一速率确定第一训练参数值。
在一种可能的实现方式中，处理器还用于：将以下信息中的至少一项存储：第一速率，线缆的线缆信息，第二设备的设备信息，线缆的正反插状态，或至少一条第一链路的链路训练成功后第一发送端的参数配置的值。
需要说明的是，第五方面的有益效果可以参照第一方面的描述，此处不再重复描述。
第八方面，本申请实施例提供了一种链路训练装置，该链路训练装置包括处理器、以及耦合于处理器的第二发送端和第二接收端，链路训练装置与第一设备通过线缆连接；第一设备包括第一发送端和第一接收端；线缆包括第一发送端到第二接收端的至少一条第一链路以及第二发送端到第一接收端的至少一条第二链路；处理器用于：进行至少一条第一链路的链路训练；在至少一条第二链路未进行链路训练的情况下，或者在至少一条第二链路的链路训练成功之前，通过链路训练成功的至少一条第一链路接收来自第一设备的数据。
在一种可能的实现方式中，线缆还包括辅助链路；在进行至少一条第一链路的链路训练方面，处理器具体用于：通过辅助链路接收来自第一设备的第一速率；在将第二接收端的参数配置为第二训练参数值的情况下，以第一速率进行至少一条第一链路的时钟锁定、均衡计算和链路检查。
在一种可能的实现方式中，在进行至少一条第一链路的时钟锁定、均衡计算和链路检查方面，处理器具体用于：通过第二接收端接收来自第一发送端的第一时钟恢复序列；根据第一时钟恢复序列进行时钟锁定，并通过辅助链路向第一设备发送第一时钟锁定结果，其中，第一时钟锁定结果为时钟锁定成功或时钟锁定失败；在时钟锁定成功的情况下，通过第二接收端接收来自第一发送端的第一均衡序列；根据第一均衡序列进行均衡计算；在均衡计算失败的情况下，通过辅助链路向第一设备发送第一均衡计算结果，其中，第一均衡计算结果为均衡计算失败；在均衡计算成功的情况下，进行链路检查，并通过辅助链路向第一设备发送第一链路检查结果，其中，第一链路检查结果为链路检查成功或链路检查失败。
在一种可能的实现方式中，在至少一条第一链路中存在时钟锁定失败的第一链路的情况下，为时钟锁定失败；否则，为时钟锁定成功。
在一种可能的实现方式中，在至少一条第一链路中存在不满足以下条件中的至少一项的第一链路的情况下：字符定界成功、周期同步成功或误码率小于误码率1，为均衡计算 失败；否则，为均衡计算成功。
在一种可能的实现方式中，第二接收端配置的参数包括连续时间线性均衡参数；处理器还用于：在根据第一均衡序列进行均衡计算之前，判断至少一条第一链路中是否存在时钟失锁的第一链路；若至少一条第一链路中存在时钟失锁的第一链路，则对时钟失锁的第一链路的连续时间线性均衡参数的配置进行更新，且通过辅助链路向第一设备发送时钟失锁的第一链路时钟失锁的信息。
在一种可能的实现方式中，在至少一条第一链路中存在不满足以下条件中的至少一项的第一链路的情况下：通道对齐或误码率小于误码率2，为链路检查失败；否则，为链路检查成功，至少一条第一链路的链路训练成功。
在一种可能的实现方式中，线缆存储有线缆的线缆信息；处理器还用于：从线缆中获取线缆的线缆信息；根据线缆的线缆信息和第一速率确定第二训练参数值。
在一种可能的实现方式中，处理器还用于：将以下信息中的至少一项存储：第一速率，线缆的线缆信息，第一设备的设备信息，线缆的正反插状态，或至少一条第一链路的链路训练成功后第二接收端的参数配置的值；其中，第一设备的设备信息通过辅助链路从第一设备中获取。
需要说明的是，第六方面的有益效果可以参照第一方面的描述，此处不再重复描述。
第九方面，本申请实施例提供了一种第一设备，包括处理器、存储器、通信接口，以及一个或多个程序，上述一个或多个程序被存储在上述存储器中，并且被配置由上述处理器执行，上述程序包括用于执行如上述第一方面或第三方面中任一项所述的方法中的步骤的指令。
第十方面，本申请实施例提供了一种第二设备，包括处理器、存储器、通信接口，以及一个或多个程序，上述一个或多个程序被存储在上述存储器中，并且被配置由上述处理器执行，上述程序包括用于执行如上述第二方面或第四方面中任一项所述的方法中的步骤的指令。
第十一方面，本申请实施例提供了一种链路训练装置，包括处理器和传输接口，所述处理器被配置为调用存储在存储器中的程序，以使得所述链路训练装置实现如上述第一方面至第四方面中任一项所述的方法。
第十二方面，本申请实施例提供了一种计算机可读存储介质，所述计算机可读存储介质包括计算机程序，当所述计算机程序在计算机或处理器上运行时，使得所述计算机或所述处理器进行如上述第一方面至第四方面中任一项所述的方法。
第十三方面，本申请实施例提供了一种计算机程序产品，所述计算机程序产品包括计算机程序，当所述计算机程序在计算机或处理器上运行时，使得所述计算机或所述处理器进行如上述第一方面至第四方面中任一项所述的方法。
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图1是本申请实施例提供的高清多媒体接口链路训练的状态示意图。
图2是本申请实施例提供的显示接口链路训练时时钟恢复阶段的流程示意图。
图3是本申请实施例提供的显示接口链路训练时均衡阶段的流程示意图。
图4是本申请实施例提供的通用串行总线链路训练的状态示意图。
图5是本申请实施例提供的通用串行总线链路训练的流程示意图。
图6是本申请实施例提供的一种链路训练状态(Link Training States，LTS)迁移图。
图7是本申请实施例提供的一种发送端设备链路训练的流程示意图。
图8是本申请实施例提供的一种接收端设备链路训练的流程示意图。
图9是本申请实施例提供的一种通信系统的架构示意图。
图10是本申请实施例提供的一种接口之间的内部连接示意图。
图11是本申请实施例提供的一种链路训练方法的流程示意图。
图12是本申请实施例提供的一种链路训练装置的结构示意图。
图13是本申请实施例提供的另一种链路训练装置的结构示意图。
图14是本申请实施例提供的一种电子设备的结构示意图。
图15是本申请实施例提供的另一种电子设备的结构示意图。
具体实施方式
为了使本技术领域的人员更好地理解本申请方案，下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
本申请的说明书和权利要求书及上述附图中的术语“包括”和“具有”以及它们任何变形，意图在于覆盖不排他的包含。例如包含了一系列步骤或单元的过程、方法、系统、产品或设备没有限定于已列出的步骤或单元，而是可选地还包括没有列出的步骤或单元，或可选地还包括对于这些过程、方法、产品或设备固有的其他步骤或单元。
应当理解，在本申请中，“至少一个(项)”是指一个或者多个，“多个”是指两个或两个以上。“和/或”，用于描述关联对象的关联关系，表示可以存在三种关系，例如，“A和/或B”可以表示：只存在A，只存在B以及同时存在A和B三种情况，其中A，B可以是单数或者复数。字符“/”一般表示前后关联对象是一种“或”的关系。“以下至少一项(个)”或其类似表达，是指这些项中的任意组合，包括单项(个)或复数项(个)的任意组合。例如，a，b或c中的至少一项(个)，可以表示：a，b，c，“a和b”，“a和c”，“b和c”，或“a和b和c”，其中a，b，c可以是单个，也可以是多个。
在本说明书中提及“实施例”意味着，结合实施例描述的特定特征、结构或特性可以包含在本申请的至少一个实施例中。在说明书中的各个位置出现该短语并不一定均是指相同的实施例，也不是与其它实施例互斥的独立的或备选的实施例。本领域技术人员显式地和 隐式地理解的是，本说明书所描述的实施例可以与其它实施例相结合。
首先，提供本申请可能涉及的缩略语和术语定义、名词解释，以便于本领域技术人员理解。
(1)线缆信息(CableInfo)：包括线缆能力信息、厂商信息、线缆的识别码、插损信息以及长度等信息；线缆信息可以用于表征线缆的能力。
(2)插损信息：线缆在所支持的各速率下的插入损耗。
(3)设备信息：包括设备能力信息、设备名称、序列号、生产时间等能识别特定设备的信息，以及设备中的端口的端口信息；设备信息可以用于表征设备的能力。
(4)端口信息：包括端口编号等能够识别设备的特定端口的信息；端口信息可以用于表征端口的能力。
其次，为了便于理解本申请实施例，进一步分析并提出本申请所具体要解决的技术问题。目前，关于链路训练的场景有多种，在此示例性的列举以下三种。
场景一：HDMI2.1
请参阅图1，HDMI2.1的训练共包括6个状态：LTS:1、LTS:2、LTS:3、LTS:4、LTS:P、LTS:L。其中，最核心的状态为LTS:3，在LTS:3状态中，接入源设备(Source，也称源)和接入端设备(Sink，也称宿)来回交互，根据彼此的状态调整自身参数，以达到均衡匹配。
HDMI2.1场景下的链路训练存在以下缺点：
1、仅支持单向训练。
2、单个速率训练最长需要200ms，训练耗时较长。每次训练前，发送端和接收端的与训练相关的参数均被复位为默认值，在设备、线材不改变的情况下(如拔插、待机唤醒等)，再次训练仍需要相同的时间，无法参考前一次训练的参数来加速训练。
3、训练过程中，例如，在LTS:3状态、LTS:P状态时，只能由发送端主动向接收端查询均衡状态，查询间隔时间不能超过2ms，对软件要求高，开销大。
4、在LTS:3状态，接收端请求发送端调整发送端前馈均衡(TxFFE)的条件不明确，可能在均衡粗调阶段，也可能在均衡细调阶段，导致整个训练流程被拉长。
场景二：DP1.4
显示接口(Display Port，DP)的训练主要包含两个阶段：时钟恢复(Clock Recovery，CR)和均衡(Equalization，EQ)。
请参阅图2，时钟恢复阶段：显示接口发送端(DP Tx)选择最大的链路数和速率开始训练，复位所有参数并发送TPS1。显示接口接收端(DP Rx)开始时钟恢复。若接收端时钟恢复阶段失败，发送端可调整电压摆幅(Voltage Swing，也简称Swing)和预加重(Pre-emphasis)。当所有电压摆幅和预加重调整完，接收端均无法恢复时钟时，DP Tx向下降速。若速率降到最低还无法恢复时钟，则向下降链路(4链路→2链路→1链路)。
请参阅图3，均衡阶段：DP Rx检查所有链路的LANEx_CR_Done(Lane x时钟恢复完成)、LANEx_CHANNEL_EQ_DONE(Lane x均衡计算完成)、LANEx_SYMBOL_LOCKED(Lane x符号锁定)及INTERLANE_ALIGN_DONE(Lane间对齐完成)。当四个条件均 满足时，训练成功。若CR失败，则降链路并重新进入到CR阶段。若其他三个条件失败，则请求DP Tx调整Voltage Swing和Pre-emphasis并循环检测(最多5次)。循环检测不成功，则依次向下降速并重新进入CR阶段。
DP1.4场景下的链路训练存在以下缺点：
1、仅支持单向训练。
2、训练过程需要发送端不断查询接收端的状态信息，软件开销较大。
3、每次训练前，发送端和接收端的与训练相关的参数均被复位为默认值，在设备、线材不改变的情况下(如拔插、待机唤醒等)，再次训练仍需要相同的时间，无法参考前一次训练的参数来加速训练。
场景三：USB4.0
USB4.0可支持双向传输和训练，其训练包含CLd和训练(Training)两个状态。
请参阅图4，CLd状态：主要功能是利用辅助链路，对每个链路分别进行初始化。发送端和接收端相互协商一组最优的TxFFE参数，完成均衡粗调；其中包括5个子状态；CLd仅表示一个状态，这个状态下链路适配器的发射器和接收器均处于非活跃(active)状态。
请参阅图5，Training状态：主要功能是通过链路的两端传输链路的参数(包括USB主机及存储设备间训练时各自使用的链路编号、发送的训练序列编号等)，符号同步(也即找到序列的边界)；其中包括4个子状态。USB协议支持双向训练，但双向训练的时候是一对链路(两个方向)同时配合训练，两个方向训练的流程是耦合在一起的，双向训练速率和链路的数量必须完全一致。
USB4.0场景下的链路训练存在以下缺点：
1、训练时下行和上行方向的两条链路组成的一对同时训练，双向均成功，才认为该对链路训练成功，若某一方向训练不成功，总的训练时间会被拉长，甚至业务不可传输。
2、在x2模式下，会有两对链路同时工作，两对链路独立训练，须两对链路均训练成功后，才能工作在x2模式下。
3、训练时下行速率和上行速率必须完全一致，两对链路速率和模式也必须完全一致。约束较强，不够灵活；其中，USB的链路可工作在Gen 1/Gen 2/Gen 3几种模式下，不同模式下传输的方式有区别。
4、每次训练前，发送端和接收端的与训练相关的参数均被复位为默认值，在设备、线材不改变的情况下(如拔插、待机唤醒等)，再次训练仍需要相同的时间，无法参考前一次训练的参数来加速训练。
5、业务传输须双向训练成功之后。对于音视频业务场景，点亮时间更晚。
因此，本申请所要解决的技术问题可以包括如下：
1、解决双向训练流程耦合、速率和链路数强绑定问题，使应用更加灵活。
2、解决硬件环境不改变的情况下，再次训练速率慢，时间长的问题。
3、解决双向训练时业务传输较晚问题。
4、解决训练信息交互对软件要求高，开销大的问题。
下面通过具体实施方式对本申请提供的技术方案进行详细的介绍。
请参阅图6，图6是本申请实施例提供的一种链路训练状态转移图。该链路训练状态包括但不限于以下状态：
S0：空闲状态。
空闲状态表示链路为空闲状态，链路处于非传输状态，即不传输任何数据。此状态下，检查链路是否插入且准备好，也即检查需要通过线缆两端连接的设备是否均插入且已准备好进行链路训练；具体地，检测链路的发送端所在的设备(简称发送端设备)和链路的接收端所在的设备(简称接收端设备)是否插入且已准备进行链路训练。其中，如果设备均插入且已准备好进行链路训练，则进入能力交互状态S1。
S1：能力交互。
线缆两端连接的设备之间、线缆两端连接的设备与线缆之间进行能力交互，需要交互的能力包括线缆的能力、设备的能力，设备的能力包括设备的链路能力和其他业务能力，链路能力包括支持的链路数、下行方向和上行方向支持的最大传输速率等；其中，线缆两端连接的设备通过线缆中的辅助链路进行能力交互。具体地，发送端设备从线缆中获取线缆的线缆信息(包括线缆能力信息、厂商信息、线缆的识别码、插损信息以及长度等信息)，以及通过辅助链路从接收端设备中获取接收端设备的设备信息(包括接收端的端口信息)；接收端设备从线缆中获取线缆的线缆信息，以及通过辅助链路从发送端设备中获取发送端设备的设备信息(包括发送端的端口信息)。需要说明的是，可以仅由线缆两端连接的设备中的其中一端设备从线缆中获取线缆的线缆信息，然后通过辅助链路发给另外一端设备，具体是采用哪种方式，本申请不作具体限定。其中，在能力交互完成后，进入训练决策状态S2。
S2：训练决策。
在训练决策时，根据线缆的能力、线缆两端连接的设备的能力决策训练所使用的链路数和训练速率。线缆两端连接的设备可以分为主设备(或称下行设备)和从设备(或称上行设备)，主设备包括下行口(Main Downstream Port，MDP)，从设备包括上行口(Main Upstream Port，MUP)；下行方向为下行口到上行口的方向，也即主设备到从设备的方向，主设备为发送端设备，从设备为接收端设备；上行方向为上行口到下行口的方向，也即从设备到主设备的方向，从设备为发送端设备，主设备为接收端设备。
其中，由主设备决策上行方向和下行方向训练所使用的链路数；在从设备有特殊需求时，从设备可通过辅助链路请求主设备调整上行方向和下行方向训练所使用的链路数。
其中，对于任何一个方向上的链路训练来说，链路训练的训练速率均是由发送端设备决策，并发送给接收端设备的。上行方向的链路训练时，由从设备决策上行方向的训练速率，并发给主设备；下行方向的链路训练时，由主设备决策下行方向的速率，并发给从设备。当上行方向的链路训练失败时，由从设备需根据自身策略，决策降速训练或重新训练。当下行方向的链路训练失败时，由主设备需根据自身策略，决策降速训练或重新训练。
其中，如果链路数、训练速率决策失败，则返回空闲状态S0；如果链路数、训练速率决策成功，则进入参数获取或估算状态S3。
S3：参数获取或估算。
首次进行链路训练和非首次进行链路训练，参数获取或估算有所不同。其中，在首次 进行链路训练之前，线缆两端连接的设备以前没有通过线缆进行数据传输；或者以前没有在通过该线缆连接的情况下进行过链路训练；或者以前在通过该线缆连接的情况下进行过链路训练但以前的链路训练没有成功；或者以前在通过该线缆连接的情况下进行过链路训练且以前的链路训练成功了，但没有保存以前链路训练成功的相关信息。
若线缆两端连接的设备是首次进行链路训练，发送端设备根据线缆的能力、发送端设备的能力、接收端设备的能力确定本次训练所需的训练参数的值(简称训练参数值)，具体地，根据线缆的能力、发送端设备的能力、接收端设备的能力确定训练速率，再根据训练速率确定本次训练的训练参数值，例如预先设定了训练速率与训练参数预设值的映射关系，在确定训练速率后，即可根据映射关系从训练参数预设值中确定本次训练的训练参数值；如果仅能获取到线缆的能力，则根据线缆的能力估算本次训练的训练参数值，例如根据线缆信息中的插损信息估算出一组训练参数值作为本次训练的训练参数值。接收端设备，根据发送端设备发来的训练速率，确定一组训练参数值用于本次训练。
若线缆两端连接的设备不是首次进行链路训练，则说明线缆两端连接的设备以前训练过，线缆两端连接的设备均存储有之前链路训练成功的相关信息，线缆两端连接的设备则分别获取各自存储的训练参数值作为本次训练所需的参数值。具体地，发送端设备可以根据本次训练的训练速率、线缆信息、接收端设备的设备信息(包括链路的接收端的端口信息)从存储的之前链路训练成功的相关信息中匹配出一组训练参数值，作为本次训练的训练参数值；若无法匹配获取到一组训练参数值，则可以根据线缆信息中的插损信息估算出一组训练参数值作为本次训练的训练参数值。接收端设备可以根据本次训练的训练速率、线缆信息、发送端设备的设备信息(包括链路的发送端的端口信息)从存储的之前链路训练成功的相关信息中匹配出一组训练参数值，作为本次训练的训练参数值；若无法匹配获取到一组训练参数值，则可以根据线缆信息中的插损信息估算出一组训练参数值作为本次训练的训练参数值。
其中，发送端设备所需的训练参数包括：电压摆幅(Voltage Swing)、发送端预加重强度(TxFFE，也称发送端前馈均衡参数)；接收端设备所需的训练参数包括：接收端连续时间线性均衡器(CTLE)的参数(简称连续时间线性均衡参数)、接收端判决反馈均衡器(DFE)的参数(简称判决反馈均衡参数)。需要说明的是，在无法获取或估算到本次训练的训练参数值的情况下，采用默认的初始值进行本次的链路训练。
其中，在决策完训练速率以及配置了训练参数值后，即可发起训练，进行时钟恢复和锁定状态S4；下行方向的训练和上行方向的训练可同步进行，也可异步进行；下行方向的训练和上行方向的训练相互独立，互不干扰或影响。
S4：时钟恢复和锁定。
在该状态，发送端设备在该链路上向该接收端设备发送时钟恢复序列；接收端设备在接收到该时钟恢复序列后，根据该时钟恢复序列进行时钟恢复和锁定。其中，如果时钟锁定失败，则返回训练决策状态S2；如果时钟锁定成功，则进入均衡计算与链路检查状态S5。
S5：均衡计算与链路检查。
在该状态，发送端设备在该链路上向该接收端设备发送均衡序列；接收端设备接收到该均衡序列后，首先检查所有工作的链路时钟是否失锁；若有链路时钟失锁，返回时钟恢 复和锁定状态S4；否则进行均衡计算。接收端设备根据接收到该均衡序列进行均衡计算，如果均衡计算失败，则返回训练决策状态S2；如果均衡计算成功，则接收端设备需要对链路进行检查，链路检查包括误码率检查和通道对齐检查等；如果链路检查失败，也返回训练决策状态S2；如果链路检查成功，则进入链路保持状态S6。
S6：链路保持。
在该状态，接收端设备持续检查链路状态，当链路出现异常时，通过辅助链路主动告知发送端设备。接收端设备检测到链路异常，可主动上报给发送端设备。发送端设备也可根据需要向接收端设备查询当前链路状态。在链路异常时，返回训练决策状态S2；在链路断开时，返回空闲状态S0。
请参阅图7，图7是本申请实施例提供的一种发送端设备链路训练的流程示意图。其中，图7中的线缆包括发送端设备的发送端到接收端设备的接收端的至少一条链路和辅助链路，辅助链路包括发送端设备到接收端设备的至少一条第一辅助链路和接收端设备到发送端设备的至少一条第二辅助链路，接收端设备可以为图8中的接收端设备，该链路训练的流程包括但不限于以下步骤：
701、获取或估算训练参数值。
其中，获取或估算训练参数值前需要确定训练速率，确定训练速率的过程可参见前述训练决策状态S2；获取训练参数值的过程可参见前述参数获取或估算状态S3。
在首次训练时，发送端设备根据线缆的能力、发送端设备的能力、接收端设备的能力确定训练速率，例如发送端设备根据发送端设备的设备信息、线缆的线缆信息、接收端设备的设备信息确定训练速率，然后根据训练速率确定训练参数值。
发送端设备有非易失性存储器(Non-Volatile memory，NVM)，非易失性存储器可以用于存储链路训练成功时的与链路训练相关的参数值；在任一次链路训练成功后，均将与此次链路训练有关的参数值存储在非易失性存储器中，再次训练时，可使用之前链路训练成功的参数值。在非首次训练时，发送端设备根据线缆的线缆信息、接收端设备的设备信息(接收端的端口信息)、训练决策出的训练速率从非易失性存储器中匹配出一组训练参数值。若线缆中没有存储线缆信息，训练成功之后，发送端设备未掉电且未断开过(如拔插)，再次训练可使用前一次训练成功的参数值。
在发送端设备无法通过匹配来获取训练参数值，例如发送端无非易失性存储器，但有线缆的线缆信息的情况下，可通过线缆的线缆信息进行与链路训练相关的参数的值的估算。若发送端设备无法通过匹配来获取训练参数值，也无线缆的线缆信息用于进行训练参数值估算的情况下，发送端设备将发送端与训练相关的参数复位为初始值。
需要说明的是，发送端设备获取或估算的训练参数值是指将要配置在发送端的参数的训练值，也即发送端设备获取或估算的训练参数值配置在发送端。此外，步骤701是可选的操作，例如，发送端设备可以以默认速率、参数的初始值下进行链路训练，从而可不执行步骤701。
702、将发送端的参数配置为训练参数值，通过辅助链路向接收端设备发送训练速率；向接收端设备发送时钟恢复序列。
其中，由于发送端设备到接收端设备之间包括至少一条链路，则将发送端的参数配置为训练参数值，也即将这至少一条链路中每条链路的发送端参数都配置为该训练参数值。
其中，时钟恢复序列由发送端设备的发送端发给接收端设备的接收端，时钟恢复序列通过发送端设备到接收端设备的至少一条链路传输，且该至少一条链路中的每条链路都需要传输该时钟恢复序列。时钟恢复序列可以理解为0101交替的数据，时钟恢复序列用于接收端设备对该至少一条链路中的每条链路进行时钟恢复和锁定。之后，发送端设备等待接收端设备反馈时钟锁定结果。
其中，发送端设备向接收端设备发送时钟恢复序列的速率为本次训练的训练速率。
703、判断是否所有的链路时钟恢复和锁定成功。
其中，发送端设备通过辅助链路接收来自接收端设备的时钟锁定结果，接收到的时钟锁定结果包括该至少一条链路中的每条链路的时钟锁定结果；当该至少一条链路中的每条链路均时钟锁定成功时，说明本次训练的时钟锁定成功；当该至少一条链路中的存在时钟锁定失败的链路时，说明本次训练的时钟锁定失败。对于时钟锁定失败的任一链路，均执行步骤704和705。
704、判断时钟锁定失败的链路的电压摆幅的配置是否遍历所有的电压摆幅预设值。
其中，对于任意一条链路，其可调整的电压摆幅有多个值，也即有多个电压摆幅预设值，且每条链路的多个电压摆幅预设值相同，步骤701获取或估算训练参数值只会得到这多个电压摆幅预设值中的其中一个值。如果发送端配置的电压摆幅的值过低或者过高，会导致接收端时钟无法锁定。因此，在时钟锁定失败的时候，发送端设备可以调整发送端配置的电压摆幅的值，通过辅助链路告知接收端设备后，接收端设备继续进行时钟锁定与恢复，直至时钟锁定成功或者电压摆幅的配置已遍历所有的电压摆幅预设值。故若时钟锁定失败的链路的电压摆幅的配置未遍历所有的电压摆幅预设值，则执行步骤705；若时钟锁定失败的链路的电压摆幅的配置已遍历所有的电压摆幅预设值，则执行步骤712，也即为当某一条链路的电压摆幅的配置已遍历所有的电压摆幅预设值，但接收端仍无法完成时钟恢复和锁定时，则进入训练决策，决策是否降速训练或重新训练。
705、调整时钟锁定失败的链路的电压摆幅的配置，并通过辅助链路向接收端设备发送电压摆幅的配置更新完成的信息。
其中，发送端配置的电压摆幅可以在多个电压摆幅预设值之间调整，也即发送端可支持零至多档电压摆幅可调。若时钟锁定失败的链路的电压摆幅的配置未遍历所有的电压摆幅预设值，调整时钟锁定失败的链路的电压摆幅到下一个等级，并通过辅助链路告知接收端设备。发送端设备调整电压摆幅时，可按一定顺序调整，例如依次向上或依次向下；也可不按顺序调整，例如根据接收端的状态动态调整。发送端设备调整电压摆幅后，会再次判断是否所有的链路时钟恢复和锁定成功，如果所有的链路时钟恢复和锁定成功，则之后，进入均衡计算，执行步骤706。
706、向接收端设备发送均衡序列。
其中，当发送端设备接收到接收端设备通过辅助链路发来的时钟锁定结果，并判定所有链路时钟锁定成功，则开始向接收端发送均衡序列。均衡序列由发送端设备的发送端发给接收端设备的接收端，均衡序列通过发送端设备到接收端设备的至少一条链路传输，且 该至少一条链路中的每条链路都需要传输该均衡序列。均衡序列指一定格式的数据，接收端根据这些数据做均衡计算。发送端设备在向接收端设备发送均衡序列就，等待接收来自接收端设备反馈的均衡计算结果或链路检查结果。
其中，发送端设备向接收端设备发送均衡序列的速率为本次训练的训练速率。
707、判断接收端设备是否反馈均衡计算失败或链路检查失败。
其中，如果接收端设备没有反馈链路检查成功，则说明链路训练成功，执行步骤713；如果接收端设备反馈均衡计算失败或链路检查失败，则说明链路训练失败，执行步骤708。
708、判断接收端设备是否反馈链路检查失败。
其中，链路训练失败的原因包括：均衡计算失败和链路检查失败；当链路训练失败时，还需要判断链路训练失败的是均衡计算失败导致的，还是链路检查失败导致的。故判断接收端设备是否反馈链路检查失败，若接收端设备反馈链路检查失败，则说明链路训练失败的是链路检查失败导致的，执行步骤712；否则，执行步骤709。
其中，发送端设备通过辅助链路接收来自接收端设备的链路检查结果，接收到的链路检查结果包括该至少一条链路中的每条链路的链路检查结果；当该至少一条链路中的每条链路链路检查成功时，说明本次训练的链路检查成功；当该至少一条链路中的存在均衡计算失败的链路时，说明本次训练的均衡计算失败。因此，当该至少一条链路中的存在链路检查失败的链路时，可以认为接收端设备反馈链路检查失败。当链路检查失败时，执行步骤712。
其中，均衡计算成功之后才能进行链路检查，如果接收端均衡计算失败，一定要告知发送端均衡计算失败；而如果接收端均衡计算成功，可选择的是否要告知发送端均衡计算成功。发送端设备通过辅助链路接收来自接收端设备的均衡计算结果，接收到的均衡计算结果包括该至少一条链路中的每条链路的均衡计算结果；当该至少一条链路中的每条链路均衡计算成功时，说明本次训练的均衡计算成功；当该至少一条链路中的存在均衡计算失败的链路时，说明本次训练的均衡计算失败。因此，当该至少一条链路中的存在均衡计算失败的链路时，可以认为接收端设备反馈均衡计算失败。需要说明的是，当接收端若均衡计算成功，可能不会反馈均衡计算结果。当均衡计算失败时，对于均衡计算失败的链路，执行步骤709，判断其均衡计算失败的原因。
709、判断均衡计算失败的链路是否时钟失锁。
其中，对于均衡计算失败的链路，判断其是否时钟失锁，如果发生时钟失锁，保持当前训练速率不变，重新发起训练，返回执行步骤702；如果没有发生时钟失锁，则执行步骤710。
710、判断均衡计算失败的链路的发送端前馈均衡参数的配置是否遍历所有的发送端前馈均衡预设值。
其中，对于任意一条链路，其可调整的发送端前馈均衡参数有多个值，也即有多个发送端前馈均衡预设值，且每条链路的多个发送端前馈均衡预设值相同，步骤701获取或估算训练参数值只会得到这多个发送端前馈均衡预设值中的其中一个值。发送端配置的发送端前馈均衡参数的值与接收端均衡计算能否成功相关。因此，在均衡计算失败的时候，发送端设备可以调整发送端配置的发送端前馈均衡参数的值，通过辅助链路告知接收端设备 后，接收端设备继续进行均衡计算，直至均衡计算成功或者发送端前馈均衡参数的配置已遍历所有的发送端前馈均衡预设值。故若均衡计算失败的链路的发送端前馈均衡参数的配置未遍历所有的发送端前馈均衡预设值，则执行步骤711；若均衡计算失败的链路的发送端前馈均衡参数的配置已遍历所有的发送端前馈均衡预设值，则执行步骤713，也即为当某一条链路的发送端前馈均衡参数的配置已遍历所有的发送端前馈均衡预设值，但接收端仍无法均衡计算成功时，则进入训练决策，决策是否降速训练或重新训练。
711、调整均衡计算失败的链路的发送端前馈均衡参数的配置，并通过辅助链路向接收端设备发送发送端前馈均衡参数的配置更新完成的信息。
其中，发送端配置的发送端前馈均衡参数可以在多个发送端前馈均衡预设值之间调整，也即发送端可支持零至多档发送端前馈均衡参数可调。若均衡计算失败的链路的发送端前馈均衡参数的配置未遍历所有的发送端前馈均衡预设值，调整均衡计算失败的链路的发送端前馈均衡参数到下一个等级，并通过辅助链路告知接收端设备。发送端设备调整发送端前馈均衡参数时，可按一定顺序调整，例如依次向上或依次向下；也可不按顺序调整，例如根据接收端的状态动态调整。发送端设备调整发送端前馈均衡参数后，会再次判断接收端设备是否反馈均衡计算失败，如果接收端设备没有反馈均衡计算失败，则执行步骤712。
712、链路训练失败，进入训练决策。
其中，链路训练失败时，进入训练决策，决策是否降低训练速率进行再次训练或者以当前速率进行重新训练。
713、链路训练成功，开始向接收端设备发送数据。
其中，若线缆中的链路包括双向链路时，当其中一向的链路训练成功后，即可根据需要通过训练成功的链路传输业务数据，不必等到另外一个方向的链路训练成功后才开始传输业务数据。应理解，训练速率也是数据传输时的传输速率。
714、将训练速率、接收端设备的设备信息、线缆的线缆信息、链路训练成功后发送端的参数配置的值存储。
其中，为训练成功后，将发送端最终使用的电压摆幅的值和发送端前馈均衡参数的值等保存到非易失性器件中，以方便后续使用，加快训练速率。具体地，需要保存的参数包括：训练速率，线缆的线缆信息(包括线缆的识别码)，训练成功时各条链路的电压摆幅配置的值和发送端前馈均衡参数配置的值，接收端设备的设备信息(包括接收端的端口信息)、线缆的正反插状态等。需要保存的参数的存储支持1组或多组。需要说明的是，步骤714是可选的操作，例如，发送端设备可以不将训练速率、接收端设备的设备信息、线缆的线缆信息、链路训练成功后发送端的参数配置的值存储。
需要说明的是，图7所描述的发送端设备链路训练的具体流程，可参见上述图6所示的实施例中的相关描述。
请参阅图8，图8是本申请实施例提供的一种接收端设备链路训练的流程示意图。其中，图8中的线缆包括发送端设备的发送端到接收端设备的接收端的至少一条链路和辅助链路，辅助链路包括发送端设备到接收端设备的至少一条第一辅助链路和接收端设备到发送端设备的至少一条第二辅助链路，发送端设备可以为图7中的发送端设备，该链路训练 的流程包括但不限于以下步骤：
801、接收来自发送端设备的训练速率。
其中，确定训练速率的过程可参见前述训练决策状态S2。训练速率由发送端设备决策，并发给接收端设备，在首次训练时，接收来自发送端设备的训练速率，然后根据训练速率确定训练参数值。
802、获取或估算训练参数值。
其中，获取训练参数值的过程可参见前述参数获取或估算状态S3。接收端设备有非易失性存储器，非易失性存储器可以用于存储链路训练成功时的与链路训练相关的参数值；在任一次链路训练成功后，均将与此次链路训练有关的参数值存储在非易失性存储器中，再次训练时，可使用之前链路训练成功的参数值。在非首次训练时，接收端设备根据线缆的线缆信息、发送端设备的设备信息(接收端的端口信息)、接收到的训练速率从非易失性存储器中匹配出一组训练参数值。若线缆中没有存储线缆信息，训练成功之后，接收端设备未掉电且未断开过(如拔插)，再次训练可使用前一次训练成功的参数值。
在接收端设备无法通过匹配来获取训练参数值，例如发送端无非易失性存储器，但有线缆的线缆信息的情况下，可通过线缆的线缆信息进行与链路训练相关的参数的值的估算。若接收端设备无法通过匹配来获取训练参数值，也无线缆的线缆信息用于进行训练参数值估算的情况下，接收端设备将发送端与训练相关的参数复位为初始值。
需要说明的是，接收端设备获取或估算的训练参数值是指将要配置在接收端的参数的训练值，也即接收端设备获取或估算的训练参数值配置在接收端。此外，参数的获取或估算是可选的操作，例如接收端设备在发送端的参数配置为初始值下进行链路训练。
803、时钟恢复和锁定。
其中，在时钟恢复和锁定之前，还将接收端的参数配置为训练参数值。由于发送端设备到接收端设备之间包括至少一条链路，则将接收端的参数配置为训练参数值，也即将这至少一条链路中每条链路的接收端参数都配置为该训练参数值。
其中，在时钟恢复和锁定之前，还会接收来自发送端设备的时钟恢复序列。时钟恢复序列由发送端设备的发送端发给接收端设备的接收端，时钟恢复序列通过发送端设备到接收端设备的至少一条链路传输，且该至少一条链路中的每条链路都需要传输该时钟恢复序列，接收端设备在该至少一条链路中的每条链路上都接收到时钟恢复序列。时钟恢复序列可以理解为0101交替的数据，时钟恢复序列用于接收端设备对该至少一条链路中的每条链路进行时钟恢复和锁定。
其中，对于该至少一条链路中的每条链路，在收到时钟恢复序列后，均需要根据时钟恢复序列进行时钟恢复和锁定，也即根据时钟恢复序列使用特定电路将内部工作时钟与输入的时钟序列保持一致。
804、判断是否所有的链路时钟恢复和锁定成功。
其中，当该至少一条链路中的每条链路均时钟锁定成功时，说明本次训练的时钟锁定成功；当该至少一条链路中的存在时钟锁定失败的链路时，说明本次训练的时钟锁定失败。若该至少一条链路中的所有的链路没有全部时钟恢复和锁定成功，则执行步骤805；若该至少一条链路中的所有的链路都时钟恢复和锁定成功，则执行步骤808。
805、判断是否所有的链路时钟恢复和锁定超时。
其中，时钟恢复和锁定操作需要在一段预设时长内完成，对于该至少一条链路中的任意一条链路，其被判断为时钟锁定失败，有可能是时钟恢复和锁定操作经过的时间还没有到达预设时长，也即该链路的时钟恢复和锁定操作还没有完成。因此，当判断到不是所有的链路都时钟恢复和锁定成功时，可以进一步判断是否所有的链路时钟恢复和锁定超时，也即判断是否所有的链路时钟恢复和锁定操作都已经完成，如果所有的链路时钟恢复和锁定操作都已经完成，则说明确实链路时钟锁定失败，对于时钟锁定失败的链路，执行步骤806；如果不是所有的链路时钟恢复和锁定操作都已经完成，则等待所有的链路时钟恢复和锁定操作都已经完成后，再执行步骤804，判断是否所有的链路时钟恢复和锁定成功。
806、通过辅助链路向发送端设备反馈时钟锁定失败。
其中，时钟锁定失败后，接收端设备会通过辅助链路向发送端设备反馈时钟锁定结果，该时钟锁定结果为时钟锁定失败，该时钟锁定结果包括该至少一条链路中的每条链路的时钟锁定结果，因此发送端设备知晓具体是该至少一条链路中的哪条链路时钟锁定失败。对于时钟锁定失败的链路，发送端设备可能会调整该时钟锁定失败的链路的电压摆幅的配置，并在调整完该时钟锁定失败的链路的电压摆幅的配置后，通过辅助链路告知接收端设备其对该时钟锁定失败的链路的电压摆幅的配置进行了调整。
807、通过辅助链路接收来自发送端设备的电压摆幅的配置更新完成的信息。
其中，接到端设备电压摆幅的配置更新完成的信息后，即可知晓发送端设备对该时钟锁定失败的链路的电压摆幅的配置进行了更新，则重置该链路的定时器，继续进行时钟恢复和锁定。等所有时钟锁定失败的链路均接收到电压摆幅的配置更新完成的信息，继续进行时钟恢复和锁定之后，再次执行804；直到该至少一条链路中所有的链路时钟锁定成功后，执行步骤808。
808、通过辅助链路向发送端设备反馈时钟锁定成功。
其中，接收端设备检测到所有链路时钟锁定成功后，通过辅助链路向发送端设备发送时钟锁定结果，该时钟锁定结果为时钟锁定成功。之后，进入均衡计算，等待接收发送端设备发来的均衡序列。
809、判断是否接收到来自发送端设备的均衡序列或发送端前馈均衡参数的配置更新完成的信息。
其中，由于接收端设备需要根据均衡序列进行均衡计算，因此首先需要判断是否接收到来自发送端设备的均衡序列，如果接收到来自发送端设备的均衡序列才进行后续的均衡计算具体操作。而进行过均衡计算后，但均衡计算失败时，发送端设备会调整发送端的发送端前馈均衡参数的配置，然后通过发送端前馈均衡参数的配置更新完成的信息告知接收端设备再次进行均衡计算，因此在非首次进行均衡计算时，需要判断是否接收到来自发送端设备的发送端前馈均衡参数的配置更新完成的信息，以此来判断是否再次进行均衡计算。应理解，如果均衡序列没有更新，也即接收端设备没有接收到新的均衡序列时，再次均衡计算所采用的均衡序列还是之前接收到的均衡序列。为了确保均衡计算正常进行，在进行均衡计算之前，需要确保时钟锁定是否稳定，故在接收到来自发送端设备的均衡序列或发送端前馈均衡参数的配置更新完成的信息后，执行步骤810，判断是否存在时钟失锁的链 路。
810、判断是否存在时钟失锁的链路。
其中，检查该至少一条链路中所有的链路当前时钟是否都稳定，若存在时钟失锁的链路，对于时钟失锁的链路，则执行步骤811；否则，开始均衡计算，并执行步骤812，等待均衡计算结果。
其中，均衡计算通过一些电路设计，补偿信道的非理想性，消除码间干扰；均衡计算的过程就是不断调整这些电路设计中的一些参数，判断信号是否达到理想状态；接收端收到均衡序列后才进行均衡计算，不断调整自身配置，并对均衡序列进行识别和判决。
811、调整时钟失锁的链路的连续时间线性均衡参数的配置，并通过辅助链路向发送端设备发送时钟失锁的链路时钟失锁的信息。
其中，对于时钟失锁的链路中的任一链路，将链路的接收端的连续时间线性均衡参数进行适当调整，并将该链路时钟失锁的结果通过辅助链路告知发送端设备；等待发送端重新发起训练，也即重新进行时钟恢复和锁定。此情况下，为了再次时钟恢复和锁定能成功，再次进行时钟恢复和锁定时，接收端配置的连续时间线性均衡参数的应做调整，不能使用原来的值。
812、判断是否所有的链路均衡计算成功。
其中，当该至少一条链路中的每条链路均衡计算成功时，本次训练的均衡计算成功；当该至少一条链路中的存在均衡计算失败的链路时，本次训练的均衡计算失败。均衡计算为接收端均衡粗调，需满足所有链路字符定界成功、各链路周期同步成功及各链路的误码率小于误码率1；其中，误码率1为1个特定值。故对于该至少一条链路中任一条链路来说，均检查其是否满足字符定界成功、周期同步成功及误码率小于误码率1，如果都满足，则该任一条链路是均衡计算成功的；否则，该任一条链路是均衡计算失败的。对于不满足字符定界成功、周期同步成功及误码率小于误码率1的链路，执行步骤813。当该至少一条链路中的每条链路均衡计算成功时，执行步骤815。
813、判断均衡计算失败的链路是否均衡计算超时。
其中，均衡计算操作需要在一段预设时长内完成，对于该至少一条链路中的任意一条链路，其不满足字符定界成功、周期同步成功及误码率小于误码率1时，有可能是均衡计算操作经过的时间还没有到达预设时长，也即该链路的均衡计算操作还没有完成。因此，当判断到该任一链路不满足字符定界成功、周期同步成功及误码率小于误码率1时，可以进一步判断该任一链路是否均衡计算超时，也即判断该任一链路的均衡计算操作是否已经完成，如果该任一链路的均衡计算操作已经完成，则说明该任一链路均衡计算失败，对于均衡计算失败的链路，执行步骤814；如果该任一链路均衡计算操作还没有完成，则等待任一链路均衡计算操作完成，再执行步骤812，判断该任一链路均衡计算是否成功。
814、通过辅助链路向接收端反馈均衡计算失败。
其中，如果存在链路均衡计算未通过且超时，则说明均衡计算失败，通过辅助链路将均衡结果告知发送端设备。发送端设备通过辅助链路接收来自接收端设备的均衡计算结果，接收到的均衡计算结果包括该至少一条链路中的每条链路的均衡计算结果，对于均衡计算失败的链路，发送端设备会调整该链路的发送端前馈均衡参数的配置，在配置完成后，发 送端设备通过辅助链路向接收端设备发送端前馈均衡参数的配置更新完成的信息。当接收端设备接收到关于该链路的发送端前馈均衡参数的配置更新完成的信息后，重启定时器并继续均衡计算。从而，再执行完步骤814后，执行步骤809。
815、判断是否所有的链路链路检查成功。
其中，当检测到均衡计算成功后，对该至少一条链路中的每条链路进行链路检查。当该至少一条链路中的每条链路链路检查成功时，本次训练的链路检查成功；当该至少一条链路中的存在均衡计算失败的链路时，本次训练的均衡计算失败。链路检查为均衡细调，需满足所有链路间通道对齐、各链路的误码率小于误码率2；其中，误码率2与误码率1类似，误码率2<误码率1。故对于该至少一条链路中任一条链路来说，均检查其是否满足通道对齐、误码率小于误码率2，如果都满足，则该任一条链路是链路检查成功的；否则，该任一条链路是链路失败的。对于不满足通道对齐、误码率小于误码率2的链路，执行步骤816。当该至少一条链路中的每条链路均链路检查成功时，执行步骤818。
816、判断链路检查失败的链路是否链路检查超时。
其中，链路检查操作需要在一段预设时长内完成，对于该至少一条链路中的任意一条链路，其不满足通道对齐、误码率小于误码率2时，有可能是链路检查操作经过的时间还没有到达预设时长，也即该链路的链路检查操作还没有完成。因此，当判断到该任一链路不满足通道对齐、误码率小于误码率2时，可以进一步判断该任一链路是否链路检查超时，也即判断该任一链路的链路检查操作是否已经完成，如果该任一链路的链路检查操作已经完成，则说明该任一链路链路检查失败，对于链路检查失败的链路，执行步骤817；如果该任一链路链路检查操作还没有完成，则等待任一链路链路检查操作完成，再执行步骤815，判断该任一链路链路检查是否成功。
817、向发送端反馈链路检查失败，链路训练失败。
其中，若该至少一条链路中的存在链路检查未通过的链路，则说明链路训练失败，接收端设备通过辅助链路向发送端设备发送链路检查结果，该链路检查结果包括该至少一条链路中的每条链路的链路检查结果，该链路检查结果为链路检查失败。
818、链路训练成功，向发送端反馈链路检查成功，通知发送端设备开始发送数据。
其中，若该至少一条链路中的每条链路均链路检查通过，则说明链路训练成功，通过辅助链路向发送端设备发送链路检查结果，该链路检查结果包括该至少一条链路中的每条链路的链路检查结果，该链路检查结果为链路检查成功。
需要说明的是，若线缆中的链路包括双向链路时，当其中一向的链路训练成功后，即可根据需要通过训练成功的链路传输业务数据，不必等到另外一个方向的链路训练成功后才开始传输业务数据。因此，链路训练成功后，接收端设备可以通知发送端设备可以开始传输数据了。
819、将训练速率、发送端设备的设备信息、线缆的线缆信息、链路训练成功后接收端的参数配置的值存储。
其中，为训练成功后，将接收端最终使用的连续时间线性均衡参数的值和判决反馈均衡参数的值等保存到非易失性器件中，以方便后续使用，加快训练速率。具体地，需要保存的参数包括：训练速率，线缆的线缆信息(包括线缆的识别码)，训练成功时各条链路 的连续时间线性均衡参数配置的值和判决反馈均衡参数配置的值，发送端设备的设备信息(包括发送端的端口信息)、线缆的正反插状态等。需要保存的参数的存储支持1组或多组。需要说明的是，步骤819是可选的操作，例如，接收端设备可以不将训练速率、发送端设备的设备信息、线缆的线缆信息、链路训练成功后接收端的参数配置的值存储。
需要说明的是，图8所描述的接收端设备链路训练的具体流程，可参见上述图6和图7所示的实施例中的相关描述。
请参阅图9，图9是本申请实施例提供的一种通信系统的架构示意图。如图9所示，该通信系统包括第一设备91、第二设备92以及连接第一设备91和第二设备92的线缆93；其中，第一设备91包括至少一个第一接口911、第一处理器912和第一存储器913，第二设备92包括至少一个第二接口921、第二处理器922和第二存储器923，线缆93包括主链路(Main-Link)931、辅助链路932和第三存储器933。
其中，第一存储器913存储有第一设备91的设备信息，以及可以用于存储链路训练的训练参数等信息；第二存储器923存储有第二设备92的设备信息，以及可以用于存储链路训练的训练参数等信息；第三存储器933存储有线缆93的线缆信息；第一存储器913、第二存储器923、第三存储器933可以为非易失性器件，该非易失性器件包括可擦除可编程只读存储器(Electrically Erasable Programmable read only memory，EEPROM)、闪存(FLASH)、内嵌式多媒体存储器(Embedded Multi Media Card，eMMC)等。
其中，第一设备91和第二设备92在区分主从设备时，第一接口911和第二接口921分上行口和下行口；第一接口911为上行口时，第二接口921为下行口；第一接口911为下行口时，第二接口921为上行口。为了便于描述，下文以第一设备91为主设备、第一接口911为下行口，以第二设备92为从设备、第二接口921为上行口，来描述本申请提供的技术方案，但对此并不作具体限定。
应理解，对于具备双向通道的接口来说，其应当包括至少一个发送端和至少一个接收端，发送端和接收端是将该接口上的多个引脚根据引脚的功能划分得到的。示例性的，第一设备91的第一接口911包括多个引脚，该多个引脚例如可以包括多个发送引脚和多个接收引脚，在一种可选的情况中，第一发送端9111可以包括多个发送引脚中的部分，第一接收端9112可以包括多个接收引脚中的部分。请参阅图10，图10是第一接口911与第二接口921的内部连接示意图。如图10所示，第一接口911上的多个引脚根据功能划分为第一发送端9111、第一接收端9112、第三发送端9113和第四接收端9114，第二接口921上的多个引脚根据功能划分为第二接收端9211、第二发送端9212、第三接收端9213和第四发送端9214；第一发送端9111与第二接收端9211通过主链路931连接，第一发送端9111与第二接收端9211之间有m条第一链路，m为大于0的整数；第二发送端9212与第一接收端9112通过主链路931连接，第二发送端9212与第一接收端9112之间有n条第二链路，n为大于0的整数；第三发送端9113与第三接收端9213通过辅助链路932连接，第三发送端9113与第三接收端9213之间存在至少一条第一辅助链路；第四发送端9214与第四接收端9114通过辅助链路932连接，第四发送端9214与第四接收端9114之间存在至少一条第二辅助链路。
因此，线缆93中有m+n+2条链路，分别为m条第一链路、n条第二链路、1条第一辅助链路以及1条第二辅助链路。其中，第一辅助链路和第二辅助链路是固定不变的，第一辅助链路用于第一设备91向第二设备92发送数据或第二设备92从第一设备91接收数据，第二辅助链路用于第一设备91从第二设备92接收数据或第二设备92向第一设备91发送数据，故第三发送端9113、第三接收端9213、第四发送端9214和第四接收端9114包括的引脚的功能是不变的，第三发送端9113和第四发送端9214包括的引脚的功能仅为发送功能，第三接收端9213和第四接收端9114包括的引脚的功能仅为接收功能。而m条第一链路、n条第二链路的链路数量可以根据需要进行调整，例如增加第一链路的数量、减少第二链路的数量，或者减少第一链路的数量、增加第二链路的数量，故第一发送端9111、第一接收端9112、第二接收端9211和第二发送端9212的功能是可变的，也即第一发送端9111、第一接收端9112、第二接收端9211和第二发送端9212包括的引脚的功能可以为发送功能或接收功能，具体由第一设备91确定或者由第一设备91根据第二设备92的需求确定。
其中，对于第一链路，第一设备91是发送端设备，第二设备92是接收端设备；对于第二链路，第一设备91是接收端设备，第二设备92是发送端设备。
下面结合图9和图10来描述本申请提供的链路训练方案。
一、空闲状态
第一设备91检查第一设备91与第二设备92是否均已经插入线缆93，且检查第一设备91与第二设备92是否均已经准备进行链路训练；第二设备92也检查第一设备91与第二设备92是否均已经插入线缆93，且检查第一设备91与第二设备92是否均已经准备进行链路训练。
二、能力交互
第一设备91和第二设备92之间进行能力交互；第一设备91通过辅助链路932从第二存储器923获取第二设备92的设备信息(包括第二接收端9211、第二发送端9212的端口信息)，以及从第三存储器933中获取线缆93的线缆信息；第二设备92通过辅助链路932从第一存储器913获取第一设备91的设备信息(包括第一发送端9111、第一接收端9112的端口信息)以及从第三存储器933中获取线缆93的线缆信息。
三、训练决策
第一设备91决策上行方向和下行方向的链路的数量，也即第一设备91决策第一链路和第二链路的数量，具体地，确定m和n的取值。示例性的，一般下行方向上的数据传输大于上行方向上是数据出传输，故m的取值可以大于n的取值；当第二设备92有特殊需求时，其可以通过辅助链路932请求第一设备91调整上行方向和下行方向训练所使用的链路数。第一设备91决策下行方向上的训练速率，也即第一设备91决策第一链路上的训练速率，记为第一速率；具体地，第一设备91根据第一设备91的能力、第二设备92的能力、线缆93的能力决策第一链路上的训练速率。第二设备92决策上行方向上的训练速率，也即第二设备92决策第二链路上的训练速率，记为第二速率；具体地，第二设备92根据第一设备91的能力、第二设备92的能力、线缆93的能力决策第二链路上的训练速率。当第一链路训练失败时，第一设备91决策降速训练或重新训练；当第二链路训练失败时，第二设备92决策降速训练或重新训练。
四、参数获取或估算
(1)对于第一链路：
在首次训练时，第一设备91根据第一设备91的设备信息、第二设备92的设备信息、线缆93的线缆信息确定第一链路本次训练的第一速率，然后根据本次训练的第一速率确定一组第一训练参数值；当第一设备91仅获取到线缆93的线缆信息时，可根据线缆93的线缆信息估算出一组第一训练参数值；然后将第一发送端9111的参数值配置为该第一训练参数值；其中，m条第一链路的发送端的参数都配置为该第一训练参数值。第一设备91会将决策出的本次训练的第一速率发送给第二设备92，第二设备92根据本次训练的第一速率确定一组第二训练参数值；或者第二设备92可根据线缆93的线缆信息估算出一组第二训练参数值；然后将第二接收端9211的参数值配置为该第二训练参数值；其中，m条第一链路的接收端的参数都配置为该第二训练参数值。之后，可以进行第一链路的链路训练。
在非首次训练时，第一设备91根据本次训练的第一速率、第二设备92的设备信息(包括第二接收端9211的端口信息)、线缆93的线缆信息(包括线缆93的识别码)、线缆93的正反插状态中的至少一项从第一存储器913中匹配一组第一训练参数值；在无法匹配到一组第一训练参数值时，可根据线缆93的线缆信息估算出一组第一训练参数值；然后将第一发送端9111的参数值配置为该第一训练参数值；其中，m条第一链路的发送端的参数都配置为该第一训练参数值。同理，第二设备92根据本次训练的第一速率、第一设备91的设备信息(包括第一发送端9111的端口信息)、线缆93的线缆信息(包括线缆93的识别码)、线缆93的正反插状态中的至少一项从第二存储器923中匹配一组第二训练参数值；在无法匹配到一组第二训练参数值时，可根据线缆93的线缆信息估算出一组第二训练参数值；然后将第二接收端9211的参数值配置为该第二训练参数值；其中，m条第一链路的接收端的参数都配置为该第二训练参数值。之后，可以进行第一链路的链路训练。
(2)对于第二链路：
在首次训练时，第二设备92根据第一设备91的设备信息、第二设备92的设备信息、线缆93的线缆信息确定第二链路本次训练的第二速率，然后根据本次训练的第二速率确定一组第三训练参数值；当第二设备92仅获取到线缆93的线缆信息时，可根据线缆93的线缆信息估算出一组第三训练参数值；然后将第二发送端9212的参数值配置为该第三训练参数值；其中，n条第二链路的发送端的参数都配置为该第三训练参数值。第二设备92会将决策出的本次训练的第二速率发送给第一设备91，第一设备91根据本次训练的第二速率确定一组第四训练参数值；或者第一设备91可根据线缆93的线缆信息估算出一组第四训练参数值；然后将第一接收端9112的参数值配置为该第四训练参数值；其中，n条第二链路的接收端的参数都配置为该第四训练参数值。之后，可以进行第二链路的链路训练。
在非首次训练时，第二设备92根据本次训练的第二速率、第一设备91的设备信息(包括第一接收端9112的端口信息)、线缆93的线缆信息从第二存储器923中、线缆93的正反插状态中的至少一项匹配一组第三训练参数值；在无法匹配到一组第三训练参数值时，可根据线缆93的线缆信息估算出一组第三训练参数值；然后将第二发送端9212的参数值配置为该第三训练参数值；其中，n条第二链路的发送端的参数都配置为该第三训练参数值。同理，第一设备91根据本次训练的第二速率、第二设备92的设备信息(包括第二发 送端9212的端口信息)、线缆93的线缆信息(包括线缆93的识别码)、线缆93的正反插状态中的至少一项从第一存储器913中匹配一组第四训练参数值；在无法匹配到一组第四训练参数值时，可根据线缆93的线缆信息估算出一组第四训练参数值；然后将第一接收端9112的参数值配置为该第四训练参数值；其中，n条第二链路的接收端的参数都配置为该第四训练参数值。之后，可以进行第二链路的链路训练。
五、时钟恢复和锁定
(1)对于第一链路：
第一设备91以第一速率通过第一发送端9111向第二接收端9211发送第一时钟恢复序列；第二设备92通过第二接收端9211接收到第一时钟恢复序列后，根据该第一时钟恢复序列进行时钟恢复和锁定。其中，第一时钟恢复序列在该m条第一链路中都需要传输，该m条第一链路中的每条第一链路都需要进行时钟恢复和锁定。
第二设备92每次时钟恢复和锁定完成后，会向第一设备91发送第一时钟锁定结果，也即第二设备92通过第四发送端9214向第四接收端9114发送第一时钟锁定结果，第一设备91通过第四接收端9114接收该第一时钟锁定结果。第一时钟锁定结果包括m条第一链路中的每条第一链路的时钟锁定结果，当m条第一链路中存在时钟锁定失败的第一链路时，第一发送端9111与第二接收端9211之间的链路时钟锁定失败，否则第一发送端9111与第二接收端9211之间的链路时钟锁定成功。
对于时钟锁定失败的第一链路中的任一第一链路，第一设备91会调整其电压摆幅的配置，然后第一设备91通过第三发送端9113向第三接收端9213发送电压摆幅的配置更新完成的信息，第二设备92通过第三接收端9213接收到该电压摆幅的配置更新完成的信息后，继续进行时钟恢复与锁定，直至所有的第一链路时钟锁定成功，进入均衡计算与链路检查。若可供调整的电压摆幅预设值均已遍历过，还是无法使得所有的第一链路时钟锁定成功，则说明第一链路链路训练失败，需要重新进行训练决策。
(2)对于第二链路：
第二设备92以第二速率通过第二发送端9212向第一接收端9112发送第二时钟恢复序列；第一设备91通过第一接收端9112接收到第二时钟恢复序列后，根据该第二时钟恢复序列进行时钟恢复和锁定。其中，第二时钟恢复序列在该n条第二链路中都需要传输，该n条第二链路中的每条第二链路都需要进行时钟恢复和锁定。
第一设备91每次时钟恢复和锁定完成后，会向第二设备92发送第二时钟锁定结果，也即第一设备91通过第三发送端9113向第三接收端9213发送第二时钟锁定结果，第二设备92通过第三接收端9213接收该第二时钟锁定结果。第二时钟锁定结果包括n条第二链路中的每条第二链路的时钟锁定结果，当n条第二链路中存在时钟锁定失败的第二链路时，第二发送端9212第一接收端9112之间的链路时钟锁定失败，否则第二发送端9212与第一接收端9112之间的链路时钟锁定成功。
对于时钟锁定失败的第二链路中的任一第二链路，第二设备92会调整其电压摆幅的配置，然后第二设备92通过第四发送端9214向第四接收端9114发送电压摆幅的配置更新完成的信息，第一设备91通过第四接收端9114接收到该电压摆幅的配置更新完成的信息后，继续进行时钟恢复与锁定，直至所有的第二链路时钟锁定成功，进入均衡计算与链路检查。 若可供调整的电压摆幅预设值均已遍历过，还是无法使得所有的第二链路时钟锁定成功，则说明第二链路链路训练失败，需要重新进行训练决策。
六、均衡计算与链路检查
(1)对于第一链路：
第一设备91以第一速率通过第一发送端9111向第二接收端9211发送第一均衡序列；第二设备92通过第二接收端9211接收到第一均衡序列后，首先检查是否存在时钟是否失锁的第一链路；若有时钟失锁的第一链路，调整时钟失锁的第一链路的连续时间线性均衡参数的配置，并通过辅助链路932向第一设备91发送时钟失锁的第一链路时钟失锁的信息，也即第二设备92通过第四发送端9214向第四接收端9114发送时钟失锁的第一链路时钟失锁的信息，第一设备91通过第四接收端9114接收该时钟失锁的第一链路时钟失锁的信息，之后进入重新进行训练；若没有时钟失锁的第一链路，根据该第一均衡序列进行均衡计算。其中，第一均衡序列在该m条第一链路中都需要传输，该m条第一链路中的每条第一链路都需要进行均衡计算。
第二设备92每次均衡计算完成后，会向第一设备91发送第一均衡计算结果，也即第二设备92通过第四发送端9214向第四接收端9114发送第一均衡计算结果，第一设备91通过第四接收端9114接收该第一均衡计算结果。第一均衡计算结果包括m条第一链路中的每条第一链路的均衡计算结果，当m条第一链路中存在均衡计算失败的第一链路时，第一发送端9111与第二接收端9211之间的链路均衡计算失败；否则第一发送端9111与第二接收端9211之间的链路均衡计算成功。
对于均衡计算失败的第一链路中的任一第一链路，第一设备91会调整其发送端前馈均衡参数的配置，然后第一设备91通过第三发送端9113向第三接收端9213发送发送端前馈均衡参数的配置更新完成的信息，第二设备92通过第三接收端9213接收到该发送端前馈均衡参数的配置更新完成的信息后，继续进行均衡计算，直至所有的第一链路均衡计算成功，进入链路检查。若可供调整的发送端前馈均衡预设值均已遍历过，还是无法使得所有的第一链路均衡计算成功，则说明第一链路链路训练失败。
在m条第一链路均已均衡计算成功以后，第二设备92开始进行链路检查，第二设备92每次链路检查完成后，会向第一设备91发送第一链路检查结果，也即第二设备92通过第四发送端9214向第四接收端9114发送第一链路检查结果，第一设备91通过第四接收端9114接收该第一链路检查结果。第一链路检查结果包括m条第一链路中的每条第一链路的链路检查结果，当m条第一链路中存在链路检查失败的第一链路时，第一发送端9111与第二接收端9211之间的链路链路检查失败，也即第一发送端9111与第二接收端9211之间的链路链路训练失败；否则第一发送端9111与第二接收端9211之间的链路链路训练成功。
(2)对于第二链路：
第二设备92以第二速率通过第二发送端9212向第一接收端9112发送第二均衡序列；第一设备91通过第一接收端9112接收到第二均衡序列后，首先检查是否存在时钟是否失锁的第二链路；若有时钟失锁的第二链路，调整时钟失锁的第二链路的连续时间线性均衡参数的配置，并通过辅助链路932向第二设备92发送时钟失锁的第二链路时钟失锁的信息，也即第一设备91通过第三发送端9113向第三接收端9213发送时钟失锁的第二链路时钟失 锁的信息，第二设备92通过第三接收端9213接收该时钟失锁的第二链路时钟失锁的信息，之后进入重新进行训练；若没有时钟失锁的第二链路，根据该第二均衡序列进行均衡计算。其中，第二均衡序列在该n条第二链路中都需要传输，该n条第二链路中的每条第二链路都需要进行均衡计算。
第一设备91每次均衡计算完成后，会向第二设备92发送第二均衡计算结果，也即第一设备91通过第三发送端9113向第三接收端9213发送第二均衡计算结果，第二设备92通过第三接收端9213接收该第二均衡计算结果。第二均衡计算结果包括n条第二链路中的每条第二链路的均衡计算结果，当n条第二链路中存在均衡计算失败的第二链路时，第二发送端9212与第一接收端9112之间的链路均衡计算失败；否则第二发送端9212与第一接收端9112之间的链路均衡计算成功。
对于均衡计算失败的第二链路中的任一第二链路，第二设备92会调整其发送端前馈均衡参数的配置，然后第二设备92通过第四发送端9214向第四接收端9114发送发送端前馈均衡参数的配置更新完成的信息，第一设备91通过第四接收端9114接收到该发送端前馈均衡参数的配置更新完成的信息后，继续进行均衡计算，直至所有的第二链路均衡计算成功，进入链路检查。若可供调整的发送端前馈均衡预设值均已遍历过，还是无法使得所有的第二链路均衡计算成功，则说明第二链路链路训练失败。
在n条第二链路均已均衡计算成功以后，第一设备91开始进行链路检查，第一设备91每次链路检查完成后，会向第二设备92发送第二链路检查结果，也即第一设备91通过第三发送端9113向第三接收端9213发送第二链路检查结果，第二设备92通过第三接收端9213接收该第二链路检查结果。第二链路检查结果包括n条第二链路中的每条第二链路的链路检查结果，当n条第二链路中存在链路检查失败的第二链路时，第二发送端9212与第一接收端9112之间的链路链路检查失败，也即第二发送端9212与第一接收端9112之间的链路链路训练失败；否则第二发送端9212与第一接收端9112之间的链路链路训练成功。
需要说明的是，若第一发送端9111与第二接收端9211之间的链路比第二发送端9212与第一接收端9112之间的链路先链路训练成功，则第一发送端9111与第二接收端9211之间的链路链路训练成功后，第一发送端9111即可向第二接收端9211发送数据，而不用等第二发送端9212与第一接收端9112之间的链路链路训练成功才发送数据；若第二发送端9212与第一接收端9112之间的链路比第一发送端9111与第二接收端9211之间的链路先链路训练成功，则第二发送端9212与第一接收端9112之间的链路链路训练成功后，第二发送端9212即可向第一接收端9112发送数据，而不用等到第一发送端9111与第二接收端9211之间链路链路训练成功才发送数据。
七、链路保持
(1)对于第一链路：
第二设备92持续检查第一链路的链路状态，当第一链路出现异常时，通过辅助链路告知第一设备91。第一设备91也可根据需要向第二设备92查询当前第一链路的链路状态。
(2)对于第二链路：
第一设备91持续检查第二链路的链路状态，当第二链路出现异常时，通过辅助链路告知第二设备92。第二设备92也可根据需要向第一设备91查询当前第二链路的链路状态。
需要说明的是，上述第一设备91执行链路训练操作，可以通过第一处理器912执行；上述第二设备92执行链路训练操作，可以通过第二处理器922执行。但是，当第一接口911具备处理能力时，也即当第一接口911包括第一从处理器时，该第一从处理器耦合于第一发送端9111、第一接收端9112、第三发送端9113和第四接收端9114，例如第一从处理器为具备处理能力的芯片，上述第一设备91执行链路训练操作，通过第一接口911中的第一从处理器执行，也即，本申请实施例中的链路训练操作可以是由接口电路中的硬件逻辑或者处理器来执行的；同理，当第二接口921包括第二从处理器时，该第二从处理器耦合于第二接收端9211、第二发送端9212、第三接收端9213和第四发送端9214，例如第二从处理器为具备处理能力的芯片，上述第二设备92执行链路训练操作，通过第二接口921中的第二从处理器执行。
需要说明的是，图9、图10所描述第一设备91和第二设备92执行的操作，可参见上述图6至图8所示的实施例中的相关描述。
请参阅图11，图11是本申请实施例提供的一种链路训练方法的流程示意图，该方法应用于通信系统，该通信系统包括第一设备、第二设备以及连接第一设备和第二设备的线缆，第一设备包括第一发送端和第一接收端，第二设备包括第二发送端和第二接收端；线缆包括第一发送端到第二接收端的至少一条第一链路以及第二发送端到第一接收端的至少一条第二链路；其中，该方法可以应用于图9所示的通信系统；该方法包括但不限于如下步骤：
1101、第一设备进行至少一条第一链路的链路训练。
1102、第一设备在至少一条第二链路未进行链路训练的情况下，或者在至少一条第二链路的链路训练成功之前，通过链路训练成功的至少一条第一链路向第二设备发送数据。
1103、第二设备进行至少一条第一链路的链路训练。
1104、第二设备在至少一条第二链路未进行链路训练的情况下，或者在至少一条第二链路的链路训练成功之前，通过链路训练成功的至少一条第一链路接收来自第一设备的数据。
在本申请实施例中，第一设备与第二设备之间的链路包括从第一设备的第一发送端到第二设备的第二接收端的至少一条第一链路，以及第二设备的第二发送端到第一设备的第一接收端的至少一条第二链路；进行第一设备与第二设备之间的链路的链路训练包括对进行该至少一条第一链路的链路训练，以及进行该至少一条第二链路的链路训练，也即双向传输链路的链路训练；在该至少一条第二链路未进行链路训练的情况下，或者在该至少一条第二链路的链路训练成功之前，若该至少一条第一链路的链路训练成功，就可通过链路训练成功的该至少一条第一链路向第二设备发送数据，具体地为通过第一发送端向第二接收端发送数据；因此，本申请实施例中，能够实现双向传输链路的链路训练相互独立，每个方向上的训练流程互不耦合，故双向传输链路的训练速率和链路数不强绑定，链路训练的灵活性大幅提升；在双向传输链路中的其中一个方向上的链路训练成功后，该方向上即可进行业务传输，不必等到双向的链路都训练成功才开始进行业务传输，故业务传输更早，可适应更多、更复杂的场景。
在一种可能的实现方式中，线缆还包括辅助链路；第一设备进行至少一条第一链路的 链路训练，包括：第一设备通过辅助链路向第二设备发送第一速率，其中，第一速率为至少一条第一链路的链路训练速率；第一设备在将第一发送端的参数配置为第一训练参数值的情况下，以第一速率进行至少一条第一链路的时钟锁定、均衡计算和链路检查。
在本申请实施例中，线缆还包括辅助链路，进行至少一条第一链路的链路训练，第一设备通过辅助链路向第二设备发送第一速率，该第一速率为该至少一条第一链路的链路训练速率，从而第二设备可以知晓该至少一条第一链路的训练速率；第一设备还将第一发送端的参数配置为第一训练参数值，然后以该第一速率进行该至少一条第一链路的时钟锁定、均衡计算和链路检查，第二设备也在该第一速率下配合第一设备进行该至少一条第一链路的时钟锁定、均衡计算和链路检查；在时钟锁定、均衡计算和链路检查均成功的情况下，该至少一条第一链路的链路训练成功，第一设备将训练速率通过辅助链路发给第二设备，从而使得第一设备和第二设备采用相同的训练速率进行链路训练，有利于该至少一条第一链路的链路训练成功。
在一种可能的实现方式中，第一设备进行至少一条第一链路的时钟锁定、均衡计算和链路检查，包括：第一设备通过第一发送端向第二接收端发送第一时钟恢复序列；第一设备通过辅助链路接收来自第二设备的第一时钟锁定结果，其中，第一时钟锁定结果为时钟锁定成功或时钟锁定失败；第一设备在第一时钟锁定结果为时钟锁定成功的情况下，通过第一发送端向第二接收端发送第一均衡序列，第一均衡序列用于第二设备进行均衡计算；第一设备通过辅助链路接收来自第二设备的第一均衡计算结果或第一链路检查结果，其中，第一均衡计算结果为均衡计算失败，第一链路检查结果为链路检查成功或链路检查失败。
在本申请实施例中，第一设备通过第一发送端向第二接收端发送第一时钟恢复序列，该第一时钟恢复序列是用于第二设备进行时钟恢复和锁定的，以使得第二设备与第一设备的时钟是同步的；第二设备在完成时钟恢复和锁定后，会通过辅助链路向第一设备发送第一时钟锁定结果，当第二设备时钟锁定成功时，第一时钟锁定结果为时钟锁定成功；当第二设备时钟锁定失败时，第一时钟锁定结果为时钟锁定失败，其中，若第二设备时钟和锁定超，也认为第二设备时钟锁定失败。在第一时钟锁定结果为时钟锁定成功的情况下，第一设备通过第一发送端向第二接收端发送第一均衡序列，第一均衡序列用于第二设备进行均衡计算；当第二设备均衡计算失败时，会通过辅助链路发送第一均衡计算结果，第一均衡计算结果为均衡计算失败。当第二设备均衡计算成功时，进行链路检查，在链路检查完成后，通过辅助链路向第一设备发送第一链路检查结果；当第二设备链路检查失败时，第一链路检查结果为链路检查失败；当第二设备链路检成功时，第一链路检查结果为链路检查成功。如此，链路训练中，时钟锁定成功，可以使得第一设备与第二设备时钟同步；而均衡计算和链路检查可以使得链路均衡，当该至少一条第一链路的时钟锁定、均衡计算和链路检查均成功时，可以认为该至少一条第一链路的链路训练成功。示例性的，当第二设备均衡计算成功时，第二设备也可以选择通过辅助链路发送第一均衡计算结果，此种情况下，第一均衡计算结果为均衡计算成功。
在一种可能的实现方式中，第一时钟锁定结果包括至少一条第一链路中的每条第一链路的时钟锁定结果，在至少一条第一链路中存在时钟锁定失败的第一链路的情况下，第一时钟锁定结果为时钟锁定失败；否则，第一时钟锁定结果为时钟锁定成功。
在本申请实施例中，第一设备从第二设备处接收到的第一时钟锁定结果包括该至少一条第一链路中的每条第一链路的时钟锁定结果，而该至少一条第一链路的时钟锁定成功要求该至少一条第一链路中的每条第一链路都时钟锁定成功，只要该至少一条第一链路中存在时钟锁定失败的第一链路，该至少一条第一链路就时钟锁定失败；故第二设备将该至少一条第一链路中的每条第一链路的时钟锁定结果通过第一时钟锁定结果发给第一设备，有利于第一设备确定该至少一条第一链路的时钟锁定结果。
在一种可能的实现方式中，第一发送端的参数包括每条第一链路的电压摆幅；该方法还包括：第一设备判断至少一条第一链路中时钟锁定失败的第一链路的电压摆幅的配置是否遍历所有的电压摆幅预设值；若否，第一设备则将时钟锁定失败的第一链路的电压摆幅的配置从第一数值更新为第二数值，其中，所有的电压摆幅预设值包括第一数值和第二数值，第二数值为时钟锁定失败的第一链路的电压摆幅未配置过的数值；第一设备通过辅助链路向第二设备发送时钟锁定失败的第一链路的电压摆幅的配置更新完成的信息；其中，第一训练参数值包括电压摆幅训练值，时钟锁定失败的第一链路的电压摆幅的配置在首次更新时，第一值为电压摆幅训练值。
在本申请实施例中，第一发送端的参数包括每条第一链路的电压摆幅，第一发送端配置的电压摆幅的数值过高或过低，都会使得第二接收端无法时钟锁定成功，也即使得第二设备无法时钟锁定成功；当第二接收端时钟锁定失败时，也即该至少一条第一链路中存在时钟锁定失败的第一链路，第一设备判断时钟锁定失败的第一链路的电压摆幅的配置是否遍历所有的电压摆幅预设值；若否，第一设备则调整时钟锁定失败的第一链路的电压摆幅的配置，例如，将时钟锁定失败的第一链路的电压摆幅的配置更新为其还未配置过的数值，然后第一设备通过辅助链路告知第二设备该时钟锁定失败的第一链路的电压摆幅的配置更新完成；如此，第二设备就可以再次进行时钟恢复和锁定，从而在第二设备无法时钟锁定成功的情况下，通过调整第一链路的电压摆幅来使得第二设备时钟锁定成功。
在一种可能的实现方式中，第一均衡计算结果包括至少一条第一链路中的每条第一链路的均衡计算结果，在至少一条第一链路中存在均衡计算失败的第一链路的情况下，第一均衡计算结果为均衡计算失败。
在本申请实施例中，第一设备从第二设备处接收到的第一均衡计算结果包括该至少一条第一链路中的每条第一链路的均衡计算结果，而该至少一条第一链路的均衡计算成功要求该至少一条第一链路中的每条第一链路都均衡计算成功，只要该至少一条第一链路中存在均衡计算失败的第一链路，该至少一条第一链路就均衡计算失败；故第二设备将该至少一条第一链路中的每条第一链路的均衡计算结果通过第一均衡计算结果发给第一设备，有利于第一设备确定该至少一条第一链路的均衡计算结果。
在一种可能的实现方式中，第一均衡计算结果还包括至少一条第一链路中的每条第一链路的时钟失锁情况；该方法还包括：第一设备判断至少一条第一链路中是否存在时钟失锁的第一链路；若至少一条第一链路中存在时钟失锁的第一链路，第一设备则通过辅助链路向第二设备发送第一速率，以及通过第一发送端向第二接收端发送第一时钟恢复序列。
在本申请实施例中，均衡计算失败可能是因为在进行均衡计算时，链路时钟失锁导致的，故在第二设备均衡计算失败时，第一设备从第二设备接收到的第一均衡计算结果还包 括该至少一条第一链路中的每条第一链路的时钟失锁情况，如果该至少一条第一链路中存在时钟失锁的第一链路，则说明第二设备均衡计算失败可能是因为有第一链路发生链路失锁导致的；此种情况下，第一设备可以重新通过辅助链路向第二设备发送第一速率，以及通过第一发送端向第二接收端发送第一时钟恢复序列，第二设备重新接收到第一速率、第一时钟恢复序列后，重新进行链路训练，从而有利于使得链路训练成功。
在一种可能的实现方式中，第一发送端的参数包括每条第一链路的发送端前馈均衡参数；若至少一条第一链路中不存在时钟失锁的第一链路，该方法还包括：第一设备判断至少一条第一链路中均衡计算失败的第一链路的发送端前馈均衡参数的配置是否遍历所有的发送端前馈均衡预设值；若否，第一设备则将均衡计算失败的第一链路的发送端前馈均衡参数的配置从第三数值更新为第四数值，其中，所有的发送端前馈均衡预设值包括第三数值和第四数值，第四数值为均衡计算失败的第一链路的发送端前馈均衡参数未配置过的数值；第一设备通过辅助链路向第二设备发送均衡计算失败的第一链路的发送端前馈均衡参数的配置更新完成的信息；其中，第一训练参数值包括发送端前馈均衡训练值，均衡计算失败的第一链路的发送端前馈均衡参数的配置在首次更新时，第三值为发送端前馈均衡训练值。
在本申请实施例中，第一发送端的参数包括每条第一链路的发送端前馈均衡参数，发送端前馈均衡参数的数值的配置会影响链路均衡，也即影响均衡计算能否成功；当第二接收端均衡计算失败时，也即该至少一条第一链路中存在均衡计算失败的第一链路，第一设备判断均衡计算失败的第一链路的发送端前馈均衡参数的配置是否遍历所有的发送端前馈均衡预设值；若否，第一设备则调整均衡计算失败的第一链路的发送端前馈均衡参数的配置，例如，将均衡计算失败的第一链路的发送端前馈均衡参数的配置更新为其还未配置过的数值，然后第一设备通过辅助链路告知第二设备该均衡计算失败的第一链路的发送端前馈均衡参数的配置更新完成；如此，第二设备就可以再次进行均衡计算，从而在第二设备无法均衡计算成功的情况下，通过调整第一链路的发送端前馈均衡参数来使得第二设备均衡计算成功，有利于实现链路训练的均衡计算成功。
在一种可能的实现方式中，第一链路检查结果包括至少一条第一链路中的每条第一链路的链路检查结果，在至少一条第一链路中存在链路检查失败的第一链路的情况下，第一链路检查结果为链路检查失败；否则，第一链路检查结果为链路检查成功，至少一条第一链路的链路训练成功。
在本申请实施例中，第一设备从第二设备处接收到的第一链路检查结果包括该至少一条第一链路中的每条第一链路的链路检查结果，而该至少一条第一链路的链路检查成功要求该至少一条第一链路中的每条第一链路都链路检查成功，只要该至少一条第一链路中存在链路检查失败的第一链路，该至少一条第一链路就链路检查失败；故第二设备将该至少一条第一链路中的每条第一链路的链路检查结果通过第一链路检查结果发给第一设备，有利于第一设备确定该至少一条第一链路的链路检查结果。
在一种可能的实现方式中，线缆存储有线缆的线缆信息；第一设备存储有第一设备的设备信息；第二设备存储有第二设备的设备信息；该方法还包括：第一设备获取第一设备的设备信息，从线缆中获取线缆的线缆信息，以及通过辅助链路从第二设备中获取第二设 备的设备信息；第一设备根据第一设备的设备信息、线缆的线缆信息和第二设备的设备信息确定第一速率；第一设备根据第一速率确定第一训练参数值。
在本申请实施例中，线缆存储有线缆的线缆信息，线缆信息包括线缆能力信息、厂商信息、线缆的识别码、插损信息以及长度信息等信息；第一设备存储有第一设备的设备信息，第二设备存储有第二设备的设备信息，设备信息包括设备能力信息、设备名称、序列号、生产时间以及设备中的端口的端口信息等信息；第一设备获取自己存储的第一设备的设备信息，从线缆中获取线缆的线缆信息，以及通过辅助链路从第二设备中获取第二设备的设备信息；由于线缆信息可以用于表征线缆能力，设备信息可以用于表征设备能力，因此第一设备可以根据第一设备的设备信息、线缆的线缆信息和第二设备的设备信息确定训练速率；然后根据训练速率确定需要在第一发送端配置的第一训练参数值，示例性的，根据第一设备的能力信息、第二设备的能力信息、线缆的能力信息确定第一速率，然后根据第一速率和线缆信息中的插损信息确定第一训练参数值；如此，无需在最低速率、第一发送端的参数配置为初始值的情况下开始训练，而是可以在确定出来的速率下、第一发送端的参数配置为确定出的第一训练参数值下开始训练，有利于实现在较高速率下训练，减少训练时间。
在一种可能的实现方式中，该方法还包括：第一设备将以下信息中的至少一项存储：第一速率，线缆的线缆信息，第二设备的设备信息，线缆的正反插状态，或至少一条第一链路的链路训练成功后第一发送端的参数配置的值。
在本申请实施例中，链路训练成功以后，第一设备将训练速率、线缆的线缆信息(包括线缆的识别码)、第二设备的设备信息(包括第二接收端的端口信息)、线缆的正反插状态、第一发送端的参数配置的值(包括该至少一条第一链路中的每条第一链路的电压摆幅的值和发送端前馈均衡参数的值)中的至少一项存储起来；第一设备和第二设备再通该线缆再次训练时，可直接使用这些参数值，减少训练时间，提高训练速率。
在一种可能的实现方式中，线缆还包括辅助链路；第二设备进行至少一条第一链路的链路训练，包括：第二设备通过辅助链路接收来自第一设备的第一速率；第二设备在将第二接收端的参数配置为第二训练参数值的情况下，以第一速率进行至少一条第一链路的时钟锁定、均衡计算和链路检查。
在一种可能的实现方式中，第二设备进行至少一条第一链路的时钟锁定、均衡计算和链路检查，包括：第二设备通过第二接收端接收来自第一发送端的第一时钟恢复序列；第二设备根据第一时钟恢复序列进行时钟锁定，并通过辅助链路向第一设备发送第一时钟锁定结果，其中，第一时钟锁定结果为时钟锁定成功或时钟锁定失败；第二设备在时钟锁定成功的情况下，通过第二接收端接收来自第一发送端的第一均衡序列；第二设备根据第一均衡序列进行均衡计算；第二设备在均衡计算失败的情况下，通过辅助链路向第一设备发送第一均衡计算结果，其中，第一均衡计算结果为均衡计算失败；第二设备在均衡计算成功的情况下，进行链路检查，并通过辅助链路向第一设备发送第一链路检查结果，其中，第一链路检查结果为链路检查成功或链路检查失败。示例性的，当第二设备均衡计算成功时，第二设备也可以选择通过辅助链路发送第一均衡计算结果，此种情况下，第一均衡计算结果为均衡计算成功。
在一种可能的实现方式中，在至少一条第一链路中存在时钟锁定失败的第一链路的情况下，为时钟锁定失败；否则，为时钟锁定成功。
在一种可能的实现方式中，在至少一条第一链路中存在不满足以下条件中的至少一项的第一链路的情况下：字符定界成功、周期同步成功或误码率小于误码率1，为均衡计算失败；否则，为均衡计算成功。
在一种可能的实现方式中，第二接收端配置的参数包括连续时间线性均衡参数；第二设备在根据第一均衡序列进行均衡计算之前，该方法还包括：第二设备判断至少一条第一链路中是否存在时钟失锁的第一链路；若至少一条第一链路中存在时钟失锁的第一链路，第二设备则对时钟失锁的第一链路的连续时间线性均衡参数的配置进行更新，且通过辅助链路向第一设备发送时钟失锁的第一链路时钟失锁的信息。
在本申请实施例中，均衡计算失败可能是因为在进行均衡计算时，链路时钟失锁导致的，故在第二设备在进行均衡计算之前，判断该至少一条第一链路中是否存在时钟失锁的第一链路，如果存在时钟失锁的第一链路，则时钟失锁的第一链路的连续时间线性均衡参数的配置进行更新，然后通过辅助链路告知该时钟失锁的第一链路时钟失锁的信息；此种情况下，第一设备可以重新通过辅助链路向第二设备发送第一速率，以及通过第一发送端向第二接收端发送第一时钟恢复序列，第二设备重新接收到第一速率、第一时钟恢复序列后，重新进行链路训练，从而有利于使得链路训练成功。
在一种可能的实现方式中，在至少一条第一链路中存在不满足以下条件中的至少一项的第一链路的情况下：通道对齐或误码率小于误码率2，为链路检查失败；否则，为链路检查成功，至少一条第一链路的链路训练成功。
在一种可能的实现方式中，线缆存储有线缆的线缆信息；该方法还包括：从线缆中获取线缆的线缆信息；根据线缆的线缆信息和第一速率确定第二训练参数值。示例性的，根据第一速率和线缆信息中的插损信息确定第二训练参数值。
在一种可能的实现方式中，该方法还包括：第二设备将以下信息中的至少一项存储：第一速率，线缆的线缆信息，第一设备的设备信息，线缆的正反插状态，或至少一条第一链路的链路训练成功后第二接收端的参数配置的值；其中，第一设备的设备信息通过辅助链路从第一设备中获取。
在本申请实施例中，链路训练成功以后，第二设备将训练速率、线缆的线缆信息(包括线缆的识别码)、第一设备的设备信息(包括第一发送端的端口信息)、线缆的正反插状态、第二接收端的参数配置的值(包括该至少一条第一链路中的每条第一链路的连续时间线性均衡参数的值和判决反馈均衡参数的值)中的至少一项存储起来；第一设备和第二设备再通该线缆再次训练时，可直接使用这些参数值，减少训练时间，提高训练速率。
需要说明的是，本申请实施例中所描述的链路训练方法的具体流程，可参见上述图6至图10所示的实施例中的相关描述，此处不再赘述。
请参阅图12，图12是本申请实施例提供的一种链路训练装置的结构示意图，该链路训练装置1200应用于第一设备，第一设备与第二设备通过线缆连接，线缆包括至少一条第一链路和至少一条第二链路，链路训练装置包括：训练单元1201，用于进行至少一条第一 链路的链路训练，至少一条第一链路为由第一设备到第二设备的链路；发送单元1202，用于在至少一条第二链路未进行链路训练的情况下，或者在至少一条第二链路的链路训练成功之前，通过链路训练成功的至少一条第一链路向第二设备发送数据，至少一条第二链路为由第二设备到第一设备的链路。
在一种可能的实现方式中，第一设备包括第一发送端，第二设备包括第二接收端，至少一条第一链路为由第一发送端到第二接收端的链路；线缆还包括辅助链路；在进行至少一条第一链路的链路训练方面，训练单元1201具体用于：通过辅助链路向第二设备发送第一速率，其中，第一速率为至少一条第一链路的链路训练速率；在将第一发送端的参数配置为第一训练参数值的情况下，以第一速率进行至少一条第一链路的时钟锁定、均衡计算和链路检查。
在一种可能的实现方式中，在进行至少一条第一链路的时钟锁定、均衡计算和链路检查方面，训练单元1201具体用于：通过第一发送端向第二接收端发送第一时钟恢复序列；通过辅助链路接收来自第二设备的第一时钟锁定结果，其中，第一时钟锁定结果为时钟锁定成功或时钟锁定失败；在第一时钟锁定结果为时钟锁定成功的情况下，通过第一发送端向第二接收端发送第一均衡序列，第一均衡序列用于第二设备进行均衡计算；通过辅助链路接收来自第二设备的第一均衡计算结果或第一链路检查结果，其中，第一均衡计算结果为均衡计算失败，第一链路检查结果为链路检查成功或链路检查失败。
在一种可能的实现方式中，第一时钟锁定结果包括至少一条第一链路中的每条第一链路的时钟锁定结果，在至少一条第一链路中存在时钟锁定失败的第一链路的情况下，第一时钟锁定结果为时钟锁定失败；否则，第一时钟锁定结果为时钟锁定成功。
在一种可能的实现方式中，第一发送端的参数包括每条第一链路的电压摆幅；训练单元1201还用于：判断至少一条第一链路中时钟锁定失败的第一链路的电压摆幅的配置是否遍历所有的电压摆幅预设值；若否，则将时钟锁定失败的第一链路的电压摆幅的配置从第一数值更新为第二数值，其中，所有的电压摆幅预设值包括第一数值和第二数值，第二数值为时钟锁定失败的第一链路的电压摆幅未配置过的数值；通过辅助链路向第二设备发送时钟锁定失败的第一链路的电压摆幅的配置更新完成的信息；其中，第一训练参数值包括电压摆幅训练值，时钟锁定失败的第一链路的电压摆幅的配置在首次更新时，第一值为电压摆幅训练值。
在一种可能的实现方式中，第一均衡计算结果包括至少一条第一链路中的每条第一链路的均衡计算结果，在至少一条第一链路中存在均衡计算失败的第一链路的情况下，第一均衡计算结果为均衡计算失败。
在一种可能的实现方式中，第一均衡计算结果还包括至少一条第一链路中的每条第一链路的时钟失锁情况；训练单元1201还用于：判断至少一条第一链路中是否存在时钟失锁的第一链路；若至少一条第一链路中存在时钟失锁的第一链路，则通过辅助链路向第二设备发送第一速率，以及通过第一发送端向第二接收端发送第一时钟恢复序列。
在一种可能的实现方式中，第一发送端的参数包括每条第一链路的发送端前馈均衡参数；若至少一条第一链路中不存在时钟失锁的第一链路，训练单元1201还用于：判断至少一条第一链路中均衡计算失败的第一链路的发送端前馈均衡参数的配置是否遍历所有的发 送端前馈均衡预设值；若否，则将均衡计算失败的第一链路的发送端前馈均衡参数的配置从第三数值更新为第四数值，其中，所有的发送端前馈均衡预设值包括第三数值和第四数值，第四数值为均衡计算失败的第一链路的发送端前馈均衡参数未配置过的数值；通过辅助链路向第二设备发送均衡计算失败的第一链路的发送端前馈均衡参数的配置更新完成的信息；其中，第一训练参数值包括发送端前馈均衡训练值，均衡计算失败的第一链路的发送端前馈均衡参数的配置在首次更新时，第三值为发送端前馈均衡训练值。
在一种可能的实现方式中，第一链路检查结果包括至少一条第一链路中的每条第一链路的链路检查结果，在至少一条第一链路中存在链路检查失败的第一链路的情况下，第一链路检查结果为链路检查失败；否则，第一链路检查结果为链路检查成功，至少一条第一链路的链路训练成功。
在一种可能的实现方式中，线缆存储有线缆的线缆信息；第一设备存储有第一设备的设备信息；第二设备存储有第二设备的设备信息；训练单元1201还用于：获取第一设备的设备信息，从线缆中获取线缆的线缆信息，以及通过辅助链路从第二设备中获取第二设备的设备信息；根据第一设备的设备信息、线缆的线缆信息和第二设备的设备信息确定第一速率；根据第一速率确定第一训练参数值。
在一种可能的实现方式中，训练单元1201还用于：将以下信息中的至少一项存储：第一速率，线缆的线缆信息，第二设备的设备信息，线缆的正反插状态，或至少一条第一链路的链路训练成功后第一发送端的参数配置的值。
需要说明的是，本申请实施例中各个单元的实现还可以对应参照图6至图11所示的实施例中的相关描述，此处不再赘述。当然，本申请实施例提供的链路训练装置1200包括但不限于上述单元模块，例如：该链路训练装置1200还可以包括存储单元1203。该存储单元1203可以用于存储该链路训练装置1200的程序代码和数据。
在图12所描述的链路训练装置1200中，进行至少一条第一链路的链路训练，在该至少一条第二链路未进行链路训练的情况下，或者在该至少一条第二链路的链路训练成功之前，若该至少一条第一链路的链路训练成功，就可通过链路训练成功的该至少一条第一链路向第二设备发送数据；因此，本申请实施例中，能够实现双向传输链路的链路训练相互独立，每个方向上的训练流程互不耦合，故双向传输链路的训练速率和链路数不强绑定，链路训练的灵活性大幅提升；在双向传输链路中的其中一个方向上的链路训练成功后，该方向上即可进行业务传输，不必等到双向的链路都训练成功才开始进行业务传输，故业务传输更早，可适应更多、更复杂的场景。
请参阅图13，图13是本申请实施例提供的另一种链路训练装置的结构示意图，该链路训练装置1300应用于第一设备，第一设备与第二设备通过线缆连接，线缆包括至少一条第一链路和至少一条第二链路，链路训练装置包括：训练单元1301，用于进行至少一条第一链路的链路训练，至少一条第一链路为由第一设备到第二设备的链路；接收单元1302，用于在至少一条第二链路未进行链路训练的情况下，或者在至少一条第二链路的链路训练成功之前，通过链路训练成功的至少一条第一链路接收来自第一设备的数据，至少一条第二链路为由第二设备到第一设备的链路。
在一种可能的实现方式中，第一设备包括第一发送端，第二设备包括第二接收端，至少一条第一链路为由第一发送端到第二接收端的链路；线缆还包括辅助链路；在进行至少一条第一链路的链路训练方面，训练单元1301具体用于：通过辅助链路接收来自第一设备的第一速率；在将第二接收端的参数配置为第二训练参数值的情况下，以第一速率进行至少一条第一链路的时钟锁定、均衡计算和链路检查。
在一种可能的实现方式中，在进行至少一条第一链路的时钟锁定、均衡计算和链路检查方面，训练单元1301具体用于：通过第二接收端接收来自第一发送端的第一时钟恢复序列；根据第一时钟恢复序列进行时钟锁定，并通过辅助链路向第一设备发送第一时钟锁定结果，其中，第一时钟锁定结果为时钟锁定成功或时钟锁定失败；在时钟锁定成功的情况下，通过第二接收端接收来自第一发送端的第一均衡序列；根据第一均衡序列进行均衡计算；在均衡计算失败的情况下，通过辅助链路向第一设备发送第一均衡计算结果，其中，第一均衡计算结果为均衡计算失败；在均衡计算成功的情况下，进行链路检查，并通过辅助链路向第一设备发送第一链路检查结果，其中，第一链路检查结果为链路检查成功或链路检查失败。
在一种可能的实现方式中，在至少一条第一链路中存在时钟锁定失败的第一链路的情况下，为时钟锁定失败；否则，为时钟锁定成功。
在一种可能的实现方式中，在至少一条第一链路中存在不满足以下条件中的至少一项的第一链路的情况下：字符定界成功、周期同步成功或误码率小于误码率1，为均衡计算失败；否则，为均衡计算成功。
在一种可能的实现方式中，第二接收端配置的参数包括连续时间线性均衡参数；训练单元1301还用于：在根据第一均衡序列进行均衡计算之前，判断至少一条第一链路中是否存在时钟失锁的第一链路；若至少一条第一链路中存在时钟失锁的第一链路，则对时钟失锁的第一链路的连续时间线性均衡参数的配置进行更新，且通过辅助链路向第一设备发送时钟失锁的第一链路时钟失锁的信息。
在一种可能的实现方式中，在至少一条第一链路中存在不满足以下条件中的至少一项的第一链路的情况下：通道对齐或误码率小于误码率2，为链路检查失败；否则，为链路检查成功，至少一条第一链路的链路训练成功。
在一种可能的实现方式中，线缆存储有线缆的线缆信息；训练单元1301还用于：从线缆中获取线缆的线缆信息；根据线缆的线缆信息和第一速率确定第二训练参数值。
在一种可能的实现方式中，训练单元1301还用于：将以下信息中的至少一项存储：第一速率，线缆的线缆信息，第一设备的设备信息，线缆的正反插状态，或至少一条第一链路的链路训练成功后第二接收端的参数配置的值；其中，第一设备的设备信息通过辅助链路从第一设备中获取。
需要说明的是，本申请实施例中各个单元的实现还可以对应参照图6至图11所示的实施例中的相关描述，此处不再赘述。当然，本申请实施例提供的链路训练装置1300包括但不限于上述单元模块，例如：该链路训练装置1300还可以包括存储单元1303。该存储单元1303可以用于存储该链路训练装置1300的程序代码和数据。
在图13所描述的链路训练装置1300中，进行至少一条第一链路的链路训练，在该至 少一条第二链路未进行链路训练的情况下，或者在该至少一条第二链路的链路训练成功之前，若该至少一条第一链路的链路训练成功，就可通过链路训练成功的该至少一条第一链路接收来自第一设备的数据；因此，本申请实施例中，能够实现双向传输链路的链路训练相互独立，每个方向上的训练流程互不耦合，故双向传输链路的训练速率和链路数不强绑定，链路训练的灵活性大幅提升；在双向传输链路中的其中一个方向上的链路训练成功后，该方向上即可进行业务传输，不必等到双向的链路都训练成功才开始进行业务传输，故业务传输更早，可适应更多、更复杂的场景。
请参阅图14，图14是本申请实施例提供的一种电子设备的结构示意图。应当理解，该电子设备1400可以是前述第一设备或第二设备。该电子设备1400可以包括天线系统1410、射频(Radio Frequency，RF)电路1420、处理器1430、存储器1440、摄像头1450、音频电路1460、显示屏1470、一个或多个传感器1480和无线收发器1490等。
天线系统1410可以是一个或多个天线，还可以是由多个天线组成的天线阵列。射频电路1420可以包括一个或多个模拟射频收发器，该射频电路1420还可以包括一个或多个数字射频收发器，该射频电路1420耦合到天线系统1410。应当理解，本申请的各个实施例中，耦合是指通过特定方式的相互联系，包括直接相连或者通过其他设备间接相连，例如可以通过各类接口、传输线、总线等相连。该射频电路1420可用于各类蜂窝无线通信。
处理器1430可包括通信处理器，该通信处理器可用来控制射频电路1420通过天线系统1410实现信号的接收和发送，该信号可以是语音信号、媒体信号或控制信号。该处理器1430可以包括各种通用处理设备，例如可以是通用中央处理器(Central Processing Unit，CPU)、片上系统(System on Chip，SOC)、集成在SOC上的处理器、单独的处理器芯片或控制器等；该处理器1430还可以包括专用处理设备，例如专用集成电路(Application Specific Integrated Circuit，ASIC)、现场可编程门阵列(Field Programmable Gate Array，FPGA)或数字信号处理器(Digital Signal Processor，DSP)、专用的视频或图形处理器、图形处理单元(Graphics Processing Unit，GPU)以及神经网络处理单元(Neural-network Processing Unit，NPU)等。该处理器1430可以是多个处理器构成的处理器组，多个处理器之间通过一个或多个总线彼此耦合。该处理器可以包括模拟-数字转换器(Analog-to-Digital Converter，ADC)、数字-模拟转换器(Digital-to-Analog Converter，DAC)以实现装置不同部件之间信号的连接。
存储器1440耦合到处理器1430，具体的，该存储器1440可以通过一个或多个存储器控制器耦合到处理器1430。存储器1440可以用于存储计算机程序指令，包括计算机操作系统(Operation System，OS)，各种用户应用程序和用户数据等。处理器1430可以从存储器1440读取计算机程序指令或用户数据，或者向存储器1440存入计算机程序指令或用户数据，以实现相关的处理功能。该存储器1440可以是非掉电易失性存储器，例如是EMMC(Embedded Multi Media Card，嵌入式多媒体卡)、UFS(Universal Flash Storage，通用闪存存储)或只读存储器(Read-Only Memory，ROM)，或者是可存储静态信息和指令的其他类型的静态存储设备，还可以是掉电易失性存储器(volatile memory)，例如随机存取存储器(Random Access Memory，RAM)、静态随机存取存储器(Static random-access memory， SRAM)或者可存储信息和指令的其他类型的动态存储设备，也可以是电可擦可编程只读存储器(Electrically Erasable Programmable Read-Only Memory，EEPROM)、只读光盘(Compact Disc Read-Only Memory，CD-ROM)或其他光盘存储器、光碟存储器(包括压缩光碟、激光碟、数字通用光碟或蓝光光碟等)、磁盘存储介质或者其他磁存储设备，但不限于此。可选的，存储器1440可以独立在处理器1430之外，存储器1440也可以和处理器1430集成在一起。
摄像头1450用于采集图像或视频，音频电路1460与处理器1430耦合。该音频电路1460可以包括麦克风1461和扬声器1462，麦克风1461可以从外界接收声音输入，扬声器1462可以实现音频数据的播放。
显示屏1470，用于向用户提供各种显示界面或者可供选择的各种菜单信息，示例性的，显示屏1470显示的内容包括但不限于，软键盘、虚拟鼠标、虚拟按键和图标等，这些显示内容与内部的具体模块或功能相关联，显示屏1470还可以接受用户输入，具体的，显示屏1470可以包括显示面板1471和触控面板1472。
传感器1480可以包括图像传感器、运动传感器、接近度传感器、环境噪声传感器、声音传感器、加速率计、温度传感器、陀螺仪或者其他类型的传感器，以及它们的各种形式的组合。处理器1430通过I/O子系统140中的传感器控制器142驱动传感器1480接收音频信息、图像信息或运动信息等各种信息，传感器1480将接收的信息传到处理器1430中进行处理。
无线收发器1490，该无线收发器1490可以向其他设备提供无线连接能力，其他设备可以是无线耳麦、蓝牙耳机、无线鼠标或无线键盘等外围设备，也可以是无线网络，例如无线保真(Wireless Fidelity，WiFi)网络、无线个人局域网络(Wireless Personal Area Network，WPAN)或者其WLAN等。无线收发器1490可以是蓝牙兼容的收发器，用于将处理器1430以无线方式耦合到蓝牙耳机、无线鼠标等外围设备，该无线收发器1490也可以是WiFi兼容的收发器，用于将处理器1430以无线方式耦合到无线网络或其他设备。
电子设备1400还可以包括其他输入设备144，耦合到处理器1430以接收各种用户输入，例如接收输入的号码、姓名、地址以及媒体选择等，其他输入设备144可以包括键盘、物理按钮(按压按钮、摇臂按钮等)、拨号盘或滑动开关等。电子设备1400还可以包括上述的I/O子系统140和电源1401。应当理解，图14中的电子设备1400仅仅是一种示例，对电子设备1400的具体形态不构成限定，电子设备1400还可以包括图14中未显示出来的现有的或者将来可能增加的其他组成部分。
请参阅图15，图15是本申请实施例提供的另一种电子设备的结构示意图。该电子设备可以是前述第一设备或第二设备，该电子设备1500包括：至少一个CPU，存储器，存储器的类型例如可以包括SRAM和ROM，微控制器(Micro controller Unit，MCU)、WLAN子系统、总线、传输接口等。虽然图15中未示出，该电子设备1500还可以包括应用处理器(Application Processor，AP)，NPU等其他专用处理器，以及电源管理子系统、时钟管理子系统和功耗管理子系统等其他子系统。
电子设备1500的上述各个部分通过连接器相耦合，示例性的，连接器包括各类接口、 传输线或总线等，这些接口通常是电性通信接口，但是也可能是机械接口或其它形式的接口，本实施例对此不做限定。
可选的，CPU可以是一个单核(single-CPU)处理器或多核(multi-CPU)处理器；可选的，CPU可以是多个处理器构成的处理器组，多个处理器之间通过一个或多个总线彼此耦合。在一种可选的情况中，CPU通过调用片上述存储器或者片外存储器中存储的程序指令实现如前述方法实施例中的任一种链路训练方法。在一种可选的情况中，CPU和MCU共同实现如前述方法实施例中的任一种链路训练方法，例如CPU完成链路训练方法中的部分步骤，而MCU完成链路训练方法中的其他步骤。在一种可选的情况中，AP或者其他专用处理器通过调用片上述存储器或者片外存储器中存储的程序指令实现如前述方法实施例中的任一种链路训练方法。
该传输接口可以为处理器芯片的接收和发送数据的接口，该传输接口通常包括多种接口，在一种可选的情况下，该传输接口可以包括内部整合电路(Inter-Integrated Circuit，I2C)接口、串行外设接口(Serial Peripheral Interface，SPI)、通用异步收发机(Universal asynchronous receiver-transmitter，UART)接口、通用输入输出(General-purpose input/output，GPIO)接口等。应当理解，这些接口可以是通过复用相同的物理接口来实现不同的功能。
在一种可选的情况中，传输接口还可以包括高清晰度多媒体接口(High Definition Multimedia Interface，HDMI)、V-By-One接口、嵌入式显示端口(Embedded Display Port，eDP)、移动产业处理器接口(Mobile Industry Processor Interface，MIPI)或Display Port(DP)等。
在一种可选的情况中，上述各部分集成在同一个芯片上；在另一种可选的情况中，存储器可以是独立存在的芯片。
WLAN子系统例如可以包括射频电路和基带。
在本申请实施例中涉及的芯片是以集成电路工艺制造在同一个半导体衬底上的系统，也叫半导体芯片，其可以是利用集成电路工艺制作在衬底(通常是例如硅一类的半导体材料)上形成的集成电路的集合，其外层通常被半导体封装材料封装。所述集成电路可以包括各类功能器件，每一类功能器件包括逻辑门电路、金属氧化物半导体(Metal-Oxide-Semiconductor，MOS)晶体管、双极晶体管或二极管等晶体管，也可包括电容、电阻或电感等其他部件。每个功能器件可以独立工作或者在必要的驱动软件的作用下工作，可以实现通信、运算、或存储等各类功能。
本申请实施例还提供了一种链路训练装置，包括处理器和传输接口，所述处理器被配置为调用存储在存储器中的程序，以使得所述链路训练装置实现如上述方法实施例中的方法。
本申请实施例还提供了一种计算机可读存储介质，所述计算机可读存储介质包括计算机程序，当所述计算机程序在计算机或处理器上运行时，使得所述计算机或所述处理器进行如上述方法实施例中的方法。
本申请实施例还提供了一种计算机程序产品，所述计算机程序产品包括计算机程序，当所述计算机程序在计算机或处理器上运行时，使得所述计算机或所述处理器进行如上述 方法实施例中的方法。
综上可知，第一设备和第二设备上电且准备好后，上行口和下行口分别向对端设备读取能力，下行口决策上行方向和下行方向的链路数，上行口决策上行方向的训练速率，下行口决策下行方向的训练速率。上行口和下行口的发送端和接收端根据训练速率获取历史已训练成功的参数值，或根据线缆信息中插损信息估算出一组训练参数值后，由上行口或下行口的发送端发起训练。接收端根据发送端发来的时钟恢复序列对各链路进行时钟恢复，接收端根据发送端发来的均衡序列对各链路进行均衡计算和链路检查。发送端等待接收端反馈各链路的训练状态，若有任何一条链路训练不成功，发送端调整电压摆幅值或发送端前馈均衡值。当所有链路状态均成功后，该方向训练成功。某一方向训练成功后，发送端和接收端保存本次训练的训练参数值，下次训练时可直接获取使用，以加快训练速度。同时，该方向的业务可开始传输(例如如视频、音频业务传输)。其中，上行方向的链路数与下行方向的链路数可不相等，上行方向的训练速率与下行方向的训练速率可不相等。训练过程由全双工辅助链路完成辅助信息交互。获取或估算的参数值包括：发送端的电压摆幅值、前馈均衡值，接收端的连续时间线性均衡值、判决反馈均衡值。上行方向的训练与下行方向的训练可同步进行，也可异步进行。若无法获取训练相关的参数值也无线缆信息的情况下，在第一设备和第二设备未断开连接时，仍可使用前一次训练成功的参数值。第一设备和第二设备断开后，可以将训练相关参数复位为初始值。均衡计算为均衡粗调，其出口条件包括：所有链路字符定界、周期同步、误码率1检查；任一条件不满足时，发送端调整该链路的发送端前馈均衡值；粗调阶段增加误码率检查，以降低链路检查(均衡细调)失败概率。链路检查包含通道对齐及各链路误码率2检查(误码率2<误码率1)。训练成功后，发送端需要存储的信息包括但不限于：接收端设备的设备信息(包括接收端的端口信息)，各链路的电压摆幅值、各链路发送端前馈均衡值、线缆正反插状态；接收端需要存储的信息包括但不限于：发送端设备的设备信息(包括发送端的端口信息)、各链路的连续时间线性均衡值、各链路的判决反馈均衡值、线缆正反插状态。存储介质为非易失性器件，例如可擦除可编程只读存储器、闪存存储器、内嵌式多媒体存储器等。通过该训练方法，可以让双向传输链路的训练相互独立，训练流程互不耦合，双向速率和链路数不强绑定，灵活性大幅提升；在某一方向训练成功后，该方向的业务即可传输，不必等到双向都训练成功，业务传输更早，可适应更多、更复杂的场景；可通过线缆信息对训练相关参数的值进行估算，并将训练成功的参数值存储到非易失器件中，支持刷新，下次训练可直接使用，减少训练时间，提高训练速率；在拔插、线缆来回更换、设备来回更换等复杂场景下，仍可加快训练速度；可以有效缩短物理链路建链时间，对于系统启动需要快速点屏等应用场景都有很好的效果；通过双向辅助链路完成训练相关信息交互，由主动告知替代软件轮训，可降低对软件的要求，减少软件开销。
应理解，在本申请的各种实施例中，上述各过程的序号的大小并不意味着执行顺序的先后，各过程的执行顺序应以其功能和内在逻辑确定，而不应对本申请实施例的实施过程构成任何限定。
本领域普通技术人员可以意识到，结合本说明书中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究 竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统、装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，上述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
上述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
上述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例上述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(Read-Only Memory，ROM)、随机存取存储器(Random Access Memory，RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
本申请实施例方法中的步骤可以根据实际需要进行顺序调整、合并和删减。此外，本申请各实施例中的术语、解释说明，可以参照其他实施例中相应的描述。
本申请实施例装置中的模块可以根据实际需要进行合并、划分和删减。
以上描述，以上实施例仅用以说明本申请的技术方案，而非对其限制；尽管参照前述实施例对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例技术方案的范围。

Claims (27)

  1. 一种链路训练方法，其特征在于，应用于第一设备，所述第一设备与第二设备通过线缆连接，所述第一设备包括第一发送端和第一接收端，所述第二设备包括第二发送端和第二接收端；所述线缆包括所述第一发送端到所述第二接收端的至少一条第一链路以及所述第二发送端到所述第一接收端的至少一条第二链路；所述方法包括：
    进行所述至少一条第一链路的链路训练；
    在所述至少一条第二链路未进行链路训练的情况下，或者在所述至少一条第二链路的链路训练成功之前，通过链路训练成功的至少一条第一链路向所述第二设备发送数据。
  2. 根据权利要求1所述的方法，其特征在于，所述至少一条第一链路的链路数量和所述至少一条第二链路的链路数量由所述第一设备确定，或所述至少一条第一链路的链路数量和所述至少一条第二链路的链路数量由所述第一设备根据所述第二设备的请求确定。
  3. 根据权利要求1或2所述的方法，其特征在于，所述线缆还包括辅助链路；所述进行所述至少一条第一链路的链路训练，包括：
    通过所述辅助链路向所述第二设备发送第一速率，其中，所述第一速率为所述至少一条第一链路的链路训练速率；
    在将所述第一发送端的参数配置为第一训练参数值的情况下，以所述第一速率进行所述至少一条第一链路的时钟锁定、均衡计算和链路检查。
  4. 根据权利要求3所述的方法，其特征在于，所述进行所述至少一条第一链路的时钟锁定、均衡计算和链路检查，包括：
    通过所述第一发送端向所述第二接收端发送第一时钟恢复序列；
    通过所述辅助链路接收来自所述第二设备的第一时钟锁定结果，其中，第一时钟锁定结果为时钟锁定成功或时钟锁定失败；
    在所述第一时钟锁定结果为时钟锁定成功的情况下，通过所述第一发送端向所述第二接收端发送第一均衡序列，所述第一均衡序列用于所述第二设备进行均衡计算；
    通过所述辅助链路接收来自所述第二设备的第一均衡计算结果或第一链路检查结果，其中，所述第一均衡计算结果为均衡计算失败，所述第一链路检查结果为链路检查成功或链路检查失败。
  5. 根据权利要求4所述的方法，其特征在于，
    所述第一时钟锁定结果包括所述至少一条第一链路中的每条第一链路的时钟锁定结果，在所述至少一条第一链路中存在时钟锁定失败的第一链路的情况下，所述第一时钟锁定结果为时钟锁定失败；
    否则，所述第一时钟锁定结果为时钟锁定成功。
  6. 根据权利要求5所述的方法，其特征在于，所述第一发送端的参数包括所述每条第一链路的电压摆幅；所述方法还包括：
    判断所述至少一条第一链路中时钟锁定失败的第一链路的电压摆幅的配置是否遍历所有的电压摆幅预设值；
    若否，则将所述时钟锁定失败的第一链路的电压摆幅的配置从第一数值更新为第二数值，其中，所述所有的电压摆幅预设值包括所述第一数值和所述第二数值，所述第二数值为所述时钟锁定失败的第一链路的电压摆幅未配置过的数值；
    通过所述辅助链路向所述第二设备发送所述时钟锁定失败的第一链路的电压摆幅的配置更新完成的信息；
    其中，所述第一训练参数值包括电压摆幅训练值，所述时钟锁定失败的第一链路的电压摆幅的配置在首次更新时，所述第一值为所述电压摆幅训练值。
  7. 根据权利要求4-6任一项所述的方法，其特征在于，
    所述第一均衡计算结果包括所述至少一条第一链路中的每条第一链路的均衡计算结果，在所述至少一条第一链路中存在均衡计算失败的第一链路的情况下，所述第一均衡计算结果为均衡计算失败。
  8. 根据权利要求7所述的方法，其特征在于，所述第一均衡计算结果还包括所述至少一条第一链路中的每条第一链路的时钟失锁情况；所述方法还包括：
    判断所述至少一条第一链路中是否存在时钟失锁的第一链路；
    若所述至少一条第一链路中存在时钟失锁的第一链路，则通过所述辅助链路向所述第二设备发送所述第一速率，以及通过所述第一发送端向所述第二接收端发送所述第一时钟恢复序列。
  9. 根据权利要求8所述的方法，其特征在于，所述第一发送端的参数包括所述每条第一链路的发送端前馈均衡参数；若所述至少一条第一链路中不存在时钟失锁的第一链路，所述方法还包括：
    判断所述至少一条第一链路中均衡计算失败的第一链路的发送端前馈均衡参数的配置是否遍历所有的发送端前馈均衡预设值；
    若否，则将所述均衡计算失败的第一链路的发送端前馈均衡参数的配置从第三数值更新为第四数值，其中，所述所有的发送端前馈均衡预设值包括所述第三数值和所述第四数值，所述第四数值为所述均衡计算失败的第一链路的发送端前馈均衡参数未配置过的数值；
    通过所述辅助链路向所述第二设备发送所述均衡计算失败的第一链路的发送端前馈均衡参数的配置更新完成的信息；
    其中，所述第一训练参数值包括发送端前馈均衡训练值，所述均衡计算失败的第一链路的发送端前馈均衡参数的配置在首次更新时，所述第三值为所述发送端前馈均衡训练值。
  10. 根据权利要求4-9任一项所述的方法，其特征在于，
    所述第一链路检查结果包括所述至少一条第一链路中的每条第一链路的链路检查结果，在所述至少一条第一链路中存在链路检查失败的第一链路的情况下，所述第一链路检查结果为链路检查失败；
    否则，所述第一链路检查结果为链路检查成功，所述至少一条第一链路的链路训练成功。
  11. 根据权利要求4-10任一项所述的方法，其特征在于，所述线缆存储有所述线缆的线缆信息；所述第一设备存储有所述第一设备的设备信息；所述第二设备存储有所述第二设备的设备信息；所述方法还包括：
    获取所述第一设备的设备信息，从所述线缆中获取所述线缆的线缆信息，以及通过所述辅助链路从所述第二设备中获取所述第二设备的设备信息；
    根据所述第一设备的设备信息、所述线缆的线缆信息和所述第二设备的设备信息确定所述第一速率；
    根据所述第一速率确定所述第一训练参数值。
  12. 根据权利要求11所述的方法，其特征在于，所述方法还包括：将以下信息中的至少一项存储：
    所述第一速率，所述线缆的线缆信息，所述第二设备的设备信息，所述线缆的正反插状态，或所述至少一条第一链路的链路训练成功后所述第一发送端的参数配置的值。
  13. 一种链路训练方法，其特征在于，应用于第二设备，所述第二设备与第一设备通过线缆连接，所述第一设备包括第一发送端和第一接收端，所述第二设备包括第二发送端和第二接收端；所述线缆包括所述第一发送端到所述第二接收端的至少一条第一链路以及所述第二发送端到所述第一接收端的至少一条第二链路；所述方法包括：
    进行所述至少一条第一链路的链路训练；
    在所述至少一条第二链路未进行链路训练的情况下，或者在所述至少一条第二链路的链路训练成功之前，通过链路训练成功的至少一条第一链路接收来自所述第一设备的数据。
  14. 根据权利要求13所述的方法，其特征在于，所述至少一条第一链路的链路数量和所述至少一条第二链路的链路数量由所述第一设备确定，或所述至少一条第一链路的链路数量和所述至少一条第二链路的链路数量由所述第一设备根据所述第二设备的请求确定。
  15. 根据权利要求13或14所述的方法，其特征在于，所述线缆还包括辅助链路；所述进行所述至少一条第一链路的链路训练，包括：
    通过所述辅助链路接收来自所述第一设备的第一速率；
    在将所述第二接收端的参数配置为第二训练参数值的情况下，以所述第一速率进行所述至少一条第一链路的时钟锁定、均衡计算和链路检查。
  16. 根据权利要求15所述的方法，其特征在于，所述进行所述至少一条第一链路的时钟锁定、均衡计算和链路检查，包括：
    通过所述第二接收端接收来自所述第一发送端的第一时钟恢复序列；
    根据所述第一时钟恢复序列进行时钟锁定，并通过所述辅助链路向所述第一设备发送第一时钟锁定结果，其中，第一时钟锁定结果为所述时钟锁定成功或所述时钟锁定失败；
    在所述时钟锁定成功的情况下，通过所述第二接收端接收来自所述第一发送端的第一均衡序列；
    根据所述第一均衡序列进行均衡计算；
    在所述均衡计算失败的情况下，通过所述辅助链路向所述第一设备发送第一均衡计算结果，其中，所述第一均衡计算结果为所述均衡计算失败；
    在所述均衡计算成功的情况下，进行链路检查，并通过所述辅助链路向所述第一设备发送第一链路检查结果，其中，所述第一链路检查结果为所述链路检查成功或所述链路检查失败。
  17. 根据权利要求16所述的方法，其特征在于，
    在所述至少一条第一链路中存在时钟锁定失败的第一链路的情况下，为所述时钟锁定失败；
    否则，为所述时钟锁定成功。
  18. 根据权利要求16或17所述的方法，其特征在于，
    在所述至少一条第一链路中存在不满足以下条件中的至少一项的第一链路的情况下：字符定界成功、周期同步成功或误码率小于误码率1，为所述均衡计算失败；
    否则，为所述均衡计算成功。
  19. 根据权利要求16-18任一项所述的方法，其特征在于，所述第二接收端配置的参数包括连续时间线性均衡参数；在所述根据所述第一均衡序列进行均衡计算之前，所述方法还包括：
    判断所述至少一条第一链路中是否存在时钟失锁的第一链路；
    若所述至少一条第一链路中存在时钟失锁的第一链路，则对所述时钟失锁的第一链路的连续时间线性均衡参数的配置进行更新，且通过所述辅助链路向所述第一设备发送所述时钟失锁的第一链路时钟失锁的信息。
  20. 根据权利要求16-19任一项所述的方法，其特征在于，
    在所述至少一条第一链路中存在不满足以下条件中的至少一项的第一链路的情况下：通道对齐或误码率小于误码率2，为所述链路检查失败；
    否则，为所述链路检查成功，所述至少一条第一链路的链路训练成功。
  21. 根据权利要求15-20任一项所述的方法，其特征在于，所述线缆存储有所述线缆的线 缆信息；所述方法还包括：
    从所述线缆中获取所述线缆的线缆信息；
    根据所述线缆的线缆信息和所述第一速率确定所述第二训练参数值。
  22. 根据权利要求21所述的方法，其特征在于，所述方法还包括：将以下信息中的至少一项存储：
    所述第一速率，所述线缆的线缆信息，所述第一设备的设备信息，所述线缆的正反插状态，或所述至少一条第一链路的链路训练成功后所述第二接收端的参数配置的值；
    其中，所述第一设备的设备信息通过所述辅助链路从所述第一设备中获取。
  23. 一种链路训练装置，其特征在于，应用于第一设备，所述第一设备与第二设备通过线缆连接，所述线缆包括至少一条第一链路和至少一条第二链路，所述链路训练装置包括：
    训练单元，用于进行所述至少一条第一链路的链路训练，所述至少一条第一链路为由所述第一设备到所述第二设备的链路；
    发送单元，用于在所述至少一条第二链路未进行链路训练的情况下，或者在所述至少一条第二链路的链路训练成功之前，通过链路训练成功的至少一条第一链路向所述第二设备发送数据，所述至少一条第二链路为由所述第二设备到所述第一设备的链路。
  24. 一种链路训练装置，其特征在于，应用于第二设备，所述第二设备与第一设备通过线缆连接，所述线缆包括至少一条第一链路和至少一条第二链路，所述链路训练装置包括：
    训练单元，用于进行所述至少一条第一链路的链路训练，所述至少一条第一链路为由所述第一设备到所述第二设备的链路；
    接收单元，用于在所述至少一条第二链路未进行链路训练的情况下，或者在所述至少一条第二链路的链路训练成功之前，通过链路训练成功的至少一条第一链路接收来自所述第一设备的数据，所述至少一条第二链路为由所述第二设备到所述第一设备的链路。
  25. 一种链路训练装置，其特征在于，包括处理器和传输接口，所述处理器被配置为调用存储在存储器中的程序，以使得所述链路训练装置实现如权利要求1-12或13-22中任一项所述的方法。
  26. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质包括计算机程序，当所述计算机程序在计算机或处理器上运行时，使得所述计算机或所述处理器进行如权利要求1-12或13-22中任一项所述的方法。
  27. 一种计算机程序产品，所述计算机程序产品包括计算机程序，当所述计算机程序在计算机或处理器上运行时，使得所述计算机或所述处理器进行如权利要求1-12或13-22中任一项所述的方法。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115622846A (zh) * 2022-12-20 2023-01-17 成都电科星拓科技有限公司 基于链路两端均衡参数的eq降低延时方法、系统及装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100183004A1 (en) * 2009-01-16 2010-07-22 Stmicroelectronics, Inc. System and method for dual mode communication between devices in a network
CN108702466A (zh) * 2016-03-02 2018-10-23 美国莱迪思半导体公司 多媒体接口中的链路训练
US10474607B2 (en) * 2018-05-01 2019-11-12 Intel Corporation Adapt link training based on source capability information
US20200228375A1 (en) * 2020-03-26 2020-07-16 Huimin Chen Method of adaptive termination calibration
CN112399387A (zh) * 2020-11-19 2021-02-23 天津瑞发科半导体技术有限公司 多速率双向传输系统

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9984652B2 (en) * 2013-08-22 2018-05-29 Intel Corporation Topology and bandwidth management for IO and inbound AV
WO2016209482A1 (en) * 2015-06-24 2016-12-29 Intel Corporation Techniques to independently control display segments of a display panel

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100183004A1 (en) * 2009-01-16 2010-07-22 Stmicroelectronics, Inc. System and method for dual mode communication between devices in a network
CN108702466A (zh) * 2016-03-02 2018-10-23 美国莱迪思半导体公司 多媒体接口中的链路训练
US10474607B2 (en) * 2018-05-01 2019-11-12 Intel Corporation Adapt link training based on source capability information
US20200228375A1 (en) * 2020-03-26 2020-07-16 Huimin Chen Method of adaptive termination calibration
CN112399387A (zh) * 2020-11-19 2021-02-23 天津瑞发科半导体技术有限公司 多速率双向传输系统

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP4311173A4 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115622846A (zh) * 2022-12-20 2023-01-17 成都电科星拓科技有限公司 基于链路两端均衡参数的eq降低延时方法、系统及装置
CN115622846B (zh) * 2022-12-20 2023-03-10 成都电科星拓科技有限公司 基于链路两端均衡参数的eq降低延时方法、系统及装置

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