WO2022204873A1

WO2022204873A1 - Electronic apparatus, system on chip, and physical core allocation method

Info

Publication number: WO2022204873A1
Application number: PCT/CN2021/083608
Authority: WO
Inventors: 潘时林
Original assignee: 华为技术有限公司
Priority date: 2021-03-29
Filing date: 2021-03-29
Publication date: 2022-10-06
Also published as: CN115413337A

Abstract

Provided in the embodiments of the present application are an electronic apparatus, and a physical core allocation method. The electronic apparatus comprises a multi-core processor and a scheduling processor, wherein the multi-core processor comprises a plurality of physical cores, the plurality of physical cores are used for running a plurality of operating systems, and the plurality of operating systems comprise a general purpose operating system and a trusted operating system; and the scheduling processor is used for allocating at least one first physical core from among the plurality of physical cores to run the general purpose operating system, and at least one second physical core from among the plurality of physical cores to run the trusted operating system, wherein the at least one first physical core is different from the at least one second physical core. Therefore, a first physical core and a second physical core can be flexibly configured, thereby improving the running speed of an electronic apparatus.

Description

Electronic device, system-on-chip, and physical core allocation method

technical field

The embodiments of the present application relate to the field of computers, and in particular, to an electronic device, a system-on-chip, and a method for allocating physical cores.

Background technique

With the rapid development of Internet technology and electronic devices, more and more applications are running on electronic devices, which usually involve various fields, such as electronic payment applications, biometric applications, instant messaging applications, etc. The dependence of equipment is getting higher and higher. Therefore, ensuring the security of the software running environment of electronic equipment and improving the running speed of electronic equipment have become the development direction of electronic equipment.

In order to take into account the security of the electronic device software running environment and the running speed of the electronic device, the industry usually runs multiple operating systems in the same processor of the electronic device. In the current technology, the physical cores running the multiple operating systems are all preset, and there is a situation in which one operating system is overloaded with physical cores due to an excessively high load, while the other operating system has a relatively high load. Low results in relatively idle physical cores, resulting in uneven resource occupancy rates of the physical cores, resulting in waste of resources of the electronic device, thereby reducing the running speed of the electronic device.

SUMMARY OF THE INVENTION

Embodiments of the present application provide an electronic device, a system-on-chip, and a physical core allocation method, which can dynamically allocate physical cores in a processor and improve the running speed of an electronic device. To achieve the above object, the application adopts the following technical solutions:

In a first aspect, an embodiment of the present application provides an electronic device, the electronic device includes a multi-core processor and a scheduling processor; the multi-core processor includes multiple physical cores, and the multiple physical cores are used to run multiple operations system, the multiple operating systems include a general-purpose operating system and a trusted operating system; the scheduling processor is configured to allocate at least one first physical core running the general-purpose operating system among the multiple physical cores and running all at least one second physical core of the trusted operating system, wherein the at least one first physical core and the at least one second physical core are different.

In the embodiment of the present application, by using the scheduling processor to allocate physical cores to the general-purpose operating system and the trusted operating system, when a certain operating system is too busy and the physical cores are insufficient during a period of high task occurrence, the operating system can be supplemented with physical cores in time, thereby The physical cores can be flexibly allocated, thereby improving the utilization rate of the physical cores and the running speed of the electronic device.

In a possible implementation manner, the scheduling processor allocates the at least one first physical core and the at least one second physical core based on at least one of the following; the first resource of the at least one first physical core The occupancy rate or the second resource occupancy rate of the at least one second physical core.

In a possible implementation manner, the first resource occupancy rate and the second resource occupancy rate are reported by the multi-core processor or a dedicated measurement device.

In a possible implementation manner, allocating the at least one first physical core includes at least one of the following: increasing the number of the at least one first physical core, decreasing the number of the at least one first physical core, changing the number of the at least one first physical core One or more physical cores in the at least one first physical core are switched to other physical cores.

In a possible implementation manner, allocating the at least one second physical core includes at least one of the following: increasing the number of the at least one second physical core, decreasing the number of the at least one second physical core, assigning all the One or more physical cores in the at least one second physical core are switched to other physical cores.

In a possible implementation manner, the multi-core processor is prohibited from accessing at least one of the following: a power supply of the scheduling processor, a clock of the scheduling processor, or data managed by the scheduling processor.

In a possible implementation manner, the scheduling processor includes an active measurement device, and the active measurement device is configured to perform security detection on the trusted operating system and the general operating system.

By running the security system software, the active measurement device can perform security detection on the general operating system and the trusted operating system running on the multi-core processor when the electronic device is powered on, when the electronic device is woken up, or during the running process of the multi-core processor, so as to ensure the universal The operating system and trusted operating system are functioning normally.

In a second aspect, an embodiment of the present application provides a system-on-chip, where the system-on-chip includes the electronic device described in the first aspect.

In a third aspect, an embodiment of the present application provides a method for allocating physical cores. The method for allocating physical cores includes: scheduling a processor to allocate at least one first physical core for running a general-purpose operating system in a multi-core processor and for running a trusted at least one second physical core of an operating system, wherein the at least one first physical core and the at least one second physical core are different; the multi-core processor is based on the at least one first physical core and the at least one The second physical core runs the general operating system and the trusted operating system respectively.

Based on the third aspect, in a possible implementation manner, the scheduling processor allocates the at least one first physical core and the at least one second physical core based on at least one of the following; the at least one first physical core The first resource occupancy rate of the core or the second resource occupancy rate of the at least one second physical core.

It should be understood that the second to third aspects of the present application are consistent with the technical solutions of the first aspect of the present application, and the beneficial effects obtained by each aspect and the corresponding feasible implementation manner are similar, and will not be repeated.

Description of drawings

In order to illustrate the technical solutions of the embodiments of the present application more clearly, the following briefly introduces the drawings that are used in the description of the embodiments of the present application. Obviously, the drawings in the following description are only some embodiments of the present application. , for those of ordinary skill in the art, other drawings can also be obtained from these drawings without creative labor.

1 is a schematic structural diagram of an electronic device provided by an embodiment of the present application;

FIG. 2 is a schematic structural diagram of the multi-core processor 101 in the electronic device shown in FIG. 1 provided by an embodiment of the present application;

3 is a schematic diagram of an application scenario of physical core allocation provided by an embodiment of the present application;

4 is a schematic diagram of another application scenario of physical core allocation provided by an embodiment of the present application;

5a-5b are schematic diagrams of another application scenario of physical core allocation provided by an embodiment of the present application;

6 is a schematic diagram of another application scenario of physical core allocation provided by an embodiment of the present application;

7 is an interactive flowchart of a method for a scheduling processor to obtain a resource occupancy rate of a first physical core and a resource occupancy rate of a second physical core provided by an embodiment of the present application;

8 is another schematic structural diagram of an electronic device provided by an embodiment of the present application;

FIG. 9 is a flowchart of a physical core allocation method provided by an embodiment of the present application.

Detailed ways

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

References herein to "first," "second," and similar terms do not denote any order, quantity, or importance, but are merely used to distinguish the various components. Likewise, words such as "a" or "an" do not denote a quantitative limitation, but rather denote the presence of at least one. Similar words "connected" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect, equivalent to coupling or communicating in a broad sense.

The "module" mentioned in this document generally refers to a functional structure divided according to logic, and the "module" can be realized by pure hardware, or realized by a combination of software and hardware. In the implementation of this application, "and/or" describes the association relationship of the associated objects, which means that there can be three kinds of relationships, for example, A and/or B, which can mean that A exists alone, A and B exist simultaneously, and B exists alone. three conditions.

In the embodiments of the present application, words such as "exemplary" or "for example" are used to represent examples, illustrations or illustrations. Any embodiments or designs described in the embodiments of the present application as "exemplary" or "such as" should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present the related concepts in a specific manner. In the description of the embodiments of the present application, unless otherwise specified, the meaning of "plurality" refers to two or more. For example, multiple processing units refers to two or more processing units; multiple systems refers to two or more systems.

Please refer to FIG. 1 , which shows a schematic diagram of a hardware architecture of an electronic device 100 provided by an embodiment of the present application. The electronic device 100 may be located in a terminal. The terminal may be a user equipment (User Equipment, UE), such as various types of portable terminal devices such as a mobile phone, a tablet computer, or a wearable device (such as a smart watch). In addition, the electronic device 100 may also be located in a server. The electronic device 100 may specifically be a chip or a chip set or a circuit board on which the chip or the chip set is mounted. The chip or chip set or the circuit board on which the chip or chip set is mounted can be driven by suitable software. The electronic device 100 includes a multi-core processor 101 and a scheduling processor 102 . Optionally, the multi-core processor 101 and the scheduling processor 102 may be integrated in one or more chips, and the one or more chips may be regarded as a chipset, when one or more processors are integrated in When in the same chip, the chip is also called a System on a Chip (SOC). In addition, the electronic device 100 also includes one or more other components, such as a storage device 103 . In a possible implementation manner, the storage device 103 may be located in the same system-on-chip as the multi-core processor 101 and the scheduling processor 102 in the electronic device 100, that is, the storage device 103 is integrated in the SOC as shown in FIG. 1 above. .

The multi-core processor 101 includes multiple physical cores. For example, when the multi-core processor 101 is located in the mobile terminal, the multi-core processor 101 may include 8 physical cores; when the multi-core processor 101 is located in the PC, the multi-core processor 101 may include 12-16 physical cores; When the multi-core processor 101 is located in a server, the multi-core processor 101 may include 32-64 physical cores. The multiple physical cores included in the multi-core processor 101 can be divided into a first physical core and a second physical core. The first physical core is used to run a general operating system, and the second physical core is used to run a trusted operating system, as shown in Figure 2 shown. The physical cores included in the first physical core and the second physical core are different. The difference here may mean that there is no overlap between the first physical core running the operating system and the second physical core running the trusted operating system. When a physical core runs the trusted operating system, it usually cannot run the general-purpose operating system; similarly, When a physical core runs a general-purpose operating system, it usually cannot run a trusted operating system. It should be noted that the first physical core mentioned here refers to a type of physical core running a general-purpose operating system, and the "first" in the first physical core is not used to limit the number; similarly, the second physical core is Refers to a type of physical core running a trusted operating system, and the "second" in the second physical core is not used to limit the number. The physical core in this embodiment is a processor core that can run independently or be turned off, and can optionally include circuit elements such as a basic logical computing unit, a de-instructor, and a scheduler, which is not limited in this embodiment.

The general-purpose operating system described in the embodiments of this application, which may also be referred to as a host operating system, refers to an operating system that provides applications and services (such as instant messaging or shopping) for users. The general-purpose operating system mainly implements computing functions, such as Including but not limited to: Windows system, Android system, Redhat Linux system or Hongmeng OS system, etc. These operating systems can be used to support general non-safety common application software. These non-safety common applications are usually third-party applications (eg, video applications, shopping applications). Trusted operating systems usually run trusted software, which implements tasks such as security measurement, access control, and decision-making of security rules during the runtime of the general operating system, so as to ensure the correct and trusted operation of the general operating system. The trusted application system is used to run security application software, which can be used to support security services such as signature, encryption and decryption calculation, and face comparison. Some of these non-safety common application software can call the safety application software in the trusted operating system, and the security of the trusted operating system is higher than that of the general operating system. By using different physical cores to run the general-purpose operating system and the trusted operating system, the hardware isolation between the trusted operating system and the general-purpose operating system can be ensured, and hackers can avoid tampering with the trusted operating system by entering the trusted operating system through the general-purpose operating system. Managed data to improve the security of the trusted operating system operating environment. For example, the code of the trusted operating system is different and isolated from the code of the general operating system. For example, each of the trusted operating system and the general-purpose operating system may include an independent system kernel and other operating system frameworks.

The scheduling processor 102 may allocate multiple physical cores in the multi-core processor 101, so that at least one first physical core runs a general operating system and at least one second physical core runs a trusted operating system. Specifically, the scheduling processor 102 may allocate multiple physical cores in the multi-core processor 101 when the electronic device 100 is powered on and during the operation of the electronic device 100 . Allocating the first physical cores may include, but is not limited to: allocating the number of the first physical cores when the electronic device 100 is powered on; increasing the number of the first physical cores, decreasing the number of the first physical cores, or changing the number of the first physical cores during the operation of the electronic device 100 One or more of the at least one first physical cores are switched to other physical cores. Allocating the second physical core may include, but is not limited to: allocating the number of the second physical core when the electronic device 100 is powered on; increasing the number of the second physical core, decreasing the number of the second physical core, or changing the number of the second physical core during the operation of the electronic device 100 One or more of the at least one second physical cores are switched to other physical cores. For example, in the big.LITTLE multi-core architecture proposed by ARM, the physical cores in the multi-core processor are divided into high-performance physical cores and low-performance physical cores according to the ability to process concurrent tasks and the running rate. The above-mentioned switching of one or more physical cores to other physical cores may include, but is not limited to, switching a low-performance physical core to a high-performance physical core, or switching a high-performance physical core to a low-performance physical core, and the like. In this embodiment of the present application, by setting the scheduling processor 102 to allocate the first physical core and the second physical core, when a certain operating system task is too busy and the physical core is insufficient, the operating system can be supplemented with physical cores in time. , so that the physical cores can be flexibly allocated, thereby improving the utilization rate of the physical cores and the running speed of the electronic device 100 .

In this embodiment of the present application, the storage device 103 shown in FIG. 1 may be provided with a shared memory. The multi-core processor 101 and the scheduling processor 102 communicate through shared memory. Specifically, the scheduling processor 102 can store the allocation of each physical core in the shared memory, and the multi-core processor 101 can read the allocation of physical cores from the shared memory, and run the general operating system and trusted operations based on the allocation of physical cores system. The allocation of the first physical core and the allocation of the second physical core described in the embodiments of the present application will be described in more detail below through the following possible implementation manners.

In a possible implementation manner, the scheduling processor 102 may pre-store a first initial value of the number of first physical cores and a second initial value of the number of second physical cores. When the electronic device 100 is powered on, the scheduling processor 102 may allocate the number of the first physical core and the number of the second physical core based on the first initial value and the second initial value. For example, assuming that the multi-core processor 101 includes 8 physical cores, the first initial value is 6, and the second initial value is 2, the scheduling processor 102 can allocate 6 first physical cores for the general-purpose operating system for trusted operation The system allocates 2 physical cores. It should be noted that the scheduling processor 102 is the number of the first physical cores allocated by the operating system and the number of the second physical cores allocated for the trusted operating system, which can be respectively called by the general-purpose operating system and the trusted operating system. the number of physical cores. In a certain period of time, not all of the first physical cores are used to run the general-purpose operating system, and similarly, all of the second physical cores are not necessarily used to run the trusted operating system. The following is a detailed description in conjunction with the application scenario shown in FIG. 3 . In FIG. 3 , it is assumed that the first physical cores assigned by the scheduling processor 102 to the operating system include six numbers 1-6, and the second physical cores assigned by the scheduling processor 102 to the trusted operating system include numbers 7 and 8 No. The two. When the data access volume of the general-purpose operating system is low and the task concurrency is small, the general-purpose operating system can call the three first physical cores No. 1 to No. 3 to run, and the other three first physical cores No. 4 to No. 6 to run It is in an idle state; when the amount of data access of the general-purpose operating system is high and the number of concurrent tasks is high, the general-purpose operating system can call the six first physical cores No. 1 to No. 6 to run the general-purpose operating system. Based on the same principle, the trusted operating system can call at least one of the physical core No. 7 and the physical core No. 8 to run the trusted operating system.

In a possible implementation manner, during the operation of the electronic device 100, the scheduling processor 102 may further allocate the first physical core and the second physical core based on at least one of the following: the first resource occupation of the at least one first physical core rate and a second resource occupancy rate of the at least one second physical core. The resource occupancy rate described in the embodiments of the present application may also be referred to as the processor occupancy rate, and specifically refers to which programs occupy the processor to perform tasks and the occupied rate. Taking a general-purpose operating system as an example, when the data access amount of the general-purpose operating system is low and the number of concurrent tasks is low, there are fewer programs running in the general-purpose operating system, and the resource occupancy rate of at least some of the physical cores in the first physical core is relatively low. On the contrary, when the amount of data access of the general-purpose operating system is high and the number of concurrent tasks is high, there are many programs running in the general-purpose operating system, and the resource occupancy rate of at least some of the first physical cores is high. When the general-purpose operating system and the trusted operating system are running, the resource occupancy rate information of the respective physical cores will be respectively recorded. The scheduling processor 102 can obtain the resource occupancy rate of the first physical core and the resource occupancy rate of the second physical core, and then allocates the resource based on at least one of the resource occupancy rate of the first physical core and the resource occupancy rate of the second physical core. A first physical core and a second physical core. Therefore, the scheduling processor 102 can schedule the processor 102 when the resource occupancy rate of each of the first physical cores is relatively high and the resource occupancy rate of at least some of the second physical cores is relatively low (that is, when the general-purpose operating system is too busy and the trusted operating system is idle) ), withdraw at least one second physical core, and add the withdrawn physical core to the first physical core to run a general-purpose operating system; the resource occupancy rate of each second physical core is relatively high, and at least part of the first physical core When the resource occupancy rate of the device is low (the trusted operating system is too busy and the general operating system is idle), at least one first physical core is reclaimed, and the reclaimed physical core is added to the second physical core to run the trusted operating system. In addition, when the resource occupancy rate of each of the first physical cores is relatively high, and the resource occupancy rate of at least some of the second physical cores is relatively low, the low-performance physical core in the first physical core may also be combined with the second physical core. Similarly, when the resource occupancy rate of each second physical core is high, and the resource occupancy rate of at least some of the first physical cores is low, the low-performance physical cores in the second physical core can also be switched. The physical core switches with the high-performance physical core in the first physical core.

In the embodiment of the present application, the scheduling processor 102 allocates each physical core by comparing the resource occupancy rate of each physical core with the resource occupancy rate threshold value. In a possible implementation manner, the scheduling processor 102 may pre-store the upper limit and lower limit of the resource occupancy rate threshold of the physical core. For example, the upper limit is 80% and the lower limit is 20%. When the resource occupancy rate of a physical core exceeds the upper limit of the resource occupancy rate threshold, it means that the physical core performs many tasks, that is, it is busy; when the resource occupancy rate of a certain physical core is lower than the lower limit of the resource occupancy rate threshold, the It means that the physical core performs fewer tasks, that is, idle. After the electronic device 100 is powered on, the scheduling processor 102 may acquire the resource occupancy rate of each physical core in real time or periodically. The scheduling processor 102 compares the resource occupancy rate of each physical core with a preset threshold, determines the busyness of each physical core based on the comparison result, and executes the subsequent allocation process.

Taking the lower limit of the resource occupancy rate threshold as 20% and the upper limit of the resource occupancy rate threshold as 80% as an example, the scheduling processor 102 will schedule the processor 102 based on the first resource occupancy rate of the first physical core and the resource occupancy rate of the second physical core through a number of specific scenarios. The second resource occupancy rate allocates the first physical core and the second physical core, which will be described in more detail.

Scenario 1: Suppose the first physical core initially running the general operating system includes physical cores 1-6, and the second physical core initially running the trusted operating system includes physical cores 7-8, as shown in Figure 3 shown. Among them, the resource occupancy rates of physical cores 1 to 6 all exceed 80%, the resource occupancy rate of physical core 7 is 50%, and the resource occupancy rate of physical core 8 is 15%. At this time, the scheduling processor 102 can reclaim physical core No. 8, and then add the reclaimed physical core No. 8 to the first physical core to run a general-purpose operating system. The situation after physical core deployment is shown in FIG. 4 .

In the case of physical core allocation shown in FIG. 4, when the resource occupancy rate of the physical core No. 8 is lower than 20%, the scheduling processor 102 can reclaim the physical core No. 8, and then add the reclaimed physical core No. 8 to the No. 8 physical core. In the two physical cores, the trusted operating system can continue to be allocated. At this time, the allocation of the physical cores is shown in FIG. 3 .

Scenario 2: Assume that the initial first physical core of the general-purpose operating system includes physical cores No. 1 and 6, and the second physical core initially running the trusted operating system includes physical cores No. 7 and No. 8, as shown in Figure 3. Show. Among them, the resource occupancy rate of physical cores 1 to 3 is over 80%, the resource occupancy rate of physical core 4 is 60%, the resource occupancy rate of physical cores 5 and 6 is lower than 20%, and the resource occupancy rate of physical cores 7 and 6 is lower than 20%. The resource occupancy rate of physical core No. 8 reaches 90%. At this time, the scheduling processor 102 can reclaim physical cores No. 5 and 6, and then add the reclaimed physical cores No. 5 and 6 to the second physical core to run the trusted operating system. The situation after the physical cores are deployed As shown in Figure 5a.

In the situation shown in FIG. 5a, when the resource occupancy rate of the physical core No. 5 is lower than 20%, the scheduling processor 102 may reclaim the physical core No. 5, and then add the reclaimed physical core No. 5 to the first physical core In order to continue to be allocated by the general operating system, the allocation of physical cores is shown in FIG. 5b; or, when the resource occupancy rate of physical core No. 6 is lower than 20%, the scheduling processor 102 can withdraw physical core No. 6 , and then add the recovered No. 6 physical core to the first physical core to continue to be allocated by the general-purpose operating system. At this time, the allocation of physical cores is shown in FIG. 3 .

Scenario 3: Suppose the initial first physical core of the general operating system includes physical cores 1-6, and the second physical core initially running the trusted operating system includes physical cores 7-8, as shown in Figure 3 Show. Physical cores 1-4 are low-performance physical cores, and physical cores 5-8 are high-performance physical cores. The resource occupancy rates of physical cores 1 to 6 all exceed 80%, the resource occupancy rate of physical core 7 is 70%, and the resource occupancy rate of physical core 8 is 30%. At this time, the scheduling processor 102 may withdraw the physical core No. 1 and the physical core No. 8, and then add the withdrawn physical core No. 8 to the first physical core to run the general-purpose operating system, and add the withdrawn physical core No. 1 to the first physical core. To the second physical core to run the trusted operating system, the situation after the physical core is deployed is shown in FIG. 6 .

In this embodiment of the present application, the scheduling processor 102 may obtain the first resource occupancy rate of the first physical core and the second resource occupancy rate of the second physical core through various methods.

In a first possible implementation manner, the resource occupancy rate of the first physical core and the resource occupancy rate of the second physical core may be actively reported by the multi-core processor 101 to the scheduling processor 102 . For any one of the general-purpose operating system and the trusted operating system, when the resource occupancy rate of the physical cores of the operating system exceeds a preset threshold, the multi-core processor 101 may occupy the resources of each physical core running the operating system The rate is reported to the scheduling processor 102 . Optionally, the multi-core processor 101 may write each physical core and the resource occupancy rate of each physical core into the shared memory in the storage device 103, and then send an interrupt signal to the scheduling processor 102. The scheduling processor 102 reads from the shared memory in response to the interrupt signal. In addition, the multi-core processor 101 may further send an interrupt signal to the scheduling processor 102 to instruct to obtain the resource occupancy rate of each physical core of another operating system.

In the following, taking the load of the general operating system exceeding the preset threshold as an example, in conjunction with the interaction process 700 shown in FIG. 7 , the first possible implementation manner will be described through a specific scenario.

Step 701: When the load of the general-purpose operating system exceeds a preset threshold, the multi-core processor 101 stores the resource occupancy rate information of each first physical core in the shared memory. After the multi-core processor 101 stores the resource occupancy rate of each first physical core in the shared memory, step 702 is performed. Step 702 , the multi-core processor 101 sends a first interrupt signal to the scheduling processor 102 . The first interrupt signal instructs the scheduling processor 102 to read the resource occupancy rate information of each first physical core from the shared memory.

Step 703, the scheduling processor 102 reads the resource occupancy rate information of each first physical core from the shared memory in response to the first interrupt signal. Step 704, the scheduling processor 102 determines whether the resource occupancy rate of each first physical core is higher than the upper limit of the resource occupancy rate. When the scheduling processor 102 determines that the resource occupancy rate of each first physical core is higher than the upper limit of the resource occupancy rate, step 705 is executed. Step 705 , the scheduling processor 102 sends a second interrupt signal to the multi-core processor 101 . The second interrupt signal is used to instruct the multi-core processor 101 to send resource occupancy rate information of each second physical core.

Step 706, the multi-core processor 101 stores the resource occupancy rate information of each second physical core in the shared memory in response to the second interrupt signal. After the multi-core processor 101 stores the resource occupancy rate information of each second physical core in the shared memory, step 707 is executed. Step 707 , the multi-core processor 101 sends a third interrupt signal to the scheduling processor 102 . The third interrupt signal instructs the scheduling processor 102 to read the resource occupancy rate information of each second physical core from the shared memory. Step 708, the multi-core processor 101 reads the resource occupancy rate information of each second physical core from the shared memory in response to the third interrupt signal.

In a second possible implementation manner, the resource occupancy rate of the first physical core and the resource occupancy rate of the second physical core may be reported by the multi-core processor 101 in response to query information from the scheduling processor 102 . The scheduling processor 102 may periodically send query information to the multi-core processor 101, where the query information is used to instruct to query the resource occupancy rate of the first physical core and the resource occupancy rate of the second physical core. In response to the query information, the multi-core processor 101 stores the resource occupancy rate information of the first physical core and the resource occupancy rate information of the second physical core in the shared memory. Then, the multi-core processor 101 sends an interrupt signal to the scheduling processor 102, the interrupt signal indicating that the resource occupancy rate information of the first physical core and the resource occupancy rate information of the second physical core have been stored in the shared memory. The scheduling processor 102 reads the resource occupancy rate information of the first physical core and the resource occupancy rate information of the second physical core from the shared memory in response to the interrupt signal.

In a third possible implementation manner, the electronic device 100 further includes a dedicated measurement device 104, the dedicated measurement device 104 is dedicated to measuring the resource occupancy rate of each physical core in the multi-core processor 101, and can be implemented in a hardware circuit, as shown in FIG. 8 shown. A dedicated measurement device 104 may communicate with the multi-core processor 101 and the scheduling processor 102, respectively. The dedicated measuring device 104 can obtain the resource occupancy rate information of each physical core from the multi-core processor 101 . The scheduling processor 102 may read the resource occupancy rate of each physical core from the dedicated measuring device 103 in real time or periodically.

In a possible implementation manner of the embodiment of the present application, the multi-core processor 101 is prohibited from accessing at least one of the following: the power supply of the scheduling processor 102 , the clock of the scheduling processor 102 , or the data managed by the scheduling processor 102 . That is to say, the hardware design of the scheduling processor 102 ensures that the software running on the multi-core processor 101 cannot interfere with the running of the scheduling processor 102 . The fact that the multi-core processor 101 is prohibited from accessing the power supply of the scheduling processor 102 means that the multi-core processor 101 cannot control the power-on or power-off of the scheduling processor 102 . That is to say, the scheduling processor 102 can be directly powered by an external power source (such as a power manager or a power adapter, etc.), and the multi-core processor 101 cannot control the scheduling processor 102 to start, shut down, enter or exit a low power consumption state, etc. When the electronic device 100 is powered on under the action of an external power supply, both the multi-core processor 101 and the scheduling processor 102 are started separately, or the scheduling processor 102 may be started first; when the electronic device 100 is powered off, the multi-core processor 101 and the scheduling processor 102 are started The processors 102 are turned off respectively. The fact that the multi-core processor 101 is prohibited from accessing the clock of the scheduling processor 102 means that the multi-core processor 101 cannot control the clock cycle of the scheduling processor 102 . That is to say, the clock cycle when the scheduling processor 102 works can be directly provided by an external clock signal source, and the multi-core processor 101 cannot change the clock cycle of each component in the scheduling processor 102 . By prohibiting the multi-core processor 101 from accessing the data managed by the scheduling processor 102 , hackers can be prevented from accessing or tampering with the data managed by the scheduling processor 102 by changing the running program loaded in the memory of the multi-core processor 101 . By prohibiting the multi-core processor 101 from accessing the power supply of the scheduling processor 102, it can be avoided that the scheduling processor 102 is maliciously powered off when the multi-core processor 101 is attacked. By prohibiting the multi-core processor 101 from accessing the clock of the scheduling processor 102, when the multi-core processor 101 is attacked, the clock cycle of the scheduling processor 102 can be prevented from being maliciously tampered with. Thus, the security of the scheduling processor 102 can be improved.

In a possible implementation manner of the embodiment of the present application, the scheduling processor 102 may, for example, include an active measurement apparatus for running security system software, and the active measurement apparatus includes one or more processor cores. The active measurement device specifically allocates a first physical core running a general operating system and a second physical core running a trusted operating system. When the electronic device 100 is powered on, when the electronic device 100 is woken up, or when the multi-core processor 101 is running, the active measurement device can perform the security system software on the general operating system and the trusted operating system running on the multi-core processor 101 by running the security system software. Security detection to ensure the normal operation of general-purpose operating systems and trusted operating systems. The security detection here may include but is not limited to: verifying the image hash value of the general operating system program and the image hash value of the trusted operating system program to ensure that the general operating system program and the trusted operating system program have not been rewritten , that is, to prevent related data from being tampered with. When the active measurement device detects that the operating system program and the trusted operating system program have been tampered with, the electronic device 100 may be subjected to a security protection operation. The security protection operations here may include but are not limited to: triggering an alarm, resetting the electronic device 100, rejecting services requested by the software (such as biometric identification services, password unlocking services, or key obtaining services, etc.), instructing the multi-core processor 101 to stop running , instruct the multi-core processor 101 to stop running the software, disable at least part of the functions of the software running by the multi-core processor 101 , or prevent the software from accessing data stored in the electronic device 100 . Therefore, when the multi-core processor 101 is running, the active measurement device can monitor the operating system of the multi-core processor 101, the applications and data running on the multi-core processor 101 in real time or periodically, so as to ensure the security of the electronic device 100. , thereby ensuring data security.

In this embodiment of the present application, in addition to the shared memory, the storage device 103 shown in FIG. 1 and FIG. 7 can also be used to store various operating system programs (such as general operating system programs and trusted operating system programs), application programs , Instruction code and data required for operation. The multi-core processor 101 and the scheduling processor 102 execute various functional applications and data processing of the electronic device by loading programs and instructions and acquiring data. The storage device 103 includes at least one of: random access memory RAM and read only memory ROM.

In this embodiment, the electronic device 100 may further include a communication unit 105, as shown in FIG. 7 . The communication unit 105 includes, but is not limited to, a short-range communication unit, or a cellular communication unit. Wherein, the short-range communication unit performs information exchange with other devices located outside the mobile terminal for accessing the Internet by running a short-range wireless communication protocol. The short-range wireless communication protocol may include, but is not limited to, various protocols supported by radio frequency identification technology, Bluetooth communication technology protocols, or infrared communication protocols. The cellular communication unit accesses the wireless access network by running the cellular wireless communication protocol, so as to realize the information exchange between the mobile communication unit and the server supporting various applications in the Internet. The communication unit 105 may be integrated in the same SOC with the multi-core processor 101 and the scheduling processor 102 described in the embodiments of the present application, or may be separately provided. In addition, the electronic device 100 may optionally include a bus, an input/output port I/O, a memory controller, and the like. The storage controller is used to control the storage device 103 . Wherein, the bus, the input/output port I/O, and the storage controller, etc., can be integrated with the above-mentioned multi-core processor 101 and the scheduling processor 102 in the same SOC. It should be understood that, in practical applications, the electronic device 100 may include more or less components than those shown in FIG. 1 and FIG. 7 , which is not limited in this embodiment of the present application.

Based on the same inventive concept, an embodiment of the present application further provides a method for allocating physical cores, and the method for allocating physical cores is applied to the electronic device 100 shown in FIG. 1 . Please continue to refer to FIG. 9 , which shows a process 900 of the physical core allocation method provided by the embodiment of the present application. The process 900 of the method for allocating physical cores includes the following steps: Step 901, scheduling the processor 102 to allocate at least one first physical core for running a general operating system and a first physical core for running a trusted operating system in the multi-core processor 101 At least one second physical core. The first physical core and the second physical core are different. Step 902, the multi-core processor 101 runs a general-purpose operating system and a trusted operating system based on at least one first physical core and at least one second physical core, respectively.

In a possible implementation manner, the scheduling processor 102 allocates the at least one first physical core and the at least one second physical core based on at least one of the following; the first resource occupancy rate of the at least one first physical core or the at least one second physical core; The second resource occupancy rate of the physical core. In a possible implementation manner, the first resource occupancy rate and the second resource occupancy rate are reported by the multi-core processor 101 or a dedicated measurement device.

In a possible implementation manner, allocating the at least one first physical core includes at least one of the following: increasing the number of the at least one first physical core, decreasing the number of the at least one first physical core, adding the at least one first physical core to the one or more of the physical cores are switched to other physical cores. In a possible implementation manner, allocating the at least one second physical core includes at least one of the following: increasing the number of the at least one second physical core, decreasing the number of the at least one second physical core, placing the at least one second physical core in the at least one second physical core. one or more of the physical cores are switched to other physical cores.

In one possible implementation, the multi-core processor 101 is prohibited from accessing at least one of the following: scheduling the power supply of the processor 102 , scheduling the clock of the processor 102 , or scheduling data managed by the processor 102 .

The above are only specific embodiments of the present application, but the protection scope of the present application is not limited to this. Any person skilled in the art can easily think of changes or replacements within the technical scope disclosed in the present application, and should cover within the scope of protection of this application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

An electronic device, comprising a multi-core processor and a scheduling processor;

The multi-core processor includes multiple physical cores, the multiple physical cores are used to run multiple operating systems, and the multiple operating systems include a general-purpose operating system and a trusted operating system;

The scheduling processor is configured to allocate at least one first physical core running the general-purpose operating system and at least one second physical core running the trusted operating system among the plurality of physical cores, wherein the at least one A first physical core and the at least one second physical core are different.
The electronic device of claim 1, wherein the scheduling processor allocates the at least one first physical core and the at least one second physical core based on at least one of the following:

The first resource occupancy rate of the at least one first physical core or the second resource occupancy rate of the at least one second physical core.
The electronic device according to claim 2, wherein the first resource occupancy rate and the second resource occupancy rate are reported by the multi-core processor or a dedicated measurement device.
The electronic device according to any one of claims 1-3, wherein allocating the at least one first physical core comprises at least one of the following:

Increasing the number of the at least one first physical core, decreasing the number of the at least one first physical core, switching one or more of the at least one first physical cores to other physical cores.
The electronic device according to any one of claims 1-3, wherein allocating the at least one second physical core comprises at least one of the following:

increasing the number of the at least one second physical core, decreasing the number of the at least one second physical core, switching one or more of the at least one second physical cores to other physical cores.
The electronic device according to any one of claims 1-5, wherein the multi-core processor is prohibited from accessing at least one of the following: a power supply of the scheduling processor, a clock of the scheduling processor, or the Schedules data managed by the processor.
The electronic device according to any one of claims 1 to 6, wherein the scheduling processor comprises an active measurement device, the active measurement device is configured to measure the trusted operating system and the general operating system Conduct security checks.
A system-on-chip, characterized in that, the system-on-chip comprises the electronic device according to any one of claims 1-7.
A method for allocating physical cores, comprising:

The scheduling processor allocates at least one first physical core for running a general-purpose operating system and at least one second physical core for running a trusted operating system in the multi-core processor, wherein the at least one first physical core and the at least one second physical core is different;

The multi-core processor runs the general operating system and the trusted operating system based on the at least one first physical core and the at least one second physical core, respectively.
The method of claim 9, wherein the scheduling processor allocates the at least one first physical core and the at least one second physical core based on at least one of the following:

The first resource occupancy rate of the at least one first physical core or the second resource occupancy rate of the at least one second physical core.