WO2022193389A1 - 视频编解码方法与系统、及视频编解码器 - Google Patents

视频编解码方法与系统、及视频编解码器 Download PDF

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Publication number
WO2022193389A1
WO2022193389A1 PCT/CN2021/087042 CN2021087042W WO2022193389A1 WO 2022193389 A1 WO2022193389 A1 WO 2022193389A1 CN 2021087042 W CN2021087042 W CN 2021087042W WO 2022193389 A1 WO2022193389 A1 WO 2022193389A1
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coefficient
flag
absolute value
round
decoded
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PCT/CN2021/087042
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English (en)
French (fr)
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黄航
王凡
谢志煌
袁锜超
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Oppo广东移动通信有限公司
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Priority to CN202180095554.2A priority Critical patent/CN116982312A/zh
Publication of WO2022193389A1 publication Critical patent/WO2022193389A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/124—Quantisation

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  • the present application relates to the technical field of video encoding and decoding, and in particular, to a video encoding and decoding method and system, and a video encoding and decoding device.
  • Digital video technology can be incorporated into a variety of video devices, such as digital televisions, smartphones, computers, e-readers or video players, and the like. With the development of video technology, the amount of data included in video data is relatively large. In order to facilitate the transmission of video data, video devices implement video compression technology to enable more efficient transmission or storage of video data.
  • transform coefficients are quantized.
  • dual quantization also called dependent quantization
  • Dual quantization includes two quantizers. Although these two quantizers have Same quantization step size, but interleaved matching to transform coefficients. Dual quantization enables a quantizer with a large step size to complete finer quantization, thereby reducing the loss between the reconstructed transform coefficients and the original transform coefficients, thereby improving coding efficiency.
  • Embodiments of the present application provide a video encoding and decoding method and system, and a video encoding and decoding device, so as to improve the encoding and decoding efficiency of the dual quantization method.
  • the present application provides a video encoding method, including:
  • a target quantizer is determined from N quantizers to quantize the coefficient to be coded to obtain the current quantization coefficient, and the N quantizers are corresponding to the dependent quantization DQ method a quantizer, the N is a positive integer greater than or equal to 2;
  • syntax elements include: a coefficient non-zero flag, a coefficient absolute value greater than 1 flag, a coefficient absolute value greater than 2 flag, and at least one coefficient absolute value greater than i Flag, coefficient absolute value residual value flag and symbol flag, the i is a positive integer from 3 to M, and the M is a positive integer greater than 3.
  • an embodiment of the present application provides a video decoding method, including:
  • the N is a positive integer greater than or equal to 2
  • the syntax elements include: coefficient non-zero flag, coefficient absolute value greater than 1 flag, coefficient absolute value greater than 2 flag, at least one coefficient absolute value greater than i flag, coefficient absolute value remaining value Mark and symbol mark, the i is a positive integer from 3 to M, and the M is a positive integer greater than or equal to 3;
  • the present application provides a video encoder for performing the method in the first aspect or each of its implementations.
  • the encoder includes a functional unit for executing the method in the above-mentioned first aspect or each of its implementations.
  • the present application provides a video decoder for executing the method in the second aspect or each of its implementations.
  • the decoder includes functional units for performing the methods in the second aspect or the respective implementations thereof.
  • a video encoder including a processor and a memory.
  • the memory is used for storing a computer program
  • the processor is used for calling and running the computer program stored in the memory, so as to execute the method in the above-mentioned first aspect or each implementation manner thereof.
  • a video decoder including a processor and a memory.
  • the memory is used for storing a computer program
  • the processor is used for calling and running the computer program stored in the memory, so as to execute the method in the above-mentioned second aspect or each implementation manner thereof.
  • a video encoding and decoding system including a video encoder and a video decoder.
  • the video encoder is used to perform the method in the first aspect or each of its implementations
  • the video decoder is used to perform the method in the above-mentioned second aspect or each of its implementations.
  • a chip for implementing any one of the above-mentioned first aspect to the second aspect or the method in each implementation manner thereof.
  • the chip includes: a processor for invoking and running a computer program from a memory, so that a device on which the chip is installed executes any one of the above-mentioned first to second aspects or each of its implementations method.
  • a computer-readable storage medium for storing a computer program, the computer program causing a computer to execute the method in any one of the above-mentioned first aspect to the second aspect or each of its implementations.
  • a computer program product comprising computer program instructions, the computer program instructions causing a computer to perform the method in any one of the above-mentioned first to second aspects or the implementations thereof.
  • a computer program which, when run on a computer, causes the computer to perform the method in any one of the above-mentioned first to second aspects or the respective implementations thereof.
  • An eleventh aspect provides a code stream, the code stream is generated according to the method of the first aspect, wherein the code stream includes the following syntax elements: coefficient non-zero flag, coefficient absolute value greater than 1 flag, coefficient absolute value Greater than 2 flag, at least one coefficient absolute value greater than i flag, coefficient absolute value remaining value flag and sign flag, where i is a positive integer from 3 to M, where M is a positive integer greater than or equal to 3.
  • the absolute value of the coefficient in the syntax element of the coefficient is expanded to be greater than the number of the x flag, so as to improve the encoding and decoding performance.
  • the present application also proposes a method for encoding and decoding the syntax elements of the extended coefficients, so as to realize accurate encoding and decoding of the syntax elements of the extended coefficients, and further improve the encoding and decoding performance.
  • FIG. 1 is a schematic block diagram of a video encoding and decoding system 100 involved in an embodiment of the present application
  • FIG. 2 is a schematic block diagram of a video encoder 200 provided by an embodiment of the present application.
  • FIG. 3 is a schematic block diagram of a decoding framework 300 provided by an embodiment of the present application.
  • Fig. 4 is the schematic diagram that two kinds of quantizers Q0 and Q1 carry out quantization
  • FIG. 5 is a schematic diagram of state transition of a quantizer used for determining transform coefficients
  • FIG. 6 is a schematic diagram of the dependency of the grid structure representation state and transform coefficient level
  • FIG. 8 is a schematic flowchart of a video encoding method provided by an embodiment of the present application.
  • Fig. 9 is the schematic diagram of the quantizer of Q0, Q1 of the original DQ technology
  • FIG. 10 is a schematic diagram of a quantizer of Q0 and Q1 involved in the application.
  • FIG. 11 is a schematic flowchart of another video encoding method provided by an embodiment of the present application.
  • FIG. 12 is a schematic flowchart of a video decoding method provided by an embodiment of the present application.
  • FIG. 13 is a schematic block diagram of a video encoder provided by an embodiment of the present application.
  • FIG. 14 is a schematic block diagram of a video decoder provided by an embodiment of the present application.
  • 15 is a schematic block diagram of an electronic device provided by an embodiment of the present application.
  • FIG. 16 is a schematic block diagram of a video encoding and decoding system provided by an embodiment of the present application.
  • the present application can be applied to the field of image encoding and decoding, the field of video encoding and decoding, the field of hardware video encoding and decoding, the field of dedicated circuit video encoding and decoding, the field of real-time video encoding and decoding, and the like.
  • audio video coding standard audio video coding standard, AVS for short
  • H.264/audio video coding audio video coding, AVC for short
  • H.265/High Efficiency Video Coding High efficiency video coding, referred to as HEVC
  • H.266/versatile video coding versatile video coding, referred to as VVC
  • the schemes of the present application may operate in conjunction with other proprietary or industry standards including ITU-TH.261, ISO/IECMPEG-1 Visual, ITU-TH.262 or ISO/IECMPEG-2 Visual, ITU-TH.263 , ISO/IECMPEG-4Visual, ITU-TH.264 (also known as ISO/IECMPEG-4AVC), including Scalable Video Codec (SVC) and Multi-View Video Codec (MVC) extensions.
  • SVC Scalable Video Codec
  • MVC Multi-View Video Codec
  • FIG. 1 For ease of understanding, the video coding and decoding system involved in the embodiments of the present application is first introduced with reference to FIG. 1 .
  • FIG. 1 is a schematic block diagram of a video encoding and decoding system 100 according to an embodiment of the present application. It should be noted that FIG. 1 is only an example, and the video encoding and decoding systems in the embodiments of the present application include, but are not limited to, those shown in FIG. 1 .
  • the video codec system 100 includes an encoding device 110 and a decoding device 120 .
  • the encoding device is used to encode the video data (which can be understood as compression) to generate a code stream, and transmit the code stream to the decoding device.
  • the decoding device decodes the code stream encoded by the encoding device to obtain decoded video data.
  • the encoding device 110 in this embodiment of the present application may be understood as a device with a video encoding function
  • the decoding device 120 may be understood as a device with a video decoding function, that is, the encoding device 110 and the decoding device 120 in the embodiments of the present application include a wider range of devices, Examples include smartphones, desktop computers, mobile computing devices, notebook (eg, laptop) computers, tablet computers, set-top boxes, televisions, cameras, display devices, digital media players, video game consoles, in-vehicle computers, and the like.
  • the encoding device 110 may transmit the encoded video data (eg, a code stream) to the decoding device 120 via the channel 130 .
  • Channel 130 may include one or more media and/or devices capable of transmitting encoded video data from encoding device 110 to decoding device 120 .
  • channel 130 includes one or more communication media that enables encoding device 110 to transmit encoded video data directly to decoding device 120 in real-time.
  • encoding apparatus 110 may modulate the encoded video data according to a communication standard and transmit the modulated video data to decoding apparatus 120 .
  • the communication medium includes a wireless communication medium, such as a radio frequency spectrum, optionally, the communication medium may also include a wired communication medium, such as one or more physical transmission lines.
  • channel 130 includes a storage medium that can store video data encoded by encoding device 110 .
  • Storage media include a variety of locally accessible data storage media such as optical discs, DVDs, flash memory, and the like.
  • the decoding apparatus 120 may obtain the encoded video data from the storage medium.
  • channel 130 may include a storage server that may store video data encoded by encoding device 110 .
  • the decoding device 120 may download the stored encoded video data from the storage server.
  • the storage server may store the encoded video data and may transmit the encoded video data to the decoding device 120, such as a web server (eg, for a website), a file transfer protocol (FTP) server, and the like.
  • FTP file transfer protocol
  • encoding apparatus 110 includes video encoder 112 and output interface 113 .
  • the output interface 113 may include a modulator/demodulator (modem) and/or a transmitter.
  • encoding device 110 may include video source 111 in addition to video encoder 112 and input interface 113 .
  • the video source 111 may include at least one of a video capture device (eg, a video camera), a video archive, a video input interface, a computer graphics system for receiving video data from a video content provider, a computer graphics system Used to generate video data.
  • a video capture device eg, a video camera
  • a video archive e.g., a video archive
  • a video input interface e.g., a video input interface
  • a computer graphics system for receiving video data from a video content provider e.g., a computer graphics system Used to generate video data.
  • the video encoder 112 encodes the video data from the video source 111 to generate a code stream.
  • Video data may include one or more pictures or a sequence of pictures.
  • the code stream contains the encoding information of the image or image sequence in the form of bit stream.
  • the encoded information may include encoded image data and associated data.
  • the associated data may include a sequence parameter set (SPS for short), a picture parameter set (PPS for short), and other syntax structures.
  • SPS sequence parameter set
  • PPS picture parameter set
  • An SPS may contain parameters that apply to one or more sequences.
  • a PPS may contain parameters that apply to one or more images.
  • a syntax structure refers to a set of zero or more syntax elements in a codestream arranged in a specified order.
  • the video encoder 112 directly transmits the encoded video data to the decoding device 120 via the output interface 113 .
  • the encoded video data may also be stored on a storage medium or a storage server for subsequent reading by the decoding device 120 .
  • decoding device 120 includes input interface 121 and video decoder 122 .
  • the decoding device 120 may include a display device 123 in addition to the input interface 121 and the video decoder 122 .
  • the input interface 121 includes a receiver and/or a modem. Input interface 121 may receive encoded video data through channel 130.
  • the video decoder 122 is configured to decode the encoded video data, obtain the decoded video data, and transmit the decoded video data to the display device 123 .
  • the display device 123 displays the decoded video data.
  • the display device 123 may be integrated with the decoding apparatus 120 or external to the decoding apparatus 120 .
  • the display device 123 may include various display devices, such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or other types of display devices.
  • LCD liquid crystal display
  • plasma display a plasma display
  • OLED organic light emitting diode
  • FIG. 1 is only an example, and the technical solutions of the embodiments of the present application are not limited to FIG. 1 , for example, the technology of the present application may also be applied to single-side video encoding or single-side video decoding.
  • FIG. 2 is a schematic block diagram of a video encoder 200 provided by an embodiment of the present application. It should be understood that the video encoder 200 can be used to perform lossy compression on images, and can also be used to perform lossless compression on images.
  • the lossless compression may be visually lossless compression (visually lossless compression) or mathematically lossless compression (mathematically lossless compression).
  • the video encoder 200 can be applied to image data in luminance chrominance (YCbCr, YUV) format.
  • the YUV ratio can be 4:2:0, 4:2:2 or 4:4:4, Y represents the luminance (Luma), Cb(U) represents the blue chromaticity, Cr(V) represents the red chromaticity, U and V are expressed as chroma (Chroma) to describe color and saturation.
  • 4:2:0 means that every 4 pixels has 4 luma components
  • 2 chrominance components YYYYCbCr
  • 4:2:2 means that every 4 pixels has 4 luma components
  • 4 Chroma component YYYYCbCrCbCr
  • 4:4:4 means full pixel display (YYYYCbCrCbCrCbCrCbCr).
  • the video encoder 200 reads video data, and for each frame of image in the video data, divides one frame of image into several coding tree units (CTUs).
  • CTUs coding tree units
  • the CTB may be referred to as “Tree block", “Largest Coding Unit” (LCU for short) or “coding tree block” (CTB for short).
  • LCU Large Coding Unit
  • CTB coding tree block
  • Each CTU may be associated with a block of pixels of equal size within the image.
  • Each pixel may correspond to one luminance (luma) sample and two chrominance (chrominance or chroma) samples.
  • each CTU may be associated with one block of luma samples and two blocks of chroma samples.
  • the size of one CTU is, for example, 128 ⁇ 128, 64 ⁇ 64, 32 ⁇ 32, and so on.
  • a CTU can be further divided into several coding units (Coding Unit, CU) for coding, and the CU can be a rectangular block or a square block.
  • the CU can be further divided into a prediction unit (PU for short) and a transform unit (TU for short), so that coding, prediction, and transformation are separated and processing is more flexible.
  • the CTU is divided into CUs in a quadtree manner, and the CUs are divided into TUs and PUs in a quadtree manner.
  • Video encoders and video decoders may support various PU sizes. Assuming the size of a particular CU is 2Nx2N, video encoders and video decoders may support PU sizes of 2Nx2N or NxN for intra prediction, and support 2Nx2N, 2NxN, Nx2N, NxN or similar sized symmetric PUs for inter prediction. Video encoders and video decoders may also support 2NxnU, 2NxnD, nLx2N, and nRx2N asymmetric PUs for inter prediction.
  • the video encoder 200 may include: a prediction unit 210, a residual unit 220, a transform/quantization unit 230, an inverse transform/quantization unit 240, a reconstruction unit 250, a loop filtering unit 260 , a decoded image buffer 270 and an entropy encoding unit 280 . It should be noted that the video encoder 200 may include more, less or different functional components.
  • a current block may be referred to as a current coding unit (CU) or a current prediction unit (PU), or the like.
  • a prediction block may also be referred to as a predicted image block or an image prediction block, and a reconstructed image block may also be referred to as a reconstructed block or an image reconstructed image block.
  • prediction unit 210 includes an inter prediction unit 211 and an intra prediction unit 212 . Since there is a strong correlation between adjacent pixels in a frame of a video, the method of intra-frame prediction is used in video coding and decoding technology to eliminate the spatial redundancy between adjacent pixels. Due to the strong similarity between adjacent frames in the video, the inter-frame prediction method is used in the video coding and decoding technology to eliminate the temporal redundancy between adjacent frames, thereby improving the coding efficiency.
  • the inter-frame prediction unit 211 can be used for inter-frame prediction, and the inter-frame prediction can refer to image information of different frames, and the inter-frame prediction uses motion information to find a reference block from the reference frame, and generates a prediction block according to the reference block for eliminating temporal redundancy;
  • Frames used for inter-frame prediction may be P frames and/or B frames, where P frames refer to forward predicted frames, and B frames refer to bidirectional predicted frames.
  • the motion information includes the reference frame list where the reference frame is located, the reference frame index, and the motion vector.
  • the motion vector can be of whole pixel or sub-pixel. If the motion vector is sub-pixel, then it is necessary to use interpolation filtering in the reference frame to make the required sub-pixel block.
  • the reference frame found according to the motion vector is used.
  • the whole pixel or sub-pixel block is called the reference block.
  • the reference block is directly used as the prediction block, and some technologies are processed on the basis of the reference block to generate the prediction block.
  • Reprocessing to generate a prediction block on the basis of the reference block can also be understood as taking the reference block as a prediction block and then processing it on the basis of the prediction block to generate a new prediction block.
  • the intra-frame prediction unit 212 only refers to the information of the same frame image, and predicts the pixel information in the current code image block, so as to eliminate the spatial redundancy.
  • Frames used for intra prediction may be I-frames.
  • the white 4 ⁇ 4 block is the current block
  • the gray pixels in the left row and upper column of the current block are the reference pixels of the current block
  • the intra prediction uses these reference pixels to predict the current block.
  • These reference pixels may already be all available, ie all already coded and decoded. Some parts may not be available. For example, if the current block is the leftmost part of the whole frame, the reference pixels on the left side of the current block are not available.
  • the lower left part of the current block has not been encoded or decoded, so the reference pixels at the lower left are also unavailable.
  • the available reference pixel or some value or some method can be used for padding, or no padding is performed.
  • the intra prediction method further includes a multiple reference line intra prediction method (multiple reference line, MRL), which can use more reference pixels to improve coding efficiency.
  • MRL multiple reference line intra prediction method
  • mode 0 is to copy the pixels above the current block to the current block in the vertical direction as the predicted value
  • mode 1 is to copy the reference pixel on the left to the current block in the horizontal direction as the predicted value
  • mode 2 (DC) is to copy A ⁇
  • the average value of the 8 points D and I to L is used as the predicted value of all points.
  • Modes 3 to 8 copy the reference pixels to the corresponding position of the current block according to a certain angle respectively. Because some positions of the current block cannot exactly correspond to the reference pixels, it may be necessary to use a weighted average of the reference pixels, or sub-pixels of the interpolated reference pixels.
  • the intra-frame prediction will be more accurate and more in line with the demand for the development of high-definition and ultra-high-definition digital video.
  • Residual unit 220 may generate a residual block of the CU based on the pixel blocks of the CU and the prediction blocks of the PUs of the CU. For example, residual unit 220 may generate a residual block of the CU such that each sample in the residual block has a value equal to the difference between the samples in the CU's pixel block, and the CU's PU's Corresponding samples in the prediction block.
  • Transform/quantization unit 230 may quantize transform coefficients. Transform/quantization unit 230 may quantize transform coefficients associated with TUs of the CU based on quantization parameter (QP) values associated with the CU. Video encoder 200 may adjust the degree of quantization applied to transform coefficients associated with the CU by adjusting the QP value associated with the CU.
  • QP quantization parameter
  • Inverse transform/quantization unit 240 may apply inverse quantization and inverse transform, respectively, to the quantized transform coefficients to reconstruct a residual block from the quantized transform coefficients.
  • Reconstruction unit 250 may add the samples of the reconstructed residual block to corresponding samples of the one or more prediction blocks generated by prediction unit 210 to generate a reconstructed image block associated with the TU. By reconstructing the block of samples for each TU of the CU in this manner, video encoder 200 may reconstruct the block of pixels of the CU.
  • In-loop filtering unit 260 may perform deblocking filtering operations to reduce blocking artifacts for pixel blocks associated with the CU.
  • loop filtering unit 260 includes a deblocking filtering unit, a sample adaptive compensation SAO unit, an adaptive loop filtering ALF unit.
  • the decoded image buffer 270 may store the reconstructed pixel blocks.
  • Inter-prediction unit 211 may use the reference picture containing the reconstructed pixel block to perform inter-prediction on PUs of other pictures.
  • intra-prediction unit 212 may use the reconstructed pixel blocks in decoded picture buffer 270 to perform intra-prediction on other PUs in the same picture as the CU.
  • Entropy encoding unit 280 may receive the quantized transform coefficients from transform/quantization unit 230 . Entropy encoding unit 280 may perform one or more entropy encoding operations on the quantized transform coefficients to generate entropy encoded data.
  • the basic flow of video coding involved in the present application is as follows: at the coding end, the current image is divided into blocks, and for the current block, the prediction unit 210 uses intra-frame prediction or inter-frame prediction to generate a prediction block of the current block.
  • the residual unit 220 may calculate a residual block based on the predicted block and the original block of the current block, that is, the difference between the predicted block and the original block of the current block, and the residual block may also be referred to as residual information.
  • the residual block can be transformed and quantized by the transform/quantization unit 230 to remove information insensitive to human eyes, so as to eliminate visual redundancy.
  • the residual block before being transformed and quantized by the transform/quantization unit 230 may be referred to as a time-domain residual block, and the time-domain residual block after being transformed and quantized by the transform/quantization unit 230 may be referred to as a frequency residual block. or a frequency domain residual block.
  • the entropy encoding unit 280 receives the quantized transform coefficient output by the transform and quantization unit 230, and can perform entropy encoding on the quantized transform coefficient to output a code stream.
  • the entropy encoding unit 280 may eliminate character redundancy according to the target context model and the probability information of the binary code stream.
  • the video encoder performs inverse quantization and inverse transformation on the quantized transform coefficient output by the transform and quantization unit 230 to obtain a residual block of the current block, and then adds the residual block of the current block to the prediction block of the current block, Get the reconstructed block of the current block.
  • reconstructed blocks corresponding to other image blocks in the current image can be obtained, and these reconstructed blocks are spliced to obtain a reconstructed image of the current image.
  • the reconstructed image is filtered, for example, ALF is used to filter the reconstructed image to reduce the difference between the pixel value of the pixel in the reconstructed image and the original pixel value of the pixel in the current image. difference.
  • the filtered reconstructed image is stored in the decoded image buffer 270, and can be used as a reference frame for inter-frame prediction for subsequent frames.
  • the block division information determined by the coding end, and mode information or parameter information such as prediction, transformation, quantization, entropy coding, and loop filtering, etc. are carried in the code stream when necessary.
  • the decoding end determines the same block division information, prediction, transformation, quantization, entropy coding, loop filtering and other mode information or parameter information as the encoding end by analyzing the code stream and analyzing the existing information, so as to ensure the decoded image obtained by the encoding end. It is the same as the decoded image obtained by the decoder.
  • FIG. 3 is a schematic block diagram of a decoding framework 300 provided by an embodiment of the present application.
  • the video decoder 300 includes an entropy decoding unit 310 , a prediction unit 320 , an inverse quantization/transformation unit 330 , a reconstruction unit 340 , a loop filtering unit 350 , and a decoded image buffer 360 . It should be noted that the video decoder 300 may include more, less or different functional components.
  • the video decoder 300 may receive the code stream.
  • Entropy decoding unit 310 may parse the codestream to extract syntax elements from the codestream. As part of parsing the codestream, entropy decoding unit 310 may parse the entropy-encoded syntax elements in the codestream.
  • the prediction unit 320, the inverse quantization/transform unit 330, the reconstruction unit 340, and the in-loop filtering unit 350 may decode the video data according to the syntax elements extracted from the codestream, ie, generate decoded video data.
  • prediction unit 320 includes intra prediction unit 321 and inter prediction unit 322 .
  • Intra-prediction unit 321 may perform intra-prediction to generate prediction blocks for the PU. Intra-prediction unit 321 may use an intra-prediction mode to generate prediction blocks for a PU based on pixel blocks of spatially neighboring PUs. Intra-prediction unit 321 may also determine an intra-prediction mode for the PU from one or more syntax elements parsed from the codestream.
  • Inter-prediction unit 322 may construct a first reference picture list (List 0) and a second reference picture list (List 1) from the syntax elements parsed from the codestream. Furthermore, if the PU is encoded using inter-prediction, entropy decoding unit 310 may parse the motion information for the PU. Inter-prediction unit 322 may determine one or more reference blocks for the PU according to the motion information of the PU. Inter-prediction unit 322 may generate a prediction block for the PU from one or more reference blocks of the PU.
  • the inverse quantization/transform unit 330 inversely quantizes (ie, dequantizes) the transform coefficients associated with the TUs.
  • Inverse quantization/transform unit 330 may use the QP value associated with the CU of the TU to determine the degree of quantization.
  • inverse quantization/transform unit 330 may apply one or more inverse transforms to the inverse quantized transform coefficients to generate a residual block associated with the TU.
  • Reconstruction unit 340 uses the residual blocks associated with the TUs of the CU and the prediction blocks of the PUs of the CU to reconstruct the pixel blocks of the CU. For example, reconstruction unit 340 may add samples of the residual block to corresponding samples of the prediction block to reconstruct the pixel block of the CU, resulting in a reconstructed image block.
  • In-loop filtering unit 350 may perform deblocking filtering operations to reduce blocking artifacts for pixel blocks associated with the CU.
  • the loop filtering unit 350 includes a deblocking filtering unit, a sample adaptive compensation SAO unit, an adaptive loop filtering ALF unit.
  • Video decoder 300 may store the reconstructed images of the CU in decoded image buffer 360 .
  • the video decoder 300 may use the reconstructed image in the decoded image buffer 360 as a reference image for subsequent prediction, or transmit the reconstructed image to a display device for presentation.
  • the entropy decoding unit 310 can parse the code stream to obtain the prediction information, quantization coefficient matrix, etc. of the current block, and the prediction unit 320 uses intra prediction or inter prediction for the current block to generate the current block based on the prediction information.
  • the predicted block for the block The inverse quantization/transform unit 330 performs inverse quantization and inverse transformation on the quantized coefficient matrix using the quantized coefficient matrix obtained from the code stream to obtain a residual block.
  • the reconstruction unit 340 adds the prediction block and the residual block to obtain a reconstructed block.
  • the reconstructed blocks form a reconstructed image
  • the loop filtering unit 350 performs loop filtering on the reconstructed image based on the image or based on the block to obtain a decoded image.
  • the decoded image may also be referred to as a reconstructed image.
  • the reconstructed image may be displayed by a display device, and on the other hand, the reconstructed image may be stored in the decoded image buffer 360 to serve as a reference frame for inter-frame prediction for subsequent frames.
  • the above is the basic process of the video codec under the block-based hybrid coding framework. With the development of technology, some modules or steps of the framework or process may be optimized. This application is applicable to the block-based hybrid coding framework.
  • the basic process of the video codec but not limited to the framework and process.
  • transformed coefficients and non-transformed coefficients may be collectively referred to as coefficients.
  • Quantization is often used to reduce the dynamic range of the coefficients, thereby expressing the video with fewer codewords.
  • the quantized values are often referred to as levels, reconstruction levels or reconstruction levels.
  • the quantization operation usually divides the coefficient by the quantization step size, which is determined by the quantization factor passed in the code stream. Inverse quantization is done by multiplying the reconstruction level by the quantization step size. For an NxM block, the quantization of all coefficients can be done independently. This technique is also widely used in many international video compression standards, such as H.264, HEVC.
  • a specific scan order can transform a two-dimensional coefficient block into a one-dimensional coefficient stream.
  • the scan sequence can be Z-type, horizontal, vertical or any other sequence of scans.
  • the correlation between coefficients can be used, and the characteristics of the quantized coefficients can be used to select a better quantization method, so as to achieve the purpose of optimizing the quantization.
  • DQ Dependent Quantization
  • DQ also known as dual quantization
  • the dependent quantization acts on the transformed block. Different from the traditional quantization, the dependent quantization contains two quantizers. Although these two quantizers have the same quantization step size (ie 2* ⁇ ), the Their respective reconstructed transform coefficients are interleaved.
  • FIG. 4 is a schematic diagram of dependent quantization quantizer Q0 and quantizer Q1 and their respective corresponding reconstructed transform coefficients.
  • the quantizer Q0 corresponds to ⁇ where the reconstructed transform coefficient level is an even multiple (Note: the quantization step size of the two quantizers is 2* ⁇ , the combination of Q0 and Q1 in the dependent quantizer is equivalent to a quantization step size of ⁇ ) (that is, the numbers corresponding to points A and B), and the quantizer Q1 corresponds to ⁇ whose level of the reconstructed transform coefficient is an odd multiple (that is, the numbers corresponding to points C and D).
  • dependent quantization enables the combination of large step-size quantizers to complete finer quantization, reducing the reconstructed transform coefficients and the original transform coefficients. between the losses, thereby improving the coding efficiency.
  • the reconstructed transform coefficients of the two quantizers can be represented by multiples of the quantization step size ⁇ , and the reconstructed transform coefficients of the two quantizers are defined as follows:
  • the reconstructed transform coefficient level of the quantizer is an even multiple (including zero times) quantization step size ⁇ .
  • the reconstructed transform coefficient t′ can be calculated according to the following formula,
  • k represents the associated transform coefficient level described in FIG. 4 .
  • the reconstruction level of the quantizer is an odd or zero times the quantization step size ⁇ .
  • the reconstructed transform coefficient t′ can be calculated according to the following formula (2),
  • sgn( ) represents the symbolic function
  • FIG. 5 is a schematic diagram of the state transition of the quantizer used to determine the transform coefficients, (a) using a state machine to determine the use of the quantizer, and (b) a state transition table.
  • the reconstructed value of the current coefficient can determine the state of the next coefficient through the transition method shown in FIG. For example, when the state of the current coefficient is 2 and the current transform coefficient level is 5, since 5 is an odd number, it is determined that the state of the next coefficient is jumped to state 3.
  • the state of the first coefficient in scan order of each transform block is set to the initial state 0.
  • Status 0, 1, 2, and 3 also determine which quantizer is used for the current coefficient. Status 0, 1 corresponds to using quantizer Q0, and status 2, 3 corresponds to using quantizer Q1.
  • the value of the transform coefficient level ⁇ q k ⁇ is a process that minimizes the Lagrangian rate-distortion cost of the following formula (3),
  • t k and q k represent the original transform coefficient and transform coefficient level, respectively
  • %) represents the reconstructed transform coefficient value at the current transform coefficient level q k
  • 7) represents the estimated number of bits consumed by encoding q k .
  • FIG. 6 is a schematic diagram showing the dependency of states and transform coefficient levels in a trellis structure, with the coding order from left to right.
  • the dependencies between the quantizer and the transform coefficient levels can be represented as a trellis diagram as shown in Fig. 6, with the four states in each column representing the four possible four states of the current quantization coefficient states, each node is connected to a possible two state nodes of the next coefficient in coding order.
  • the current quantizer can be used to quantize the corresponding transform coefficient level.
  • the encoder can choose to use an odd-numbered transform coefficient level or an even-numbered transform coefficient level.
  • the odd-numbered transform coefficients The levels correspond to B (Q0 with parity 1) and D (Q1 with parity 1) in Figure 6, and the even-numbered transform coefficient levels correspond to A (Q0 with parity 0) and C (Q1 with parity 0).
  • the transform coefficient level q k can be obtained by finding A route with the minimum cost sum is determined, and the determination of the minimum cost sum can be achieved by the Viterbi algorithm.
  • Step 1 find 4 candidate transform coefficient levels from Q0 and Q1 corresponding to the original transform coefficients, as shown in Figure 7;
  • Step 2 using the Viterbi algorithm to determine the transform coefficient levels q k of a series of current nodes by using the estimated rate-distortion sum (the cost synthesis corresponding to the transform coefficient levels determined by the previous nodes).
  • Step 1 find 4 candidate transform coefficient levels from Q0 and Q1 corresponding to the original transform coefficients, as shown in Figure 7;
  • Step 2 using the Viterbi algorithm to determine the transform coefficient levels q k of a series of current nodes by using the estimated rate-distortion sum (the cost synthesis corresponding to the transform coefficient levels determined by the previous nodes).
  • the encoding end will be introduced below with reference to FIG. 8 .
  • FIG. 8 is a schematic flowchart of a video encoding method provided by an embodiment of the present application, and the embodiment of the present application is applied to the video encoder shown in FIG. 1 and FIG. 2 .
  • the method of the embodiment of the present application includes:
  • the syntax elements include: coefficient non-zero mark, coefficient absolute value greater than 1 mark, coefficient absolute value greater than 2 mark, at least one coefficient absolute value greater than i mark, coefficient absolute value residual value mark and symbol mark, i is obtained from 3 A positive integer of M, where M is a positive integer greater than or equal to 3.
  • the current quantized coefficients of the present application may also be referred to as quantized coefficients, or quantized coefficients, or current coefficients, or coefficients to be encoded, or varying coefficient levels, reconstruction levels, or reconstruction levels, and the like.
  • the video encoder receives a video stream, which consists of a series of image frames, and performs video encoding for each frame of image in the video stream.
  • a video stream which consists of a series of image frames
  • this application uses a frame of image currently to be encoded Record as the current image.
  • the video encoder divides the current image into one or more blocks to be coded, and for each block to be coded, the prediction unit 210 in the video encoder generates the block to be coded through inter-frame prediction and intra-frame prediction. After encoding the prediction block of the block, the prediction block is sent to a residual unit 220, which can be understood as a summer, including one or more components that perform a subtraction operation.
  • the residual unit 220 subtracts the prediction block from the block to be encoded to form a residual block, and sends the residual block to the transform and quantization unit 230 .
  • the transform and quantization unit 230 transforms the residual block using, for example, discrete cosine transform (DCT) or the like, to obtain transform coefficients.
  • the transform and quantization unit 230 further quantizes the transform coefficients to obtain quantized transform coefficients, that is, quantized coefficients.
  • the transform and quantization unit 230 forwards the quantized transform coefficients to the entropy encoding unit 280 .
  • the entropy encoding unit 280 entropy encodes the quantized transform coefficients.
  • entropy encoding unit 280 may perform context adaptive variable length coding (CAVLC), context adaptive binary arithmetic coding (CABAC), syntax-based context adaptive binary arithmetic coding (SBAC), probability interval partitioning entropy (PIPE) ) coding and other coding methods, entropy coding is performed on the quantized transform coefficients to obtain a code stream.
  • CAVLC context adaptive variable length coding
  • CABAC context adaptive binary arithmetic coding
  • SBAC syntax-based context adaptive binary arithmetic coding
  • PIPE probability interval partitioning entropy
  • This application is mainly aimed at the above-mentioned quantification process.
  • DQ design of DQ mainly consists of three parts
  • a quantizer may quantize transformed coefficients, ie, transform coefficients.
  • the present application may also quantize non-transform skip coefficients.
  • the N quantizers involved in this application are quantizers corresponding to the DQ quantization mode.
  • the present application may use a quantizer corresponding to an existing DO quantization method (that is, the quantizer shown in FIG. 4 ) to quantize the coefficients.
  • At least one of the above N quantizers is a non-zero quantizer capable of quantizing all transform coefficients into non-zero quantization coefficients, where N is a positive integer greater than or equal to 2.
  • the non-zero quantizer can also be referred to as a non-zero point quantizer.
  • At least one of the N quantizers is a zero-point quantizer that can quantize transform coefficients to zero.
  • the N quantizers include one zero-point quantizer and one non-zero quantizer.
  • a quantizer may quantize transformed coefficients, ie, transform coefficients.
  • the present application may quantize non-transform skip coefficients.
  • the N quantizers involved in this application are quantizers corresponding to the DQ quantization mode.
  • At least one of the above N quantizers is a non-zero quantizer that can quantize all transform coefficients into non-zero quantized coefficients, where N is a positive integer greater than or equal to 2. where non-zero quantizers can also be called non-zero point quantizers
  • At least one of the N quantizers is a zero-point quantizer that can quantize transform coefficients to zero.
  • the N quantizers include one zero-point quantizer and one non-zero quantizer.
  • FIG. 9 is a schematic diagram of the quantizers of Q0 and Q1 of the original DQ technology.
  • the N quantizers include a Q0 quantizer and a Q1 quantizer.
  • the Q0 quantizer has not changed, and the Q1 quantizer has removed the point quantized to 0, that is, the Q1 quantizer can only quantize the coefficients into non-zero coefficients, where Q0 is a zero-point quantizer, and Q1 is a non-zero quantizer.
  • the non-zero quantizer may also be Q0, that is, the Q0 quantizer has no zeros, but the Q1 quantizer has zeros.
  • both quantizers have no zeros, ie both Q0 and Q1 are non-zero quantizers.
  • the number of quantizers may be further expanded, and may be two or more than two quantizers.
  • the zero-point quantizer among the N quantizers may be any one of them, or may be any of them.
  • the code stream may further include a non-zero quantizer identifier, and the non-zero quantizer identifier is used to identify whether the target quantizer is a non-zero quantizer.
  • the previous quantized coefficient may be understood as a quantized transform coefficient that is located before the coefficient to be coded in the quantization order (or scanning order).
  • a target quantizer for quantizing the coefficient to be coded can be determined, and the target quantizer can be used to quantify the coefficient to be coded.
  • the coded coefficients are quantized.
  • the above S805 includes the following steps S805-A to S805-C:
  • the flag bit information of the previous quantized coefficient includes Sig flag, gt1 flag, gt2 flag, gt3 flag, ..., gtM flag of the previous quantized coefficient, wherein M is greater than or equal to 3.
  • the above S805-B includes:
  • S805-B3 Determine a target quantizer from the N quantizers according to the state of the current quantization coefficient.
  • the encoding device will determine the target quantizer used in the current quantization process according to the current state of the state machine. For a non-zero quantizer, it will no longer be able to quantize the coefficients to zero when trying to quantize.
  • the state of the quantization coefficient can be understood as the state of the state machine.
  • the initial state of the state machine is 0.
  • the initial state of the state machine is included in the codestream.
  • the initial state of the state machine is 0, so that the initial state of the state machine at the decoding end is consistent with that at the encoding end, thereby ensuring accurate decoding of the coefficients by the decoding end.
  • the encoding device can obtain the state of the previous quantized coefficient.
  • the method of determining the state of the current quantized coefficient includes but is not limited to the following methods:
  • the state of the current quantized coefficient is determined according to the state of the previous quantized coefficient, for example, the state of the previous quantized coefficient is 0 If the state of the current quantization coefficient is 0, the state of the current quantization coefficient is determined to be 2 if the state of the previous quantization coefficient is 1, and the state of the current quantization coefficient is determined to be 2 if the state of the previous quantization coefficient is 2. The state is 1. If the state of the previous quantized coefficient is 3, the state of the current quantized coefficient is determined to be 3.
  • the above S805-B2 includes the following steps S805-B21 and S805-B22:
  • S805-B22 Determine the state of the current quantized coefficient according to the state of the previous quantized coefficient and the state jump value.
  • the flag bit information of the previous quantized coefficient includes a coefficient non-zero flag, and if the value of the coefficient non-zero flag is 0, the state jump value is determined to be 0.
  • the flag bit information of the previous quantized coefficient includes a coefficient non-zero flag and a coefficient absolute value greater than 1 flag.
  • the state jump value is determined to be 1; if the value of the coefficient non-zero flag and the value of the coefficient absolute value greater than 1 flag do not satisfy the following formula (4), then the state jump value is determined to be 0;
  • t is the state jump value
  • sigflag is the value of the coefficient non-zero flag
  • gt1 is the value of the coefficient absolute value greater than 1 flag (ie gt1 flag).
  • the state jump is determined.
  • gt2 is a value whose absolute value of the coefficient is greater than 2 flag (ie gt2 flag)
  • gt3 is a value whose absolute value of coefficient is greater than 3 flag (ie gt3 flag).
  • the state of the current quantized coefficient is determined according to t and the state of the previous quantized coefficient.
  • the state transition can be completed by the state machine shown in FIG. 11 , that is, the stateTrans (state transition table) in the following Table 2.
  • the stateTrans state transition table
  • the true or false of t can be determined according to the above formula (4) or (5), and the state of the current quantized coefficient can be determined according to the true or false of t and the state of the previous quantized coefficient, for example, when t is true, the previous If the state of the quantized coefficient is 2, the state of the current quantized coefficient is 3.
  • the state of the state machine is updated according to the current state of the quantized coefficients.
  • the present application quantizes the coefficient to be coded according to the quantization method described in S805 to obtain the current quantized coefficient, and then executes S806 to code the syntax element of the current quantized coefficient.
  • the syntax elements of the current coefficients include the following flag bits: coefficient non-zero flags sig_flag, sig_flag, the coefficient non-zero flag bit is used to indicate whether the quantized coefficient is zero, in some embodiments, if the value of the coefficient non-zero flag bit is ' 0' indicates that the current quantization coefficient is '0'; a value of '1' indicates that the current quantization coefficient is a non-zero coefficient.
  • the absolute value of the coefficient is greater than 1 flag coeff_abs_level_greater1_flag, the value of coeff_abs_level_greater1_flag is '0', indicating that the absolute value of the current quantization coefficient is '1'; the value of '1' indicates that the absolute value of the current quantization coefficient is greater than 1.
  • the absolute value of the coefficient is greater than 2 flag coeff_abs_level_greater2_flag, the value of coeff_abs_level_greater2_flag is '0', indicating that the absolute value of the current quantization coefficient is '2'; the value of '1' indicates that the absolute value of the current quantization coefficient is greater than 2.
  • the coefficient absolute value residual value coeff_abs_level_remaining If the current quantized coefficient has a coefficient absolute value residual value, the absolute value of the current quantized coefficient is 3+coeff_abs_level_remaining.
  • the coefficient non-zero flag is also referred to as a significant flag, indicating whether the coefficient at the current position exists, or whether the absolute value of the coefficient at the current position is greater than 0.
  • the flag whose absolute value of the coefficient is greater than 1 is also referred to as a greater than 1 flag, which indicates whether the absolute value of the coefficient at the current position is further greater than 1 on the basis that it is already greater than 0.
  • the coefficient absolute value greater than 2 flag is also referred to as greater than 2 flag, indicating whether the absolute value of the coefficient at the current position is further greater than 2 on the basis that it is already greater than 1.
  • the coefficient absolute value remaining value flag is also called remaining_abs_level, which indicates the remaining part when the absolute value of the current coefficient is greater than 2. For example, if the absolute value of the current coefficient is 4, the flag is equal to 1. If the absolute value of the current coefficient is 4, the flag is equal to 1. The value is equal to 3, then the flag is equal to 0.
  • the significant flag has 60 context models (51 for luma, 9 for chroma), for example, greater than 1 flag and greater than 2 flag share 22 context models, and remaining_abs_level and sign date are bypass encoding.
  • the present application extends the syntax elements of the coefficients, for example, the absolute value of the coefficients in the syntax elements is greater than the x flag (gt x flag).
  • coefficient non-zero flag sig flag
  • coefficient absolute value greater than 1 flag gt1 flag
  • coefficient absolute value greater than 2 flag gt2 flag
  • at least one coefficient absolute value greater than i flag gti flag
  • sign flag sign flag
  • the flag that the absolute value of at least one coefficient is greater than i includes: the flag that the absolute value of the coefficient is greater than 3;
  • the at least one coefficient absolute value greater than i flag includes: coefficient absolute value greater than 3 flag and coefficient absolute value greater than 4 flag;
  • the at least one coefficient absolute value greater than i flag includes: coefficient absolute value greater than 3 flag, coefficient absolute value greater than 4 flag, and coefficient absolute value greater than 5 flag;
  • the at least one coefficient absolute value greater than i flag includes: coefficient absolute value greater than 3 flag, coefficient absolute value greater than 4 flag, coefficient absolute value greater than 5 flag, ..., The absolute value of the coefficient is greater than the M flag.
  • the gtx flag codec is based on the context model, and the remaining_abs_level and sign data are based on bypass coding, due to the difference in the coding method, it is more hardware friendly to encode the flags of the same coding method together.
  • the gtx flag can be separated from remaining_abs_level and sign data.
  • the encoding of the syntax element of the current quantized coefficient in S806 includes three rounds of encoding, including:
  • the first round of encoding encoding the coefficient non-zero mark, the coefficient absolute value greater than 1 mark, the coefficient absolute value greater than 2 mark and the at least one coefficient absolute value greater than i mark of the current quantized coefficient;
  • the second round of encoding encodes the coefficient absolute value residual value flag of the current quantized coefficient
  • the third round of encoding is to encode the sign flag of the current quantized coefficient.
  • the flag based on context encoding can be further decomposed into multiple rounds, that is, the first round of encoding includes multiplex encoding:
  • the first round of encoding includes the first sub-round of encoding
  • the coefficient encoding method of the present application includes, in the first sub-round of encoding, setting the coefficient non-zero flag and the coefficient absolute value greater than 1 flag to encode. That is, in this example, the coefficient non-zero flag (sig flag) and the coefficient absolute value greater than 1 flag (gt1 flag) are encoded together.
  • the flag that the absolute value of the coefficient is greater than 2 and/or the flag that the absolute value of the at least one coefficient is greater than i is also encoded.
  • the first round of encoding further includes a second sub-round of encoding.
  • the coefficients are encoded in the following manner: in the first sub-round of encoding, the coefficient non-zero flag (sig flag) and the coefficient absolute value greater than 1 flag (gt1 flag) for encoding, and in the second sub-round encoding, one or more of the coefficient absolute value greater than 2 flag and the at least one coefficient absolute value greater than i flag are encoded.
  • the first round of encoding further includes a second sub-round of encoding.
  • the coefficients are encoded in the following manner: in the first sub-round of encoding, the coefficients are not zero flags (sig flags), and the absolute values of the coefficients are greater than The 1 flag (gt1 flag) and the coefficient absolute value greater than 2 flag (gt2 flag) are encoded, and in the second sub-round encoding, the at least one coefficient absolute value greater than i flag is encoded.
  • the first round of encoding includes a first sub-round of encoding, a second sub-round of encoding, and a third sub-round of encoding
  • the encoding method further includes: in the first sub-round of encoding, marking the coefficients with a non-zero flag and the absolute value of the coefficient is greater than 1 for encoding; in the second sub-round encoding, the absolute value of the coefficient is greater than 2 for encoding; in the third sub-round encoding, the absolute value of the at least one coefficient is greater than i flag to encode.
  • each flag in the flag whose absolute value of the at least one coefficient is greater than i is separately encoded.
  • the coefficient encoding method involved in the present application will be further described below by taking the at least one coefficient absolute value greater than i flag including the coefficient absolute value greater than 3 flag (gt3 flag) and the coefficient absolute value greater than 4 flag (gt4 flag) as an example.
  • the syntax elements of the current quantized coefficients include: sig flag, gt1 flag, gt2 flag, gt3 flag, gt4 flag, remaining, and sign data.
  • the encoding process is divided into three large rounds of encoding:
  • the sign data is encoded.
  • the flag based on context encoding is further decomposed into multiple rounds.
  • the dependent quantization of the present application is based on whether the quantization value is 1, and the jump of the quantizer can be completed after the gt1 flag is encoded and decoded. Therefore, the first round of encoding process can include the following ways:
  • sig flag and gt1 flag can be placed in one round of encoding, and the remaining gt2 flag, gt3 flag and gt4 flag can be placed in another round of encoding;
  • the sig flag and the gt1 flag can also be placed in the same round, and whether other gtx flags and the former are placed in the same round of encoding or separated is not limited.
  • the first round of encoding includes the first sub-round of encoding, and in the first sub-round of encoding, the sig flag and the gt1 flag are encoded.
  • the coefficient absolute value greater than 2 flag gt2 flag
  • the coefficient absolute value greater than 3 flag gt3 flag
  • the coefficient absolute value greater than 3 flag gt3 flag
  • the first round of encoding further includes a second sub-round of encoding
  • the coefficient absolute value greater than 2 flag (gt2 flag), and the coefficient absolute value greater than 3 flag (gt3 flag) and/or the coefficient absolute value greater than 3 flag (gt3 flag) are encoded.
  • the first round of encoding further includes a first sub-round of encoding and a second sub-round of encoding
  • the coefficient absolute value greater than 3 flag (gt3 flag) and the coefficient absolute value greater than 3 flag (gt3 flag) are encoded in the second sub-round encoding.
  • the first round of encoding includes a first sub-round of encoding, a second sub-round of encoding and a third sub-round of encoding
  • the sig flag and the gt1 flag are encoded in the first sub-round encoding
  • the absolute value of the coefficient is greater than 2 flag (gt2 flag) for encoding
  • the coefficient absolute value greater than 3 flag (gt3 flag) and the coefficient absolute value greater than 4 flag (gt4 flag) are encoded in the third sub-round encoding.
  • the first round of encoding includes a first sub-round of encoding, a second sub-round of encoding, a third sub-round of encoding, and a fourth sub-round of encoding
  • the absolute value of the coefficient is greater than 2 flag (gt2 flag) for encoding
  • the absolute value of the coefficient is greater than 3 flag (gt3 flag) to be encoded;
  • the coefficient absolute value greater than 4 flag (gt4 flag) is encoded in the third sub-round encoding.
  • present application may also include other combinations of the above-mentioned flags for quantization, and the present application does not limit this.
  • the DQ quantization method when using the DQ quantization method to quantize the coefficients, for example, before executing the above S805, it is first necessary to determine whether the quantization process of the present application can use the DQ quantization method, which specifically includes the following steps:
  • Step 11 obtain the transform tool identification used by the transform block, and/or the SRx or SRy of the scan area of the transform block under the luminance component and the SRx or SRy of the scan area of the transform block under the chrominance component;
  • Step 12 according to the transformation tool identification used by the transformation block, and/or the SRx or SRy of the scanning area of the transformation block under the luminance component, and the SRx or SRy of the scanning area of the transformation block under the chrominance component, determine whether the transformation block is meet the preset conditions;
  • Step 13 if the transform block satisfies the preset condition, it is determined that the transform block can be quantized by DQ quantization;
  • Step 14 when it is determined that the transform block can adopt the DQ quantization mode, according to the flag bit information of the previous quantization coefficient, a target quantizer is determined from the N quantizers to quantize the to-be-coded coefficient.
  • the above-mentioned preset conditions include any one of the following conditions:
  • the transform block is a non-transform skip block, and the transform tool used by the transform block is not an IST tool and/or an SBT tool;
  • the SRx or SRy of the scan area under the luma component of the transform block is greater than Q and the SRx or SRy of the scan area under the chroma component is greater than P, and the transform block is a non-transform skip block, Q and P are both integers .
  • Q is 6 and P is 0.
  • At least one of the value of Q, the value of P and the enable flag bit of DQ is stored in the sequence header or the picture header, wherein the enable flag bit of DQ is used to indicate whether the current sequence can turn on DQ quantitative method.
  • the DQ enable flag is programmed in the sequence header, indicating that the current sequence can turn on DQ.
  • the size limits Q (size_luma_dep_quant) and P (size_chroma_dep_quant) of the scan area can also be programmed in the sequence header, as shown in Table 1 below:
  • the above-mentioned step 12 comprises: obtaining the enable flag bit of DQ in the sequence header, according to the enable flag bit of DQ, when determining that the current sequence can open the DQ quantization mode, according to the transform tool identifier used by the transform block, or The SRx or SRy of the scanning area of the transform block under the luminance component, and the SRx or SRy of the scanning area of the transform block under the chrominance component, determine whether the transform block satisfies the preset condition.
  • the coefficient to be coded is quantized to obtain the current quantized coefficient.
  • the syntax elements of the coefficients are encoded by the encoding method of the embodiment of the present application, so that when decoding the coefficients, the decoding end first decodes the sig flag and the gt1 flag, and quickly determines the current quantization coefficient to be decoded based on the sig flag and the gt1 flag. state, thereby increasing the decoding speed.
  • the coefficient non-zero flag sig flag is encoded using the first context model.
  • the first context model is the same as the context model used when the RDOQ quantization mode encodes the non-zero flag of the coefficient.
  • the first context model is different from the context model used when the RDOQ quantization mode encodes the coefficient non-zero flag.
  • the High-Performance Model (HPM) of the reference AVS has only one set of context models because it has only the RDOQ quantization method.
  • the sig flags of RDOQ and DQ can share a set of context models, or they can be re-introduced and use their own.
  • the second context model is used, and the absolute value of the coefficient is greater than 1 flag, the absolute value of the coefficient is greater than 2 flag, the absolute value of at least one coefficient is greater than i flag, for example, the second context model is used for gt1 flag, gt2 flag, gt3 flag and gt4 flag to encode.
  • the second context model is the same as the context model used when the absolute value of the RDOQ quantization mode coding coefficient is greater than the i flag; or, the second context model is the same as the RDOQ quantization mode
  • the context model used when the absolute value of the coding coefficient is greater than the i flag Different; or, the second context model includes the context model corresponding to the non-zero quantizer and the context model corresponding to the zero-point quantizer, and the context model corresponding to the non-zero quantizer and the RDOQ quantization mode coding coefficient absolute value is greater than the context used when the sign is marked
  • the models are different, and the context model corresponding to the zero-point quantizer is the same as the context model used when the absolute value of the RDOQ quantization mode coding coefficient is greater than the i mark; or, the context model corresponding to the non-zero quantizer, the context model corresponding to the zero-point quantizer, and RDOQ
  • the reference HPM has only RDOQ quantization mode, and gt1 flag, gt2 flag, gt3 flag and gt4 flag share a set of context models.
  • DQ can make RDOQ and DQ's gt1 flag, gt2 flag, gt3 flag and gt4 flag share a set of context model
  • 2) can make RDOQ and DQ zero point quantizer gt1 flag, gt2 flag, gt3 flag and The gt4 flag shares a set of context models
  • the gt1 flag, gt2 flag, gt3 flag and gt4 flag of the DQ non-zero quantizer share another set of context models.
  • It can also be the zero-point quantizer and non-zero quantizer of RDOQ and DQ.
  • the gt1 flag, gt2 flag, gt3 flag and gt4 flag each share a set of context models.
  • the present application expands the number of coefficients whose absolute values in the syntax elements of the coefficients are greater than the i flag, so as to improve the encoding and decoding performance.
  • the present application also proposes a method for encoding and decoding the syntax elements of the extended coefficients, so as to realize accurate encoding and decoding of the syntax elements of the extended coefficients, and further improve the encoding and decoding performance.
  • the present application encodes the coefficient non-zero flag, the coefficient absolute value greater than 1 flag, the coefficient absolute value greater than 2 flag, and at least one coefficient absolute value greater than i flag as a coding part, which can be compared with the existing 4 coding parts. Reduce coding complexity, thereby improving coding and decoding efficiency.
  • the present application encodes the coefficient non-zero mark and the coefficient absolute value greater than 1 mark in the same round of encoding, so that the decoding end obtains the coefficient non-zero mark and the coefficient absolute value greater than 1 mark in a decoding process, and according to the coefficient non-zero mark and coefficient If the absolute value is greater than 1, the coefficient state is quickly determined, which further improves the coding efficiency.
  • the state of the current quantization coefficient is obtained according to the state of the previous quantization coefficient in the scanning order, and then it is determined whether the target quantizer is a non-zero quantizer (for example, when the state is 0 or 1, it is determined that the target quantizer is a zero-point quantizer For example, when the state of the current quantization coefficient is 2 or 3, the target quantizer is determined to be a non-zero quantizer).
  • the target quantizer is determined to be a non-zero quantizer, the encoding of sig_flag is skipped and its value is 1 by default.
  • this application encodes the coefficients quantized by the zero-point quantizer, because the encoder knows that the absolute value of the minimum value of the data quantized by the non-zero quantizer is 1, that is to say, all coefficients quantized by the non-zero quantizer are non-zero. Therefore, the coefficients quantized by the non-zero quantizer do not need to encode the coefficient non-zero flag sig_flag, thereby saving code words.
  • the changes to the transform block syntax structure in this scheme are shown in Table 2.
  • DqEnableFlag is the condition for enabling DQ in the opening sequence, and its value is equal to the dep_quant_flag programmed in the sequence header.
  • Table 2 shows the modification of the transform coefficient level decoding part in the AVS3 spec of this application.
  • the sigflag, gt1 flag and gt2 flag based on the context model encoding and decoding are mainly placed in one part, and the remaining based on the exponential Columbus encoding and decoding is placed in another part.
  • This application does not limit the specific meaning of each state, the state is only the serial number of the state, and the serial number of the state is replaced on the basis that the jumping principle remains unchanged.
  • a state transition table in this application is shown in FIG. 11 , where the truth of the variable t depends on whether the last coefficient value is 1 during the decoding process. Whether it is 1 can be obtained by the values of the two flag bits sig_flag and coeff_abs_level_greater1_flag, and can be obtained without reconstructing all the current coefficients, and the t value can be obtained by referring to the above formula (4).
  • the present application when the coefficient to be coded is quantized, the flag bit information of the previous quantized coefficient of the to-be-coded coefficient is obtained, and according to the flag bit information of the previous quantized coefficient, it is determined from the N quantizers that the coefficient to be coded is at The target quantizer to use when quantizing. That is, the present application only needs to obtain the flag bit information of the previous quantization coefficient to determine the target quantizer without waiting for the flag bit information of the current quantization coefficient to complete decoding, thereby reducing the coding and decoding complexity and improving the coding and decoding efficiency. In addition, the present application further expands the number of gtx flags on the basis of dependency quantization to improve coding performance.
  • the video encoding method involved in the embodiments of the present application is described above. Based on this, the following describes the video decoding method involved in the present application for the decoding end.
  • FIG. 12 is a schematic flowchart of a video decoding method provided by an embodiment of the present application. As shown in FIG. 12 , the method of the embodiment of the present application includes:
  • S902 Decode a syntax element of a coefficient to be decoded in the block to be decoded, and the coefficient to be decoded is obtained by quantizing one of the N quantizers, where the N quantizers are quantizers corresponding to the DQ quantization method, and N is greater than or equal to A positive integer of 2, the syntax elements include: coefficient non-zero flag, coefficient absolute value greater than 1 flag, coefficient absolute value greater than 2 flag, at least one coefficient absolute value greater than i flag, coefficient absolute value remaining value flag and symbol flag, i is from 3 is a positive integer of M, where M is a positive integer greater than or equal to 3;
  • the entropy decoding unit 310 in the decoder can parse the code stream to obtain the prediction information, quantization coefficient matrix, etc. of the block to be decoded in the current image, and the prediction unit 320 uses intra-frame prediction based on the prediction information for the block to be decoded Or inter prediction produces a predicted block of the block to be decoded.
  • the inverse quantization/transform unit 330 performs inverse quantization and inverse transformation on the quantized coefficient matrix using the quantized coefficient matrix obtained from the code stream to obtain a residual block.
  • the reconstruction unit 340 adds the prediction block and the residual block to obtain a reconstructed block.
  • the reconstructed blocks of other blocks to be decoded in the current image can be obtained, and each reconstructed block constitutes a reconstructed image.
  • At least one of the above N quantizers is a non-zero quantizer that can quantize the transform coefficients into non-zero quantized coefficients.
  • At least one of the N quantizers is a zero-point quantizer capable of quantizing transform coefficients to zero.
  • the N quantizers include one zero-point quantizer and one non-zero quantizer.
  • the previous quantized coefficient is the adjacent previous decoded quantized coefficient of the coefficient to be decoded in the scanning order.
  • decoding the syntax element of a to-be-decoded coefficient in the to-be-decoded block in S902 includes the following three rounds of decoding, including:
  • the coefficient to be decoded is a non-zero flag
  • the absolute value of the coefficient is greater than 1
  • the absolute value of the coefficient is greater than 2
  • the absolute value of at least one coefficient is greater than i.
  • the second round of decoding decoding the coefficient absolute value residual value flag of the coefficient to be decoded
  • the third round of decoding is to decode the sign flag of the coefficient to be decoded.
  • the above-described first round of decoding includes a multiplex decoding process.
  • the first round of decoding includes the first sub-round of decoding, and in this case, the above S902 includes:
  • the coefficient non-zero flag and the coefficient absolute value greater than 1 flag are decoded.
  • the coefficient absolute value greater than 2 flag and/or at least one coefficient absolute value greater than i is also decoded flag to decode.
  • the first round of decoding further includes the second sub-round of decoding.
  • the above S902 includes: decoding the coefficient non-zero flag and the coefficient absolute value greater than 1 flag in the first sub-round decoding, and in the first sub-round decoding In the two sub-round decoding, one or more of the coefficient absolute value greater than 2 flag and at least one coefficient absolute value greater than i flag are decoded; or, in the first sub-round decoding, except the coefficient non-zero flag and the coefficient absolute value greater than In addition to the 1 flag decoding, the coefficient absolute value greater than 2 flag is also decoded, and in the second sub-round decoding, at least one coefficient absolute value greater than the i flag is decoded.
  • the first round of decoding further includes the second sub-round of decoding and the third sub-round of decoding.
  • the above S902 includes: in the first sub-round of decoding, the coefficient non-zero flag and the absolute value of the coefficient are greater than 1 The flag is decoded, and in the second sub-round of decoding, the flag whose absolute value of the coefficient is greater than 2 is decoded; in the third sub-round of decoding, the flag of at least one coefficient whose absolute value is greater than i is decoded.
  • each flag of the at least one coefficient whose absolute value is greater than the i flag is decoded separately.
  • the coefficient decoding method involved in the present application will be further described below by taking the at least one coefficient absolute value greater than i flag including the coefficient absolute value greater than 3 flag (gt3 flag) and the coefficient absolute value greater than 4 flag (gt4 flag) as an example.
  • the syntax elements of the coefficient to be decoded include: sig flag, gt1 flag, gt2 flag, gt3 flag, gt4 flag, remaining, and sign data.
  • the decoding process is divided into three large rounds of decoding:
  • the sign data is decoded.
  • the flags decoded based on the context are further decomposed into multiple rounds.
  • the dependent quantization of the present application is based on whether the quantization value is 1, and the jump of the quantizer can be completed after the gt1 flag is encoded and decoded. Therefore, the first round of decoding process can include the following ways:
  • the sig flag and gt1 flag can be placed in one round of decoding, and the remaining gt2 flag, gt3 flag and gt4 flag can be placed in another round of decoding;
  • the sig flag and the gt1 flag can also be placed in the same round, and whether other gtx flags and the former are placed in the same round of decoding or separated is not limited.
  • the first round of decoding includes the first sub-round of decoding, and in the first sub-round of decoding, the sig flag and the gt1 flag are decoded.
  • the coefficient absolute value greater than 2 flag gt2 flag
  • the coefficient absolute value greater than 3 flag gt3 flag
  • the coefficient absolute value greater than 3 flag gt3 flag
  • the first round of decoding further includes a first sub-round of decoding and a second sub-round of decoding
  • the sig flag and the gt1 flag are decoded
  • decoding is performed on a flag whose absolute value of coefficient is greater than 2 (gt2 flag), and a flag whose absolute value of coefficient is greater than 3 (gt3 flag) and/or a flag whose absolute value of coefficient is greater than 3 (gt3 flag).
  • the first round of decoding further includes a first sub-round of decoding and a second sub-round of decoding
  • the coefficient absolute value greater than 3 flag (gt3 flag) and the coefficient absolute value greater than 3 flag (gt3 flag) are decoded in the second sub-round decoding.
  • the first round of decoding includes a first sub-round of decoding, a second sub-round of decoding, and a third sub-round of decoding
  • the coefficient absolute value greater than 3 flag (gt3 flag) and the coefficient absolute value greater than 4 flag (gt4 flag) are decoded.
  • the first round of decoding includes a first sub-round of decoding, a second sub-round of decoding, a third sub-round of decoding, and a fourth sub-round of decoding:
  • the sig flag and the gt1 flag are decoded
  • the coefficient absolute value greater than 4 flag (gt4 flag) is decoded in the third sub-round decoding.
  • this application may also include other quantization methods of the above-mentioned flags, which are not limited in this application.
  • the decoding of a syntax element of a to-be-decoded coefficient in the to-be-decoded block in the above S902 includes:
  • the value of the coefficient to be decoded is obtained according to the syntax element obtained by decoding in the above S903, including S903-A1 and S903-A2:
  • S903-A2 Obtain the value of the coefficient to be decoded according to the absolute value of the coefficient to be decoded and the decoded value of the symbol flag.
  • the absolute value of the coefficient to be decoded is determined according to the following formula:
  • S904 is performed to obtain a reconstructed block according to the value of the coefficient to be decoded.
  • the above S904 includes:
  • the decoding device can obtain the flag bit information of the previous quantized coefficient.
  • the flag bit information of the previous quantized coefficient includes the sig flag, gt1 flag, gt2 flag, gt3 flag, ..., gtM flag of the previous quantized coefficient, where M is greater than or equal to 3.
  • the above S904-B includes the following steps S904-B1 to S904-B4:
  • S904-B3 Determine a target quantizer from N quantizers according to the state of the coefficient to be decoded.
  • the state of the quantization coefficient can be understood as the state of the state machine.
  • the current state of the state machine may be referred to as the state of the coefficients to be decoded, or the current state of the coefficients to be decoded.
  • the initial state of the state machine is 0.
  • the initial state of the state machine is included in the codestream.
  • the initial state of a state machine is 0.
  • the decoding device can obtain the state of the previous quantized coefficient.
  • the implementation manners of the above S904-B2 include but are not limited to the following manners:
  • the state of the to-be-decoded coefficient is determined according to the state of the previous quantized coefficient, for example, the state of the previous quantized coefficient is 0 If the state of the coefficient to be decoded is 0, if the state of the previous quantized coefficient is 1, the state of the coefficient to be decoded is determined to be 2, and if the state of the previous quantized coefficient is 2, the state of the coefficient to be decoded is determined to be 2. The state is 1. If the state of the previous quantized coefficient is 3, the state of the coefficient to be decoded is determined to be 3.
  • the above S904-B2 includes the following steps S904-B21 and S904-B22:
  • S904-B22 Determine the state of the coefficient to be decoded according to the state of the previous quantized coefficient and the state jump value.
  • the state jump value is determined to be 0.
  • the flag bit information of the previous quantized coefficient includes a coefficient non-zero flag and a coefficient absolute value greater than 1 flag, if the coefficient non-zero flag value and the coefficient absolute value greater than 1 flag value satisfy the following formula (7) , the state jump value is determined to be 1; if the value of the coefficient non-zero flag and the absolute value of the coefficient greater than 1 flag do not satisfy the following formula (7), the state jump value is determined to be 0;
  • t is the state jump value
  • sigflag is the value of the coefficient non-zero flag
  • gt1 is the value of the coefficient absolute value greater than 1 flag.
  • the truth of the variable t depends on whether the last coefficient value is 1 during the decoding process. Whether it is 1 can be obtained by the values of the two flag bits sig_flag and coeff_abs_level_greater1_flag (gt1 flag), which can be obtained without reconstructing all the coefficients to be decoded, thereby reducing the complexity of quantization and improving decoding efficiency.
  • the state jump is determined.
  • the state of the coefficient to be decoded is determined according to t and the state of the previous quantized coefficient.
  • the state transition can be completed by the state machine shown in FIG. 11 , that is, the stateTrans (state transition table) in Table 1.
  • the stateTrans state transition table
  • the true or false of t can be determined according to the above formula (7) or (8), and the state of the coefficient to be decoded can be determined according to the true or false of t and the state of the previous quantized coefficient. For example, when t is true, the previous The state of the quantized coefficient is 2, and the state of the coefficient to be decoded is 3.
  • the state of the state machine is updated according to the state of the coefficients to be decoded.
  • the present application further includes:
  • Step 21 decode the code stream, obtain the transform tool mark used by the transform block, and/or the SRx or SRy of the scan area of the transform block under the luminance component and the SRx or SRy of the scan area of the transform block under the chrominance component;
  • Step 22 according to the transform tool identification used by the transform block, and/or the SRx or SRy of the scan area of the transform block under the luminance component, and the SRx or SRy of the scan area of the transform block under the chrominance component, determine whether the transform block is meet the preset conditions.
  • the target quantizer used for quantizing the coefficient to be decoded is determined from the N quantizers according to the flag bit information of the previous quantization coefficient.
  • the above-mentioned preset conditions include any one of the following conditions:
  • the transform block is a non-transform skip block, and the transform tool used by the transform block is not an IST tool and/or an SBT tool;
  • the SRx or SRy of the scan area under the luma component of the transform block is greater than Q and the SRx or SRy of the scan area under the chroma component is greater than P, and the transform block is a non-transform skip block, Q and P are both integers .
  • M is 6 and P is 0.
  • the above-mentioned M and P are default values.
  • At least one of the value of M, the value of P and the enable flag of DQ is stored in the sequence header or the image header, wherein the enable flag of DQ is used to control whether the current sequence can turn on the DQ quantization mode .
  • the sequence header is shown in Table 1, and the decoding device first decodes the sequence header shown in Table 1 to obtain at least one of the value of M, the value of P, and the enable flag bit of DQ. First, the DQ enable flag bit determines whether the current sequence can turn on the DQ quantization mode. If it is determined that the DQ quantization mode can be enabled for the current sequence, the above-mentioned condition 2 is executed according to the decoded M and/or P to determine whether the transform block can use the DQ quantization mode.
  • the enable flag bit of DQ when it is determined that the current sequence can turn on the DQ quantization mode, it is determined according to the transform tool identifier used by the transform block, or the SRx or SRy of the scanning area of the transform block under the luminance component. , and the SRx or SRy of the scanning area of the block to be decoded under the chrominance component, and determine whether the transform block satisfies the preset condition.
  • the flag bit information of the previous quantized coefficient of the to-be-decoded coefficient is obtained, and the current transform coefficient is determined from N quantizers according to the flag bit information of the previous quantized coefficient.
  • the target quantizer to use when quantizing That is, the present application only needs to obtain the flag bit information of the previous quantization coefficient to determine the target quantizer without waiting for the decoding of the to-be-decoded coefficient to be completed, thereby reducing the coding and decoding complexity and improving the coding and decoding efficiency.
  • the present application further expands the number of gtx flags on the basis of dependency quantization, thereby improving the decoding performance.
  • FIG. 8 to FIG. 12 are only examples of the present application, and should not be construed as limiting the present application.
  • the size of the sequence numbers of the above-mentioned processes does not mean the sequence of execution, and the execution sequence of each process should be determined by its functions and internal logic, and should not be dealt with in the present application.
  • the implementation of the embodiments constitutes no limitation.
  • the term "and/or" is only an association relationship for describing associated objects, indicating that there may be three kinds of relationships. Specifically, A and/or B can represent three situations: A exists alone, A and B exist at the same time, and B exists alone.
  • the character "/" in this document generally indicates that the related objects are an "or" relationship.
  • FIG. 13 is a schematic block diagram of a video encoder provided by an embodiment of the present application.
  • the video encoder 10 includes:
  • an obtaining unit 11 for obtaining the block to be encoded
  • a processing unit 12 configured to process the to-be-coded block to obtain a transform block of the to-be-coded block
  • the quantization unit 13 is configured to determine a target quantizer from N quantizers to quantize the to-be-coded coefficient for a to-be-coded coefficient in the transform block to obtain a current quantized coefficient, and the N quantizers are dependent A quantizer corresponding to the DQ mode of quantization, the N is a positive integer greater than or equal to 2;
  • the encoding unit 14 is configured to encode the syntax element of the current quantized coefficient to form a code stream, wherein the syntax element includes: a coefficient non-zero flag, a coefficient absolute value greater than 1 flag, a coefficient absolute value greater than 2 flag, at least A coefficient absolute value greater than i flag, a coefficient absolute value residual value flag, and a symbol flag, where i is a positive integer from 3 to M, where M is a positive integer greater than or equal to 3.
  • the encoding unit 14 is specifically configured to perform the following three rounds of encoding, including:
  • the first round of encoding is to encode the coefficient non-zero mark, the coefficient absolute value greater than 1 mark, the coefficient absolute value greater than 2 mark and at least one coefficient absolute value greater than i mark of the current quantized coefficient;
  • the second round of encoding encodes the coefficient absolute value residual value flag of the current quantized coefficient
  • the third round of encoding is to encode the sign flag of the current quantized coefficient.
  • the first round of encoding includes a first sub-round of encoding
  • the encoding unit 14 is specifically configured to, in the first sub-round of encoding, mark the coefficient non-zero and the coefficient absolute value greater than 1 flag to encode.
  • the encoding unit 14 is specifically configured to, in the first sub-round encoding, encode the flag that the absolute value of the coefficient is greater than 2 and/or the flag that the absolute value of the at least one coefficient is greater than i.
  • the first round of encoding further includes a second sub-round of encoding
  • the encoding unit 14 is specifically configured to, in the second sub-round of encoding, indicate that the absolute value of the coefficient is greater than 2 and the at least one coefficient
  • One or more of the absolute value greater than i flags are encoded; or, in the first sub-round encoding, the coefficient absolute value greater than 2 flag is encoded, and in the second sub-round encoding, the at least one coefficient absolute value greater than 2 is encoded. i flag to encode.
  • the first round of encoding further includes a second sub-round encoding and a third sub-round encoding
  • the encoding unit 14 is specifically configured to, in the second sub-round encoding, indicate that the absolute value of the coefficient is greater than 2 encoding; in the third sub-round encoding, encoding the at least one coefficient whose absolute value is greater than the i flag.
  • the encoding unit 14 is further specifically configured to encode each flag in which the absolute value of the at least one coefficient is greater than the i flag, respectively.
  • the at least one coefficient absolute value greater than i flag includes a coefficient absolute value greater than 3 flag and a coefficient absolute value greater than 4 flag.
  • the encoding unit 14 is specifically configured to, in the first sub-round encoding, set the flag of the absolute value of the coefficient is greater than 2, the absolute value of the coefficient is greater than 3, and the absolute value of the coefficient is greater than 4. one or more to encode.
  • the first round of encoding further includes a second sub-round of encoding
  • the encoding unit 14 is specifically configured to, in the second sub-round of encoding, indicate that the absolute value of the coefficient is greater than 2, and the absolute value of the coefficient is greater than 2.
  • the value is greater than 3 and/or the absolute value of the coefficient is greater than 4 for encoding; or, in the first sub-round encoding, the coefficient absolute value greater than 2 is encoded, and in the second sub-round encoding, the absolute value of the coefficient is encoded. Values greater than 3 flags and the absolute value of the coefficients greater than 4 flags are encoded.
  • the first round of encoding further includes a second sub-round encoding and a third sub-round encoding
  • the encoding unit 14 is specifically configured to, in the second sub-round encoding, indicate that the absolute value of the coefficient is greater than 2 coding; in the third sub-round coding, coding is performed on the flag that the absolute value of the coefficient is greater than 3 and the flag that the absolute value of the coefficient is greater than 4.
  • the first round of encoding further includes a second sub-round of encoding, a third sub-round of encoding, and a fourth sub-round of encoding
  • the encoding unit 14 is specifically configured to, in the second sub-round of encoding, The coefficient absolute value greater than 2 is coded; in the third sub-round encoding, the coefficient absolute value greater than 3 is coded; in the fourth sub-round coding, the coefficient absolute value greater than 4 is coded.
  • At least one of the N quantizers is a non-zero quantizer capable of quantizing all transform coefficients into non-zero quantized coefficients.
  • At least one of the N quantizers is a zero-point quantizer capable of quantizing transform coefficients to zero.
  • the N quantizers include one zero-point quantizer and one non-zero quantizer.
  • the quantization unit 13 is specifically configured to obtain the flag bit information of the previous quantization coefficient of the current quantization coefficient; according to the flag bit information of the previous quantization coefficient, determine from the N quantizers a target quantizer; quantizing the to-be-coded coefficients using the target quantizer.
  • the quantization unit 13 is specifically configured to acquire the state of the previous quantization coefficient; and determine the current quantization according to the flag bit information of the previous quantization coefficient and the state of the previous quantization coefficient the state of the coefficient; the target quantizer is determined from the N quantizers according to the state of the current quantized coefficient.
  • the quantization unit 13 is specifically configured to determine the state jump value according to the flag bit information of the previous quantization coefficient; determine the state jump value according to the state of the previous quantization coefficient and the state jump value Describe the state of the current quantized coefficients.
  • the quantization unit 13 is specifically configured to, if the coefficient is non-zero, the value of the flag and the coefficient If the value of the absolute value greater than 1 flag satisfies the following formula, it is determined that the state jump value is 1; if the value of the coefficient non-zero flag and the value of the coefficient absolute value greater than 1 flag do not satisfy the following formula, it is determined that the The state jump value is 0;
  • the t is the state transition value
  • the sigflag is the value of the coefficient non-zero flag
  • the gt1 is the value of the coefficient whose absolute value is greater than 1 flag.
  • the apparatus embodiments and the method embodiments may correspond to each other, and similar descriptions may refer to the method embodiments. To avoid repetition, details are not repeated here.
  • the video encoder 10 shown in FIG. 13 can execute the methods of the embodiments of the present application, and the aforementioned and other operations and/or functions of the respective units in the video encoder 10 are for realizing the corresponding processes in the respective methods, such as the method, respectively. , and are not repeated here for brevity.
  • FIG. 14 is a schematic block diagram of a video decoder provided by an embodiment of the present application.
  • the video decoder 20 may include:
  • the first decoding unit 21 is used for decoding the code stream to obtain the code block to be decoded
  • the second decoding unit 22 is configured to decode a syntax element of a to-be-decoded coefficient in the to-be-decoded block, where the to-be-decoded coefficient is quantized by one of N quantizers, where the N quantizers are For a quantizer corresponding to the DQ quantization mode, the N is a positive integer greater than or equal to 2, and the syntax elements include: a coefficient non-zero flag, a coefficient absolute value greater than 1 flag, a coefficient absolute value greater than 2 flag, and at least one coefficient absolute value greater than the i mark, the coefficient absolute value residual value mark and the symbol mark, the i is a positive integer from 3 to M, and the M is a positive integer greater than or equal to 3;
  • the processing unit 23 is configured to obtain the value of the coefficient to be decoded according to the syntax element obtained by decoding, and obtain the reconstructed block of the block to be decoded according to the value of the coefficient to be decoded.
  • the second decoding unit 22 is specifically configured to perform the following three rounds of decoding, including:
  • the first round of decoding is to decode the coefficient non-zero mark, the coefficient absolute value greater than 1 mark, the coefficient absolute value greater than 2 mark and the at least one coefficient absolute value greater than i mark of the coefficient to be decoded;
  • the second round of decoding is to decode the coefficient absolute value residual value flag of the coefficient to be decoded
  • the third round of decoding is to decode the sign flag of the coefficient to be decoded.
  • the first round of decoding includes a first sub-round of decoding
  • the second decoding unit 22 is specifically configured to, in the first sub-round of decoding, determine whether the coefficient non-zero flag and the absolute value of the coefficient are greater than 1 flag to decode.
  • the second decoding unit 22 is specifically configured to decode the flag that the absolute value of the coefficient is greater than 2 and/or the flag that the absolute value of the at least one coefficient is greater than i in the first sub-round of decoding.
  • the first round of decoding further includes a second sub-round of decoding, and the second decoding unit 22 is specifically configured to
  • one or more of the coefficient absolute value greater than 2 flag and the at least one coefficient absolute value greater than i flag are decoded; or,
  • the flag whose absolute value of the coefficient is greater than 2 is decoded, and in the second sub-round decoding, the at least one coefficient whose absolute value is greater than the i flag is decoded.
  • the first round of decoding further includes a second sub-round of decoding and a third sub-round of decoding
  • the second decoding unit 22 is specifically configured to, in the second sub-round of decoding, determine the absolute value of the coefficient greater than 2 flags to decode
  • the absolute value of the at least one coefficient is greater than the i flag to be decoded.
  • the second decoding unit 22 is specifically configured to decode each flag in which the absolute value of the at least one coefficient is greater than the i flag.
  • the at least one coefficient absolute value greater than i flag includes a coefficient absolute value greater than 3 flag and a coefficient absolute value greater than 4 flag.
  • the second decoding unit 22 is specifically configured to, in the first sub-round decoding, indicate that the absolute value of the coefficient is greater than 2, the absolute value of the coefficient is greater than 3, and the absolute value of the coefficient is greater than 4. one or more of the decoding.
  • the first round of decoding further includes a second sub-round of decoding
  • the second decoding unit 22 is specifically configured to, in the second sub-round of decoding, indicate that the absolute value of the coefficient is greater than 2, and the The absolute value of the coefficient is greater than 3 flags and/or the absolute value of the coefficient is greater than 4 flags for decoding; or,
  • the flag of the absolute value of the coefficient greater than 2 is decoded
  • the flag of the absolute value of the coefficient of greater than 3 and the flag of the absolute value of the coefficient of greater than 4 are decoded.
  • the first round of decoding further includes a second sub-round of decoding and a third sub-round of decoding
  • the second decoding unit 22 is specifically configured to, in the second sub-round of decoding, determine the absolute value of the coefficient greater than 2 flags to decode
  • decoding is performed on the flag that the absolute value of the coefficient is greater than 3 and the flag that the absolute value of the coefficient is greater than 4.
  • the first round of decoding further includes a second sub-round of decoding, a third sub-round of decoding, and a fourth sub-round of decoding.
  • the second decoding unit 22 is specifically configured to, in the second sub-round of decoding, The absolute value of the coefficient is greater than the 2 mark for decoding;
  • the absolute value of the coefficient is greater than 4 flags are decoded.
  • the second decoding unit 22 is specifically configured to decode the coefficient non-zero flag.
  • the coefficient non-zero flag When the coefficient non-zero flag is decoded as 0, skip the flag that the absolute value of the coefficient is greater than 1, the absolute value of the coefficient is greater than 2, and the absolute value of the coefficient is greater than 2.
  • the absolute value of the decoded coefficient is greater than 1, and when the absolute value of the coefficient is greater than 1, the symbol is decoded, and the symbol is decoded, and the absolute value of the coefficient is greater than 2 and the absolute value of the coefficient is greater than 3. , the decoding of the coefficient absolute value greater than 4 flag and the coefficient absolute value remaining value flag;
  • the second decoding unit 22 is specifically configured to convert the decoded value of the non-zero mark, the decoded value of the coefficient absolute value greater than 1 mark, the decoded value of the coefficient absolute value greater than 2 mark, the coefficient absolute value greater than 3 mark
  • the sum of the decoded value, the decoded value whose absolute value of the coefficient is greater than the 4 mark, and the sum of the decoded values marked by the residual value of the coefficient absolute value and the remaining value mark, is used as the absolute value of the coefficient to be decoded;
  • the value of the to-be-decoded coefficient is obtained according to the absolute value of the to-be-decoded coefficient and the decoded value of the sign flag.
  • At least one of the N quantizers is a non-zero quantizer capable of quantizing all transform coefficients into non-zero quantized coefficients.
  • At least one of the N quantizers is a zero-point quantizer capable of quantizing transform coefficients to zero.
  • the N quantizers include one zero-point quantizer and one non-zero quantizer.
  • the processing unit 23 is specifically configured to obtain the flag bit information of the decoded previous quantized coefficient of the coefficient to be decoded;
  • the processing unit 23 is specifically configured to obtain the state of the previous quantized coefficient
  • the target quantizer is determined from the N quantizers according to the state of the coefficient to be decoded.
  • the processing unit 23 is specifically configured to determine the state jump value according to the flag bit information of the previous quantization coefficient
  • the state of the coefficient to be decoded is determined according to the state of the previous quantized coefficient and the state jump value.
  • the processing unit 23 is specifically configured to, if the coefficient is non-zero, the value of the flag and the coefficient If the value of the absolute value greater than the 1 flag satisfies the following formula, it is determined that the state jump value is 1;
  • the t is the state transition value
  • the sigflag is the value of the coefficient non-zero flag
  • the gt1 is the value of the coefficient whose absolute value is greater than 1 flag.
  • the apparatus embodiments and the method embodiments may correspond to each other, and similar descriptions may refer to the method embodiments. To avoid repetition, details are not repeated here.
  • the video decoder 20 shown in FIG. 14 may correspond to the corresponding subject in performing the method of the embodiments of the present application, and the aforementioned and other operations and/or functions of the respective units in the video decoder 20 are for the purpose of implementing the method, etc. For the sake of brevity, the corresponding processes in each method will not be repeated here.
  • the functional unit may be implemented in the form of hardware, may also be implemented by an instruction in the form of software, or may be implemented by a combination of hardware and software units.
  • the steps of the method embodiments in the embodiments of the present application may be completed by hardware integrated logic circuits in the processor and/or instructions in the form of software, and the steps of the methods disclosed in conjunction with the embodiments of the present application may be directly embodied as hardware
  • the execution of the decoding processor is completed, or the execution is completed by a combination of hardware and software units in the decoding processor.
  • the software unit may be located in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, and other storage media mature in the art.
  • the storage medium is located in the memory, and the processor reads the information in the memory, and completes the steps in the above method embodiments in combination with its hardware.
  • FIG. 15 is a schematic block diagram of an electronic device 30 provided by an embodiment of the present application.
  • the electronic device 30 may be the video encoder or the video decoder described in this embodiment of the application, and the electronic device 30 may include:
  • the processor 32 can call and run the computer program 34 from the memory 33 to implement the methods in the embodiments of the present application.
  • the processor 32 may be adapted to perform the steps of the above-described methods according to instructions in the computer program 34 .
  • the processor 32 may include, but is not limited to:
  • DSP Digital Signal Processor
  • ASIC Application Specific Integrated Circuit
  • FPGA Field Programmable Gate Array
  • the memory 33 includes but is not limited to:
  • Non-volatile memory may be a read-only memory (Read-Only Memory, ROM), a programmable read-only memory (Programmable ROM, PROM), an erasable programmable read-only memory (Erasable PROM, EPROM), an electrically programmable read-only memory (Erasable PROM, EPROM). Erase programmable read-only memory (Electrically EPROM, EEPROM) or flash memory. Volatile memory may be Random Access Memory (RAM), which acts as an external cache.
  • RAM Random Access Memory
  • RAM Static RAM
  • DRAM Dynamic RAM
  • SDRAM Synchronous DRAM
  • SDRAM double data rate synchronous dynamic random access memory
  • Double Data Rate SDRAM DDR SDRAM
  • enhanced SDRAM ESDRAM
  • synchronous link dynamic random access memory SLDRAM
  • Direct Rambus RAM Direct Rambus RAM
  • the computer program 34 may be divided into one or more units, and the one or more units are stored in the memory 33 and executed by the processor 32 to complete the procedures provided by the present application.
  • the one or more units may be a series of computer program instruction segments capable of performing specific functions, and the instruction segments are used to describe the execution process of the computer program 34 in the electronic device 30.
  • the electronic device 30 may further include:
  • a transceiver 33 which can be connected to the processor 32 or the memory 33 .
  • the processor 32 can control the transceiver 33 to communicate with other devices, specifically, can send information or data to other devices, or receive information or data sent by other devices.
  • the transceiver 33 may include a transmitter and a receiver.
  • the transceiver 33 may further include antennas, and the number of the antennas may be one or more.
  • each component in the electronic device 30 is connected through a bus system, wherein the bus system includes a power bus, a control bus and a status signal bus in addition to a data bus.
  • FIG. 16 is a schematic block diagram of a video encoding and decoding system 40 provided by an embodiment of the present application.
  • the video encoding and decoding system 40 may include: a video encoder 41 and a video decoder 42 , wherein the video encoder 41 is used to perform the video encoding method involved in the embodiments of the present application, and the video decoder 42 is used to perform The video decoding method involved in the embodiments of the present application.
  • the present application also provides a computer storage medium on which a computer program is stored, and when the computer program is executed by a computer, enables the computer to execute the methods of the above method embodiments.
  • the embodiments of the present application further provide a computer program product including instructions, and when the instructions are executed by a computer, the instructions cause the computer to execute the method of the above method embodiments.
  • the present application also provides a code stream, which is generated according to the video encoding method described in the above embodiments, wherein the code stream includes the following syntax elements: coefficient non-zero flag, coefficient absolute value greater than 1 flag, coefficient absolute value Value greater than 2 flag, at least one coefficient absolute value greater than i flag, coefficient absolute value remaining value flag, and sign flag, where i is a positive integer from 3 to M, where M is a positive integer greater than or equal to 3.
  • the computer program product includes one or more computer instructions.
  • the computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable device.
  • the computer instructions may be stored on or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions may be transmitted over a wire from a website site, computer, server or data center (eg coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (eg infrared, wireless, microwave, etc.) means to another website site, computer, server or data center.
  • the computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that includes one or more available media integrated.
  • the available media may be magnetic media (e.g., floppy disk, hard disk, magnetic tape), optical media (e.g., digital video disc (DVD)), or semiconductor media (e.g., solid state disk (SSD)), and the like.
  • the disclosed system, apparatus and method may be implemented in other manners.
  • the apparatus embodiments described above are only illustrative.
  • the division of the unit is only a logical function division.
  • there may be other division methods for example, multiple units or components may be combined or Integration into another system, or some features can be ignored, or not implemented.
  • the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of devices or units, and may be in electrical, mechanical or other forms.
  • Units described as separate components may or may not be physically separated, and components shown as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit.

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Abstract

本申请实施例提供一种视频编解码方法与系统、及视频编解码器，本申请在DQ量化方式基础上，对系数的语法元素中的系数绝对值大于i标志的数量进行拓展，以提高编解码性能。另外，本申请还提出了对拓展后的系数的语法元素的编解码方式，实现对拓展后的系数的语法元素进行准确编解码，进一步提高了编解码性能。

Description

视频编解码方法与系统、及视频编解码器
本申请要求于2021年03月17日提交中国专利局、申请号为2021102879437、申请名称为“视频编解码方法与系统、及视频编解码器”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及视频编解码技术领域，尤其涉及一种视频编解码方法与系统、及视频编解码器。
背景技术
数字视频技术可以并入多种视频装置中，例如数字电视、智能手机、计算机、电子阅读器或视频播放器等。随着视频技术的发展，视频数据所包括的数据量较大，为了便于视频数据的传输，视频装置执行视频压缩技术，以使视频数据更加有效的传输或存储。
在视频压缩过程中为了便于编码，对变换系数进行量化，例如使用对偶量化(也称为依赖性量化)对变换系数进行量化，对偶量化共包含了两个量化器，这两个量化器虽然有着相同的量化步长，但与变换系数的匹配却是交错的。对偶量化使得大步长的量化器能够完成更精细的量化，达到减小了重建的变换系数与原始变换系数之间的损失，从而提高编码效率。
但是，现有的对偶量化方式的编解码效率低。
发明内容
本申请实施例提供了一种视频编解码方法与系统、及视频编解码器，以提高对偶量化方式的编解码效率。
第一方面，本申请提供了一种视频编码方法，包括：
获取待编码块；
对所述待编码块进行处理，得到所述待编码块的变换块；
针对所述变换块中一待编码系数，从N个量化器中确定一个目标量化器对所述待编码系数进行量化，得到当前量化系数，所述N个量化器为依赖性量化DQ方式对应的量化器，所述N为大于或等于2的正整数；
对所述当前量化系数的语法元素进行编码，形成码流，其中，所述语法元素包括：系数非零标志、系数绝对值大于1标志、系数绝对值大于2标志、至少一个系数绝对值大 于i标志、系数绝对值剩余值标志和符号标志，所述i为从3取到M的正整数，所述M为大于3的正整数。
第二方面，本申请实施例提供一种视频解码方法，包括：
解码码流，得到待解码块；
对所述当前块中一待解码系数的语法元素进行解码，所述待解码系数经过N个量化器中的一个量化器量化得到，所述N个量化器为DQ量化方式对应的量化器，所述N为大于或等于2的正整数，所述语法元素包括：系数非零标志、系数绝对值大于1标志、系数绝对值大于2标志、至少一个系数绝对值大于i标志、系数绝对值剩余值标志和符号标志，所述i为从3取到M的正整数，所述M为大于或等于3的正整数；
根据解码得到的语法元素，得到所述待解码系数的值；
根据所述待解码系数的值，得到待解码块的重建块。
第三方面，本申请提供了一种视频编码器，用于执行上述第一方面或其各实现方式中的方法。具体地，该编码器包括用于执行上述第一方面或其各实现方式中的方法的功能单元。
第四方面，本申请提供了一种视频解码器，用于执行上述第二方面或其各实现方式中的方法。具体地，该解码器包括用于执行上述第二方面或其各实现方式中的方法的功能单元。
第五方面，提供了一种视频编码器，包括处理器和存储器。该存储器用于存储计算机程序，该处理器用于调用并运行该存储器中存储的计算机程序，以执行上述第一方面或其各实现方式中的方法。
第六方面，提供了一种视频解码器，包括处理器和存储器。该存储器用于存储计算机程序，该处理器用于调用并运行该存储器中存储的计算机程序，以执行上述第二方面或其各实现方式中的方法。
第七方面，提供了一种视频编解码系统，包括视频编码器和视频解码器。视频编码器用于执行上述第一方面或其各实现方式中的方法，视频解码器用于执行上述第二方面或其各实现方式中的方法。
第八方面，提供了一种芯片，用于实现上述第一方面至第二方面中的任一方面或其各实现方式中的方法。具体地，该芯片包括：处理器，用于从存储器中调用并运行计算机程序，使得安装有该芯片的设备执行如上述第一方面至第二方面中的任一方面或其各实现方式中的方法。
第九方面，提供了一种计算机可读存储介质，用于存储计算机程序，该计算机程序使得计算机执行上述第一方面至第二方面中的任一方面或其各实现方式中的方法。
第十方面，提供了一种计算机程序产品，包括计算机程序指令，该计算机程序指令使得计算机执行上述第一方面至第二方面中的任一方面或其各实现方式中的方法。
第十一方面，提供了一种计算机程序，当其在计算机上运行时，使得计算机执行上述第一方面至第二方面中的任一方面或其各实现方式中的方法。
第十一方面，提供了一种码流，该码流是根据上述第一方面的方法生成的，其中码流中包括如下语法元素：系数非零标志、系数绝对值大于1标志、系数绝对值大于2标志、至少一个系数绝对值大于i标志、系数绝对值剩余值标志和符号标志，所述i为从3取到M的正整数，所述M为大于或等于3的正整数。
基于以上技术方案，在DQ量化方式基础上，对系数的语法元素中的系数绝对值大于x标志的数量进行拓展，以提高编解码性能。另外，本申请还提出了对拓展后的系数的语法元素的编解码方式，实现对拓展后的系数的语法元素进行准确编解码，进一步提高了编解码性能。
附图说明
图1为本申请实施例涉及的一种视频编解码系统100的示意性框图；
图2是本申请实施例提供的视频编码器200的示意性框图；
图3是本申请实施例提供的解码框架300的示意性框图；
图4为两种量化器Q0和Q1进行量化的示意图；
图5为决定变换系数所使用量化器的状态转移示意图；
图6为网格结构表示状态与变换系数级别的依赖性示意图；
图7为Q0和Q1的候选变换系数级别示意图；
图8为本申请实施例提供的一种视频编码方法的流程示意图；
图9为原有DQ技术的Q0,Q1的量化器示意图；
图10为本申请涉及的Q0,Q1的量化器示意图；
图11为本申请实施例提供的另一种视频编码方法的流程示意图；
图12为本申请实施例提供的视频解码方法的一种流程示意图；
图13是本申请实施例提供的视频编码器的示意性框图；
图14是本申请实施例提供的视频解码器的示意性框图；
图15是本申请实施例提供的电子设备的示意性框图；
图16是本申请实施例提供的视频编解码系统的示意性框图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行描述。
本申请可应用于图像编解码领域、视频编解码领域、硬件视频编解码领域、专用电路视频编解码领域、实时视频编解码领域等。例如，本申请的方案可结合至音视频编码标准(audio video coding standard，简称AVS)，例如，H.264/音视频编码(audio video coding，简称AVC)标准，H.265/高效视频编码(high efficiency video coding，简称HEVC)标准以及H.266/多功能视频编码(versatile video coding，简称VVC)标准。或者，本申请的方案可结合至其它专属或行业标准而操作，所述标准包含ITU-TH.261、ISO/IECMPEG-1Visual、ITU-TH.262或ISO/IECMPEG-2Visual、ITU-TH.263、ISO/IECMPEG-4Visual，ITU-TH.264(还称为ISO/IECMPEG-4AVC)，包含可分级视频编解码(SVC)及多视图视频编解码(MVC)扩展。应理解，本申请的技术不限于任何特定编解码标准或技术。
为了便于理解，首先结合图1对本申请实施例涉及的视频编解码系统进行介绍。
图1为本申请实施例涉及的一种视频编解码系统100的示意性框图。需要说明的是，图1只是一种示例，本申请实施例的视频编解码系统包括但不限于图1所示。如图1所示，该视频编解码系统100包含编码设备110和解码设备120。其中编码设备用于对视频数据进行编码(可以理解成压缩)产生码流，并将码流传输给解码设备。解码设备对编码设备编码产生的码流进行解码，得到解码后的视频数据。
本申请实施例的编码设备110可以理解为具有视频编码功能的设备，解码设备120可以理解为具有视频解码功能的设备，即本申请实施例对编码设备110和解码设备120包括更广泛的装置，例如包含智能手机、台式计算机、移动计算装置、笔记本(例如，膝上型)计算机、平板计算机、机顶盒、电视、相机、显示装置、数字媒体播放器、视频游戏控制台、车载计算机等。
在一些实施例中，编码设备110可以经由信道130将编码后的视频数据(如码流)传输给解码设备120。信道130可以包括能够将编码后的视频数据从编码设备110传输到解码设备120的一个或多个媒体和/或装置。
在一个实例中，信道130包括使编码设备110能够实时地将编码后的视频数据直接发射到解码设备120的一个或多个通信媒体。在此实例中，编码设备110可根据通信标准来调制编码后的视频数据，且将调制后的视频数据发射到解码设备120。其中通信媒体 包含无线通信媒体，例如射频频谱，可选的，通信媒体还可以包含有线通信媒体，例如一根或多根物理传输线。
在另一实例中，信道130包括存储介质，该存储介质可以存储编码设备110编码后的视频数据。存储介质包含多种本地存取式数据存储介质，例如光盘、DVD、快闪存储器等。在该实例中，解码设备120可从该存储介质中获取编码后的视频数据。
在另一实例中，信道130可包含存储服务器，该存储服务器可以存储编码设备110编码后的视频数据。在此实例中，解码设备120可以从该存储服务器中下载存储的编码后的视频数据。可选的，该存储服务器可以存储编码后的视频数据且可以将该编码后的视频数据发射到解码设备120，例如web服务器(例如，用于网站)、文件传送协议(FTP)服务器等。
一些实施例中，编码设备110包含视频编码器112及输出接口113。其中，输出接口113可以包含调制器/解调器(调制解调器)和/或发射器。
在一些实施例中，编码设备110除了包括视频编码器112和输入接口113外，还可以包括视频源111。
视频源111可包含视频采集装置(例如，视频相机)、视频存档、视频输入接口、计算机图形系统中的至少一个，其中，视频输入接口用于从视频内容提供者处接收视频数据，计算机图形系统用于产生视频数据。
视频编码器112对来自视频源111的视频数据进行编码，产生码流。视频数据可包括一个或多个图像(picture)或图像序列(sequence of pictures)。码流以比特流的形式包含了图像或图像序列的编码信息。编码信息可以包含编码图像数据及相关联数据。相关联数据可包含序列参数集(sequence parameter set，简称SPS)、图像参数集(picture parameter set，简称PPS)及其它语法结构。SPS可含有应用于一个或多个序列的参数。PPS可含有应用于一个或多个图像的参数。语法结构是指码流中以指定次序排列的零个或多个语法元素的集合。
视频编码器112经由输出接口113将编码后的视频数据直接传输到解码设备120。编码后的视频数据还可存储于存储介质或存储服务器上，以供解码设备120后续读取。
在一些实施例中，解码设备120包含输入接口121和视频解码器122。
在一些实施例中，解码设备120除包括输入接口121和视频解码器122外，还可以包括显示装置123。
其中，输入接口121包含接收器及/或调制解调器。输入接口121可通过信道130接 收编码后的视频数据。
视频解码器122用于对编码后的视频数据进行解码，得到解码后的视频数据，并将解码后的视频数据传输至显示装置123。
显示装置123显示解码后的视频数据。显示装置123可与解码设备120整合或在解码设备120外部。显示装置123可包括多种显示装置，例如液晶显示器(LCD)、等离子体显示器、有机发光二极管(OLED)显示器或其它类型的显示装置。
此外，图1仅为实例，本申请实施例的技术方案不限于图1，例如本申请的技术还可以应用于单侧的视频编码或单侧的视频解码。
下面对本申请实施例涉及的视频编码框架进行介绍。
图2是本申请实施例提供的视频编码器200的示意性框图。应理解，该视频编码器200可用于对图像进行有损压缩(lossy compression)，也可用于对图像进行无损压缩(lossless compression)。该无损压缩可以是视觉无损压缩(visually lossless compression)，也可以是数学无损压缩(mathematically lossless compression)。
该视频编码器200可应用于亮度色度(YCbCr，YUV)格式的图像数据上。例如，YUV比例可以为4:2:0、4:2:2或者4:4:4，Y表示明亮度(Luma)，Cb(U)表示蓝色色度，Cr(V)表示红色色度，U和V表示为色度(Chroma)用于描述色彩及饱和度。例如，在颜色格式上，4:2:0表示每4个像素有4个亮度分量，2个色度分量(YYYYCbCr)，4:2:2表示每4个像素有4个亮度分量，4个色度分量(YYYYCbCrCbCr)，4:4:4表示全像素显示(YYYYCbCrCbCrCbCrCbCr)。
例如，该视频编码器200读取视频数据，针对视频数据中的每帧图像，将一帧图像划分成若干个编码树单元(coding tree unit，CTU)，在一些例子中，CTB可被称作“树型块”、“最大编码单元”(Largest Coding unit，简称LCU)或“编码树型块”(coding tree block，简称CTB)。每一个CTU可以与图像内的具有相等大小的像素块相关联。每一像素可对应一个亮度(luminance或luma)采样及两个色度(chrominance或chroma)采样。因此，每一个CTU可与一个亮度采样块及两个色度采样块相关联。一个CTU大小例如为128×128、64×64、32×32等。一个CTU又可以继续被划分成若干个编码单元(Coding Unit，CU)进行编码，CU可以为矩形块也可以为方形块。CU可以进一步划分为预测单元(prediction Unit，简称PU)和变换单元(transform unit，简称TU)，进而使得编码、预测、变换分离，处理的时候更灵活。在一种示例中，CTU以四叉树方式划分为CU，CU以四叉树方式划分为 TU、PU。
视频编码器及视频解码器可支持各种PU大小。假定特定CU的大小为2N×2N，视频编码器及视频解码器可支持2N×2N或N×N的PU大小以用于帧内预测，且支持2N×2N、2N×N、N×2N、N×N或类似大小的对称PU以用于帧间预测。视频编码器及视频解码器还可支持2N×nU、2N×nD、nL×2N及nR×2N的不对称PU以用于帧间预测。
在一些实施例中，如图2所示，该视频编码器200可包括：预测单元210、残差单元220、变换/量化单元230、反变换/量化单元240、重建单元250、环路滤波单元260、解码图像缓存270和熵编码单元280。需要说明的是，视频编码器200可包含更多、更少或不同的功能组件。
可选的，在本申请中，当前块(current block)可以称为当前编码单元(CU)或当前预测单元(PU)等。预测块也可称为预测图像块或图像预测块，重建图像块也可称为重建块或图像重建图像块。
在一些实施例中，预测单元210包括帧间预测单元211和帧内预测单元212。由于视频的一个帧中的相邻像素之间存在很强的相关性，在视频编解码技术中使用帧内预测的方法消除相邻像素之间的空间冗余。由于视频中的相邻帧之间存在着很强的相似性，在视频编解码技术中使用帧间预测方法消除相邻帧之间的时间冗余，从而提高编码效率。
帧间预测单元211可用于帧间预测，帧间预测可以参考不同帧的图像信息，帧间预测使用运动信息从参考帧中找到参考块，根据参考块生成预测块，用于消除时间冗余；帧间预测所使用的帧可以为P帧和/或B帧，P帧指的是向前预测帧，B帧指的是双向预测帧。运动信息包括参考帧所在的参考帧列表，参考帧索引，以及运动矢量。运动矢量可以是整像素的或者是分像素的，如果运动矢量是分像素的，那么需要再参考帧中使用插值滤波做出所需的分像素的块，这里把根据运动矢量找到的参考帧中的整像素或者分像素的块叫参考块。有的技术会直接把参考块作为预测块，有的技术会在参考块的基础上再处理生成预测块。在参考块的基础上再处理生成预测块也可以理解为把参考块作为预测块然后再在预测块的基础上处理生成新的预测块。
帧内预测单元212只参考同一帧图像的信息，预测当前码图像块内的像素信息，用于消除空间冗余。帧内预测所使用的帧可以为I帧。例如图5所示，白色的4×4块是当前块，当前块左边一行和上面一列的灰色的像素为当前块的参考像素，帧内预测使用这些参考像素对当前块进行预测。这些参考像素可能已经全部可得，即全部已经编解码。也可能有部分不可得，比如当前块是整帧的最左侧，那么当前块的左边的参考像素不可 得。或者编解码当前块时，当前块左下方的部分还没有编解码，那么左下方的参考像素也不可得。对于参考像素不可得的情况，可以使用可得的参考像素或某些值或某些方法进行填充，或者不进行填充。
在一些实施例中，帧内预测方法还包括多参考行帧内预测方法(multiple reference line，MRL)，MRL可以使用更多的参考像素从而提高编码效率。
帧内预测有多种预测模式，H.264中对4×4的块进行帧内预测的9种模式。其中模式0是将当前块上面的像素按竖直方向复制到当前块作为预测值；模式1是将左边的参考像素按水平方向复制到当前块作为预测值；模式2(DC)是将A～D和I～L这8个点的平均值作为所有点的预测值，模式3至模式8是分别按某一个角度将参考像素复制到当前块的对应位置。因为当前块某些位置不能正好对应到参考像素，可能需要使用参考像素的加权平均值，或者说是插值的参考像素的分像素。
需要说明的是，随着角度模式的增加，帧内预测将会更加精确，也更加符合对高清以及超高清数字视频发展的需求。
残差单元220可基于CU的像素块及CU的PU的预测块来产生CU的残差块。举例来说，残差单元220可产生CU的残差块，使得残差块中的每一采样具有等于以下两者之间的差的值：CU的像素块中的采样，及CU的PU的预测块中的对应采样。
变换/量化单元230可量化变换系数。变换/量化单元230可基于与CU相关联的量化参数(QP)值来量化与CU的TU相关联的变换系数。视频编码器200可通过调整与CU相关联的QP值来调整应用于与CU相关联的变换系数的量化程度。
反变换/量化单元240可分别将逆量化及逆变换应用于量化后的变换系数，以从量化后的变换系数重建残差块。
重建单元250可将重建后的残差块的采样加到预测单元210产生的一个或多个预测块的对应采样，以产生与TU相关联的重建图像块。通过此方式重建CU的每一个TU的采样块，视频编码器200可重建CU的像素块。
环路滤波单元260可执行消块滤波操作以减少与CU相关联的像素块的块效应。
在一些实施例中，环路滤波单元260包括去块滤波单元、样点自适应补偿SAO单元、自适应环路滤波ALF单元。
解码图像缓存270可存储重建后的像素块。帧间预测单元211可使用含有重建后的像素块的参考图像来对其它图像的PU执行帧间预测。另外，帧内预测单元212可使用解码图像缓存270中的重建后的像素块来对在与CU相同的图像中的其它PU执行帧内 预测。
熵编码单元280可接收来自变换/量化单元230的量化后的变换系数。熵编码单元280可对量化后的变换系数执行一个或多个熵编码操作以产生熵编码后的数据。
本申请涉及的视频编码的基本流程如下：在编码端，将当前图像划分成块，针对当前块，预测单元210使用帧内预测或帧间预测产生当前块的预测块。残差单元220可基于预测块与当前块的原始块计算残差块，即预测块和当前块的原始块的差值，该残差块也可称为残差信息。该残差块经由变换/量化单元230变换与量化等过程，可以去除人眼不敏感的信息，以消除视觉冗余。可选的，经过变换/量化单元230变换与量化之前的残差块可称为时域残差块，经过变换/量化单元230变换与量化之后的时域残差块可称为频率残差块或频域残差块。熵编码单元280接收到变换量化单元230输出的量化后的变换系数，可对该量化后的变换系数进行熵编码，输出码流。例如，熵编码单元280可根据目标上下文模型以及二进制码流的概率信息消除字符冗余。
另外，视频编码器对变换量化单元230输出的量化后的变换系数进行反量化和反变换，得到当前块的残差块，再将当前块的残差块与当前块的预测块进行相加，得到当前块的重建块。随着编码的进行，可以得到当前图像中其他图像块对应的重建块，这些重建块进行拼接，得到当前图像的重建图像。由于编码过程中引入误差，为了降低误差，对重建图像进行滤波，例如，使用ALF对重建图像进行滤波，以减小重建图像中像素点的像素值与当前图像中像素点的原始像素值之间差异。将滤波后的重建图像存放在解码图像缓存270中，可以为后续的帧作为帧间预测的参考帧。
需要说明的是，编码端确定的块划分信息，以及预测、变换、量化、熵编码、环路滤波等模式信息或者参数信息等在必要时携带在码流中。解码端通过解析码流及根据已有信息进行分析确定与编码端相同的块划分信息，预测、变换、量化、熵编码、环路滤波等模式信息或者参数信息，从而保证编码端获得的解码图像和解码端获得的解码图像相同。
图3是本申请实施例提供的解码框架300的示意性框图。
如图3所示，视频解码器300包含：熵解码单元310、预测单元320、反量化/变换单元330、重建单元340、环路滤波单元350及解码图像缓存360。需要说明的是，视频解码器300可包含更多、更少或不同的功能组件。
视频解码器300可接收码流。熵解码单元310可解析码流以从码流提取语法元素。作为解析码流的一部分，熵解码单元310可解析码流中的经熵编码后的语法元素。预测 单元320、反量化/变换单元330、重建单元340及环路滤波单元350可根据从码流中提取的语法元素来解码视频数据，即产生解码后的视频数据。
在一些实施例中，预测单元320包括帧内预测单元321和帧间预测单元322。
帧内预测单元321可执行帧内预测以产生PU的预测块。帧内预测单元321可使用帧内预测模式以基于空间相邻PU的像素块来产生PU的预测块。帧内预测单元321还可根据从码流解析的一个或多个语法元素来确定PU的帧内预测模式。
帧间预测单元322可根据从码流解析的语法元素来构造第一参考图像列表(列表0)及第二参考图像列表(列表1)。此外，如果PU使用帧间预测编码，则熵解码单元310可解析PU的运动信息。帧间预测单元322可根据PU的运动信息来确定PU的一个或多个参考块。帧间预测单元322可根据PU的一个或多个参考块来产生PU的预测块。
反量化/变换单元330可逆量化(即，解量化)与TU相关联的变换系数。反量化/变换单元330可使用与TU的CU相关联的QP值来确定量化程度。
在逆量化变换系数之后，反量化/变换单元330可将一个或多个逆变换应用于逆量化变换系数，以便产生与TU相关联的残差块。
重建单元340使用与CU的TU相关联的残差块及CU的PU的预测块以重建CU的像素块。例如，重建单元340可将残差块的采样加到预测块的对应采样以重建CU的像素块，得到重建图像块。
环路滤波单元350可执行消块滤波操作以减少与CU相关联的像素块的块效应。
在一些实施例中，环路滤波单元350包括去块滤波单元、样点自适应补偿SAO单元、自适应环路滤波ALF单元。
视频解码器300可将CU的重建图像存储于解码图像缓存360中。视频解码器300可将解码图像缓存360中的重建图像作为参考图像用于后续预测，或者，将重建图像传输给显示装置呈现。
本申请涉及的视频解码的基本流程如下：熵解码单元310可解析码流得到当前块的预测信息、量化系数矩阵等，预测单元320基于预测信息对当前块使用帧内预测或帧间预测产生当前块的预测块。反量化/变换单元330使用从码流得到的量化系数矩阵，对量化系数矩阵进行反量化、反变换得到残差块。重建单元340将预测块和残差块相加得到重建块。重建块组成重建图像，环路滤波单元350基于图像或基于块对重建图像进行环路滤波，得到解码图像。该解码图像也可以称为重建图像，该重建图像一方面可以被显示设备进行显示，另一方面可以存放在解码图像缓存360中，为后续的帧作为帧间预测 的参考帧。
上述是基于块的混合编码框架下的视频编解码器的基本流程，随着技术的发展，该框架或流程的一些模块或步骤可能会被优化，本申请适用于该基于块的混合编码框架下的视频编解码器的基本流程，但不限于该框架及流程。
下面对本申请涉及的对偶量化技术进行介绍。
在视频编码中，变换后的系数和非变换的系数可以统称为系数(coefficient)。量化通常被用于降低系数的动态范围，从而达到用更少的码字表达视频的目的。量化后的数值通常称为级别，重建级别或者重建电平(level)。量化的操作通常是用系数除以量化步长，量化步长由在码流传递的量化因子决定。反量化则是通过重建级别乘以量化步长来完成。对于一个NxM的块，所有系数的量化可以独立的完成，这一技术也被广泛地应用在很多国际视频压缩标准，例如H.264,HEVC中。
与此同时，特定的扫描顺序可以把一个二维的系数块变换成一维系数流。扫描顺序可以是Z型，水平，垂直或者其它任何一种顺序的扫描。量化操作可以利用系数间的相关性，利用已量化系数的特性来选择更优的量化方式，从而达到优化量化的目的。
依赖性量化(Dependent Quantization，DQ)，也可以称为对偶量化，是一种量化方式。依赖性量化作用在变换后的块上，与传统的量化不同的是，依赖性量化共包含了两个量化器，这两个量化器虽然有着相同的量化步长(即2*Δ)，但它们各自对应的重建变换系数却是交错的。图4是依赖性量化的量化器Q0和量化器Q1与它们各自对应的重建变换系数的示意图。
其中，量化器Q0对应了重建变换系数级别是偶数倍的Δ(注：两个量化器的量化步长均为2*Δ，依赖性量化器中Q0与Q1合并起来相当于量化步长为Δ)(即A,B点对应的数字)，量化器Q1对应了重建变换系数级别是奇数倍的Δ(即C,D点对应的数字)。
依赖性量化通过引入两个交错的量化器，以及量化器之间跳转的原则，使得大步长的量化器组合起来能够完成更精细的量化，达到减小了重建的变换系数与原始变换系数之间的损失，从而提高编码效率。
对于每个变换系数，我们都可以选择使用图4中描述的两种量化器Q0,Q1中的一种进行量化，这两个量化器各自的量化的方式与传统的量化器(HEVC中的量化)相似。两个量化器的重建变换系数都可以用量化步长Δ的倍数表示，两个量化器的重建变换系数定义如下：
Q0:该量化器的重建变换系数级别为偶数倍(包括零倍)的量化步长Δ，当使用这个量化器时，重建的变换系数t′可根据如下公式计算，
t′＝2·k·Δ      (1)
其中，k表示图4中所述相关的变换系数级别。
Q1:该量化器的重建级别为奇数或零倍的量化步长Δ，当使用这个量化器时，重建的变换系数t′可根据如下公式(2)计算，
t′＝(2·k-sgn(k))·Δ      (2)
其中，sgn(·)代表符号函数，
Figure PCTCN2021087042-appb-000001
其中，x是被量化的变换系数。
选择使用Q0或Q1进行量化并不会通过编码标志位来进行控制。取而代之的是，使用在系数扫描顺序上的上一个系数的变换系数级别(图4中所述的变换系数级别)的奇偶性来决定当前变换系数使用Q0或Q1。
图5为决定变换系数所使用量化器的状态转移示意图，(a)使用状态机决策量化器的使用，(b)状态转移表。在系数扫描顺序上，当前系数的重建值可以通过图5中所示的转移方法决定下一个系数的状态，状态共有四种，分别由0,1,2,3这四个值来表示。例如当前系数的状态为2且当前变换系数级别为5时，由于5是奇数，所以决定下一个系数的状态跳转为状态3。每一个变换块在扫描顺序上的第一个系数的状态被设定为初始状态0。状态的0,1,2,3也决定这当前的系数使用哪一个量化器，状态0，1对应着使用量化器Q0,状态2,3对应着使用量化器Q1。
编码器对对偶量化的决策
与rate-distortion optimized quantization(RDOQ)的实现方式相似，变换系数级别{q k}的取值为最小化如下公式(3)拉格朗日率失真代价的一个过程，
J＝D+λ·R＝∑ k(t k-t' k(q k|q k-1,q k-2,...)) 2+λ·R k(q k|q k-1,q k-2,...)    (3)
其中，t k和q k分别代表原始的表换系数和变换系数级别，t′ k(q k|…)代表在当前变换系数级别q k下重建出的变换系数值，R k(q k|…)代表估计出的编码q k需要消耗的比特数。
图6为网格结构表示状态与变换系数级别的依赖性示意图，其编码顺序从左到右。如之前所介绍的状态机的转移，可以将量化器与变换系数级别之间的依赖性表示成如图6所示的网格图，每一列的四个状态表示当前量化系数的可能的四种状态，每个节点与编 码顺序上下一个系数的可能的两个状态节点相连。对于一个给定的当前状态和当前变换系数t k，可以使用当前量化器量化出对应的变换系数级别，编码器可以选择使用奇数的变换系数级别也可以选择使用偶数的变换系数级别，奇数变换系数级别对应图6中B(Q0 with parity 1)和D(Q1 with parity 1),偶数变换系数级别对应A(Q0 with parity 0)和C(Q1 with parity 0)。当算出所有节点的代价J k(q k)＝(t k-t′ k(q k|…)) 2+λ·R k(q k|…)后，变换系数级别q k就可以通过找到一条代价总和最小的路线来决定，而确定最小代价和可以通过维特比算法(Viterbi algorithm)来实现。
具体的实现由两步组成：
步骤1，找到4个与原始变换系数对应的4个分别来自Q0和Q1的候选变换系数级别如图7所示；
步骤2，使用维特比算法以估计出的rate-distortion总和(之前节点已确定的变换系数级别对应的代价综合)来确定一系列当前节点的变换系数级别q k。
具体的实现由两步组成：
步骤1，找到4个与原始变换系数对应的4个分别来自Q0和Q1的候选变换系数级别如图7所示；
步骤2，使用维特比算法以估计出的rate-distortion总和(之前节点已确定的变换系数级别对应的代价综合)来确定一系列当前节点的变换系数级别q k。
上文对DQ技术以及变换系数的变化系数级别的确定过程进行介绍，在此基础上，下面结合具体的实施例对本申请实施例提供的技术方案进行详细描述。
下面结合图8对编码端进行介绍。
图8为本申请实施例提供的一种视频编码方法的流程示意图，本申请实施例应用于图1和图2所示视频编码器。如图8所示，本申请实施例的方法包括：
S801、获取待编码块；
S802、对待编码块进行预测，得到待编码块的预测块；
S803、根据待编码块和预测块，得到待编码块的残差块；
S804、对残差块进行变换，得到变换块；
S805、针对变换块中一待编码系数，从N个量化器中确定一个目标量化器对待编码系数进行量化，得到当前量化系数，N个量化器为依赖性量化DQ方式对应的量化器，N为大于或等于2的正整数；
S806、对当前量化系数的语法元素进行编码，形成码流。
其中，语法元素包括：系数非零标志、系数绝对值大于1标志、系数绝对值大于2标志、至少一个系数绝对值大于i标志、系数绝对值剩余值标志和符号标志，i为从3取到M的正整数，M为大于或等于3的正整数。
在一些实施例中，本申请的当前量化系数也可以称为量化系数，或量化后的系数，或者当前系数，或者待编码的系数，或者变化系数级别、重建级别或重建电平等。
在视频编码过程中，视频编码器接收视频流，该视频流由一系列图像帧组成，针对视频流中的每一帧图像进行视频编码，为了便于描述，本申请将当前待编码的一帧图像记为当前图像。
具体的，参照图2所示，视频编码器将当前图像划分成一个或多个待编码块，针对每个待编码块，视频编码器中的预测单元210经由帧间预测、帧内预测产生待编码块的预测块之后，将预测块发送给残差单元220，该残差单元220可以理解为求和器，包括执行减法运算的一个或多个组件。残差单元220从待编码块中减去预测块形成残差块，并将残差块发送给变换量化单元230。变换量化单元230使用例如离散余弦变换(DCT)或者类似的变换将残差块进行变换处理，得到变换系数。变换量化单元230进一步对变换系数进行量化，得到量化后的变换系数，即量化系数。
由图2可知，一方面，变换量化单元230将量化后的变换系数转发给熵编码单元280。熵编码单元280对量化后的变换系数进行熵编码。举例来说，熵编码单元280可执行上下文自适应可变长度编码(CAVLC)、上下文自适应二进制算术编码(CABAC)、基于语法的上下文自适应二进制算术编码(SBAC)、概率区间分割熵(PIPE)编码等编码方法，对量化后的变换系数进行熵编码，得到码流。
本申请主要针对的是上述量化过程。
目前DQ的设计主要包含三个部分
1)两个交错的量化器Q0,Q1；
2)使用状态机控制状态转移；
3)变换系数级别的编码；
在一些实施例中，本申请提出量化器可以量化变换后的系数，即变换系数。
在一些实施例中，本申请还可以量化非变换的系数(transform skip coefficients)。
本申请涉及的N个量化器为DQ量化方式对应的量化器。
在一些实施例中，本申请可以采用已有的DO量化方式对应的量化器(即图4所示 的量化器)对系数进行量化。
在一些实施例中，上述N个量化器中至少有一个量化器为可以将变换系数均量化为非零量化系数的非零量化器，其中N为大于等于2的正整数。其中非零量化器也可以称为非零点量化器。
在一些实施例中，N个量化器中至少有一个量化器为可以将变换系数量化为零的零点量化器。
在一些实施例中，N个量化器包括一个零点量化器和一个非零量化器。
在一些实施例中，本申请提出量化器可以量化变换后的系数，即变换系数。
在一些实施例中，本申请可以量化非变换的系数(transform skip coefficients)。
本申请涉及的N个量化器为DQ量化方式对应的量化器。
在一些实施例中上述N个量化器中至少有一个量化器为可以将变换系数均量化为非零量化系数的非零量化器，其中N为大于等于2的正整数。其中非零量化器也可以称为非零点量化器
在一些实施例中，N个量化器中至少有一个量化器为可以将变换系数量化为零的零点量化器。
在一些实施例中，N个量化器包括一个零点量化器和一个非零量化器。
图9为原有DQ技术的Q0,Q1的量化器示意图，相对于图9，在一些实施例中，上述N＝2，即本申请提出在两个量化器中，只有一个量化器有零点，即一个量化器可以把系数量化为零，这样的量化器称为零点量化器；另一个量化器不可以把系数量化为零，这样的量化器称为非零量化器。
在一些实施例中，如图10所示，N个量化器包括Q0量化器和Q1量化器。其中Q0量化器并未作出改变，Q1量化器则是去掉了量化为0的点，即Q1量化器只能将系数量化成非零系数，这里Q0是零点量化器，Q1是非零量化器。
在一些实施例中，非零量化器也可以是Q0，也就是说Q0量化器没有零点，但Q1量化器有零点。
在一些实施例中，两个量化器都没有零点，即Q0和Q1都是非零量化器。
可选的，量化器的个数也可以进一步扩展，可以是两个也可以是两个以上的量化器。对于两个以上量化器的情况，即N大于2时，N个量化器中零点量化器可以是其中任意一个，也可以是其中任意多个。
在一些实施例中，码流中还可以包括非零量化器标识，所述非零量化器标识用于标 识所述目标量化器是否为非零量化器。
本申请中，前一个量化系数可以理解为在量化顺序(或扫描顺序)中，位于待编码系数的前一个相邻的已量化的变换系数。
在一些实施例中，可以参照上述图5所示的已有技术，根据状态机的状态和待编码系数的系数级别，确定量化待编码系数的目标量化器，并使用该目标量化器对该待编码系数进行量化。
在一些实施例中，上述S805包括如下步骤S805-A至S805-C：
S805-A、获取所述当前量化系数的前一个量化系数的标志位信息；
S805-B、根据所述前一个量化系数的标志位信息，从所述N个量化器中确定一个目标量化器；
S805-C、使用所述目标量化器对所述待编码系数进行量化。
在一种示例中，前一个量化系数的标志位信息包括该前一个量化系数的Sig flag、gt1 flag、gt2 flag、gt3 flag、……、gtM flag,其中M大于或等于3。
在一些实施例中，上述S805-B包括：
S805-B1，获取前一个量化系数的状态；
S805-B2，根据前一个量化系数的标志位信息，以及前一个量化系数的状态，确定当前量化系数的状态；
S805-B3，根据当前量化系数的状态，从N个量化器中确定目标量化器。
在实际编码过程中，编码设备会根据状态机的当前状态判断当前量化过程中所使用的目标量化器，对非零量化器，在尝试量化的时候将不再能够把系数量化成零。
其中量化系数的状态可以理解为状态机的状态。
可选的，状态机的初始状态为0。
在一些实施例中，码流中包括状态机的初始状态。例如，状态机的初始状态为0，使得解码端的状态机的初始状态与编码端的一致，进而保证了解码端对系数的准确解码。
本申请中由于当前量化系数的前一个量化系数已编码，其状态已知，因此，编码设备可以获得该前一个量化系数的状态。
在一些实施例中，上述S805-B2中根据所述前一个量化系数的标志位信息，以及所述前一个量化系数的状态，确定所述当前量化系数的状态的方式包括但不限于如下方式：
方式一，若前一个量化系数的标志位信息中的Sig flag的值为0时，则根据前一个量化系数的状态，确定所述当前量化系数的状态，例如，前一个量化系数的状态为0时， 则确定当前量化系数的状态为0，若前一个量化系数的状态为1时，则确定当前量化系数的状态为2，若前一个量化系数的状态为2时，则确定当前量化系数的状态为1，若前一个量化系数的状态为3时，则确定当前量化系数的状态为3。
方式二，上述S805-B2包括如下步骤S805-B21和S805-B22：
S805-B21、根据前一个量化系数的标志位信息，确定状态跳转值；
S805-B22、根据前一个量化系数的状态和状态跳转值，确定当前量化系数的状态。
在一种示例中，前一个量化系数的标志位信息包括系数非零标志，若系数非零标志的值为0时，则确定状态跳转值为0。
在另一种示例中，前一个量化系数的标志位信息包括系数非零标志和系数绝对值大于1标志，此时，若系数非零标志的值和系数绝对值大于1标志的值满足如下公式(4)，则确定状态跳转值为1；若系数非零标志的值和系数绝对值大于1标志的值不满足如下公式(4)，则确定状态跳转值为0；
t＝sigflag＝＝1&&gt1＝＝0      (4)
其中，t为状态跳转值，sigflag为系数非零标志的值，gt1为系数绝对值大于1标志(即gt1 flag)的值。
在另一种示例中，前一个量化系数的标志位信息包括系数非零标志、前M个系数绝对值大于x标志，x＝1,2,3,…,M，M为大于或等于3的正整数，若系数非零标志的值为1，以及前M-1个系数绝对值大于x标志的值为1，且第M个系数绝对值大于x标志的值为0,则确定状态跳转值为1。假设M为4，则前一个量化系数的标志位信息包括：sigflag、gt1 flag、gt2 flag、gt3 flag和gt4 flag，若前一个量化系数的标志位信息满足如下公式(5)，则确定状态跳转值t＝1；若前一个量化系数的标志位信息不满足如下公式(5)，则确定状态跳转值t＝0：
t＝sigflag＝＝1&&gt1＝＝1&&gt2＝＝1&&gt3＝＝1&&gt4＝＝0    (5)
其中，gt2为系数绝对值大于2标志(即gt2 flag)的值，gt3为系数绝对值大于3标志(即gt3 flag)的值。
根据上述方式，确定出t后，根据t和前一个量化系数的状态，确定出当前量化系数的状态。
本申请可由如图11所示的状态机完成状态的转移，即如下表2中的stateTrans(状态转移表)。例如，如图11所示，当t＝1，表示t为真，当t＝0时，表示t为假。这样可以根据如上公式(4)或(5)确定出t的真假，并根据t的真假和前一个量化系数的状态， 确定出当前量化系数的状态，例如，当t为真，前一个量化系数的状态为2，则当前量化系数的状态为3。
在一些实施例中，根据当前量化系数的状态，更新状态机的状态。
本申请根据上述S805所述的量化方式对待编码系数进行量化，得到当前量化系数，接着执行S806，对当前量化系数的语法元素进行编码。
下面对上述S806中对当前量化系数的语法元素的编码过程进行介绍。
目前系数的语法元素包括如下标志位：系数非零标志sig_flag,sig_flag，系数非零标志位用于指示所述量化系数是否为零，在一些实施例中，若系数非零标志位的值为‘0’表示当前量化系数是‘0’；值为‘1’表示当前量化系数是非零系数。系数绝对值大于1标志coeff_abs_level_greater1_flag,coeff_abs_level_greater1_flag的值为‘0’表示当前量化系数的绝对值是‘1’；值为‘1’表示当前量化系数的绝对值大于1。系数绝对值大于2标志coeff_abs_level_greater2_flag,coeff_abs_level_greater2_flag的值为‘0’表示当前量化系数的绝对值是‘2’；值为‘1’表示当前量化系数的绝对值大于2。系数绝对值剩余值coeff_abs_level_remaining，如果当前量化系数有系数绝对值剩余值，当前量化系数的绝对值为3+coeff_abs_level_remaining。系数正负号标志(即符号标志)sign date，sign date的值为‘0’表示当前量化系数为负数；值为‘1’表示当前量化系数为正数。
在一些实施例中，系数非零标志也称为significant flag，表示当前位置上的系数是否存在，或意味当前位置上系数的绝对值是否大于0。
在一些实施例中，系数绝对值大于1标志也称为greater than 1 flag，表示当前位置上的系数的绝对值在已经大于0的基础上是否进一步大于1。
在一些实施例中，系数绝对值大于2标志也称为greater than 2 flag，表示当前位置上的系数的绝对值在已经大于1的基础上是否进一步大于2。
在一些实施例中，系数绝对值剩余值标志也称为remaining_abs_level，表示当前系数的绝对值在大于2时剩余的部分，例如若当前系数绝对值为4，则该flag等于1，若当前系数绝对值等于3，则该flag等于0。
在一些实施例中，significant flag有60个上下文模型(亮度51个，色度9个)，例如greater than 1 flag和greater than 2 flag共同享有22个上下文模型，remaining_abs_level和sign date为旁路编码。
本申请对系数的语法元素进行了扩展，例如对语法元素中的系数绝对值大于x标志 (gt x flag)进行了扩展。
本申请的系数的语法元素包括：系数非零标志(sig flag)、系数绝对值大于1标志(gt1 flag)、系数绝对值大于2标志(gt2 flag)、至少一个系数绝对值大于i标志(gti flag)、系数绝对值剩余值标志(remaining)和符号标志(sign data)，其中i为从3取到M的正整数，即i＝3,4,…,M，M为大于或等于3的正整数。
例如，当i＝3时，至少一个系数绝对值大于i标志包括：系数绝对值大于3标志；
例如，当i＝3,4时，至少一个系数绝对值大于i标志包括：系数绝对值大于3标志和系数绝对值大于4标志；
例如，当i＝3,4,5时，至少一个系数绝对值大于i标志包括：系数绝对值大于3标志、系数绝对值大于4标志和系数绝对值大于5标志；
例如，当i＝3,4,5,…,M时，至少一个系数绝对值大于i标志包括：系数绝对值大于3标志、系数绝对值大于4标志、系数绝对值大于5标志、……、系数绝对值大于M标志。
由于gtx flag编解码基于上下文模型，remaining_abs_level以及sign data基于旁路编码，由于编码方式的差异，编码时将同类编码方式的标志放在一起编码对于硬件更加友好。另外，对于本申请的上述实施例涉及的DQ技术，在系数编码的过程中，无需逐个编出所有flag，仅需编至gtx flag即可得到量化器跳转时的条件。故可将gtx flag与remaining_abs_level与sign data分开。
在一些实施例中，上述S806中对所述当前量化系数的语法元素进行编码包括3轮编码，包括：
第一轮编码,对所述当前量化系数的系数非零标志、系数绝对值大于1标志、系数绝对值大于2标志和至少一个系数绝对值大于i标志进行编码；
第二轮编码，对所述当前量化系数的系数绝对值剩余值标志进行编码；
第三轮编码，对所述当前量化系数的符号标志进行编码。
在一些实施例中，还可以将基于上下文编码的flag进一步分解成多轮，即第一轮编码包括多伦编码：
在一种示例中，第一轮编码包括第一子轮编码，此时本申请的系数编码方式包括，在第一子轮编码中，对所述系数非零标志和所述系数绝对值大于1标志进行编码。即在该示例中，将系数非零标志(sig flag)和系数绝对值大于1标志(gt1 flag)放在一起编码。
在另一种示例中，在第一子轮编码中，还对所述系数绝对值大于2标志和/或所述至少一个系数绝对值大于i标志进行编码。例如，将sig flag、gt1 flag和gt2 flag放在同一 轮进行编码；或者，将sig flag、gt1 flag、gt2 flag，以及至少一个系数绝对值大于i标志中的一个或多个，放在同一轮进行编码；或者，将sig flag、gt1 flag，以及至少一个系数绝对值大于i标志中的一个或多个，放在同一轮进行编码等。
在另一种示例中，第一轮编码还包括第二子轮编码，此时，系数的编码方式为：在第一子轮编码中，对系数非零标志(sig flag)和系数绝对值大于1标志(gt1 flag)进行编码，在第二子轮编码中，对所述系数绝对值大于2标志和所述至少一个系数绝对值大于i标志中的一个或多个进行编码。
在另一种示例中，第一轮编码还包括第二子轮编码，此时，系数的编码方式为：在第一子轮编码中，对系数非零标志(sig flag)、系数绝对值大于1标志(gt1 flag)和系数绝对值大于2标志(gt2 flag)进行编码，在第二子轮编码中，对所述至少一个系数绝对值大于i标志进行编码。
在另一种示例中，第一轮编码包括第一子轮编码、第二子轮编码和第三子轮编码，编码方法还包括：在第一子轮编码中，对所述系数非零标志和所述系数绝对值大于1标志进行编码；在第二子轮编码中，对所述系数绝对值大于2标志进行编码；在第三子轮编码中，对所述至少一个系数绝对值大于i标志进行编码。
可选的，在对所述至少一个系数绝对值大于i标志进行编码时可以进一步分成多伦进行编码，例如对所述至少一个系数绝对值大于i标志中的每个标志分别进行编码。
下面以所述至少一个系数绝对值大于i标志包括系数绝对值大于3标志(gt3 flag)和系数绝对值大于4标志(gt4 flag)为例对本申请涉及的系数编码方法作进一步说明。
在本实施例中，当前量化系数的语法元素包括：sig flag、gt1 flag、gt2 flag、gt3 flag、gt4 flag、remaining和sign data。
在编码过程分为大的三轮编码：
在第一轮编码中，对sig flag、gt1 flag、gt2 flag、gt3 flag、gt4 flag进行编码；
在第二轮编码中，对remaining进行编码；
在第二轮编码中，对sign data进行编码。
上述第一轮编码中，将基于上下文编码的flag进一步分解成多轮。例如本申请的依赖量化基于量化值是否为1，在编解完gt1 flag后即可完成量化器的跳转。因此，第一轮编码过程可以包括如下方式：
a)可以将sig flag与gt1 flag放在一轮编码，剩余的gt2 flag,gt3 flag和gt4 flag放在另 一轮编码；
b)也可以将sig flag与gt1 flag放在一轮编码，gt2 flag放在一轮编码，gt3 flag放在一轮编码，gt4 flag放在一轮编码。
c)也可以将sig flag与gt1 flag放在同一轮，其它的gtx flag与前者是否放在同一轮编码或分开不做限定。
例如，第一轮编码包括第一子轮编码，在第一子轮编码中，对sig flag与gt1 flag进行编码。
在一种示例中，在第一子轮编码中，不仅对sig flag与gt1 flag进行编码，还对系数绝对值大于2标志(gt2 flag)、系数绝对值大于3标志(gt3 flag)、系数绝对值大于4标志(gt4 flag)中的一个或多个进行编码。
在另一种示例中，第一轮编码还包括第二子轮编码，
在第一子轮编码中，对sig flag与gt1 flag进行编码；
在第二子轮编码中，对系数绝对值大于2标志(gt2 flag)，以及系数绝对值大于3标志(gt3 flag)和/或系数绝对值大于3标志(gt3 flag)进行编码。
在另一种示例中，第一轮编码还包括第一子轮编码和第二子轮编码，
在第一子轮编码中对sig flag与gt1 flag和gt2 flag进行编码；
在第二子轮编码中对系数绝对值大于3标志(gt3 flag)和系数绝对值大于3标志(gt3 flag)进行编码。
在另一种示例中，第一轮编码包括第一子轮编码、第二子轮编码和第三子轮编码，
在第一子轮编码中对sig flag与gt1 flag进行编码；
在第二子轮编码中对系数绝对值大于2标志(gt2 flag)进行编码；
在第三子轮编码中对系数绝对值大于3标志(gt3 flag)和系数绝对值大于4标志(gt4 flag)进行编码。
在另一种示例中，第一轮编码包括第一子轮编码、第二子轮编码、第三子轮编码和第四子轮编码，
在第一子轮编码中，对sig flag与gt1 flag进行编码；
在第二子轮编码中对系数绝对值大于2标志(gt2 flag)进行编码；
在第三子轮编码中对系数绝对值大于3标志(gt3 flag)进行编码；
在第三子轮编码中对系数绝对值大于4标志(gt4 flag)进行编码。
需要说明的是，本申请还可以包括上述flag的其他组合的量化方式，本申请对此不 做限制。
在一些实施例中，采用DQ量化方式对系数进行量化时，例如在执行上述S805之前，首先需要判断本申请的量化过程是否可以使用DQ量化方式，具体包括如下步骤：
步骤11，获取变换块所使用的变换工具标识，和/或变换块在亮度分量下的扫描区域的SRx或SRy、以及变换块在色度分量下的扫描区域的SRx或SRy；
步骤12，根据变换块所使用的变换工具标识，和/或变换块在亮度分量下的扫描区域的SRx或SRy、以及变换块在色度分量下的扫描区域的SRx或SRy，判断变换块是否满足预设条件；
步骤13，若变换块满足预设条件，则确定变换块可以采用DQ量化方式进行量化；
步骤14，在确定变换块可以采用DQ量化方式时，根据前一个量化系数的标志位信息，从N个量化器中确定一个目标量化器对待编码系数进行量化。
其中，上述预设条件包括如下任意一个条件：
条件1，在色度分量下；或者，变换块为非变换跳过块，且该变换块所使用的变换工具不是IST工具和/或SBT工具；
条件2，变换块在亮度分量下的扫描区域的SRx或SRy大于Q且在色度分量下的扫描区域的SRx或SRy大于P，且变换块为非变换跳过块，Q和P均为整数。
本申请对上述Q和P的取值不作限制.
例如，Q为6，P为0。
在一些实施例中，Q的值、P的值和DQ的使能标志位中的至少一个保存在序列头或图像头中，其中，DQ的使能标志位用于指示当前序列是否可以打开DQ量化方式。
例如，DQ的使能标志位编于序列头，指示当前序列可以打开DQ。如果基于扫描区域大小判断是否在当前变换块使用DQ时，扫描区域的大小限制Q(size_luma_dep_quant)和P(size_chroma_dep_quant)也可以编在序列头，例如下表1所示：
表1序列头定义
Figure PCTCN2021087042-appb-000002
Figure PCTCN2021087042-appb-000003
此时，上述步骤12包括：获取序列头中的DQ的使能标志位，根据DQ的使能标志位，在确定当前序列可以打开DQ量化方式时，根据变换块所使用的变换工具标识，或变换块在亮度分量下的扫描区域的SRx或SRy、以及变换块在色度分量下的扫描区域的SRx或SRy，判断变换块是否满足预设条件。在确定本申请可以采用DQ量化方式进行量化时，根据上述步骤，对待编码系数进行量化，得到当前量化系数。
接着，对当前量化系数的语法元素进行编码。具体参照上述S806的描述。
采用本申请实施例的编码方式对系数的语法元素进行编码，使得解码端在对系数解码时，首先解码出sig flag和gt1 flag，并基于sig flag和gt1 flag快速确定待解码的当前量化系数的状态，进而提高解码速度。
在一些实施例中，使用第一上下文模型，对系数非零标志sig flag进行编码。
示例性的，第一上下文模型与RDOQ量化方式编码系数非零标志时所使用的上下文模型相同。或者，第一上下文模型与RDOQ量化方式编码系数非零标志时所使用的上下文模型不同。
例如，参考AVS的高性能测试模型(High-Performance Model，HPM)因为仅有RDOQ量化方式，故仅有一套上下文模型。引入DQ后，可以使RDOQ和DQ的sig flag共用一套上下文模型，也可重新引入一套，各用各的。
在一些实施例中，使用第二上下文模型，对系数绝对值大于1标志、系数绝对值大于2标志、至少一个系数绝对值大于i标志，例如使用第二上下文模型对gt1 flag、gt2 flag、gt3 flag和gt4 flag进行编码。
示例性的，第二上下文模型与RDOQ量化方式编码系数绝对值大于i标志时所使用的上下文模型相同；或者，第二上下文模型与RDOQ量化方式编码系数绝对值大于i标志时所使用的上下文模型不同；或者，第二上下文模型包括非零量化器对应的上下文模型和零点量化器对应的上下文模型，非零量化器对应的上下文模型与RDOQ量化方式编码系数绝对值大于i标志时所使用的上下文模型不同，且零点量化器对应的上下文模型与RDOQ量化方式编码系数绝对值大于i标志时所使用的上下文模型相同；或者，非零量化器对应的上下文模型、零点量化器对应的上下文模型和RDOQ量化方式编码系数绝对值大于i标志时所使用的上下文模型均不同。
例如，参考HPM仅有RDOQ量化方式，并且gt1 flag、gt2 flag、gt3 flag和gt4 flag共用一套上下文模型。引入DQ后，1)可以使RDOQ和DQ的gt1 flag、gt2 flag、gt3 flag和 gt4 flag共用一套上下文模型，2)可以使RDOQ和DQ的零点量化器的gt1 flag、gt2 flag、gt3 flag和gt4 flag共用一套上下文模型，DQ的非零量化器的gt1 flag、gt2 flag、gt3 flag和gt4 flag公用另一套上下文模型，3)也可以是RDOQ、DQ的零点量化器和非零量化器的gt1 flag、gt2 flag、gt3 flag和gt4 flag各共通一套上下文模型。
本申请在DQ量化方式基础上，对系数的语法元素中的系数绝对值大于i标志的数量进行拓展，以提高编解码性能。另外，本申请还提出了对拓展后的系数的语法元素的编解码方式，实现对拓展后的系数的语法元素进行准确编解码，进一步提高了编解码性能。
另外，本申请将系数非零标志和系数绝对值大于1标志、系数绝对值大于2标志、至少一个系数绝对值大于i标志作为一个编码部分进行编码，相比于现有的4部编码，可以降低编码复杂度，进而提高编解码效率。
进一步，本申请将系数非零标志和系数绝对值大于1标志在同一轮编码，使得解码端在一次解码过程中得到系数非零标志和系数绝对值大于1标志，并根据系数非零标志和系数绝对值大于1标志快速确定出系数状态，进一步提高了编码效率。
在一些实施例中，在编码sig_flag时，有以下两种情况可跳过对其编码：
情况1，根据扫描顺序上的上一个量化系数的状态来获取当前量化系数的状态，进而确定目标量化器是否为非零量化器(例如状态为0或1时，确定目标量化器为零点量化器，例如当前量化系数的状态为2或3时，确定目标量化器为非零量化器)，在确定目标量化器为非零量化器时，跳过对sig_flag的编码并默认其值为1。
情况2，当前扫描区域的最右一列仅右上角系数为非零或最下一行仅左下角系数为非零时，也可跳过对sig_flag的编码并默认其值为1。
即本申请对使用零点量化器量化后的系数编码时，因为编码器已知非零量化器量化的数据最小值的绝对值为1，也就是说所有非零量化器量化后的系数都是非零值，因此非零量化器量化后的系数不需要编码系数非零标志sig_flag，从而节省码字。
在一些实施例中，本方案对变换块语法结构的改变如表2所示。
表2变换块定义
Figure PCTCN2021087042-appb-000004
Figure PCTCN2021087042-appb-000005
Figure PCTCN2021087042-appb-000006
Figure PCTCN2021087042-appb-000007
在表2中，DqEnableFlag为打开序列中打开DQ的条件，其值等于序列头中编入的dep_quant_flag。
表2中是本申请在AVS3 spec中对于变换系数级别解码部分的改动，主要将基于上下文模型编解码的sigflag,gt1 flag和gt2 flag放在了一个部分，基于指数哥伦布编解码的remaining放在了另一部分。
本申请不限定每一个state的具体含义，state仅为状态的序号，在跳转原则不变的基础上更换state的序号。本申请中的一种状态转移表如图11所示，其中变量t的真假取决于在解码的过程中，上一个系数值是否为1。而是否为1可由sig_flag与coeff_abs_level_greater1_flag两个标志位的取值得到，无需全部重建出当前系数即可得到，t值的获取参照上述公式(4)。
本申请的技术方案，在对待编码系数进行量化时，获得待编码系数的前一个量化系数的标志位信息，并根据前一个量化系数的标志位信息，从N个量化器中确定待编码系数在量化时所使用的目标量化器。即本申请只需获得前一个量化系数的标志位信息，即可确定出目标量化器，而无需等待该当前量化系数的标志位信息完成解码，进而降低了编解码复杂度，提高编解码效率。另外，本申请在依赖性量化的基础上进一步拓展了gtx flag的数量从而提升了编码性能。
上文对本申请实施例涉及的视频编码方法进行了描述，在此基础上，下面针对解码端，对本申请涉及的视频解码方法进行描述。
图12为本申请实施例提供的视频解码方法的一种流程示意图，如图12所示，本申请实施例的方法包括：
S901、解码码流，得到待解码块；
S902、对待解码块中一待解码系数的语法元素进行解码，待解码系数经过N个量化器中的一个量化器量化得到，N个量化器为DQ量化方式对应的量化器，N为大于或等于2的正整数，语法元素包括：系数非零标志、系数绝对值大于1标志、系数绝对值大于2标志、至少一个系数绝对值大于i标志、系数绝对值剩余值标志和符号标志，i为从3取到M的正整数，M为大于或等于3的正整数；
S903、根据解码得到的语法元素，得到待解码系数的值；
S904、根据待解码系数的值，得到待解码块的重建块。
具体的，参照图3所示，解码器中的熵解码单元310可解析码流得到当前图像中待解码块的预测信息、量化系数矩阵等，预测单元320基于预测信息对待解码块使用帧内预测或帧间预测产生待解码块的预测块。反量化/变换单元330使用从码流得到的量化系数矩阵，对量化系数矩阵进行反量化、反变换得到残差块。重建单元340将预测块和残差块相加得到重建块。依次类推，可以得到当前图像中其他待解码块的重建块，各重建块组成重建图像。
在一些实施例中，上述N个量化器中至少有一个量化器为可以将变换系数均量化为非零量化系数的非零量化器。
在一些实施例中，所述N个量化器中至少有一个量化器为可以将变换系数量化为零的零点量化器。
在一些实施例中，所述N个量化器包括一个零点量化器和一个非零量化器。
在一些实施例中，按照扫描区域中的扫描顺序，前一个量化系数为扫描顺序中待解码系数的相邻的前一个已解码的量化系数。
在一些实施例中，上述S902中对待解码块中一待解码系数的语法元素进行解码包括如下3轮解码，包括：
第一轮解码，对待解码系数的系数非零标志、系数绝对值大于1标志、系数绝对值大于2标志和至少一个系数绝对值大于i标志进行解码；
第二轮解码，对待解码系数的系数绝对值剩余值标志进行解码；
第三轮解码，对待解码系数的符号标志进行解码。
在一些实施例中，上述第一轮解码包括多伦解码过程。
在一种示例中，第一轮解码包括第一子轮解码，此时上述S902包括：
在第一子轮解码中，对系数非零标志和系数绝对值大于1标志进行解码。
在另一种示例中，在第一子轮解码中，除了对系数非零标志和系数绝对值大于1标志进行解码外，还对系数绝对值大于2标志和/或至少一个系数绝对值大于i标志进行解码。
在另一种示例中，第一轮解码还包括第二子轮解码，此时，上述S902包括：在第一子轮解码中对系数非零标志和系数绝对值大于1标志进行解码，在第二子轮解码中对系数绝对值大于2标志和至少一个系数绝对值大于i标志中的一个或多个进行解码；或者，在第一子轮解码中除了对系数非零标志和系数绝对值大于1标志解码外，还对系数绝对值大于2标志进行解码，而在第二子轮解码中对至少一个系数绝对值大于i标志进行解码。
在另一种示例中，第一轮解码还包括第二子轮解码和第三子轮解码，此时，上述S902包括：在第一子轮解码中对系数非零标志和系数绝对值大于1标志进行解码，在第二子轮解码中对系数绝对值大于2标志进行解码；在第三子轮解码中对至少一个系数绝对值大于i标志进行解码。
在另一种示例中，对至少一个系数绝对值大于i标志中的每个标志分别进行解码。
下面以所述至少一个系数绝对值大于i标志包括系数绝对值大于3标志(gt3 flag)和系数绝对值大于4标志(gt4 flag)为例对本申请涉及的系数解码方法作进一步说明。
在本实施例中，待解码系数的语法元素包括：sig flag、gt1 flag、gt2 flag、gt3 flag、gt4 flag、remaining和sign data。
在解码过程分为大的三轮解码：
在第一轮解码中，对sig flag、gt1 flag、gt2 flag、gt3 flag、gt4 flag进行解码；
在第二轮解码中，对remaining进行解码；
在第二轮解码中，对sign data进行解码。
上述第一轮解码中，将基于上下文解码的flag进一步分解成多轮。例如本申请的依赖量化基于量化值是否为1，在编解完gt1 flag后即可完成量化器的跳转。因此，第一轮解码过程可以包括如下方式：
a)可以将sig flag与gt1 flag放在一轮解码，剩余的gt2 flag,gt3 flag和gt4 flag放在另一轮解码；
b)也可以将sig flag与gt1 flag放在一轮解码，gt2 flag放在一轮解码，gt3 flag放在一轮解码，gt4 flag放在一轮解码。
c)也可以将sig flag与gt1 flag放在同一轮，其它的gtx flag与前者是否放在同一轮解码或分开不做限定。
例如，第一轮解码包括第一子轮解码，在第一子轮解码中，对sig flag与gt1 flag进行解码。
在一种示例中，在第一子轮解码中，不仅对sig flag与gt1 flag进行解码，还对系数绝对值大于2标志(gt2 flag)、系数绝对值大于3标志(gt3 flag)、系数绝对值大于4标志(gt4 flag)中的一个或多个进行解码。
在另一种示例中，第一轮解码还包括第一子轮解码和第二子轮解码，
在第一子轮解码中，对sig flag与gt1 flag进行解码；
在第二子轮解码中，对系数绝对值大于2标志(gt2 flag)，以及系数绝对值大于3标志(gt3 flag)和/或系数绝对值大于3标志(gt3 flag)进行解码。
在另一种示例中，第一轮解码还包括第一子轮解码和第二子轮解码，
在第一子轮解码中对sig flag与gt1 flag和gt2 flag进行解码；
在第二子轮解码中对系数绝对值大于3标志(gt3 flag)和系数绝对值大于3标志(gt3 flag)进行解码。
在另一种示例中，第一轮解码包括第一子轮解码、第二子轮解码和第三子轮解码，
在第一子轮解码中对sig flag与gt1 flag进行解码；
在第二子轮解码中对系数绝对值大于2标志(gt2 flag)进行解码；
在第三子轮解码中对系数绝对值大于3标志(gt3 flag)和系数绝对值大于4标志(gt4  flag)进行解码。
在另一种示例中，第一轮解码包括第一子轮解码、第二子轮解码、第三子轮解码和第四子轮解码：
在第一子轮解码中，对sig flag与gt1 flag进行解码；
在第二子轮解码中对系数绝对值大于2标志(gt2 flag)进行解码；
在第三子轮解码中对系数绝对值大于3标志(gt3 flag)进行解码；
在第三子轮解码中对系数绝对值大于4标志(gt4 flag)进行解码。
需要说明的是，本申请还可以包括上述flag的其他组合的量化方式，本申请对此不做限制。
在一种实施例中，上述S902中对待解码块中一待解码系数的语法元素进行解码，包括：
1、解码系数非零标志，当系数非零标志解码为0时，跳过系数绝对值大于1标志、系数绝对值大于2标志、系数绝对值大于3标志、系数绝对值大于4标志、系数绝对值剩余值标志和符号标志的解码；
2、当系数非零标志解码为1时，解码系数绝对值大于1标志，当系数绝对值大于1标志解码为0时，解码符号标志，且跳过系数绝对值大于2标志、系数绝对值大于3标志、系数绝对值大于4标志、系数绝对值剩余值标志的解码；
3、当系数绝对值大于1标志解码为1时，解码系数绝对值大于2标志，当系数绝对值大于2标志解码为0时，解码符号标志，且跳过系数绝对值大于3标志、系数绝对值大于4标志、系数绝对值剩余值标志的解码；
4、当系数绝对值大于2标志解码为1时，解码系数绝对值大于3标志，当系数绝对值大于3标志解码为0时，解码符号标志，且跳过系数绝对值大于4标志和系数绝对值剩余值标志的解码；
5、当系数绝对值大于3标志解码为1时，解码系数绝对值大于4标志，当系数绝对值大于4标志解码为0时，解码符号标志，且跳过系数绝对值剩余值标志的解码；
6、当系数绝对值大于4标志解码为1时，解码符号标志和系数绝对值剩余值标志。
在一些实施例中，上述S903中根据解码得到的语法元素，得到待解码系数的值，包括S903-A1和S903-A2：
S903-A1、将非零标志的解码值、系数绝对值大于1标志的解码值、系数绝对值大于2标志的解码值、系数绝对值大于3标志的解码值、系数绝对值大于4标志的解码值、系数绝对值剩余值标志的解码值相加的和值，作为待解码系数的绝对值；
S903-A2、根据待解码系数的绝对值和符号标志的解码值，得到待解码系数的值。
在一种示例中，根据如下公式，确定出待解码系数的绝对值：
|q k|＝sig+gt1+gt2++gt3+gt3+rem    (6)
其中，|q k|为待解码系数的绝对值，sig为sig_flag的解码值，gt1为gt1 flag的解码值，gt2为gt2 flag的解码值，gt3为gt3 flag的解码值，gt4为gt4 flag的解码值，rem为remaining的解码值，即解码出绝对值大于4的部分。
根据上述方法得到待解码系数的值后，执行S904，以根据待解码系数的值，得到重建块。
下面对S904的具体实现过程进行介绍。
在一些实施例中，上述S904包括：
S904-A、获取待解码系数的已解码的前一个量化系数的标志位信息；
S904-B、根据前一个量化系数的标志位信息，从N个量化器中确定量化该待解码系数所使用的目标量化器；
S904-C、根据目标量化器和待解码系数的值，得到当前变换系数；
S904-D、根据当前变换系数，得到重建块。
本申请中待解码系数的前一个量化系数已解码出，因此，解码设备可以获得该前一个量化系数的标志位信息。
在一种示例中，前一个量化系数的标志位信息包括该前一个量化系数的sig flag、gt1 flag、gt2 flag、gt3 flag、……、gtM flag,其中M大于或等于3。
在一些实施例中，上述S904-B包括如下步骤S904-B1至S904-B4：
S904-B1、获取前一个量化系数的状态；
S904-B2、根据前一个量化系数的标志位信息，以及前一个量化系数的状态，确定待解码系数的状态；
S904-B3、根据待解码系数的状态，从N个量化器中确定目标量化器。
其中量化系数的状态可以理解为状态机的状态。
在一些实施例中，可以将状态机的当前状态称为待解码系数的状态，或者称为待解 码系数的当前状态。
可选的，状态机的初始状态为0。
在一些实施例中，码流中包括状态机的初始状态。例如，状态机的初始状态为0。
本申请中由于前一个量化系数已解码，其状态已知，因此，解码设备可以获得该前一个量化系数的状态。
在一些实施例中，上述S904-B2的实现方式包括但不限于如下方式：
方式一，若前一个量化系数的标志位信息中的Sig flag的值为0时，则根据前一个量化系数的状态，确定所述待解码系数的状态，例如，前一个量化系数的状态为0时，则确定待解码系数的状态为0，若前一个量化系数的状态为1时，则确定待解码系数的状态为2，若前一个量化系数的状态为2时，则确定待解码系数的状态为1，若前一个量化系数的状态为3时，则确定待解码系数的状态为3。
方式二，上述S904-B2包括如下步骤S904-B21和S904-B22：
S904-B21、根据前一个量化系数的标志位信息，确定状态跳转值；
S904-B22、根据前一个量化系数的状态和状态跳转值，确定待解码系数的状态。
在一种示例中，若前一个量化系数的标志位信息包括系数非零标志，且系数非零标志的值为0时，则确定状态跳转值为0。
在另一种示例中，前一个量化系数的标志位信息包括系数非零标志和系数绝对值大于1标志，若系数非零标志的值和系数绝对值大于1标志的值满足如下公式(7)，则确定状态跳转值为1；若系数非零标志的值和系数绝对值大于1标志的值不满足如下公式(7)，则确定状态跳转值为0；
t＝sigflag＝＝1&&gt1＝＝0      (7)
其中，t为状态跳转值，sigflag为系数非零标志的值，gt1为系数绝对值大于1标志的值。
该方式中，其中变量t的真假取决于在解码的过程中，上一个系数值是否为1。而是否为1可由sig_flag与coeff_abs_level_greater1_flag(gt1 flag)两个标志位的取值得到，无需全部重建出待解码系数即可得到，进而降低量化复杂性，提供解码效率。
在另一种示例中，前一个量化系数的标志位信息包括系数非零标志、前M个系数绝对值大于x标志，x＝1,2,3,…,M，M为大于或等于3的正整数，若系数非零标志的值为1，以及前M-1个系数绝对值大于x标志的值为1，且第M个系数绝对值大于x标志的值为0,则确定状态跳转值为1。假设M为4，则前一个量化系数的标志位信息包括：sigflag、 gt1 flag、gt2 flag、gt3 flag、gt4 flag，若前一个量化系数的标志位信息满足如下公式(8)，则确定状态跳转值t＝1；若前一个量化系数的标志位信息不满足如下公式(8)，则确定状态跳转值t＝0：
t＝sigflag＝＝1&&gt1＝＝1&&gt2＝＝1&&gt3＝＝1&&gt4＝＝0      (8)
根据上述方式，确定出t后，根据t和前一个量化系数的状态，确定出待解码系数的状态。
本申请可由如图11所示的状态机完成状态的转移，即表1中的stateTrans(状态转移表)。例如，如图11所示，当t＝1，表示t为真，当t＝0时，表示t为假。这样可以根据如上公式(7)或(8)确定出t的真假，并根据t的真假和前一个量化系数的状态，确定出待解码系数的状态，例如，当t为真，前一个量化系数的状态为2，则待解码系数的状态为3。
在一些实施例中，根据待解码系数的状态，更新状态机的状态。
在一些实施例中，需要先判断编码端所使用的量化方式是否为DQ量化方式，即本申请还包括：
步骤21、解码码流，得到变换块所使用的变换工具标识，和/或变换块在亮度分量下的扫描区域的SRx或SRy、以及变换块在色度分量下的扫描区域的SRx或SRy；
步骤22、根据变换块所使用的变换工具标识，和/或变换块在亮度分量下的扫描区域的SRx或SRy、以及变换块在色度分量下的扫描区域的SRx或SRy，判断变换块是否满足预设条件。
在变换块满足所述预设条件，则根据前一个量化系数的标志位信息，从N个量化器中确定量化待解码系数所使用的目标量化器。
在一些实施例中，上述预设条件包括如下任意一个条件：
条件1，在色度分量下；或者，变换块为非变换跳过块，且该变换块所使用的变换工具不是IST工具和/或SBT工具；
条件2，变换块在亮度分量下的扫描区域的SRx或SRy大于Q且在色度分量下的扫描区域的SRx或SRy大于P，且变换块为非变换跳过块，Q和P均为整数。
可选的，M为6，P为0。
在一些实施例中，上述M、P为默认值。
在一些实施例中，M的值、P的值和DQ的使能标志位至少一个保存在序列头或图像头中，其中，DQ的使能标志位用于控制当前序列是否可以打开DQ量化方式。
在一些实施例中，序列头如表1所示，解码设备首先解码表1所示的序列头，得到M的值、P的值和DQ的使能标志位中的至少一个。首先DQ的使能标志位判断当前序列是否可以打开DQ量化方式。若判断当前序列可以打开DQ量化方式，则根据解码出的M和/或P执行上述条件2，判断变换块是否可以使用DQ量化方式。
在一些实施例中，根据DQ的使能标志位，在确定当前序列可以打开DQ量化方式时，根根据变换块所使用的变换工具标识，或变换块在亮度分量下的扫描区域的SRx或SRy、以及待解码块在色度分量下的扫描区域的SRx或SRy，判断变换块是否满足预设条件。
本申请的技术方案，在对待解码系数进行反量化时，获得待解码系数的前一个量化系数的标志位信息，并根据前一个量化系数的标志位信息，从N个量化器中确定当前变换系数在量化时所使用的目标量化器。即本申请只需获得前一个量化系数的标志位信息，即可确定出目标量化器，而无需等待该待解码系数解码完成，进而降低了编解码复杂度，提高编解码效率。另外，本申请在依赖性量化的基础上进一步拓展了gtx flag的数量从而提升了解码性能。
应理解，图8至图12仅为本申请的示例，不应理解为对本申请的限制。
以上结合附图详细描述了本申请的优选实施方式，但是，本申请并不限于上述实施方式中的具体细节，在本申请的技术构思范围内，可以对本申请的技术方案进行多种简单变型，这些简单变型均属于本申请的保护范围。例如，在上述具体实施方式中所描述的各个具体技术特征，在不矛盾的情况下，可以通过任何合适的方式进行组合，为了避免不必要的重复，本申请对各种可能的组合方式不再另行说明。又例如，本申请的各种不同的实施方式之间也可以进行任意组合，只要其不违背本申请的思想，其同样应当视为本申请所公开的内容。
还应理解，在本申请的各种方法实施例中，上述各过程的序号的大小并不意味着执行顺序的先后，各过程的执行顺序应以其功能和内在逻辑确定，而不应对本申请实施例的实施过程构成任何限定。另外，本申请实施例中，术语“和/或”，仅仅是一种描述关联对象的关联关系，表示可以存在三种关系。具体地，A和/或B可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。另外，本文中字符“/”，一般表示前后关联对象是一种“或”的关系。
上文结合图8至图12，详细描述了本申请的方法实施例，下文结合图13至图15， 详细描述本申请的装置实施例。
图13是本申请实施例提供的视频编码器的示意性框图。
如图13所示，视频编码器10包括：
获取单元11，用于获取待编码块；
处理单元12，用于对所述待编码块进行处理，得到所述待编码块的变换块；
量化单元13，用于针对所述变换块中一待编码系数，从N个量化器中确定一个目标量化器对所述待编码系数进行量化，得到当前量化系数，所述N个量化器为依赖性量化DQ方式对应的量化器，所述N为大于或等于2的正整数；
编码单元14，用于对所述当前量化系数的语法元素进行编码，形成码流，其中，所述语法元素包括：系数非零标志、系数绝对值大于1标志、系数绝对值大于2标志、至少一个系数绝对值大于i标志、系数绝对值剩余值标志和符号标志，所述i为从3取到M的正整数，所述M为大于或等于3的正整数。
在一些实施例中，编码单元14，具体用于执行如下3轮编码，包括：
第一轮编码，对所述当前量化系数的系数非零标志、系数绝对值大于1标志、系数绝对值大于2标志和至少一个系数绝对值大于i标志进行编码；
第二轮编码，对所述当前量化系数的系数绝对值剩余值标志进行编码；
第三轮编码，对所述当前量化系数的符号标志进行编码。
在一些实施例中，所述第一轮编码包括第一子轮编码，编码单元14，具体用于在第一子轮编码中，对所述系数非零标志和所述系数绝对值大于1标志进行编码。
在一些实施例中，编码单元14，具体用于在第一子轮编码中，对所述系数绝对值大于2标志和/或所述至少一个系数绝对值大于i标志进行编码。
在一些实施例中，所述第一轮编码还包括第二子轮编码，编码单元14，具体用于在第二子轮编码中，对所述系数绝对值大于2标志和所述至少一个系数绝对值大于i标志中的一个或多个进行编码；或者，在第一子轮编码中，对系数绝对值大于2标志进行编码，在第二子轮编码中对所述至少一个系数绝对值大于i标志进行编码。
在一些实施例中，所述第一轮编码还包括第二子轮编码和第三子轮编码，编码单元14，具体用于在第二子轮编码中，对所述系数绝对值大于2标志进行编码；在第三子轮编码中，对所述至少一个系数绝对值大于i标志进行编码。
在一些实施例中，编码单元14，还具体用于，对所述至少一个系数绝对值大于i标志中的每个标志分别进行编码。
在一些实施例中，所述至少一个系数绝对值大于i标志包括系数绝对值大于3标志和系数绝对值大于4标志。
在一些实施例中，编码单元14，具体用于在第一子轮编码中，对所述系数绝对值大于2标志、所述系数绝对值大于3标志、所述系数绝对值大于4标志中的一个或多个进行编码。
在一些实施例中，所述第一轮编码还包括第二子轮编码，编码单元14，具体用于在第二子轮编码中，对所述系数绝对值大于2标志，以及所述系数绝对值大于3标志和/或所述系数绝对值大于4标志进行编码；或者，在第一子轮编码中，对系数绝对值大于2标志进行编码，在第二子轮编码中对所述系数绝对值大于3标志和所述系数绝对值大于4标志进行编码。
在一些实施例中，所述第一轮编码还包括第二子轮编码和第三子轮编码，编码单元14，具体用于在第二子轮编码中，对所述系数绝对值大于2标志进行编码；在第三子轮编码中，对所述系数绝对值大于3标志和所述系数绝对值大于4标志进行编码。
在一些实施例中，所述第一轮编码还包括第二子轮编码、第三子轮编码和第四子轮编码，编码单元14，具体用于在第二子轮编码中，对所述系数绝对值大于2标志进行编码；在第三子轮编码中，对所述系数绝对值大于3标志进行编码；在第四子轮编码中，对所述系数绝对值大于4标志进行编码。
在一些实施例中，所述N个量化器中至少有一个量化器为可以将变换系数均量化为非零量化系数的非零量化器。
在一些实施例中，所述N个量化器中至少有一个量化器为可以将变换系数量化为零的零点量化器。
在一些实施例中，所述N个量化器包括一个零点量化器和一个非零量化器。
在一些实施例中，量化单元13，具体用于获取所述当前量化系数的前一个量化系数的标志位信息；根据所述前一个量化系数的标志位信息，从所述N个量化器中确定一个目标量化器；使用所述目标量化器对所述待编码系数进行量化。
在一些实施例中，量化单元13，具体用于获取所述前一个量化系数的状态；根据所述前一个量化系数的标志位信息，以及所述前一个量化系数的状态，确定所述当前量化系数的状态；根据所述当前量化系数的状态，从所述N个量化器中确定所述目标量化器。
在一些实施例中，量化单元13，具体用于根据所述前一个量化系数的标志位信息，确定状态跳转值；根据所述前一个量化系数的状态和所述状态跳转值，确定所述当前量 化系数的状态。
在一些实施例中，若所述前一个量化系数的标志位信息包括系数非零标志和系数绝对值大于1标志，量化单元13，具体用于若所述系数非零标志的值和所述系数绝对值大于1标志的值满足如下公式，则确定所述状态跳转值为1；若所述系数非零标志的值和所述系数绝对值大于1标志的值不满足如下公式，则确定所述状态跳转值为0；
所述公式为：
t＝sigflag＝＝1&&gt1＝＝0
其中，所述t为所述状态跳转值，所述sigflag为所述系数非零标志的值，所述gt1为所述系数绝对值大于1标志的值。
应理解，装置实施例与方法实施例可以相互对应，类似的描述可以参照方法实施例。为避免重复，此处不再赘述。具体地，图13所示的视频编码器10可以执行本申请实施例的方法，并且视频编码器10中的各个单元的前述和其它操作和/或功能分别为了实现方法等各个方法中的相应流程，为了简洁，在此不再赘述。
图14是本申请实施例提供的视频解码器的示意性框图。
如图14所示，该视频解码器20可包括：
第一解码单元21，用于解码码流，得到待解码码块；
第二解码单元22，用于对所述待解码块中一待解码系数的语法元素进行解码，所述待解码系数经过N个量化器中的一个量化器量化得到，所述N个量化器为DQ量化方式对应的量化器，所述N为大于或等于2的正整数，所述语法元素包括：系数非零标志、系数绝对值大于1标志、系数绝对值大于2标志、至少一个系数绝对值大于i标志、系数绝对值剩余值标志和符号标志，所述i为从3取到M的正整数，所述M为大于或等于3的正整数；
处理单元23，用于根据解码得到的语法元素，得到所述待解码系数的值，并根据所述待解码系数的值，得到所述待解码块的重建块。
在一些实施例中，第二解码单元22，具体用于执行如下3轮解码，包括：
第一轮解码，对所述待解码系数的系数非零标志、系数绝对值大于1标志、系数绝对值大于2标志和至少一个系数绝对值大于i标志进行解码；
第二轮解码，对所述待解码系数的系数绝对值剩余值标志进行解码；
第三轮解码，对所述待解码系数的符号标志进行解码。
在一些实施例中，所述第一轮解码包括第一子轮解码，第二解码单元22，具体用于在第一子轮解码中，对所述系数非零标志和所述系数绝对值大于1标志进行解码。
在一些实施例中，第二解码单元22，具体用于在第一子轮解码中，对所述系数绝对值大于2标志和/或所述至少一个系数绝对值大于i标志进行解码。
在一些实施例中，所述第一轮解码还包括第二子轮解码，第二解码单元22，具体用于
在第二子轮解码中，对所述系数绝对值大于2标志和所述至少一个系数绝对值大于i标志中的一个或多个进行解码；或者，
在第一子轮解码中，对系数绝对值大于2标志进行解码，在第二子轮解码中对所述至少一个系数绝对值大于i标志进行解码。
在一些实施例中，所述第一轮解码还包括第二子轮解码和第三子轮解码，第二解码单元22，具体用于在第二子轮解码中，对所述系数绝对值大于2标志进行解码；
在第三子轮解码中，对所述至少一个系数绝对值大于i标志进行解码。
在一些实施例中，第二解码单元22，具体用于对所述至少一个系数绝对值大于i标志中的每个标志分别进行解码。
在一些实施例中，所述至少一个系数绝对值大于i标志包括系数绝对值大于3标志和系数绝对值大于4标志。
在一些实施例中，第二解码单元22，具体用于在第一子轮解码中，对所述系数绝对值大于2标志、所述系数绝对值大于3标志、所述系数绝对值大于4标志中的一个或多个进行解码。
在一些实施例中，所述第一轮解码还包括第二子轮解码，第二解码单元22，具体用于在第二子轮解码中，对所述系数绝对值大于2标志，以及所述系数绝对值大于3标志和/或所述系数绝对值大于4标志进行解码；或者，
在第一子轮解码中，对系数绝对值大于2标志进行解码，在第二子轮解码中对所述系数绝对值大于3标志和所述系数绝对值大于4标志进行解码。
在一些实施例中，所述第一轮解码还包括第二子轮解码和第三子轮解码，第二解码单元22，具体用于在第二子轮解码中，对所述系数绝对值大于2标志进行解码；
在第三子轮解码中，对所述系数绝对值大于3标志和所述系数绝对值大于4标志进行解码。
在一些实施例中，所述第一轮解码还包括第二子轮解码、第三子轮解码和第四子轮 解码，第二解码单元22，具体用于在第二子轮解码中，对所述系数绝对值大于2标志进行解码；
在第三子轮解码中，对所述系数绝对值大于3标志进行解码；
在第四子轮解码中，对所述系数绝对值大于4标志进行解码。
在一些实施例中，第二解码单元22，具体用于解码系数非零标志，当系数非零标志解码为0时，跳过系数绝对值大于1标志、系数绝对值大于2标志、系数绝对值大于3标志、系数绝对值大于4标志、系数绝对值剩余值标志和符号标志的解码；
当系数非零标志解码为1时，解码系数绝对值大于1标志，当系数绝对值大于1标志解码为0时，解码符号标志，且跳过系数绝对值大于2标志、系数绝对值大于3标志、系数绝对值大于4标志、系数绝对值剩余值标志的解码；
当系数绝对值大于1标志解码为1时，解码系数绝对值大于2标志，当系数绝对值大于2标志解码为0时，解码符号标志，且跳过系数绝对值大于3标志、系数绝对值大于4标志、系数绝对值剩余值标志的解码；
当系数绝对值大于2标志解码为1时，解码系数绝对值大于3标志，当系数绝对值大于3标志解码为0时，解码符号标志，且跳过系数绝对值大于4标志和系数绝对值剩余值标志的解码；
当系数绝对值大于3标志解码为1时，解码系数绝对值大于4标志，当系数绝对值大于4标志解码为0时，解码符号标志，且跳过系数绝对值剩余值标志的解码；
当系数绝对值大于4标志解码为1时，解码符号标志和系数绝对值剩余值标志。
在一些实施例中，第二解码单元22，具体用于将非零标志的解码值、系数绝对值大于1标志的解码值、系数绝对值大于2标志的解码值、系数绝对值大于3标志的解码值、系数绝对值大于4标志的解码值、系数绝对值剩余值标志的解码值相加的和值，作为所述待解码系数的绝对值；
根据所述待解码系数的绝对值和符号标志的解码值，得到所述待解码系数的值。
在一些实施例中，所述N个量化器中至少有一个量化器为可以将变换系数均量化为非零量化系数的非零量化器。
在一些实施例中，所述N个量化器中至少有一个量化器为可以将变换系数量化为零的零点量化器。
在一些实施例中，所述N个量化器包括一个零点量化器和一个非零量化器。
在一些实施例中，处理单元23，具体用于获取所述待解码系数的已解码的前一个量 化系数的标志位信息；
根据所述前一个量化系数的标志位信息，从所述N个量化器中确定量化所述待解码系数所使用的目标量化器；
根据所述目标量化器和所述待解码系数的值，得到当前变换系数；
根据所述当前变换系数，得到重建块。
在一些实施例中，处理单元23，具体用于获取所述前一个量化系数的状态；
根据所述前一个量化系数的标志位信息，以及所述前一个量化系数的状态，确定所述待解码系数的状态；
根据所述待解码系数的状态，从所述N个量化器中确定所述目标量化器。
在一些实施例中，处理单元23，具体用于根据所述前一个量化系数的标志位信息，确定状态跳转值；
根据所述前一个量化系数的状态和所述状态跳转值，确定所述待解码系数的状态。
在一些实施例中，若所述前一个量化系数的标志位信息包括系数非零标志和系数绝对值大于1标志，处理单元23，具体用于若所述系数非零标志的值和所述系数绝对值大于1标志的值满足如下公式，则确定所述状态跳转值为1；
若所述系数非零标志的值和所述系数绝对值大于1标志的值不满足如下公式，则确定所述状态跳转值为0；
所述公式为：
t＝sigflag＝＝1&&gt1＝＝0
其中，所述t为所述状态跳转值，所述sigflag为所述系数非零标志的值，所述gt1为所述系数绝对值大于1标志的值。
应理解，装置实施例与方法实施例可以相互对应，类似的描述可以参照方法实施例。为避免重复，此处不再赘述。具体地，图14所示的视频解码器20可以对应于执行本申请实施例的方法中的相应主体，并且视频解码器20中的各个单元的前述和其它操作和/或功能分别为了实现方法等各个方法中的相应流程，为了简洁，在此不再赘述。
上文中结合附图从功能单元的角度描述了本申请实施例的装置和系统。应理解，该功能单元可以通过硬件形式实现，也可以通过软件形式的指令实现，还可以通过硬件和软件单元组合实现。具体地，本申请实施例中的方法实施例的各步骤可以通过处理器中的硬件的集成逻辑电路和/或软件形式的指令完成，结合本申请实施例公开的方法的步骤可以直接体现为硬件译码处理器执行完成，或者用译码处理器中的硬件及软件单元组合 执行完成。可选地，软件单元可以位于随机存储器，闪存、只读存储器、可编程只读存储器、电可擦写可编程存储器、寄存器等本领域的成熟的存储介质中。该存储介质位于存储器，处理器读取存储器中的信息，结合其硬件完成上述方法实施例中的步骤。
图15是本申请实施例提供的电子设备30的示意性框图。
如图15所示，该电子设备30可以为本申请实施例所述的视频编码器，或者视频解码器，该电子设备30可包括：
存储器33和处理器32，该存储器33用于存储计算机程序34，并将该程序代码34传输给该处理器32。换言之，该处理器32可以从存储器33中调用并运行计算机程序34，以实现本申请实施例中的方法。
例如，该处理器32可用于根据该计算机程序34中的指令执行上述方法中的步骤。
在本申请的一些实施例中，该处理器32可以包括但不限于：
通用处理器、数字信号处理器(Digital Signal Processor，DSP)、专用集成电路(Application Specific Integrated Circuit，ASIC)、现场可编程门阵列(Field Programmable Gate Array，FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件等等。
在本申请的一些实施例中，该存储器33包括但不限于：
易失性存储器和/或非易失性存储器。其中，非易失性存储器可以是只读存储器(Read-Only Memory，ROM)、可编程只读存储器(Programmable ROM，PROM)、可擦除可编程只读存储器(Erasable PROM，EPROM)、电可擦除可编程只读存储器(Electrically EPROM，EEPROM)或闪存。易失性存储器可以是随机存取存储器(Random Access Memory，RAM)，其用作外部高速缓存。通过示例性但不是限制性说明，许多形式的RAM可用，例如静态随机存取存储器(Static RAM，SRAM)、动态随机存取存储器(Dynamic RAM，DRAM)、同步动态随机存取存储器(Synchronous DRAM，SDRAM)、双倍数据速率同步动态随机存取存储器(Double Data Rate SDRAM，DDR SDRAM)、增强型同步动态随机存取存储器(Enhanced SDRAM，ESDRAM)、同步连接动态随机存取存储器(synch link DRAM，SLDRAM)和直接内存总线随机存取存储器(Direct Rambus RAM，DR RAM)。
在本申请的一些实施例中，该计算机程序34可以被分割成一个或多个单元，该一个或者多个单元被存储在该存储器33中，并由该处理器32执行，以完成本申请提供的方法。该一个或多个单元可以是能够完成特定功能的一系列计算机程序指令段，该指令段 用于描述该计算机程序34在该电子设备30中的执行过程。
如图15所示，该电子设备30还可包括：
收发器33，该收发器33可连接至该处理器32或存储器33。
其中，处理器32可以控制该收发器33与其他设备进行通信，具体地，可以向其他设备发送信息或数据，或接收其他设备发送的信息或数据。收发器33可以包括发射机和接收机。收发器33还可以进一步包括天线，天线的数量可以为一个或多个。
应当理解，该电子设备30中的各个组件通过总线系统相连，其中，总线系统除包括数据总线之外，还包括电源总线、控制总线和状态信号总线。
图16是本申请实施例提供的视频编解码系统40的示意性框图。
如图16所示，该视频编解码系统40可包括：视频编码器41和视频解码器42，其中视频编码器41用于执行本申请实施例涉及的视频编码方法，视频解码器42用于执行本申请实施例涉及的视频解码方法。
本申请还提供了一种计算机存储介质，其上存储有计算机程序，该计算机程序被计算机执行时使得该计算机能够执行上述方法实施例的方法。
本申请实施例还提供一种包含指令的计算机程序产品，该指令被计算机执行时使得计算机执行上述方法实施例的方法。
本申请还提供了一种码流，该码流是根据上述实施例所述的视频编码方法生成的，其中码流中包括如下语法元素：系数非零标志、系数绝对值大于1标志、系数绝对值大于2标志、至少一个系数绝对值大于i标志、系数绝对值剩余值标志和符号标志，所述i为从3取到M的正整数，所述M为大于或等于3的正整数。
当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。该计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行该计算机程序指令时，全部或部分地产生按照本申请实施例该的流程或功能。该计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。该计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，该计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(digital subscriber line，DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。该计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。该可用介质可以是磁性介质(例如，软盘、硬盘、磁带)、光介 质(例如数字视频光盘(digital video disc，DVD))、或者半导体介质(例如固态硬盘(solid state disk，SSD))等。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统、装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，该单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。例如，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
以上该，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变换或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以该权利要求的保护范围为准。

Claims (46)

  1. 一种视频编码方法，其特征在于，包括：
    获取待编码块；
    对所述待编码块进行处理，得到所述待编码块的变换块；
    针对所述变换块中一待编码系数，从N个量化器中确定一个目标量化器对所述待编码系数进行量化，得到当前量化系数，所述N个量化器为依赖性量化DQ方式对应的量化器，所述N为大于或等于2的正整数；
    对所述当前量化系数的语法元素进行编码，形成码流；
    其中，所述语法元素包括：系数非零标志、系数绝对值大于1标志、系数绝对值大于2标志、至少一个系数绝对值大于i标志、系数绝对值剩余值标志和符号标志，所述i为从3取到M的正整数，所述M为大于或等于3的正整数。
  2. 根据权利要求1所述的方法，其特征在于，所述对所述当前量化系数的语法元素进行编码包括如下3轮编码：
    第一轮编码,对所述当前量化系数的系数非零标志、系数绝对值大于1标志、系数绝对值大于2标志和至少一个系数绝对值大于i标志进行编码；
    第二轮编码，对所述当前量化系数的系数绝对值剩余值标志进行编码；
    第三轮编码，对所述当前量化系数的符号标志进行编码。
  3. 根据权利要求2所述的方法，其特征在于，所述第一轮编码包括第一子轮编码，所述方法还包括：
    在第一子轮编码中，对所述系数非零标志和所述系数绝对值大于1标志进行编码。
  4. 根据权利要求3所述的方法，其特征在于，所述方法还包括：
    在第一子轮编码中，对所述系数绝对值大于2标志和/或所述至少一个系数绝对值大于i标志进行编码。
  5. 根据权利要求3所述的方法，其特征在于，所述第一轮编码还包括第二子轮编码，所述方法还包括：
    在第二子轮编码中，对所述系数绝对值大于2标志和所述至少一个系数绝对值大于i标志中的一个或多个进行编码；或者，
    在第一子轮编码中，对系数绝对值大于2标志进行编码，在第二子轮编码中对所述至少一个系数绝对值大于i标志进行编码。
  6. 根据权利要求3所述的方法，其特征在于，所述第一轮编码还包括第二子轮编码和第三子轮编码，所述方法还包括：
    在第二子轮编码中，对所述系数绝对值大于2标志进行编码；
    在第三子轮编码中，对所述至少一个系数绝对值大于i标志进行编码。
  7. 根据权利要求3所述的方法，其特征在于，所述方法还包括：
    对所述至少一个系数绝对值大于i标志中的每个标志分别进行编码。
  8. 根据权利要求3所述的方法，其特征在于，所述至少一个系数绝对值大于i标志包括系数绝对值大于3标志和系数绝对值大于4标志。
  9. 根据权利要求8所述的方法，其特征在于，所述方法还包括：
    在第一子轮编码中，对所述系数绝对值大于2标志、所述系数绝对值大于3标志、所述系数绝对值大于4标志中的一个或多个进行编码。
  10. 根据权利要求8所述的方法，其特征在于，所述第一轮编码还包括第二子轮编码，所述方法还包括：
    在第二子轮编码中，对所述系数绝对值大于2标志，以及所述系数绝对值大于3标志和/或所述系数绝对值大于4标志进行编码；或者，
    在第一子轮编码中，对系数绝对值大于2标志进行编码，在第二子轮编码中对所述系数绝对值大于3标志和所述系数绝对值大于4标志进行编码。
  11. 根据权利要求8所述的方法，其特征在于，所述第一轮编码还包括第二子轮编码和第三子轮编码，所述方法还包括：
    在第二子轮编码中，对所述系数绝对值大于2标志进行编码；
    在第三子轮编码中，对所述系数绝对值大于3标志和所述系数绝对值大于4标志进行编码。
  12. 根据权利要求8所述的方法，其特征在于，所述第一轮编码还包括第二子轮编码、第三子轮编码和第四子轮编码，所述方法还包括：
    在第二子轮编码中，对所述系数绝对值大于2标志进行编码；
    在第三子轮编码中，对所述系数绝对值大于3标志进行编码；
    在第四子轮编码中，对所述系数绝对值大于4标志进行编码。
  13. 根据权利要求1所述的方法，其特征在于，所述N个量化器中至少有一个量化器为可以将变换系数均量化为非零量化系数的非零量化器。
  14. 根据权利要求13所述的方法，其特征在于，所述N个量化器中至少有一个量化器为可以将变换系数量化为零的零点量化器。
  15. 根据权利要求14所述的方法，其特征在于，所述N个量化器包括一个零点量化器和一个非零量化器。
  16. 根据权利要求1-15任一项所述的方法，其特征在于，所述从N个量化器中确定一个目标量化器对所述待编码系数进行量化，包括：
    获取所述当前量化系数的前一个量化系数的标志位信息；
    根据所述前一个量化系数的标志位信息，从所述N个量化器中确定一个目标量化器；
    使用所述目标量化器对所述待编码系数进行量化。
  17. 根据权利要求16所述的方法，其特征在于，所述根据所述前一个量化系数的标志位信息，从所述N个量化器中确定一个目标量化器，包括：
    获取所述前一个量化系数的状态；
    根据所述前一个量化系数的标志位信息，以及所述前一个量化系数的状态，确定所述当前量化系数的状态；
    根据所述当前量化系数的状态，从所述N个量化器中确定所述目标量化器。
  18. 根据权利要求17所述的方法，其特征在于，所述根据所述前一个量化系数的标志位信息，以及所述前一个量化系数的状态，确定所述当前量化系数的状态，包括：
    根据所述前一个量化系数的标志位信息，确定状态跳转值；
    根据所述前一个量化系数的状态和所述状态跳转值，确定所述当前量化系数的状态。
  19. 根据权利要求18所述的方法，其特征在于，若所述前一个量化系数的标志位信息包括系数非零标志和系数绝对值大于1标志，则所述根据所述前一个量化系数的标志位信息，确定状态跳转值，包括：
    若所述系数非零标志的值和所述系数绝对值大于1标志的值满足如下公式，则确定所述状态跳转值为1；
    若所述系数非零标志的值和所述系数绝对值大于1标志的值不满足如下公式，则确定所述状态跳转值为0；
    所述公式为：
    t＝sigflag＝＝1&&gt1＝＝0
    其中，所述t为所述状态跳转值，所述sigflag为所述系数非零标志的值，所述gt1为所述系数绝对值大于1标志的值。
  20. 一种视频解码方法，其特征在于，包括：
    解码码流，得到待解码块；
    对所述待解码块中一待解码系数的语法元素进行解码，所述待解码系数经过N个量化器中的一个量化器量化得到，所述N个量化器为DQ量化方式对应的量化器，所述N为大于或等于2的正整数，所述语法元素包括：系数非零标志、系数绝对值大于1标志、系数绝对值大于2标志、至少一个系数绝对值大于i标志、系数绝对值剩余值标志和符号标志，所述i为从3取到M的正整数，所述M为大于或等于3的正整数；
    根据解码得到的语法元素，得到所述待解码系数的值；
    根据所述待解码系数的值，得到所述待解码块的重建块。
  21. 根据权利要求20所述的方法，其特征在于，所述对所述待解码块中一待解码系数的语法元素进行解码包括如下3轮解码，包括：
    第一轮解码，对所述待解码系数的系数非零标志、系数绝对值大于1标志、系数绝对值大于2标志和至少一个系数绝对值大于i标志进行解码；
    第二轮解码，对所述待解码系数的系数绝对值剩余值标志进行解码；
    第三轮解码，对所述待解码系数的符号标志进行解码。
  22. 根据权利要求21所述的方法，其特征在于，所述第一轮解码包括第一子轮解码，所述方法还包括：
    在第一子轮解码中，对所述系数非零标志和所述系数绝对值大于1标志进行解码。
  23. 根据权利要求22所述的方法，其特征在于，所述方法还包括：
    在第一子轮解码中，对所述系数绝对值大于2标志和/或所述至少一个系数绝对值大于i标志进行解码。
  24. 根据权利要求22所述的方法，其特征在于，所述第一轮解码还包括第二子轮解码，所述方法还包括：
    在第二子轮解码中，对所述系数绝对值大于2标志和所述至少一个系数绝对值大于i标志中的一个或多个进行解码；或者，
    在第一子轮解码中，对系数绝对值大于2标志进行解码，在第二子轮解码中对所述至少一个系数绝对值大于i标志进行解码。
  25. 根据权利要求22所述的方法，其特征在于，所述第一轮解码还包括第二子轮解码和第三子轮解码，所述方法还包括：
    在第二子轮解码中，对所述系数绝对值大于2标志进行解码；
    在第三子轮解码中，对所述至少一个系数绝对值大于i标志进行解码。
  26. 根据权利要求22所述的方法，其特征在于，所述方法还包括：
    对所述至少一个系数绝对值大于i标志中的每个标志分别进行解码。
  27. 根据权利要求22所述的方法，其特征在于，所述至少一个系数绝对值大于i标志包括系数绝对值大于3标志和系数绝对值大于4标志。
  28. 根据权利要求27所述的方法，其特征在于，所述方法还包括：
    在第一子轮解码中，对所述系数绝对值大于2标志、所述系数绝对值大于3标志、所述系数绝对值大于4标志中的一个或多个进行解码。
  29. 根据权利要求27所述的方法，其特征在于，所述第一轮解码还包括第二子轮解码，所述方法还包括：
    在第二子轮解码中，对所述系数绝对值大于2标志，以及所述系数绝对值大于3标志和/或所述系数绝对值大于4标志进行解码；或者，
    在第一子轮解码中，对系数绝对值大于2标志进行解码，在第二子轮解码中对所述系数绝对值大于3标志和所述系数绝对值大于4标志进行解码。
  30. 根据权利要求27所述的方法，其特征在于，所述第一轮解码还包括第二子轮解码和第三子轮解码，所述方法还包括：
    在第二子轮解码中，对所述系数绝对值大于2标志进行解码；
    在第三子轮解码中，对所述系数绝对值大于3标志和所述系数绝对值大于4标志进行解码。
  31. 根据权利要求27所述的方法，其特征在于，所述第一轮解码还包括第二子轮解码、第三子轮解码和第四子轮解码，所述方法还包括：
    在第二子轮解码中，对所述系数绝对值大于2标志进行解码；
    在第三子轮解码中，对所述系数绝对值大于3标志进行解码；
    在第四子轮解码中，对所述系数绝对值大于4标志进行解码。
  32. 根据权利要求27所述的方法，其特征在于，所述对所述待解码块中一待解码系数的语法元素进行解码，包括：
    解码所述系数非零标志，当所述系数非零标志解码为0时，跳过所述系数绝对值大于1标志、所述系数绝对值大于2标志、系数绝对值大于3标志、系数绝对值大于4标志、系数绝对值剩余值标志和符号标志的解码；
    当所述系数非零标志解码为1时，解码所述系数绝对值大于1标志，当系数绝对值大于1标志解码为0时，解码符号标志，且跳过系数绝对值大于2标志、系数绝对值大 于3标志、系数绝对值大于4标志、系数绝对值剩余值标志的解码；
    当系数绝对值大于1标志解码为1时，解码系数绝对值大于2标志，当系数绝对值大于2标志解码为0时，解码符号标志，且跳过系数绝对值大于3标志、系数绝对值大于4标志、系数绝对值剩余值标志的解码；
    当系数绝对值大于2标志解码为1时，解码系数绝对值大于3标志，当系数绝对值大于3标志解码为0时，解码符号标志，且跳过系数绝对值大于4标志和系数绝对值剩余值标志的解码；
    当系数绝对值大于3标志解码为1时，解码系数绝对值大于4标志，当系数绝对值大于4标志解码为0时，解码符号标志，且跳过系数绝对值剩余值标志的解码；
    当系数绝对值大于4标志解码为1时，解码符号标志和系数绝对值剩余值标志。
  33. 根据权利要求32所述的方法，其特征在于，所述根据解码得到的语法元素，得到所述待解码系数的值，包括：
    将非零标志的解码值、系数绝对值大于1标志的解码值、系数绝对值大于2标志的解码值、系数绝对值大于3标志的解码值、系数绝对值大于4标志的解码值、系数绝对值剩余值标志的解码值相加的和值，作为所述待解码系数的绝对值；
    根据所述待解码系数的绝对值和符号标志的解码值，得到所述待解码系数的值。
  34. 根据权利要求20所述的方法，其特征在于，所述N个量化器中至少有一个量化器为可以将变换系数均量化为非零量化系数的非零量化器。
  35. 根据权利要求34所述的方法，其特征在于，所述N个量化器中至少有一个量化器为可以将变换系数量化为零的零点量化器。
  36. 根据权利要求35所述的方法，其特征在于，所述N个量化器包括一个零点量化器和一个非零量化器。
  37. 根据权利要求20-36任一项所述的方法，其特征在于，所述根据所述待解码系数的值，得到所述待解码块的重建块，包括：
    获取在所述待解码系数之前已解码的前一个量化系数的标志位信息；
    根据所述前一个量化系数的标志位信息，从所述N个量化器中确定量化所述待解码系数所使用的目标量化器；
    根据所述目标量化器和所述待解码系数的值，得到当前变换系数；
    根据所述当前变换系数，得到重建块。
  38. 根据权利要求37所述的方法，其特征在于，所述根据所述前一个量化系数的标 志位信息，从所述N个量化器中确定量化所述待解码系数所使用的目标量化器，包括：
    获取所述前一个量化系数的状态；
    根据所述前一个量化系数的标志位信息，以及所述前一个量化系数的状态，确定所述待解码系数的状态；
    根据所述待解码系数的状态，从所述N个量化器中确定所述目标量化器。
  39. 根据权利要求38所述的方法，其特征在于，所述根据所述前一个量化系数的标志位信息，以及所述前一个量化系数的状态，确定所述待解码系数的状态，包括：
    根据所述前一个量化系数的标志位信息，确定状态跳转值；
    根据所述前一个量化系数的状态和所述状态跳转值，确定所述待解码系数的状态。
  40. 根据权利要求39所述的方法，其特征在于，若所述前一个量化系数的标志位信息包括系数非零标志和系数绝对值大于1标志，则所述根据所述前一个量化系数的标志位信息，确定状态跳转值，包括：
    若所述系数非零标志的值和所述系数绝对值大于1标志的值满足如下公式，则确定所述状态跳转值为1；
    若所述系数非零标志的值和所述系数绝对值大于1标志的值不满足如下公式，则确定所述状态跳转值为0；
    所述公式为：
    t＝sigflag＝＝1&&gt1＝＝0
    其中，所述t为所述状态跳转值，所述sigflag为所述系数非零标志的值，所述gt1为所述系数绝对值大于1标志的值。
  41. 一种视频编码器，其特征在于，包括：
    获取单元，用于获取待编码块；
    处理单元，用于对所述待编码块进行处理，得到所述待编码块的变换块；
    量化单元，用于针对所述变换块中一待编码系数，从N个量化器中确定一个目标量化器对所述待编码系数进行量化，得到当前量化系数，所述N个量化器为依赖性量化DQ方式对应的量化器，所述N为大于或等于2的正整数；
    编码单元，用于对所述当前量化系数的语法元素进行编码，形成码流，其中，所述语法元素包括：系数非零标志、系数绝对值大于1标志、系数绝对值大于2标志、至少一个系数绝对值大于i标志、系数绝对值剩余值标志和符号标志，所述i为从3取到M的 正整数，所述M为大于或等于3的正整数。
  42. 一种视频解码器，其特征在于，包括：
    第一解码单元，用于解码码流，得到待解码块；
    第二解码单元，用于对所述待解码块中一待解码系数的语法元素进行解码，所述待解码系数经过N个量化器中的一个量化器量化得到，所述N个量化器为DQ量化方式对应的量化器，所述N为大于或等于2的正整数，所述语法元素包括：系数非零标志、系数绝对值大于1标志、系数绝对值大于2标志、至少一个系数绝对值大于i标志、系数绝对值剩余值标志和符号标志，所述i为从3取到M的正整数，所述M为大于或等于3的正整数；
    处理单元，用于根据解码得到的语法元素，得到所述待解码系数的值，并根据所述当待解码系数的值，得到所述待解码块的重建块。
  43. 一种视频编码器，其特征在于，包括：存储器，处理器；
    所述存储器，用于存储计算机程序；
    所述处理器，用于执行所述计算机程序以实现如上述权利要求1至19任一项所述方法。
  44. 一种视频解码器，其特征在于，包括：存储器，处理器；
    所述存储器，用于存储计算机程序；
    所述处理器，用于执行所述计算机程序以实现如上述权利要求20至40任一项所述方法。
  45. 一种视频编解码系统，其特征在于，包括：
    根据权利要求41或43所述的视频编码器；
    以及根据权利要求42或44所述的视频解码器。
  46. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质中存储有计算机执行指令，所述计算机执行指令被处理器执行时用于实现如权利要求1至19或20至40任一项所述的方法。
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