WO2022178988A1 - 虚拟机热迁移的方法及其装置 - Google Patents
虚拟机热迁移的方法及其装置 Download PDFInfo
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- WO2022178988A1 WO2022178988A1 PCT/CN2021/094935 CN2021094935W WO2022178988A1 WO 2022178988 A1 WO2022178988 A1 WO 2022178988A1 CN 2021094935 W CN2021094935 W CN 2021094935W WO 2022178988 A1 WO2022178988 A1 WO 2022178988A1
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- 238000000034 method Methods 0.000 title claims abstract description 55
- 230000005012 migration Effects 0.000 title claims abstract description 44
- 238000013508 migration Methods 0.000 title claims abstract description 44
- 230000008569 process Effects 0.000 claims abstract description 31
- 238000004088 simulation Methods 0.000 claims description 29
- 238000012360 testing method Methods 0.000 claims description 21
- 230000009471 action Effects 0.000 description 6
- 230000006870 function Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000008030 elimination Effects 0.000 description 2
- 238000003379 elimination reaction Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000001960 triggered effect Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000006399 behavior Effects 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45533—Hypervisors; Virtual machine monitors
- G06F9/45558—Hypervisor-specific management and integration aspects
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45533—Hypervisors; Virtual machine monitors
- G06F9/45558—Hypervisor-specific management and integration aspects
- G06F2009/4557—Distribution of virtual machine instances; Migration and load balancing
Definitions
- the present application relates to the field of computer technology, and more particularly to a method and device for hot migration of a virtual machine.
- Virtual machines created based on libvirt/QEMU/KVM usually have three modes: host CPU complete passthrough (host-passthrough), partial host CPU passthrough (host-model) and host CPU customization (custom-model) , the virtual machine performance corresponding to these three modes decreases in turn, but the live migration compatibility increases in turn.
- the deployment of the data center usually selects the virtual machine in the host-model mode of the host CPU part. In this mode, the instruction set exposed by the host to the virtual machine is often less than that of the host.
- the target node processor and the source node processor allow a certain difference, the allowable difference cannot be Override the AVX512 instruction set, so the live migration will still fail.
- the purpose of the present application is to provide a method for hot migration of virtual machines, so as to realize the hot migration of virtual machines across different generations of processors.
- An embodiment of the present application discloses a method for virtual machine hot migration, including:
- the kernel-based virtual machine module in the destination host captures the exception and parses the exception's interrupt context
- the decoding process of the instruction is simulated by using the instruction set of the destination host.
- the method further includes:
- the step of using the instruction set of the destination host to simulate the decoding process of the instruction further includes:
- the simulation instruction is transplanted to a kernel-based virtual machine module in the target host, and a regression test is performed on the test case library.
- the source host is a higher generation processor than the destination host.
- the instruction set of the destination host is AVX2
- the instruction set of the destination host is AVX512.
- Another embodiment of the present application discloses an apparatus for virtual machine hot migration, including:
- a triggering unit configured to trigger an exception when executing an instruction of an instruction set that the destination host does not have but the source host has in the virtual machine on the destination host;
- a capture unit set in the kernel-based virtual machine module in the destination host, and configured to capture the exception and parse the exception's interrupt context
- a decoding unit configured to acquire and decode the data of the instruction according to the instruction address information of the interrupt context
- the simulation unit is configured to use the instruction set of the destination host to simulate the execution process of the instruction.
- the device further includes:
- a creating unit configured to create a processor feature map in the destination host according to the simulation result, and create a virtual machine on the source host based on the processor feature map;
- the migration unit is configured to live migrate the virtual machine on the source host to the destination host.
- the step of simulating the decoding process of the instruction by the simulation unit using the instruction set of the destination host further includes:
- the simulation instruction is transplanted to a kernel-based virtual machine module in the target host, and a regression test is performed on the test case library.
- the source host is a higher generation processor than the destination host.
- the instruction set of the destination host is AVX2
- the instruction set of the destination host is AVX512.
- the present application can realize the hot migration of virtual machines across generations of processors on the premise of retaining higher instruction set capabilities, so that the cycle of data center server elimination can be slowed down to a certain extent, thereby reducing server deployment costs.
- FIG. 1 is a flowchart of a method for hot migration of a virtual machine according to an embodiment of the present application.
- FIG. 2 is a schematic diagram of an instruction set simulation process in a virtual machine hot migration process according to an embodiment of the present application.
- FIG. 3 is a schematic diagram of a virtual machine hot migration apparatus according to an embodiment of the present application.
- Kernel-based Virtual Machine It is an open-source system virtualization module that is integrated in all major Linux distributions.
- Instruction set It is a set of instructions used in the CPU to calculate and control the computer system, and each new type of CPU specifies a series of instruction systems that cooperate with other hardware circuits during design.
- the advanced or not of the instruction set is also related to the performance of the CPU, and it is also an important symbol of the performance of the CPU.
- Virtual Machine refers to a complete computer system with complete hardware system functions simulated by software and running in a completely isolated environment. Anything that can be done in a physical computer can be done in a virtual machine.
- Hot migration Also known as live migration and live migration, that is, the saving/restoring of virtual machines, usually the entire running state of the entire virtual machine is completely saved, and at the same time, it can be quickly restored to the original hardware platform or even a different hardware platform. After recovery, the virtual machine still runs smoothly and the user will not notice any difference.
- the first embodiment of the present application discloses a method for hot migration of a virtual machine, the flowchart of which is shown in FIG. 1 , and the method includes steps 110 to 140 .
- Step 110 Trigger an exception when executing an instruction of an instruction set not possessed by the destination host but possessed by the source host in the virtual machine on the destination host.
- the source host is a processor of a higher generation than the destination host, for example, the source host is one generation higher than the destination host, the destination host is a fifth-generation Broadwell processor, and the destination The instruction set possessed by the host is AVX2, the source host is a sixth-generation Skylake processor, and the instruction set possessed by the source host is AVX512. It should be understood that the source host may be a processor of several generations higher than the destination host.
- Step 120 the kernel-based virtual machine module in the destination host captures the exception and parses the exception's interrupt context.
- Step 130 Acquire and decode the data of the instruction according to the instruction address information of the interrupt context.
- Step 140 using the instruction set of the destination host to simulate the execution process of the instruction
- the step 140 of simulating the decoding process of the instruction using the instruction set of the destination host further includes:
- Step 1401 use a decoding tool to simulate the decoding process of the instruction, generate a simulated instruction, and establish a test case library;
- Step 1402 Migrate the simulation instruction to a kernel-based virtual machine module in the destination host, and perform regression testing on the test case library.
- the decoding tool in step 1401 may be a third-party open source or self-written binary decoding tool.
- the method further comprises:
- Step 150 creating a processor feature map in the destination host according to the simulation result
- Step 160 creating a virtual machine on the source host based on the processor feature map
- Step 170 Live migrate the virtual machine on the source host to the destination host.
- the present application realizes the hot migration of virtual machines across generations of processors by simulating the instruction set, thereby slowing down the cycle of data center server elimination to a certain extent, thereby reducing server deployment costs.
- the KVM of the host operating system (host OS) on the Broadwell CPU is improved to support the simulation of AVX512 instruction set architecture (Instruction Set Architecture, ISA).
- AVX512 instruction set architecture Instruction Set Architecture, ISA
- the main process of simulating the AVX512 instruction set structure includes four steps: Trigger (Trap), Capture (Intercept), Decode (Decode), and Emulate (Emulate).
- Trigger Trap
- Capture Intercept
- Decode Decode
- Emulate Emulate
- the simulation process generates AVX2 instructions that simulate AVX512 instructions, and adds the generated AVX2 instructions to the KVM of the Broadwell CPU, that is, the process of improving the KVM.
- the specific steps to simulate the AVX512 instruction set structure are as follows:
- VM virtual machine
- Broadwell CPU will trigger a #UD exception when executing an AVX512 instruction
- KVM intercepts the exception and parses the exception interrupt context
- Decoding Obtain and decode the binary data of the AVX512 instruction through the instruction address information provided in the interrupt context;
- Simulation The simulation of the decoded AVX512 instruction is completed based on the AVX2 instruction.
- the content obtained by decoding the interrupt context of the AVX512 instruction includes the opcode (opcode) and the operand (operands).
- opcode opcode
- operands operands
- the host CPU custom-model mode is formed on the Broadwell CPU.
- the processing capability characteristics of the AVX512 instructions enabled by the AVX2 simulation instructions are added to form a customized feature map. , that is, the CPU feature map of "Broadwell+AVX512" is formed.
- a virtual machine is created on the Skylake CPU based on the host CPU custom-model mode, and the virtual machine on the Skylake CPU is hot migrated to the Broadwell CPU where the customized processor feature map has been created.
- the AVX512 instruction is executed in the virtual machine, the above trigger-capture-decode-simulation process can be triggered to complete the simulation of the AVX512 instruction.
- a list of required compatible server processor models is explicitly compiled to determine the instruction set differences across generations of CPUs involved in the list.
- the subset of instruction sets that need to be supported is specified, thereby forming a customized host-model CPU feature map on the destination host (ie, a relatively low-generation processor).
- the simulation experiment of the required instructions is completed in the user space, and a complete test case library is established.
- the user-space simulation instructions are ported to the kernel-space KVM, and the above test case library is used for regression testing.
- a virtual machine is created on the previous and subsequent CPU servers at the same time by using the above-mentioned customized host-model of the host CPU part, and a live migration action is performed.
- the decoding tool is used to obtain the opcode and operand of the AVX512 instruction that caused the exception from the information of the exception context, so that it can know which instruction this exception instruction is, what operation is completed, and which operands are involved.
- the decoding tool can be implemented by using any decoding tool known in the art or known in the future, which will not be repeated in the present invention.
- the above embodiment simulates the AVX512 instruction set, so that the virtual machine created based on the Intel Skylake processor can be successfully migrated to the Intel Broadwell processor on the premise of retaining the AVX512 instruction set capability, thereby realizing the virtual machine of cross-generation processors. of thermal migration.
- FIG. 3 shows a schematic diagram of the apparatus.
- the apparatus includes a trigger unit, a capture unit, a decoding unit, and an emulation unit.
- the triggering unit is configured to trigger an exception when executing an instruction of an instruction set that the destination host does not have but the source host has in the virtual machine on the destination host;
- a capture unit is set in the kernel-based virtual machine module in the destination host, and is configured to capture the exception and parse the exception's interrupt context
- the decoding unit is configured to acquire and decode the data of the instruction according to the instruction address information of the interrupt context
- the simulation unit is configured to use the instruction set of the destination host to simulate the execution process of the instruction.
- the apparatus further includes:
- a creating unit configured to create a processor feature map in the destination host according to the simulation result, and create a virtual machine on the source host based on the processor feature map;
- the migration unit is configured to live migrate the virtual machine on the source host to the destination host.
- the simulation unit uses the instruction set of the destination host to simulate the decoding process of the instruction, further comprising:
- the simulation instruction is transplanted to a kernel-based virtual machine module in the target host, and a regression test is performed on the test case library.
- the source host is a higher generation processor than the destination host.
- the instruction set of the destination host is AVX2
- the instruction set of the source host is AVX512.
- the first embodiment is a method embodiment corresponding to this embodiment, the technical details in the first embodiment can be applied to this embodiment, and the technical details in this embodiment can also be applied to the first embodiment.
- each module shown in the embodiment of the apparatus for virtual machine hot migration can be understood with reference to the relevant description of the foregoing method for virtual machine hot migration.
- the functions of the modules shown in the foregoing embodiments of the apparatus for live migration of a virtual machine may be implemented by a program (executable instruction) running on the processor, or may be implemented by a specific logic circuit. If the above-mentioned apparatus for virtual machine hot migration in the embodiment of this specification is implemented in the form of a software function module and is sold or used as an independent product, it may also be stored in a computer-readable storage medium.
- the technical solutions of the embodiments of this specification or the parts that make contributions to the prior art can be embodied in the form of software products, and the computer software products are stored in a storage medium, and include several instructions for A computer device (which may be a personal computer, a server, or a network device, etc.) is caused to execute all or part of the methods described in the various embodiments of this specification.
- the aforementioned storage medium includes: U disk, mobile hard disk, Read Only Memory (ROM, Read Only Memory), magnetic disk or optical disk and other media that can store program codes.
- embodiments of this specification are not limited to any particular combination of hardware and software.
- an action is performed according to a certain element, it means at least that the action is performed according to the element, which includes two situations: the action is performed only according to the element, and the action is performed according to the element and Other elements perform this behavior.
- Expressions such as multiple, multiple, multiple, etc. include 2, 2, 2, and 2 or more, 2 or more, and 2 or more.
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Abstract
Description
Claims (10)
- 一种虚拟机热迁移的方法,其特征在于,包括:在目的主机上的虚拟机中执行所述目的主机不具有而源主机具有的指令集的指令时触发异常;所述目的主机中的基于内核的虚拟机模块捕获所述异常并解析所述异常的中断上下文;根据所述中断上下文的指令地址信息获取所述指令的数据并进行解码;以及采用所述目的主机的指令集模拟所述指令的执行过程。
- 根据权利要求1所述的虚拟机热迁移的方法,其特征在于,进一步包括:根据模拟结果在所述目的主机中创建处理器特征图;基于所述处理器特征图在所述源主机上创建虚拟机;以及将所述源主机上的虚拟机热迁移至所述目的主机。
- 根据权利要求1所述的虚拟机热迁移的方法,其特征在于,采用所述目的主机的指令集模拟所述指令的解码过程的步骤,进一步包括:采用解码工具模拟所述指令的解码过程,生成模拟指令,并建立测试用例库;以及将所述模拟指令移植到所述目的主机中的基于内核的虚拟机模块,并对所述测试用例库进行回归测试。
- 根据权利要求1所述的虚拟机热迁移的方法,其特征在于,所述源主机是比所述目的主机的更高代的处理器。
- 根据权利要求1所述的虚拟机热迁移的方法,其特征在于,所述目的主机的指令集为AVX2,所述源主机的指令集为AVX512。
- 一种虚拟机热迁移的装置,其特征在于,包括:触发单元,被配置为在所述目的主机上的虚拟机中执行所述目的主机不具有而所述源主机具有的指令集的指令时触发异常;捕获单元,设置于所述目的主机中的基于内核的虚拟机模块中,并被配置为捕获所述异常并解析所述异常的中断上下文;解码单元,被配置为根据所述中断上下文的指令地址信息获取所述指令的 数据并进行解码;以及模拟单元,被配置为采用所述目的主机的指令集模拟所述指令的执行过程。
- 根据权利要求6所述的虚拟机热迁移的装置,其特征在于,进一步包括:创建单元,被配置为根据模拟结果在所述目的主机中创建处理器特征图,并基于所述处理器特征图在所述源主机上创建虚拟机;以及迁移单元,被配置为将所述源主机上的虚拟机热迁移至所述目的主机。
- 根据权利要求6所述的虚拟机热迁移的装置,其特征在于,所述模拟单元采用所述目的主机的指令集模拟所述指令的解码过程的步骤,进一步包括:采用解码工具模拟所述指令的解码过程,生成模拟指令,并建立测试用例库;以及将所述模拟指令移植到所述目的主机中的基于内核的虚拟机模块,并对所述测试用例库进行回归测试。
- 根据权利要求6所述的虚拟机热迁移的装置,其特征在于,所述源主机是比所述目的主机的更高代的处理器。
- 根据权利要求6所述的虚拟机热迁移的装置,其特征在于,所述目的主机的指令集为AVX2,所述源主机的指令集为AVX512。
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