WO2022174689A1 - 天线设计方法、装置及电子设备 - Google Patents

天线设计方法、装置及电子设备 Download PDF

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Publication number
WO2022174689A1
WO2022174689A1 PCT/CN2022/070562 CN2022070562W WO2022174689A1 WO 2022174689 A1 WO2022174689 A1 WO 2022174689A1 CN 2022070562 W CN2022070562 W CN 2022070562W WO 2022174689 A1 WO2022174689 A1 WO 2022174689A1
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Prior art keywords
impedance value
active
simulation
antenna
array
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PCT/CN2022/070562
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English (en)
French (fr)
Inventor
张琳
陈智慧
董超
许峰凯
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成都天锐星通科技有限公司
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Priority to EP22755462.3A priority Critical patent/EP4297189A4/en
Publication of WO2022174689A1 publication Critical patent/WO2022174689A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q21/00—Antenna arrays or systems
    • H01Q21/06—Arrays of individually energised antenna units similarly polarised and spaced apart
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q21/00—Antenna arrays or systems
    • H01Q21/0087—Apparatus or processes specially adapted for manufacturing antenna arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q3/00—Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system
    • H01Q3/26—Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture

Definitions

  • the present invention relates to the field of antenna technology, and in particular, to an antenna design method, device and electronic device.
  • phased array system can perform spatial power synthesis in a specified direction in a large airspace, it can rapidly change the beam pointing and beam shape, and can play a huge role in various application scenarios such as measurement and control systems and satellite communications.
  • the power combining ability in different directions is closely related to the angle value deviating from the normal direction. Therefore, achieving good scanning performance in a wide angle range is a major problem of phased array systems, and it is urgent to design an antenna array that can achieve wide-angle scanning.
  • the commonly used measures are mainly to increase various additional hardware.
  • this method including adding a focusing lens above the antenna, but currently the lens cannot achieve two-dimensional scanning; adding various EBG structures.
  • EBG structures for 2D scanning is immature; tightly coupled arrays. Tightly coupled arrays have some research results in low frequency bands, but there are few high-frequency studies.
  • the active standing waves of the tightly coupled arrays are seriously deteriorated, and a wide-angle matching layer needs to be designed to work properly, so the antenna profile is high; Reconfigurable technology.
  • the switch can be controlled to change the different structures of the antenna, so that the antenna can work in different states. This approach requires control switching such as diode switches, which introduces additional control circuitry.
  • the objects of the present invention include, for example, providing an antenna design method, device and electronic device to improve the problems of poor wide-angle scanning performance of existing antennas.
  • the present invention provides an antenna design method, the antenna design method includes:
  • the front is simulated, and the active impedance values of all the scanning points of the central unit of the front are determined;
  • the front surface is determined as the target array.
  • the determining, according to the active impedance value and the matching impedance value, whether the simulation parameters of the front surface satisfy the iterative exit condition includes:
  • the step of determining whether the active standing wave of the front is less than a set value includes:
  • the simulating the front surface and determining the active impedance value of the central unit of the front surface include:
  • the active impedance value of the cells located in the center row and the center column at the same time is determined as the active impedance value of the center cell of the array.
  • the simulating the front surface, and determining the active impedance value of the center unit of the front surface includes:
  • the active impedance value of any one of the four antenna elements in the central area of the front is determined as the active impedance value of the central element of the front.
  • the method when the simulation parameters of the front face do not satisfy the iterative exit condition, the method further includes:
  • the next simulation is performed using the adjusted antenna unit as the given antenna unit until the simulation parameters of the front meet the iterative exit condition.
  • the adjusting the structural parameters of the antenna unit to reduce the active standing wave of the antenna unit includes:
  • the active impedance value of the front central unit at a large scanning angle is greater than the matching impedance value, increase the size of the antenna unit to reduce the difference between the active impedance value and the matching impedance value, thereby reducing the an active standing wave of the antenna unit;
  • the active impedance value of the front central unit at a large scanning angle is smaller than the matching impedance value, reduce the size of the antenna unit to reduce the difference between the matching impedance value and the active impedance value, thereby reducing the Active standing waves of the antenna unit.
  • the present invention provides an antenna design apparatus, the antenna design apparatus is configured to execute the antenna design method according to any one of the foregoing embodiments, and the antenna design apparatus includes:
  • a simulation module used for performing unit simulation on a given antenna unit, and determining the matching impedance value of the antenna unit
  • the simulation module is also used to form arrays of any form and scale according to the antenna unit; simulate the array to determine the active impedance values of all scanning points of the central unit of the array;
  • a processing module configured to determine whether the simulation parameters of the front meet the iterative exit condition according to the active impedance value and the matching impedance value;
  • the processing module is further configured to determine the front as the target array when the simulation parameters of the front meet the iterative exit condition.
  • the processing module is configured to determine whether the active standing wave under the large scanning angle of the front is less than a set value, and when the active standing wave under the large scanning angle of the front is less than When setting the value, it is determined that the simulation parameters of the array meet the iteration exit condition; or, the processing module is used to determine whether the number of simulation iterations reaches a preset number, and when the number of simulation iterations reaches a preset number, determine the array The simulation parameters of the surface satisfy the iterative exit condition.
  • the present invention provides an electronic device, the electronic device includes a processor, the processor is configured to execute computer-readable program instructions, and when the computer-readable program instructions are executed, implement any one of the foregoing embodiments The steps of the antenna design method.
  • the solution provided by the present application determines the matching impedance value of the antenna unit by performing unit simulation on a given antenna unit; then, according to the antenna unit, an array of any form and scale is performed; and the array is simulated. , determine the active impedance values of all scanning points of the central unit of the front; determine whether the simulation parameters of the front meet the iterative exit conditions according to the active impedance value and the matching impedance value; When the simulation parameters satisfy the iterative exit condition, the array is determined as the target array.
  • the active impedance value under the large scanning angle of the front is determined as the matching impedance value of the next iterative simulation; the structural parameters of the antenna unit are adjusted to reduce the active standing wave of the antenna unit ; Use the adjusted antenna unit as the given antenna unit to perform the next simulation until the simulation parameters of the front meet the iterative exit condition.
  • the solution provided in this application takes the active standing wave with a large scanning angle as the matching standard, and appropriately deteriorates the normal active standing wave, thereby improving the wide-angle scanning performance; at the same time, the solution and method provided in this application are simple and easy to implement, and do not introduce any additional hardware. Reduce design costs.
  • FIG. 1 is a flowchart of an antenna design method provided by an embodiment of the present application
  • FIG. 2 is a schematic diagram of an antenna unit according to an embodiment of the present application.
  • FIG. 3 is a schematic diagram of an antenna array provided by an embodiment of the present application.
  • FIG. 4 is a schematic diagram of another antenna array provided by an embodiment of the present application.
  • FIG. 5 is a functional block diagram of an antenna design apparatus provided by an embodiment of the present application.
  • FIG. 6 is a schematic diagram of an electronic device provided by an embodiment of the present application.
  • Icons 300-antenna design device; 310-simulation module; 320-processing module; 410-processor; 411-memory; 412-bus; 413-communication interface.
  • phased array system can perform spatial power synthesis in a specified direction in a large airspace, it can rapidly change the beam pointing and beam shape, and can play a huge role in various application scenarios such as measurement and control systems and satellite communications.
  • the power combining ability in different directions is closely related to the angle value deviating from the normal direction. Therefore, achieving good scanning performance in a wide angle range is a major problem of phased array systems, and it is urgent to design an antenna array that can achieve wide-angle scanning.
  • the commonly used measures are mainly to increase various additional hardware.
  • this method including adding a focusing lens above the antenna, but currently the lens cannot achieve two-dimensional scanning; adding various EBG structures.
  • EBG structures for 2D scanning is immature; tightly coupled arrays. Tightly coupled arrays have some research results in low frequency bands, but there are few high-frequency studies.
  • the active standing waves of the tightly coupled arrays are seriously deteriorated, and a wide-angle matching layer needs to be designed to work properly, so the antenna profile is high; Reconfigurable technology.
  • the switch can be controlled to change the different structures of the antenna, so that the antenna can work in different states. This approach requires control switching such as diode switches, which introduces additional control circuitry.
  • an embodiment of the present application provides an antenna design method. Please refer to FIG. 1 , which shows a flowchart of the antenna design method provided by the embodiment of the present application.
  • the antenna design method provided by the embodiment of the present application includes:
  • S110 Perform unit simulation on a given antenna unit to determine a matching impedance value of the antenna unit.
  • the element simulation is performed for a given antenna element of any form. Element simulation is performed for a given antenna element if not the first simulation.
  • the structure of the antenna unit is shown in Figure 2.
  • the antenna radiator is a metal patch, printed on the medium, and the coaxial inner conductor passing through the dielectric plate is connected to the metal patch
  • the chip is contacted and fed, and the back of the medium is the metal floor of the patch.
  • a ring with a larger radius is removed from the area concentric with the inner conductor on the metal floor.
  • the hollow on the floor The ring needs to meet a certain radius ratio with the inner conductor.
  • the radius ratio is determined by the impedance of the external coaxial interface, which is usually 50 ohms or 75 ohms.
  • the impedance of the coaxial interface is set to 50 ohms, then the matching impedance value of the antenna unit at this time is 50 ohms, and a preliminary simulation of the antenna unit is performed to obtain the actual impedance value of the antenna.
  • the antenna impedance value and the port impedance value are often the same at this time.
  • Step 120 Array arrays in any form and scale according to the antenna units.
  • the antenna elements designed in the previous step are arrayed in any form and scale.
  • the array array for the antenna units may be a triangular array or an even-scale array for the antenna units, or a rectangular array or an odd-scale array for the antenna units. This implementation The example does not limit the array form of the antenna units.
  • S130 Simulate the surface, and determine the active impedance values of all the scanning points of the center unit of the array.
  • the active impedance value of the unit located in the center row and the center column is determined as the center unit of the array, and all the elements in the center unit of the array are extracted. Active impedance value of the sweep point.
  • the array is an even-numbered array, there are often four elements in the center of the array. Since the impedance values of these four elements are not very different in a large array, one can be chosen at will.
  • the unit serves as the central unit for the next calculation.
  • the active impedance value of any one of the four antenna units in the central area of the array is determined as the central unit of the array, and the active impedance values of all scanning points of the central unit of the array are extracted.
  • S140 Determine whether the simulation parameters of the front meet the iteration exit condition according to the active impedance value and the matching impedance value.
  • the active standing wave of the antenna is related to the active impedance. The closer the active impedance is to the set value, the smaller the active standing wave. Therefore, in this embodiment, the active impedance value and the matching impedance value are used to determine whether the antenna satisfies the design conditions, and if so, the iterative simulation is exited; if not, the next iterative simulation is performed.
  • S140 determining whether the simulation parameters of the front face meet the iterative exit condition according to the active impedance value and the matching impedance value, including:
  • the active standing wave of the antenna is related to the active impedance.
  • determining whether the active standing wave of the front is less than a set value may include:
  • the active impedance value of the antenna under a large scanning angle is closer to the set matching impedance value, the active standing wave under the large scanning angle of the antenna will be smaller. If the difference between the active impedance value under the large scanning angle of the antenna and the set matching impedance value is larger, the active standing wave under the large scanning angle of the antenna will be larger. Therefore, when the difference between the active impedance value under the large scanning angle of the antenna and the matching impedance value is smaller than the impedance threshold, it is determined that the active standing wave under the large scanning angle of the front is smaller than the set value.
  • the difference between the active impedance value and the matching impedance value refers to the difference between the larger and smaller of the active impedance value and the matching impedance value, which may be the active impedance value and the matching impedance value.
  • the difference between the values may also be the difference between the matching impedance value and the active impedance value.
  • the set value is set to 2. It is also possible that the active standing wave is less than 2 after many iterations of the program. In order to save time, the number of iterations is added. The judgment is to judge whether the number of iterations is greater than the set value. The larger the set value, the longer the simulation time, and the more likely it is close to the required standing wave value. In a possible implementation manner, the preset number of iterations is 200. When the number of simulation iterations reaches the preset number, the iteration is exited.
  • the antenna design method also includes:
  • S160-1 Determine the active impedance value under the large scanning angle of the front as the matching impedance value for the next iterative simulation.
  • S160-2 Adjust the structural parameters of the antenna unit to reduce active standing waves of the antenna unit.
  • the active impedance value under the large scanning angle of the front central unit is greater than the matching impedance value, increase the size of the antenna unit to reduce the difference between the active impedance value and the matching impedance value, thereby reducing the active standing wave of the antenna unit;
  • the active impedance value of the front central unit at a large scanning angle is smaller than the matching impedance value, reduce the size of the antenna unit to reduce the difference between the matching impedance value and the active impedance value, thereby reducing the active standing wave of the antenna unit.
  • S160-3 Use the adjusted antenna unit as a given antenna unit to perform the next simulation until the simulation parameters of the array meet the iterative exit condition.
  • the antenna array can basically achieve the effect, so it will not take up too much simulation time.
  • the active impedance value Z of the normal direction (0° scanning angle) and the large-angle scanning angle (assumed to be 60°) of the central unit is obtained from the surface simulation, and Z is a complex number.
  • the simulation results are respectively are 52.4-10.17j and 23.5+29.47j. It can be seen that in the normal direction, since the active impedance is close to the 50 ohms set by the previous port, the normal active standing wave is 1.2, and the large angle impedance has a large deviation from 50 ohms, so the active standing wave is 2.9.
  • the set value is set to 2. It is also possible that the case where the active standing wave is less than 2 cannot be satisfied after many iterations of the program. In order to save time, the number of iterations is added to judge whether the number of iterations is greater than the set value. The larger the set value, the longer the simulation time, and the more likely it is close to the required standing wave value. Here, the set value is assumed to be 200. When any of the above judgments are satisfied, the simulation ends and the antenna array is output.
  • the obtained active impedance value under the large scanning angle is used as the matching impedance value of the antenna unit in the next simulation.
  • the active impedance at 60° is 23.5+29.47j, so the impedance value of the next antenna unit needs to be designed to be 23.5+29.47j.
  • the port impedance is always the impedance of the external coaxial port, the antenna structure needs to be adjusted in order to make the antenna impedance value the set value.
  • the size of the patch is selected as the structural parameter for adjustment. Since the active standing wave value may change after each simulation, after adjustment, continue to repeat the above steps until the exit condition is reached.
  • the final output is a front that satisfies wide-angle scanning performance.
  • FIG. 5 is an antenna design apparatus 300 provided by a preferred embodiment of the present invention.
  • the antenna design apparatus 300 provided in this embodiment includes a simulation module 310 and a processing module 320 .
  • the simulation module 310 is used for performing unit simulation on a given antenna unit to determine the matching impedance value of the antenna unit.
  • the simulation module 310 may be used to execute S110 in the foregoing implementation manner, so as to achieve corresponding technical effects.
  • the simulation module 310 is also used to form an array of arrays of any form and scale according to the antenna unit; to simulate the array to determine the active impedance values of all the scanning points of the central unit of the array.
  • the simulation module 310 may be configured to execute S120 to S130 in the foregoing implementation manner, so as to achieve corresponding technical effects.
  • the processing module 320 is configured to determine whether the simulation parameters of the front meet the iteration exit condition according to the active impedance value and the matching impedance value.
  • the processing module 320 may be configured to execute S140 in the foregoing implementation manner, so as to achieve corresponding technical effects.
  • the processing module 320 is further configured to determine the array as the target array when the simulation parameters of the array satisfy the iterative exit condition.
  • the processing module 320 may be configured to execute S150 in the foregoing implementation manner, so as to achieve corresponding technical effects.
  • the processing module 320 is used to determine whether the active standing wave under the large scanning angle of the front is less than a set value, or to determine whether the number of simulation iterations reaches a preset number.
  • the processing module 320 is further configured to determine the active impedance value under the large scanning angle of the front face as the matching impedance value of the next iterative simulation, Adjust the structural parameters of the antenna unit to reduce the active standing wave of the antenna unit, and use the adjusted antenna unit as a given antenna unit for the next simulation until the simulation parameters of the front meet the iterative exit conditions.
  • the processing module 320 may be configured to execute S160-1 to S160-3 in the foregoing implementation manner, so as to achieve corresponding technical effects.
  • FIG. 6 shows a schematic structural diagram of the electronic device provided by this embodiment.
  • the electronic device includes a processor 410 , a memory 411 , and a bus 412 .
  • the processor 410 and the memory 411 are connected through the bus 412, and the processor 410 is used to execute executable modules stored in the memory 411, such as computer-readable program instructions, when the computer-readable program instructions are executed by the processor 410 to implement the above-mentioned embodiments
  • the steps of the antenna design method are provided.
  • the processor 410 may be an integrated circuit chip with signal processing capability. In the implementation process, each step of the antenna design method provided in this embodiment may be completed by an integrated logic circuit of hardware in the processor 410 or an instruction in the form of software.
  • the above-mentioned processor 410 may be a general-purpose processor, including a central processing unit (Central Processing Unit, referred to as CPU), a network processor (Network Processor, referred to as NP), etc.; may also be a digital signal processor (Digital Signal Processor, referred to as DSP) ), Application Specific Integrated Circuit (ASIC), Field-Programmable Gate Array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, and discrete hardware components.
  • CPU Central Processing Unit
  • NP Network Processor
  • DSP Digital Signal Processor
  • ASIC Application Specific Integrated Circuit
  • FPGA Field-Programmable Gate Array
  • the memory 411 may include a high-speed random access memory (RAM: Random Access Memory), and may also include a non-volatile memory (non-volatile memory), such as at least one disk memory.
  • RAM Random Access Memory
  • non-volatile memory such as at least one disk memory.
  • the bus 412 may be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus, or an EISA (Extended Industry Standard Architecture) bus, or the like. Only one bidirectional arrow is shown in FIG. 6, but it does not mean that there is only one bus 412 or one type of bus 412.
  • ISA Industry Standard Architecture
  • PCI Peripheral Component Interconnect
  • EISA Extended Industry Standard Architecture
  • the memory 411 is used to store programs, such as program instructions corresponding to the antenna design apparatus.
  • the antenna design apparatus includes at least one software function module that can be stored in the memory 411 in the form of software or firmware (firmware) or fixed in an operating system (operating system, OS) of the electronic device.
  • the processor 410 executes the program to implement the steps of the antenna design method.
  • the electronic device provided in this embodiment of the present application further includes a communication interface 413 .
  • the communication interface 413 is connected to the processor 410 through a bus.
  • the communication interface 413 can be used to output the antenna array satisfying the design parameters to the external device.
  • FIG. 6 is only a schematic structural diagram of a part of the electronic device, and the electronic device may further include more or less components than those shown in FIG. 6 , or have different configurations from those shown in FIG. 6 .
  • each component shown in FIG. 6 may be implemented by hardware, software or a combination thereof.
  • the present application provides an antenna design method, device and electronic equipment.
  • the matching impedance value of the antenna unit is determined;
  • the array is formed; the surface is simulated to determine the active impedance value of all scanning points of the central unit of the array; according to the active impedance value and the matching impedance value, the simulation parameters of the array are determined to meet the iterative exit conditions; when the simulation of the array When the parameters meet the iterative exit conditions, the array is determined as the target array.
  • the active impedance value under the large scanning angle of the front is determined as the matching impedance value of the next iterative simulation; the structural parameters of the antenna unit are adjusted to reduce the active standing wave of the antenna unit; the adjusted antenna The element is used as a given antenna element for the next simulation until the simulation parameters of the array meet the iterative exit conditions.
  • the solution provided in this application takes the active standing wave with a large scanning angle as the matching standard, and appropriately deteriorates the normal active standing wave, thereby improving the wide-angle scanning performance; at the same time, the solution and method provided in this application are simple and easy to implement, and do not introduce any additional hardware. Reduce design costs.
  • each block in the flowchart or block diagrams may represent a module, segment, or portion of code that contains one or more functions for implementing the specified logical function(s) executable instructions. It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures.
  • each block of the block diagrams and/or flowchart illustrations, and combinations of blocks in the block diagrams and/or flowchart illustrations can be implemented in dedicated hardware-based systems that perform the specified functions or actions , or can be implemented in a combination of dedicated hardware and computer instructions.
  • each functional module in each embodiment of the present invention may be integrated to form an independent part, or each module may exist independently, or two or more modules may be integrated to form an independent part.
  • the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium.
  • the technical solution of the present invention can be embodied in the form of a software product in essence, or the part that contributes to the prior art or the part of the technical solution.
  • the computer software product is stored in a storage medium, including Several instructions are used to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention.
  • the aforementioned storage medium includes: U disk, mobile hard disk, Read-Only Memory (ROM, Read-Only Memory), Random Access Memory (RAM, Random Access Memory), magnetic disk or optical disk and other media that can store program codes .

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Abstract

本申请提供了一种天线设计方法、装置及电子设备，涉及天线技术领域。首先对天线单元进行单元仿真，确定匹配阻抗值；然后进行任意形式和规模的阵面组阵进行仿真，确定阵面中心单元所有扫描点的有源阻抗值；确定阵面的仿真参数是否满足迭代退出条件；当满足迭代退出条件时将阵面确定为目标组阵。若不满足，则将该有源阻抗值确定为下一次仿真的匹配阻抗值；调整天线单元的结构参数；将调整后的天线单元作为给定进行下一次仿真，直至阵面的仿真参数满足退出条件，本申请提供的方案以大扫描角度有源驻波为匹配标准，适当恶化法向有源驻波，进而提升宽角扫描性能；同时本申请提供的方案方法简单易实施，不引入任何额外硬件，降低设计成本。

Description

天线设计方法、装置及电子设备 技术领域
本发明涉及天线技术领域，具体而言，涉及一种天线设计方法、装置及电子设备。
背景技术
相控阵系统由于可以在较大的空域上，进行指定方向上的空间功率合成，可以快速变化波束指向和波束形状，在测控系统、卫星通信等多种应用场景下都能发挥巨大的作用。然而实际应用中，在不同方向上的功率合成能力，与偏离法向的角度值息息相关。因此，在很宽的角度范围内实现好的扫描性能是相控阵系统的一大难题，设计可以实现宽角扫描的天线阵面是迫在眉睫的。
为了提高大角度扫描增益，常用的措施主要为增加各种额外硬件。这种方式的实现方法有很多，包括在天线上方增加聚焦透镜，但是目前透镜无法实现二维扫描；增加各种EBG结构。同样的，EBG结构用于二维扫描的理论不成熟；紧耦合阵。紧耦合阵利在低频段已有一定的研究成果，但高频研究较少，同时紧耦合阵面有源驻波恶化严重，需要另外设计宽角匹配层才能正常工作，因此天线剖面较高；可重构技术。通过外部引入二极管开关，控制开关来更改天线不同的结构，使得天线工作在不同状态。这种方法需要二极管开关等控制切换，即引入额外的控制电路。
综上所述，当前用于提升天线宽角扫描性能的方法，都会不同程度的引入额外硬件，同时设计复杂，理论不完善，在较大规模的二维天线阵面起的实际作用很小。
发明内容
本发明的目的包括，例如，提供了一种天线设计方法、装置和电子设备，以改善现有的天线宽角扫描性能较差等问题。
本发明的实施例可以这样实现：
第一方面，本发明提供一种天线设计方法，所述天线设计方法包括：
对给定的天线单元进行单元仿真，确定所述天线单元的匹配阻抗值；
依据所述天线单元进行任意形式和规模的阵面组阵；
对所述阵面进行仿真，确定所述阵面中心单元所有扫描点的有源阻抗值；
依据所述有源阻抗值以及所述匹配阻抗值确定所述阵面的仿真参数是否满足迭代退出条件；
当所述阵面的仿真参数满足迭代退出条件时，将所述阵面确定为目标组阵。
在可选的实施方式中，所述依据所述有源阻抗值以及所述匹配阻抗值确定所述阵面的仿真参数是否满足迭代退出条件包括：
确定所述阵面的大扫描角度下的有源驻波是否小于设定值，当所述阵面大扫描角度下的有源驻波小于设定值时，确定所述阵面的仿真参数满足迭代退出条件；
或者，确定仿真迭代次数是否达到预设次数，当仿真迭代次数达到预设次数时，确定所述阵面的仿真参数满足迭代退出条件。
在可选的实施方式中，所述确定所述阵面的有源驻波是否小于设定值的步骤包括：
确定所述阵面中心单元大扫描角度下的有源阻抗值与所述匹配阻抗值的差值是否小于阻抗阈值，当所述大扫描角度下的有源阻抗值与所述匹配阻抗值的差值小于阻抗阈值时，确定所述阵面大扫描角度下的有源驻波小于设定值。
在可选的实施方式中，所述对所述阵面进行仿真，确定所述阵面中心单元的有源阻抗值包括：
当所述阵面为奇数阵列时，将同时位于中心行和中心列的单元的有源阻抗值确定为所述阵面中心单元的有源阻抗值。
在可选的实施方式中，所述对所述阵面进行仿真，确定所述阵面中心 单元的有源阻抗值包括：
当所述阵面为偶数阵列时，将所述阵面中心区域的四个天线单元中的任意一个的有源阻抗值确定为所述阵面中心单元的有源阻抗值。
在可选的实施方式中，当所述阵面的仿真参数不满足迭代退出条件时，所述方法还包括：
将所述阵面的大扫描角度下的有源阻抗值确定为下一次迭代仿真匹配阻抗值；
调整所述天线单元的结构参数以降低所述天线单元的有源驻波；
将调整后的天线单元作为所述给定天线单元进行下一次仿真，直至所述阵面的仿真参数满足所述迭代退出条件。
在可选的实施方式中，所述调整所述天线单元的结构参数以降低所述天线单元的有源驻波包括：
若所述阵面中心单元大扫描角度下的有源阻抗值大于所述匹配阻抗值，增大所述天线单元的尺寸以减小有源阻抗值与所述匹配阻抗值的差值，从而降低所述天线单元的有源驻波；
若所述阵面中心单元大扫描角度下的有源阻抗值小于所述匹配阻抗值，减小所述天线单元的尺寸以减小所述匹配阻抗值与有源阻抗值的差值，从而降低所述天线单元的有源驻波。
第二方面，本发明提供一种天线设计装置，所述天线设计装置用于执行如前述实施方式任意一项所述的天线设计方法，所述天线设计装置包括：
仿真模块，用于对给定的天线单元进行单元仿真，确定所述天线单元的匹配阻抗值；
所述仿真模块还用于依据所述天线单元进行任意形式和规模的阵面组阵；对所述阵面进行仿真，确定所述阵面中心单元所有扫描点的有源阻抗值；
处理模块，用于依据所述有源阻抗值与所述匹配阻抗值确定所述阵面的仿真参数是否满足迭代退出条件；
所述处理模块还用于当所述阵面的仿真参数满足迭代退出条件时，将 所述阵面确定为目标组阵。
在可选的实施方式中，所述处理模块用于确定所述阵面的大扫描角度下的有源驻波是否小于设定值，当所述阵面大扫描角度下的有源驻波小于设定值时，确定所述阵面的仿真参数满足迭代退出条件；或者，所述处理模块用于确定仿真迭代次数是否达到预设次数，当仿真迭代次数达到预设次数时，确定所述阵面的仿真参数满足迭代退出条件。
第三方面，本发明提供一种电子设备，所述电子设备包括处理器，所述处理器用于执行计算机可读程序指令，所述计算机可读程序指令被执行时实现如前述实施方式任意一项所述的天线设计方法的步骤。
相对于现有技术，本申请的有益效果如下：
本申请提供的方案通过对给定的天线单元进行单元仿真，确定所述天线单元的匹配阻抗值；然后依据所述天线单元进行任意形式和规模的阵面组阵；对所述阵面进行仿真，确定所述阵面中心单元所有扫描点的有源阻抗值；依据所述有源阻抗值以及所述匹配阻抗值确定所述阵面的仿真参数是否满足迭代退出条件；当所述阵面的仿真参数满足迭代退出条件时，将所述阵面确定为目标组阵。若不满足，则将将所述阵面的大扫描角度下的有源阻抗值确定为下一次迭代仿真匹配阻抗值；调整所述天线单元的结构参数以降低所述天线单元的有源驻波；将调整后的天线单元作为所述给定天线单元进行下一次仿真，直至所述阵面的仿真参数满足所述迭代退出条件。本申请提供的方案以大扫描角度有源驻波为匹配标准，适当恶化法向有源驻波，进而提升宽角扫描性能；同时本申请提供的方案方法简单易实施，不引入任何额外硬件，降低设计成本。
附图说明
为了更清楚地说明本发明实施例的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，应当理解，以下附图仅示出了本发明的某些实施例，因此不应被看作是对范围的限定，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他相关的附图。
图1为本申请实施例提供的天线设计方法的流程图；
图2为本申请实施例提供的一种天线单元示意图；
图3为本申请实施例提供的一种天线阵面的示意图；
图4为本申请实施例提供的另一种天线阵面的示意图；
图5为本申请实施例提供的天线设计装置的功能框图；
图6为本申请实施例提供的电子设备的示意图。
图标：300-天线设计装置；310-仿真模块；320-处理模块；410-处理器；411-存储器；412-总线；413-通信接口。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。通常在此处附图中描述和示出的本发明实施例的组件可以以各种不同的配置来布置和设计。
因此，以下对在附图中提供的本发明的实施例的详细描述并非旨在限制要求保护的本发明的范围，而是仅仅表示本发明的选定实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
应注意到：相似的标号和字母在下面的附图中表示类似项，因此，一旦某一项在一个附图中被定义，则在随后的附图中不需要对其进行进一步定义和解释。
在本发明的描述中，需要说明的是，若出现术语“上”、“下”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，或者是该发明产品使用时惯常摆放的方位或位置关系，仅是为了便于描述本发明和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本发明的限制。
此外，若出现术语“第一”、“第二”等仅用于区分描述，而不能理解为 指示或暗示相对重要性。
需要说明的是，在不冲突的情况下，本发明的实施例中的特征可以相互结合。
相控阵系统由于可以在较大的空域上，进行指定方向上的空间功率合成，可以快速变化波束指向和波束形状，在测控系统、卫星通信等多种应用场景下都能发挥巨大的作用。然而实际应用中，在不同方向上的功率合成能力，与偏离法向的角度值息息相关。因此，在很宽的角度范围内实现好的扫描性能是相控阵系统的一大难题，设计可以实现宽角扫描的天线阵面是迫在眉睫的。
为了提高大角度扫描增益，常用的措施主要为增加各种额外硬件。这种方式的实现方法有很多，包括在天线上方增加聚焦透镜，但是目前透镜无法实现二维扫描；增加各种EBG结构。同样的，EBG结构用于二维扫描的理论不成熟；紧耦合阵。紧耦合阵利在低频段已有一定的研究成果，但高频研究较少，同时紧耦合阵面有源驻波恶化严重，需要另外设计宽角匹配层才能正常工作，因此天线剖面较高；可重构技术。通过外部引入二极管开关，控制开关来更改天线不同的结构，使得天线工作在不同状态。这种方法需要二极管开关等控制切换，即引入额外的控制电路。
综上所述，当前用于提升天线宽角扫描性能的方法，都会不同程度的引入额外硬件，同时设计复杂，理论不完善，在较大规模的二维天线阵面起的实际作用很小。
为了改善上述的问题，本申请实施例提供了一种天线设计方法，请参考图1，图1示出了本申请实施例提供的天线设计方法的流程图。本申请实施例提供的天线设计方法包括：
S110：对给定的天线单元进行单元仿真，确定天线单元的匹配阻抗值。
若为初次仿真，则对于给定的任意形式的天线单元进行单元仿真。若非初次仿真，则对于给定的天线单元进行单元仿真。
例如，以同轴馈电的贴片天线形式为例，天线单元结构如图2所示，天线辐射体为金属贴片，印刷在介质上，通过穿过介质板的同轴内导体与金 属贴片接触馈电，介质背面为贴片的金属地板，为了避免同轴内导体短路，金属地板上与内导体同圆心的区域掏去了更大半径的圆环，一般的，地板上的掏空圆环需要与内导体满足一定的半径比，半径比值由外部同轴接口的阻抗确定，常用的是50欧姆或75欧姆。
于本实施例中，设定同轴接口阻抗为50欧姆，那么此时天线单元的匹配阻抗值即50欧姆，对天线单元进行初步仿真，得到天线的实际阻抗值。一般地，此时天线阻抗值与端口阻抗值往往一致。
步骤120：依据天线单元进行任意形式和规模的阵面组阵。
将上一步设计好的天线单元进行任意形式和规模的阵面组阵。在一些可能的实现方式中，对天线单元进行阵面组阵，可以是对天线单元进行三角布阵或者偶数规模布阵，还可以是对天线单元进行矩形布阵或者奇数规模布阵，本实施例对天线单元的组阵形式不做限定。
S130：对阵面进行仿真，确定阵面中心单元所有扫描点的有源阻抗值。
在可能的实现方式中，请参阅图3，当阵面为奇数阵列时，将同时位于中心行和中心列的单元的有源阻抗值确定为阵面中心单元，提取该阵面中心单元的所有扫描点的有源阻抗值。
在可能的实现方式中，请参阅图4，当阵面为偶数阵列时，阵面中心往往有四个单元，由于大阵中，这四个单元的阻抗值差别不大，因此可以随意选择一个单元作为下一步计算的中心单元。于本实施例中，将阵面中心区域的四个天线单元中的任意一个的有源阻抗值确定为阵面中心单元，提取该阵面中心单元的所有扫描点的有源阻抗值。
S140：依据有源阻抗值以及匹配阻抗值确定阵面的仿真参数是否满足迭代退出条件。
于本实施例中，为了提高天线的大角度扫描性能，需要减小天线的大扫描角度下的有源驻波。一般地，天线的有源驻波与有源阻抗有关，有源阻抗越接近设定值，则有源驻波越小。因此，于本实施例中，利用有源阻抗值与匹配阻抗值确定天线是否满足设计条件，若满足则退出迭代仿真；若不满足则进行下一次迭代仿真。
S150：当阵面的仿真参数满足迭代退出条件时，将阵面确定为目标组阵。
在可能的实现方式中，S140：依据有源阻抗值以及匹配阻抗值确定阵面的仿真参数是否满足迭代退出条件包括：
确定阵面的大扫描角度下的有源驻波是否小于设定值，或者确定仿真迭代次数是否达到预设次数。
当阵面大扫描角度下的有源驻波小于设定值时，确定阵面的仿真参数满足迭代退出条件；或者当仿真迭代次数达到预设次数时，确定阵面的仿真参数满足迭代退出条件。
其中，天线的有源驻波与有源阻抗有关，有源阻抗越接近设定值，则有源驻波越小。因此可以利用有源阻抗值以及匹配阻抗值确定阵面的有源驻波是否满足要求。在一些可能的实现方式中，确定阵面的有源驻波是否小于设定值的可以包括：
确定阵面中心单元大扫描角度下的有源阻抗值与匹配阻抗值的差值是否小于阻抗阈值，当大扫描角度下的有源阻抗值与匹配阻抗值的差值小于阻抗阈值时，确定阵面大扫描角度下的有源驻波小于设定值。
可以理解地，若天线大扫描角度下的有源阻抗值越接近设定的匹配阻抗值，则天线大扫描角度下的有源驻波越小。若天线大扫描角度下的有源阻抗值与设定的匹配阻抗值差异越大，则天线大扫描角度下的有源驻波越大。因此，当天线大扫描角度下的有源阻抗值与匹配阻抗值的差值小于阻抗阈值时，确定阵面大扫描角度下的有源驻波小于设定值。需要说明的是，有源阻抗值与匹配阻抗值的差值是指有源阻抗值与匹配阻抗值中较大者与较小者之间的差值，其可能是有源阻抗值与匹配阻抗值的差值，亦可能是匹配阻抗值与有源阻抗值的差值。
一般地，端口驻波小于2可以认为天线匹配良好，这里即设置设定值为2，也有可能在程序迭代很多次后都不能满足有源驻波小于2的情况，为了节省时间，加入迭代次数判断，判断迭代次数是否大于设定值，设定值越大仿真时间越长，越有可能接近需要的驻波值，在一种可能的实现方式中，该 迭代预设次数为200。当仿真迭代次数达到预设次数时，退出迭代。
在可能的实现方式中，请继续参阅图1，当阵面的仿真参数不满足迭代退出条件时，需要对天线进行优化，天线设计方法还包括：
S160-1：将阵面的大扫描角度下的有源阻抗值确定为下一次迭代仿真匹配阻抗值。
S160-2：调整天线单元的结构参数以降低天线单元的有源驻波。
若阵面中心单元大扫描角度下的有源阻抗值大于匹配阻抗值，增大天线单元的尺寸以减小有源阻抗值与匹配阻抗值的差值，从而降低天线单元的有源驻波；
若阵面中心单元大扫描角度下的有源阻抗值小于匹配阻抗值，减小天线单元的尺寸以减小匹配阻抗值与有源阻抗值的差值，从而降低天线单元的有源驻波。
S160-3：将调整后的天线单元作为给定天线单元进行下一次仿真，直至阵面的仿真参数满足迭代退出条件。
一般而言，进行三次迭代后，天线阵面可以基本达到效果，因此不会占用太多仿真时间。
下面以图3所示的9x9矩形排布阵面为例。对本实施例进行说明，假定对阵面仿真得到中心单元的法向(0°扫描角)与大角度扫描角(假定为60°)的有源阻抗值Z，Z为复数，例如，假定仿真结果分别为52.4-10.17j与23.5+29.47j。可以看出，在法向时，由于有源阻抗接近之前端口设定的50欧姆，因此法向有源驻波为1.2，而大角度阻抗与50欧姆偏差大，因此有源驻波为2.9。
此时判断需求的大扫描角度下的有源驻波是否小于设定值，一般的，端口驻波小于2可以认为天线匹配良好，这里即设置设定值为2。也有可能有源驻波小于2的情况在程序迭代很多次后都不能满足。为了节省时间，加入迭代次数判断，判断迭代次数是否大于设定值，设定值越大仿真时间越长，越有可能接近需要的驻波值，这里假设设定值为200。满足以上任一判定时，则结束仿真，输出天线阵面。当不满足以上判定时，将得到的大扫描角度下 的有源阻抗值，作为下一次仿真的天线单元的匹配阻抗值。例如，于本实施例中，60°的有源阻抗为23.5+29.47j，因此下一次天线单元的阻抗值需要设计为23.5+29.47j。由于端口阻抗始终为外部同轴端口的阻抗，为了使得天线阻抗值为设定值，需要对天线结构进行调整，选择的结构参数应当只对驻波影响大，而不影响天线其他性能，在一种可能的实现方式中，选择贴片的尺寸作为调整的结构参数。由于每一次仿真后可能有源驻波值发生变化，因此调整后继续重复以上步骤直至达到退出条件。最终输出满足宽角扫描性能的阵面。
为了执行上述实施例及各个可能的实施方式中的相应步骤，下面给出一种天线设计装置的实现方式，请参阅图5，图5为本发明较佳实施例提供的一种天线设计装置300。需要说明的是，本实施例所提供的天线设计装置300，其基本原理及产生的技术效果和上述实施例提供的天线设计方法基本相同，为简要描述，本实施例部分未提及之处，可参考上述的实施例中相应内容。本实施例提供的天线设计装置300包括仿真模块310及处理模块320。
其中，该仿真模块310，用于对给定的天线单元进行单元仿真，确定天线单元的匹配阻抗值。
可以理解地，在一些可能的实现方式中，该仿真模块310可以用于执行上述实施方式中的S110，以实现相应的技术效果。
仿真模块310还用于依据天线单元进行任意形式和规模的阵面组阵；对阵面进行仿真，确定阵面中心单元所有扫描点的有源阻抗值。
可以理解地，在一些可能的实现方式中，该仿真模块310可以用于执行上述实施方式中的S120～S130，以实现相应的技术效果。
处理模块320，用于依据有源阻抗值与匹配阻抗值确定阵面的仿真参数是否满足迭代退出条件。
可以理解地，在一些可能的实现方式中，该处理模块320可以用于执行上述实施方式中的S140，以实现相应的技术效果。
处理模块320还用于当阵面的仿真参数满足迭代退出条件时，将阵面确定为目标组阵。
可以理解地，在一些可能的实现方式中，该处理模块320可以用于执行上述实施方式中的S150，以实现相应的技术效果。
在可能的实现方式中，该处理模块320用于确定阵面的大扫描角度下的有源驻波是否小于设定值，或者确定仿真迭代次数是否达到预设次数。
当阵面大扫描角度下的有源驻波小于设定值时，确定阵面的仿真参数满足迭代退出条件；或者当仿真迭代次数达到预设次数时，确定阵面的仿真参数满足迭代退出条件。
在可能的实现方式中，当阵面的仿真参数不满足迭代退出条件时，该处理模块320还用于将阵面的大扫描角度下的有源阻抗值确定为下一次迭代仿真匹配阻抗值，调整天线单元的结构参数以降低天线单元的有源驻波，将调整后的天线单元作为给定天线单元进行下一次仿真，直至阵面的仿真参数满足迭代退出条件。
可以理解地，在一些可能的实现方式中，该处理模块320可以用于执行上述实施方式中的S160-1～S160-3，以实现相应的技术效果。
本申请实施例还提供一种电子设备，请参照图6，图6示出了本实施例提供的电子设备的结构示意图。电子设备包括处理器410、存储器411、总线412。处理器410、存储器411通过总线412连接，处理器410用于执行存储器411中存储的可执行模块，例如计算机可读程序指令，当该计算机可读程序指令被处理器410执行时实现上述实施例提供的天线设计方法的步骤。
处理器410可以是一种集成电路芯片，具有信号的处理能力。在实现过程中，本实施例提供的天线设计方法的各步骤可以通过处理器410中的硬件的集成逻辑电路或者软件形式的指令完成。上述的处理器410可以是通用处理器，包括中央处理器(Central Processing Unit，简称CPU)、网络处理器(Network Processor，简称NP)等；还可以是数字信号处理器(Digital Signal Processor，简称DSP)、专用集成电路(Application Specific Integrated Circuit，简称ASIC)、现场可编程门阵列(Field－Programmable Gate Array，简称FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。
存储器411可能包含高速随机存取存储器(RAM：Random Access Memory)，也可能还包括非不稳定的存储器(non-volatile memory)，例如至少一个磁盘存储器。
总线412可以是ISA(Industry Standard Architecture)总线、PCI(Peripheral Component Interconnect)总线或EISA(Extended Industry Standard Architecture)总线等。图6中仅用一个双向箭头表示，但并不表示仅有一根总线412或一种类型的总线412。
存储器411用于存储程序，例如天线设计装置对应的程序指令。天线设计装置包括至少一个可以软件或固件(firmware)的形式存储于存储器411中或固化在电子设备的操作系统(operating system，OS)中的软件功能模块。处理器410在接收到执行指令后，执行所述程序以实现天线设计方法的步骤。
可能地，本申请实施例提供的电子设备还包括通信接口413。通信接口413通过总线与处理器410连接。该通信接口413可以用于向外部设备输出满足设计参数的天线阵面。
应当理解的是，图6所示的结构仅为电子设备的部分的结构示意图，电子设备还可包括比图6中所示更多或者更少的组件，或者具有与图6所示不同的配置，图6中所示的各组件可以采用硬件、软件或其组合实现。
综上所述，本申请提供了一种天线设计方法、装置及电子设备，首先通过对给定的天线单元进行单元仿真，确定天线单元的匹配阻抗值；然后依据天线单元进行任意形式和规模的阵面组阵；对阵面进行仿真，确定阵面中心单元所有扫描点的有源阻抗值；依据有源阻抗值以及匹配阻抗值确定阵面的仿真参数是否满足迭代退出条件；当阵面的仿真参数满足迭代退出条件时，将阵面确定为目标组阵。若不满足，则将将阵面的大扫描角度下的有源阻抗值确定为下一次迭代仿真匹配阻抗值；调整天线单元的结构参数以降低天线单元的有源驻波；将调整后的天线单元作为给定天线单元进行下一次仿真，直至阵面的仿真参数满足迭代退出条件。本申请提供的方案以大扫描角度有源驻波为匹配标准，适当恶化法向有源驻波，进而提升宽角扫描性能；同时本申请提供的方案方法简单易实施，不引入任何额外硬件，降低设计成 本。
在本申请所提供的几个实施例中，应该理解到，所揭露的装置和方法，也可以通过其它的方式实现。以上所描述的装置实施例仅仅是示意性的，例如，附图中的流程图和框图显示了根据本发明的多个实施例的装置、方法和计算机程序产品的可能实现的体系架构、功能和操作。在这点上，流程图或框图中的每个方框可以代表一个模块、程序段或代码的一部分，所述模块、程序段或代码的一部分包含一个或多个用于实现规定的逻辑功能的可执行指令。也应当注意，在有些作为替换的实现方式中，方框中所标注的功能也可以以不同于附图中所标注的顺序发生。例如，两个连续的方框实际上可以基本并行地执行，它们有时也可以按相反的顺序执行，这依所涉及的功能而定。也要注意的是，框图和/或流程图中的每个方框、以及框图和/或流程图中的方框的组合，可以用执行规定的功能或动作的专用的基于硬件的系统来实现，或者可以用专用硬件与计算机指令的组合来实现。
另外，在本发明各个实施例中的各功能模块可以集成在一起形成一个独立的部分，也可以是各个模块单独存在，也可以两个或两个以上模块集成形成一个独立的部分。
所述功能如果以软件功能模块的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本发明的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本发明各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
虽然本发明披露如上，但本发明并非限定于此。任何本领域技术人员，在不脱离本发明的精神和范围内，均可作各种更动与修改，因此本发明的保护范围应当以权利要求所限定的范围为准。

Claims (10)

  1. 一种天线设计方法，其特征在于，所述天线设计方法包括：
    对给定的天线单元进行单元仿真，确定所述天线单元的匹配阻抗值；
    依据所述天线单元进行任意形式和规模的阵面组阵；
    对所述阵面进行仿真，确定所述阵面的中心单元所有扫描点的有源阻抗值；
    依据所述有源阻抗值以及所述匹配阻抗值确定所述阵面的仿真参数是否满足迭代退出条件；
    当所述阵面的仿真参数满足迭代退出条件时，将所述阵面确定为目标组阵。
  2. 根据权利要求1所述的天线设计方法，其特征在于，所述依据所述有源阻抗值以及所述匹配阻抗值确定所述阵面的仿真参数是否满足迭代退出条件包括：
    确定所述阵面的大扫描角度下的有源驻波是否小于设定值，当所述阵面大扫描角度下的有源驻波小于设定值时，确定所述阵面的仿真参数满足迭代退出条件；
    或者，确定仿真迭代次数是否达到预设次数，当仿真迭代次数达到预设次数时，确定所述阵面的仿真参数满足迭代退出条件。
  3. 根据权利要求2所述的方法，其特征在于，所述确定所述阵面的有源驻波是否小于设定值的步骤包括：
    确定所述阵面中心单元大扫描角度下的有源阻抗值与所述匹配阻抗值的差值是否小于阻抗阈值，当所述大扫描角度下的有源阻抗值与所述匹配阻抗值的差值小于阻抗阈值时，确定所述阵面大扫描角度下的有源驻波小于设 定值。
  4. 根据权利要求1所述的天线设计方法，其特征在于，所述对所述阵面进行仿真，确定所述阵面中心单元的有源阻抗值包括：
    当所述阵面为奇数阵列时，将同时位于中心行和中心列的单元的有源阻抗值确定为所述阵面中心单元的有源阻抗值。
  5. 根据权利要求1所述的天线设计方法，其特征在于，所述对所述阵面进行仿真，确定所述阵面中心单元的有源阻抗值包括：
    当所述阵面为偶数阵列时，将所述阵面中心区域的四个天线单元中的任意一个的有源阻抗值确定为所述阵面中心单元的有源阻抗值。
  6. 根据权利要求2所述的天线设计方法，其特征在于，当所述阵面的仿真参数不满足迭代退出条件时，所述方法还包括：
    将所述阵面的大扫描角度下的有源阻抗值确定为下一次迭代仿真匹配阻抗值；
    调整所述天线单元的结构参数以降低所述天线单元的有源驻波；
    将调整后的天线单元作为所述给定的天线单元进行下一次仿真，直至所述阵面的仿真参数满足所述迭代退出条件。
  7. 根据权利要求6所述的天线设计方法，其特征在于，所述调整所述天线单元的结构参数以降低所述天线单元的有源驻波包括：
    若所述阵面中心单元大扫描角度下的有源阻抗值大于所述匹配阻抗值，增大所述天线单元的尺寸以减小有源阻抗值与所述匹配阻抗值的差值，从而降低所述天线单元的有源驻波；
    若所述阵面中心单元大扫描角度下的有源阻抗值小于所述匹配阻抗值，减小所述天线单元的尺寸以减小所述匹配阻抗值与有源阻抗值的差值，从而降低所述天线单元的有源驻波。
  8. 一种天线设计装置，其特征在于，所述天线设计装置用于执行如权利要求1～7任意一项所述的天线设计方法，所述天线设计装置包括：
    仿真模块，用于对给定的天线单元进行单元仿真，确定所述天线单元的匹配阻抗值；
    所述仿真模块还用于依据所述天线单元进行任意形式和规模的阵面组阵；对所述阵面进行仿真，确定所述阵面中心单元所有扫描点的有源阻抗值；
    处理模块，用于依据所述有源阻抗值与所述匹配阻抗值确定所述阵面的仿真参数是否满足迭代退出条件；
    所述处理模块还用于当所述阵面的仿真参数满足迭代退出条件时，将所述阵面确定为目标组阵。
  9. 根据权利要求8所述的天线设计装置，其特征在于，所述处理模块用于确定所述阵面的大扫描角度下的有源驻波是否小于设定值，当所述阵面大扫描角度下的有源驻波小于设定值时，确定所述阵面的仿真参数满足迭代退出条件；或者，所述处理模块用于确定仿真迭代次数是否达到预设次数，当仿真迭代次数达到预设次数时，确定所述阵面的仿真参数满足迭代退出条件。
  10. 一种电子设备，其特征在于，所述电子设备包括处理器，所述处理器用于执行计算机可读程序指令，所述计算机可读程序指令被执行时实现如权利要求1～7任意一项所述的天线设计方法的步骤。
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