WO2022173470A1 - Mimo with scalable cascadable autonomous spatial filters for full-fov multi-blocker/signal management - Google Patents
Mimo with scalable cascadable autonomous spatial filters for full-fov multi-blocker/signal management Download PDFInfo
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- H—ELECTRICITY
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- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
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- H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
- H04B7/08—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station
- H04B7/0837—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using pre-detection combining
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Definitions
- the various embodiments of the present disclosure relate generally to wireless communication systems, and more particularly to multiple input multiple output (MIMO) receiver front-end architectures that are scalable and cascadable with autonomous spatial filters enabling blocker and signal management in wireless communication systems.
- MIMO multiple input multiple output
- front-end spectral filtering using mixers and filters can suppress out- of-band blockers but not in-band spatial blockers.
- Most existing front-end spatial filters use analog beamformers as spatial notches.
- these approaches require the signal and blocker knowledge a priori for open-loop spatial notching, or they employ a digital backend for on-the-fly coefficient computation for the analog beamformers, which limits their dynamic use with unknown and fast-changing signals/blockers.
- Performance challenges still exist in receiver designs in terms of spatial selectivity, scalability, complex modulation, dynamic rage, blocker rejection, and speed.
- the disclosed technology relates to receiver frontend systems and methods that may be utilized to address complex electromagnetic environments and dynamic, low-latency, and high-reliability applications.
- a multiple input multiple output (MIMO) scalable cascadable receiver front-end system includes two or more frontend inputs configured to receive input signals, each of the two or more frontend inputs in communication with corresponding two or more channels.
- the system includes an autonomous beamformer in communication with each of the two or more channels, the autonomous beamformer includes a phase detector configured to detect a phase of the input signals.
- Each of the two or more channels of the system include a phase shifter in communication with and controlled by the autonomous beamformer, wherein the autonomous beamformer is configured to output a control voltage to the phase shifter to rotate a phase of a corresponding channel’s input signal to a reference phase according to a detected phase of a strongest signal component in the channel’s input signal; and an auxiliary path in communication with an output of the phase shifter.
- the system includes a summing block in communication with each of the auxiliary paths of the two or more channels, the summing block configured to output a sum of each of the phase-rotated input signals and to output the sum to a backend signal/blocker estimator; a feedforward signal selector in communication with each output of the phase shifter and configured to receive selection control signals from the backend signal/blocker estimator to pass or reject the strongest signal component; and two or more main path channel outputs corresponding to the two or more channels.
- a method includes receiving input signals at two or more frontend inputs in communication with corresponding two or more channels of a multiple input multiple output (MIMO) scalable cascadable receiver system, wherein each of the two or more channels comprise: a phase shifter in communication with, and controlled by, an autonomous beamformer; and an auxiliary path in communication with an output of the phase shifter.
- MIMO multiple input multiple output
- the method further includes detecting, with a phase detector of the autonomous beamformer, a phase of the input signals; outputting, by the autonomous beamformer, a control voltage to the phase shifter to rotate a phase of a corresponding channel’s input signal to a reference phase according to a strongest signal component in the channel’s input signal; summing each of the phase-rotated input signals using a summing block in communication with each of the auxiliary paths of the two or more channels; outputting a sum from the summing block to a backend signal/blocker estimator; passing or rejecting the strongest signal component using a feedforward signal selector in communication with each output of the phase shifters, the feedforward signal selector configured to receive selection control signals from the backend signal/blocker estimator to combine with or subtract from each output of the phase shifters, a scaled strongest signal component; and outputting, at two or more main path channel outputs, corresponding combined or subtracted signals from the feedforward signal selector.
- FIG. 1 depicts a system architecture of an N-input-N-output MIMO RX with scalable cascadable array-based high-order ASFs for instinctual full-FoV signal/blocker management, in accordance with certain exemplary implementations of the disclosed technology.
- FIG. 2 depicts a 1 x N N-input-N-Output MIMO RX that can include multiple RX array chips arranged along a zero-phase symmetric reference plane, according to an exemplary implementation of the disclosed technology.
- FIG. 3 A is a phase domain block diagram of a phase detector (PD) arrangement in a non-linear feedback loop 300, in accordance with certain exemplary implementations of the disclosed technology.
- PD phase detector
- FIG. 4 is an illustration of a four-element MIMO RX array-based high-order ASF, according to an exemplary implementation of the disclosed technology.
- FIG. 5 is an example block diagram of an N-input-N-output MIMO corresponding to the feedback section of the MIMO RX array-based high-order ASF, as illustrated in FIG. 4, and which may utilize the phase detector (PD) arrangement in a non-linear feedback loop as illustrated in FIG. 3A, and in accordance with certain exemplary implementations of the disclosed technology.
- PD phase detector
- FIG. 6A illustrates an example phase-to-voltage conversion Gi circuit diagram for use with the autonomous beamformer, in accordance with certain exemplary implementations of the disclosed technology.
- FIG. 6B illustrates an example transformer-based low-loss differential 90-degree coupler layout for use with the autonomous beamformer, in accordance with certain exemplary implementations of the disclosed technology.
- FIG. 6C illustrates example gain stages for use with the autonomous beamformer, in accordance with a certain exemplary implementation of the disclosed technology.
- FIG. 7 is an example schematic of a wideband IF I/Q voltage-controlled continuous phase shifter (PS) 700 that may provide voltage-to-phase conversion, in accordance with certain exemplary implementations of the disclosed technology.
- PS continuous phase shifter
- FIG. 8 is a table listing parameters and performance of the disclosed technology (This Work) relative to related technologies.
- FIG. 9 is another table listing parameters and performance of the disclosed technology (This Work) relative to related technologies.
- FIG. 10 is a flow diagram of a method, according to an exemplary implementation of the disclosed technology.
- the disclosed technology includes a wideband mm-wave multiple-input-multiple- output (MIMO) receiver (RX) array and control thereof.
- MIMO multiple-input-multiple- output
- Certain implementations of the disclosed technology utilize N-input-N-output frontend autonomous spatial filters (ASFs) that can autonomously reject multiple wideband modulated in-band blockers without requiring prior knowledge of the blocker angle-of-arrival, frequency, or modulation scheme.
- ASFs autonomous spatial filters
- the disclosed technology may be scalable and cascadable.
- Certain implementations of the disclosed technology may autonomously support N- wideband modulated blocker suppression and desired signal beamforming simultaneously without any digital beamforming aid.
- the N-input-N-output MIMO RX array may cover an extremely broad frequency range (e.g., 27-41GHz) over the full field-of-view (FoV) to address various unmet challenges in low-latency MIMO systems such as rapidly growing deployment of mm- wave links in commercial (e.g., 5G/automotive) and defense (e.g., fast-moving drones).
- the disclosed technology may further enable receiving signals with high-data-rate (multi-Gb/s) and various modulation schemes (e.g., 64QAM, 256QAM) over full FoV with response times on the order of microseconds.
- the disclosed MIMO system may utilize the array-based high- order ASFs to provide sharpened spatial selectivity, which may enable multi -beam high- capacity massive MIMO.
- the disclosed MIMO RX array may enable the following technical advantages: (1) autonomous rejection of multiple unknown blockers and/or beamforming on unknown desired signals; (2) rejection of co-channel blockers and enhancement of the signal-to-interference-plus-noise ratio (SINR) both at multi-Gb/s 64- /256-QAM modulations; and (3) ultrafast response time (e.g., less than 1.75 ps) per ASF stage.
- SINR signal-to-interference-plus-noise ratio
- the systems and methods disclosed herein may utilize closed-loop frontend beamforming to achieve instinctual (autonomous operation for sensing, controlling, processing signals with ultralow-latency and no backend digital signal processing assist) management of multiblockers/signals.
- the ASFs may be utilized to realize frontend blocker suppression and may substantially relax the dynamic range requirement of downstream analog-to-digital converters (ADCs) in digital arrays.
- cascading multiple ASFs, as disclosed herein may be utilized to sequentially suppress multiple blockers and achieve iterative source localization.
- Certain exemplary implementations of the disclosed technology may utilize frontend hardware with digital signal processing (DSP) for autonomous cancellation of multiple co-channel wideband blockers, while a wideband desired signal can be received with a high SINR.
- DSP digital signal processing
- FIG. 1 depicts a system architecture of an N-input-N-output MIMO RX system 100 with scalable cascadable array -based high-order ASFs for instinctual full-FoV signal/blocker management, in accordance with certain exemplary implementations of the disclosed technology.
- the system 100 can include an RX frontend 102 and multiple MIMO ASF stages 104 for processing N inputs and providing N outputs (for a backend 106, for example).
- the RX frontend 102 can include mm-wave broadband low-noise amplifiers (LNAs) 108 and passive mixers 110 for wideband and high-linearity spectral filtering.
- LNAs low-noise amplifiers
- the RX frontend 102 may down-convert the N inputs and pass the down-converted signals to a first stage scalable array -based high-order MIMO ASF 104, which can be configured as a “smart” frontend spatial filter bank to process/manage multiple signals/blockers and assist the downstream digital beamforming.
- the system 100 can enhance spatial selectivity via high-order scalability.
- multiple ASF stages 104 can be cascaded to perform frontend-based “iterative source localization” computation on multiple blockers/signals sequentially.
- FIG. 2 depicts a 1 x N N-input-N-Output MIMO RX architecture 200 that can include multiple RX array chips arranged along a zero-phase symmetric reference plane, according to an exemplary implementation of the disclosed technology.
- This architecture 200 can provide progressive phase shift symmetry and scalability to a large MIMO array by arranging multiple RX array chips 202 along a zero-phase symmetric reference plane 204.
- a 27-41 -GHz four- element broadband MIMO array chip implemented in a 45-nm CMOS SOI was fabricated to confirm the proof-of-concept for the disclosed technology.
- FIG. 3 A is a phase domain block diagram of a phase detector (PD) arrangement in a non-linear feedback loop 300 that may be utilized in the disclosed technology, and as discussed in M. -Y. Huang, T. Chi, F. Wang and H. Wang, "An All-Passive Negative Feedback Network for Broadband and Wide Field-of-View Self-Steering Beam-Forming With Zero DC Power Consumption," in IEEE Journal of Solid-State Circuits, vol. 52, no. 5, pp. 1260-1273, May 2017, doi: 10.1109/JSSC.2016.2641947, which is incorporated herein by reference as if presented in full.
- PD phase detector
- CG phase-to-voltage conversion gain
- Certain implementations of the non-linear feedback loop 300 and phase detector may be utilized in the autonomous beamforming system, as will be discussed further below.
- FIG. 4 is an illustration of a four-element MIMO RX array-based high-order ASF 400, according to an exemplary implementation of the disclosed technology.
- the input progressive phase shift f difference between path 1 402 and path 4 404 may be three times that of that for path 2 406 and path 3 408 (the two inner paths).
- a symmetric zero reference may be established between path and path 3 408.
- the input progressive phase shifts for path 1 402, path 2 406, path 3 408, and path 4404 are +30i n /2, +0i n /2, -0i n /2, and -30i n /2, respectively.
- the ASF 400 may include phase shifters (PS) 410, a closed-loop autonomous beamformer 412, auxiliary path 414 for array -based signal/blocker extraction, and feedforward subtraction (combining) 416 for spatial -notching (beamforming).
- PS phase shifters
- auxiliary path 414 for array -based signal/blocker extraction
- feedforward subtraction (combining) 416 for spatial -notching (beamforming).
- the operation of the ASF 400 may be explained with the following example: assume a simple scenario with a received signal 418 at an incident angle Q.
- CG phase-to-voltage conversion gain
- the differential output DC voltage may be fed to the PS 410 to apply phase shifts, resulting in a voltage-to-phase CG G2.
- the PD and PS 410 may form negative feedback in the phase domain with a phase-to-phase loop gain of G1G2.
- the output residual phase difference D0 O ut can be expressed as:
- the large loop gain G1G2 may be utilized to directly minimize the resulting phase difference D0 O ut of the two paths and autonomously align their phases, similar to a DLL, but now operating as a beamformer (BF).
- the DLL-like autonomous BF does not require resonators or multipliers, and can support broad carrier frequencies.
- a large phase domain loop gain G1G2 may enable a full FoV coverage and can improve the robustness against PD phase/amplitude variations.
- the autonomous BF 412 can be extended to a large array size.
- the input progressive phase shift of the outer two paths (Main path 1 402 and Main path 4 404) is three times that of the inner two paths.
- progressively scaled feedback PS control voltages can be applied to the four paths (path 1 402, path 2 406, path 3 408, and path 4 404) as -3xV ctri , - 1 x V c tri , + lxVc tri , and +3xV ctri , respectively, to compensate for the corresponding phase differences. Further scaling can be performed similarly.
- the input progressive phase differences for all the channels are +/-0i n /2, +/-30 /2, . ,+/-(N-l )0 m /2 in an N-element uniform RX array, with corresponding feedback PS control voltages +/-V ctri , +/-3 V ctri , and +/- (N-l)Vctrl.
- the power-aware PD of the autonomous beamformer 412 can identify the strongest tone and may perform autonomous beamforming on it. In certain exemplary implementations, as long as two tones exhibit a power difference larger than 1 dB, the autonomous BF can respond to the stronger tone.
- the signal path in each channel may then be split into two, and the auxiliary paths 414 may be utilized to sum 415 the N channels together.
- This essentially performs beamforming and extraction on the strongest tone, while the other tones are suppressed by the spatial filtering since they are not in phase among the N-channels. Adding more channels in the ASF 400 may be used to enhance the selectivity of this spatial extraction on the strongest tone and may maximize suppression of the other tones.
- the extracted tone can be digitized, and one-step demodulated at the baseband so that the RX system can decide whether it is a blocker or desired signal. Since this extraction is already the strongest tone and other weaker tones are further suppressed by the auxiliary path 414 beamforming, the digitization may utilize an analog to digital converter (ADC) with a relaxed dynamic range. Moreover, this one-step demodulation for blocker/signal identification may utilize negligible backend computation, in contrast with running a fast Fourier transform (FFT) on the entire array in conventional digital beamforming.
- ADC analog to digital converter
- FFT fast Fourier transform
- blocker/signal classification disclosed herein utilizes a one-step DSP demodulation, as this is true for most other RX systems, the disclosed MIMO technology does not require DSP for beam scanning, localization, and computation, therefore drastically accelerating the signal beamforming/blocker rejection, which also does not require prior knowledge for an angle of arrival (AoA), frequency, and modulation.
- AoA angle of arrival
- the strongest tone may be feedforwarded to the N-channel Main paths 422.
- the combiner 416 “+” may be selected to perform constructive beamforming.
- subtraction may be chosen to form a spatial notch and suppress this strongest tone.
- other tones may also be present in the auxiliary path 414, they are largely attenuated by the spatial selectivity of the beamforming before the feedforward operation, so that their presence in the Main paths 422 will not be affected significantly.
- the first null beamwidth angle can be approximated as
- the beamforming in the auxiliary paths 414 achieves a higher-order array factor with narrower beamwidth for a sharper spatial selection. Feedforward subtraction of this auxiliary path beamformed signal in the main paths then realizes a spatial notch. The null beamwidth of the auxiliary path 414 beamforming becomes the notch beamwidth after feedforward subtraction.
- a DSP algorithm “Iterative Source Localization” may be utilized in backend computation for additional digital beamforming, for example, to handle multiple received tones with large blockers.
- This process may include performing an array-scaled FFT to identify the spatial signature of the strongest tone, whose sidelobes may shadow other weaker signals. Next, this strongest tone may be spatially filtered, and another FFT may be performed on the remaining signals. This process may be repeated to resolve all the received signals.
- the RX MIMO technology disclosed herein may realize the Iterative Source Localization DSP algorithm at the RF/analog layer in an autonomous fashion.
- the first ASF stage in the cascade may autonomously track and spatially filter out the first strongest tone.
- the feedback PS 420 control voltages may generate progressive phase shifts for the N channels on all the signals. Therefore, after notching the strongest tone, the remaining tones still preserve their progressive phase relationships among the N-channels.
- the cascaded ASFs 400 can be configured to maintain the N-input- N-output configuration without sacrificing the array order or the array field-of-view FoV (except for the spatial notches). Therefore, the second ASF stage in a cascade can again operate on the remaining signals and similarly notch out the second strongest tone.
- Cascaded ASFs operation can be explained as follows: essentially, the first-stage ASF rotates the entire MIMO array and aligns its boresight toward the strongest received tone, which is then spatially notched by the first ASF feedforward subtraction. Next, the second stage ASF aligns the entire MIMO array toward the second strongest tone and then notches it. This process is iterated through M ASF stages so that the first M strongest tones are autonomously identified and removed from the received signals.
- the array size (N-input — N-output) and its FoV may be preserved in the cascaded ASF configuration, which can be an ideal frontend spatial filter approach in a digital beamforming array. This also enables relaxing the dynamic ranges of the downstream circuits and ADCs and allows the digital beamforming DSP backend to scan through the remaining FoV for signal identification with no loss of spatial information.
- the disclosed ASF with the power-aware PD acts only on the RF power and it does not require prior angle-of-arrival or frequency or modulation information or external beamforming amplitude/phase controls.
- implementations of the disclosed technology can handle unknown blockers/signals without DSP backend beam computations.
- the disclosed technology further enables additional technical advancements including multiple ASF spatial notches that can autonomously track multiple blockers via their closed-loop operation, ensuring low response time and latency in complex electromagnetic environments and dynamic mm- wave applications.
- cascading multiple ASFs can provide reconfigurable modes for different MIMO scenarios.
- three ASFs can be cascaded and all three ASFs may use subtractors to create three independent spatial notches to autonomously and sequentially suppress three unknown in-band wideband blockers.
- the RX can suppress the strong one twice by the first- and second-stage ASFs to create a deep spatial notch and reject the other medium- power unknown blocker by the third-stage ASF.
- the first two ASFs may use subtractors, and the third ASF may use a combiner.
- the first two ASFs may create two array-based spatial notches to autonomously suppress two unknown in-band blockers, and the third ASF enhances one desired signal for high SINR by autonomous beamforming.
- the power-aware PD as disclosed herein, may ensure that the first two ASFs only spatially notch the two strong blockers instead of the desired signal.
- Certain exemplary implementations of the disclosed technology may preserve the MIMO FoV and size (N-input — N-output) through its ASF operations and can be readily scaled up with a large number of array elements to enhance the spatial selectivity of ASF notches. Certain exemplary implementations of the disclosed technology may enable ideal “intelligent” frontend spatial filters to assist digital beamforming systems by reducing the required dynamic range of the downstream electronics.
- FIG. 5 is an example block diagram of an N-input-N-output MIMO 500 that may be utilized in the feedback section 420 of the MIMO RX array-based high-order ASF 400, as illustrated in FIG. 4, and which may utilize the phase detector (PD) arrangement 300 in a non linear feedback loop as illustrated in FIG. 3A, and in accordance with certain exemplary implementations of the disclosed technology.
- PD phase detector
- the phase-to-voltage conversion Gi circuit 600 shown in FIG. 6A can include a transformer- based low-loss differential 90-degree coupler, IF VGAs, multistage Dickson voltage rectifiers, and feedback DC voltage generators.
- the differential input (In) and/or isolation (Iso) ports of the 90-degree coupler may be used to sense phase- shifts in the adjacent inner two paths, and the outputs from the differential through (Thru) and coupled (Cpl) ports may be followed by the IF VGAs and the multistage Dickson voltage rectifier.
- the multistage Dickson voltage rectifiers may be chosen to have larger output DC dynamic range to detect relatively small signals from blockers since the DC outputs are not clipped out by any fixed VDD.
- Further details of alternative implementations of the phase-to-voltage conversion Gi circuit 600 are discussed in the following publications, which are incorporated by reference herein as if presented in full: S. Lee, M. Huang, Y. Youn, and H. Wang, “A 15 - 55 GHz low-loss Ultra-Compact Folded Inductor-based Multi-section Wilkinson Power Divider for Multi-band 5G applications,” IEEE International Microwave Symposium (IMS), June 2019; M. Huang and H.
- the phase-to- voltage conversion Gi circuit 600 can include a common-mode feedback (CMFB) circuit to control feedback voltage reference points and DC voltage multiplier for progressive voltage generations in outer paths.
- CMFB common-mode feedback
- the overall loop gain may be boosted to achieve full field-of-view coverage without any significant degradations.
- output differential control voltages V c tri of the rectifiers may be fed into the wideband continuous-tuning EQ voltage-controlled IF PS to generate the compensation phase feedback.
- the large-signal behavior model of the phase-to-voltage converter may then be analyzed.
- Vc tri VDCI - V DC2 — 2ot 2 bA 2 sin Df oM .
- phase-to-voltage CG G1 may be calculated as:
- the conversion efficiency b may also be maximized by loading a high impedance, i.e., the gates of the CMFB dc amplifiers, which may enhance RF power to dc voltage conversion.
- FIG. 6C illustrates example gain stages for use with the autonomous beamformer, in accordance with a certain exemplary implementation of the disclosed technology.
- two inverting DC amplifiers with 1:1 and 1:3 ratio feedback resistors respectively may be used to generate +/-V ctri and +/-3V ctri for corresponding progressive compensation phase shifts to the inner and the outer two paths.
- the disclosed phase detector (PD) is not distorted by the amplitude/phase mismatch. Further details of the example gain stages may be found in M. Huang, T. Chi, F. Wang, T. Li, and H.
- FIG. 7 is an example schematic of a wideband IF EQ voltage-controlled continuous phase shifter (PS) 700 that may provide voltage-to-phase conversion, in accordance with certain exemplary implementations of the disclosed technology.
- the phase shifter 700 can include a two-stage RC-CR poly-phase filter and an analog multiplier with built-in dc pseudo sine/cosine generation as a EQ vector-modulator PS, as discussed in M. Huang, T. Chi, F. Wang, T. Li, and H. Wang, “A full-FoV autonomous hybrid beamformer array with unknown blockers rejection and signals tracking for low-latency 5G mm-Wave links,” IEEE Trans. Microw.Theory Techn., vol. 67, no. 7, pp. 2964-2974, Jul. 2019, which is incorporated herein by reference as if presented in full.
- the wideband full-range continuous-tuning IF EQ vector-modulator analog PS only requires one analog control voltage, ensuring control simplicity for the proposed scalable closed loop.
- the + /-V ctri and +/-3V ctri generated from phase-to-voltage convertor may be sensed by the IF I/Q vector modulator PS with corresponding compensation phase shift +/-0 FB and +/-30 FB completing the negative feedback loop.
- the dc pseudo-sine/-cosine generation can be easily extended to achieve a large phase tuning range for accommodating wide linearly progressive compensation phase shifts, such as +/-0 FB (+/-180 degrees), +/-30 FB (+/-540 degrees) to cover full FoV incidence for a large-scale array.
- Simulated amplitude and phase response of the PS 100 shows that it performs continuous phase shift >3000 degrees with only ⁇ 0.35 dB amplitude variation achieving highly linear phase shifts with negligible amplitude changes.
- the simulated voltage-to-phase CG G2 is 6 degrees/mV at 3.5 GHz.
- Instinctual response time for each array-based high order ASF stage is ⁇ 1 ps, ensuring dynamic tracking for the signal/blocker and low-latency communications.
- the spatial notch depth is also tunable by the IF VGA in phase-to-voltage converter if multiple co-channel signals require “power equalization” and the measured notch depth can reach 40 dB tuning range.
- FIG. 8 is a table listing parameters and performance of the disclosed technology (This Work) relative to related technologies.
- FIG. 9 is another table listing parameters and performance of the disclosed technology (This Work) relative to related technologies.
- the tables shown in FIG. 8 and FIG. 9 summarize comparisons of the disclosed technology with the state-of-the-art designs.
- the disclosed technology and disclosed architecture serve as a “smart” spatial filter bank with ⁇ 85mW/channel power consumption to relax dynamic requirements and enable the subsequent digital beamforming.
- the detailed DC power distribution indicates gradually larger power consumptions across 3 cascaded ASF stages due to higher linearity requirements.
- the RX array demonstrates a full-FoV operation with low-latency ps response time per ASF stage and achieves state-of-the-art wideband modulated multi-Gb/s 64-/256-QAM array-based high- order blocker rejection and signal beamforming.
- the power-aware PD disclosed herein can accurately distinguish the stronger tone and achieve >28dB suppression.
- the measured response time is ⁇ 1.75ps enabling fast beamforming and dynamic spatial notching for low-latency MIMOs using certain implementations of the disclosed technology.
- FIG. 10 is a flow diagram of a method 1000, according an exemplary implementation of the disclosed technology.
- the method 1000 includes receiving input signals at two or more frontend inputs in communication with corresponding two or more channels of a multiple input multiple output (MIMO) scalable cascadable receiver system, wherein each of the two or more channels comprise: a phase shifter in communication with, and controlled by, an autonomous beamformer; and an auxiliary path in communication with an output of the phase shifter.
- the method 1000 includes detecting, with a phase detector of the autonomous beamformer, a phase of the input signals.
- MIMO multiple input multiple output
- the method 1000 includes outputting, by the autonomous beamformer, a control voltage to the phase shifter to rotate a phase of a corresponding channel’s input signal to a reference phase according to a strongest signal component in the channel’s input signal.
- the method 1000 includes summing each of the phase-rotated input signals using a summing block in communication with each of the auxiliary paths of the two or more channels.
- the method 1000 includes outputting a sum from the summing block to a backend signal/blocker estimator.
- the method 1000 includes passing or rejecting the strongest signal component using a feedforward signal selector in communication with each output of the phase shifters, the feedforward signal selector configured to receive selection control signals from the backend signal/blocker estimator to combine with or subtract from each output of the phase shifters, a scaled strongest signal component.
- the method 1000 includes outputting, at two or more main path channel outputs, corresponding combined or subtracted signals from the feedforward signal selector.
- the feedforward signal selector can include a controllable combiner/subtractor to selectively combine or subtract from each of the two or more channels, a scaled output of the summing block based on the selection control signals.
- Certain exemplary implementations of the disclosed technology can include determining, by the backend signal/blocker estimator, an unwanted blocker signal from an output of the summing block and providing a subtraction control signal to the controllable combiner/subtractors to suppress the unwanted blocker signal from each of the two or more channel outputs by subtracting the scaled output of the summing block from each of the two or more main path channel outputs.
- Certain exemplary implementations of the disclosed technology can include determining, by the backend signal/blocker estimator, a wanted signal from an output of the summing block and providing a combiner control signal to the controllable combiners/subtractors to pass the wanted signal from one or more of the two or more channel outputs by combining the scaled output of the summing block with one or more of two or more main path channel outputs.
- Certain exemplary implementations of the disclosed technology can include outputting to a subsequent cascaded MIMO system, the two or more main path channel outputs.
- the two or more frontend inputs in communication with corresponding two or more channels can include N frontend inputs in communication with corresponding N channels.
- increasing N increases spatial selectivity of the input signals, enhances extraction of the strongest signal component, and maximizes suppression of an unwanted signal.
- the feedforward signal selector can include a controllable combiner/subtractor in each of the two or more channels, and wherein the feedforward signal selector is configured to selectively combine or subtract from each of the two or more channels, a scaled output of the summing block based on the selection control signals.
- the backend signal/blocker estimator may be configured to determine an unwanted blocker signal from an output of the summing block and to provide a subtraction control signal to the controllable combiner/subtractors to suppress the unwanted blocker signal from each of the two or more channel outputs by subtracting the scaled output of the summing block from each of the two or more main path channel outputs.
- the backend signal/blocker estimator may be configured to determine a wanted signal from an output of the summing block and to provide a combiner control signal to the controllable combiners/ subtractors to pass the wanted signal from one or more of the two or more channel outputs by combining the scaled output of the summing block with one or more of two or more main path channel outputs.
- the feedforward signal selector can include programmable gain amplifiers in communication with outputs of each of the phase shifters.
- the two or more main path channel outputs may be configured to feed a backend digital beamformer.
- Certain exemplary implementations of the disclosed technology can include one or more subsequent cascaded MIMO systems, wherein the one or more subsequent cascaded MIMO systems comprise a full or partial duplicate of the previous or initial MIMO system.
- two or more main path channel outputs from a previous MIMO system may be configured as inputs to the one or more subsequent cascaded MIMO systems.
- each of the subsequent cascaded MIMO systems may be configured to suppress an unwanted signal or pass a desired signal.
- the system may be configured to select or reject the strongest signal component with a response time between 1 ps and 2 ps. In some implementations, the system may be configured to select or reject the strongest signal component with a response time of less than 1 ps.
- the two or more frontend inputs in communication with corresponding two or more channels comprise N frontend inputs in communication with corresponding N channels, wherein increasing N increases spatial selectivity of the input signals.
- certain exemplary implementations of the disclosed technology include a wideband 27-to-41GHz RX array for N-input-N-output MIMO systems which employs scalable cascadable array -based high-order Autonomous Spatial Filters (ASFs) as a “smart” spatial filter bank for instinctual multi -blocker/signal management to assist digital beamforming.
- Millimeter-wave wideband LNAs and passive mixers may be used to provide broadband front-end spectral filtering.
- the ASFs may operate at IF, and each ASF may employ an array -based phase-domain negative feedback for auto-beam-tracking and a feedforward path for spatial filtering.
- Identical ASF stages may be cascaded to sequentially suppress multiple unknown spatial blockers or equalize multiple signals.
- each IF ASF can include phase shifters (PS), an array-based closed-loop autonomous BF, and feedforward signal combining/subtraction.
- the autonomous BF may include a power-aware phase detector (PD) for feedback PS control -voltage generation.
- PD phase detector
- the power-aware PD can select the strongest one, detect its adjacent-channel phase difference, and generate feedback PS control voltages so that PSs align the RX array to this tone.
- an auxiliary (Aux) path may add together N phase-aligned channels as a BF to accurately extract this strongest tone, which is then feedforward subtracted from the N-channel Main paths for spatial notching.
- the ASF may conceptually “rotate” the array towards the strongest tone and spatially notch it by feedforward subtraction, so the array size and full-FoV are preserved.
- the ASF may act only on RF power without requiring prior AoA/frequency/modulation knowledge or external BF controls.
- one-step demodulation can verify whether it is signal or blocker, which consumes negligible time/resource compared to backend AoA computation in conventional arrays, ensuring rapid spatial filtering. Larger array sizes may be used to result in high-order ASF spatial filtering with sharpened selectivity while multiple cascaded ASFs can sequentially process more unknown co-channel signals/blockers.
- cascading 3 ASFs can create three independent spatial notches to suppress three similar-power blockers (case 1), suppress one strong blocker twice, and reject one other medium -power blocker (case 2), or reject two blockers and beamform on one desired signal (case 3).
- the notch depth is also tunable by the Main/Aux-path gains if multiple co-channel signals require power equalization.
- the disclosed technology is the only N-Input-N- Output MIMO RX array in the state-of-the-art with array -based high-order scalable cascadable ASFs for autonomous suppression of multiple unknown blockers and desired signal beamforming supporting Gb/s complex modulations and ps low-latency.
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Abstract
A multiple input multiple output (MIMO) receiver (RX) array that includes scalable, cascadable, autonomous spatial filters for closed-loop frontend beamforming. Implementations achieve autonomous rejection of multiple unknown blockers and/or beamforming on unknown desired signals in the frontend RF/analog domain. The disclosed technology provides rejection of co-channel blockers and can be utilized to improve the signal to interference plus noise ratio (SINR) at multi-Gb/s modulations with ultrafast response time.
Description
MIMO WITH SCALABLE CASCADABLE AUTONOMOUS SPATIAL FILTERS FOR FULL-FOV MULTI-BLOCKER/SIGNAL MANAGEMENT
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is a continuation of U.S. Patent Application No. 17/173,291, filed 11 February 2021, which claims the benefit of U.S. Provisional Application Serial No. 62/976,726, filed on 14 February 2020, the contents of which are incorporated herein by reference in their entirety as if fully set forth below.
FIELD OF THE DISCLOSURE
[0002] The various embodiments of the present disclosure relate generally to wireless communication systems, and more particularly to multiple input multiple output (MIMO) receiver front-end architectures that are scalable and cascadable with autonomous spatial filters enabling blocker and signal management in wireless communication systems.
GOVERNMENT SUPPORT
[0003] This invention was made with government support under Grant No. FA8650-19-1- 7999 sponsored by the Air Force under the DARPA MITO MIDAS program. The government has certain rights in the invention.
BACKGROUND
[0004] Rapidly growing deployment of mm-wave links in commercial and/or defense applications often exposes the transceiver (TX/RX) front-ends in complex electromagnetic environments with multiple fast-changing yet unknown blockers. To preserve full field-of- view (FoV) and multiple input multiple output (MIMO) and multi-beam operations, digital arrays often skip FoV-limited front-end beamforming and rely on digital backends for spatial filtering. However, the receivers (RXs) and analog-to-digital converters (ADCs) require a high dynamic range to handle all the aperture information and to avoid array saturation by strong signals or blockers that may hinder digital beamforming. To reduce the high dynamic range requirement, and aid performance of digital arrays, there is a critical need for agile spectral- spatial front-end filtering for instinctual blocker suppression and power-equalizing of desired signals.
[0005] In digital arrays, front-end spectral filtering using mixers and filters can suppress out- of-band blockers but not in-band spatial blockers. Most existing front-end spatial filters use analog beamformers as spatial notches. As a fundamental limitation, these approaches require the signal and blocker knowledge a priori for open-loop spatial notching, or they employ a digital backend for on-the-fly coefficient computation for the analog beamformers, which limits their dynamic use with unknown and fast-changing signals/blockers.
[0006] Conventional self-steering beamformers automatically align the RX array towards the incident beam without backend computation. However, Van-Atta-like simple reflectors, coupled-oscillators, and/or phase-locked loop autonomous beamformers are traditionally employed, but they are inherently narrowband and not scalable to large arrays due to loop stability. Moreover, the intrinsic nonlinearity of conventional self-steering beamformers cannot support multi -beams or Gb/s complex modulations while supporting N-input-N-output MIMOs. Furthermore, conventional or previous state-of-the-art RX arrays cannot process multiple spatial signals/blockers without array size reduction at each beamforming stage.
[0007] Performance challenges still exist in receiver designs in terms of spatial selectivity, scalability, complex modulation, dynamic rage, blocker rejection, and speed.
BRIEF SUMMARY
[0008] The disclosed technology relates to receiver frontend systems and methods that may be utilized to address complex electromagnetic environments and dynamic, low-latency, and high-reliability applications.
[0009] According to an exemplary implementation of the disclosed technology, a multiple input multiple output (MIMO) scalable cascadable receiver front-end system is provided. The system includes two or more frontend inputs configured to receive input signals, each of the two or more frontend inputs in communication with corresponding two or more channels. The system includes an autonomous beamformer in communication with each of the two or more channels, the autonomous beamformer includes a phase detector configured to detect a phase of the input signals. Each of the two or more channels of the system include a phase shifter in communication with and controlled by the autonomous beamformer, wherein the autonomous beamformer is configured to output a control voltage to the phase shifter to rotate a phase of a corresponding channel’s input signal to a reference phase according to a detected phase of a strongest signal component in the channel’s input signal; and an auxiliary path in communication with an output of the phase shifter. The system includes a summing block in communication with each of the auxiliary paths of the two or more channels, the summing block configured to output a sum of each of the phase-rotated input signals and to output the sum to a backend signal/blocker estimator; a feedforward signal selector in communication with each output of the phase shifter and configured to receive selection control signals from the backend signal/blocker estimator to pass or reject the strongest signal component; and two or more main path channel outputs corresponding to the two or more channels.
[0010] In accordance with an exemplary implementation of the disclosed technology, a method is provided that includes receiving input signals at two or more frontend inputs in communication with corresponding two or more channels of a multiple input multiple output (MIMO) scalable cascadable receiver system, wherein each of the two or more channels comprise: a phase shifter in communication with, and controlled by, an autonomous beamformer; and an auxiliary path in communication with an output of the phase shifter. The method further includes detecting, with a phase detector of the autonomous beamformer, a phase of the input signals; outputting, by the autonomous beamformer, a control voltage to the phase shifter to rotate a phase of a corresponding channel’s input signal to a reference phase according to a strongest signal component in the channel’s input signal; summing each of the
phase-rotated input signals using a summing block in communication with each of the auxiliary paths of the two or more channels; outputting a sum from the summing block to a backend signal/blocker estimator; passing or rejecting the strongest signal component using a feedforward signal selector in communication with each output of the phase shifters, the feedforward signal selector configured to receive selection control signals from the backend signal/blocker estimator to combine with or subtract from each output of the phase shifters, a scaled strongest signal component; and outputting, at two or more main path channel outputs, corresponding combined or subtracted signals from the feedforward signal selector.
[0011] These and other aspects of the present disclosure are described in the Detailed Description below and the accompanying drawings. Other aspects and features of embodiments will become apparent to those of ordinary skill in the art upon reviewing the following description of specific, exemplary embodiments in concert with the drawings. While features of the present disclosure may be discussed relative to certain embodiments and figures, all embodiments of the present disclosure can include one or more of the features discussed herein. Further, while one or more embodiments may be discussed as having certain advantageous features, one or more of such features may also be used with the various embodiments discussed herein. Similarly, while exemplary embodiments may be discussed below as device, system, or method embodiments, it is to be understood that such exemplary embodiments can be implemented in various devices, systems, and methods of the present disclosure.
BRIEF DESCRIPTION OF THE DRAWINGS
[0012] The following detailed description of specific embodiments of the disclosure will be better understood when read in conjunction with the appended drawings. For the purpose of illustrating the disclosure, specific embodiments are shown in the drawings. It should be understood, however, that the disclosure is not limited to the precise arrangements and instrumentalities of the embodiments shown in the drawings.
[0013] FIG. 1 depicts a system architecture of an N-input-N-output MIMO RX with scalable cascadable array-based high-order ASFs for instinctual full-FoV signal/blocker management, in accordance with certain exemplary implementations of the disclosed technology.
[0014] FIG. 2 depicts a 1 x N N-input-N-Output MIMO RX that can include multiple RX array chips arranged along a zero-phase symmetric reference plane, according to an exemplary implementation of the disclosed technology.
[0015] FIG. 3 A is a phase domain block diagram of a phase detector (PD) arrangement in a non-linear feedback loop 300, in accordance with certain exemplary implementations of the disclosed technology.
[0016] FIG. 3B is a graph illustrating residual phase differences A0out of the phase detector (PD) arrangement shown in FIG. 3 A as a function of incidence angle for various loop gains k when in= 0 degrees.
[0017] FIG. 4 is an illustration of a four-element MIMO RX array-based high-order ASF, according to an exemplary implementation of the disclosed technology.
[0018] FIG. 5 is an example block diagram of an N-input-N-output MIMO corresponding to the feedback section of the MIMO RX array-based high-order ASF, as illustrated in FIG. 4, and which may utilize the phase detector (PD) arrangement in a non-linear feedback loop as illustrated in FIG. 3A, and in accordance with certain exemplary implementations of the disclosed technology.
[0019] FIG. 6A illustrates an example phase-to-voltage conversion Gi circuit diagram for use with the autonomous beamformer, in accordance with certain exemplary implementations of the disclosed technology.
[0020] FIG. 6B illustrates an example transformer-based low-loss differential 90-degree coupler layout for use with the autonomous beamformer, in accordance with certain exemplary implementations of the disclosed technology.
[0021] FIG. 6C illustrates example gain stages for use with the autonomous beamformer, in accordance with a certain exemplary implementation of the disclosed technology.
[0022] FIG. 7 is an example schematic of a wideband IF I/Q voltage-controlled continuous phase shifter (PS) 700 that may provide voltage-to-phase conversion, in accordance with certain exemplary implementations of the disclosed technology.
[0023] FIG. 8 is a table listing parameters and performance of the disclosed technology (This Work) relative to related technologies.
[0024] FIG. 9 is another table listing parameters and performance of the disclosed technology (This Work) relative to related technologies.
[0025] FIG. 10 is a flow diagram of a method, according to an exemplary implementation of the disclosed technology.
DETAILED DESCRIPTION
[0026] To facilitate an understanding of the principles and features of the present disclosure, various illustrative embodiments are explained below. The components, steps, and materials described hereinafter as making up various elements of the embodiments disclosed herein are intended to be illustrative and not restrictive. Many suitable components, steps, and materials that would perform the same or similar functions as the components, steps, and materials described herein are intended to be embraced within the scope of the disclosure. Such other components, steps, and materials not described herein can include but are not limited to, similar components or steps that are developed after the embodiments disclosed herein.
[0027] The disclosed technology includes a wideband mm-wave multiple-input-multiple- output (MIMO) receiver (RX) array and control thereof. Certain implementations of the disclosed technology utilize N-input-N-output frontend autonomous spatial filters (ASFs) that can autonomously reject multiple wideband modulated in-band blockers without requiring prior knowledge of the blocker angle-of-arrival, frequency, or modulation scheme. In accordance with certain exemplary implementations of the disclosed technology, the disclosed technology may be scalable and cascadable.
[0028] Certain implementations of the disclosed technology may autonomously support N- wideband modulated blocker suppression and desired signal beamforming simultaneously without any digital beamforming aid. In accordance with certain exemplary implementations of the disclosed technology, the N-input-N-output MIMO RX array may cover an extremely broad frequency range (e.g., 27-41GHz) over the full field-of-view (FoV) to address various unmet challenges in low-latency MIMO systems such as rapidly growing deployment of mm- wave links in commercial (e.g., 5G/automotive) and defense (e.g., fast-moving drones). The disclosed technology may further enable receiving signals with high-data-rate (multi-Gb/s) and various modulation schemes (e.g., 64QAM, 256QAM) over full FoV with response times on the order of microseconds. The disclosed MIMO system may utilize the array-based high- order ASFs to provide sharpened spatial selectivity, which may enable multi -beam high- capacity massive MIMO.
[0029] Certain implementations of the disclosed MIMO system can realize iterative source localization completely in the frontend RF/analog domain. The disclosed MIMO RX array may enable the following technical advantages: (1) autonomous rejection of multiple unknown blockers and/or beamforming on unknown desired signals; (2) rejection of co-channel blockers
and enhancement of the signal-to-interference-plus-noise ratio (SINR) both at multi-Gb/s 64- /256-QAM modulations; and (3) ultrafast response time (e.g., less than 1.75 ps) per ASF stage.
[0030] The systems and methods disclosed herein may utilize closed-loop frontend beamforming to achieve instinctual (autonomous operation for sensing, controlling, processing signals with ultralow-latency and no backend digital signal processing assist) management of multiblockers/signals. In certain exemplary implementations, the ASFs may be utilized to realize frontend blocker suppression and may substantially relax the dynamic range requirement of downstream analog-to-digital converters (ADCs) in digital arrays. Moreover, cascading multiple ASFs, as disclosed herein, may be utilized to sequentially suppress multiple blockers and achieve iterative source localization. Certain exemplary implementations of the disclosed technology may utilize frontend hardware with digital signal processing (DSP) for autonomous cancellation of multiple co-channel wideband blockers, while a wideband desired signal can be received with a high SINR.
[0031] FIG. 1 depicts a system architecture of an N-input-N-output MIMO RX system 100 with scalable cascadable array -based high-order ASFs for instinctual full-FoV signal/blocker management, in accordance with certain exemplary implementations of the disclosed technology. In this example embodiment, the system 100 can include an RX frontend 102 and multiple MIMO ASF stages 104 for processing N inputs and providing N outputs (for a backend 106, for example). The RX frontend 102 can include mm-wave broadband low-noise amplifiers (LNAs) 108 and passive mixers 110 for wideband and high-linearity spectral filtering.
[0032] The RX frontend 102 may down-convert the N inputs and pass the down-converted signals to a first stage scalable array -based high-order MIMO ASF 104, which can be configured as a “smart” frontend spatial filter bank to process/manage multiple signals/blockers and assist the downstream digital beamforming. In accordance with certain exemplary implementations of the disclosed technology, the system 100 can enhance spatial selectivity via high-order scalability. For example, multiple ASF stages 104 can be cascaded to perform frontend-based “iterative source localization” computation on multiple blockers/signals sequentially. In contrast to hybrid beamforming architectures, the disclosed system 100 provides N-input-N-output without reducing the MIMO array order and without compromising the FoV of the downstream system (such as the backend 106).
[0033] FIG. 2 depicts a 1 x N N-input-N-Output MIMO RX architecture 200 that can include multiple RX array chips arranged along a zero-phase symmetric reference plane, according to an exemplary implementation of the disclosed technology. This architecture 200 can provide progressive phase shift symmetry and scalability to a large MIMO array by arranging multiple RX array chips 202 along a zero-phase symmetric reference plane 204. A 27-41 -GHz four- element broadband MIMO array chip implemented in a 45-nm CMOS SOI was fabricated to confirm the proof-of-concept for the disclosed technology.
[0034] FIG. 3 A is a phase domain block diagram of a phase detector (PD) arrangement in a non-linear feedback loop 300 that may be utilized in the disclosed technology, and as discussed in M. -Y. Huang, T. Chi, F. Wang and H. Wang, "An All-Passive Negative Feedback Network for Broadband and Wide Field-of-View Self-Steering Beam-Forming With Zero DC Power Consumption," in IEEE Journal of Solid-State Circuits, vol. 52, no. 5, pp. 1260-1273, May 2017, doi: 10.1109/JSSC.2016.2641947, which is incorporated herein by reference as if presented in full. In certain exemplary implementations, a phase detector (PD) may be used for phase to voltage conversion with phase-to-voltage conversion gain (CG) Gi = Vctri/A0Out and a voltage-to-phase CG G2 = A/ Vctri. Certain implementations of the non-linear feedback loop 300 and phase detector may be utilized in the autonomous beamforming system, as will be discussed further below.
[0035] FIG. 3B is a graph illustrating residual phase differences A0out of the phase detector (PD) arrangement shown in FIG. 3 A as a function of incidence angle for various loop gains k when in= 0 degrees.
[0036] FIG. 4 is an illustration of a four-element MIMO RX array-based high-order ASF 400, according to an exemplary implementation of the disclosed technology. In this uniform 1x4 array example, the input progressive phase shift f difference between path 1 402 and path 4 404 (the two outer paths) may be three times that of that for path 2 406 and path 3 408 (the two inner paths). In accordance with certain exemplary implementations of the disclosed technology, a symmetric zero reference may be established between path and path 3 408. Referenced to this zero phase reference, the input progressive phase shifts for path 1 402, path 2 406, path 3 408, and path 4404 are +30in/2, +0in /2, -0in/2, and -30in/2, respectively.
[0037] The ASF 400 may include phase shifters (PS) 410, a closed-loop autonomous beamformer 412, auxiliary path 414 for array -based signal/blocker extraction, and feedforward subtraction (combining) 416 for spatial -notching (beamforming). The operation of the ASF
400 may be explained with the following example: assume a simple scenario with a received signal 418 at an incident angle Q. A power-aware nonlinear phase detector (PD) of the autonomous beamformer 412 may be utilized to detect the phase difference f\h = p sin 0 between the inner two channels 406 408 and may generate a differential output DC voltage with a phase-to-voltage conversion gain (CG) Gi. The differential output DC voltage may be fed to the PS 410 to apply phase shifts, resulting in a voltage-to-phase CG G2. The PD and PS 410 may form negative feedback in the phase domain with a phase-to-phase loop gain of G1G2. In its closed-loop operation, the output residual phase difference D0O ut can be expressed as:
[0038] The large loop gain G1G2 may be utilized to directly minimize the resulting phase difference D0O ut of the two paths and autonomously align their phases, similar to a DLL, but now operating as a beamformer (BF). Unlike coupled PLL/oscillator self-steering arrays, the DLL-like autonomous BF, as disclosed herein, does not require resonators or multipliers, and can support broad carrier frequencies. For such an autonomous BF, a large phase domain loop gain G1G2 may enable a full FoV coverage and can improve the robustness against PD phase/amplitude variations. Intermediate frequency (IF) variable gain amplifiers (VGAs) may be utilized in the feedback 420 to boost the loop gain and achieve a near-zero residual phase error D0O ut, even for end-fire incidence ( Q = +1-90 degrees).
[0039] In accordance with certain exemplary implementations of the disclosed technology, the autonomous BF 412 can be extended to a large array size. For example, and as discussed above, in a uniform 1x4 array, the input progressive phase shift of the outer two paths (Main path 1 402 and Main path 4 404) is three times that of the inner two paths. Thus, to align the entire RX array for the detected tone, progressively scaled feedback PS control voltages can be applied to the four paths (path 1 402, path 2 406, path 3 408, and path 4 404) as -3xVctri, - 1 x V ctri, + lxVctri, and +3xVctri, respectively, to compensate for the corresponding phase differences. Further scaling can be performed similarly.
[0040] For example, taking the center plane as a zero-phase reference, the input progressive phase differences for all the channels are +/-0in/2, +/-30 /2, . ,+/-(N-l )0m/2 in an N-element uniform RX array, with corresponding feedback PS control voltages +/-Vctri, +/-3 Vctri, and +/- (N-l)Vctrl.
[0041] When multiple co-channel tones are received, the power-aware PD of the autonomous beamformer 412 can identify the strongest tone and may perform autonomous beamforming on it. In certain exemplary implementations, as long as two tones exhibit a power difference larger than 1 dB, the autonomous BF can respond to the stronger tone.
[0042] As illustrated in FIG. 4, when N channels of the ASF 400 are phase-aligned toward the strongest tone by the autonomous BF 412, the signal path in each channel may then be split into two, and the auxiliary paths 414 may be utilized to sum 415 the N channels together. This essentially performs beamforming and extraction on the strongest tone, while the other tones are suppressed by the spatial filtering since they are not in phase among the N-channels. Adding more channels in the ASF 400 may be used to enhance the selectivity of this spatial extraction on the strongest tone and may maximize suppression of the other tones. In accordance with certain exemplary implementations of the disclosed technology, the extracted tone can be digitized, and one-step demodulated at the baseband so that the RX system can decide whether it is a blocker or desired signal. Since this extraction is already the strongest tone and other weaker tones are further suppressed by the auxiliary path 414 beamforming, the digitization may utilize an analog to digital converter (ADC) with a relaxed dynamic range. Moreover, this one-step demodulation for blocker/signal identification may utilize negligible backend computation, in contrast with running a fast Fourier transform (FFT) on the entire array in conventional digital beamforming. Notably, although blocker/signal classification disclosed herein utilizes a one-step DSP demodulation, as this is true for most other RX systems, the disclosed MIMO technology does not require DSP for beam scanning, localization, and computation, therefore drastically accelerating the signal beamforming/blocker rejection, which also does not require prior knowledge for an angle of arrival (AoA), frequency, and modulation.
[0043] With reference again to FIG. 4, after the strongest tone is extracted, it may be feedforwarded to the N-channel Main paths 422. If it is a desired signal, the combiner 416 “+” may be selected to perform constructive beamforming. For an unwanted blocker, subtraction may be chosen to form a spatial notch and suppress this strongest tone. Although other tones may also be present in the auxiliary path 414, they are largely attenuated by the spatial selectivity of the beamforming before the feedforward operation, so that their presence in the Main paths 422 will not be affected significantly.
[0044] To verify that the spatial notch selectivity can be enhanced by an ASF with a large number of array elements, assume the strongest tone (a blocker) has an amplitude of A, and one weaker received tone at a phase difference of 0dirr from the blocker is examined. The normalized N-element array factor (AF) gain |AF(0diff)| created in the auxiliary paths 414 can be expressed as:
Asin N<^iff ^ where 0d,rr = pbΐhq^. (2)
Thus, the first null incident angle for a uniform l/2 array is
2
0null_lst = ± Sin-1 - (4)
[0045] Based on (4), as N increases, the beamforming in the auxiliary paths 414 achieves a higher-order array factor with narrower beamwidth for a sharper spatial selection. Feedforward subtraction of this auxiliary path beamformed signal in the main paths then realizes a spatial notch. The null beamwidth of the auxiliary path 414 beamforming becomes the notch beamwidth after feedforward subtraction.
[0046] In accordance with certain exemplary implementations of the disclosed technology, a DSP algorithm “Iterative Source Localization” may be utilized in backend computation for additional digital beamforming, for example, to handle multiple received tones with large blockers. This process may include performing an array-scaled FFT to identify the spatial signature of the strongest tone, whose sidelobes may shadow other weaker signals. Next, this strongest tone may be spatially filtered, and another FFT may be performed on the remaining signals. This process may be repeated to resolve all the received signals.
[0047] In accordance with certain exemplary implementations of the disclosed technology, when cascading multiple ASF stages, the RX MIMO technology disclosed herein may realize
the Iterative Source Localization DSP algorithm at the RF/analog layer in an autonomous fashion. For example, the first ASF stage in the cascade may autonomously track and spatially filter out the first strongest tone. The feedback PS 420 control voltages may generate progressive phase shifts for the N channels on all the signals. Therefore, after notching the strongest tone, the remaining tones still preserve their progressive phase relationships among the N-channels. In addition, the cascaded ASFs 400 can be configured to maintain the N-input- N-output configuration without sacrificing the array order or the array field-of-view FoV (except for the spatial notches). Therefore, the second ASF stage in a cascade can again operate on the remaining signals and similarly notch out the second strongest tone.
[0048] Cascaded ASFs operation can be explained as follows: essentially, the first-stage ASF rotates the entire MIMO array and aligns its boresight toward the strongest received tone, which is then spatially notched by the first ASF feedforward subtraction. Next, the second stage ASF aligns the entire MIMO array toward the second strongest tone and then notches it. This process is iterated through M ASF stages so that the first M strongest tones are autonomously identified and removed from the received signals. Thus, in accordance with certain exemplary implementations of the disclosed technology, the array size (N-input — N-output) and its FoV (except for the spatial notches) may be preserved in the cascaded ASF configuration, which can be an ideal frontend spatial filter approach in a digital beamforming array. This also enables relaxing the dynamic ranges of the downstream circuits and ADCs and allows the digital beamforming DSP backend to scan through the remaining FoV for signal identification with no loss of spatial information.
[0049] In addition (and in contrast to conventional MIMO RX arrays with frontend spatial filtering), the disclosed ASF with the power-aware PD acts only on the RF power and it does not require prior angle-of-arrival or frequency or modulation information or external beamforming amplitude/phase controls. Thus, implementations of the disclosed technology can handle unknown blockers/signals without DSP backend beam computations. The disclosed technology further enables additional technical advancements including multiple ASF spatial notches that can autonomously track multiple blockers via their closed-loop operation, ensuring low response time and latency in complex electromagnetic environments and dynamic mm- wave applications.
[0050] In certain exemplary implementations, it may be assumed that blockers are stronger than the desired signals. In accordance with certain exemplary implementations of the
disclosed technology, cascading multiple ASFs can provide reconfigurable modes for different MIMO scenarios. In a first use case, three ASFs can be cascaded and all three ASFs may use subtractors to create three independent spatial notches to autonomously and sequentially suppress three unknown in-band wideband blockers. In a second use case that includes one strong blocker and one medium-power blocker, the RX can suppress the strong one twice by the first- and second-stage ASFs to create a deep spatial notch and reject the other medium- power unknown blocker by the third-stage ASF. In a third use case, the first two ASFs may use subtractors, and the third ASF may use a combiner. In this scenario, the first two ASFs may create two array-based spatial notches to autonomously suppress two unknown in-band blockers, and the third ASF enhances one desired signal for high SINR by autonomous beamforming. Notably, the power-aware PD, as disclosed herein, may ensure that the first two ASFs only spatially notch the two strong blockers instead of the desired signal.
[0051] Certain exemplary implementations of the disclosed technology may preserve the MIMO FoV and size (N-input — N-output) through its ASF operations and can be readily scaled up with a large number of array elements to enhance the spatial selectivity of ASF notches. Certain exemplary implementations of the disclosed technology may enable ideal “intelligent” frontend spatial filters to assist digital beamforming systems by reducing the required dynamic range of the downstream electronics.
[0052] FIG. 5 is an example block diagram of an N-input-N-output MIMO 500 that may be utilized in the feedback section 420 of the MIMO RX array-based high-order ASF 400, as illustrated in FIG. 4, and which may utilize the phase detector (PD) arrangement 300 in a non linear feedback loop as illustrated in FIG. 3A, and in accordance with certain exemplary implementations of the disclosed technology.
[0053] FIG. 6A illustrates a simplified schematic diagram of a phase-to-voltage conversion Gi circuit 600 for use with the autonomous beamformer, in accordance with certain exemplary implementations of the disclosed technology. FIG. 6B illustrates an example transformer- based low-loss differential 90 degree coupler layout for use with the autonomous beamformer, in accordance with certain exemplary implementations of the disclosed technology.
[0054] In accordance with certain exemplary implementations of the disclosed technology, the phase-to-voltage conversion Gi circuit 600 shown in FIG. 6A can include a transformer- based low-loss differential 90-degree coupler, IF VGAs, multistage Dickson voltage rectifiers, and feedback DC voltage generators. In certain exemplary implementations, the differential
input (In) and/or isolation (Iso) ports of the 90-degree coupler may be used to sense phase- shifts in the adjacent inner two paths, and the outputs from the differential through (Thru) and coupled (Cpl) ports may be followed by the IF VGAs and the multistage Dickson voltage rectifier. In contrast to CMOS-based square-law devices, the multistage Dickson voltage rectifiers may be chosen to have larger output DC dynamic range to detect relatively small signals from blockers since the DC outputs are not clipped out by any fixed VDD. Further details of alternative implementations of the phase-to-voltage conversion Gi circuit 600 (as illustrated in FIG. 6A) are discussed in the following publications, which are incorporated by reference herein as if presented in full: S. Lee, M. Huang, Y. Youn, and H. Wang, “A 15 - 55 GHz low-loss Ultra-Compact Folded Inductor-based Multi-section Wilkinson Power Divider for Multi-band 5G applications,” IEEE International Microwave Symposium (IMS), June 2019; M. Huang and H. Wang, "An ultra-compact folded inductor-based mm-Wave rat-race coupler in CMOS,” IEEE International Microwave Symposium (IMS), May 2016; E. Garay, M. Huang, H. Wang, "A cascaded self-similar rat-race hybrid coupler architecture and its compact fully integrated Ka-band implementation," IEEE International Microwave Symposium, Jun. 2018; and M. Huang, T. Huang, M. Swaminathan, and H. Wang, “Ultra compact concurrent multi-directional beamforming receiving network for full-FoV high- efficiency wireless power transfer,” IEEE International Microwave Symposium (IMS), June 2019.
[0055] In certain exemplary implementations of the disclosed technology, the phase-to- voltage conversion Gi circuit 600 can include a common-mode feedback (CMFB) circuit to control feedback voltage reference points and DC voltage multiplier for progressive voltage generations in outer paths. In certain exemplary implementations, the overall loop gain may be boosted to achieve full field-of-view coverage without any significant degradations. In certain exemplary implementations, output differential control voltages Vctri of the rectifiers may be fed into the wideband continuous-tuning EQ voltage-controlled IF PS to generate the compensation phase feedback. The large-signal behavior model of the phase-to-voltage converter may then be analyzed. Assuming two IF incident signals with the same amplitude A, but with a phase difference, D0O ut may be injected into the In and Iso ports of the 90-degree coupler. IF VGAs may be utilized to amplify the output RF signals at the Thru and Cpl ports with a gain a. The amplified output voltages may be further converted to a differential feedback DC voltage Vctri with rectification efficiency b. Assuming the two matched rectifiers are square-law devices, the Vctri of the two rectifiers may be expressed as
V ctri = VDCI - V DC2 — 2ot2 bA2 sin DfoM. (6)
[0056] The phase-to-voltage CG G1 may be calculated as:
Gi Yctri/^ out — 2cx bA sin A0Out/A0out ) which may be designed to be > 100 (linear scale). The conversion efficiency b may also be maximized by loading a high impedance, i.e., the gates of the CMFB dc amplifiers, which may enhance RF power to dc voltage conversion.
[0057] FIG. 6C illustrates example gain stages for use with the autonomous beamformer, in accordance with a certain exemplary implementation of the disclosed technology. In this implementation, two inverting DC amplifiers with 1:1 and 1:3 ratio feedback resistors respectively may be used to generate +/-Vctri and +/-3Vctri for corresponding progressive compensation phase shifts to the inner and the outer two paths. By conversion for the two independent domains (phase and voltage information), the disclosed phase detector (PD) is not distorted by the amplitude/phase mismatch. Further details of the example gain stages may be found in M. Huang, T. Chi, F. Wang, T. Li, and H. Wang, “A full-FoV autonomous hybrid beamformer array with unknown blockers rejection and signals tracking for low-latency 5G mm-Wave links,” IEEE Trans. Microw. Theory Techn., Apr. 2019, which is incorporated herein by reference as if presented in full.
[0058] FIG. 7 is an example schematic of a wideband IF EQ voltage-controlled continuous phase shifter (PS) 700 that may provide voltage-to-phase conversion, in accordance with certain exemplary implementations of the disclosed technology. The phase shifter 700 can include a two-stage RC-CR poly-phase filter and an analog multiplier with built-in dc pseudo sine/cosine generation as a EQ vector-modulator PS, as discussed in M. Huang, T. Chi, F. Wang, T. Li, and H. Wang, “A full-FoV autonomous hybrid beamformer array with unknown blockers rejection and signals tracking for low-latency 5G mm-Wave links,” IEEE Trans. Microw.Theory Techn., vol. 67, no. 7, pp. 2964-2974, Jul. 2019, which is incorporated herein by reference as if presented in full.
[0059] In accordance with certain exemplary implementations of the disclosed technology, the wideband full-range continuous-tuning IF EQ vector-modulator analog PS only requires one analog control voltage, ensuring control simplicity for the proposed scalable closed loop. The + /-V ctri and +/-3Vctri generated from phase-to-voltage convertor may be sensed by the IF
I/Q vector modulator PS with corresponding compensation phase shift +/-0FB and +/-30FB completing the negative feedback loop. The voltage-to-phase CG may be expressed as G2 = 0FB Vctrl.
[0060] The dc pseudo-sine/-cosine generation can be easily extended to achieve a large phase tuning range for accommodating wide linearly progressive compensation phase shifts, such as +/-0FB (+/-180 degrees), +/-30FB (+/-540 degrees) to cover full FoV incidence for a large-scale array. Simulated amplitude and phase response of the PS 100 shows that it performs continuous phase shift >3000 degrees with only <0.35 dB amplitude variation achieving highly linear phase shifts with negligible amplitude changes. The simulated voltage-to-phase CG G2 is 6 degrees/mV at 3.5 GHz.
[0061] Analysis of the phase-domain closed-loop performances of the auxiliary BF and ASFs with feedforward cancellation indicates that the array-based high order ASF disclosed herein can achieve ideally perfect cancellation regardless of the incidence of the blocker. With the targeted loop gain >600 (linear scale), simulated residual phase difference A0out can be highly suppressed to <0.5 degrees and maximum >50 dB ASF cancellation over full FoV. The dominant pole of the feedback may be designed to achieve fast response time.
[0062] Instinctual response time for each array-based high order ASF stage is <1 ps, ensuring dynamic tracking for the signal/blocker and low-latency communications. The spatial notch depth is also tunable by the IF VGA in phase-to-voltage converter if multiple co-channel signals require “power equalization” and the measured notch depth can reach 40 dB tuning range.
[0063] FIG. 8 is a table listing parameters and performance of the disclosed technology (This Work) relative to related technologies. FIG. 9 is another table listing parameters and performance of the disclosed technology (This Work) relative to related technologies. The tables shown in FIG. 8 and FIG. 9 summarize comparisons of the disclosed technology with the state-of-the-art designs. Compared to watt-level ADC for wideband modulations signal/blocker processing, the disclosed technology and disclosed architecture serve as a “smart” spatial filter bank with < 85mW/channel power consumption to relax dynamic requirements and enable the subsequent digital beamforming. The detailed DC power distribution indicates gradually larger power consumptions across 3 cascaded ASF stages due to higher linearity requirements. By exploiting the unique N-input-N-output cascaded multistage array-based high-order ASF MIMO architecture as disclosed herein, the RX array
demonstrates a full-FoV operation with low-latency ps response time per ASF stage and achieves state-of-the-art wideband modulated multi-Gb/s 64-/256-QAM array-based high- order blocker rejection and signal beamforming.
[0064] When two spatial co-channel tones are concurrently received, if the two tones have >ldB power difference, the power-aware PD disclosed herein can accurately distinguish the stronger tone and achieve >28dB suppression. Over the full FoV, the measured response time is < 1.75ps enabling fast beamforming and dynamic spatial notching for low-latency MIMOs using certain implementations of the disclosed technology.
[0065] FIG. 10 is a flow diagram of a method 1000, according an exemplary implementation of the disclosed technology. In block 1002, the method 1000 includes receiving input signals at two or more frontend inputs in communication with corresponding two or more channels of a multiple input multiple output (MIMO) scalable cascadable receiver system, wherein each of the two or more channels comprise: a phase shifter in communication with, and controlled by, an autonomous beamformer; and an auxiliary path in communication with an output of the phase shifter. In block 1004, the method 1000 includes detecting, with a phase detector of the autonomous beamformer, a phase of the input signals. In block 1006, the method 1000 includes outputting, by the autonomous beamformer, a control voltage to the phase shifter to rotate a phase of a corresponding channel’s input signal to a reference phase according to a strongest signal component in the channel’s input signal. In block 1008, the method 1000 includes summing each of the phase-rotated input signals using a summing block in communication with each of the auxiliary paths of the two or more channels. In block 1010, the method 1000 includes outputting a sum from the summing block to a backend signal/blocker estimator. In block 1012, the method 1000 includes passing or rejecting the strongest signal component using a feedforward signal selector in communication with each output of the phase shifters, the feedforward signal selector configured to receive selection control signals from the backend signal/blocker estimator to combine with or subtract from each output of the phase shifters, a scaled strongest signal component. In block 1014, the method 1000 includes outputting, at two or more main path channel outputs, corresponding combined or subtracted signals from the feedforward signal selector.
[0066] In certain exemplary implementations, the feedforward signal selector can include a controllable combiner/subtractor to selectively combine or subtract from each of the two or more channels, a scaled output of the summing block based on the selection control signals.
[0067] Certain exemplary implementations of the disclosed technology can include determining, by the backend signal/blocker estimator, an unwanted blocker signal from an output of the summing block and providing a subtraction control signal to the controllable combiner/subtractors to suppress the unwanted blocker signal from each of the two or more channel outputs by subtracting the scaled output of the summing block from each of the two or more main path channel outputs.
[0068] Certain exemplary implementations of the disclosed technology can include determining, by the backend signal/blocker estimator, a wanted signal from an output of the summing block and providing a combiner control signal to the controllable combiners/subtractors to pass the wanted signal from one or more of the two or more channel outputs by combining the scaled output of the summing block with one or more of two or more main path channel outputs.
[0069] Certain exemplary implementations of the disclosed technology can include outputting to a subsequent cascaded MIMO system, the two or more main path channel outputs.
[0070] In certain exemplary implementations, the two or more frontend inputs in communication with corresponding two or more channels can include N frontend inputs in communication with corresponding N channels. In certain exemplary implementations, increasing N increases spatial selectivity of the input signals, enhances extraction of the strongest signal component, and maximizes suppression of an unwanted signal.
[0071] In certain configurations, the feedforward signal selector can include a controllable combiner/subtractor in each of the two or more channels, and wherein the feedforward signal selector is configured to selectively combine or subtract from each of the two or more channels, a scaled output of the summing block based on the selection control signals. In certain exemplary implementations, the backend signal/blocker estimator may be configured to determine an unwanted blocker signal from an output of the summing block and to provide a subtraction control signal to the controllable combiner/subtractors to suppress the unwanted blocker signal from each of the two or more channel outputs by subtracting the scaled output of the summing block from each of the two or more main path channel outputs. In certain exemplary implementations, the backend signal/blocker estimator may be configured to determine a wanted signal from an output of the summing block and to provide a combiner control signal to the controllable combiners/ subtractors to pass the wanted signal from one or
more of the two or more channel outputs by combining the scaled output of the summing block with one or more of two or more main path channel outputs.
[0072] In certain exemplary implementations, the feedforward signal selector can include programmable gain amplifiers in communication with outputs of each of the phase shifters.
[0073] According to an exemplary implementation of the disclosed technology, the two or more main path channel outputs may be configured to feed a backend digital beamformer.
[0074] Certain exemplary implementations of the disclosed technology can include one or more subsequent cascaded MIMO systems, wherein the one or more subsequent cascaded MIMO systems comprise a full or partial duplicate of the previous or initial MIMO system.
[0075] In certain exemplary implementations, two or more main path channel outputs from a previous MIMO system may be configured as inputs to the one or more subsequent cascaded MIMO systems.
[0076] According to an exemplary implementation of the disclosed technology, each of the subsequent cascaded MIMO systems may be configured to suppress an unwanted signal or pass a desired signal.
[0077] In certain exemplary implementations, the system may be configured to select or reject the strongest signal component with a response time between 1 ps and 2 ps. In some implementations, the system may be configured to select or reject the strongest signal component with a response time of less than 1 ps.
[0078] According to an exemplary implementation of the disclosed technology, the two or more frontend inputs in communication with corresponding two or more channels comprise N frontend inputs in communication with corresponding N channels, wherein increasing N increases spatial selectivity of the input signals.
[0079] As discussed herein, certain exemplary implementations of the disclosed technology include a wideband 27-to-41GHz RX array for N-input-N-output MIMO systems which employs scalable cascadable array -based high-order Autonomous Spatial Filters (ASFs) as a “smart” spatial filter bank for instinctual multi -blocker/signal management to assist digital beamforming. Millimeter-wave wideband LNAs and passive mixers may be used to provide broadband front-end spectral filtering. The ASFs may operate at IF, and each ASF may employ an array -based phase-domain negative feedback for auto-beam-tracking and a feedforward path
for spatial filtering. Identical ASF stages may be cascaded to sequentially suppress multiple unknown spatial blockers or equalize multiple signals.
[0080] As discussed herein, each IF ASF can include phase shifters (PS), an array-based closed-loop autonomous BF, and feedforward signal combining/subtraction. The autonomous BF may include a power-aware phase detector (PD) for feedback PS control -voltage generation. When multiple co-channel tones are received, the power-aware PD can select the strongest one, detect its adjacent-channel phase difference, and generate feedback PS control voltages so that PSs align the RX array to this tone. In accordance with certain exemplary implementations of the disclosed technology, an auxiliary (Aux) path may add together N phase-aligned channels as a BF to accurately extract this strongest tone, which is then feedforward subtracted from the N-channel Main paths for spatial notching.
[0081] As discussed herein, the ASF may conceptually “rotate” the array towards the strongest tone and spatially notch it by feedforward subtraction, so the array size and full-FoV are preserved. The ASF may act only on RF power without requiring prior AoA/frequency/modulation knowledge or external BF controls. For the extracted tone in each ASF, one-step demodulation can verify whether it is signal or blocker, which consumes negligible time/resource compared to backend AoA computation in conventional arrays, ensuring rapid spatial filtering. Larger array sizes may be used to result in high-order ASF spatial filtering with sharpened selectivity while multiple cascaded ASFs can sequentially process more unknown co-channel signals/blockers. For instance, cascading 3 ASFs can create three independent spatial notches to suppress three similar-power blockers (case 1), suppress one strong blocker twice, and reject one other medium -power blocker (case 2), or reject two blockers and beamform on one desired signal (case 3). The notch depth is also tunable by the Main/Aux-path gains if multiple co-channel signals require power equalization.
[0082] As shown in FIG. 8 and FIG. 9, the disclosed technology is the only N-Input-N- Output MIMO RX array in the state-of-the-art with array -based high-order scalable cascadable ASFs for autonomous suppression of multiple unknown blockers and desired signal beamforming supporting Gb/s complex modulations and ps low-latency.
[0083] It is to be understood that the embodiments and claims disclosed herein are not limited in their application to the details of construction and arrangement of the components set forth in the description and illustrated in the drawings. Rather, the description and the drawings provide examples of the embodiments envisioned. The embodiments and claims disclosed
herein are further capable of other embodiments and of being practiced and carried out in various ways. Also, it is to be understood that the phraseology and terminology employed herein are for the purposes of description and should not be regarded as limiting the claims.
[0084] Accordingly, those skilled in the art will appreciate that the conception upon which the application and claims are based may be readily utilized as a basis for the design of other structures, methods, and systems for carrying out the several purposes of the embodiments and claims presented in this application. It is important, therefore, that the claims be regarded as including such equivalent constructions.
Claims
1. A multiple input multiple output (MIMO) scalable cascadable receiver front-end system comprising: two or more frontend inputs configured to receive input signals, each of the two or more frontend inputs in communication with corresponding two or more channels; an autonomous beamformer in communication with each of the two or more channels, the autonomous beamformer comprising a phase detector configured to detect a phase of the input signals; each of the two or more channels comprising: a phase shifter in communication with and controlled by the autonomous beamformer, wherein the autonomous beamformer is configured to output a control voltage to the phase shifter to rotate a phase of a corresponding channel’s input signal to a reference phase according to a detected phase of a strongest signal component in the channel’s input signal; and an auxiliary path in communication with an output of the phase shifter; a summing block in communication with each of the auxiliary paths of the two or more channels, the summing block configured to output a sum of each of the phase-rotated input signals and to output the sum to a backend signal/blocker estimator; a feedforward signal selector in communication with each output of the phase shifter and configured to receive selection control signals from the backend signal/blocker estimator to pass or reject the strongest signal component; and two or more main path channel outputs corresponding to the two or more channels.
2. The system of claim 1, wherein the feedforward signal selector comprises a controllable combiner/subtractor in each of the two or more channels, and wherein the feedforward signal selector is configured to selectively combine or subtract from each of the two or more channels, a scaled output of the summing block based on the selection control signals.
3. The system of claim 2, wherein the backend signal/blocker estimator is configured to determine an unwanted blocker signal from an output of the summing block and to provide a subtraction control signal to the controllable combiner/subtractors to suppress the unwanted
blocker signal from each of the two or more channel outputs by subtracting the scaled output of the summing block from each of the two or more main path channel outputs.
4. The system of claim 2, wherein the backend signal/blocker estimator is configured to determine a wanted signal from an output of the summing block and to provide a combiner control signal to the controllable combiner/subtractor to pass the wanted signal from one or more of the two or more channel outputs by combining the scaled output of the summing block with one or more of two or more main path channel outputs.
5. The system of claim 1, wherein the feedforward signal selector comprises programmable gain amplifiers in communication with outputs of each of the phase shifters.
6. The system of claim 1, wherein the two or more main path channel outputs are configured to feed a backend digital beamformer.
7. The system of claim 1, further comprising one or more subsequent cascaded MIMO systems, wherein the one or more subsequent cascaded MIMO systems comprise a full or partial duplicate of the system of claim 1.
8. The system of claim 7, wherein the two or more main path channel outputs from a previous MIMO system are configured as inputs to the one or more subsequent cascaded MIMO systems.
9. The system of claim 8, wherein each of the subsequent cascaded MIMO systems are configured to suppress an unwanted signal or pass a desired signal.
10. The system of claim 1, wherein the system is configured to select or reject the strongest signal component with a response time between 1 ps and 2 ps.
11. The system of claim 1, wherein the system is configured to select or reject the strongest signal component with a response time of less than 1 ps.
12. The system of claim 1, wherein the two or more frontend inputs in communication with corresponding two or more channels comprise N frontend inputs in communication with corresponding N channels, wherein increasing N increases spatial selectivity of the input signals.
13. The system of claim 12, wherein increasing N enhances extraction of the strongest signal component.
14. The system of claim 12, wherein increasing N maximizes suppression of an unwanted signal.
15. A method comprising: receiving input signals at two or more frontend inputs in communication with corresponding two or more channels of a multiple input multiple output (MIMO) scalable cascadable receiver system, wherein each of the two or more channels comprise: a phase shifter in communication with, and controlled by, an autonomous beamformer; and an auxiliary path in communication with an output of the phase shifter; detecting, with a phase detector of the autonomous beamformer, a phase of the input signals; outputting, by the autonomous beamformer, a control voltage to the phase shifter to rotate a phase of a corresponding channel’s input signal to a reference phase according to a strongest signal component in the channel’s input signal; summing each of the phase-rotated input signals using a summing block in communication with each of the auxiliary paths of the two or more channels; outputting a sum from the summing block to a backend signal/blocker estimator; passing or rejecting the strongest signal component using a feedforward signal selector in communication with each output of the phase shifters, the feedforward signal selector configured to receive selection control signals from the backend signal/blocker estimator to combine with or subtract from each output of the phase shifters, a scaled strongest signal component; and outputting, at two or more main path channel outputs, corresponding combined or subtracted signals from the feedforward signal selector.
16. The method of claim 15, wherein the feedforward signal selector comprises a controllable combiner/subtractor to selectively combine or subtract from each of the two or more channels, a scaled output of the summing block based on the selection control signals.
17. The method of claim 16, further comprising determining, by the backend signal/blocker estimator, an unwanted blocker signal from an output of the summing block and providing a
subtraction control signal to the controllable combiner/subtractors to suppress the unwanted blocker signal from each of the two or more channel outputs by subtracting the scaled output of the summing block from each of the two or more main path channel outputs.
18. The method of claim 16, further comprising determining, by the backend signal/blocker estimator, a wanted signal from an output of the summing block and providing a combiner control signal to the controllable combiner/subtractor to pass the wanted signal from one or more of the two or more channel outputs by combining the scaled output of the summing block with one or more of two or more main path channel outputs.
19. The method of claim 15, further comprising outputting to a subsequent cascaded MIMO system, the two or more main path channel outputs.
20. The method of claim 15, wherein the two or more frontend inputs in communication with corresponding two or more channels comprise N frontend inputs in communication with corresponding N channels, wherein increasing N increases spatial selectivity of the input signals, enhances extraction of the strongest signal component, and maximizes suppression of an unwanted signal.
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