WO2022166170A1 - Method, apparatus, and device for device enumeration for pcie interface, and storage medium - Google Patents

Method, apparatus, and device for device enumeration for pcie interface, and storage medium Download PDF

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Publication number
WO2022166170A1
WO2022166170A1 PCT/CN2021/114221 CN2021114221W WO2022166170A1 WO 2022166170 A1 WO2022166170 A1 WO 2022166170A1 CN 2021114221 W CN2021114221 W CN 2021114221W WO 2022166170 A1 WO2022166170 A1 WO 2022166170A1
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Prior art keywords
pcie
enumeration
preset
signal
pcie interface
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PCT/CN2021/114221
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French (fr)
Chinese (zh)
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王辉
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深圳市广和通无线股份有限公司
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Publication of WO2022166170A1 publication Critical patent/WO2022166170A1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026PCI express

Definitions

  • the present invention relates to the field of communication technologies, and in particular, to a device enumeration method, apparatus, computer device, and computer-readable storage medium for a PCIe interface.
  • PCIe peripheral component interconnect express, a high-speed serial computer expansion bus standard
  • 5G communication module needs to use the PCIe interface for data transmission, and the hardware characteristics of the PCIe interface determine the characteristics of its high-speed communication interface.
  • the hardware characteristics of the PCIe interface also determine the specific conditions required for its enumeration and adaptation. Since the PCIe interface is an end-to-end connection topology, first there must be a peer PCIe device; secondly, the two PCIe devices must belong to In its own interface working mode, one PCIe device is used as the PCIe host (Root Complex), and the other PCIe device is used as the PCIe device end (Endpoint). The enumeration of the last two PCIe devices requires synchronization timing control requirements.
  • the PCIe host needs to initiate a specific enumeration timing control signal; that is, when the PCIe device needs to adapt to the PCIe host, it will The host architecture type of the PCIe host side to adjust the timing matching problem.
  • the Qualcomm platform 5G M.2 package module (a 5G communication module) as the PCIe device side as an example
  • the PCIe device side needs to adapt to the bus device scan of the BIOS of the PCIe host side Action; when the type of the PCIe host side is the embedded ARM architecture, the PCIe device side needs to adapt to the bus device scanning action when the kernel driver of the PCIe host side is loaded; when the PCIe host side is some special host, its booting has multiple stages. Segment loading, the power-on and port enumeration of the PCIe interface are not in the same stage, and the enumeration is performed when needed.
  • the device enumeration of the PCIE interface is shown in FIG. 1.
  • the enumeration of the device is required to be completed during the power-on process of the PCIe device end; If the enumeration is performed, the corresponding resources (such as clock resources) are released, and the enumeration can no longer be completed.
  • the timing requirements on the PCIe host side are relatively high; and each time a different type of PCIe host side is adapted, it is cumbersome and time-consuming. Debugging, and the timing of each debugging is not fully compatible with applications in different scenarios on the PCIe host side, which greatly increases labor costs and is inefficient.
  • the purpose of the present invention is to provide a device enumeration method, device, computer equipment and computer-readable storage medium for PCIe interface, so as to avoid strong dependence on different host architectures, reduce manual debugging costs, and improve enumeration efficiency.
  • the present invention provides a device enumeration method for a PCIe interface, including:
  • the PCIe device side detects the physical link status of the PCIe interface in the kernel stage of booting
  • the preset enumeration signal is detected through the PCIe interface and the device enumeration resource is kept from being released, and the booting of the PCIe device end is continued to be completed;
  • the PCIe device side before detecting the physical link state of the PCIe interface, the PCIe device side further includes:
  • the PCIe device side configures the device tree and selects the PCIe device side mode in the preset booting stage.
  • the preset boot-up stage is specifically the SBL stage of boot-up.
  • the method further includes:
  • the physical link state is detected at preset time intervals
  • the device enumeration resource is kept not released, and the preset enumeration signal is detected through the PCIe interface.
  • the method further includes:
  • a preset enumeration preparation signal is output through the PCIe interface.
  • the PCIe interface outputs a preset enumeration preparation signal, including:
  • the preset signal of the PCIe interface is adjusted to a low level; wherein, the preset enumeration preparation signal is the preset signal of a low level.
  • the preset signal is specifically a PWAKE# signal
  • the preset enumeration signal is specifically a PERST# interrupt signal.
  • the present invention also provides a device enumeration device for a PCIe interface, which is applied to a PCIe device, including:
  • the link detection unit is used to detect the physical link status of the PCIe interface in the kernel stage of booting
  • a signal detection unit configured to detect a preset enumeration signal through the PCIe interface and keep the device enumeration resource from being released when the physical link state is that the connection is not established, and continue to complete the booting of the PCIe device end;
  • the enumeration unit is configured to use the device enumeration resource to complete the enumeration of the PCIe interface with the PCIe host after detecting the preset enumeration signal sent by the PCIe host.
  • the present invention also provides a computer device, comprising:
  • the processor is configured to implement the steps of the device enumeration method for the PCIe interface as described above when executing the computer program.
  • the present invention also provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the steps of the device enumeration method for a PCIe interface as described above are implemented .
  • a device enumeration method for a PCIe interface includes: the PCIe device end detects the physical link state of the PCIe interface in the kernel stage of booting; when the physical link state is that the connection is not established, the PCIe interface Detect the preset enumeration signal and keep the device enumeration resources not released, and continue to complete the booting of the PCIe device; after detecting the preset enumeration signal sent by the PCIe host, use the device enumeration resources to complete PCIe with the PCIe host enumeration of interfaces;
  • the present invention detects the preset enumeration signal through the PCIe interface and keeps the device enumeration resources from being released when the physical link state of the PCIe interface is detected as the connection is not established in the kernel stage of the booting of the PCIe device side, so as to avoid missing PCIe
  • the device enumeration resource is used to complete the enumeration of the PCIe interface with the PCIe host.
  • the present invention also provides a device enumeration device for a PCIe interface, a computer device and a computer-readable storage medium, which also have the above beneficial effects.
  • FIG. 1 is a schematic diagram of a device enumeration method for a PCIe interface in the prior art
  • FIG. 2 is a flowchart of a device enumeration method for a PCIe interface provided by an embodiment of the present invention
  • FIG. 3 is a schematic diagram of a device enumeration method for a PCIe interface provided by an embodiment of the present invention
  • FIG. 4 is a flowchart of another device enumeration method for a PCIe interface provided by an embodiment of the present invention.
  • FIG. 5 is a schematic flowchart of another device enumeration method for a PCIe interface provided by an embodiment of the present invention.
  • FIG. 6 is a structural block diagram of a device enumeration device for a PCIe interface provided by an embodiment of the present invention.
  • FIG. 7 is a schematic structural diagram of a computer device according to an embodiment of the present invention.
  • FIG. 2 is a flowchart of a method for enumerating devices of a PCIe interface according to an embodiment of the present invention.
  • the method can include:
  • Step 101 The PCIe device side detects the physical link state of the PCIe interface in the kernel stage of booting.
  • the PCIe device end in this embodiment may be a PCIe device (such as a 5G communication module) with a PCIe interface, and when the PCIe device is connected to another PCIe device through the PCIe interface, the PCIe device serves as the PCIe device end, Connect another PCIe device as the PCIe host side.
  • a PCIe device such as a 5G communication module
  • the PCIe device serves as the PCIe device end, Connect another PCIe device as the PCIe host side.
  • the specific device type of the PCIe device side in this step can be set by the designer according to practical scenarios and user needs.
  • the PCIe device side can be a 5G communication module, such as a Qualcomm 5G M.2 package module, that is, Qualcomm 5G The M.2 package module can be used as the PCIe device side to complete the enumeration of the PCIe interface with the PCIe host side.
  • the purpose of this step can be that the PCIe device side can determine whether the physical link of the PCIe interface has established a connection (Linkup) by detecting the physical link status of the PCIe interface on the PCIe device side in the kernel stage of booting, that is, Whether the enumeration of the PCIe device has been completed; thus, when the physical link status is the establishment of the connection, it is determined that the timing of the PCIe host has been adapted and the PCIe information of the PCIe device has been recognized, and the enumeration of the PCIe device has been completed; When the state is that the connection is not established, it is determined that the timing of the PCIe host side is not adapted to the PCIe information recognized by the PCIe device side.
  • Linkup connection
  • the PCIe device side can use the driver (such as the PCIe driver) set in the kernel to detect the physical link status of the current PCIe interface when booting to the kernel stage with the official software version; if the physical link status is to establish a connection (Linkup), that is, the enumeration of the PCIe device has occurred, then continue to complete the booting of the PCIe device side; if the physical link status is that the connection is not established, step 102 may be entered.
  • the driver such as the PCIe driver
  • the device enumeration method for the PCIe interface provided in this embodiment can be applied to the PCIe device side, that is, the PCIe device serving as the PCIe device side can execute the method provided in this embodiment, and another PCIe device serving as the PCIe host side can execute the method provided in this embodiment.
  • the device establishes the physical link connection of the PCIe interface and completes the enumeration of the PCIe interface.
  • the PCIe device may also determine the working mode of the PICe interface; when the working mode of the PICe interface is the PCIe device end mode, enter this step; wherein, the PICe interface working mode may be the PCIe device end mode or the PCIe host mode;
  • the PCIe device can determine whether it is the PCIe device side or the PCIe host side by determining the working mode of the PICe interface.
  • the specific way for the PCIe device to determine the working mode of the PICe interface can be set by the designer according to practical scenarios and user requirements.
  • the PCIe device serving as the PCIe device side in this embodiment can configure the device tree in the preset boot phase (such as the SBL phase) before the kernel phase of booting, and select the PCIe device side ( Endpoint) mode; through the process of configuring the device tree added in the preset startup phase, the PCIe device serving as the PCIe device end can directly determine itself as the PCIe device end.
  • the preset boot phase such as the SBL phase
  • Endpoint the PCIe device side
  • Step 102 when the physical link state is that the connection is not established, the preset enumeration signal is detected through the PCIe interface and the device enumeration resource is kept from being released, and the booting of the PCIe device is continued.
  • the purpose of this step can be that the PCIe device side detects the preset enumeration signal of the PCIe interface when the physical link state of the PCIe interface is not established, that is, when no valid enumeration of the PCIe device is found. Determine whether the PCIe host side currently needs to enumerate the PCIe device; by keeping the device enumeration resources (such as clock resources) not released, the enumeration can be quickly completed when the preset enumeration signal is detected subsequently, avoiding the prior art.
  • the PCIe host side misses the enumeration of the power-on and startup of the PCIe device side, and cannot complete the enumeration; and by continuing to complete the boot-up of the PCIe device side, the normal completion of the PCIe device side startup is ensured, avoiding PCIe devices.
  • the PCIe interface completes the dependence of enumeration of the PCIe interface in the boot phase, so that the PCIe device end can still enumerate the PCIe interface after the boot is completed.
  • the specific method for the PCIe device side to detect the preset enumeration signal through the PCIe interface that is, the specific signal setting of the preset enumeration signal of the PCIe interface, can be set by the designer according to practical scenarios and user requirements.
  • the preset enumeration signal can be specifically the PERST# interrupt signal, that is, the PCIe device side can register the PERST# interrupt interface of the PCIe interface, and when the PCIe host side detects that the PCIe host side passes the PCIe When the PERST# interrupt signal is sent by the interface, it is determined that the PCIe host needs to enumerate the PCIe device.
  • the preset enumeration signal can be detected again through the PCIe interface after a preset time, such as detecting the PCIe interface at a preset time interval.
  • Physical link status when the physical link status is that the connection is not established, continue to keep the device enumeration resources not released, and detect the preset enumeration signal through the PCIe interface, so as to periodically query the physical link status of the PCIe interface, and check the preset enumeration signal.
  • the method provided in this embodiment may further include outputting a preset enumeration preparation signal through the PCIe interface when the physical link state is that the connection is not established, so as to output the preset enumeration preparation signal to the PCIe host side,
  • the information that the PCIe interface on the PCIe device side is ready is notified to the PCIe host side, reminding the PCIe host side that a preset enumeration signal can be sent at any time to complete the synchronous enumeration action.
  • Step 103 After detecting the preset enumeration signal sent by the PCIe host, use the device enumeration resource to complete the enumeration of the PCIe interface with the PCIe host.
  • the PCIe device side can determine that the PCIe host side currently needs to perform PCIe device enumeration after detecting the preset enumeration signal sent by the PCIe host side, so that the device enumeration resources can be used to perform PCIe device enumeration.
  • the training of the physical link of the interface is completed, and the enumeration of the PCIe interface on the PCIe host side is completed after the training is completed.
  • the PCIe host side (PCIe host A or PCIe host B) can initiate a preset enumeration signal through the PCIe interface whenever the PCIe interface needs to be used, and use the enumerated host timing adaptation to identify PCIe.
  • the PCIe information on the device side completes the enumeration of the PCIe device, so that the PCIe host side of different architecture types only needs to ensure that the kernel driver enumeration of the PCIe device side is synchronously adapted, and there are no strict requirements on the timing of the PCIe host side at other times.
  • the enumeration is completed during the boot phase of the PCIe host side, and the enumeration can also be completed when the PCIe host side needs to use the PCIe interface, which increases flexibility.
  • the PCIe host side may initiate a preset enumeration signal through the PCIe interface to trigger the enumeration of the PCIe interface, so as to ensure the enumeration success rate of the PCIe interface. For example, after receiving the preset enumeration preparation signal through the PCIe interface or after starting the device for a certain period of time, the PCIe host side can initiate the enumeration of the PCIe interface by initiating the preset enumeration signal through the PCIe interface.
  • the embodiment of the present invention detects the preset enumeration signal through the PCIe interface and keeps the device enumeration resources from releasing when it is detected that the physical link state of the PCIe interface is not established in the kernel stage of the booting of the PCIe device. , to avoid missing the enumeration when the PCIe device is powered on, and the enumeration cannot be completed; and after detecting the preset enumeration signal sent by the PCIe host, the device enumeration resources are used to complete the enumeration with the PCIe host.
  • the enumeration of the PCIe interface enables the PCIe host side to complete the synchronous enumeration action at any time by initiating a preset enumeration signal, avoiding the strong dependence on different host architectures and reducing the timing control requirements for the PCIe host side.
  • the manual debugging cost is reduced and the enumeration efficiency is improved.
  • FIG. 4 is a flowchart of another method for enumerating devices of a PCIe interface according to an embodiment of the present invention.
  • the method can include:
  • Step 201 the PCIe device side configures the device tree in the preset booting stage, and selects the PCIe device side mode.
  • the preset booting stage in this step may be a preset booting stage before the kernel stage in the booting process of the PCIe device side.
  • the specific settings of the preset startup stage in this step can be set by the designer according to practical scenarios and user needs.
  • the preset startup stage can be It is the SBL (Second BootLoader stage, the second boot stage) stage of the boot-up of the Qualcomm 5G M.2 package module.
  • the device tree can be configured in the SBL stage, and the PCIe device side can be selected.
  • this embodiment enables the Qualcomm 5G M.2 package module to determine that it can be used as a PCIe device end through the process of configuring the device tree added in the SBL stage of the Qualcomm 5G M.2 package module.
  • Step 202 Detect the physical link state of the PCIe interface in the kernel stage of booting.
  • the driver (such as the PCIe driver) set in the kernel can be used to detect the physical link status of the current PCIe interface; if the physical link status of the PCIe interface is Linkup , it can be determined that the enumeration of the PCIe device has occurred, that is, the host timing on the PCIe host side has been adapted to identify the PCIe information on the PCIe device side, such as the PCIe information of the Qualcomm 5G M.2 package module on the PCIe device side.
  • Step 203 When the physical link state is that the connection is not established, output a preset enumeration preparation signal through the PCIe interface.
  • the purpose of this step can be that when the PCIe device side detects that the physical link state of the current PCIe interface is not established, that is, when no valid enumeration of the PCIe device is found, control the output of the preset enumeration of the PCIe interface.
  • the ready signal is used to trigger and prompt the PCIe host side that the PCIe device side is ready. After waiting for the PCIe host side to be ready, a preset enumeration signal is initiated.
  • the specific way for the PCIe device side to output the preset enumeration preparation signal through the PCIe interface can be set by the designer according to practical scenarios and user requirements.
  • the preset enumeration preparation signal can be pulled low or pulled High preset signal of PCIe interface to always trigger PCIe host side.
  • the PCIe device side can adjust the preset signal of the PCIe interface to a low level, that is, pull down the preset signal to always trigger the PCIe host side; wherein, the preset enumeration preparation signal is a preset signal with a low level; correspondingly Yes, the PCIe host and standby end can determine that the PCIe device end has completed preparation for enumeration when detecting a low-level preset signal through the PCIe interface.
  • the preset enumeration ready signal may also be a preset interrupt signal of the PCIe interface.
  • the PCIe device side can output a preset enumeration preparation signal to the PCIe host side through the PCIe interface, which triggers a notification to the PCIe host side that the PCIe device side is ready, this embodiment does not impose any restrictions.
  • the above-mentioned preset signal can be specifically the PWAKE# signal of the PCIe interface.
  • the kernel of the Qualcomm 5G M.2 package module can drive the Control the PWAKE# signal to be pulled low, so that after the PCIe host side detects the pulled PWAKE# signal through the PCIe interface, it can be determined that the Qualcomm 5G M.2 package module is ready.
  • Step 204 Detect the preset enumeration signal through the PCIe interface and keep the device enumeration resources from releasing, and continue to complete the booting of the PCIe device.
  • Step 205 After detecting the preset enumeration signal sent by the PCIe host, use the device enumeration resource to complete the enumeration of the PCIe interface with the PCIe host.
  • step 204 and step 205 are similar to step 102 and step 103, and are not repeated here.
  • the PCIe device end may also stop outputting the preset enumeration preparation signal through the PCIe interface.
  • the preset enumeration preparation signal is a pulled PWAKE# signal (ie, the preset signal)
  • the PCIe device side can detect the PERST# interrupt signal triggered by the PCIe host side (ie, the preset enumeration signal). ), control the high PWAKE# signal.
  • Step 206 When the preset enumeration signal is not detected, the physical link status is detected at preset time intervals.
  • the preset enumeration signal when the preset enumeration signal is not detected, the physical link status of the PCIe interface is detected regularly by detecting the physical link status at preset time intervals, so that the physical link status continues to be undetected.
  • the preset enumeration signal of the PCIe interface is detected, and until the preset enumeration signal sent by the PCIe host end is detected, the process proceeds to step 205 to complete the enumeration of the PCIe interface.
  • the Qualcomm 5G M.2 package module can detect the PERST# interrupt signal (ie the preset enumeration signal) triggered by the PCIe host side ), regularly detect the physical link status of the PCIe interface, and wait for the PERST# interrupt signal triggered by the PCIe host.
  • the PERST# interrupt signal ie the preset enumeration signal
  • Step 207 when the physical link state is that the connection is not established, continue to keep the device enumeration resource not released, output a preset enumeration preparation signal through the PCIe interface, and detect the preset enumeration signal.
  • this step may be that when the PCIe device detects the physical link of the PCIe interface at preset time intervals, each time it detects that the physical link state is not established, continue to keep the device enumeration resources not released, and The preset enumeration signal is detected through the PCIe interface, and the PERST# interrupt signal triggered by the PCIe host end is waited, so that after detecting the preset enumeration signal, the process proceeds to step 205 to complete the enumeration of the PCIe interface.
  • the embodiment of the present invention outputs a preset enumeration preparation signal through the PCIe interface when the physical link state is not established, so that the PCIe host can know the PCIe interface of the PCIe device through the preset enumeration preparation signal
  • the information that is ready ensures that the PCIe host can complete the synchronous enumeration action by initiating a preset enumeration signal at any time in the future, ensuring the enumeration success rate of the PCIe interface.
  • the embodiments of the present invention further provide a device enumeration device for a PCIe interface.
  • the device enumeration device for a PCIe interface described below and the device enumeration method for a PCIe interface described above may correspond to each other. Reference.
  • FIG. 6 is a structural block diagram of a device enumeration device for a PCIe interface according to an embodiment of the present invention.
  • the device is applied to the PCIe device side, and can include:
  • the link detection unit 10 is used for detecting the physical link state of the PCIe interface in the kernel stage of booting
  • the signal detection unit 20 is used to detect the preset enumeration signal through the PCIe interface and keep the device enumeration resource from releasing when the physical link state is that the connection is not established, and continue to complete the booting of the PCIe device end;
  • the enumeration unit 30 is configured to use the device enumeration resource to complete the enumeration of the PCIe interface with the PCIe host after detecting the preset enumeration signal sent by the PCIe host.
  • the device may also include:
  • the device tree configuration unit is used to configure the device tree and select the PCIe device side mode in the preset boot stage before the kernel stage.
  • the preset startup stage is specifically the SBL stage of startup.
  • the device may also include:
  • the timing detection unit is used to detect the physical link state at preset time intervals when the preset enumeration signal is not detected;
  • the signal waiting unit is used to continue to keep the device enumeration resources from releasing when the physical link state is that the connection is not established, and to detect the preset enumeration signal through the PCIe interface.
  • the device may also include:
  • the signal output unit is configured to output a preset enumeration preparation signal through the PCIe interface when the physical link state is that the connection is not established.
  • the signal output unit may be specifically configured to adjust the preset signal of the PCIe interface to a low level; wherein the preset enumeration preparation signal is a preset signal of a low level.
  • the preset signal is specifically the PWAKE# signal
  • the preset enumeration signal is specifically the PERST# interrupt signal.
  • the embodiment of the present invention utilizes the signal detection unit 20 to detect the preset enumeration signal through the PCIe interface and keep the device when it is detected that the physical link state of the PCIe interface is not established in the kernel stage of booting of the PCIe device side.
  • the enumeration resources are not released, which avoids the situation where the enumeration cannot be completed after the enumeration of the power-on and power-on of the PCIe device side is missed; and the enumeration unit 30 detects the preset enumeration signal sent by the PCIe host side, and uses the device Enumerate resources and complete PCIe interface enumeration with the PCIe host, so that the PCIe host can complete the synchronous enumeration action at any time by initiating a preset enumeration signal, avoiding strong dependence on different host architectures and reducing The timing control requirements for the PCIe host side are reduced, the manual debugging cost is reduced, and the enumeration efficiency is improved.
  • an embodiment of the present invention further provides a computer device, and a computer device described below and a device enumeration method for a PCIe interface described above may refer to each other correspondingly.
  • FIG. 7 is a schematic structural diagram of a computer device according to an embodiment of the present invention.
  • the computer equipment may include:
  • the processor D2 is configured to implement the steps of the device enumeration method for the PCIe interface provided by the above method embodiments when executing the computer program.
  • the device enumeration method of the PCIe interface provided by the above method embodiments can be applied to the computer device provided by this embodiment; correspondingly, the computer device provided by this embodiment may be specifically capable of serving as a PCIe device terminal A module (or module) that implements the device enumeration function of the PCIe interface or a terminal device containing a module, etc.
  • the terminal device can be a mobile terminal and/or a smart device, etc., and the mobile terminal can be a mobile phone, a tablet computer, and a laptop computer.
  • the smart device may be at least one of a smart watch, a smart refrigerator, a smart speaker, a smart washing machine, a smart TV, etc.
  • the modules may be a 2G communication module, a 3G communication module, a 4G communication module and a 5G communication module.
  • At least one of communication modules (such as Qualcomm 5G M.2 package modules), etc.
  • embodiments of the present invention further provide a computer-readable storage medium, and a computer-readable storage medium described below and a device enumeration method for a PCIe interface described above may correspond to each other. Reference.
  • a computer-readable storage medium where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, implements the steps of the PCIe interface device enumeration method in the above method embodiment.
  • the computer-readable storage medium may specifically be various storable program codes such as a USB flash drive, a removable hard disk, a read-only memory (Read-Only Memory, ROM), a random access memory (Random Access Memory, RAM), a magnetic disk, or an optical disk. computer-readable storage medium.

Abstract

A method, apparatus, computer device for device enumeration for a PCIe interface, and a computer-readable storage medium. The method comprises: while a PCIe endpoint is in a kernel stage of booting and startup, detecting a physical link state of a PCIe interface; insofar as the physical link state is no connection established, detecting for a preset enumeration signal via the PCIe interface, keeping a device enumeration resource from being released, and continuing to complete the booting and startup of the PCIe endpoint; and when the preset enumeration signal transmitted by a PCIe root complex is detected, utilizing the device enumeration resource to complete the enumeration of the PCIe interface with the PCIe root complex. The present invention avoids a case in which enumeration can no longer be completed once the enumeration during the power-on and booting of a PCIe device is missed; moreover, by detecting the preset enumeration signal, the PCIe root complex is allowed to complete simultaneous enumerations at any time, thus avoiding strong reliance on different host architectures, and reducing the requirement on timing control with respect to the PCIe root complex.

Description

PCIe接口的设备枚举方法、装置、设备及存储介质Device enumeration method, device, device and storage medium for PCIe interface
本申请要求于2021年02月04日提交中国专利局、申请号为202110155005.1、发明名称为“PCIe接口的设备枚举方法、装置、设备及存储介质”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。This application claims the priority of the Chinese patent application with the application number 202110155005.1 and the invention titled "Device Enumeration Method, Device, Device and Storage Medium for PCIe Interface" filed with the China Patent Office on February 4, 2021, the entire contents of which are Incorporated herein by reference.
技术领域technical field
本发明涉及通信技术领域,特别涉及一种PCIe接口的设备枚举方法、装置、计算机设备及计算机可读存储介质。The present invention relates to the field of communication technologies, and in particular, to a device enumeration method, apparatus, computer device, and computer-readable storage medium for a PCIe interface.
背景技术Background technique
随着现代社会科技的发展,计算机(PC)之间的高速通信技术得到了广泛的应用。PCIe(peripheral component interconnect express,一种高速串行计算机扩展总线标准)接口最早用于PC上的扩展插槽接口,用于高速接口的设备之间传输数据;随着5G时代的到来,为了更好的满足网络对大数据传输的需求,5G通信模块需要用到PCIe接口做数据传输,而PCIe接口的硬件特性决定了其高速通信接口的特性。With the development of science and technology in modern society, high-speed communication technology between computers (PCs) has been widely used. PCIe (peripheral component interconnect express, a high-speed serial computer expansion bus standard) interface was first used as an expansion slot interface on a PC to transmit data between high-speed interface devices; with the advent of the 5G era, in order to better In order to meet the needs of the network for big data transmission, the 5G communication module needs to use the PCIe interface for data transmission, and the hardware characteristics of the PCIe interface determine the characteristics of its high-speed communication interface.
PCIe接口的硬件特性也决定了其枚举适配所需要的特定条件,由于PCIe接口是一种端对端的连接拓扑模式,所以首先要有一个对端PCIe设备;其次两个PCIe设备需要有属于自己的接口工作模式,一个PCIe设备作为PCIe主机端(Root Complex),另外一个PCIe设备作为PCIe设备端(Endpoint);最后两个PCIe设备的枚举需要有同步时序控制要求。The hardware characteristics of the PCIe interface also determine the specific conditions required for its enumeration and adaptation. Since the PCIe interface is an end-to-end connection topology, first there must be a peer PCIe device; secondly, the two PCIe devices must belong to In its own interface working mode, one PCIe device is used as the PCIe host (Root Complex), and the other PCIe device is used as the PCIe device end (Endpoint). The enumeration of the last two PCIe devices requires synchronization timing control requirements.
目前,PCIe设备端对接适配各种类型的PCIe主机端时,需要PCIe主机端发起特定的枚举时序控制信号;也就是说,PCIe设备端需要在适配PCIe主机端的时候,会依据特定的PCIe主机端的主机架构类型来调整时序的匹配问题。以高通平台5G M.2封装模块(一种5G通信模块)作为PCIe设备端为例,PCIe主机端的类型为带BIOS控制的x86架构时,PCIe设备端需要适配PCIe主机端的BIOS的总线设备扫描动作;PCIe主机端的类型是嵌入式的ARM架构时,PCIe设备端需要适配PCIe主机端的内核驱动加载时的总线设备扫描动作;PCIe主机端为一些特殊的主机时,其开机有多个阶段的分段 加载,PCIe接口的上电和端口枚举不在同一个阶段,按需使用时才进行枚举。At present, when the PCIe device is connected to various types of PCIe hosts, the PCIe host needs to initiate a specific enumeration timing control signal; that is, when the PCIe device needs to adapt to the PCIe host, it will The host architecture type of the PCIe host side to adjust the timing matching problem. Taking the Qualcomm platform 5G M.2 package module (a 5G communication module) as the PCIe device side as an example, when the PCIe host side is of the x86 architecture with BIOS control, the PCIe device side needs to adapt to the bus device scan of the BIOS of the PCIe host side Action; when the type of the PCIe host side is the embedded ARM architecture, the PCIe device side needs to adapt to the bus device scanning action when the kernel driver of the PCIe host side is loaded; when the PCIe host side is some special host, its booting has multiple stages. Segment loading, the power-on and port enumeration of the PCIe interface are not in the same stage, and the enumeration is performed when needed.
现有技术中,PCIE接口的设备枚举如图1所示,针对特定的每种主机,要求PCIe设备端上电开机的过程中要完成设备的枚举;而错过了PCIe设备端上电开机的枚举,就释放了相应的资源(如时钟资源),无法再完成枚举,对PCIe主机端的时序要求比较高;并且每次适配不同类型的PCIe主机端时,均需要繁琐且耗时的调试,并且每一次调试的时序并不能全部兼容不同PCIe主机端的不同场景的应用,极大的增加的人力成本,且效率低。In the prior art, the device enumeration of the PCIE interface is shown in FIG. 1. For each specific host, the enumeration of the device is required to be completed during the power-on process of the PCIe device end; If the enumeration is performed, the corresponding resources (such as clock resources) are released, and the enumeration can no longer be completed. The timing requirements on the PCIe host side are relatively high; and each time a different type of PCIe host side is adapted, it is cumbersome and time-consuming. Debugging, and the timing of each debugging is not fully compatible with applications in different scenarios on the PCIe host side, which greatly increases labor costs and is inefficient.
因此,如何能够避免PCIe接口的设备枚举对不同主机架构的强依赖性,减少针对不同主机的人工调试成本,提高枚举效率,是现今急需解决问题。Therefore, how to avoid the strong dependence of the device enumeration of the PCIe interface on different host architectures, reduce the manual debugging cost for different hosts, and improve the enumeration efficiency is an urgent problem to be solved today.
发明内容SUMMARY OF THE INVENTION
本发明的目的是提供一种PCIe接口的设备枚举方法、装置、计算机设备及计算机可读存储介质,以避免对不同主机架构的强依赖性,减少人工调试成本,提高枚举效率。The purpose of the present invention is to provide a device enumeration method, device, computer equipment and computer-readable storage medium for PCIe interface, so as to avoid strong dependence on different host architectures, reduce manual debugging costs, and improve enumeration efficiency.
为解决上述技术问题,本发明提供一种PCIe接口的设备枚举方法,包括:In order to solve the above technical problems, the present invention provides a device enumeration method for a PCIe interface, including:
PCIe设备端在开机启动的内核阶段,检测PCIe接口的物理链路状态;The PCIe device side detects the physical link status of the PCIe interface in the kernel stage of booting;
在所述物理链路状态为未建立连接时,通过所述PCIe接口检测预设枚举信号且保持设备枚举资源不释放,并继续完成所述PCIe设备端的开机启动;When the physical link state is that the connection is not established, the preset enumeration signal is detected through the PCIe interface and the device enumeration resource is kept from being released, and the booting of the PCIe device end is continued to be completed;
检测到PCIe主机端发送的所述预设枚举信号后,利用所述设备枚举资源,与所述PCIe主机端完成所述PCIe接口的枚举。After detecting the preset enumeration signal sent by the PCIe host, use the device enumeration resource to complete the enumeration of the PCIe interface with the PCIe host.
可选的,所述PCIe设备端在开机启动的内核阶段,检测PCIe接口的物理链路状态之前,还包括:Optionally, before detecting the physical link state of the PCIe interface, the PCIe device side further includes:
所述PCIe设备端在预设开机启动阶段,配置设备树,选择PCIe设备端模式。The PCIe device side configures the device tree and selects the PCIe device side mode in the preset booting stage.
可选的,所述PCIe设备端具体为高通5G M.2封装模块时,所述预设开机启动阶段具体为开机启动的SBL阶段。Optionally, when the PCIe device side is specifically a Qualcomm 5G M.2 package module, the preset boot-up stage is specifically the SBL stage of boot-up.
可选的,该方法还包括:Optionally, the method further includes:
未检测到所述预设枚举信号时,按预设时间间隔检测所述物理链路状态;When the preset enumeration signal is not detected, the physical link state is detected at preset time intervals;
在所述物理链路状态为未建立连接时,继续保持设备枚举资源不释放,并通过所述PCIe接口检测所述预设枚举信号。When the state of the physical link is that the connection is not established, the device enumeration resource is kept not released, and the preset enumeration signal is detected through the PCIe interface.
可选的,该方法还包括:Optionally, the method further includes:
在所述物理链路状态为未建立连接时,通过所述PCIe接口输出预设枚举准备信号。When the physical link state is that the connection is not established, a preset enumeration preparation signal is output through the PCIe interface.
可选的,所述PCIe接口输出预设枚举准备信号,包括:Optionally, the PCIe interface outputs a preset enumeration preparation signal, including:
将所述PCIe接口的预设信号调整为低电平;其中,所述预设枚举准备信号为低电平的所述预设信号。The preset signal of the PCIe interface is adjusted to a low level; wherein, the preset enumeration preparation signal is the preset signal of a low level.
可选的,所述PCIe设备端具体为高通5G M.2封装模块时,所述预设信号具体为PWAKE#信号,所述预设枚举信号具体为PERST#中断信号。Optionally, when the PCIe device end is specifically a Qualcomm 5G M.2 package module, the preset signal is specifically a PWAKE# signal, and the preset enumeration signal is specifically a PERST# interrupt signal.
本发明还提供了一种PCIe接口的设备枚举装置,应用于PCIe设备端,包括:The present invention also provides a device enumeration device for a PCIe interface, which is applied to a PCIe device, including:
链路检测单元,用于在开机启动的内核阶段,检测PCIe接口的物理链路状态;The link detection unit is used to detect the physical link status of the PCIe interface in the kernel stage of booting;
信号检测单元,用于在所述物理链路状态为未建立连接时,通过所述PCIe接口检测预设枚举信号且保持设备枚举资源不释放,并继续完成所述PCIe设备端的开机启动;a signal detection unit, configured to detect a preset enumeration signal through the PCIe interface and keep the device enumeration resource from being released when the physical link state is that the connection is not established, and continue to complete the booting of the PCIe device end;
枚举单元,用于检测到PCIe主机端发送的所述预设枚举信号后,利用所述设备枚举资源,与所述PCIe主机端完成所述PCIe接口的枚举。The enumeration unit is configured to use the device enumeration resource to complete the enumeration of the PCIe interface with the PCIe host after detecting the preset enumeration signal sent by the PCIe host.
本发明还提供了一种计算机设备,包括:The present invention also provides a computer device, comprising:
存储器,用于存储计算机程序;memory for storing computer programs;
处理器,用于执行所述计算机程序时实现如上述所述的PCIe接口的设备枚举方法的步骤。The processor is configured to implement the steps of the device enumeration method for the PCIe interface as described above when executing the computer program.
本发明还提供了一种计算机可读存储介质,所述计算机可读存储介质上存储有计算机程序,所述计算机程序被处理器执行时实现如上述所述的PCIe接口的设备枚举方法的步骤。The present invention also provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the steps of the device enumeration method for a PCIe interface as described above are implemented .
本发明所提供的一种PCIe接口的设备枚举方法,包括:PCIe设备端在开机启动的内核阶段,检测PCIe接口的物理链路状态;在物理链路状态为未建立连接时,通过PCIe接口检测预设枚举信号且保持设备枚举资源不释放,并继续完成PCIe设备端的开机启动;检测到PCIe主机端发送的预设枚举信号后,利用设备枚举资源,与PCIe主机端完成PCIe接口的枚举;A device enumeration method for a PCIe interface provided by the present invention includes: the PCIe device end detects the physical link state of the PCIe interface in the kernel stage of booting; when the physical link state is that the connection is not established, the PCIe interface Detect the preset enumeration signal and keep the device enumeration resources not released, and continue to complete the booting of the PCIe device; after detecting the preset enumeration signal sent by the PCIe host, use the device enumeration resources to complete PCIe with the PCIe host enumeration of interfaces;
可见,本发明在PCIe设备端的开机启动的内核阶段检测到PCIe接口的物理链路状态为未建立连接时,通过PCIe接口检测预设枚举信号且保持设备枚举资源不释放,避免了错过PCIe设备端上电开机的枚举,便无法再完成枚举的情况;并且通过检测到PCIe主机端发送的预设枚举信号后,利用设备枚举资源,与PCIe主机端完成PCIe接口的枚举,使得PCIe主机端通过发起预设枚举信号,便可在任何时候完成同步枚举动作,避免了对不同主机架构的强依赖性,降低了对PCIe主机端的时序控制要求,减少了人工调试成本,提高了枚举效率。此外,本发明还提供了一种PCIe接口的设备枚举装置、计算机设备及计算机可读存储介质,同样具有上述有益效果。It can be seen that the present invention detects the preset enumeration signal through the PCIe interface and keeps the device enumeration resources from being released when the physical link state of the PCIe interface is detected as the connection is not established in the kernel stage of the booting of the PCIe device side, so as to avoid missing PCIe When the enumeration of the device is powered on and turned on, the enumeration cannot be completed; and after detecting the preset enumeration signal sent by the PCIe host, the device enumeration resource is used to complete the enumeration of the PCIe interface with the PCIe host. , so that the PCIe host side can complete the synchronous enumeration action at any time by initiating a preset enumeration signal, avoiding strong dependence on different host architectures, reducing the timing control requirements for the PCIe host side, and reducing manual debugging costs , which improves the enumeration efficiency. In addition, the present invention also provides a device enumeration device for a PCIe interface, a computer device and a computer-readable storage medium, which also have the above beneficial effects.
附图说明Description of drawings
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据提供的附图获得其他的附图。In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the following briefly introduces the accompanying drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only It is an embodiment of the present invention. For those of ordinary skill in the art, other drawings can also be obtained according to the provided drawings without creative work.
图1为现有技术中的PCIe接口的设备枚举方法的示意图;1 is a schematic diagram of a device enumeration method for a PCIe interface in the prior art;
图2为本发明实施例所提供的一种PCIe接口的设备枚举方法的流程图;2 is a flowchart of a device enumeration method for a PCIe interface provided by an embodiment of the present invention;
图3为本发明实施例所提供的一种PCIe接口的设备枚举方法的示意图;3 is a schematic diagram of a device enumeration method for a PCIe interface provided by an embodiment of the present invention;
图4为本发明实施例所提供的另一种PCIe接口的设备枚举方法的流程图;4 is a flowchart of another device enumeration method for a PCIe interface provided by an embodiment of the present invention;
图5为本发明实施例所提供的另一种PCIe接口的设备枚举方法的流程示意图;5 is a schematic flowchart of another device enumeration method for a PCIe interface provided by an embodiment of the present invention;
图6为本发明实施例所提供的一种PCIe接口的设备枚举装置的结构框图;6 is a structural block diagram of a device enumeration device for a PCIe interface provided by an embodiment of the present invention;
图7为本发明实施例所提供的一种计算机设备的结构示意图。FIG. 7 is a schematic structural diagram of a computer device according to an embodiment of the present invention.
具体实施方式Detailed ways
为使本发明实施例的目的、技术方案和优点更加清楚,下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。In order to make the purposes, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments These are some embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
请参考图2,图2为本发明实施例所提供的一种PCIe接口的设备枚举方法的流程图。该方法可以包括:Please refer to FIG. 2 , which is a flowchart of a method for enumerating devices of a PCIe interface according to an embodiment of the present invention. The method can include:
步骤101:PCIe设备端在开机启动的内核阶段,检测PCIe接口的物理链路状态。Step 101: The PCIe device side detects the physical link state of the PCIe interface in the kernel stage of booting.
其中,本实施例中的PCIe设备端可以为具备有PCIe接口的PCIe设备(如5G通信模块),且该PCIe设备通过该PCIe接口与另一PCIe设备连接时,该PCIe设备作为PCIe设备端,连接的另一PCIe设备作为PCIe主机端。Wherein, the PCIe device end in this embodiment may be a PCIe device (such as a 5G communication module) with a PCIe interface, and when the PCIe device is connected to another PCIe device through the PCIe interface, the PCIe device serves as the PCIe device end, Connect another PCIe device as the PCIe host side.
具体的,对于本步骤中的PCIe设备端的具体设备类型,可以由设计人员根据实用场景和用户需求自行设置,如PCIe设备端可以为5G通信模块,如高通5G M.2封装模块,即高通5G M.2封装模块可以作为PCIe设备端完成与PCIe主机端的PCIe接口的枚举。Specifically, the specific device type of the PCIe device side in this step can be set by the designer according to practical scenarios and user needs. For example, the PCIe device side can be a 5G communication module, such as a Qualcomm 5G M.2 package module, that is, Qualcomm 5G The M.2 package module can be used as the PCIe device side to complete the enumeration of the PCIe interface with the PCIe host side.
可以理解的是,本步骤的目的可以为PCIe设备端在开机启动的内核阶段,通过检测PCIe设备端的PCIe接口的物理链路状态,确定该PCIe接口的物理链路是否建立连接(Linkup),即是否已经完成了PCIe设备的枚举;从而在物理链路状态为建立连接时,确定PCIe主机端的时序已经适配识别到了PCIe设备端的PCIe信息,已经完成了PCIe设备的枚举;在物理链路状态为未建立连接时,确定PCIe主机端的时序未适配识别到PCIe设备端的PCIe信息。It can be understood that the purpose of this step can be that the PCIe device side can determine whether the physical link of the PCIe interface has established a connection (Linkup) by detecting the physical link status of the PCIe interface on the PCIe device side in the kernel stage of booting, that is, Whether the enumeration of the PCIe device has been completed; thus, when the physical link status is the establishment of the connection, it is determined that the timing of the PCIe host has been adapted and the PCIe information of the PCIe device has been recognized, and the enumeration of the PCIe device has been completed; When the state is that the connection is not established, it is determined that the timing of the PCIe host side is not adapted to the PCIe information recognized by the PCIe device side.
具体的,本步骤中PCIe设备端可以在以正式软件版本开机到内核阶段时,利用内核中设置的驱动(如PCIe驱动)检测当前PCIe接口的物理链路状态;若物理链路状态为建立连接(Linkup),即已经发生了PCIe设备的枚 举,则继续完成PCIe设备端的开机启动;若物理链路状态为未建立连接,可以进入步骤102。Specifically, in this step, the PCIe device side can use the driver (such as the PCIe driver) set in the kernel to detect the physical link status of the current PCIe interface when booting to the kernel stage with the official software version; if the physical link status is to establish a connection (Linkup), that is, the enumeration of the PCIe device has occurred, then continue to complete the booting of the PCIe device side; if the physical link status is that the connection is not established, step 102 may be entered.
需要说明的是,本实施例所提供的PCIe接口的设备枚举方法可以应用于PCIe设备端,即作为PCIe设备端的PCIe设备可以执行本实施例所提供的方法,与作为PCIe主机端的另一PCIe设备建立PCIe接口的物理链路连接,完成PCIe接口的枚举。对应的,本步骤之前还可以包括PCIe设备确定PICe接口工作模式;在PICe接口工作模式为PCIe设备端模式时,进入本步骤;其中,PICe接口工作模式可以为PCIe设备端模式或PCIe主机模式;It should be noted that the device enumeration method for the PCIe interface provided in this embodiment can be applied to the PCIe device side, that is, the PCIe device serving as the PCIe device side can execute the method provided in this embodiment, and another PCIe device serving as the PCIe host side can execute the method provided in this embodiment. The device establishes the physical link connection of the PCIe interface and completes the enumeration of the PCIe interface. Correspondingly, before this step, the PCIe device may also determine the working mode of the PICe interface; when the working mode of the PICe interface is the PCIe device end mode, enter this step; wherein, the PICe interface working mode may be the PCIe device end mode or the PCIe host mode;
也就是说,PCIe设备可以通过确定PICe接口工作模式,确定自身是PCIe设备端,还是PCIe主机端。具体的,对于PCIe设备确定PICe接口工作模式的具体方式,可以由设计人员根据实用场景和用户需求自行设置,如可以采用与现有技术中的PICe接口工作模式确定方法相同或相似的方式实现;为了进一步方便PCIe设备确定PICe接口工作模式,本实施例中作为PCIe设备端的PCIe设备可以在开机启动的内核阶段之前的预设开机启动阶段(如SBL阶段),配置设备树,选择PCIe设备端(Endpoint)模式;通过在预设开机启动阶段增加的配置设备树过程,使作为PCIe设备端的PCIe设备可以直接确定自身为PCIe设备端。That is to say, the PCIe device can determine whether it is the PCIe device side or the PCIe host side by determining the working mode of the PICe interface. Specifically, the specific way for the PCIe device to determine the working mode of the PICe interface can be set by the designer according to practical scenarios and user requirements. For example, it can be implemented in the same or similar way as the method for determining the working mode of the PICe interface in the prior art; In order to further facilitate the PCIe device to determine the working mode of the PICe interface, the PCIe device serving as the PCIe device side in this embodiment can configure the device tree in the preset boot phase (such as the SBL phase) before the kernel phase of booting, and select the PCIe device side ( Endpoint) mode; through the process of configuring the device tree added in the preset startup phase, the PCIe device serving as the PCIe device end can directly determine itself as the PCIe device end.
步骤102:在物理链路状态为未建立连接时,通过PCIe接口检测预设枚举信号且保持设备枚举资源不释放,并继续完成PCIe设备端的开机启动。Step 102 : when the physical link state is that the connection is not established, the preset enumeration signal is detected through the PCIe interface and the device enumeration resource is kept from being released, and the booting of the PCIe device is continued.
可以理解的是,本步骤的目的可以为PCIe设备端在PCIe接口的物理链路状态为未建立连接,即未发现有效的PCIe设备的枚举时,通过检测PCIe接口的预设枚举信号,确定PCIe主机端当前是否需要进行PCIe设备的枚举;通过保持设备枚举资源(如时钟资源)不释放,使得后续检测到预设枚举信号时,能够快速完成枚举,避免了现有技术中PCIe主机端错过了PCIe设备端上电开机的枚举,便无法在完成枚举的情况;并且通过继续完成PCIe设备端的开机启动,保证了PCIe设备端的开机启动的正常完成,避免了PCIe设备端在开机阶段完成PCIe接口枚举的依赖性,使PCIe设备端在开机完成后依然能够进行PCIe接口的枚举。It can be understood that the purpose of this step can be that the PCIe device side detects the preset enumeration signal of the PCIe interface when the physical link state of the PCIe interface is not established, that is, when no valid enumeration of the PCIe device is found. Determine whether the PCIe host side currently needs to enumerate the PCIe device; by keeping the device enumeration resources (such as clock resources) not released, the enumeration can be quickly completed when the preset enumeration signal is detected subsequently, avoiding the prior art. The PCIe host side misses the enumeration of the power-on and startup of the PCIe device side, and cannot complete the enumeration; and by continuing to complete the boot-up of the PCIe device side, the normal completion of the PCIe device side startup is ensured, avoiding PCIe devices. The PCIe interface completes the dependence of enumeration of the PCIe interface in the boot phase, so that the PCIe device end can still enumerate the PCIe interface after the boot is completed.
具体的,对于本步骤中PCIe设备端通过PCIe接口检测预设枚举信号的 具体方式,即PCIe接口的预设枚举信号的具体信号设置,可以由设计人员根据实用场景和用户需求自行设置,如PCIe设备端为高通5G M.2封装模块时,预设枚举信号可以具体为PERST#中断信号,即PCIe设备端可以在注册PCIe接口的PERST#中断接口,在检测到PCIe主机端通过PCIe接口发送的PERST#中断信号时,确定PCIe主机端需要进行PCIe设备的枚举。Specifically, in this step, the specific method for the PCIe device side to detect the preset enumeration signal through the PCIe interface, that is, the specific signal setting of the preset enumeration signal of the PCIe interface, can be set by the designer according to practical scenarios and user requirements. For example, when the PCIe device side is a Qualcomm 5G M.2 package module, the preset enumeration signal can be specifically the PERST# interrupt signal, that is, the PCIe device side can register the PERST# interrupt interface of the PCIe interface, and when the PCIe host side detects that the PCIe host side passes the PCIe When the PERST# interrupt signal is sent by the interface, it is determined that the PCIe host needs to enumerate the PCIe device.
对应的,对于本步骤中未检测到PCIe主机端发送的预设枚举信号的情况,可以等待预设时间后再次通过PCIe接口检测预设枚举信号,如按预设时间间隔检测PCIe接口的物理链路状态;在物理链路状态为未建立连接时,继续保持设备枚举资源不释放,并通过PCIe接口检测预设枚举信号,以通过定时查询PCIe接口的物理链路状态,对预设枚举信号进行定时检测;或者直接预设时间间隔通过PCIe接口检测预设枚举信号。本实施例对此不做任何限制。Correspondingly, in the case where the preset enumeration signal sent by the PCIe host side is not detected in this step, the preset enumeration signal can be detected again through the PCIe interface after a preset time, such as detecting the PCIe interface at a preset time interval. Physical link status; when the physical link status is that the connection is not established, continue to keep the device enumeration resources not released, and detect the preset enumeration signal through the PCIe interface, so as to periodically query the physical link status of the PCIe interface, and check the preset enumeration signal. Set the enumeration signal for timing detection; or directly preset the time interval to detect the preset enumeration signal through the PCIe interface. This embodiment does not impose any limitation on this.
进一步的,本实施例所提供的方法还可以包括在物理链路状态为未建立连接时,通过PCIe接口输出预设枚举准备信号,以通过向PCIe主机端输出预设枚举准备信号,将PCIe设备端的PCIe接口已经就绪的信息通知PCIe主机端,提醒PCIe主机端可以随时发送预设枚举信号,完成同步枚举动作。Further, the method provided in this embodiment may further include outputting a preset enumeration preparation signal through the PCIe interface when the physical link state is that the connection is not established, so as to output the preset enumeration preparation signal to the PCIe host side, The information that the PCIe interface on the PCIe device side is ready is notified to the PCIe host side, reminding the PCIe host side that a preset enumeration signal can be sent at any time to complete the synchronous enumeration action.
步骤103:检测到PCIe主机端发送的预设枚举信号后,利用设备枚举资源,与PCIe主机端完成PCIe接口的枚举。Step 103: After detecting the preset enumeration signal sent by the PCIe host, use the device enumeration resource to complete the enumeration of the PCIe interface with the PCIe host.
可以理解的是,本步骤中PCIe设备端可以在检测到PCIe主机端发送的预设枚举信号后,确定PCIe主机端当前需要进行PCIe设备的枚举,从而可以利用设备枚举资源,进行PCIe接口的物理链路的训练,训练完成则与PCIe主机端的PCIe接口的枚举完成。It can be understood that, in this step, the PCIe device side can determine that the PCIe host side currently needs to perform PCIe device enumeration after detecting the preset enumeration signal sent by the PCIe host side, so that the device enumeration resources can be used to perform PCIe device enumeration. The training of the physical link of the interface is completed, and the enumeration of the PCIe interface on the PCIe host side is completed after the training is completed.
相应的,如图3所示,PCIe主机端(PCIe主机A或PCIe主机B)可以在任何需要使用PCIe接口时通过PCIe接口发起预设枚举信号,并利用枚举的主机时序适配识别PCIe设备端的PCIe信息,完成PCIe设备的枚举,使得不同的架构类型的PCIe主机端只需要保证PCIe设备端的内核驱动枚举同步适配即可,其他时间对PCIe主机端的时序没有严格要求,即可以在PCIe主机端开机阶段完成枚举,也可以在PCIe主机端需要使用PCIe接口的时候完成枚举,灵活性增加。Correspondingly, as shown in Figure 3, the PCIe host side (PCIe host A or PCIe host B) can initiate a preset enumeration signal through the PCIe interface whenever the PCIe interface needs to be used, and use the enumerated host timing adaptation to identify PCIe. The PCIe information on the device side completes the enumeration of the PCIe device, so that the PCIe host side of different architecture types only needs to ensure that the kernel driver enumeration of the PCIe device side is synchronously adapted, and there are no strict requirements on the timing of the PCIe host side at other times. The enumeration is completed during the boot phase of the PCIe host side, and the enumeration can also be completed when the PCIe host side needs to use the PCIe interface, which increases flexibility.
具体的,本实施例中PCIe主机端可以在确定PCIe设备端已经完成枚举的准备后,再通过PCIe接口发起预设枚举信号触发PCIe接口的枚举,以保证PCIe接口的枚举成功率,例如PCIe主机端可以在通过PCIe接口接收到预设枚举准备信号后或开机启动一定时间后,再通过PCIe接口发起预设枚举信号触发PCIe接口的枚举。Specifically, in this embodiment, after determining that the PCIe device side has completed the preparation for enumeration, the PCIe host side may initiate a preset enumeration signal through the PCIe interface to trigger the enumeration of the PCIe interface, so as to ensure the enumeration success rate of the PCIe interface. For example, after receiving the preset enumeration preparation signal through the PCIe interface or after starting the device for a certain period of time, the PCIe host side can initiate the enumeration of the PCIe interface by initiating the preset enumeration signal through the PCIe interface.
本实施例中,本发明实施例在PCIe设备端的开机启动的内核阶段检测到PCIe接口的物理链路状态为未建立连接时,通过PCIe接口检测预设枚举信号且保持设备枚举资源不释放,避免了错过PCIe设备端上电开机的枚举,便无法再完成枚举的情况;并且通过检测到PCIe主机端发送的预设枚举信号后,利用设备枚举资源,与PCIe主机端完成PCIe接口的枚举,使得PCIe主机端通过发起预设枚举信号,便可在任何时候完成同步枚举动作,避免了对不同主机架构的强依赖性,降低了对PCIe主机端的时序控制要求,减少了人工调试成本,提高了枚举效率。In this embodiment, the embodiment of the present invention detects the preset enumeration signal through the PCIe interface and keeps the device enumeration resources from releasing when it is detected that the physical link state of the PCIe interface is not established in the kernel stage of the booting of the PCIe device. , to avoid missing the enumeration when the PCIe device is powered on, and the enumeration cannot be completed; and after detecting the preset enumeration signal sent by the PCIe host, the device enumeration resources are used to complete the enumeration with the PCIe host. The enumeration of the PCIe interface enables the PCIe host side to complete the synchronous enumeration action at any time by initiating a preset enumeration signal, avoiding the strong dependence on different host architectures and reducing the timing control requirements for the PCIe host side. The manual debugging cost is reduced and the enumeration efficiency is improved.
请参考图4,图4为本发明实施例所提供的另一种PCIe接口的设备枚举方法的流程图。该方法可以包括:Please refer to FIG. 4 , which is a flowchart of another method for enumerating devices of a PCIe interface according to an embodiment of the present invention. The method can include:
步骤201:PCIe设备端在预设开机启动阶段,配置设备树,选择PCIe设备端模式。Step 201 : the PCIe device side configures the device tree in the preset booting stage, and selects the PCIe device side mode.
其中,本步骤中的预设开机启动阶段可以为预先设置的PCIe设备端的开机启动过程中的内核阶段之前的开机启动阶段。Wherein, the preset booting stage in this step may be a preset booting stage before the kernel stage in the booting process of the PCIe device side.
具体的,对于本步骤中的预设开机启动阶段的具体设置,可以由设计人员根据实用场景和用户需求自行设置,如PCIe设备端为高通5G M.2封装模块时,预设开机启动阶段可以为高通5G M.2封装模块的开机启动的SBL(Second BootLoader stage,第二启动阶段)阶段,高通5G M.2封装模块以正式软件版本开机时,可以SBL阶段配置设备树,选择PCIe设备端(Endpoint)模式;如图5所示,本实施例通过在高通5G M.2封装模块的SBL阶段增加的配置设备树过程,使高通5G M.2封装模块能够确定自身可以作为PCIe设备端。Specifically, the specific settings of the preset startup stage in this step can be set by the designer according to practical scenarios and user needs. For example, when the PCIe device side is a Qualcomm 5G M.2 package module, the preset startup stage can be It is the SBL (Second BootLoader stage, the second boot stage) stage of the boot-up of the Qualcomm 5G M.2 package module. When the Qualcomm 5G M.2 package module is powered on with the official software version, the device tree can be configured in the SBL stage, and the PCIe device side can be selected. (Endpoint) mode; as shown in Figure 5, this embodiment enables the Qualcomm 5G M.2 package module to determine that it can be used as a PCIe device end through the process of configuring the device tree added in the SBL stage of the Qualcomm 5G M.2 package module.
步骤202:在开机启动的内核阶段,检测PCIe接口的物理链路状态。Step 202: Detect the physical link state of the PCIe interface in the kernel stage of booting.
具体的,本步骤中PCIe设备端开机到内核阶段,可以利用内核中设置的驱动(如PCIe驱动)检测当前PCIe接口的物理链路状态;如果PCIe接口的物理链路状态为建立连接(Linkup),则可以确定已经发生了PCIe设备的枚举,即PCIe主机端的主机时序已经适配识别到PCIe设备端的PCIe信息,如作为PCIe设备端的高通5G M.2封装模块的PCIe信息。Specifically, in this step, when the PCIe device is powered on to the kernel stage, the driver (such as the PCIe driver) set in the kernel can be used to detect the physical link status of the current PCIe interface; if the physical link status of the PCIe interface is Linkup , it can be determined that the enumeration of the PCIe device has occurred, that is, the host timing on the PCIe host side has been adapted to identify the PCIe information on the PCIe device side, such as the PCIe information of the Qualcomm 5G M.2 package module on the PCIe device side.
步骤203:在物理链路状态为未建立连接时,通过PCIe接口输出预设枚举准备信号。Step 203: When the physical link state is that the connection is not established, output a preset enumeration preparation signal through the PCIe interface.
可以理解的是,本步骤的目的可以为PCIe设备端在检测到当前PCIe接口的物理链路状态为未建立连接,即未发现有效的PCIe设备的枚举时,控制输出PCIe接口的预设枚举准备信号,用于触发提示PCIe主机端,PCIe设备端已经就绪,等待PCIe主机端就绪后发起预设枚举信号。It can be understood that the purpose of this step can be that when the PCIe device side detects that the physical link state of the current PCIe interface is not established, that is, when no valid enumeration of the PCIe device is found, control the output of the preset enumeration of the PCIe interface. The ready signal is used to trigger and prompt the PCIe host side that the PCIe device side is ready. After waiting for the PCIe host side to be ready, a preset enumeration signal is initiated.
具体的,对于本步骤中PCIe设备端通过PCIe接口输出预设枚举准备信号的具体方式,可以由设计人员根据实用场景和用户需求自行设置,如预设枚举准备信号可以为拉低或拉高的PCIe接口的预设信号,以常触发PCIe主机端。例如PCIe设备端可以将PCIe接口的预设信号调整为低电平,即拉低预设信号,以常触发PCIe主机端;其中,预设枚举准备信号为低电平的预设信号;相应的,PCIe主机备端可以在通过PCIe接口检测到低电平的预设信号时,确定PCIe设备端已经完成枚举的准备。预设枚举准备信号也可以为PCIe接口的预设中断信号。只要PCIe设备端可以通过PCIe接口向PCIe主机端输出预设枚举准备信号,触发提示PCIe主机端该PCIe设备端已经就绪,本实施例对此不做任何限制。Specifically, in this step, the specific way for the PCIe device side to output the preset enumeration preparation signal through the PCIe interface can be set by the designer according to practical scenarios and user requirements. For example, the preset enumeration preparation signal can be pulled low or pulled High preset signal of PCIe interface to always trigger PCIe host side. For example, the PCIe device side can adjust the preset signal of the PCIe interface to a low level, that is, pull down the preset signal to always trigger the PCIe host side; wherein, the preset enumeration preparation signal is a preset signal with a low level; correspondingly Yes, the PCIe host and standby end can determine that the PCIe device end has completed preparation for enumeration when detecting a low-level preset signal through the PCIe interface. The preset enumeration ready signal may also be a preset interrupt signal of the PCIe interface. As long as the PCIe device side can output a preset enumeration preparation signal to the PCIe host side through the PCIe interface, which triggers a notification to the PCIe host side that the PCIe device side is ready, this embodiment does not impose any restrictions.
具体的,PCIe设备端为高通5G M.2封装模块时,如图5所示,上述预设信号可以具体为PCIe接口的PWAKE#信号,本步骤中高通5G M.2封装模块的内核可以驱动控制PWAKE#信号拉低,使PCIe主机端通过PCIe接口检测到拉低的PWAKE#信号后,可以确定高通5G M.2封装模块已经就绪。Specifically, when the PCIe device side is a Qualcomm 5G M.2 package module, as shown in Figure 5, the above-mentioned preset signal can be specifically the PWAKE# signal of the PCIe interface. In this step, the kernel of the Qualcomm 5G M.2 package module can drive the Control the PWAKE# signal to be pulled low, so that after the PCIe host side detects the pulled PWAKE# signal through the PCIe interface, it can be determined that the Qualcomm 5G M.2 package module is ready.
步骤204:通过PCIe接口检测预设枚举信号且保持设备枚举资源不释放,并继续完成PCIe设备端的开机启动。Step 204: Detect the preset enumeration signal through the PCIe interface and keep the device enumeration resources from releasing, and continue to complete the booting of the PCIe device.
步骤205:检测到PCIe主机端发送的预设枚举信号后,利用设备枚举资源,与PCIe主机端完成PCIe接口的枚举。Step 205: After detecting the preset enumeration signal sent by the PCIe host, use the device enumeration resource to complete the enumeration of the PCIe interface with the PCIe host.
具体的,步骤204和步骤205与步骤102和步骤103相似,在此不再赘述。Specifically, step 204 and step 205 are similar to step 102 and step 103, and are not repeated here.
相应的,预设枚举准备信号为用于常触发PCIe主机端的拉低或拉高的PCIe接口的预设信号时,本步骤中PCIe设备端还可以停止通过PCIe接口输出预设枚举准备信号,如图5所示,预设枚举准备信号为拉低的PWAKE#信号(即预设信号)时,PCIe设备端可以检测到PCIe主机端触发的PERST#中断信号(即预设枚举信号)后,控制拉高的PWAKE#信号。Correspondingly, when the preset enumeration preparation signal is a preset signal for the PCIe interface that often triggers the pull-down or pull-up of the PCIe host side, in this step, the PCIe device end may also stop outputting the preset enumeration preparation signal through the PCIe interface. 5 , when the preset enumeration preparation signal is a pulled PWAKE# signal (ie, the preset signal), the PCIe device side can detect the PERST# interrupt signal triggered by the PCIe host side (ie, the preset enumeration signal). ), control the high PWAKE# signal.
步骤206:未检测到预设枚举信号时,按预设时间间隔检测物理链路状态。Step 206: When the preset enumeration signal is not detected, the physical link status is detected at preset time intervals.
可以理解的是,本实施例中在未检测到预设枚举信号时,通过按预设时间间隔检测物理链路状态,定时检测PCIe接口的物理链路状态,从而继续在物理链路状态未建立连接时,检测PCIe接口的预设枚举信号,直至检测到PCIe主机端发送的预设枚举信号进入步骤205,完成PCIe接口的枚举。It can be understood that, in this embodiment, when the preset enumeration signal is not detected, the physical link status of the PCIe interface is detected regularly by detecting the physical link status at preset time intervals, so that the physical link status continues to be undetected. When the connection is established, the preset enumeration signal of the PCIe interface is detected, and until the preset enumeration signal sent by the PCIe host end is detected, the process proceeds to step 205 to complete the enumeration of the PCIe interface.
具体的,PCIe设备端为高通5G M.2封装模块时,如图5所示,高通5G M.2封装模块可以在未检测到PCIe主机端触发的PERST#中断信号(即预设枚举信号)时,定时检测PCIe接口的物理链路状态,等待PCIe主机端触发的PERST#中断信号。Specifically, when the PCIe device side is a Qualcomm 5G M.2 package module, as shown in Figure 5, the Qualcomm 5G M.2 package module can detect the PERST# interrupt signal (ie the preset enumeration signal) triggered by the PCIe host side ), regularly detect the physical link status of the PCIe interface, and wait for the PERST# interrupt signal triggered by the PCIe host.
步骤207:在物理链路状态为未建立连接时,继续保持设备枚举资源不释放,通过PCIe接口输出预设枚举准备信号并检测预设枚举信号。Step 207 : when the physical link state is that the connection is not established, continue to keep the device enumeration resource not released, output a preset enumeration preparation signal through the PCIe interface, and detect the preset enumeration signal.
可以理解的是,本步骤可以为PCIe设备端在按预设时间间隔PCIe接口的检测物理链路时,每次检测到物理链路状态为未建立连接,继续保持设备枚举资源不释放,并通过PCIe接口检测预设枚举信号,等待PCIe主机端触发的PERST#中断信号,从而在检测到预设枚举信号后,进入步骤205,完成PCIe接口的枚举。It can be understood that this step may be that when the PCIe device detects the physical link of the PCIe interface at preset time intervals, each time it detects that the physical link state is not established, continue to keep the device enumeration resources not released, and The preset enumeration signal is detected through the PCIe interface, and the PERST# interrupt signal triggered by the PCIe host end is waited, so that after detecting the preset enumeration signal, the process proceeds to step 205 to complete the enumeration of the PCIe interface.
本实施例中,本发明实施例通过在物理链路状态为未建立连接时,通过PCIe接口输出预设枚举准备信号,使PCIe主机端可以通过预设枚举准备信号了解PCIe设备端的PCIe接口已经就绪的信息,保证PCIe主机端在之后的任何时候发起预设枚举信号,便可完成同步枚举动作,保证PCIe接口的枚举成功率。In this embodiment, the embodiment of the present invention outputs a preset enumeration preparation signal through the PCIe interface when the physical link state is not established, so that the PCIe host can know the PCIe interface of the PCIe device through the preset enumeration preparation signal The information that is ready ensures that the PCIe host can complete the synchronous enumeration action by initiating a preset enumeration signal at any time in the future, ensuring the enumeration success rate of the PCIe interface.
相应于上面的方法实施例,本发明实施例还提供了一种PCIe接口的设备枚举装置,下文描述的PCIe接口的设备枚举装置与上文描述的PCIe接口的设备枚举方法可相互对应参照。Corresponding to the above method embodiments, the embodiments of the present invention further provide a device enumeration device for a PCIe interface. The device enumeration device for a PCIe interface described below and the device enumeration method for a PCIe interface described above may correspond to each other. Reference.
请参考图6,图6为本发明实施例所提供的一种PCIe接口的设备枚举装置的结构框图。该装置应用于PCIe设备端,可以包括:Please refer to FIG. 6. FIG. 6 is a structural block diagram of a device enumeration device for a PCIe interface according to an embodiment of the present invention. The device is applied to the PCIe device side, and can include:
链路检测单元10,用于在开机启动的内核阶段,检测PCIe接口的物理链路状态;The link detection unit 10 is used for detecting the physical link state of the PCIe interface in the kernel stage of booting;
信号检测单元20,用于在物理链路状态为未建立连接时,通过PCIe接口检测预设枚举信号且保持设备枚举资源不释放,并继续完成PCIe设备端的开机启动;The signal detection unit 20 is used to detect the preset enumeration signal through the PCIe interface and keep the device enumeration resource from releasing when the physical link state is that the connection is not established, and continue to complete the booting of the PCIe device end;
枚举单元30,用于检测到PCIe主机端发送的预设枚举信号后,利用设备枚举资源,与PCIe主机端完成PCIe接口的枚举。The enumeration unit 30 is configured to use the device enumeration resource to complete the enumeration of the PCIe interface with the PCIe host after detecting the preset enumeration signal sent by the PCIe host.
可选的,该装置还可以包括:Optionally, the device may also include:
设备树配置单元,用于在内核阶段之前的预设开机启动阶段,配置设备树,选择PCIe设备端模式。The device tree configuration unit is used to configure the device tree and select the PCIe device side mode in the preset boot stage before the kernel stage.
可选的,PCIe设备端具体为高通5G M.2封装模块时,预设开机启动阶段具体为开机启动的SBL阶段。Optionally, when the PCIe device side is specifically a Qualcomm 5G M.2 package module, the preset startup stage is specifically the SBL stage of startup.
可选的,该装置还可以包括:Optionally, the device may also include:
定时检测单元,用于在未检测到预设枚举信号时,按预设时间间隔检测物理链路状态;The timing detection unit is used to detect the physical link state at preset time intervals when the preset enumeration signal is not detected;
信号等待单元,用于在物理链路状态为未建立连接时,继续保持设备枚举资源不释放,并通过PCIe接口检测预设枚举信号。The signal waiting unit is used to continue to keep the device enumeration resources from releasing when the physical link state is that the connection is not established, and to detect the preset enumeration signal through the PCIe interface.
可选的,该装置还可以包括:Optionally, the device may also include:
信号输出单元,用于在物理链路状态为未建立连接时,通过PCIe接口输出预设枚举准备信号。The signal output unit is configured to output a preset enumeration preparation signal through the PCIe interface when the physical link state is that the connection is not established.
可选的,信号输出单元可以具体用于将PCIe接口的预设信号调整为低电平;其中,预设枚举准备信号为低电平的预设信号。Optionally, the signal output unit may be specifically configured to adjust the preset signal of the PCIe interface to a low level; wherein the preset enumeration preparation signal is a preset signal of a low level.
可选的,PCIe设备端具体为高通5G M.2封装模块时,预设信号具体为PWAKE#信号,预设枚举信号具体为PERST#中断信号。Optionally, when the PCIe device end is specifically a Qualcomm 5G M.2 package module, the preset signal is specifically the PWAKE# signal, and the preset enumeration signal is specifically the PERST# interrupt signal.
本实施例中,本发明实施例利用信号检测单元20在PCIe设备端的开机启动的内核阶段检测到PCIe接口的物理链路状态为未建立连接时,通过PCIe接口检测预设枚举信号且保持设备枚举资源不释放,避免了错过PCIe设备端上电开机的枚举,便无法再完成枚举的情况;并且通过枚举单元30检测到PCIe主机端发送的预设枚举信号后,利用设备枚举资源,与PCIe主机端完成PCIe接口的枚举,使得PCIe主机端通过发起预设枚举信号,便可在任何时候完成同步枚举动作,避免了对不同主机架构的强依赖性,降低了对PCIe主机端的时序控制要求,减少了人工调试成本,提高了枚举效率。In this embodiment, the embodiment of the present invention utilizes the signal detection unit 20 to detect the preset enumeration signal through the PCIe interface and keep the device when it is detected that the physical link state of the PCIe interface is not established in the kernel stage of booting of the PCIe device side. The enumeration resources are not released, which avoids the situation where the enumeration cannot be completed after the enumeration of the power-on and power-on of the PCIe device side is missed; and the enumeration unit 30 detects the preset enumeration signal sent by the PCIe host side, and uses the device Enumerate resources and complete PCIe interface enumeration with the PCIe host, so that the PCIe host can complete the synchronous enumeration action at any time by initiating a preset enumeration signal, avoiding strong dependence on different host architectures and reducing The timing control requirements for the PCIe host side are reduced, the manual debugging cost is reduced, and the enumeration efficiency is improved.
相应于上面的方法实施例,本发明实施例还提供了一种计算机设备,下文描述的一种计算机设备与上文描述的一种PCIe接口的设备枚举方法可相互对应参照。Corresponding to the above method embodiments, an embodiment of the present invention further provides a computer device, and a computer device described below and a device enumeration method for a PCIe interface described above may refer to each other correspondingly.
请参考图7,图7为本发明实施例所提供的一种计算机设备的结构示意图。该计算机设备可以包括:Please refer to FIG. 7 , which is a schematic structural diagram of a computer device according to an embodiment of the present invention. The computer equipment may include:
存储器D1,用于存储计算机程序;a memory D1 for storing computer programs;
处理器D2,用于执行计算机程序时实现上述方法实施例所提供的PCIe接口的设备枚举方法的步骤。The processor D2 is configured to implement the steps of the device enumeration method for the PCIe interface provided by the above method embodiments when executing the computer program.
也就是说,上面的方法实施例所提供的PCIe接口的设备枚举方法可以应用于本实施例所提供的计算机设备;相应的,本实施例所提供的计算机设备可以具体为能够作为PCIe设备端实现PCIe接口的设备枚举功能的模块(或称模组)或包含模块的终端设备等,终端设备具体可以为移动终端和/或智能设备等,移动终端具体可以为手机、平板电脑和笔记本电脑等中的至少一种,智能设备具体可以为智能手表、智能冰箱、智能音箱、智能洗衣机和智能电视等中的至少一种,模块可以具体为2G通信模块、3G通信模块、4G通信模块和5G通信模块(如高通5G M.2封装模块)等中的至少一种。That is to say, the device enumeration method of the PCIe interface provided by the above method embodiments can be applied to the computer device provided by this embodiment; correspondingly, the computer device provided by this embodiment may be specifically capable of serving as a PCIe device terminal A module (or module) that implements the device enumeration function of the PCIe interface or a terminal device containing a module, etc. The terminal device can be a mobile terminal and/or a smart device, etc., and the mobile terminal can be a mobile phone, a tablet computer, and a laptop computer. At least one of the smart devices, etc., the smart device may be at least one of a smart watch, a smart refrigerator, a smart speaker, a smart washing machine, a smart TV, etc., and the modules may be a 2G communication module, a 3G communication module, a 4G communication module and a 5G communication module. At least one of communication modules (such as Qualcomm 5G M.2 package modules), etc.
相应于上面的方法实施例,本发明实施例还提供了一种计算机可读存储介质,下文描述的一种计算机可读存储介质与上文描述的一种PCIe接口的设备枚举方法可相互对应参照。Corresponding to the above method embodiments, embodiments of the present invention further provide a computer-readable storage medium, and a computer-readable storage medium described below and a device enumeration method for a PCIe interface described above may correspond to each other. Reference.
一种计算机可读存储介质,该计算机可读存储介质上存储有计算机程序,该计算机程序被处理器执行时实现上述方法实施例的PCIe接口的设备枚举方法的步骤。A computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, implements the steps of the PCIe interface device enumeration method in the above method embodiment.
该计算机可读存储介质具体可以为U盘、移动硬盘、只读存储器(Read-Only Memory,ROM)、随机存取存储器(Random Access Memory,RAM)、磁碟或者光盘等各种可存储程序代码的计算机可读存储介质。The computer-readable storage medium may specifically be various storable program codes such as a USB flash drive, a removable hard disk, a read-only memory (Read-Only Memory, ROM), a random access memory (Random Access Memory, RAM), a magnetic disk, or an optical disk. computer-readable storage medium.
说明书中各个实施例采用递进的方式描述,每个实施例重点说明的都是与其他实施例的不同之处,各个实施例之间相同相似部分互相参见即可。对于实施例公开的装置、计算机设备及计算机可读存储介质而言,由于其与实施例公开的方法相对应,所以描述的比较简单,相关之处参见方法部分说明即可。The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same and similar parts between the various embodiments can be referred to each other. For the apparatuses, computer equipment, and computer-readable storage media disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple, and reference may be made to the descriptions of the methods for related parts.
以上对本发明所提供的一种PCIe接口的设备枚举方法、装置、计算机设备及计算机可读存储介质进行了详细介绍。本文中应用了具体个例对本发明的原理及实施方式进行了阐述,以上实施例的说明只是用于帮助理解本发明的方法及其核心思想。应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明原理的前提下,还可以对本发明进行若干改进和修饰,这些改进和修饰也落入本发明权利要求的保护范围内。The device enumeration method, device, computer device, and computer-readable storage medium for a PCIe interface provided by the present invention have been described in detail above. The principles and implementations of the present invention are described herein by using specific examples, and the descriptions of the above embodiments are only used to help understand the method and the core idea of the present invention. It should be pointed out that for those skilled in the art, without departing from the principle of the present invention, several improvements and modifications can also be made to the present invention, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

Claims (10)

  1. 一种PCIe接口的设备枚举方法,其特征在于,包括:A device enumeration method for a PCIe interface, comprising:
    PCIe设备端在开机启动的内核阶段,检测PCIe接口的物理链路状态;The PCIe device side detects the physical link status of the PCIe interface in the kernel stage of booting;
    在所述物理链路状态为未建立连接时,通过所述PCIe接口检测预设枚举信号且保持设备枚举资源不释放,并继续完成所述PCIe设备端的开机启动;When the physical link state is that the connection is not established, the preset enumeration signal is detected through the PCIe interface and the device enumeration resource is kept from being released, and the booting of the PCIe device is continued;
    检测到PCIe主机端发送的所述预设枚举信号后,利用所述设备枚举资源,与所述PCIe主机端完成所述PCIe接口的枚举。After detecting the preset enumeration signal sent by the PCIe host, use the device enumeration resource to complete the enumeration of the PCIe interface with the PCIe host.
  2. 根据权利要求1所述的PCIe接口的设备枚举方法,其特征在于,所述PCIe设备端在开机启动的内核阶段,检测PCIe接口的物理链路状态之前,还包括:The device enumeration method for a PCIe interface according to claim 1, wherein the PCIe device end further comprises:
    所述PCIe设备端在预设开机启动阶段,配置设备树,选择PCIe设备端模式。The PCIe device side configures the device tree and selects the PCIe device side mode in the preset booting stage.
  3. 根据权利要求2所述的PCIe接口的设备枚举方法,其特征在于,所述PCIe设备端具体为高通5G M.2封装模块时,所述预设开机启动阶段具体为开机启动的SBL阶段。The device enumeration method for a PCIe interface according to claim 2, wherein when the PCIe device end is specifically a Qualcomm 5G M.2 package module, the preset boot-up stage is specifically a boot-up SBL stage.
  4. 根据权利要求1所述的PCIe接口的设备枚举方法,其特征在于,还包括:The device enumeration method for a PCIe interface according to claim 1, further comprising:
    未检测到所述预设枚举信号时,按预设时间间隔检测所述物理链路状态;When the preset enumeration signal is not detected, the physical link status is detected at preset time intervals;
    在所述物理链路状态为未建立连接时,继续保持设备枚举资源不释放,并通过所述PCIe接口检测所述预设枚举信号。When the state of the physical link is that the connection is not established, the device enumeration resource is kept not released, and the preset enumeration signal is detected through the PCIe interface.
  5. 根据权利要求1至4任一项所述的PCIe接口的设备枚举方法,其特征在于,还包括:The device enumeration method for a PCIe interface according to any one of claims 1 to 4, further comprising:
    在所述物理链路状态为未建立连接时,通过所述PCIe接口输出预设枚举准备信号。When the physical link state is that the connection is not established, a preset enumeration preparation signal is output through the PCIe interface.
  6. 根据权利要求5所述的PCIe接口的设备枚举方法,其特征在于,所述PCIe接口输出预设枚举准备信号,包括:The device enumeration method for a PCIe interface according to claim 5, wherein the PCIe interface outputs a preset enumeration preparation signal, comprising:
    将所述PCIe接口的预设信号调整为低电平;其中,所述预设枚举准备 信号为低电平的所述预设信号。The preset signal of the PCIe interface is adjusted to a low level; wherein, the preset enumeration preparation signal is the preset signal of a low level.
  7. 根据权利要求6所述的PCIe接口的设备枚举方法,其特征在于,所述PCIe设备端具体为高通5G M.2封装模块时,所述预设信号具体为PWAKE#信号,所述预设枚举信号具体为PERST#中断信号。The device enumeration method for a PCIe interface according to claim 6, wherein when the PCIe device end is specifically a Qualcomm 5G M.2 package module, the preset signal is specifically a PWAKE# signal, and the preset The enumeration signal is specifically the PERST# interrupt signal.
  8. 一种PCIe接口的设备枚举装置,其特征在于,应用于PCIe设备端,包括:A device enumeration device for a PCIe interface, characterized in that, applied to a PCIe device end, comprising:
    链路检测单元,用于在开机启动的内核阶段,检测PCIe接口的物理链路状态;The link detection unit is used to detect the physical link status of the PCIe interface in the kernel stage of booting;
    信号检测单元,用于在所述物理链路状态为未建立连接时,通过所述PCIe接口检测预设枚举信号且保持设备枚举资源不释放,并继续完成所述PCIe设备端的开机启动;a signal detection unit, configured to detect a preset enumeration signal through the PCIe interface and keep the device enumeration resource from being released when the physical link state is that the connection is not established, and continue to complete the booting of the PCIe device end;
    枚举单元,用于检测到PCIe主机端发送的所述预设枚举信号后,利用所述设备枚举资源,与所述PCIe主机端完成所述PCIe接口的枚举。The enumeration unit is configured to use the device enumeration resource to complete the enumeration of the PCIe interface with the PCIe host after detecting the preset enumeration signal sent by the PCIe host.
  9. 一种计算机设备,其特征在于,包括:A computer equipment, characterized in that, comprising:
    存储器,用于存储计算机程序;memory for storing computer programs;
    处理器,用于执行所述计算机程序时实现如权利要求1至7任一项所述的PCIe接口的设备枚举方法的步骤。The processor is configured to implement the steps of the device enumeration method for the PCIe interface according to any one of claims 1 to 7 when executing the computer program.
  10. 一种计算机可读存储介质,其特征在于,所述计算机可读存储介质上存储有计算机程序,所述计算机程序被处理器执行时实现如权利要求1至7任一项所述的PCIe接口的设备枚举方法的步骤。A computer-readable storage medium, characterized in that a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, a PCIe interface according to any one of claims 1 to 7 is implemented. The steps of the device enumeration method.
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