WO2022134724A1 - Network port provided on pcb and server - Google Patents

Network port provided on pcb and server Download PDF

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Publication number
WO2022134724A1
WO2022134724A1 PCT/CN2021/121883 CN2021121883W WO2022134724A1 WO 2022134724 A1 WO2022134724 A1 WO 2022134724A1 CN 2021121883 W CN2021121883 W CN 2021121883W WO 2022134724 A1 WO2022134724 A1 WO 2022134724A1
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WIPO (PCT)
Prior art keywords
port
shielding
network port
shielding body
pcb
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PCT/CN2021/121883
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French (fr)
Chinese (zh)
Inventor
田立良
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苏州浪潮智能科技有限公司
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Publication of WO2022134724A1 publication Critical patent/WO2022134724A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R13/00Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/648Protective earth or shield arrangements on coupling devices, e.g. anti-static shielding  
    • H01R13/658High frequency shielding arrangements, e.g. against EMI [Electro-Magnetic Interference] or EMP [Electro-Magnetic Pulse]
    • H01R13/6581Shield structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/70Coupling devices
    • H01R12/71Coupling devices for rigid printing circuits or like structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R13/00Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/648Protective earth or shield arrangements on coupling devices, e.g. anti-static shielding  
    • H01R13/658High frequency shielding arrangements, e.g. against EMI [Electro-Magnetic Interference] or EMP [Electro-Magnetic Pulse]
    • H01R13/6591Specific features or arrangements of connection of shield to conductive members
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components

Definitions

  • the present application relates to the field of network ports, in particular to a network port and a server arranged on a PCB board.
  • Electromagnetic harassment is a serious and growing form of environmental pollution, ranging from annoying crackling sounds during broadcast reception to life-threatening accidents caused by disturbed control systems.
  • Radiation harassment is the most important form of interference in electromagnetic harassment. It directly radiates electromagnetic energy in the form of electromagnetic waves, thereby causing damage and interference to the human body and other equipment. Among them, the electromagnetic radiation of the network port is a recognized problem in the industry. Especially under the gigabit network, connecting the server in the shielded room and the computer in the control room through the network cable will produce very strong radiation disturbance.
  • an embodiment of the present application proposes a network port disposed on a PCB board, including:
  • the RJ45 port is provided with a groove
  • the shielding cover includes a first shielding body and a second shielding body arranged oppositely, and the first shielding body and the second shielding body both include folding edges and elastic pieces;
  • the RJ45 port is located between the first shield body and the second shield body; the folded edge is overlapped with the exposed copper foil on the PCB board; the elastic sheet is matched with the groove so that the RJ45 port, the first shield body and the second shield body are fixed to each other.
  • it also includes:
  • the PHY chip is located on the PCB;
  • the PHY chip and the RJ45 port are connected through multiple pairs of differential signal lines.
  • the distance between each pair of the differential signal lines is within a first predetermined interval; the distance between the differential signal lines of different pairs is within a second predetermined interval.
  • the corners of the differential signal lines are greater than a predetermined degree and the number of transition layers on the PCB board is less than a predetermined number of layers.
  • the horizontal distance between the PHY chip and the RJ45 port is within a third preset interval.
  • the distance from the PHY chip to the edge of the PCB is within a fourth preset interval.
  • each of the differential signal lines is connected in parallel with a capacitor near the RJ45 port.
  • the first shield body and the second shield body both include screw flanges, and the PCB board is provided with screw holes;
  • the screw folded edge coincides with the screw hole.
  • the shielding case further includes a connector connecting the first shield body and the second shield body.
  • an embodiment of the present application further provides a server, where the server includes the network port described in any one of the above embodiments.
  • the shielding case can be provided with a folded edge and attached to the exposed copper area of the PCB, so that the shielding case and the PCB can be perfectly overlapped, thereby ensuring the shielding case and the PCB.
  • the shield and the shell of the RJ45 port can be perfectly overlapped, ensuring that the shield and the shell are overlapped with low impedance, so as to ensure its radiation emission performance, thereby enhancing the electromagnetic compatibility performance of the network port.
  • Figure 1 is a schematic diagram of the RJ45 port on the PCB that is located in the middle of the shielding cover but has not been fully overlapped;
  • FIG. 2 is a schematic structural diagram of a shielding case provided by an embodiment of the present application.
  • FIG. 3 is a side view of a first shield body and a folded edge overlapping with a PCB according to an embodiment of the present application;
  • FIG. 4 is a schematic diagram of a connection between an RJ45 port and a PHY chip according to an embodiment of the present application
  • FIG. 5 is another schematic diagram of connection between an RJ45 port and a PHY chip provided by an embodiment of the present application
  • FIG. 6 is a schematic diagram of a body of a server provided by an embodiment of the present application.
  • an embodiment of the present application proposes a network port arranged on a PCB, as shown in Figure 1, which may include:
  • the RJ45 port 2 arranged on the PCB1 board is provided with a groove
  • the shielding cover 3 includes a first shielding body 31 and a second shielding body 32 arranged opposite to each other, and the first shielding body 31 and the second shielding body 32 both include folding edges 311 (321) and elastic pieces 312(322);
  • the RJ45 port 2 is located between the first shielding body 31 and the second shielding body 32 ;
  • the folded edge 311 ( 321 ) is configured so that when the RJ45 port 2 is located in the first shielding body 31 When connecting with the second shielding body 32, it is overlapped with the exposed copper foil on the PCB1 board;
  • the elastic piece 312 (322) is configured to be located when the RJ45 port 2 is located between the first shielding body 31 and the The second shielding body 32 is matched with the groove so that the RJ45 port 2, the first shielding body 31 and the second shielding body 32 are fixed to each other.
  • the folded edges 311 ( 321 ) can be arranged on the shielding cover 3 and attached to the exposed copper area of the PCB1, so that the shielding cover 3 and the PCB1 can be perfectly overlapped, thereby ensuring that the shielding cover 3 and the PCB1 have low impedance. lap.
  • the shielding cover 3 and the shell of the RJ45 port 2 can be perfectly overlapped, ensuring that the shielding cover 3 and the shell are connected with low impedance, thereby ensuring its radiation emission performance, thereby enhancing the electromagnetic compatibility performance of the network port. .
  • the conventional design of the PCB1 is to spray green oil on the surface of the PCB1 (in the PCB1 stack, it is a solidmask layer, and the solidmask layer is a green oil layer).
  • the folded edges 311 (321) on the two shielding bodies 32 can be overlapped with the exposed copper foil on the PCB1, and a pre-set area on the PCB1 can be set as an oil-injection-free design, and the copper foil in this area is exposed to control the shield 3
  • the distance between the board and the PCB1 board is convenient for low-impedance overlap with the shield 3 above.
  • a folded edge 311 (321) is arranged on the shielding cover 3 of the network port.
  • the size of the folded edge 311 (321) and the part of the circuit board not sprayed with green oil are Consistent, so as to ensure that the green oil portion of the folded edge 311 (321) is completely overlapped.
  • a shrapnel 312 (322) is arranged on the overlapping part of the shielding cover 3 and the network port, and the elastic piece 312 (322) is just overlapped on the metal shell of the network port to ensure the low impedance overlap between the shielding cover 3 and the metal shell of the network port. .
  • the bending of the shielding sheet and the injection-free part on the board are completely overlapped to ensure that the shielding cover 3 of the network port and the injection-free part of the main board are overlapped with low impedance.
  • it also includes:
  • the PHY chip is located on the PCB1 board;
  • the PHY chip and the RJ45 port 2 are connected through multiple pairs of differential signal lines.
  • the PHY chip and the RJ45 port 2 can be connected by the following differential signal pairs: GMAC_MD0_P and GMAC_MD0_N, GMAC_MD1_P and GMAC_MD1_N, GMAC_MD2_P and GMAC_MD2_N, GMAC_MD3_P and GMAC_MD3_N.
  • the distance between each pair of the differential signal lines is within a first predetermined interval; the distance between the differential signal lines of different pairs is within a second predetermined interval.
  • the distance between each pair of differential signal lines can be set to 10 to 15mil, that is, the distance between GMAC_MD0_P and GMAC_MD0_N can be 10 to 15mil, the distance between GMAC_MD1_P and GMAC_MD1_N can be 10 to 15mil, GMAC_MD2_P and The distance between GMAC_MD2_N may be 10 to 15 mil, and the distance between GMAC_MD3_P and GMAC_MD3_N may be 10 to 15 mil.
  • the distance between the differential signal lines of different pairs may not be less than seven times the thickness of the dielectric, that is, the value of the distance C in FIG. Good high frequency electromagnetic radiation effect.
  • the corners of the differential signal lines are greater than a predetermined degree and the number of transition layers on the PCB 1 is less than a predetermined number of layers.
  • the corners of the differential signal lines need to be greater than a preset degree, for example, greater than 45°, and when the differential signal lines are routed on the PCB1, the difference exceeds the preset number of layers, such as different more than 2 floors.
  • the horizontal distance between the PHY chip and the RJ45 port 2 is within a third preset interval.
  • the distance from the PHY chip to the edge of the PCB1 board is within a fourth preset interval.
  • the horizontal distance B between the PHY chip and the RJ45 port 2 needs to be within a third preset interval, for example, between 1 inch and 4 inches.
  • the distance A from the PHY chip to the edge of the PCB1 board is within the fourth preset interval, for example, greater than 1 inch.
  • each of the differential signal lines is connected in parallel with a capacitor near the RJ45 port 2 .
  • a capacitor in order to prevent the energy generated by the PHY chip from being transmitted back to the RJ45 port 2, a capacitor can be connected in parallel on the differential signal line at a position close to the RJ45 port 2. Since the size of the energy on the signal line can be adjusted by adjusting the capacitor connected in parallel to the signal line, but if the capacitor is too large, the signal will be easily attenuated, so the size of the capacitor can be 5pf to 33pf.
  • the first shielding body 31 and the second shielding body 32 both include screw flanges 313 (323), and the PCB1 is provided with screw holes 11;
  • the screw flange 313 ( 323 ) coincides with the screw hole 11 .
  • a screw edge 313 (323) can be provided on the first shield body 31 and the second shield body 32 respectively, and a screw hole 11 can be set on the board, and the screw edge 313 (323) and the screw holes 11 on the board can just coincide, increasing the contact between the shield 3 and the board.
  • the shielding case 3 further includes a connecting member 33 , and the connecting member 33 connects the first shielding body 31 and the second shielding body 32 .
  • the first shielding body 31 and the second shielding body 32 may be connected as a whole through a connecting member 33 .
  • a folded edge can be arranged on the shielding cover and attached to the exposed copper area of the PCB, so that the shielding cover and the PCB are perfectly overlapped, thereby ensuring that the shielding cover and the PCB are overlapped with low impedance.
  • the shield and the shell of the RJ45 port can be perfectly overlapped, ensuring that the shield and the shell are overlapped with low impedance, so as to ensure its radiation emission performance, thereby enhancing the electromagnetic compatibility performance of the network port.
  • an embodiment of the present application further provides a server 500, as shown in FIG. mouth 501.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)

Abstract

A network port (500) provided on a PCB (1) and a server (501). The network port (500) comprises: an RJ45 port (2) provided on a PCB (1), grooves being provided on the RJ45 port (2); and a shielding cover (3) comprising a first shielding body (31) and a second shielding body (32) which are provided opposite to each other, the first shielding body (31) and the second shielding body (32) each comprising a folded edge (311, 321) and elastic tabs (312, 322). The RJ45 port (2) is located between the first shielding body (31) and the second shielding body (32); the folded edges (311, 321) are in lap joint with a bare copper foil on the PCB (1); and the elastic tabs (312, 322) match the grooves so that the RJ45 port (2) and the first shielding body (31) and second shielding body (32) are fixed to each other. By providing the folded edges (311, 321) on the shielding cover (3) and attaching same to a bare copper area of the PCB (1), the shielding cover (3) is in lap joint with the PCB (1), and by means of the elastic tabs (312, 322), the shielding cover (3) can be in lap joint with the housing of the RJ45 port (2), so as to ensure that the shielding cover (3) is in low-impedance lap joint with the housing, thereby ensuring the radiation transmission performance and enhancing the electromagnetic compatibility of the network port.

Description

一种设置在PCB板上的网口以及服务器A network port and a server arranged on a PCB board
本申请要求在2020年12月26日提交中国专利局、申请号为202011568750.0、发明名称为“一种设置在PCB板上的网口以及服务器”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。This application claims the priority of the Chinese patent application filed on December 26, 2020 with the application number 202011568750.0 and the invention titled "A network port and server provided on a PCB board", the entire contents of which are by reference Incorporated in this application.
技术领域technical field
本申请涉及网口领域,具体涉及一种设置在PCB板上的网口以及服务器。The present application relates to the field of network ports, in particular to a network port and a server arranged on a PCB board.
背景技术Background technique
电磁骚扰是一项严重并不断增长的环境污染形式,它的影响小至广播接收时产生的让人厌烦的噼啪声,大至因控制系统受干扰而导致的生命事故。Electromagnetic harassment is a serious and growing form of environmental pollution, ranging from annoying crackling sounds during broadcast reception to life-threatening accidents caused by disturbed control systems.
而辐射骚扰是电磁骚扰中最重要的干扰形式,它直接以电磁波的形式向外辐射电磁能量,从而对人体和其他设备造成伤害与干扰。其中网口的电磁辐射是业界公认的难题。尤其是在千兆网络下,通过网线连接屏蔽室里的服务器与控制室里的计算机,会产生非常强的辐射骚扰。Radiation harassment is the most important form of interference in electromagnetic harassment. It directly radiates electromagnetic energy in the form of electromagnetic waves, thereby causing damage and interference to the human body and other equipment. Among them, the electromagnetic radiation of the network port is a recognized problem in the industry. Especially under the gigabit network, connecting the server in the shielded room and the computer in the control room through the network cable will produce very strong radiation disturbance.
因此急需一种能够降低网口辐射的方案。Therefore, a solution that can reduce the radiation of the network port is urgently needed.
发明内容SUMMARY OF THE INVENTION
有鉴于此,为了克服上述问题的至少一个方面,本申请实施例提出一种设置在PCB板上的网口,包括:In view of this, in order to overcome at least one aspect of the above problems, an embodiment of the present application proposes a network port disposed on a PCB board, including:
设置在PCB板上的RJ45端口,所述RJ45端口上设置有凹槽;an RJ45 port arranged on the PCB board, the RJ45 port is provided with a groove;
屏蔽罩,所述屏蔽罩包括相对设置的第一屏蔽体和第二屏蔽体,所述 第一屏蔽体和所述第二屏蔽体均包括折边和弹片;a shielding cover, the shielding cover includes a first shielding body and a second shielding body arranged oppositely, and the first shielding body and the second shielding body both include folding edges and elastic pieces;
其中,所述RJ45端口位于所述第一屏蔽体和所述第二屏蔽体之间;所述折边与所述PCB板上的裸露的铜箔搭接;所述弹片与所述凹槽配合以使所述RJ45端口与所述第一屏蔽体和所述第二屏蔽体相互固定。Wherein, the RJ45 port is located between the first shield body and the second shield body; the folded edge is overlapped with the exposed copper foil on the PCB board; the elastic sheet is matched with the groove so that the RJ45 port, the first shield body and the second shield body are fixed to each other.
在一些实施例中,还包括:In some embodiments, it also includes:
PHY芯片,所述PHY芯片位于所述PCB板上;a PHY chip, the PHY chip is located on the PCB;
其中,所述PHY芯片和所述RJ45端口通过多对差分信号线连接。Wherein, the PHY chip and the RJ45 port are connected through multiple pairs of differential signal lines.
在一些实施例中,每一对所述差分信号线内部之间的距离均处于第一预设区间范围内;不同对的所述差分信号线之间的距离处于第二预设区间内。In some embodiments, the distance between each pair of the differential signal lines is within a first predetermined interval; the distance between the differential signal lines of different pairs is within a second predetermined interval.
在一些实施例中,所述差分信号线的拐角大于预设度数且在所述PCB板上的转层小于预设层数。In some embodiments, the corners of the differential signal lines are greater than a predetermined degree and the number of transition layers on the PCB board is less than a predetermined number of layers.
在一些实施例中,所述PHY芯片与所述RJ45端口之间的水平距离在第三预设区间内。In some embodiments, the horizontal distance between the PHY chip and the RJ45 port is within a third preset interval.
在一些实施例中,所述PHY芯片到所述PCB板的边缘的距离在第四预设区间内。In some embodiments, the distance from the PHY chip to the edge of the PCB is within a fourth preset interval.
在一些实施例中,每一个所述差分信号线均在靠近所述RJ45端口的位置上并联电容。In some embodiments, each of the differential signal lines is connected in parallel with a capacitor near the RJ45 port.
在一些实施例中,所述第一屏蔽体和所述第二屏蔽体均包括螺丝折边,且所述PCB板上设置有螺丝孔;In some embodiments, the first shield body and the second shield body both include screw flanges, and the PCB board is provided with screw holes;
其中,所述螺丝折边与所述螺丝孔重合。Wherein, the screw folded edge coincides with the screw hole.
在一些实施例中,所述屏蔽罩还包括连接件,所述连接件连接所述第一屏蔽体和所述第二屏蔽体。In some embodiments, the shielding case further includes a connector connecting the first shield body and the second shield body.
基于同一申请构思,根据本申请的另一个方面,本申请的实施例还提供了一种服务器,所述服务器包括如上实施例所述的任一项所述的网口。Based on the same application concept, according to another aspect of the present application, an embodiment of the present application further provides a server, where the server includes the network port described in any one of the above embodiments.
本申请具有以下有益技术效果之一:本申请提出的方案通过在屏蔽罩 上可以设置折边并与PCB露铜区进行贴合,使屏蔽罩与PCB进行完美搭接,从而保证屏蔽罩与PCB进行低阻抗搭接。并且通过弹片可以使屏蔽罩和RJ45端口的外壳进行完美搭接,保证屏蔽罩和外壳进行低阻抗搭接,从而保证其辐射发射性能,进而增强网口的电磁兼容性能。The present application has one of the following beneficial technical effects: in the solution proposed by the present application, the shielding case can be provided with a folded edge and attached to the exposed copper area of the PCB, so that the shielding case and the PCB can be perfectly overlapped, thereby ensuring the shielding case and the PCB. Make a low impedance bond. And through the shrapnel, the shield and the shell of the RJ45 port can be perfectly overlapped, ensuring that the shield and the shell are overlapped with low impedance, so as to ensure its radiation emission performance, thereby enhancing the electromagnetic compatibility performance of the network port.
附图说明Description of drawings
为了更清楚地说明本申请实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的实施例。In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the accompanying drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only These are some embodiments of the present application. For those of ordinary skill in the art, other embodiments can also be obtained according to these drawings without creative efforts.
图1为PCB板上RJ45端口位于屏蔽罩中间但还未完全搭接的示意图;Figure 1 is a schematic diagram of the RJ45 port on the PCB that is located in the middle of the shielding cover but has not been fully overlapped;
图2为本申请的实施例提供的屏蔽罩的结构示意图;FIG. 2 is a schematic structural diagram of a shielding case provided by an embodiment of the present application;
图3为本申请的实施例提供的第一屏蔽体与的折边与PCB搭接的侧视图;3 is a side view of a first shield body and a folded edge overlapping with a PCB according to an embodiment of the present application;
图4为本申请的实施例提供的RJ45端口与PHY芯片的连接示意图;FIG. 4 is a schematic diagram of a connection between an RJ45 port and a PHY chip according to an embodiment of the present application;
图5本申请的实施例提供的RJ45端口与PHY芯片的另一连接示意图;FIG. 5 is another schematic diagram of connection between an RJ45 port and a PHY chip provided by an embodiment of the present application;
图6为本申请的实施例提供的服务器的体示意图。FIG. 6 is a schematic diagram of a body of a server provided by an embodiment of the present application.
具体实施方式Detailed ways
为使本申请的目的、技术方案和优点更加清楚明白,以下结合具体实施例,并参照附图,对本申请实施例进一步详细说明。In order to make the objectives, technical solutions and advantages of the present application clearer, the following describes the embodiments of the present application in detail with reference to the accompanying drawings and specific embodiments.
需要说明的是,本申请实施例中所有使用“第一”和“第二”的表述均是为了区分两个相同名称非相同的实体或者非相同的参量,可见“第一”“第二”仅为了表述的方便,不应理解为对本申请实施例的限定,后续实施例对此不再一一说明。It should be noted that all expressions using "first" and "second" in the embodiments of the present application are for the purpose of distinguishing two entities with the same name but not the same or non-identical parameters. It can be seen that "first" and "second" It is only for the convenience of expression and should not be construed as a limitation on the embodiments of the present application, and subsequent embodiments will not describe them one by one.
根据本申请的一个方面,本申请的实施例提出一种设置在PCB板上的 网口,如图1所示,其可以包括:According to an aspect of the present application, an embodiment of the present application proposes a network port arranged on a PCB, as shown in Figure 1, which may include:
设置在PCB1板上的RJ45端口2,所述RJ45端口2上设置有凹槽;The RJ45 port 2 arranged on the PCB1 board is provided with a groove;
屏蔽罩3,所述屏蔽罩3包括相对设置的第一屏蔽体31和第二屏蔽体32,所述第一屏蔽体31和所述第二屏蔽体32均包括折边311(321)和弹片312(322);The shielding cover 3, the shielding cover 3 includes a first shielding body 31 and a second shielding body 32 arranged opposite to each other, and the first shielding body 31 and the second shielding body 32 both include folding edges 311 (321) and elastic pieces 312(322);
其中,所述RJ45端口2位于所述第一屏蔽体31和所述第二屏蔽体32之间;所述折边311(321)构造为当所述RJ45端口2位于所述第一屏蔽体31和所述第二屏蔽体32之间时与所述PCB1板上的裸露的铜箔搭接;所述弹片312(322)构造为当所述RJ45端口2位于所述第一屏蔽体31和所述第二屏蔽体32之间与所述凹槽配合以使所述RJ45端口2与所述第一屏蔽体31和所述第二屏蔽体32相互固定。Wherein, the RJ45 port 2 is located between the first shielding body 31 and the second shielding body 32 ; the folded edge 311 ( 321 ) is configured so that when the RJ45 port 2 is located in the first shielding body 31 When connecting with the second shielding body 32, it is overlapped with the exposed copper foil on the PCB1 board; the elastic piece 312 (322) is configured to be located when the RJ45 port 2 is located between the first shielding body 31 and the The second shielding body 32 is matched with the groove so that the RJ45 port 2, the first shielding body 31 and the second shielding body 32 are fixed to each other.
本申请提出的方案通过在屏蔽罩3上可以设置折边311(321)并与PCB1露铜区进行贴合,使屏蔽罩3与PCB1进行完美搭接,从而保证屏蔽罩3与PCB1进行低阻抗搭接。并且通过弹片312(322)可以使屏蔽罩3和RJ45端口2的外壳进行完美搭接,保证屏蔽罩3和外壳进行低阻抗搭接,从而保证其辐射发射性能,进而增强网口的电磁兼容性能。In the solution proposed in the present application, the folded edges 311 ( 321 ) can be arranged on the shielding cover 3 and attached to the exposed copper area of the PCB1, so that the shielding cover 3 and the PCB1 can be perfectly overlapped, thereby ensuring that the shielding cover 3 and the PCB1 have low impedance. lap. And through the shrapnel 312 (322), the shielding cover 3 and the shell of the RJ45 port 2 can be perfectly overlapped, ensuring that the shielding cover 3 and the shell are connected with low impedance, thereby ensuring its radiation emission performance, thereby enhancing the electromagnetic compatibility performance of the network port. .
在一些实施例中,PCB1的常规设计是在PCB1的表面进行喷绿油设计(在PCB1叠层中是solidmask层,solidmask层是一层绿油层),为了使得第一屏蔽体31和所述第二屏蔽体32上的折边311(321)能够与PCB1上裸露的铜箔搭接,可以在PCB1上预设区域设置成免喷油设计,将这一区域的铜箔裸露,控制屏蔽罩3和PCB1板之间的距离,以方便与上面的屏蔽罩3进行低阻抗搭接。In some embodiments, the conventional design of the PCB1 is to spray green oil on the surface of the PCB1 (in the PCB1 stack, it is a solidmask layer, and the solidmask layer is a green oil layer). The folded edges 311 (321) on the two shielding bodies 32 can be overlapped with the exposed copper foil on the PCB1, and a pre-set area on the PCB1 can be set as an oil-injection-free design, and the copper foil in this area is exposed to control the shield 3 The distance between the board and the PCB1 board is convenient for low-impedance overlap with the shield 3 above.
在一些实施例中,如图2和图3所示,在网口的屏蔽罩3上面设置一个折边311(321),折边311(321)的尺寸和电路板的不喷绿油部分是一致的,从而保证折边311(321)的绿油部分完全进行重叠。在屏蔽罩3和网口的搭接部分设置一个弹片312(322),这个弹片312(322)正好搭接到网口的金属外壳上面,保证屏蔽罩3和网口金属外壳的低阻抗搭接。屏 蔽遮片的折弯和板卡上的免喷油部分完全重叠,以保证网口的屏蔽罩3和主板免喷油部分低阻抗进行搭接。In some embodiments, as shown in FIG. 2 and FIG. 3 , a folded edge 311 (321) is arranged on the shielding cover 3 of the network port. The size of the folded edge 311 (321) and the part of the circuit board not sprayed with green oil are Consistent, so as to ensure that the green oil portion of the folded edge 311 (321) is completely overlapped. A shrapnel 312 (322) is arranged on the overlapping part of the shielding cover 3 and the network port, and the elastic piece 312 (322) is just overlapped on the metal shell of the network port to ensure the low impedance overlap between the shielding cover 3 and the metal shell of the network port. . The bending of the shielding sheet and the injection-free part on the board are completely overlapped to ensure that the shielding cover 3 of the network port and the injection-free part of the main board are overlapped with low impedance.
在一些实施例中,还包括:In some embodiments, it also includes:
PHY芯片,所述PHY芯片位于所述PCB1板上;PHY chip, the PHY chip is located on the PCB1 board;
其中,所述PHY芯片和所述RJ45端口2通过多对差分信号线连接。Wherein, the PHY chip and the RJ45 port 2 are connected through multiple pairs of differential signal lines.
具体的,如图4所示,PHY芯片和RJ45端口2之间可以通过以下差分信号对线连接:GMAC_MD0_P和GMAC_MD0_N、GMAC_MD1_P和GMAC_MD1_N、GMAC_MD2_P和GMAC_MD2_N、GMAC_MD3_P和GMAC_MD3_N。Specifically, as shown in Figure 4, the PHY chip and the RJ45 port 2 can be connected by the following differential signal pairs: GMAC_MD0_P and GMAC_MD0_N, GMAC_MD1_P and GMAC_MD1_N, GMAC_MD2_P and GMAC_MD2_N, GMAC_MD3_P and GMAC_MD3_N.
在一些实施例中,每一对所述差分信号线内部之间的距离均处于第一预设区间范围内;不同对的所述差分信号线之间的距离处于第二预设区间内。In some embodiments, the distance between each pair of the differential signal lines is within a first predetermined interval; the distance between the differential signal lines of different pairs is within a second predetermined interval.
具体的,每一对差分信号线内部之间的距离可以设置为10至15mil,即GMAC_MD0_P和GMAC_MD0_N之间的距离可以是10至15mil、GMAC_MD1_P和GMAC_MD1_N之间的距离可以是10至15mil、GMAC_MD2_P和GMAC_MD2_N之间的距离可以是10至15mil、GMAC_MD3_P和GMAC_MD3_N之间的距离可以是10至15mil。而不同对的所述差分信号线之间的距离可以是不能小于七倍的介质厚度,即图3中距离C的值不能小于七倍的介质厚度,例如可以为50至80mil,这样可以起到良好的高频电磁辐射效果。Specifically, the distance between each pair of differential signal lines can be set to 10 to 15mil, that is, the distance between GMAC_MD0_P and GMAC_MD0_N can be 10 to 15mil, the distance between GMAC_MD1_P and GMAC_MD1_N can be 10 to 15mil, GMAC_MD2_P and The distance between GMAC_MD2_N may be 10 to 15 mil, and the distance between GMAC_MD3_P and GMAC_MD3_N may be 10 to 15 mil. The distance between the differential signal lines of different pairs may not be less than seven times the thickness of the dielectric, that is, the value of the distance C in FIG. Good high frequency electromagnetic radiation effect.
在一些实施例中,所述差分信号线的拐角大于预设度数且在所述PCB1板上的转层小于预设层数。In some embodiments, the corners of the differential signal lines are greater than a predetermined degree and the number of transition layers on the PCB 1 is less than a predetermined number of layers.
具体的,如图4和图5所示,差分信号线的拐角需要大于预设度数,例如大于45°,并且差分信号线在PCB1上走线需要转层时不同超过预设层数,例如不同超过2层。Specifically, as shown in FIG. 4 and FIG. 5 , the corners of the differential signal lines need to be greater than a preset degree, for example, greater than 45°, and when the differential signal lines are routed on the PCB1, the difference exceeds the preset number of layers, such as different more than 2 floors.
在一些实施例中,所述PHY芯片与所述RJ45端口2之间的水平距离在第三预设区间内。In some embodiments, the horizontal distance between the PHY chip and the RJ45 port 2 is within a third preset interval.
在一些实施例中,所述PHY芯片到所述PCB1板的边缘的距离在第四预设区间内。In some embodiments, the distance from the PHY chip to the edge of the PCB1 board is within a fourth preset interval.
具体的,如图5所示,PHY芯片与所述RJ45端口2之间的水平距离B需要在第三预设区间内,例如,在1英寸到4英寸之间。而PHY芯片到所述PCB1板的边缘的距离A在第四预设区间内,例如大于1英寸。Specifically, as shown in FIG. 5 , the horizontal distance B between the PHY chip and the RJ45 port 2 needs to be within a third preset interval, for example, between 1 inch and 4 inches. The distance A from the PHY chip to the edge of the PCB1 board is within the fourth preset interval, for example, greater than 1 inch.
在一些实施例中,每一个所述差分信号线均在靠近所述RJ45端口2的位置上并联电容。In some embodiments, each of the differential signal lines is connected in parallel with a capacitor near the RJ45 port 2 .
具体的,如图4所示,为了防止PHY芯片产生的能量回传到RJ45端口2,因此可以在靠近RJ45端口2的位置在差分信号线上并联上电容。由于可以通过调节并联在信号线上的电容调节信号线上能量的大小,但是电容太大容易造成信号较大衰减,因此电容的大小可以为5pf至33pf。Specifically, as shown in FIG. 4 , in order to prevent the energy generated by the PHY chip from being transmitted back to the RJ45 port 2, a capacitor can be connected in parallel on the differential signal line at a position close to the RJ45 port 2. Since the size of the energy on the signal line can be adjusted by adjusting the capacitor connected in parallel to the signal line, but if the capacitor is too large, the signal will be easily attenuated, so the size of the capacitor can be 5pf to 33pf.
这样在靠近RJ45端口2的位置放置5pf至33pf电容,通过电容调整网口控制信号GMAC_MD0_P、GMAC_MD0_N、GMAC_MD1_P、GMAC_MD1_N、GMAC_MD2_P、GMAC_MD2_N、GMAC_MD3_P以及GMAC_MD3_N的信号强度,以使网口的辐射发射水平达到B级要求。In this way, place 5pf to 33pf capacitors close to RJ45 port 2, and adjust the signal strength of the network port control signals GMAC_MD0_P, GMAC_MD0_N, GMAC_MD1_P, GMAC_MD1_N, GMAC_MD2_P, GMAC_MD2_N, GMAC_MD3_P and GMAC_MD3_N through the capacitors, so that the radiation emission level of the network port reaches B level requirements.
在一些实施例中,所述第一屏蔽体31和所述第二屏蔽体32均包括螺丝折边313(323),且所述PCB1板上设置有螺丝孔11;In some embodiments, the first shielding body 31 and the second shielding body 32 both include screw flanges 313 (323), and the PCB1 is provided with screw holes 11;
其中,所述螺丝折边313(323)与所述螺丝孔11重合。Wherein, the screw flange 313 ( 323 ) coincides with the screw hole 11 .
具体的,如图1所示,可以在第一屏蔽体31和第二屏蔽体32上分别设置一个螺丝折边313(323),在板卡上设置一个螺丝孔11的位置,螺丝折边313(323)和板卡上的螺丝孔11正好能够重合,增加屏蔽罩3和板卡的接触。Specifically, as shown in FIG. 1 , a screw edge 313 (323) can be provided on the first shield body 31 and the second shield body 32 respectively, and a screw hole 11 can be set on the board, and the screw edge 313 (323) and the screw holes 11 on the board can just coincide, increasing the contact between the shield 3 and the board.
在一些实施例中,所述屏蔽罩3还包括连接件33,所述连接件33连接所述第一屏蔽体31和所述第二屏蔽体32。In some embodiments, the shielding case 3 further includes a connecting member 33 , and the connecting member 33 connects the first shielding body 31 and the second shielding body 32 .
具体的,如图1所示,第一屏蔽体31和第二屏蔽体32可以通过一连接件33连接成一个整体。Specifically, as shown in FIG. 1 , the first shielding body 31 and the second shielding body 32 may be connected as a whole through a connecting member 33 .
本申请提出的方案通过在屏蔽罩上可以设置折边并与PCB露铜区进行 贴合,使屏蔽罩与PCB进行完美搭接,从而保证屏蔽罩与PCB进行低阻抗搭接。并且通过弹片可以使屏蔽罩和RJ45端口的外壳进行完美搭接,保证屏蔽罩和外壳进行低阻抗搭接,从而保证其辐射发射性能,进而增强网口的电磁兼容性能。In the solution proposed in the present application, a folded edge can be arranged on the shielding cover and attached to the exposed copper area of the PCB, so that the shielding cover and the PCB are perfectly overlapped, thereby ensuring that the shielding cover and the PCB are overlapped with low impedance. And through the shrapnel, the shield and the shell of the RJ45 port can be perfectly overlapped, ensuring that the shield and the shell are overlapped with low impedance, so as to ensure its radiation emission performance, thereby enhancing the electromagnetic compatibility performance of the network port.
基于同一申请构思,根据本申请的另一个方面,本申请的实施例还提供了一种服务器500,如图6所示,所述服务器500包括如上实施例所述的任一项所述的网口501。Based on the same application concept, according to another aspect of the present application, an embodiment of the present application further provides a server 500, as shown in FIG. mouth 501.
以上是本申请公开的示例性实施例,但是应当注意,在不背离权利要求限定的本申请实施例公开的范围的前提下,可以进行多种改变和修改。根据这里描述的公开实施例的方法权利要求的功能、步骤和/或动作不需以任何特定顺序执行。此外,尽管本申请实施例公开的元素可以以个体形式描述或要求,但除非明确限制为单数,也可以理解为多个。The above are exemplary embodiments disclosed in the present application, but it should be noted that various changes and modifications may be made without departing from the scope of the disclosure of the embodiments of the present application defined by the claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements disclosed in the embodiments of the present application may be described or claimed in an individual form, unless explicitly limited to the singular, they may also be construed as a plurality.
应当理解的是,在本文中使用的,除非上下文清楚地支持例外情况,单数形式“一个”旨在也包括复数形式。还应当理解的是,在本文中使用的“和/或”是指包括一个或者一个以上相关联地列出的项目的任意和所有可能组合。It should be understood that, as used herein, the singular form "a" is intended to include the plural form as well, unless the context clearly supports an exception. It will also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
上述本申请实施例公开实施例序号仅仅为了描述,不代表实施例的优劣。The above-mentioned embodiments of the present application disclose the serial numbers of the embodiments only for description, and do not represent the advantages and disadvantages of the embodiments.
所属领域的普通技术人员应当理解:以上任何实施例的讨论仅为示例性的,并非旨在暗示本申请实施例公开的范围(包括权利要求)被限于这些例子;在本申请实施例的思路下,以上实施例或者不同实施例中的技术特征之间也可以进行组合,并存在如上的本申请实施例的不同方面的许多其它变化,为了简明它们没有在细节中提供。因此,凡在本申请实施例的精神和原则之内,所做的任何省略、修改、等同替换、改进等,均应包含在本申请实施例的保护范围之内。Those of ordinary skill in the art should understand that: the discussion of any of the above embodiments is only exemplary, and is not intended to imply that the scope (including the claims) disclosed by the embodiments of the present application is limited to these examples; under the idea of the embodiments of the present application , the technical features in the above embodiments or different embodiments can also be combined, and there are many other changes in different aspects of the above embodiments of the present application, which are not provided in detail for the sake of brevity. Therefore, any omission, modification, equivalent replacement, improvement, etc. made within the spirit and principle of the embodiments of the present application should be included within the protection scope of the embodiments of the present application.

Claims (10)

  1. 一种设置在PCB板上的网口,其特征在于,包括:A network port arranged on a PCB, comprising:
    设置在PCB板上的RJ45端口,所述RJ45端口上设置有凹槽;an RJ45 port arranged on the PCB board, the RJ45 port is provided with a groove;
    屏蔽罩,所述屏蔽罩包括相对设置的第一屏蔽体和第二屏蔽体,所述第一屏蔽体和所述第二屏蔽体均包括折边和弹片;a shielding cover, the shielding cover includes a first shielding body and a second shielding body arranged oppositely, and both the first shielding body and the second shielding body include a folded edge and an elastic sheet;
    其中,所述RJ45端口位于所述第一屏蔽体和所述第二屏蔽体之间;所述折边与所述PCB板上的裸露的铜箔搭接;所述弹片与所述凹槽配合以使所述RJ45端口与所述第一屏蔽体和所述第二屏蔽体相互固定。Wherein, the RJ45 port is located between the first shield body and the second shield body; the folded edge is overlapped with the exposed copper foil on the PCB board; the elastic sheet is matched with the groove so that the RJ45 port, the first shield body and the second shield body are fixed to each other.
  2. 如权利要求1所述的网口,其特征在于,还包括:The network port of claim 1, further comprising:
    PHY芯片,所述PHY芯片位于所述PCB板上;a PHY chip, the PHY chip is located on the PCB;
    其中,所述PHY芯片和所述RJ45端口通过多对差分信号线连接。Wherein, the PHY chip and the RJ45 port are connected through multiple pairs of differential signal lines.
  3. 如权利要求2所述的网口,其特征在于,每一对所述差分信号线内部之间的距离均处于第一预设区间范围内;不同对的所述差分信号线之间的距离处于第二预设区间内。The network port of claim 2, wherein the distance between each pair of the differential signal lines is within a first preset interval; the distance between the differential signal lines of different pairs is within within the second preset interval.
  4. 如权利要求2所述的网口,其特征在于,所述差分信号线的拐角大于预设度数且在所述PCB板上的转层小于预设层数。The network port of claim 2, wherein the corners of the differential signal lines are larger than a preset degree and the transition layers on the PCB board are smaller than the preset number of layers.
  5. 如权利要求2所述的网口,其特征在于,所述PHY芯片与所述RJ45端口之间的水平距离在第三预设区间内。The network port of claim 2, wherein a horizontal distance between the PHY chip and the RJ45 port is within a third preset interval.
  6. 如权利要求2所述的网口,其特征在于,所述PHY芯片到所述PCB板的边缘的距离在第四预设区间内。The network port of claim 2, wherein the distance from the PHY chip to the edge of the PCB board is within a fourth preset interval.
  7. 如权利要求2所述的网口,其特征在于,每一个所述差分信号线均在靠近所述RJ45端口的位置上并联电容。The network port of claim 2, wherein each of the differential signal lines is connected in parallel with a capacitor at a position close to the RJ45 port.
  8. 如权利要求1所述的网口,其特征在于,所述第一屏蔽体和所述第二屏蔽体均包括螺丝折边,且所述PCB板上设置有螺丝孔;The network port according to claim 1, wherein the first shielding body and the second shielding body both comprise screw flanges, and the PCB board is provided with screw holes;
    其中,所述螺丝折边与所述螺丝孔重合。Wherein, the screw folded edge coincides with the screw hole.
  9. 如权利要求1所述的网口,其特征在于,所述屏蔽罩还包括连接件,所述连接件连接所述第一屏蔽体和所述第二屏蔽体。The network port of claim 1, wherein the shielding cover further comprises a connecting piece, and the connecting piece connects the first shielding body and the second shielding body.
  10. 一种服务器,其特征在于,所述服务器包括如权利要求1至9任一项所述的网口。A server, characterized in that, the server comprises the network port according to any one of claims 1 to 9.
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