WO2022133659A1 - 光发射组件 - Google Patents

光发射组件 Download PDF

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Publication number
WO2022133659A1
WO2022133659A1 PCT/CN2020/138054 CN2020138054W WO2022133659A1 WO 2022133659 A1 WO2022133659 A1 WO 2022133659A1 CN 2020138054 W CN2020138054 W CN 2020138054W WO 2022133659 A1 WO2022133659 A1 WO 2022133659A1
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WIPO (PCT)
Prior art keywords
metal layer
package component
capacitor
modulated laser
directly modulated
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PCT/CN2020/138054
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English (en)
French (fr)
Inventor
潘伟
张胜利
周小平
胡永红
高飞
董浩
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to CN202080102033.0A priority Critical patent/CN115699619A/zh
Priority to PCT/CN2020/138054 priority patent/WO2022133659A1/zh
Publication of WO2022133659A1 publication Critical patent/WO2022133659A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices

Definitions

  • the present application relates to the technical field of devices, and in particular, to a light emitting assembly.
  • Directly Modulated Laser is a laser chip that converts electrical signals into optical signals. Because DML has the advantages of small size and high integration, it is widely used in Transmitter Optical Sub Assembly (TOSA).
  • the light-emitting component is the core component of the light-carrying module, and is used to generate and emit light-modulated signals.
  • the optical bearer module is the physical layer carrier of the fifth-generation mobile communication (5G) technology, as well as the main pipeline for signal transmission, and is widely used in wireless equipment and network equipment.
  • 5G fifth-generation mobile communication
  • the present application provides an optical emitting component, which is used to solve the problem that conventional optical emitting components cannot meet the requirements for higher rates of optical fiber communication systems.
  • the present application provides a light emitting component, comprising: a package component, a directly modulated laser, a first inductor and a first capacitor, wherein: the first capacitor is connected to a first output end of the package component and a first capacitor between two output ends; one end of the first inductor is connected to the first output end of the package component, and the other end of the first inductor is connected to the first input end of the directly modulated laser; the direct modulation The second input end of the laser is connected to the second output end of the package component; the first inductor and the first capacitor are used to change the input impedance of the light emitting component.
  • a first capacitance is added between the first output end and the second output end of the package component, and a first capacitance is added between the first output end of the package component and the first input end of the DML the first inductance. Since the first capacitor and the first inductor have frequency responses, that is, they exhibit different imaginary impedances at different frequencies. Therefore, the input impedance of the TOSA can be changed through the first capacitor and the first inductor, so that the input impedance of the TOSA is the same as that of the optical fiber.
  • the impedance of the optical drive module in the optical carrier module in the communication system is the same, so that TOSA has a higher bandwidth performance, so that TOSA can meet the higher speed requirements of the optical carrier module and the optical fiber communication system.
  • the TOSA since the input impedance of the TOSA is changed by the first capacitor and the first inductance in the present application, the TOSA can meet the higher speed requirements of the optical bearing module and the optical fiber communication system.
  • the wide-band case package, high-bandwidth DML and eutectic process reduce the process complexity and manufacturing cost, and improve the manufacturing yield.
  • the package component includes a substrate and a first metal layer and a second metal layer disposed on the substrate; the first metal layer is a first output end of the package component, The second metal layer is the second output end of the package component; the directly modulated laser includes a first bonding region, wherein the first bonding region is the first input end of the directly modulated laser, The back side of the directly modulated laser is the second input end of the directly modulated laser; the first bonding area of the directly modulated laser is connected to the first metal layer through a metal wire, and the back side of the directly modulated laser is arranged on the On the second metal layer, the inductance generated on the metal wire is used as the first inductance; an external capacitor is arranged, one end of the external capacitor is connected to the first metal layer, and the external capacitor is The other end of the capacitor is connected to the second metal layer, and the external capacitor is used as the first capacitor.
  • the package component includes a substrate and a first metal layer and a second metal layer disposed on the substrate; the first metal layer is a first output end of the package component, The second metal layer is the second output end of the package component; the directly modulated laser includes a first bonding region, wherein the first bonding region is the first input end of the directly modulated laser, The back side of the directly modulated laser is the second input end of the directly modulated laser; the first bonding area of the directly modulated laser is connected to the first metal layer through a metal wire, and the back side of the directly modulated laser is arranged on the on the second metal layer, wherein the inductance generated on the metal wire is used as the first inductance; the capacitance formed by the first metal layer, the second metal layer and the gap between the two is used as the first capacitor.
  • the shape and size of the gap are determined according to the capacitance value of the first capacitor.
  • the shape of the gap is sawtooth.
  • the material of the substrate is ceramic
  • the material of the first metal layer, the second metal layer and the metal wire is gold
  • the directly modulated laser includes a first bonding region, a second bonding region, a zigzag inductor connected between the first bonding region and the second bonding region, an isolation layer located under the first bonding region and the second bonding region and the zigzag inductor, and a substrate under the isolation layer; wherein, the second bonding region, the isolation
  • the capacitor formed by the layer and the substrate is used as the first capacitor, the broken line inductance is used as the first inductance, the first bonding area is the first input end of the directly modulated laser, and the back side of the directly modulated laser is the second input terminal of the directly modulated laser.
  • the first input end of the package component and the first output end of the package component are connected by wire bonding.
  • the second input end of the package component and the second output end of the package component are connected by wire bonding.
  • the wire bonding process can reduce the process complexity and cost, and improve the manufacturing yield.
  • the package component further includes a first pin and a second pin, wherein: the first pin is used as the first input end of the package component, and the second pin is used as the first input terminal of the package component.
  • the pin serves as the second input terminal of the package component.
  • the package component further includes a socket, wherein the first lead and the second lead are arranged on the socket.
  • Fig. 1 is the structural representation of the TOSA provided in the related art
  • Fig. 2 is the small signal circuit model of conventional TOSA
  • Fig. 3 is the small signal circuit model of the improved TOSA
  • FIG. 4 is a schematic structural diagram one of the TOSA provided by the embodiment of the present application.
  • Fig. 5 compares Fig. 1 of the bandwidth simulation of TOSA provided for this application and conventional TOSA;
  • FIG. 6 is a schematic structural diagram two of TOSA provided by the embodiment of the present application.
  • Fig. 7 is an enlarged view of the local area in Fig. 6;
  • Fig. 8 compares Fig. 2 of the bandwidth simulation of TOSA provided for this application and conventional TOSA;
  • FIG. 10 is a perspective view of a DML provided by an embodiment of the present application.
  • Fig. 11 is the top view of Fig. 10;
  • Fig. 12 is the bandwidth simulation comparison diagram of the TOSA of the application DML in Fig. 10 and conventional TOSA;
  • Fig. 13 is the bandwidth test schematic diagram of the TOSA of conventional 10G;
  • FIG. 14 is a schematic diagram of the bandwidth test after the TOSA of 10G is improved by the principle described in this application;
  • 15 is a schematic diagram of an eye diagram test of an existing optical bearing module
  • FIG. 16 is a schematic diagram of an eye diagram test of an optical bearing module provided by the present application.
  • At least one (item) refers to one or more, and "a plurality” refers to two or more.
  • “And/or” is used to describe the relationship between related objects, indicating that there can be three kinds of relationships, for example, “A and/or B” can mean: only A, only B, and both A and B exist , where A and B can be singular or plural.
  • the character “/” generally indicates that the associated objects are an “or” relationship.
  • At least one item(s) below” or similar expressions thereof refer to any combination of these items, including any combination of single item(s) or plural items(s).
  • At least one (a) of a, b or c can mean: a, b, c, "a and b", “a and c", “b and c", or "a and b and c" ", where a, b, c can be single or multiple.
  • FIG. 1 is a schematic structural diagram of a TOSA provided in the related art.
  • the TOSA includes: a package (ie, a package component) and a 25G DML 101.
  • the package includes: 25G socket 102 , pins 103 , and ceramic substrate 104 .
  • the number of pins 103 is four, and the four pins 103 are disposed on the 25G socket 102 and penetrate the 25G socket 102 .
  • the ceramic substrate 104 is arranged on the 25G socket 102, and the ceramic substrate 104 is provided with a first metal layer 105 and a second metal layer 106.
  • the 25G DML 101 is arranged on the second metal layer 106, and a gold wire 107 connects the 25G DML 101
  • the bonding area on the upper part is connected to the first metal layer 105 .
  • Two of the four pins 103 are connected to the first metal layer 105 through the eutectic process, and the other two of the four pins 103 are connected to the second metal layer 106 through the eutectic process.
  • the TOSA provided in the related art adopts 25G socket, 25G DML and eutectic process, that is, a high-bandwidth package and high-bandwidth DML, the TOSA provided in the related art itself has a high bandwidth characteristics. In this way, when the TOSA in the related art is applied to the optical bearing module in the optical fiber communication system, due to its own high bandwidth characteristic, the TOSA in the related art can meet the requirements of the optical fiber communication system for higher speed.
  • the dielectric constant of the glass insulator material is required to be high, so the fabrication is difficult and the fabrication cost is high.
  • the high-bandwidth DML is expensive, resulting in an increase in the cost of TOSA.
  • the connection between the pin and the metal layer adopts the eutectic process, the difficulty of the eutectic between the pin and the substrate is increased, resulting in a decrease in the production yield and an increase in the complexity of the process.
  • the present application provides a TOSA, which reduces the process complexity and cost of TOSA production and improves the production yield on the basis of satisfying the high speed requirement of an optical fiber communication system.
  • TOSA is applied in the optical carrier module in the optical fiber communication system.
  • TOSA is used to receive the electrical signal generated by the optical drive module in the optical carrier module, convert the electrical signal into an optical signal and output it.
  • the TOSA has a higher bandwidth performance, so that the TOSA can meet the higher speed requirements of the optical carrier module and the optical fiber communication system. Therefore, in the present application, the input impedance of the conventional TOSA can be changed to obtain the TOSA provided by the present application, so that the input impedance of the TOSA provided by the present application is consistent with the impedance of the optical drive module, so that the TOSA provided by the present application is consistent with the impedance of the optical drive module. It has higher bandwidth performance, which enables TOSA to meet the higher rate requirements of optical bearer modules and optical fiber communication systems.
  • TOSA includes: package parts and DML. in:
  • the package component includes a first lead, a second lead, a socket, and a substrate.
  • the first pin and the second pin are arranged on the socket and penetrate the socket.
  • the base plate is arranged on the socket.
  • the substrate is provided with a first metal layer and a second metal layer. The first pin is connected to the first metal layer, and the second pin is connected to the second metal layer.
  • the DML includes a first bonding region.
  • the backside of the DML is disposed on the second metal layer, and the first bonding area on the DML is connected to the first metal layer.
  • the bandwidth of the DML is, for example, 10G or 5G or 2.5G.
  • the working principle of a conventional TOSA is as follows: the first pin and the second pin receive the electrical signal generated by the optical driving module, and transmit the electrical signal to the first metal layer and the second metal layer. The first metal layer and the second metal layer transmit electrical signals to the DML. DML converts electrical signals into optical signals.
  • the package component includes a first input end, a second input end, a first output end and a second output end.
  • the first pin is the first input end of the package component
  • the second pin is the second input end of the package component
  • the first metal layer is the first output end of the package component
  • the second metal layer is the first output end of the package component Two output terminals.
  • the DML includes a first input terminal and a second input terminal, wherein the first bonding area is the first input terminal of the DML, and the back of the DML is the second input terminal of the DML.
  • the input and output of the packaged component and the input and output of the DML will change.
  • the descriptions of the inputs and outputs of the DML, and the inputs and outputs of the DML are exemplary only.
  • the output end and output end of the packaged component and the input end and output end of the DML can be determined according to the connection method and working principle.
  • Figure 2 is a small signal circuit model of a conventional TOSA.
  • the conventional TOSA small-signal circuit model includes a circuit model 210 of a package component and a circuit model 220 of a DML. in:
  • the circuit model 210 of the package component includes a first input terminal Vinf1, a second input terminal Vinf2, a first output terminal Voutf1, and a second output terminal Voutf2.
  • the circuit model 220 of the DML includes a first input terminal Vinx1 and a second input terminal Vinx2.
  • the first input terminal Vinf1 and the second input terminal Vinf2 of the circuit model 210 of the package component are used for receiving electrical signals.
  • the first output terminal Voutf1 of the circuit model 210 of the packaged component is connected to the first input terminal Vinx1 of the circuit model 220 of the DML
  • the second output terminal Voutf2 of the circuit model 210 of the packaging component is connected to the second input terminal Vinx2 of the circuit model 220 of the DML connect.
  • circuit model 210 of the package component and the circuit model 220 of the DML will be described respectively, wherein:
  • the circuit model 210 of the package component includes: a first lead 201, a second lead 202, a header 203, a capacitor C1, and two inductors (L1, L2).
  • One end of the first pin 201 (ie, the first input end of the package component) is the first input end Vinf1 of the circuit model 210 of the package component, and one end of the second pin 202 (ie, the second input end of the package component) is the package component.
  • the socket 203 is connected to the other end of the first pin 201 and the other end of the second pin 202 .
  • the capacitor C1 is connected between the other end of the first pin 201 and the other end of the second pin 202 .
  • the capacitor C1 is formed by the first lead 201, the second lead 202 and the gap between them.
  • One end of the inductor L1 is connected to the other end of the first pin 201 , and the other end of the inductor L1 is connected to the first output end Voutf1 of the circuit model 210 of the package component (ie, the first output end of the package component).
  • One end of the inductor L2 is connected to the other end of the second pin 202 , and the other end of the inductor L2 is connected to the second output end Voutf2 of the circuit model 210 of the package component (ie, the second output end of the package component).
  • the inductance L1 is generated by the first pin and the connection between the first pin and the first metal layer
  • the inductance L2 is generated by the second pin and the connection between the second pin and the second metal layer.
  • the inductances L1 and L2 are generated by the pins. If the pins and the metal layer are connected by the lead process, the inductances L1 and L2 are formed by the pins and between the pins and the metal layer. between the leads are generated.
  • the circuit model 220 of the DML includes: a series resistance Rs, a contact capacitance Cp, a first resistance Rd, a second resistance Ra, a junction capacitance Ca, and a junction inductance La. in:
  • the first terminal of the contact capacitor Cp is connected to the first input terminal Vinx1 of the DML circuit model 220 (ie, the first bonding area of the DML), and the second terminal of the contact capacitor Cp is connected to the second input terminal Vinx2 of the DML circuit model 220 (i.e. the back of the DML) connection.
  • One end of the series resistor Rs is connected to the first end of the contact capacitor Cp, one end of the first resistor Rd is connected to the other end of the series resistor Rs, and the other end of the first resistor Rd is connected to the second input terminal Vinx2 of the circuit model 220 of the DML , the junction capacitance Ca is connected to both ends of the first resistance Rd, one end of the junction inductance La is connected to the other end of the series resistance Rs, one end of the second resistance Ra is connected to the other end of the junction inductance La, and the other end of the second resistance Ra is connected It is connected to the second input terminal Vinx2 of the circuit model 220 of the DML.
  • the contact capacitance Cp is formed by the first bonding area on the DML (e.g. gold pad), the substrate of the DML, and the isolation layer therebetween.
  • the junction capacitance Ca and junction inductance La are used to characterize the storage effects of carriers and photons in the active region in the DML.
  • the first resistor Rd and the second resistor Ra are used to simulate the relaxation oscillation damping of the DML.
  • the input impedance of the conventional TOSA (that is, the first input terminal Vinf1 and the second input terminal Vinf2 of the circuit model 210 of the package component) can be changed by adding components in FIG. 2 . input impedance between).
  • FIG. 3 the small-signal circuit model after adding components in FIG. 2 is shown in FIG. 3 .
  • a first capacitor Cw is added between the first output terminal Voutf1 and the second output terminal Voutf2 of the circuit model 210 of the package component in FIG.
  • a first inductor Lw is added between an output terminal Voutf1 and the first input terminal Vinx1 of the circuit model 220 of the DML, and the small-signal circuit model shown in FIG. 3 can be obtained.
  • the first capacitor Cw and the first inductor Lw are added in FIG. 3 . Since the first capacitor Cw and the first inductor Lw have frequency responses, that is, they exhibit different imaginary impedances at different frequencies, so , the input impedance of the conventional TOSA can be changed through the first capacitor Cw and the first inductor Lw.
  • the parameters of the first capacitor Cw and the first inductor Lw can be determined according to the input impedance of the conventional TOSA, the parameters of the components in the conventional TOSA small-signal circuit model, and the impedance of the optical drive module.
  • the input impedance of conventional TOSA can be changed by adding a first inductance Lw between the first output end of the DML and the first input end of the DML (that is, adding a first inductance Lw between the first metal layer and the first bonding area) (that is, the input impedance between the first input terminal and the second input terminal of the package component), so that the input impedance of the improved TOSA is consistent with the input impedance of the optical drive module, so that the improved TOSA has a higher bandwidth performance to meet the higher rate requirements of optical bearer modules and optical fiber communication systems.
  • the present application provides a TOSA, the TOSA includes a package component, a DML, a first inductor and a first capacitor. in:
  • the first capacitor is connected between the first output end and the second output end of the package component, one end of the first inductor is connected to the first output end of the package component, and the other end of the first inductor is connected to the first input end of the DML,
  • the second input terminal of the DML is connected to the second output terminal of the package component, and the first inductor and the first capacitor are used to change the input impedance of the TOSA.
  • a first capacitance is added between the first output end and the second output end of the package component, and a first capacitance is added between the first output end of the package component and the first input end of the DML the first inductance. Since the first capacitor and the first inductor have frequency responses, that is, they exhibit different imaginary impedances at different frequencies. Therefore, the input impedance of the TOSA can be changed through the first capacitor and the first inductor, so that the input impedance of the TOSA is the same as that of the optical fiber.
  • the impedance of the optical drive module in the optical carrier module in the communication system is the same, so that TOSA has a higher bandwidth performance, so that TOSA can meet the higher speed requirements of the optical carrier module and the optical fiber communication system.
  • the TOSA since the input impedance of the TOSA is changed by the first capacitor and the first inductance in the present application, the TOSA can meet the higher speed requirements of the optical bearing module and the optical fiber communication system.
  • the wide-band case package, high-bandwidth DML and eutectic process reduce the process complexity and manufacturing cost, and improve the manufacturing yield.
  • the first input end and the first output end of the package component are connected by wire bonding, and the second input end and the second output end of the package component are connected by wire bonding .
  • the wire bonding process can reduce the process complexity and cost, and improve the production yield.
  • the package component, the DML, and the first capacitor and the first inductor are described below.
  • the materials of the first pin, the second pin and the socket include but are not limited to metals such as copper.
  • the material of the substrate includes but is not limited to insulating materials such as ceramics.
  • Materials of the first metal layer and the second metal layer include but are not limited to metal materials such as gold, tin, and silver.
  • the number of the first pins and the number of the second pins may be, for example, one or more, and specifically, may be set according to parameters such as the power of the TOSA.
  • the first pin is the first input end of the package component, and the second pin is the second input end of the package component.
  • the first metal layer is the first output end of the package component, and the second metal layer is the second output end of the package component.
  • connection method between the output end and the input end of the package component there can be seen from the description of the connection method between the output end and the input end of the package component above that the first pin and the first metal layer are connected by wire bonding, and the second pin and the second metal layer are connected by wire bonding. connect.
  • the wire material used in the wire bonding method includes but is not limited to metal materials such as gold, copper, and aluminum.
  • the number of leads and the diameter of each lead are determined according to parameters such as TOSA power.
  • the type of the packaged component may be, for example, TO package, BOX package, or COB package, etc., which is not specifically limited in this application.
  • the structure of the DML has already been mentioned in the description of the DML in the conventional TOSA, so it will not be repeated here.
  • the first bonding area in the DML is the first input terminal of the DML, and the back of the DML is the second input terminal of the DML.
  • the implementation manners of the first capacitor and the first inductor may include the following three, wherein:
  • the first is to set an external capacitor and use the external capacitor as the first capacitor. Since the first capacitor is connected between the first output terminal and the second output terminal of the package component, one end of the external capacitor is connected to the first metal layer, and the other end of the external capacitor is connected to the second metal layer.
  • the first inductance is arranged between the first output end of the package component and the first input end of the DML, and since the metal wire can generate an inductance when it is powered on, the first key of the DML can be connected to the first key of the DML through a metal wire.
  • the bonding area is connected to the first metal layer, and the inductance generated on the metal line is used as the first inductance. In this way, a first inductance is introduced between the first output of the package component and the first input of the DML.
  • the material of the metal wire includes but is not limited to metals such as gold, copper, and aluminum.
  • the inductance value of the inductance generated on the metal wire is related to the material of the metal wire, the diameter of the metal wire, the length of the metal wire, and the like.
  • the inductance generated on the metal wire is very small, so it is ignored.
  • the specifications of the metal wires in this application need to match the parameters of the first inductance, that is, the inductance value of the inductance generated on the metal wire is the same as the inductance value of the first inductance.
  • an embodiment of the present application provides a TOSA
  • the TOSA includes: a package component, a DML 401 , an external capacitor 402 , and a metal wire 403 . in:
  • the package component includes a first lead 404 , a second lead 405 , a header 406 and a substrate 407 .
  • the first pin 404 and the second pin 405 are vertically arranged on the tube seat 406 and penetrate the tube seat 406, and the substrate 407 is arranged on the tube seat 406.
  • a first metal layer 408 and a second metal layer 409 are provided on the substrate 407 .
  • the first pin 404 is connected to the first metal layer 408 by wire bonding
  • the second pin 405 is connected to the second metal layer 409 by wire bonding.
  • the backside of the DML 401 is disposed on the second metal layer gold 409 .
  • the backside of the DML 401 may be disposed on the second metal layer 409 by using solder (eg, tin or gold-tin, etc.), conductive glue (eg, silver glue) or a eutectic process.
  • solder eg, tin or gold-tin, etc.
  • conductive glue eg, silver glue
  • One end of the metal wire 403 is connected to the first bonding area of the DML 401 , and the other end of the metal wire 403 is connected to the first metal layer 408 .
  • One end of the external capacitor 402 is connected to the first metal layer 408 , and the second end of the external capacitor 402 is connected to the second metal layer 409 .
  • the external capacitor 402 is used as the first capacitor, and the inductance generated on the metal wire 403 is used as the first inductance.
  • the TOSA receives electrical signals from the first pin 404 and the second pin 405 and transmits the electrical signals to the first metal layer 408 and the second metal layer 409 .
  • the first metal layer 408 and the second metal layer 409 transmit electrical signals to the interior of the DML through the back surface of the DML and the metal lines 403, and the DML converts the electrical signals into optical signals.
  • Fig. 5 compares Fig. 1 of the bandwidth simulation between the TOSA provided by the present application and the conventional TOSA.
  • the curve 501 is used to indicate the bandwidth simulation curve of the conventional TOSA
  • the curve 502 is used to indicate the bandwidth simulation curve of the TOSA provided by the present application.
  • the abscissa in Fig. 5 is the frequency, and the ordinate is the loss of the signal during transmission. It can be seen from the curve 501 that the bandwidth of the conventional TOSA is 6Ghz under the reference of the loss of -3db. It can be seen from the curve 502 that under the benchmark of the loss of -3db, the bandwidth of the TOSA provided by the present application is 9Ghz. Obviously, under the benchmark of -3db, compared with the conventional TOSA, the bandwidth of the TOSA provided by this application is increased by 3Ghz.
  • the capacitor can be reused , the capacitor is used as the first capacitor.
  • the capacitance value of the capacitor formed by the first metal layer and the second metal layer of the DML in conventional TOSA and the gap between them is too small, it can be ignored in the small-signal circuit model, that is, the capacitance of this capacitor value does not meet the requirements of this application for capacitance values.
  • the capacitance value of the capacitor is related to the relative area and distance between the first metal layer and the second metal layer
  • the shape of the first metal layer and the second metal layer and the distance between them and the first metal layer can be determined by The thicknesses of the first metal layer and the second metal layer are improved so that the capacitance value of the capacitor meets the requirements of the first capacitor, that is, the capacitance value of the capacitor formed by the first metal layer and the second metal layer and the gap between them is equal to Capacitance value of the first capacitor.
  • the gap between the first metal layer and the second metal layer is The shape and size of the gap may be determined according to the capacitance value of the first capacitor.
  • the shape of the gap may be, for example, a sawtooth shape, an S shape, or the like.
  • the implementation manner of the first inductance is the same as that of the first inductance in the first manner, and thus will not be repeated here.
  • an embodiment of the present application provides a TOSA
  • the TOSA includes: a package component, a DML 601 , and a metal wire 602 . in:
  • the package component includes a first lead 603 , a second lead 604 , a header 605 and a substrate 606 .
  • the first pin 603 and the second pin 604 are vertically arranged on the tube seat 605 and penetrate the tube seat 605
  • the substrate 606 is arranged on the tube seat 605 .
  • a first metal layer 607 and a second metal layer 608 are provided on the substrate 606 .
  • the first pin 603 is connected to the first metal layer 607 by wire bonding
  • the second pin 604 is connected to the second metal layer 608 by wire bonding.
  • FIG. 7 is an enlarged view of the local area 610 in FIG. 6 .
  • the shape of the gap in the first capacitor is a sawtooth shape.
  • the backside of the DML 601 is disposed on the second metal layer 608 .
  • the setting method of the back of the DML has been described above, so it will not be repeated here.
  • One end of the metal wire 602 is connected to the first bonding area of the DML 601 , and the other end of the metal wire 602 is connected to the first metal layer 607 .
  • the inductance generated on the metal wire 602 is used as the first inductance.
  • the working principle of the TOSA is the same as the working principle of the TOSA in FIG. 4 , so it will not be repeated here.
  • Fig. 8 compares Fig. 2 of the bandwidth simulation of the TOSA provided by the present application and the conventional TOSA.
  • the curve 801 is used to indicate the bandwidth simulation curve of the conventional TOSA
  • the curve 802 is used to indicate the bandwidth simulation curve of the TOSA provided by the present application.
  • the abscissa in Fig. 8 is the frequency, and the ordinate is the loss of the signal during transmission. It can be seen from the curve 801 that the bandwidth of the conventional TOSA is 12Ghz when the loss is -3db. It can be known from the curve 802 that under the benchmark of the loss of -3db, the bandwidth of the TOSA provided by the present application is 14Ghz. Obviously, under the benchmark of -3db, compared with the conventional TOSA, the bandwidth of the TOSA provided by this application is increased by 2Ghz.
  • the shape of the gap may also be an S-shape.
  • the third is to make the first capacitor and the first inductor in the DML.
  • the DML further includes a second bonding region, a broken-line inductor connected between the first bonding region and the second bonding region, located in the first bonding region, the second bonding region and the broken-line inductor The isolation layer below, the substrate under the isolation layer.
  • the capacitance formed by the second bonding region, the isolation layer and the substrate is used as the first capacitance, and the broken line inductance is used as the first inductance.
  • the second bonding area is connected to the first output terminal of the package component, and the backside of the DML is connected to the second output terminal of the package component.
  • the materials of the second bonding area, the first bonding area and the zigzag inductor may be metal materials such as aluminum and gold.
  • a coating (metal film) process is used to form the second bonding area, the first bonding area and the zigzag inductor.
  • the material of the isolation layer is an insulating material such as silicon oxide (SIO2).
  • FIG. 10 is a perspective view of the DML
  • FIG. 11 is a top view of FIG. 10 . As shown in FIG. 10 and FIG.
  • the DML includes a first bonding area 1001 , a second bonding area 1002 and a zigzag inductor 1003 , wherein the zigzag inductor 1003 is located between the first bonding area 1002 and the second bonding area 1002 , and one end of the zigzag inductor 1003 is connected to the first bonding area 1001 , and the other end of the zigzag inductor 1003 is connected to the second bonding area 1002 .
  • An isolation layer 1004 is provided under the first bonding region 1001 , the second bonding region 1002 and the zigzag inductor 1003 , and a substrate is provided under the isolation layer 1004 .
  • the capacitance formed by the second bonding region 1002 , the isolation layer 1004 and the substrate is used as the first capacitance, and the broken line inductance 1003 is used as the first inductance.
  • the first bonding area 1001 is the first input terminal of the DML.
  • the back of the DML is the second input terminal of the DML.
  • the second bonding area 1002 is one end of the first capacitor, and is used for connecting with the first output end of the package component.
  • FIG. 12 is a comparison diagram of bandwidth simulation between the TOSA using the DML in FIG. 10 and the conventional TOSA.
  • the curve 1201 is used to indicate the bandwidth simulation curve of the conventional TOSA
  • the curve 1202 is used to indicate the bandwidth access curve of the TOSA applying the DML in FIG. 10 .
  • the abscissa in Fig. 12 is the frequency, and the ordinate is the loss of the signal during transmission. It can be seen from the curve 1201 that the bandwidth of the conventional TOSA is 5Ghz under the reference of -3db loss. It can be seen from the curve 1202 that the bandwidth of the TOSA applying the DML in FIG. 10 is 7Ghz under the reference of the loss of -3db. Obviously, under the benchmark of -3db, compared with the conventional TOSA, the bandwidth of the TOSA applying the DML in Fig. 10 is increased by 2Ghz.
  • FIG. 13 is a schematic diagram of a bandwidth test of a conventional 10G TOSA
  • FIG. 14 is a schematic diagram of a bandwidth test of an improved 10G TOSA based on the principles described in this application.
  • the bandwidth of the conventional 10G TOSA under the 3db benchmark is 5.4GHz
  • the bandwidth of the improved 10G TOSA under the 3db benchmark is 7.6GHz.
  • the bandwidth of the 10G TOSA is increased by 2.2 GHz.
  • first inductance and the first capacitor are only exemplary, and are not intended to limit the present application.
  • first inductance may also be implemented in at least two manners out of the foregoing three manners. and the first capacitor.
  • the present application can also provide an optical bearing module, the optical bearing module includes an optical driving module and any one of the TOSAs described above.
  • the optical drive module is used to provide electrical signals to the TOSA
  • the TOSA is used to convert the electrical signals provided by the optical drive module into optical signals.
  • the TOSA can meet the requirements of the optical bearer module for higher rates, and at the same time improve the eye diagram index of the optical bearer module.
  • FIG. 15 is a schematic diagram of an eye-diagram test of a conventional optical bearing module
  • FIG. 16 is a schematic diagram of an eye-diagram test of the optical bearing module provided by the present application.
  • the eye diagram in Fig. 16 has a thinner line shape and a larger eye opening, indicating that the performance of the optical bearing module has been improved.
  • the present application also provides a network device, where the network device includes the above-mentioned optical bearer module.

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Abstract

一种光发射组件，包括：封装部件、直接调制激光器、第一电感（L W）和第一电容（C W），其中：第一电容（C W）连接在封装部件的第一输出端和第二输出端之间；第一电感（L W）的一端与封装部件的第一输出端连接，第一电感（L W）的另一端与直接调制激光器的第一输入端连接；直接调制激光器的第二输入端与封装部件的第二输出端连接；第一电感（L W）和第一电容（C W）用于改变光发射组件的输入阻抗。该光发射组件能够满足光纤通信系统对更高速率的要求。

Description

光发射组件 技术领域
本申请涉及器件技术领域，具体涉及一种光发射组件。
背景技术
直接调制激光器(Directly Modulated Laser，DML)为一种将电信号转换为光信号的激光芯片。由于DML具有体积小、集成度高等优点，被广泛应用于光发射组件(Transmitter Optical Sub Assembly，TOSA)中。光发射组件是光承载模块的核心部件，用来产生并发射光调制信号。光承载模块是第五代移动通信(5G)技术的物理层载体，也是信号传输的主要管道，被广泛应用于无线设备和网络设备中。
随着5G技术的发展，对光纤通信系统提出了更高速率的要求。然而，目前市面上常规的TOSA的带宽特性无法满足光纤通信系统对更高速率的要求。
发明内容
本申请提供了一种光发射组件，用于解决常规的光发射组件无法满足光纤通信系统对更高速率的要求的问题。
第一方面，本申请提供一种光发射组件，包括：封装部件、直接调制激光器、第一电感和第一电容，其中：所述第一电容连接在所述封装部件的第一输出端和第二输出端之间；所述第一电感的一端与所述封装部件的第一输出端连接，所述第一电感的另一端与所述直接调制激光器的第一输入端连接；所述直接调制激光器的第二输入端与所述封装部件的第二输出端连接；所述第一电感和所述第一电容用于改变所述光发射组件的输入阻抗。
由上可知，相比于现有技术，在封装部件的第一输出端和第二输出端之间增加了第一电容，在封装部件的第一输出端和DML的第一输入端之间增加了第一电感。由于第一电容和第一电感具有频率响应，即在不同的频率处体现出不同的虚部阻抗，因此，通过第一电容和第一电感能够改变TOSA的输入阻抗，使得TOSA的输入阻抗与光纤通信系统中的光承载模块中的光驱动模块的阻抗一致，使得TOSA具有更高带宽的表现，从而使得TOSA满足光承载模块和光纤通信系统对更高速率的要求。此外，由于本申请通过第一电容和第一电感改变TOSA的输入阻抗，使TOSA能够满足光承载模块和光纤通信系统对更高速率的要求，相比于相关技术中的提供TOSA，无需采用高带宽的管壳封装、高带宽的DML以及共晶工艺，降低了工艺复杂度和制作成本，提升了制造良率。
在一种可能的实现方式中，所述封装部件包括基板和设置在所述基板上的第一金属层和第二金属层；所述第一金属层为所述封装部件的第一输出端，所述第二金属层为所述封装部件的第二输出端；所述直接调制激光器包括第一键合区域，其中，所述第一键合区域为所述直接调制激光器的第一输入端，所述直接调制激光器的背面为所述直接调制激光器的第二输入端；所述直接调制激光器的第一键合区域通过一金属线与第一金属层连接，所 述直接调制激光器的背面设置在所述第二金属层上，其中，将所述金属线上产生的电感作为所述第一电感；设置一外部电容，所述外部电容的一端与所述第一金属层连接，所述外部电容的另一端与所述第二金属层连接，将所述外部电容作为所述第一电容。
在一种可能的实现方式中，所述封装部件包括基板和设置在所述基板上的第一金属层和第二金属层；所述第一金属层为所述封装部件的第一输出端，所述第二金属层为所述封装部件的第二输出端；所述直接调制激光器包括第一键合区域，其中，所述第一键合区域为所述直接调制激光器的第一输入端，所述直接调制激光器的背面为所述直接调制激光器的第二输入端；所述直接调制激光器的第一键合区域通过一金属线与第一金属层连接，所述直接调制激光器的背面设置在所述第二金属层上，其中，将所述金属线上产生的电感作为所述第一电感；将由所述第一金属层、所述第二金属层以及两者之间的间隙构成的电容作为所述第一电容。
在一种可能的实现方式中，所述间隙的形状和尺寸根据所述第一电容的电容值确定。
在一种可能的实现方式中，所述间隙的形状为锯齿状。
在一种可能的实现方式中，所述基板的材料为陶瓷，所述第一金属层、所述第二金属层和所述金属线的材料为金。
在一种可能的实现方式中，所述直接调制激光器包括第一键合区域、第二键合区域、连接在所述第一键合区域和所述第二键合区域之间的折线电感、位于所述第一键合区域和所述第二键合区域以及所述折线电感下方的隔离层、位于所述隔离层下方的衬底；其中，将由所述第二键合区域、所述隔离层和所述衬底构成的电容作为第一电容，将所述折线电感作为第一电感，所述第一键合区域为所述直接调制激光器的第一输入端，所述直接调制激光器的背面为所述直接调制激光器的第二输入端。
在一种可能的实现方式中，采用引线键合的方式将所述封装部件的第一输入端和所述封装部件的第一输出端连接。采用引线键合的方式将所述封装部件的第二输入端和所述封装部件的第二输出端连接。相比于共晶工艺，引线键合的工艺能够降低工艺复杂度和成本，提升制作良率。
在一种可能的实现方式中，所述封装部件还包括第一引脚和第二引脚，其中：将所述第一引脚作为所述封装部件的第一输入端，将所述第二引脚作为所述封装部件的第二输入端。
在一种可能的实现方式中，所述封装部件还包括管座，其中，所述第一引脚和所述第二引脚设置在所述管座上。
附图说明
图1为相关技术中提供的TOSA的结构示意图；
图2为常规的TOSA的小信号电路模型；
图3为改进后的TOSA的小信号电路模型；
图4为本申请实施例提供的TOSA的结构示意图一；
图5为本申请提供的TOSA与常规的TOSA的带宽仿真比对图一；
图6为本申请实施例提供的TOSA的结构示意图二；
图7为图6中的局部区域的放大图；
图8为本申请提供的TOSA与常规的TOSA的带宽仿真比对图二；
图9为本申请提供的间隙的形状示意图；
图10为本申请实施例提供的DML的立体图；
图11为图10的俯视图；
图12为应用图10中的DML的TOSA与常规的TOSA的带宽仿真比对图；
图13为常规的10G的TOSA的带宽测试示意图；
图14为通过本申请所述的原理对10G的TOSA进行改进后的带宽测试示意图；
图15为现有的光承载模块的眼图测试示意图；
图16为本申请提供的光承载模块的眼图测试示意图。
具体实施方式
下面将结合附图，对本申请中的技术方案进行描述。
为使本申请的目的、技术方案和优点更加清楚，下面将结合本申请中的附图，对本申请中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
本申请的说明书实施例和权利要求书及附图中的术语“第一”、“第二”等仅用于区分描述的目的，而不能理解为指示或暗示相对重要性，也不能理解为指示或暗示顺序。此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，例如，包含了一系列步骤或单元。方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。
应当理解，在本申请中，“至少一个(项)”是指一个或者多个，“多个”是指两个或两个以上。“和/或”，用于描述关联对象的关联关系，表示可以存在三种关系，例如，“A和/或B”可以表示：只存在A，只存在B以及同时存在A和B三种情况，其中A，B可以是单数或者复数。字符“/”一般表示前后关联对象是一种“或”的关系。“以下至少一项(个)”或其类似表达，是指这些项中的任意组合，包括单项(个)或复数项(个)的任意组合。例如，a，b或c中的至少一项(个)，可以表示：a，b，c，“a和b”，“a和c”，“b和c”，或“a和b和c”，其中a，b，c可以是单个，也可以是多个。
为了解决上述技术问题，相关技术提供了一种光发射组件(TOSA)。图1为相关技术中提供的TOSA的结构示意图。如图1所示，该TOSA包括：管壳(即封装部件)和25G DML 101。其中，管壳包括：25G管座102、引脚103、陶瓷基板104。
引脚103的数量为4个，且该4个引脚103设置在25G管座102上且穿透25G管座102。陶瓷基板104设置在25G管座102上，且陶瓷基板104上设置有第一金属层105和第二金属层106。25G DML 101设置在第二金属层106上，一条金线107将25G DML 101上的键合区域和第一金属层105连接。四个引脚103中的两个通过共晶工艺与第一金属层105连接，四个引脚103中的另外两个通过共晶工艺与第二金属层106连接。
需要说明的是，若采用引线键合工艺将引脚和金属层连接，会带来带宽损失，而采用共晶工艺可以减少引线工艺带来的带宽损失。基于此，为了获得更高带宽，此处在将引脚 和金属层连接时，采用了共晶工艺，而非引线键合工艺。
显然，由于相关技术中提供的TOSA采用了25G管座和25G DML以及共晶工艺，即采用了高带宽的管壳封装和高带宽的DML，因此，相关技术中提供的TOSA自身就具有高带宽的特性。这样，在将相关技术中的TOSA应用在光纤通信系统中的光承载模块中时，由于其自身的高带宽的特性，使得相关技术中的TOSA能够满足光纤通信系统对更高速率的要求。
然而，由于高带宽的管壳封装，对玻璃绝缘子材质的介电常数要求高，因此制作困难，且制作成本高，同时高带宽的DML价格昂贵，导致TOSA的成本也随之增加。此外，由于引脚与金属层的连接采用共晶工艺，增加了引脚和基板的共晶难度，导致制作良率降低，同时也增加了工艺的复杂度。
为了解决上述技术问题，本申请提供了一种TOSA，该TOSA在满足光纤通信系统对高速率的要求的基础上，降低了制作TOSA的工艺复杂度和成本，并提升了制作良率。
本申请提供的TOSA的设计原理如下：
TOSA应用在光纤通信系统中的光承载模块中，TOSA用于接收光承载模块中的光驱动模块生成的电信号，并将该电信号转换为光信号后输出。在此基础上，由于在TOSA的输入阻抗与光驱动模块的阻抗保持一致时，TOSA具有更高带宽的表现，从而使得TOSA能够满足光承载模块与光纤通信系统对更高速率的要求。因此，在本申请中，可以对常规的TOSA的输入阻抗进行改变，得到本申请提供的TOSA，使得本申请提供的TOSA的输入阻抗与光驱动模块的阻抗保持一致，以使本申请提供的TOSA具有更高带宽的表现，进而使得TOSA能够满足光承载模块与光纤通信系统对更高速率的要求。
下面，对改变常规的TOSA的输入阻抗的原理进行说明。
首先对常规的TOSA进行说明。
常规的TOSA包括：封装部件和DML。其中：
封装部件包括第一引脚、第二引脚、管座、基板。第一引脚和第二引脚设置在管座上并贯穿管座。基板设置在管座上。基板上设置有第一金属层和第二金属层。第一引脚与第一金属层连接，第二引脚与第二金属层连接。
DML包括第一键合区域。DML的背面设置在第二金属层上，DML上的第一键合区域与第一金属层连接。DML的带宽例如为10G或者5G或者2.5G等。
需要说明的是，上述对封装部件的结构的说明以及DML的说明仅为示例性的，并不用于限定本申请。
常规的TOSA的工作原理为：第一引脚和第二引脚接收光驱动模块生成的电信号，以及将电信号传输至第一金属层和第二金属层。第一金属层和第二金属层将电信号传输至DML。DML将电信号转换为光信号。
显然，根据常规的TOSA的结构和工作原理可知，封装部件包括第一输入端、第二输入端、第一输出端和第二输出端。其中，第一引脚为封装部件的第一输入端，第二引脚为封装部件的第二输入端，第一金属层为封装部件的第一输出端，第二金属层为封装部件的第二输出端。DML包括第一输入端和第二输入端，其中，第一键合区域为DML的第一输入端，DML的背面为DML的第二输入端。
需要说明的是，由于封装部件以及DML的内部结构以及两者的连接方式发生变化时，封装部件的输入端和输出端、DML的输入端和输出端会发生变化，因此，此处对封装部件的输入端和输出端、DML的输入端和输出端的说明仅为示例性的。关于其他结构和连接方式的封装部件和DML，可以根据连接方式和工作原理确定封装部件的输出端和输出端，DML的输入端和输出端。
图2为常规的TOSA的小信号电路模型。如图2所示，常规的TOSA的小信号电路模型包括封装部件的电路模型210和DML的电路模型220。其中：
封装部件的电路模型210包括第一输入端Vinf1、第二输入端Vinf2、第一输出端Voutf1和第二输出端Voutf2。DML的电路模型220包括第一输入端Vinx1和第二输入端Vinx2。
封装部件的电路模型210的第一输入端Vinf1和第二输入端Vinf2用于接收电信号。
封装部件的电路模型210的第一输出端Voutf1与DML的电路模型220的第一输入端Vinx1连接，封装部件的电路模型210的第二输出端Voutf2与DML的电路模型220的第二输入端Vinx2连接。
下面，对封装部件的电路模型210和DML的电路模型220分别进行说明，其中：
封装部件的电路模型210包括：第一引脚201、第二引脚202、管座203、电容C1和两个电感(L1、L2)。
第一引脚201的一端(即封装部件的第一输入端)为封装部件的电路模型210的第一输入端Vinf1、第二引脚202的一端(即封装部件的第二输入端)为封装部件的电路模型210的第二输入端Vinf2。管座203与第一引脚201的另一端和第二引脚202的另一端连接。
电容C1连接在第一引脚201的另一端与第二引脚202的另一端之间。电容C1由第一引脚201、第二引脚202及其两者之间的间隙形成。
电感L1的一端与第一引脚201的另一端连接，电感L1的另一端与封装部件的电路模型210的第一输出端Voutf1(即封装部件的第一输出端)连接。电感L2的一端与第二引脚202的另一端连接，电感L2的另一端与封装部件的电路模型210的第二输出端Voutf2(即封装部件的第二输出端)连接。电感L1由第一引脚以及第一引脚与第一金属层的连接产生，电感L2由第二引脚以及第二引脚与第二金属层的连接产生。即，若引脚与金属层采用共晶工艺连接，则电感L1、L2由引脚产生，若引脚与金属层采用引线工艺连接，则电感L1、L2由引脚以及引脚与金属层之间的引线产生。
DML的电路模型220包括：串联电阻Rs、接触电容Cp、第一电阻Rd、第二电阻Ra、结电容Ca和结电感La。其中：
接触电容Cp的第一端与DML的电路模型220的第一输入端Vinx1(即DML的第一键合区域)连接，接触电容Cp的第二端与DML的电路模型220的第二输入端Vinx2(即DML的背面)连接。串联电阻Rs的一端与接触电容Cp的第一端连接，第一电阻Rd的一端与串联电阻Rs的另一端连接，第一电阻Rd的另一端与DML的电路模型220的第二输入端Vinx2连接，结电容Ca连接在第一电阻Rd的两端，结电感La的一端与串联电阻Rs的另一端连接，第二电阻Ra的一端与结电感La的另一端连接，第二电阻Ra的另一端与DML的电路模型220的第二输入端Vinx2连接。
接触电容Cp由DML上的第一键合区域(例如金焊盘)、DML的衬底以及两者之间 的隔离层形成。结电容Ca和结电感La用于表征DML中有源区的载流子和光子的存储效应。第一电阻Rd、第二电阻Ra用于模拟DML的张弛震荡阻尼。
根据图2中的小信号电路模型可知，可以通过在图2中增加元器件，来改变常规的TOSA的输入阻抗(即封装部件的电路模型210的第一输入端Vinf1和第二输入端Vinf2之间的输入阻抗)。
在一种可能的实现方式中，在图2中增加元器件后的小信号电路模型如图3所示。
结合图2和图3所示，在图2中的封装部件的电路模型210的第一输出端Voutf1与第二输出端Voutf2之间增加一个第一电容Cw，在封装部件的电路模型210的第一输出端Voutf1与DML的电路模型220的第一输入端Vinx1之间增加一个第一电感Lw，即可得到如图3所示的小信号电路模型。
相比于图2，图3中增加了第一电容Cw和第一电感Lw，由于第一电容Cw和第一电感Lw具有频率响应，即在不同的频率处体现出不同的虚部阻抗，因此，通过第一电容Cw和第一电感Lw能够改变常规的TOSA的输入阻抗。
需要说明的是，可以根据常规的TOSA的输入阻抗、常规的TOSA的小信号电路模型中的元器件的参数和光驱动模块的阻抗，确定第一电容Cw和第一电感Lw的参数。
由上可知，通过在封装部件的第一输出端和第二输出端之间增加第一电容Cw(即在第一金属层和第二金属层之间增加第一电容Cw)，以及在封装部件的第一输出端和DML的第一输入端之间增加第一电感Lw(即在第一金属层和第一键合区域之间增加第一电感Lw)，即可改变常规的TOSA的输入阻抗(即封装部件的第一输入端和第二输入端之间的输入阻抗)，从而使得改进后的TOSA的输入阻抗与光驱动模块的输入阻抗保持一致，以使改进后的TOSA具有更高带宽的表现，以满足光承载模块和光纤通信系统对更高速率的要求。
基于上述原理，本申请提供了一种TOSA，该TOSA包括封装部件、DML、第一电感和第一电容。其中：
第一电容连接在封装部件的第一输出端和第二输出端之间，第一电感的一端与封装部件的第一输出端连接，第一电感的另一端与DML的第一输入端连接，DML的第二输入端与封装部件的第二输出端连接，第一电感和第一电容用于改变TOSA的输入阻抗。
由上可知，相比于现有技术，在封装部件的第一输出端和第二输出端之间增加了第一电容，在封装部件的第一输出端和DML的第一输入端之间增加了第一电感。由于第一电容和第一电感具有频率响应，即在不同的频率处体现出不同的虚部阻抗，因此，通过第一电容和第一电感能够改变TOSA的输入阻抗，使得TOSA的输入阻抗与光纤通信系统中的光承载模块中的光驱动模块的阻抗一致，使得TOSA具有更高带宽的表现，从而使得TOSA满足光承载模块和光纤通信系统对更高速率的要求。此外，由于本申请通过第一电容和第一电感改变TOSA的输入阻抗，使TOSA能够满足光承载模块和光纤通信系统对更高速率的要求，相比于相关技术中的提供TOSA，无需采用高带宽的管壳封装、高带宽的DML以及共晶工艺，降低了工艺复杂度和制作成本，提升了制造良率。
在一种可能的实现方式中，采用引线键合的方式将封装部件的第一输入端和第一输出端连接，采用引线键合的方式将封装部件的第二输入端和第二输出端连接。相比于共晶工 艺，引线键合的工艺能够降低工艺复杂度和成本，提升制作良率。
下面对封装部件、DML以及第一电容和第一电感进行说明。
由于封装部件的结构已经在常规的TOSA中的封装部件的描述中提及，因此此处不再赘述。封装部件中的每个部分的材料如下所述：
第一引脚、第二引脚和管座的材料包括但不限于铜等金属。
基板的材料包括但不限于陶瓷等绝缘材料。第一金属层和第二金属层的材料包括但不限于金、锡、银等金属材料。
第一引脚的数量和第二引脚的数量例如可以为一个或者多个，具体的，可以根据TOSA的功率等参数设置。
第一引脚为封装部件的第一输入端，第二引脚为封装部件的第二输入端。第一金属层为封装部件的第一输出端，第二金属层为封装部件的第二输出端。
由上文中对封装部件的输出端和输入端的连接方式的描述可知，第一引脚与第一金属层采用引线键合的方式连接，第二引脚与第二金属层采用引线键合的方式连接。该引线键合方式中所采用的引线的材料包括但不限于金、铜、铝等金属材料。引线的数量和每根引线的直径根据TOSA的功率等参数确定。
由于此处采用了引线键合的方式，因此，相比于共晶工艺，降低了工艺复杂度和成本，提升了制作良率。
封装部件的类型例如可以为TO封装、BOX封装或者COB封装等，本申请对此不作特殊限定。
DML的结构已经在常规的TOSA中的DML的描述中提及，因此此处不再赘述。DML中的第一键合区域为DML的第一输入端，DML的背面为DML的第二输入端。
第一电容和第一电感的实现方式可以包括以下三种，其中：
第一种，设置一外部电容，以及将该外部电容作为第一电容。由于第一电容连接在封装部件的第一输出端和第二输出端之间，因此，该外部电容的一端与第一金属层连接，外部电容的另一端与第二金属层连接。
由于第一电感设置在封装部件的第一输出端与DML的第一输入端之间，又由于金属线在通电的情况下，可以产生电感，因此，可以通过一金属线将DML的第一键合区域和第一金属层连接，并将该金属线上产生的电感作为第一电感。这样，就在封装部件的第一输出端与DML的第一输入端之间引入了第一电感。
金属线的材料包括但不限于金、铜、铝等金属。金属线上产生的电感的电感值与金属线的材料、金属线的直径、金属线的长度等相关。
需要说明的是，由于常规TOSA中的DML上的第一键合区域与第一金属层之间也是通过金属线连接的，但是由于该金属线上产生的电感很小，因此忽略不计。而在本申请中，虽然也采用金属线连接，但是本申请中的金属线的规格需要与第一电感的参数匹配，即金属线上产生的电感的电感值与第一电感的电感值相同。
基于上述第一种实现方式，在一种可能的实现方式中，参考图4所示，本申请实施例提供了一种TOSA，该TOSA包括：封装部件、DML 401、外部电容402、金属线403。其中：
封装部件包括第一引脚404、第二引脚405、管座406和基板407。其中，第一引脚 404和第二引脚405垂直设置在管座406上且穿透管座406，基板407设置在管座406上。基板407上设置有第一金属层408和第二金属层409。采用引线键合的方式将第一引脚404与第一金属层408连接，采用引线键合的方式将第二引脚405与第二金属层409连接。
DML 401的背面设置在第二属层金409上。具体的，可以采用焊料(例如锡或者金锡等)或者导电胶(例如银胶)或者共晶工艺将DML 401的背面设置在第二金属层409上。金属线403的一端与DML 401的第一键合区域连接，金属线403的另一端与第一金属层408连接。外部电容402的一端与第一金属层408连接，外部电容402的第二端与第二金属层409的连接。
在该TOSA中，将外部电容402作为第一电容，将金属线403上产生的电感作为第一电感。
该TOSA从第一引脚404和第二引脚405接收电信号，并将电信号传递至第一金属层408和第二金属层409。第一金属层408和第二金属层409将电信号通过DML的背面和金属线403传递至DML内部，DML将电信号转换为光信号。
图5为本申请提供的TOSA与常规的TOSA的带宽仿真比对图一。如图5所示，曲线501用于指示常规的TOSA的带宽仿真曲线，曲线502用于指示本申请提供的TOSA的带宽仿真曲线。图5中的横坐标为频率，纵坐标为信号在传输过程中的损耗。由曲线501可知，在损耗在-3db的基准下，常规的TOSA的带宽为6Ghz。由曲线502可知，在损耗在-3db的基准下，本申请提供的TOSA的带宽为9Ghz。显然，在-3db的基准下，相比于常规的TOSA，本申请提供的TOSA的带宽提升了3Ghz。
第二种，由于基板上设置有第一金属层和第二金属层，又由于第一金属层和第二金属层及其两者之间的间隙能够构成一个电容，因此，可以复用该电容，将该电容作为第一电容。
由于由常规TOSA中的DML的第一金属层和第二金属层及其两者之间的间隙构成的电容的电容值太小，因此在小信号电路模型中可以忽略不计，即该电容的电容值不符合本申请对电容值的要求。由于电容的电容值与第一金属层与第二金属层的相对面积和距离相关，因此，可以通过对第一金属层和第二金属层的形状及其两者之间的距离以及第一金属层和第二金属层的厚度进行改进，以使电容的电容值符合第一电容的要求，即由第一金属层和第二金属层及其两者之间的间隙构成的电容的电容值等于第一电容的电容值。又由于第一金属层与第二金属层的相对面积和距离决定了第一金属层与第二金属层之间的间隙的形状和尺寸，因此，第一金属层与第二金属层之间的间隙的形状和尺寸可以根据第一电容的电容值确定。在一种可能的实现的方式中，间隙的形状例如可以为锯齿状、S型等。
第一电感的实现方式与第一种方式中的第一电感的实现方式相同，因此此处不再赘述。
基于上述第二种实现方式，在一种可能的实现方式中，参照图6所示，本申请实施例提供了一种TOSA，该TOSA包括：封装部件、DML 601、金属线602。其中：
封装部件包括第一引脚603、第二引脚604、管座605和基板606。其中，第一引脚603和第二引脚604垂直设置在管座605上且穿透管座605，基板606设置在管座605上。基板606上设置有第一金属层607和第二金属层608。采用引线键合的方式将第一引脚603与第一金属层607连接，采用引线键合的方式将第二引脚604与第二金属层608连接。
将第一金属层607和第二金属层608及其两者之间的间隙609构成的电容作为第一电 容。图7为图6中的局部区域610的放大图，如图7所示，该第一电容中的间隙的形状为锯齿状。
DML 601的背面设置在第二金属层608上。DML的背面的设置方式已经在上文中进行了说明，因此此处不再赘述。金属线602的一端与DML 601的第一键合区域连接，金属线602的另一端与第一金属层607连接。将金属线602上产生的电感作为第一电感。
该TOSA的工作原理与图4中的TOSA的工作原理相同，因此此处不再赘述。
图8为本申请提供的TOSA与常规的TOSA的带宽仿真比对图二。如图8所示，曲线801用于指示常规的TOSA的带宽仿真曲线，曲线802用于指示本申请提供的TOSA的带宽仿真曲线。图8中的横坐标为频率，纵坐标为信号在传输过程中的损耗。由曲线801可知，在损耗在-3db的基准下，常规的TOSA的带宽为12Ghz。由曲线802可知，在损耗在-3db的基准下，本申请提供的TOSA的带宽为14Ghz。显然，在-3db的基准下，相比于常规的TOSA，本申请提供的TOSA的带宽提升了2Ghz。
在本申请的其他实施例中，如图9所示，间隙的形状还可以为S型。
第三种，在DML中制作第一电容和第一电感。具体的，基于上述DML，DML还包括第二键合区域，连接在第一键合区域和第二键合区域之间的折线电感，位于第一键合区域、第二键合区域和折线电感下方的隔离层，位于隔离层下方的衬底。
其中，将由第二键合区域、隔离层和衬底构成的电容作为第一电容，将折线电感作为第一电感。第二键合区域与封装部件的第一输出端连接，DML的背面与封装部件的第二输出端连接。
第二键合区域、第一键合区域和折线电感的材料可以为铝、金等金属材料。采用镀膜(金属膜)工艺形成第二键合区域、第一键合区域和折线电感。隔离层的材料为氧硅(SIO2)等绝缘材料。
基于上述第三种实现方式，在一种可能的实现方式中，参见图10和图11所示，本申请实施例提供了一种DML。图10为DML的立体图，图11为图10的俯视图。如图10和图11所示，DML包括第一键合区域1001、第二键合区域1002和折线电感1003，其中，折线电感1003位于第一键合区域1002和第二键合区域1002之间，且折线电感1003的一端与第一键合区域1001连接，折线电感1003的另一端与第二键合区域1002连接。第一键合区域1001、第二键合区域1002和折线电感1003下方设置有隔离层1004，隔离层1004下方设置有衬底。
如图10和图11所示，将第二键合区域1002、隔离层1004和衬底构成的电容作为第一电容，将折线电感1003作为第一电感。第一键合区域1001为DML的第一输入端。DML的背面为DML的第二输入端。第二键合区域1002为第一电容的一端，并用于与封装部件的第一输出端连接。
图12为应用图10中的DML的TOSA与常规的TOSA的带宽仿真比对图。如图12所示，曲线1201用于指示常规的TOSA的带宽仿真曲线，曲线1202用于指示应用图10中的DML的TOSA的带宽访问曲线。图12中的横坐标为频率，纵坐标为信号在传输过程中的损耗。由曲线1201可知，在损耗在-3db的基准下，常规的TOSA的带宽为5Ghz。由曲线1202可知，在损耗在-3db的基准下，应用图10中的DML的TOSA的带宽为7Ghz。显然，在-3db的基准下，相比于常规的TOSA，应用图10中的DML的TOSA的带宽提 升了2Ghz。
图13为常规的10G的TOSA的带宽测试示意图，图14为通过本申请所述的原理对10G的TOSA进行改进后的带宽测试示意图。由图可知，常规的10G的TOSA在3db的基准下的带宽为5.4GHz，改进后的10G的TOSA在3db的基准下的带宽为7.6GHz。显然，通过本申请的原理对常规的10G的TOSA改进后，该10G的TOSA的带宽增加了2.2GHz。
需要说明的是，上述关于第一电感和第一电容的实现方式仅为示例性的，并不用于限定本申请，例如，还可以通过上述三种方式中的至少两种方式来实现第一电感和第一电容。
本申请还可以供了一种光承载模块，该光承载模块包括光驱动模块和上文中所述的任一种TOSA。其中，光驱动模块用于向TOSA提供电信号，TOSA用于将光驱动模块提供的电信号转换为光信号。将该TOSA应用在该光承载模块中时，该TOSA能够满足光承载模块对更高速率的要求，同时提升了光承载模块的眼图指标。
图15为现有的光承载模块的眼图测试示意图，图16为本申请提供的光承载模块的眼图测试示意图。相比于图15，图16中的眼图线形更细，眼张开幅度更大，说明光承载模块的性能得到了提升。
本申请还提供了一种网络设备，该网络设备包括上述光承载模块。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (10)

  1. 一种光发射组件，其特征在于，包括：封装部件、直接调制激光器、第一电感和第一电容，其中：
    所述第一电容连接在所述封装部件的第一输出端和第二输出端之间；
    所述第一电感的一端与所述封装部件的第一输出端连接，所述第一电感的另一端与所述直接调制激光器的第一输入端连接；
    所述直接调制激光器的第二输入端与所述封装部件的第二输出端连接；
    所述第一电感和所述第一电容用于改变所述光发射组件的输入阻抗。
  2. 根据权利要求1所述的光发射组件，其特征在于，所述封装部件包括基板和设置在所述基板上的第一金属层和第二金属层；
    所述第一金属层为所述封装部件的第一输出端，所述第二金属层为所述封装部件的第二输出端；
    所述直接调制激光器包括第一键合区域，其中，所述第一键合区域为所述直接调制激光器的第一输入端，所述直接调制激光器的背面为所述直接调制激光器的第二输入端；
    所述直接调制激光器的第一键合区域通过一金属线与所述第一金属层连接，所述直接调制激光器的背面设置在所述第二金属层上，其中，将所述金属线上产生的电感作为所述第一电感；
    设置一外部电容，所述外部电容的一端与所述第一金属层连接，所述外部电容的另一端与所述第二金属层连接，将所述外部电容作为所述第一电容。
  3. 根据权利要求1所述的光发射组件，其特征在于，所述封装部件包括基板和设置在所述基板上的第一金属层和第二金属层；
    所述第一金属层为所述封装部件的第一输出端，所述第二金属层为所述封装部件的第二输出端；
    所述直接调制激光器包括第一键合区域，其中，所述第一键合区域为所述直接调制激光器的第一输入端，所述直接调制激光器的背面为所述直接调制激光器的第二输入端；
    所述直接调制激光器的第一键合区域通过一金属线与第一金属层连接，所述直接调制激光器的背面设置在所述第二金属层上，其中，将所述金属线上产生的电感作为所述第一电感；
    将由所述第一金属层、所述第二金属层以及两者之间的间隙构成的电容作为所述第一电容。
  4. 根据权利要求3所述的光发射组件，其特征在于，所述间隙的形状和尺寸根据所述第一电容的电容值确定。
  5. 根据权利要求3或4所述的光发射组件，其特征在于，所述间隙的形状为锯齿状。
  6. 根据权利要求2～5中任一项所述的光发射组件，其特征在于，所述基板的材料为陶瓷，所述第一金属层、所述第二金属层和所述金属线的材料为金。
  7. 根据权利要求1～6中任一项所述的光发射组件，其特征在于，所述直接调制激光器包括第一键合区域、第二键合区域、连接在所述第一键合区域和所述第二键合区域之间的折线电感、位于所述第一键合区域和所述第二键合区域以及所述折线电感下方的隔离层、位于所述隔离层下方的衬底；
    其中，将由所述第二键合区域、所述隔离层和所述衬底构成的电容作为第一电容，将所述折线电感作为第一电感，所述第一键合区域为所述直接调制激光器的第一输入端，所述直接调制激光器的背面为所述直接调制激光器的第二输入端。
  8. 根据权利要求1～7中任一项所述的光发射组件，其特征在于，
    采用引线键合的方式将所述封装部件的第一输入端和所述封装部件的第一输出端连接。
    采用引线键合的方式将所述封装部件的第二输入端和所述封装部件的第二输出端连接。
  9. 根据权利要求7所述的光发射组件，其特征在于，所述封装部件还包括第一引脚和第二引脚，其中：
    将所述第一引脚作为所述封装部件的第一输入端，将所述第二引脚作为所述封装部件的第二输入端。
  10. 根据权利要求9所述的光发射组件，其特征在于，所述封装部件还包括管座，其中，所述第一引脚和所述第二引脚设置在所述管座上。
PCT/CN2020/138054 2020-12-21 2020-12-21 光发射组件 WO2022133659A1 (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115933070A (zh) * 2022-07-21 2023-04-07 青岛海信宽带多媒体技术有限公司 一种光模块及激光组件

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101416426A (zh) * 2006-03-02 2009-04-22 菲尼萨公司 具有集成光滤波器的直接调制激光器
US7899277B2 (en) * 2008-05-28 2011-03-01 Jds Uniphase Corporation Integrated on-chip inductors and capacitors for improved performance of an optical modulator
US20150222088A1 (en) * 2014-01-31 2015-08-06 Photodigm Inc. Light Emitting Device with Extended Mode-Hop-Free Spectral Tuning Ranges and Method of Manufacture
CN105026941A (zh) * 2013-03-08 2015-11-04 欧司朗光电半导体有限公司 用于测量和优化光电子组件的方法和设备
US20180024185A1 (en) * 2015-02-05 2018-01-25 Osram Opto Semiconductors Gmbh Method and Device for Inspecting an Optoelectronic Component
WO2020056662A1 (zh) * 2018-09-20 2020-03-26 华为技术有限公司 一种光电子组件及其制造方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101416426A (zh) * 2006-03-02 2009-04-22 菲尼萨公司 具有集成光滤波器的直接调制激光器
US7899277B2 (en) * 2008-05-28 2011-03-01 Jds Uniphase Corporation Integrated on-chip inductors and capacitors for improved performance of an optical modulator
CN105026941A (zh) * 2013-03-08 2015-11-04 欧司朗光电半导体有限公司 用于测量和优化光电子组件的方法和设备
US20150222088A1 (en) * 2014-01-31 2015-08-06 Photodigm Inc. Light Emitting Device with Extended Mode-Hop-Free Spectral Tuning Ranges and Method of Manufacture
US20180024185A1 (en) * 2015-02-05 2018-01-25 Osram Opto Semiconductors Gmbh Method and Device for Inspecting an Optoelectronic Component
WO2020056662A1 (zh) * 2018-09-20 2020-03-26 华为技术有限公司 一种光电子组件及其制造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115933070A (zh) * 2022-07-21 2023-04-07 青岛海信宽带多媒体技术有限公司 一种光模块及激光组件
WO2024016905A1 (zh) * 2022-07-21 2024-01-25 青岛海信宽带多媒体技术有限公司 光模块及激光组件

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