WO2022113474A1 - Solid-state imaging element and imaging apparatus - Google Patents
Solid-state imaging element and imaging apparatus Download PDFInfo
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Definitions
- This technology relates to a solid-state image sensor. More specifically, the present invention relates to a solid-state image sensor that performs analog-to-digital conversion using a comparator, and an image pickup device.
- an ADC Analog to Digital Converter
- a solid-state image sensor has been proposed in which a fixed externally applied voltage is applied to an input terminal on the lamp side of a comparator in a single-slope ADC (see, for example, Patent Document 1).
- the voltage of the input terminal of the comparator is initialized to an appropriate value at the time of auto-zero operation by the externally applied voltage.
- the lower limit of the operating range of the comparator may fluctuate due to process variation, and at that time, the auto-zero voltage determined by the externally applied voltage deviates from the operating range and the operation of the comparator is unstable. May become.
- This technique was created in view of such a situation, and aims to stabilize the operation of the comparator in the solid-state image sensor in which the ADC including the comparator is arranged.
- the present technology has been made to solve the above-mentioned problems, and the first aspect thereof is a pair of differential transistors that amplify the difference between an input voltage and a predetermined reference voltage, and the above-mentioned pair of differences.
- An auto-zero transistor that opens and closes the path between one gate and drain of a dynamic transistor and an auto-zero potential whose fluctuation amount due to process variation is substantially the same as the fluctuation amount of the gate-source voltage of the differential transistor are generated.
- It is a solid-state imaging device including an auto-zero potential generation circuit that supplies to the other gate of a pair of differential transistors. This has the effect of stabilizing the operation of the comparator.
- the auto-zero transistor is a pMOS (p-channel Metal Oxide Semiconductor) transistor
- the pair of differential transistors is an nMOS (n-channel MOS) transistor
- the auto-zero potential generation is performed.
- the circuit may include an external pMOS transistor in an on state, an external nMOS transistor in an on state, and an external current mirror transistor that supplies a current to the external pMOS transistor and the external nMOS transistor.
- the auto-zero transistor and the pair of differential transistors are nMOS transistors, and the auto-zero potential generation circuit supplies a current to the on-state external nMOS transistor and the external nMOS transistor. It may include an external current mirror transistor. This has the effect of improving robustness.
- a current mirror circuit and a pair of cascode transistors inserted between the pair of differential transistors and the current mirror circuit are further provided, and the auto-zero potential generation circuit is described above.
- One of the pair of cascode transistors may be controlled to be turned on within a predetermined auto-zero period. This has the effect of reducing the input offset voltage of the comparator.
- the comparator further comprising a pixel array portion in which a plurality of pixels are arranged in a two-dimensional lattice, and includes the pair of differential transistors and the auto-zero transistor is the pixel array. It may be arranged in each row of parts. This has the effect of performing analog-to-digital conversion on a column-by-column basis.
- the auto-zero potential generation circuit may be arranged for each of the above columns. This has the effect of generating an auto-zero potential for each row.
- the auto-zero potential generation circuit may be shared by the respective comparators in a plurality of rows. This has the effect of reducing the circuit scale.
- the second aspect of the present technology is a pair of differential transistors that amplify the difference between the input voltage and a predetermined reference voltage and output it as a pixel signal, and one gate and drain of the pair of differential transistors.
- An auto-zero transistor that opens and closes the path between the transistors and an auto-zero potential whose fluctuation amount due to process variation is substantially the same as the fluctuation amount between the gate and source of the differential transistor are generated at the other gate of the pair of differential transistors.
- It is an image pickup apparatus including an auto-zero potential generation circuit for supplying and a signal processing circuit for processing image data in which the pixel signals are arranged. This has the effect of stabilizing the operation of the comparator in the image pickup device.
- FIG. 1 It is a block diagram which shows an example of the schematic structure of a vehicle control system. It is explanatory drawing which shows an example of the installation position of the vehicle exterior information detection unit and the image pickup unit. It is a figure which shows an example of the schematic structure of an endoscopic surgery system. It is a block diagram which shows an example of the functional structure of the camera head and CCU shown in FIG.
- FIG. 1 is a block diagram showing a configuration example of an image pickup apparatus 100 according to a first embodiment of the present technology.
- the image pickup device 100 captures image data, and includes an optical system 110, a solid-state image pickup element 200, a signal processing circuit 120, a memory 130, and a monitor 140.
- the optical system 110 collects incident light and guides it to the solid-state image sensor 200.
- the optical system 110 includes one or a plurality of lenses.
- the solid-state image sensor 200 generates image data by photoelectric conversion in synchronization with a vertical synchronization signal.
- the vertical synchronization signal is a periodic signal indicating the imaging timing, and the frequency is, for example, 30 hertz (Hz).
- the solid-state image sensor 200 supplies the generated image data to the signal processing circuit 120.
- the signal processing circuit 120 performs various signal processing such as demosaic processing and white balance correction processing on the image data.
- the signal processing circuit 120 supplies the processed image data to the memory 130 and the monitor 140. It should be noted that some or all of the processing performed by the signal processing circuit 120 can be performed in the solid-state image sensor 200.
- the memory 130 stores image data.
- the monitor 140 displays image data.
- FIG. 2 is a block diagram showing a configuration example of the solid-state image sensor 200 according to the first embodiment of the present technology.
- the solid-state image sensor 200 includes a vertical scanning circuit 211, a timing control circuit 212, a DAC (Digital to Analog Converter) 213, a pixel array unit 214, a column ADC 230, and a horizontal transfer scanning circuit 215.
- DAC Digital to Analog Converter
- Pixels 220 are arranged in a two-dimensional grid pattern in the pixel array unit 214.
- the set of pixels 220 arranged in the horizontal direction is referred to as a “row”, and the set of pixels 220 arranged in the vertical direction is referred to as a “column”.
- the pixel 220 photoelectrically converts the incident light to generate an analog pixel signal.
- the vertical scanning circuit 211 selects and drives rows in order, and outputs a pixel signal to the column ADC 230.
- the timing control circuit 212 controls the operation timings of the vertical scanning circuit 211, the DAC 213, the column ADC 230, and the horizontal transfer scanning circuit 215 in synchronization with the vertical synchronization signal.
- the DAC 213 generates a predetermined reference signal and supplies it to the column ADC 230.
- the reference signal for example, a saw wavy lamp signal is used.
- the column ADC 230 is provided with an ADC for each column, and performs AD (Analog to Digital) conversion for each pixel signal of the column.
- the column ADC 230 sequentially outputs the digital signals after AD conversion to the signal processing circuit 120 under the control of the horizontal transfer scanning circuit 215. For each row, AD conversion of the pixel signal of each column in the row is executed, and AD conversion is executed for all rows, so that one image data is generated.
- the horizontal transfer scanning circuit 215 controls the column ADC 230 to output digital signals in order.
- FIG. 3 is a circuit diagram showing a configuration example of the pixel 220 according to the first embodiment of the present technology.
- the pixel 220 includes a photoelectric conversion element 221, a transfer transistor 222, a reset transistor 223, a floating diffusion layer 224, an amplification transistor 225, and a selection transistor 226.
- the photoelectric conversion element 221 photoelectrically converts incident light to generate an electric charge.
- the transfer transistor 222 transfers electric charges from the photoelectric conversion element 221 to the stray diffusion layer 224 according to the transfer signal TRG from the vertical scanning circuit 211.
- the reset transistor 223 is initialized by extracting electric charges from the floating diffusion layer 224 according to the reset signal RST from the vertical scanning circuit 211.
- the floating diffusion layer 224 accumulates electric charges and generates a voltage according to the amount of electric charges.
- the amplification transistor 225 amplifies the voltage of the stray diffusion layer 224.
- the selection transistor 226 outputs a signal of the amplified voltage as a pixel signal according to the selection signal SEL from the vertical scanning circuit 211.
- a vertical signal line 229 is wired in the pixel array unit 214 for each row, and the pixel signal of each pixel 220 in the row is output to the column ADC 230 via the vertical signal line 229 in the row.
- the circuit configuration of the pixel 220 is not limited to the configuration illustrated in the figure as long as it can generate a pixel signal.
- FIG. 4 is a block diagram showing a configuration example of the column ADC 230 according to the first embodiment of the present technology.
- this column ADC 230 an ADC 231 and a latch circuit 235 are arranged for each column.
- the ADC 231 and the latch circuit 235 are arranged 2048 each.
- ADC231 converts the analog pixel signal of the corresponding column into a digital signal.
- Each of the ADCs 231 includes an auto-zero potential generation circuit 410, capacitances 232 and 233, a comparator 420, and a counter 234.
- One end of the capacitance 232 is connected to the vertical signal line 229, and the other end is connected to the input terminal of the comparator 420.
- One end of the capacitance 233 is connected to the DAC 213 and the other end is connected to the input terminal of the comparator 420.
- the auto-zero potential generation circuit 410 generates a predetermined auto-zero potential and supplies it to the comparator 420.
- a pixel signal from the pixel array unit 214 and a reference signal from the DAC 213 are input to the comparator 420 via the capacitances 232 and 233.
- the voltage of the pixel signal is defined as the input voltage V VSL
- the voltage of the reference signal is defined as the reference voltage V ram .
- the comparator 420 compares the input voltage VVSL with the reference voltage Vramp , and outputs the comparison result to the counter 234.
- the counter 234 counts the count value over the period until the comparison result is reversed.
- the counter 234 outputs a digital signal indicating the count value to the latch circuit 235.
- the latch circuit 235 holds the digital signal from the corresponding ADC 231.
- the latch circuit 235 supplies a digital signal to the signal processing circuit 120 under the control of the horizontal transfer scanning circuit 215.
- an ADC other than the single slope type can be arranged if the ADC includes the comparator 420.
- SARADC Successessive Approximation Register Analog to Digital Converter
- the ADC is arranged for each column, it is also possible to arrange the ADC for each pixel.
- a circuit that generates a time code based on the counter value is arranged outside the pixel array unit, and an ADC composed of a comparator and a data storage unit is arranged for each pixel. Then, the time code when the comparison result is inverted is held in the data storage unit as a digital signal.
- FIG. 5 is a circuit diagram showing a configuration example of an auto-zero potential generation circuit 410 and a comparator 420 in the ADC 231 according to the first embodiment of the present technology.
- the auto-zero potential generation circuit 410 includes an external current mirror transistor 411, an external pMOS transistor 412, and an external nMOS transistor 413.
- the external current mirror transistor 411 for example, a pMOS transistor is used.
- the comparator 420 includes current mirror transistors 421 and 422, pMOS transistors 431 to 434, 428, 249, differential transistors 423 and 424, a tail current source 425, and an auto-zero transistor 426.
- a pMOS transistor is used as the current mirror transistor 421, the current mirror transistor 422, and the auto zero transistor 426.
- the differential transistors 423 and 424 nMOS transistors are used.
- the current mirror transistors 421 and 422 are connected in parallel to the node of the power supply voltage VDD. Further, the gate of the current mirror transistor 421 is connected to the gate of the current mirror transistor 422 and the gate of the external current mirror transistor 411.
- the external pMOS transistor 412 and the external nMOS transistor 413 are connected in series between the external current mirror transistor 411 and the node of the reference voltage (ground voltage, etc.) VSS.
- the gate of the external pMOS transistor 412 is connected to the node of the reference voltage VSS, and the gate of the external nMOS transistor 413 is connected to its drain. By these connections, both the external pMOS transistor 412 and the external nMOS transistor 413 are turned on.
- the pMOS transistor 431 opens and closes the path between the connection node of the current mirror transistor 421 and the differential transistor 423 and the gate of the differential transistor 423 according to the control signal x ⁇ 2 from the timing control circuit 212.
- the pMOS transistor 432 opens and closes the path between the gate and drain of the current mirror transistor 421 according to the control signal x ⁇ 7 from the timing control circuit 212.
- the pMOS transistor 433 opens and closes the path between the gate and drain of the current mirror transistor 422 according to the control signal x ⁇ 6 from the timing control circuit 212.
- the potential of the connection node between the external current mirror transistor 411 and the external pMOS transistor 412 is defined as the auto-zero potential Vext .
- the pMOS transistor 428 opens and closes the path between the node of the auto-zero potential Vext and the gate of the differential transistor 423 according to the control signal x ⁇ 4 from the timing control circuit 212.
- the pMOS transistor 429 opens and closes the path between the node of the auto-zero potential Vext and the gate of the differential transistor 424 according to the control signal x ⁇ 3 from the timing control circuit 212.
- the gate of the differential transistor 423 is also connected to the capacitance 232 on the vertical signal line 229 side.
- the drain of the differential transistor 423 is connected to the drain of the current mirror transistor 421.
- the gate of the differential transistor 424 is connected to the capacitance 233 on the DAC 213 side.
- the drain of the differential transistor 424 is connected to the drain of the current mirror transistor 422.
- the voltage of the connection node of the current mirror transistor 422 and the differential transistor 424 is output to the counter 234 as an output voltage Vout indicating the comparison result.
- the tail current source 425 is commonly connected to the sources of the differential transistors 423 and 424.
- As the tail current source 425 for example, an nMOS transistor is used.
- the auto-zero transistor 426 opens and closes the path between the gate and drain of the differential transistor 424 according to the control signal x ⁇ 1.
- the control signal x ⁇ 1 is supplied by, for example, the timing control circuit 212.
- the current supplied by the tail current source 425 is defined as IT.
- the external current mirror transistor 411 supplies the IT / 2 current to the external pMOS transistor 412 and the external nMOS transistor 413, respectively.
- the gate-source voltage VN_TM of the external nMOS transistor 413 corresponding to this current is expressed by the following equation.
- VN_TM VTHN_TM + ( IT / ⁇ TM ) 1/2 ... Equation 1
- VTHN_TM is the threshold voltage of the external nMOS transistor 413
- ⁇ TM is a coefficient determined by the size of the transistor, the oxide film capacity, and the like.
- VP_AZM V THP_AZM + ( IT / ⁇ AZM ) 1/2 ... Equation 2
- VTHP_AZM is the threshold voltage of the external pMOS transistor 412
- ⁇ AZM is a coefficient determined by the size of the transistor, the oxide film capacity, and the like.
- the auto-zero potential Vext is expressed by the following equation.
- the input range (in other words, the operating range) of the comparator 420 is expressed by the following equation.
- VOV0 indicates the voltage between the source of the differential transistor 423 and the reference voltage VSS (in other words, the source voltage).
- VN_dim indicates the gate-source voltage of the differential transistor 423.
- VOV01 represents the drain-source voltage of the differential transistor 423.
- VP_cur indicates the voltage between the gate and the source of the current mirror transistor 421.
- Equation 6 the difference between the voltage VN_TM and the voltage VN_dif corresponds to the difference in the threshold voltage of the external nMOS transistor 413 and the differential transistor 423 if the respective coefficients ⁇ are the same.
- VN_TM > VP_AZM .
- VTHN_dim is the threshold voltage of the differential transistor 423.
- the external nMOS transistor 413 is an nMOS transistor having a threshold voltage higher than the differential transistor 423 by VOV0 or more.
- Equation 6 the difference between the voltage VP_AZM and the voltage VN_dif is premised on the condition that VP_AZM ⁇ VN_TM is satisfied. Therefore, if the condition (1) is satisfied, there is a problem. It does not become.
- the on-resistance RON of the auto-zero transistor 426 is expressed by the following equation.
- R ON 1 / ⁇ AZ (V ext -V THP_AZ ) ⁇ ... Equation 8
- VTHP_AZ is the threshold voltage of the auto-zero transistor 426
- ⁇ AZ is a coefficient determined by the size of the transistor, the oxide film capacity, and the like.
- the on-resistance RON is inversely proportional to the auto-zero potential Vext input to the differential transistor 423. Therefore, if the auto-zero potential Vext is set too low in order to widen the operating range, the on -resistance RON rises and the settling time of auto-zero is extended. Therefore, the auto-zero potential Vext needs to be determined in consideration of the on -resistance RON in addition to the operating range of the comparator 420.
- Equation 3 Substituting Equation 3 into Equation 8 yields the following equation.
- Equation 9 can be replaced with the following equation.
- R ON 1 / ⁇ ( ⁇ AZ IT ) 1/2 ⁇ ⁇ ⁇ ⁇ Equation 11
- Equation 11 From Equation 11, it can be said that the dependence of the on-resistance RON on the process variation is small. Further, the on-resistance RON when VP_AZM ⁇ VN_TM is smaller than the value of Equation 11 because it is premised that the condition of VP_AZM ⁇ VN_TM is satisfied.
- FIG. 6 is a timing chart showing an example of the operation of the solid-state image sensor 200 according to the first embodiment of the present technology.
- the timing control circuit 212 supplies low-level control signals x ⁇ 1 and x ⁇ 4.
- the control signals x ⁇ 2 and x ⁇ 3 are set to a high level.
- the timing control circuit 212 sets the control signal x ⁇ 6 to a high level and sets the control signal x ⁇ 7 to a low level, and immediately after the timing T1, sets the control signal x ⁇ 6 to a low level and sets the control signal x ⁇ 7 to a high level.
- the pixel 220 supplies the reset level as the input voltage VVSL via the vertical signal line 229.
- the reset level indicates the level when the pixel 220 is initialized, and is also called the P phase level.
- the DAC 213 gradually increases the level of the reference signal.
- the reset level (P phase level) is AD converted within this period.
- the pixel 220 supplies the signal level as an input voltage VVSL via the vertical signal line 229.
- the signal level indicates the level when the electric charge is transferred to the floating diffusion layer in the pixel 220, and is also called the D phase level.
- the DAC 213 gradually increases the level of the reference signal. The signal level (D phase level) is AD converted within this period.
- the level (low level) of the control signal x ⁇ 1 at the time of auto zero is set to a relatively high value.
- the voltage dropped from the power supply voltage VDD by the drain-source voltage of the current mirror transistor connected to the diode is used as the low level of the control signal x ⁇ 1 at auto zero.
- the column ADC230 or the circuit in the subsequent stage performs CDS (Correlated Double Sampling) processing for obtaining the difference between the P phase level and the D phase level as a net pixel signal.
- CDS Correlated Double Sampling
- FIG. 7 is a graph showing an example of the characteristics of the comparator according to the first embodiment of the present technique.
- the vertical axis shows the voltage and the horizontal axis shows the resistance value.
- the lower limit of the operating range of the comparator 420 may fluctuate depending on the variation in the process.
- Arrows with "SS” in the figure indicate the range of variation.
- the lower limit of the operating range changes (for example, rises) according to the fluctuation of the voltage VN_dim between the gate and the source of the differential transistor 423 due to the variation in the process.
- the lower limit of the operating range fluctuates (rises), so that the auto-zero potential V ext may deviate from the operating range and the comparator 420 may become unstable. For example, an event in which the inversion of the comparison result of the comparator 420 is significantly delayed or an event in which the inversion is not performed occurs.
- the fluctuation amount due to the process variation is the fluctuation amount of the voltage VN_dif between the gate and the source of the differential transistor 423. It supplies substantially the same auto-zero potential V ext .
- the auto-zero potential Vext also fluctuates (rises).
- the auto-zero potential V ext does not go out of the operating range. Therefore, the operation of the comparator 420 can be stabilized.
- substantially the same means that the difference between the two values to be compared is less than a predetermined allowable value.
- the on-resistance RON may fluctuate depending on the variation of the process. Therefore, in the auto-zero potential generation circuit 410, as illustrated in Equation 3, when VN_TM ⁇ VP_AZM , the amount of fluctuation due to process variation is substantially the same as the amount of fluctuation of the threshold voltage V THP_AZM of the auto-zero transistor 426. The potential Vext is supplied. Therefore, as illustrated in Equation 10, fluctuations in the on -resistance RON can be suppressed. As a result, it is possible to prevent a long settling time at the time of auto zero.
- the auto-zero potential generation circuit 410 supplies an auto-zero potential in which the amount of fluctuation due to process variation is substantially the same as that of the auto-zero transistor 426, so that the comparator 420 operates. Can be stabilized.
- Second Embodiment> In the first embodiment described above, the pMOS transistor is used as the auto-zero transistor 426, but in this configuration, an external pMOS transistor 412 is required in order to suppress fluctuations in the on -resistance RON.
- the solid-state image sensor 200 of the second embodiment is different from the first embodiment in that the number of external pMOS transistors 412 is reduced by using the nMOS transistor as an auto-zero transistor.
- FIG. 8 is a circuit diagram showing a configuration example of the auto-zero potential generation circuit 410 and the comparator 420 according to the second embodiment of the present technology.
- the comparator 420 of the second embodiment differs from the first embodiment in that it includes an nMOS auto-zero transistor 427 instead of the pMOS auto-zero transistor 426.
- a control signal ⁇ 1 that becomes a high level within the auto-zero period is input to the auto-zero transistor 427.
- the auto-zero potential generation circuit 410 of the second embodiment is different from the first embodiment in that the external pMOS transistor 412 is not arranged.
- Equation 8 can be replaced with the following equation by changing the auto-zero transistor to nMOS.
- R ON 1 / ⁇ AZ (V ext -V THN_AZ ) ⁇ ... Equation 12
- VTHN_AZ indicates the threshold voltage of the nMOS transistor.
- the on-resistance RON also changes according to the fluctuation of the characteristics of the nMOS transistor as well as the operating range. Therefore, unlike the first embodiment, it is not necessary to consider the variation of the pMOS transistor, and the robustness is improved. In particular, it is effective for setting the auto-zero potential Vext to the limit of the lower limit of the operating range when the on-resistance of the pMOS transistor becomes high.
- the robustness is improved as compared with the first embodiment in which the external pMOS transistor 412 is required. Can be done.
- the differential transistors 423 and 424 are connected to the current mirror transistors 421 and 422.
- the input offset voltage of the comparator 420 tends to increase when the auto-zero potential Vext is set to the very limit of the lower limit of the operating range. This is because as the auto-zero potential voltage decreases , the drain-source voltage of the differential transistor 424 on the lamp side decreases, and the difference from the drain-source voltage of the differential transistor 423 on the input side widens. be.
- the solid-state image sensor 200 of the third embodiment is different from the second embodiment in that the input offset voltage is reduced by inserting a cascode transistor.
- FIG. 9 is a circuit diagram showing a configuration example of the auto-zero potential generation circuit 410 and the comparator 420 according to the third embodiment of the present technology.
- the auto-zero potential generation circuit 410 of the third embodiment is different from the second embodiment in that it further includes a control transistor 414 and an external nMOS transistor 415.
- the comparator 420 of the third embodiment does not include the pMOS transistors 428 and 429, but further includes a pMOS transistor 434, an nMOS transistor 435, 438 and 439, and a cascode transistor 436 and 437. It is different from the embodiment of. Further, a column amplifier 440 is inserted between the comparator 420 and the counter 234 for each column.
- control transistor 414 the external nMOS transistor 415, and the external nMOS transistor 413 are connected in series between the external current mirror transistor 411 and the reference voltage VSS.
- a control signal ⁇ 5 from the timing control circuit 212 is input to the gate of the control transistor 414.
- connection node of the external current mirror transistor 411 and the control transistor 414 and the gate of the external nMOS transistor 415 are connected to the gate of the cascode transistor 436. Let the voltage of this node be Vext2 .
- the pMOS transistor 431 opens and closes the path between the connection node of the current mirror transistor 421 and the cascode transistor 436 and the gate of the differential transistor 423 according to the control signal x ⁇ 2 from the timing control circuit 212.
- the pMOS transistor 434 opens and closes the path between the connection node of the current mirror transistor 422 and the cascode transistor 437 and the gate of the differential transistor 424 according to the control signal x ⁇ 3 from the timing control circuit 212.
- the nMOS transistor 435 is inserted between the connection node of the current mirror transistor 421 and the cascode transistor 436 and the gate of the differential transistor 423.
- a predetermined low level TIEL is input to the gate of the nMOS transistor 435.
- a predetermined high level TIEH is input to the gate of the cascode transistor 437.
- the nMOS transistor 438 opens and closes the path between the gate of the external nMOS transistor 413 and the gate of the differential transistor 423 according to the control signal ⁇ 4 from the timing control circuit 212.
- the nMOS transistor 439 is inserted between the connection node of the external nMOS transistors 413 and 415 and the gate of the differential transistor 424.
- a predetermined low level TIEL is input to the gate of the nMOS transistor 439.
- the column amplifier 440 amplifies the output of the comparator 420 by a predetermined analog gain and supplies it to the counter 234.
- the third embodiment can be applied to the first embodiment using the pMOS auto-zero transistor 426.
- an external pMOS transistor may be added to the auto-zero potential generation circuit 410, and the control signal x ⁇ 1 may be input to the auto-zero transistor 426.
- FIG. 10 is a timing chart showing an example of the operation of the solid-state image sensor 200 according to the third embodiment of the present technology.
- the control signals x ⁇ 2 and x ⁇ 3 are set to a high level.
- the timing control circuit 212 sets the control signals ⁇ 5 and x ⁇ 6 to the high level and the control signal x ⁇ 7 to the low level.
- the timing control circuit 212 sets the control signals ⁇ 1 and ⁇ 4 to a high level.
- the timing control circuit 212 sets the control signals ⁇ 1 and ⁇ 4 to a low level.
- the timing control circuit 212 sets the control signals ⁇ 5 and x ⁇ 6 to the low level and the control signal x ⁇ 7 to the high level.
- FIG. 11 is a diagram for explaining the effect in the third embodiment of the present technique.
- a in the figure shows the comparator 420 of the second embodiment.
- the cascode transistor is not inserted between the current mirror circuit (current mirror transistors 421 and 422) and the differential transistors 423 and 424.
- the drain-source voltage of the differential transistor 424 on the lamp side decreases as the auto-zero potential Vext decreases, and the difference from the drain-source voltage of the differential transistor 423 on the input side increases. It will spread. As a result, the input offset voltage of the comparator 420 may increase.
- the timing control circuit 212 turns on the control transistor 414 by the control signal ⁇ 5 and inserts the cascode transistors 436 and 437 within the auto-zero period. ing. Then, when the auto zero is completed, the timing control circuit 212 releases the cascode.
- the drain potentials of the differential transistors 423 and 424 can be made uniform. As a result, it is possible to suppress an increase in the difference between the drain and source voltages of the differential transistors 423 and 424, respectively, and reduce the input offset voltage.
- the input offset voltage in the comparator 420 can be reduced because the cascode is formed within the auto-zero period.
- the auto-zero potential generation circuit 410 is arranged for each column, but in this configuration, the circuit scale of the column ADC 230 increases as the number of columns increases.
- the solid-state image sensor 200 of the fourth embodiment is different from the first embodiment in that the circuit scale is reduced by sharing the auto-zero potential generation circuit 410 in a plurality of rows.
- FIG. 12 is a block diagram showing a configuration example of the column ADC 230 according to the fourth embodiment of the present technology.
- one auto-zero potential generation circuit 410 is arranged outside the ADC 231. Then, one auto-zero potential generation circuit 410 is shared by a plurality of columns (for example, all columns).
- the circuit scale can be reduced as compared with the first embodiment in which the auto-zero potential generation circuit 410 is arranged for each row.
- the auto-zero potential generation circuit 410 is shared by a plurality of columns, the circuit scale of the column ADC 230 can be reduced.
- the technique according to the present disclosure can be applied to various products.
- the technology according to the present disclosure is realized as a device mounted on a moving body of any kind such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility, an airplane, a drone, a ship, and a robot. You may.
- FIG. 13 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technique according to the present disclosure can be applied.
- the vehicle control system 12000 includes a plurality of electronic control units connected via the communication network 12001.
- the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside information detection unit 12030, an in-vehicle information detection unit 12040, and an integrated control unit 12050.
- a microcomputer 12051, an audio image output unit 12052, and an in-vehicle network I / F (interface) 12053 are shown as a functional configuration of the integrated control unit 12050.
- the drive system control unit 12010 controls the operation of the device related to the drive system of the vehicle according to various programs.
- the drive system control unit 12010 has a driving force generator for generating a driving force of a vehicle such as an internal combustion engine or a driving motor, a driving force transmission mechanism for transmitting the driving force to the wheels, and a steering angle of the vehicle. It functions as a control device such as a steering mechanism for adjusting and a braking device for generating braking force of the vehicle.
- the body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs.
- the body system control unit 12020 functions as a keyless entry system, a smart key system, a power window device, or a control device for various lamps such as headlamps, back lamps, brake lamps, turn signals or fog lamps.
- the body system control unit 12020 may be input with radio waves transmitted from a portable device that substitutes for the key or signals of various switches.
- the body system control unit 12020 receives inputs of these radio waves or signals and controls a vehicle door lock device, a power window device, a lamp, and the like.
- the vehicle outside information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000.
- the image pickup unit 12031 is connected to the vehicle outside information detection unit 12030.
- the vehicle outside information detection unit 12030 causes the image pickup unit 12031 to capture an image of the outside of the vehicle and receives the captured image.
- the vehicle outside information detection unit 12030 may perform object detection processing or distance detection processing such as a person, a vehicle, an obstacle, a sign, or a character on the road surface based on the received image.
- the image pickup unit 12031 is an optical sensor that receives light and outputs an electric signal according to the amount of the light received.
- the image pickup unit 12031 can output an electric signal as an image or can output it as distance measurement information. Further, the light received by the image pickup unit 12031 may be visible light or invisible light such as infrared light.
- the in-vehicle information detection unit 12040 detects the in-vehicle information.
- a driver state detection unit 12041 that detects a driver's state is connected to the vehicle interior information detection unit 12040.
- the driver state detection unit 12041 includes, for example, a camera that images the driver, and the in-vehicle information detection unit 12040 determines the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041. It may be calculated, or it may be determined whether or not the driver has fallen asleep.
- the microcomputer 12051 calculates the control target value of the driving force generator, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and the drive system control unit.
- a control command can be output to 12010.
- the microcomputer 12051 realizes ADAS (Advanced Driver Assistance System) functions including vehicle collision avoidance or impact mitigation, follow-up driving based on inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane deviation warning, and the like. It is possible to perform cooperative control for the purpose of.
- ADAS Advanced Driver Assistance System
- the microcomputer 12051 controls the driving force generating device, the steering mechanism, the braking device, and the like based on the information around the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040. It is possible to perform coordinated control for the purpose of automatic driving that runs autonomously without depending on the operation.
- the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the vehicle outside information detection unit 12030.
- the microcomputer 12051 controls the headlamps according to the position of the preceding vehicle or the oncoming vehicle detected by the outside information detection unit 12030, and performs cooperative control for the purpose of anti-glare such as switching the high beam to the low beam. It can be carried out.
- the audio image output unit 12052 transmits an output signal of at least one of audio and an image to an output device capable of visually or audibly notifying information to the passenger or the outside of the vehicle.
- an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as output devices.
- the display unit 12062 may include, for example, at least one of an onboard display and a head-up display.
- FIG. 14 is a diagram showing an example of the installation position of the imaging unit 12031.
- the imaging unit 12031 As the imaging unit 12031, the imaging unit 12101, 12102, 12103, 12104, 12105 is provided.
- the image pickup units 12101, 12102, 12103, 12104, 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumpers, back doors, and the upper part of the windshield in the vehicle interior of the vehicle 12100.
- the image pickup unit 12101 provided on the front nose and the image pickup section 12105 provided on the upper part of the windshield in the vehicle interior mainly acquire an image in front of the vehicle 12100.
- the image pickup units 12102 and 12103 provided in the side mirror mainly acquire images of the side of the vehicle 12100.
- the image pickup unit 12104 provided in the rear bumper or the back door mainly acquires an image of the rear of the vehicle 12100.
- the image pickup unit 12105 provided on the upper part of the front glass in the vehicle interior is mainly used for detecting a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.
- FIG. 14 shows an example of the shooting range of the imaging units 12101 to 12104.
- the imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose
- the imaging ranges 12112 and 12113 indicate the imaging range of the imaging units 12102 and 12103 provided on the side mirrors, respectively
- the imaging range 12114 indicates the imaging range.
- the imaging range of the imaging unit 12104 provided on the rear bumper or the back door is shown. For example, by superimposing the image data captured by the imaging units 12101 to 12104, a bird's-eye view image of the vehicle 12100 can be obtained.
- At least one of the image pickup units 12101 to 12104 may have a function of acquiring distance information.
- at least one of the image pickup units 12101 to 12104 may be a stereo camera including a plurality of image pickup elements, or may be an image pickup element having pixels for phase difference detection.
- the microcomputer 12051 has a distance to each three-dimensional object in the image pickup range 12111 to 12114 based on the distance information obtained from the image pickup unit 12101 to 12104, and a temporal change of this distance (relative speed with respect to the vehicle 12100). By obtaining can. Further, the microcomputer 12051 can set an inter-vehicle distance to be secured in advance in front of the preceding vehicle, and can perform automatic brake control (including follow-up stop control), automatic acceleration control (including follow-up start control), and the like. In this way, it is possible to perform coordinated control for the purpose of automatic driving or the like that autonomously travels without relying on the driver's operation.
- automatic brake control including follow-up stop control
- automatic acceleration control including follow-up start control
- the microcomputer 12051 converts three-dimensional object data related to a three-dimensional object into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, electric poles, and other three-dimensional objects based on the distance information obtained from the image pickup units 12101 to 12104. It can be classified and extracted and used for automatic avoidance of obstacles. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 determines the collision risk indicating the risk of collision with each obstacle, and when the collision risk is equal to or higher than the set value and there is a possibility of collision, the microcomputer 12051 via the audio speaker 12061 or the display unit 12062. By outputting an alarm to the driver and performing forced deceleration and avoidance steering via the drive system control unit 12010, driving support for collision avoidance can be provided.
- At least one of the image pickup units 12101 to 12104 may be an infrared camera that detects infrared rays.
- the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the captured image of the imaging unit 12101 to 12104.
- recognition of a pedestrian is, for example, a procedure for extracting feature points in an image captured by an image pickup unit 12101 to 12104 as an infrared camera, and pattern matching processing is performed on a series of feature points indicating the outline of an object to determine whether or not the pedestrian is a pedestrian. It is done by the procedure to determine.
- the audio image output unit 12052 determines the square contour line for emphasizing the recognized pedestrian.
- the display unit 12062 is controlled so as to superimpose and display. Further, the audio image output unit 12052 may control the display unit 12062 so as to display an icon or the like indicating a pedestrian at a desired position.
- the above is an example of a vehicle control system to which the technique according to the present disclosure can be applied.
- the technique according to the present disclosure can be applied to, for example, the image pickup unit 12031 among the configurations described above.
- the image pickup apparatus 100 of FIG. 1 can be applied to the image pickup unit 12031.
- FIG. 15 is a diagram showing an example of a schematic configuration of an endoscopic surgery system 5000 to which the technique according to the present disclosure can be applied.
- FIG. 15 illustrates a surgeon (doctor) 5067 performing surgery on patient 5071 on patient bed 5069 using the endoscopic surgery system 5000.
- the endoscopic surgery system 5000 includes an endoscope 5001, other surgical tools 5017, a support arm device 5027 for supporting the endoscope 5001, and various devices for endoscopic surgery. It is composed of a cart 5037 and a cart 5037.
- trocca 5025a to 5025d In endoscopic surgery, instead of cutting the abdominal wall to open the abdomen, multiple tubular opening devices called trocca 5025a to 5025d are punctured into the abdominal wall. Then, from the trocca 5025a to 5025d, the lens barrel 5003 of the endoscope 5001 and other surgical tools 5017 are inserted into the body cavity of the patient 5071.
- other surgical tools 5017 a pneumoperitoneum tube 5019, an energy treatment tool 5021 and forceps 5023 are inserted into the body cavity of patient 5071.
- the energy treatment tool 5021 is a treatment tool for incising and peeling a tissue, sealing a blood vessel, or the like by using a high frequency current or ultrasonic vibration.
- the surgical tool 5017 shown is only an example, and as the surgical tool 5017, various surgical tools generally used in endoscopic surgery such as a sword and a retractor may be used.
- the image of the surgical site in the body cavity of the patient 5071 taken by the endoscope 5001 is displayed on the display device 5041.
- the surgeon 5067 performs a procedure such as excising the affected area by using the energy treatment tool 5021 or the forceps 5023 while viewing the image of the surgical site displayed on the display device 5041 in real time.
- the pneumoperitoneum tube 5019, the energy treatment tool 5021, and the forceps 5023 are supported by the operator 5067, an assistant, or the like during the operation.
- the support arm device 5027 includes an arm portion 5031 extending from the base portion 5029.
- the arm portion 5031 is composed of joint portions 5033a, 5033b, 5033c, and links 5035a, 5035b, and is driven by control from the arm control device 5045.
- the endoscope 5001 is supported by the arm portion 5031, and its position and posture are controlled. Thereby, the stable position fixing of the endoscope 5001 can be realized.
- the endoscope 5001 is composed of a lens barrel 5003 in which a region having a predetermined length from the tip is inserted into the body cavity of the patient 5071, and a camera head 5005 connected to the base end of the lens barrel 5003.
- the endoscope 5001 configured as a so-called rigid mirror having a rigid barrel 5003 is illustrated, but the endoscope 5001 is configured as a so-called flexible mirror having a flexible barrel 5003. May be good.
- An opening in which an objective lens is fitted is provided at the tip of the lens barrel 5003.
- a light source device 5043 is connected to the endoscope 5001, and the light generated by the light source device 5043 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 5003, and is an objective. It is irradiated toward the observation target in the body cavity of the patient 5071 through the lens.
- the endoscope 5001 may be a direct endoscope, a perspective mirror, or a side endoscope.
- An optical system and an image pickup element are provided inside the camera head 5005, and the reflected light (observation light) from the observation target is focused on the image pickup element by the optical system.
- the observation light is photoelectrically converted by the image pickup device, and an electric signal corresponding to the observation light, that is, an image signal corresponding to the observation image is generated.
- the image signal is transmitted to the camera control unit (CCU: Camera Control Unit) 5039 as RAW data.
- the camera head 5005 is equipped with a function of adjusting the magnification and the focal length by appropriately driving the optical system thereof.
- the camera head 5005 may be provided with a plurality of image pickup elements.
- a plurality of relay optical systems are provided inside the lens barrel 5003 in order to guide the observation light to each of the plurality of image pickup elements.
- the CCU 5039 is composed of a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), and the like, and comprehensively controls the operations of the endoscope 5001 and the display device 5041. Specifically, the CCU 5039 performs various image processing for displaying an image based on the image signal, such as a development process (demosaic process), on the image signal received from the camera head 5005. The CCU 5039 provides the image signal subjected to the image processing to the display device 5041. Further, the CCU 5039 transmits a control signal to the camera head 5005 and controls the driving thereof.
- the control signal may include information about imaging conditions such as magnification and focal length.
- the display device 5041 displays an image based on the image signal processed by the CCU 5039 under the control of the CCU 5039.
- the endoscope 5001 is compatible with high-resolution shooting such as 4K (horizontal number of pixels 3840 x vertical pixel number 2160) or 8K (horizontal pixel number 7680 x vertical pixel number 4320), and / or 3D display.
- a display device capable of displaying a high resolution and / or a device capable of displaying in 3D can be used corresponding to each of the display devices 5041.
- a display device 5041 having a size of 55 inches or more is used for high-resolution shooting such as 4K or 8K, a further immersive feeling can be obtained.
- a plurality of display devices 5041 having different resolutions and sizes may be provided depending on the application.
- the light source device 5043 is composed of, for example, a light source such as an LED (light emission diode), and supplies irradiation light for photographing the surgical site to the endoscope 5001.
- a light source such as an LED (light emission diode)
- the arm control device 5045 is configured by a processor such as a CPU, and operates according to a predetermined program to control the drive of the arm portion 5031 of the support arm device 5027 according to a predetermined control method.
- the input device 5047 is an input interface for the endoscopic surgery system 5000.
- the user can input various information and input instructions to the endoscopic surgery system 5000 via the input device 5047.
- the user inputs various information related to the surgery, such as physical information of the patient and information about the surgical procedure, via the input device 5047.
- the user is instructed to drive the arm portion 5031 via the input device 5047, or is instructed to change the imaging conditions (type of irradiation light, magnification, focal length, etc.) by the endoscope 5001. , Instructions to drive the energy treatment tool 5021, etc. are input.
- the type of the input device 5047 is not limited, and the input device 5047 may be various known input devices.
- the input device 5047 for example, a mouse, a keyboard, a touch panel, a switch, a foot switch 5057 and / or a lever and the like can be applied.
- the touch panel may be provided on the display surface of the display device 5041.
- the input device 5047 is a device worn by the user, such as a glasses-type wearable device or an HMD (Head Mounted Display), and various inputs are made according to the user's gesture and line of sight detected by these devices. Is done. Further, the input device 5047 includes a camera capable of detecting the movement of the user, and various inputs are performed according to the gesture and the line of sight of the user detected from the image captured by the camera. Further, the input device 5047 includes a microphone capable of picking up the voice of the user, and various inputs are performed by voice via the microphone.
- a glasses-type wearable device or an HMD Head Mounted Display
- the input device 5047 is configured to be able to input various information in a non-contact manner, so that a user who belongs to a clean area (for example, an operator 5067) can operate a device belonging to the unclean area in a non-contact manner. Is possible. In addition, the user can operate the device without taking his / her hand off the surgical tool that he / she has, which improves the convenience of the user.
- a clean area for example, an operator 5067
- the treatment tool control device 5049 controls the drive of the energy treatment tool 5021 for cauterizing tissue, incising, sealing a blood vessel, or the like.
- the pneumoperitoneum device 5051 gas in the body cavity of the patient 5071 via the pneumoperitoneum tube 5019 in order to inflate the body cavity of the patient 5071 for the purpose of securing the field of view by the endoscope 5001 and securing the work space of the operator. Is sent.
- the recorder 5053 is a device capable of recording various information related to surgery.
- the printer 5055 is a device capable of printing various information related to surgery in various formats such as text, images, and graphs.
- the support arm device 5027 includes a base portion 5029 as a base and an arm portion 5031 extending from the base portion 5029.
- the arm portion 5031 is composed of a plurality of joint portions 5033a, 5033b, 5033c and a plurality of links 5035a, 5035b connected by the joint portions 5033b, but in FIG. 15, for the sake of simplicity.
- the configuration of the arm portion 5031 is simplified and shown. Actually, the shapes, numbers and arrangements of the joint portions 5033a to 5033c and the links 5035a and 5035b, the direction of the rotation axis of the joint portions 5033a to 5033c, and the like are appropriately set so that the arm portion 5031 has a desired degree of freedom. obtain.
- the arm portion 5031 may be preferably configured to have more than 6 degrees of freedom.
- the endoscope 5001 can be freely moved within the movable range of the arm portion 5031, so that the lens barrel 5003 of the endoscope 5001 can be inserted into the body cavity of the patient 5071 from a desired direction. It will be possible.
- An actuator is provided in the joint portions 5033a to 5033c, and the joint portions 5033a to 5033c are configured to be rotatable around a predetermined rotation axis by driving the actuator.
- the arm control device 5045 By controlling the drive of the actuator by the arm control device 5045, the rotation angles of the joint portions 5033a to 5033c are controlled, and the drive of the arm portion 5031 is controlled. Thereby, control of the position and posture of the endoscope 5001 can be realized.
- the arm control device 5045 can control the drive of the arm unit 5031 by various known control methods such as force control or position control.
- the drive of the arm unit 5031 is appropriately controlled by the arm control device 5045 according to the operation input.
- the position and orientation of the endoscope 5001 may be controlled.
- the endoscope 5001 at the tip of the arm portion 5031 can be moved from an arbitrary position to an arbitrary position, and then fixedly supported at the moved position.
- the arm portion 5031 may be operated by a so-called master slave method. In this case, the arm portion 5031 can be remotely controlled by the user via an input device 5047 installed at a location away from the operating room.
- the arm control device 5045 When force control is applied, the arm control device 5045 receives an external force from the user, and the actuators of the joint portions 5033a to 5033c are arranged so that the arm portion 5031 moves smoothly according to the external force. So-called power assist control for driving may be performed.
- the arm portion 5031 when the user moves the arm portion 5031 while directly touching the arm portion 5031, the arm portion 5031 can be moved with a relatively light force. Therefore, the endoscope 5001 can be moved more intuitively and with a simpler operation, and the convenience of the user can be improved.
- the endoscope 5001 was supported by a doctor called a scopist.
- the support arm device 5027 by using the support arm device 5027, the position of the endoscope 5001 can be more reliably fixed without human intervention, so that an image of the surgical site can be stably obtained. , It becomes possible to perform surgery smoothly.
- the arm control device 5045 does not necessarily have to be provided on the cart 5037. Further, the arm control device 5045 does not necessarily have to be one device. For example, the arm control device 5045 may be provided at each of the joint portions 5033a to 5033c of the arm portion 5031 of the support arm device 5027, and the plurality of arm control devices 5045 cooperate with each other to drive the arm portion 5031. Control may be realized.
- the light source device 5043 supplies the endoscope 5001 with irradiation light for photographing the surgical site.
- the light source device 5043 is composed of, for example, an LED, a laser light source, or a white light source composed of a combination thereof.
- the white light source is configured by the combination of the RGB laser light sources, the output intensity and the output timing of each color (each wavelength) can be controlled with high accuracy, so that the white balance of the captured image in the light source device 5043 can be controlled. Can be adjusted.
- the laser light from each of the RGB laser light sources is irradiated to the observation target in a time-division manner, and the drive of the image sensor of the camera head 5005 is controlled in synchronization with the irradiation timing to correspond to each of RGB. It is also possible to capture the image in a time-division manner. According to this method, a color image can be obtained without providing a color filter in the image pickup device.
- the drive of the light source device 5043 may be controlled so as to change the intensity of the output light at predetermined time intervals.
- the drive of the image sensor of the camera head 5005 in synchronization with the timing of the change of the light intensity to acquire an image in time division and synthesizing the image, so-called high dynamic without blackout and overexposure. Range images can be generated.
- the light source device 5043 may be configured to be able to supply light in a predetermined wavelength band corresponding to special light observation.
- special light observation for example, by utilizing the wavelength dependence of light absorption in body tissue, the surface layer of the mucous membrane is irradiated with light in a narrower band than the irradiation light (that is, white light) during normal observation.
- narrow band imaging in which a predetermined tissue such as a blood vessel is photographed with high contrast, is performed.
- fluorescence observation may be performed in which an image is obtained by fluorescence generated by irradiating with excitation light.
- the body tissue is irradiated with excitation light to observe the fluorescence from the body tissue (autofluorescence observation), or a reagent such as indocyanine green (ICG) is locally injected into the body tissue and the body tissue is injected. It is possible to obtain a fluorescence image by irradiating the excitation light corresponding to the fluorescence wavelength of the reagent.
- the light source device 5043 may be configured to be capable of supplying narrowband light and / or excitation light corresponding to such special light observation.
- FIG. 16 is a block diagram showing an example of the functional configuration of the camera head 5005 and CCU5039 shown in FIG.
- the camera head 5005 has a lens unit 5007, an image pickup unit 5009, a drive unit 5011, a communication unit 5013, and a camera head control unit 5015 as its functions.
- the CCU 5039 has a communication unit 5059, an image processing unit 5061, and a control unit 5063 as its functions.
- the camera head 5005 and the CCU 5039 are bidirectionally connected by a transmission cable 5065 so as to be communicable.
- the lens unit 5007 is an optical system provided at a connection portion with the lens barrel 5003.
- the observation light taken in from the tip of the lens barrel 5003 is guided to the camera head 5005 and incident on the lens unit 5007.
- the lens unit 5007 is configured by combining a plurality of lenses including a zoom lens and a focus lens.
- the optical characteristics of the lens unit 5007 are adjusted so as to collect the observation light on the light receiving surface of the image pickup element of the image pickup unit 5009.
- the zoom lens and the focus lens are configured so that their positions on the optical axis can be moved in order to adjust the magnification and the focus of the captured image.
- the image pickup unit 5009 is composed of an image pickup element and is arranged after the lens unit 5007.
- the observation light that has passed through the lens unit 5007 is focused on the light receiving surface of the image pickup device, and an image signal corresponding to the observation image is generated by photoelectric conversion.
- the image signal generated by the image pickup unit 5009 is provided to the communication unit 5013.
- CMOS Complementary Metal Oxide Semiconductor
- image pickup device for example, an image pickup device capable of capturing a high-resolution image of 4K or higher may be used.
- the image pickup elements constituting the image pickup unit 5009 are configured to have a pair of image pickup elements for acquiring image signals for the right eye and the left eye corresponding to 3D display, respectively.
- the 3D display enables the surgeon 5067 to more accurately grasp the depth of the living tissue in the surgical site.
- the image pickup unit 5009 is composed of a multi-plate type, a plurality of lens units 5007 are also provided corresponding to each image pickup element.
- the image pickup unit 5009 does not necessarily have to be provided on the camera head 5005.
- the image pickup unit 5009 may be provided inside the lens barrel 5003 immediately after the objective lens.
- the drive unit 5011 is composed of an actuator, and the zoom lens and the focus lens of the lens unit 5007 are moved by a predetermined distance along the optical axis under the control of the camera head control unit 5015. As a result, the magnification and focus of the image captured by the image pickup unit 5009 can be adjusted as appropriate.
- the communication unit 5013 is composed of a communication device for transmitting and receiving various information to and from the CCU 5039.
- the communication unit 5013 transmits the image signal obtained from the image pickup unit 5009 as RAW data to the CCU 5039 via the transmission cable 5065.
- the image signal is transmitted by optical communication.
- the surgeon 5067 performs the surgery while observing the condition of the affected area with the captured image, so for safer and more reliable surgery, the moving image of the surgical site is displayed in real time as much as possible. This is because it is required.
- the communication unit 5013 is provided with a photoelectric conversion module that converts an electric signal into an optical signal.
- the image signal is converted into an optical signal by the photoelectric conversion module, and then transmitted to the CCU 5039 via the transmission cable 5065.
- the communication unit 5013 receives a control signal for controlling the drive of the camera head 5005 from the CCU 5039.
- the control signal includes, for example, information to specify the frame rate of the captured image, information to specify the exposure value at the time of imaging, and / or information to specify the magnification and focus of the captured image. Contains information about the condition.
- the communication unit 5013 provides the received control signal to the camera head control unit 5015.
- the control signal from the CCU 5039 may also be transmitted by optical communication.
- the communication unit 5013 is provided with a photoelectric conversion module that converts an optical signal into an electric signal, and the control signal is converted into an electric signal by the photoelectric conversion module and then provided to the camera head control unit 5015.
- the image pickup conditions such as the frame rate, exposure value, magnification, and focus are automatically set by the control unit 5063 of the CCU 5039 based on the acquired image signal. That is, the so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function are mounted on the endoscope 5001.
- the camera head control unit 5015 controls the drive of the camera head 5005 based on the control signal from the CCU 5039 received via the communication unit 5013. For example, the camera head control unit 5015 controls the drive of the image pickup element of the image pickup unit 5009 based on the information to specify the frame rate of the image pickup image and / or the information to specify the exposure at the time of image pickup. Further, for example, the camera head control unit 5015 appropriately moves the zoom lens and the focus lens of the lens unit 5007 via the drive unit 5011 based on the information that the magnification and the focus of the captured image are specified.
- the camera head control unit 5015 may further have a function of storing information for identifying the lens barrel 5003 and the camera head 5005.
- the camera head 5005 can be made resistant to autoclave sterilization.
- the communication unit 5059 is configured by a communication device for transmitting and receiving various information to and from the camera head 5005.
- the communication unit 5059 receives an image signal transmitted from the camera head 5005 via the transmission cable 5065.
- the image signal can be suitably transmitted by optical communication.
- the communication unit 5059 is provided with a photoelectric conversion module that converts an optical signal into an electric signal.
- the communication unit 5059 provides the image processing unit 5061 with an image signal converted into an electric signal.
- the communication unit 5059 transmits a control signal for controlling the drive of the camera head 5005 to the camera head 5005.
- the control signal may also be transmitted by optical communication.
- the image processing unit 5061 performs various image processing on the image signal which is the RAW data transmitted from the camera head 5005.
- the image processing includes, for example, development processing, high image quality processing (band enhancement processing, super-resolution processing, NR (Noise reduction) processing and / or camera shake correction processing, etc.), and / or enlargement processing (electronic zoom processing). Etc., various known signal processing is included.
- the image processing unit 5061 performs detection processing on the image signal for performing AE, AF, and AWB.
- the image processing unit 5061 is composed of a processor such as a CPU or GPU, and the processor operates according to a predetermined program, so that the above-mentioned image processing and detection processing can be performed.
- the image processing unit 5061 is composed of a plurality of GPUs, the image processing unit 5061 appropriately divides the information related to the image signal and performs image processing in parallel by the plurality of GPUs.
- the control unit 5063 performs various controls regarding the imaging of the surgical site by the endoscope 5001 and the display of the captured image. For example, the control unit 5063 generates a control signal for controlling the drive of the camera head 5005. At this time, when the imaging condition is input by the user, the control unit 5063 generates a control signal based on the input by the user. Alternatively, when the endoscope 5001 is equipped with an AE function, an AF function, and an AWB function, the control unit 5063 has an optimum exposure value, a focal length, and an optimum exposure value according to the result of detection processing by the image processing unit 5061. The white balance is calculated appropriately and a control signal is generated.
- control unit 5063 causes the display device 5041 to display the image of the surgical unit based on the image signal processed by the image processing unit 5061.
- the control unit 5063 recognizes various objects in the surgical unit image by using various image recognition techniques.
- the control unit 5063 detects a surgical tool such as forceps, a specific biological part, bleeding, a mist when using the energy treatment tool 5021, etc. by detecting the shape, color, etc. of the edge of the object included in the surgical site image. Can be recognized.
- the control unit 5063 uses the recognition result to superimpose and display various surgical support information on the image of the surgical site. By superimposing the surgery support information and presenting it to the surgeon 5067, it becomes possible to proceed with the surgery more safely and surely.
- the transmission cable 5065 connecting the camera head 5005 and the CCU 5039 is an electric signal cable compatible with electric signal communication, an optical fiber compatible with optical communication, or a composite cable thereof.
- the communication is performed by wire using the transmission cable 5065, but the communication between the camera head 5005 and the CCU 5039 may be performed wirelessly.
- the communication between the two is performed wirelessly, it is not necessary to lay the transmission cable 5065 in the operating room, so that the situation where the movement of the medical staff in the operating room is hindered by the transmission cable 5065 can be solved.
- an endoscopic surgery system 5000 to which the technique according to the present disclosure can be applied.
- the endoscopic surgery system 5000 has been described here as an example, the system to which the technique according to the present disclosure can be applied is not limited to such an example.
- the techniques according to the present disclosure may be applied to a flexible endoscopic system for examination or a microsurgery system.
- the technique according to the present disclosure can be suitably applied to the imaging unit 5009 among the configurations described above.
- the image pickup apparatus 100 of FIG. 1 can be applied to the image pickup unit 5009.
- the technique according to the present disclosure to the image pickup unit 5009, the operation of the comparator in the solid-state image pickup device is stabilized, and the reliability of the system is improved.
- the present technology can have the following configurations.
- a pair of differential transistors that amplify the difference between the input voltage and a predetermined reference voltage, and An auto-zero transistor that opens and closes the path between one gate and drain of the pair of differential transistors, Equipped with an auto-zero potential generation circuit that generates an auto-zero potential whose fluctuation amount due to process variation is substantially the same as the fluctuation amount of the gate-source voltage of the differential transistor and supplies it to the other gate of the pair of differential transistors.
- Solid-state imaging device Solid-state imaging device.
- the auto-zero transistor is a pMOS (p-channel Metal Oxide Semiconductor) transistor.
- the pair of differential transistors are nMOS (n-channel MOS) transistors.
- the auto-zero potential generation circuit is With an external pMOS transistor in the ON state, An external nMOS transistor in the ON state and The solid-state image pickup device according to (1) above, which includes the external pMOS transistor and an external current mirror transistor that supplies a current to the external nMOS transistor. (3) The auto-zero transistor and the pair of differential transistors are nMOS transistors.
- the auto-zero potential generation circuit is An external nMOS transistor in the ON state and The solid-state image pickup device according to (1) above, which includes an external current mirror transistor that supplies a current to the external nMOS transistor. (4) Current mirror circuit and Further, a pair of cascode transistors inserted between the pair of differential transistors and the current mirror circuit is provided.
- the solid-state image pickup device according to any one of (1) to (3) above, wherein the auto-zero potential generation circuit controls one of the pair of cascode transistors to be turned on within a predetermined auto-zero period.
- a pixel array unit in which a plurality of pixels are arranged in a two-dimensional lattice is further provided.
- the solid-state image pickup device according to any one of (1) to (4), wherein the comparator including the pair of differential transistors and the auto-zero transistor is arranged for each row of the pixel array unit.
- the solid-state image pickup device according to (5) above, wherein the auto-zero potential generation circuit is arranged in each row.
- Image sensor 110 Optical system 120 Signal processing circuit 130 Memory 140 Monitor 200 Solid-state image sensor 211 Vertical scanning circuit 212 Timing control circuit 213 DAC 214 Pixel array part 215 Horizontal transfer scanning circuit 220 Pixel 221 Photoelectric conversion element 222 Transfer transistor 223 Reset transistor 224 Floating diffusion layer 225 Amplification transistor 226 Selective transistor 230 Column ADC 231 ADC 232, 233 Capacity 234 Counter 235 Latch circuit 410 Auto zero potential generation circuit 411 External current mirror transistor 412 External pMOS transistor 413, 415 External nMOS transistor 414 Control transistor 420 Comparer 421, 422 Current mirror transistor 423, 424 Differential transistor 425 Tail current Source 426, 427 Auto-zero transistor 431 to 434 pMOS transistor 435, 438, 439 nMOS transistor 436, 437 Cascode transistor 440 Column amplifier 5009, 12031 Imaging unit
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Abstract
Provided is a solid-state imaging element in which an analog-to-digital converter (ADC) including a comparator is disposed, wherein the operation of the comparator is stabilized. A pair of differential transistors amplify a differential between an input voltage and a predetermined reference voltage. An auto-zero transistor opens and closes a path between the gate and drain of one of the pair of differential transistors. An auto-zero potential generating circuit generates an auto-zero potential such that the amount of variation due to process variations is substantially the same as the amount of gate-source variations of the differential transistors, and supplies the potential to the gate of the other of the pair of differential transistors.
Description
本技術は、固体撮像素子に関する。詳しくは、比較器を用いてアナログデジタル変換を行う固体撮像素子、および、撮像装置に関する。
This technology relates to a solid-state image sensor. More specifically, the present invention relates to a solid-state image sensor that performs analog-to-digital conversion using a comparator, and an image pickup device.
従来より、固体撮像素子などにおいては、アナログの画素信号をデジタル信号に変換するために、ADC(Analog to Digital Converter)が用いられている。例えば、シングルスロープ型のADC内の比較器のランプ側の入力端子に、外部から固定の外部印加電圧を与える固体撮像素子が提案されている(例えば、特許文献1参照。)。
Conventionally, in a solid-state image sensor or the like, an ADC (Analog to Digital Converter) has been used to convert an analog pixel signal into a digital signal. For example, a solid-state image sensor has been proposed in which a fixed externally applied voltage is applied to an input terminal on the lamp side of a comparator in a single-slope ADC (see, for example, Patent Document 1).
上述の従来技術では、外部印加電圧により、オートゼロ動作時に、比較器の入力端子の電圧を適切な値に初期化している。しかしながら、プロセスのばらつきに起因して、比較器の動作レンジの下限が変動することがあり、その際に、外部印加電圧で決められたオートゼロ電圧が動作レンジから外れて比較器の動作が不安定になることがある。
In the above-mentioned conventional technique, the voltage of the input terminal of the comparator is initialized to an appropriate value at the time of auto-zero operation by the externally applied voltage. However, the lower limit of the operating range of the comparator may fluctuate due to process variation, and at that time, the auto-zero voltage determined by the externally applied voltage deviates from the operating range and the operation of the comparator is unstable. May become.
本技術はこのような状況に鑑みて生み出されたものであり、比較器を含むADCが配置された固体撮像素子において、比較器の動作を安定化することを目的とする。
This technique was created in view of such a situation, and aims to stabilize the operation of the comparator in the solid-state image sensor in which the ADC including the comparator is arranged.
本技術は、上述の問題点を解消するためになされたものであり、その第1の側面は、入力電圧と所定の参照電圧との差分を増幅する一対の差動トランジスタと、上記一対の差動トランジスタの一方のゲートおよびドレインの間の経路を開閉するオートゼロトランジスタと、プロセスのばらつきによる変動量が上記差動トランジスタのゲート-ソース間電圧の変動量と略同一のオートゼロ電位を生成して上記一対の差動トランジスタの他方のゲートに供給するオートゼロ電位生成回路とを具備する固体撮像素子である。これにより、比較器の動作が安定化するという作用をもたらす。
The present technology has been made to solve the above-mentioned problems, and the first aspect thereof is a pair of differential transistors that amplify the difference between an input voltage and a predetermined reference voltage, and the above-mentioned pair of differences. An auto-zero transistor that opens and closes the path between one gate and drain of a dynamic transistor and an auto-zero potential whose fluctuation amount due to process variation is substantially the same as the fluctuation amount of the gate-source voltage of the differential transistor are generated. It is a solid-state imaging device including an auto-zero potential generation circuit that supplies to the other gate of a pair of differential transistors. This has the effect of stabilizing the operation of the comparator.
また、この第1の側面において、上記オートゼロトランジスタは、pMOS(p-channel Metal Oxide Semiconductor)トランジスタであり、上記一対の差動トランジスタは、nMOS(n-channel MOS)トランジスタであり、上記オートゼロ電位生成回路は、オン状態の外部pMOSトランジスタと、オン状態の外部nMOSトランジスタと、上記外部pMOSトランジスタおよび上記外部nMOSトランジスタに電流を供給する外部カレントミラートランジスタとを含むものであってもよい。これにより、オートゼロのセトリング時間の長期化が抑制され、比較器の動作が安定化するという作用をもたらす。
Further, in the first aspect, the auto-zero transistor is a pMOS (p-channel Metal Oxide Semiconductor) transistor, and the pair of differential transistors is an nMOS (n-channel MOS) transistor, and the auto-zero potential generation is performed. The circuit may include an external pMOS transistor in an on state, an external nMOS transistor in an on state, and an external current mirror transistor that supplies a current to the external pMOS transistor and the external nMOS transistor. As a result, the prolongation of the settling time of auto zero is suppressed, and the operation of the comparator is stabilized.
また、この第1の側面において、上記オートゼロトランジスタと上記一対の差動トランジスタとは、nMOSトランジスタであり、上記オートゼロ電位生成回路は、オン状態の外部nMOSトランジスタと、上記外部nMOSトランジスタに電流を供給する外部カレントミラートランジスタとを含むものであってもよい。これにより、ロバスト性が向上するという作用をもたらす。
Further, in the first aspect, the auto-zero transistor and the pair of differential transistors are nMOS transistors, and the auto-zero potential generation circuit supplies a current to the on-state external nMOS transistor and the external nMOS transistor. It may include an external current mirror transistor. This has the effect of improving robustness.
また、この第1の側面において、カレントミラー回路と、上記一対の差動トランジスタと上記カレントミラー回路との間に挿入された一対のカスコードトランジスタとをさらに具備し、上記オートゼロ電位生成回路は、上記一対のカスコードトランジスタの一方を所定のオートゼロ期間内にオン状態に制御してもよい。これにより、比較器の入力オフセット電圧が低減するという作用をもたらす。
Further, in the first aspect thereof, a current mirror circuit and a pair of cascode transistors inserted between the pair of differential transistors and the current mirror circuit are further provided, and the auto-zero potential generation circuit is described above. One of the pair of cascode transistors may be controlled to be turned on within a predetermined auto-zero period. This has the effect of reducing the input offset voltage of the comparator.
また、この第1の側面において、二次元格子状に複数の画素が配列された画素アレイ部をさらに具備し、上記一対の差動トランジスタと、上記オートゼロトランジスタとを含む比較器は、上記画素アレイ部の列ごとに配置されてもよい。これにより、列ごとにアナログデジタル変換が行われるという作用をもたらす。
Further, in the first aspect, the comparator further comprising a pixel array portion in which a plurality of pixels are arranged in a two-dimensional lattice, and includes the pair of differential transistors and the auto-zero transistor is the pixel array. It may be arranged in each row of parts. This has the effect of performing analog-to-digital conversion on a column-by-column basis.
また、この第1の側面において、上記オートゼロ電位生成回路は、上記列ごとに配置されてもよい。これにより、列ごとにオートゼロ電位が生成されるという作用をもたらす。
Further, in this first aspect, the auto-zero potential generation circuit may be arranged for each of the above columns. This has the effect of generating an auto-zero potential for each row.
また、この第1の側面において、上記オートゼロ電位生成回路は、複数の列のそれぞれの比較器により共有されてもよい。これにより、回路規模が削減されるという作用をもたらす。
Further, in this first aspect, the auto-zero potential generation circuit may be shared by the respective comparators in a plurality of rows. This has the effect of reducing the circuit scale.
また、本技術の第2の側面は、入力電圧と所定の参照電圧との差分を増幅して画素信号として出力する一対の差動トランジスタと、上記一対の差動トランジスタの一方のゲートおよびドレインの間の経路を開閉するオートゼロトランジスタと、プロセスのばらつきによる変動量が上記差動トランジスタのゲート-ソース間の変動量と略同一のオートゼロ電位を生成して上記一対の差動トランジスタの他方のゲートに供給するオートゼロ電位生成回路と、上記画素信号を配列した画像データを処理する信号処理回路とを具備する撮像装置である。これにより、撮像装置内の比較器の動作が安定化するという作用をもたらす。
The second aspect of the present technology is a pair of differential transistors that amplify the difference between the input voltage and a predetermined reference voltage and output it as a pixel signal, and one gate and drain of the pair of differential transistors. An auto-zero transistor that opens and closes the path between the transistors and an auto-zero potential whose fluctuation amount due to process variation is substantially the same as the fluctuation amount between the gate and source of the differential transistor are generated at the other gate of the pair of differential transistors. It is an image pickup apparatus including an auto-zero potential generation circuit for supplying and a signal processing circuit for processing image data in which the pixel signals are arranged. This has the effect of stabilizing the operation of the comparator in the image pickup device.
以下、本技術を実施するための形態(以下、実施の形態と称する)について説明する。説明は以下の順序により行う。
1.第1の実施の形態(ばらつきにより変動するオートゼロ電位を供給する例)
2.第2の実施の形態(N型トランジスタのみを用い、ばらつきにより変動するオートゼロ電位を供給する例)
3.第3の実施の形態(カスコードトランジスタを挿入し、ばらつきにより変動するオートゼロ電位を供給する例)
4.第4の実施の形態(ばらつきにより変動するオートゼロ電位を供給する回路を複数の列で共有する例)
5.移動体への応用例
6.内視鏡手術システムへの応用例 Hereinafter, a mode for carrying out the present technique (hereinafter referred to as an embodiment) will be described. The explanation will be given in the following order.
1. 1. First embodiment (example of supplying an auto-zero potential that fluctuates due to variation)
2. 2. Second embodiment (an example of using only an N-type transistor and supplying an auto-zero potential that fluctuates due to variation)
3. 3. Third embodiment (an example in which a cascode transistor is inserted and an auto-zero potential that fluctuates due to variation is supplied).
4. Fourth embodiment (an example in which a circuit that supplies an auto-zero potential that fluctuates due to variation is shared by a plurality of columns)
5. Application example to moving body 6. Application example to endoscopic surgery system
1.第1の実施の形態(ばらつきにより変動するオートゼロ電位を供給する例)
2.第2の実施の形態(N型トランジスタのみを用い、ばらつきにより変動するオートゼロ電位を供給する例)
3.第3の実施の形態(カスコードトランジスタを挿入し、ばらつきにより変動するオートゼロ電位を供給する例)
4.第4の実施の形態(ばらつきにより変動するオートゼロ電位を供給する回路を複数の列で共有する例)
5.移動体への応用例
6.内視鏡手術システムへの応用例 Hereinafter, a mode for carrying out the present technique (hereinafter referred to as an embodiment) will be described. The explanation will be given in the following order.
1. 1. First embodiment (example of supplying an auto-zero potential that fluctuates due to variation)
2. 2. Second embodiment (an example of using only an N-type transistor and supplying an auto-zero potential that fluctuates due to variation)
3. 3. Third embodiment (an example in which a cascode transistor is inserted and an auto-zero potential that fluctuates due to variation is supplied).
4. Fourth embodiment (an example in which a circuit that supplies an auto-zero potential that fluctuates due to variation is shared by a plurality of columns)
5. Application example to moving body 6. Application example to endoscopic surgery system
<1.第1の実施の形態>
[撮像装置の構成例]
図1は、本技術の第1の実施の形態における撮像装置100の一構成例を示すブロック図である。この撮像装置100は、画像データを撮像するものであり、光学系110、固体撮像素子200、信号処理回路120、メモリ130およびモニタ140を備える。 <1. First Embodiment>
[Configuration example of image pickup device]
FIG. 1 is a block diagram showing a configuration example of animage pickup apparatus 100 according to a first embodiment of the present technology. The image pickup device 100 captures image data, and includes an optical system 110, a solid-state image pickup element 200, a signal processing circuit 120, a memory 130, and a monitor 140.
[撮像装置の構成例]
図1は、本技術の第1の実施の形態における撮像装置100の一構成例を示すブロック図である。この撮像装置100は、画像データを撮像するものであり、光学系110、固体撮像素子200、信号処理回路120、メモリ130およびモニタ140を備える。 <1. First Embodiment>
[Configuration example of image pickup device]
FIG. 1 is a block diagram showing a configuration example of an
光学系110は、入射光を集光して固体撮像素子200に導くものである。光学系110は、1枚、または、複数枚のレンズを備える。
The optical system 110 collects incident light and guides it to the solid-state image sensor 200. The optical system 110 includes one or a plurality of lenses.
固体撮像素子200は、垂直同期信号に同期して、光電変換により画像データを生成するものである。垂直同期信号は、撮像タイミングを示す周期信号であり、周波数は、例えば、30ヘルツ(Hz)である。固体撮像素子200は、生成した画像データを信号処理回路120に供給する。
The solid-state image sensor 200 generates image data by photoelectric conversion in synchronization with a vertical synchronization signal. The vertical synchronization signal is a periodic signal indicating the imaging timing, and the frequency is, for example, 30 hertz (Hz). The solid-state image sensor 200 supplies the generated image data to the signal processing circuit 120.
信号処理回路120は、画像データに対して、デモザイク処理やホワイトバランス補正処理などの各種の信号処理を行うものである。信号処理回路120は、処理後の画像データをメモリ130およびモニタ140に供給する。なお、信号処理回路120の行う処理の一部または全てを固体撮像素子200内で実行することもできる。
The signal processing circuit 120 performs various signal processing such as demosaic processing and white balance correction processing on the image data. The signal processing circuit 120 supplies the processed image data to the memory 130 and the monitor 140. It should be noted that some or all of the processing performed by the signal processing circuit 120 can be performed in the solid-state image sensor 200.
メモリ130は、画像データを記憶するものである。モニタ140は、画像データを表示するものである。
The memory 130 stores image data. The monitor 140 displays image data.
[固体撮像素子の構成例]
図2は、本技術の第1の実施の形態における固体撮像素子200の一構成例を示すブロック図である。この固体撮像素子200は、垂直走査回路211、タイミング制御回路212、DAC(Digital to Analog Converter)213、画素アレイ部214、カラムADC230、および、水平転送走査回路215を備える。 [Structure example of solid-state image sensor]
FIG. 2 is a block diagram showing a configuration example of the solid-state image sensor 200 according to the first embodiment of the present technology. The solid-state image sensor 200 includes a vertical scanning circuit 211, a timing control circuit 212, a DAC (Digital to Analog Converter) 213, a pixel array unit 214, a column ADC 230, and a horizontal transfer scanning circuit 215.
図2は、本技術の第1の実施の形態における固体撮像素子200の一構成例を示すブロック図である。この固体撮像素子200は、垂直走査回路211、タイミング制御回路212、DAC(Digital to Analog Converter)213、画素アレイ部214、カラムADC230、および、水平転送走査回路215を備える。 [Structure example of solid-state image sensor]
FIG. 2 is a block diagram showing a configuration example of the solid-
画素アレイ部214には、二次元格子状に画素220が配列される。以下、水平方向に配列された画素220の集合を「行」と称し、垂直方向に配列された画素220の集合を「列」と称する。画素220は、入射光を光電変換してアナログの画素信号を生成するものである。
Pixels 220 are arranged in a two-dimensional grid pattern in the pixel array unit 214. Hereinafter, the set of pixels 220 arranged in the horizontal direction is referred to as a “row”, and the set of pixels 220 arranged in the vertical direction is referred to as a “column”. The pixel 220 photoelectrically converts the incident light to generate an analog pixel signal.
垂直走査回路211は、行を順に選択して駆動し、画素信号をカラムADC230へ出力させるものである。タイミング制御回路212は、垂直同期信号に同期して、垂直走査回路211、DAC213、カラムADC230、および、水平転送走査回路215のそれぞれの動作タイミングを制御するものである。
The vertical scanning circuit 211 selects and drives rows in order, and outputs a pixel signal to the column ADC 230. The timing control circuit 212 controls the operation timings of the vertical scanning circuit 211, the DAC 213, the column ADC 230, and the horizontal transfer scanning circuit 215 in synchronization with the vertical synchronization signal.
DAC213は、所定の参照信号を生成してカラムADC230に供給するものである。参照信号として、例えば、のこぎり波状のランプ信号が用いられる。
The DAC 213 generates a predetermined reference signal and supplies it to the column ADC 230. As the reference signal, for example, a saw wavy lamp signal is used.
カラムADC230は、列ごとにADCを備え、列のそれぞれの画素信号に対してAD(Analog to Digital)変換を行うものである。カラムADC230は、水平転送走査回路215の制御に従って、AD変換後のデジタル信号を順に信号処理回路120へ出力する。行ごとに、その行内の各列の画素信号のAD変換が実行され、全行についてAD変換が実行されることにより、1枚の画像データが生成される。
The column ADC 230 is provided with an ADC for each column, and performs AD (Analog to Digital) conversion for each pixel signal of the column. The column ADC 230 sequentially outputs the digital signals after AD conversion to the signal processing circuit 120 under the control of the horizontal transfer scanning circuit 215. For each row, AD conversion of the pixel signal of each column in the row is executed, and AD conversion is executed for all rows, so that one image data is generated.
水平転送走査回路215は、カラムADC230を制御してデジタル信号を順に出力させるものである。
The horizontal transfer scanning circuit 215 controls the column ADC 230 to output digital signals in order.
[画素の構成例]
図3は、本技術の第1の実施の形態における画素220の一構成例を示す回路図である。この画素220は、光電変換素子221、転送トランジスタ222、リセットトランジスタ223、浮遊拡散層224、増幅トランジスタ225および選択トランジスタ226を備える。 [Pixel configuration example]
FIG. 3 is a circuit diagram showing a configuration example of thepixel 220 according to the first embodiment of the present technology. The pixel 220 includes a photoelectric conversion element 221, a transfer transistor 222, a reset transistor 223, a floating diffusion layer 224, an amplification transistor 225, and a selection transistor 226.
図3は、本技術の第1の実施の形態における画素220の一構成例を示す回路図である。この画素220は、光電変換素子221、転送トランジスタ222、リセットトランジスタ223、浮遊拡散層224、増幅トランジスタ225および選択トランジスタ226を備える。 [Pixel configuration example]
FIG. 3 is a circuit diagram showing a configuration example of the
光電変換素子221は、入射光を光電変換して電荷を生成するものである。転送トランジスタ222は、垂直走査回路211からの転送信号TRGに従って、光電変換素子221から浮遊拡散層224へ電荷を転送するものである。
The photoelectric conversion element 221 photoelectrically converts incident light to generate an electric charge. The transfer transistor 222 transfers electric charges from the photoelectric conversion element 221 to the stray diffusion layer 224 according to the transfer signal TRG from the vertical scanning circuit 211.
リセットトランジスタ223は、垂直走査回路211からのリセット信号RSTに従って、浮遊拡散層224から電荷を引き抜いて初期化するものである。浮遊拡散層224は、電荷を蓄積し、電荷量に応じた電圧を生成するものである。
The reset transistor 223 is initialized by extracting electric charges from the floating diffusion layer 224 according to the reset signal RST from the vertical scanning circuit 211. The floating diffusion layer 224 accumulates electric charges and generates a voltage according to the amount of electric charges.
増幅トランジスタ225は、浮遊拡散層224の電圧を増幅するものである。選択トランジスタ226は、垂直走査回路211からの選択信号SELに従って、増幅後の電圧の信号を画素信号として出力するものである。
The amplification transistor 225 amplifies the voltage of the stray diffusion layer 224. The selection transistor 226 outputs a signal of the amplified voltage as a pixel signal according to the selection signal SEL from the vertical scanning circuit 211.
また、画素アレイ部214には、列ごとに垂直信号線229が配線され、列内の画素220のそれぞれの画素信号は、その列の垂直信号線229を介してカラムADC230へ出力される。
Further, a vertical signal line 229 is wired in the pixel array unit 214 for each row, and the pixel signal of each pixel 220 in the row is output to the column ADC 230 via the vertical signal line 229 in the row.
なお、画素220の回路構成は、画素信号を生成することができるものであれば、同図に例示した構成に限定されない。
The circuit configuration of the pixel 220 is not limited to the configuration illustrated in the figure as long as it can generate a pixel signal.
[カラムADCの構成例]
図4は、本技術の第1の実施の形態におけるカラムADC230の一構成例を示すブロック図である。このカラムADC230には、ADC231およびラッチ回路235が列ごとに配置される。例えば、列数が2048である場合、ADC231およびラッチ回路235は、それぞれ2048個ずつ配置される。 [Structure example of column ADC]
FIG. 4 is a block diagram showing a configuration example of thecolumn ADC 230 according to the first embodiment of the present technology. In this column ADC 230, an ADC 231 and a latch circuit 235 are arranged for each column. For example, when the number of columns is 2048, the ADC 231 and the latch circuit 235 are arranged 2048 each.
図4は、本技術の第1の実施の形態におけるカラムADC230の一構成例を示すブロック図である。このカラムADC230には、ADC231およびラッチ回路235が列ごとに配置される。例えば、列数が2048である場合、ADC231およびラッチ回路235は、それぞれ2048個ずつ配置される。 [Structure example of column ADC]
FIG. 4 is a block diagram showing a configuration example of the
ADC231は、対応する列のアナログの画素信号をデジタル信号に変換するものである。ADC231のそれぞれは、オートゼロ電位生成回路410と、容量232および233と、比較器420と、カウンタ234とを備える。
ADC231 converts the analog pixel signal of the corresponding column into a digital signal. Each of the ADCs 231 includes an auto-zero potential generation circuit 410, capacitances 232 and 233, a comparator 420, and a counter 234.
容量232の一端は、垂直信号線229に接続され、他端は、比較器420の入力端子に接続される。容量233の一端は、DAC213に接続され、他端は、比較器420の入力端子に接続される。
One end of the capacitance 232 is connected to the vertical signal line 229, and the other end is connected to the input terminal of the comparator 420. One end of the capacitance 233 is connected to the DAC 213 and the other end is connected to the input terminal of the comparator 420.
オートゼロ電位生成回路410は、所定のオートゼロ電位を生成して比較器420に供給するものである。
The auto-zero potential generation circuit 410 generates a predetermined auto-zero potential and supplies it to the comparator 420.
比較器420には、容量232および233を介して、画素アレイ部214からの画素信号と、DAC213からの参照信号とが入力される。ここで、画素信号の電圧を入力電圧VVSLとし、参照信号の電圧を参照電圧Vrampとする。比較器420は、入力電圧VVSLと参照電圧Vrampとを比較し、比較結果をカウンタ234に出力する。
A pixel signal from the pixel array unit 214 and a reference signal from the DAC 213 are input to the comparator 420 via the capacitances 232 and 233. Here, the voltage of the pixel signal is defined as the input voltage V VSL , and the voltage of the reference signal is defined as the reference voltage V ram . The comparator 420 compares the input voltage VVSL with the reference voltage Vramp , and outputs the comparison result to the counter 234.
カウンタ234は、比較結果が反転するまでの期間に亘って計数値を計数するものである。このカウンタ234は、計数値を示すデジタル信号をラッチ回路235に出力する。
The counter 234 counts the count value over the period until the comparison result is reversed. The counter 234 outputs a digital signal indicating the count value to the latch circuit 235.
これらの比較器420やカウンタ234の動作は、タイミング制御回路212により制御される。
The operation of these comparators 420 and counter 234 is controlled by the timing control circuit 212.
ラッチ回路235は、対応するADC231からのデジタル信号を保持するものである。このラッチ回路235は、水平転送走査回路215の制御に従って、デジタル信号を信号処理回路120に供給する。
The latch circuit 235 holds the digital signal from the corresponding ADC 231. The latch circuit 235 supplies a digital signal to the signal processing circuit 120 under the control of the horizontal transfer scanning circuit 215.
なお、比較器420およびカウンタ234からなるシングルスロープ型のADCを配置しているが、比較器420を含むADCであれば、シングルスロープ型以外のADCを配置することもできる。例えば、シングルスロープ型のADCの代わりにSARADC(Successive Approximation Register Analog to Digital Converter)を配置することもできる。
Although a single slope type ADC consisting of a comparator 420 and a counter 234 is arranged, an ADC other than the single slope type can be arranged if the ADC includes the comparator 420. For example, SARADC (Successive Approximation Register Analog to Digital Converter) can be arranged instead of the single slope type ADC.
また、カラム毎に、ADCを配置しているが、画素ごとにADCを配置することもできる。この場合には、例えば、カウンタ値に基づいて時刻コードを生成する回路が画素アレイ部の外部に配置され、比較器およびデータ記憶部からなるADCが画素毎に配置される。そして、比較結果が反転したときの時刻コードがデジタル信号としてデータ記憶部に保持される。
Although the ADC is arranged for each column, it is also possible to arrange the ADC for each pixel. In this case, for example, a circuit that generates a time code based on the counter value is arranged outside the pixel array unit, and an ADC composed of a comparator and a data storage unit is arranged for each pixel. Then, the time code when the comparison result is inverted is held in the data storage unit as a digital signal.
[ADCの構成例]
図5は、本技術の第1の実施の形態におけるADC231内のオートゼロ電位生成回路410および比較器420の一構成例を示す回路図である。オートゼロ電位生成回路410は、外部カレントミラートランジスタ411、外部pMOSトランジスタ412、および、外部nMOSトランジスタ413を備える。外部カレントミラートランジスタ411として、例えば、pMOSトランジスタが用いられる。 [ADC configuration example]
FIG. 5 is a circuit diagram showing a configuration example of an auto-zeropotential generation circuit 410 and a comparator 420 in the ADC 231 according to the first embodiment of the present technology. The auto-zero potential generation circuit 410 includes an external current mirror transistor 411, an external pMOS transistor 412, and an external nMOS transistor 413. As the external current mirror transistor 411, for example, a pMOS transistor is used.
図5は、本技術の第1の実施の形態におけるADC231内のオートゼロ電位生成回路410および比較器420の一構成例を示す回路図である。オートゼロ電位生成回路410は、外部カレントミラートランジスタ411、外部pMOSトランジスタ412、および、外部nMOSトランジスタ413を備える。外部カレントミラートランジスタ411として、例えば、pMOSトランジスタが用いられる。 [ADC configuration example]
FIG. 5 is a circuit diagram showing a configuration example of an auto-zero
また、比較器420は、カレントミラートランジスタ421および422と、pMOSトランジスタ431乃至434、428、429と、差動トランジスタ423および424と、テール電流源425と、オートゼロトランジスタ426とを備える。カレントミラートランジスタ421、カレントミラートランジスタ422およびオートゼロトランジスタ426として、pMOSトランジスタが用いられる。差動トランジスタ423および424として、nMOSトランジスタが用いられる。
Further, the comparator 420 includes current mirror transistors 421 and 422, pMOS transistors 431 to 434, 428, 249, differential transistors 423 and 424, a tail current source 425, and an auto-zero transistor 426. A pMOS transistor is used as the current mirror transistor 421, the current mirror transistor 422, and the auto zero transistor 426. As the differential transistors 423 and 424, nMOS transistors are used.
カレントミラートランジスタ421および422は、電源電圧VDDのノードに並列に接続される。また、カレントミラートランジスタ421のゲートは、カレントミラートランジスタ422のゲートと、外部カレントミラートランジスタ411のゲートとに接続される。
The current mirror transistors 421 and 422 are connected in parallel to the node of the power supply voltage VDD. Further, the gate of the current mirror transistor 421 is connected to the gate of the current mirror transistor 422 and the gate of the external current mirror transistor 411.
外部pMOSトランジスタ412および外部nMOSトランジスタ413は、外部カレントミラートランジスタ411と、基準電圧(接地電圧など)VSSのノードとの間において、直列に接続される。外部pMOSトランジスタ412のゲートは、基準電圧VSSのノードに接続され、外部nMOSトランジスタ413のゲートは、そのドレインに接続される。これらの接続により、外部pMOSトランジスタ412および外部nMOSトランジスタ413は、いずれもオン状態となる。
The external pMOS transistor 412 and the external nMOS transistor 413 are connected in series between the external current mirror transistor 411 and the node of the reference voltage (ground voltage, etc.) VSS. The gate of the external pMOS transistor 412 is connected to the node of the reference voltage VSS, and the gate of the external nMOS transistor 413 is connected to its drain. By these connections, both the external pMOS transistor 412 and the external nMOS transistor 413 are turned on.
pMOSトランジスタ431は、カレントミラートランジスタ421および差動トランジスタ423の接続ノードと、差動トランジスタ423のゲートとの間の経路を、タイミング制御回路212からの制御信号xΦ2に従って開閉するものである。
The pMOS transistor 431 opens and closes the path between the connection node of the current mirror transistor 421 and the differential transistor 423 and the gate of the differential transistor 423 according to the control signal xΦ2 from the timing control circuit 212.
pMOSトランジスタ432は、カレントミラートランジスタ421のゲートとドレインとの間の経路を、タイミング制御回路212からの制御信号xΦ7に従って開閉するものである。
The pMOS transistor 432 opens and closes the path between the gate and drain of the current mirror transistor 421 according to the control signal xΦ7 from the timing control circuit 212.
pMOSトランジスタ433は、カレントミラートランジスタ422のゲートとドレインとの間の経路を、タイミング制御回路212からの制御信号xΦ6に従って開閉するものである。
The pMOS transistor 433 opens and closes the path between the gate and drain of the current mirror transistor 422 according to the control signal xΦ6 from the timing control circuit 212.
外部カレントミラートランジスタ411と外部pMOSトランジスタ412との接続ノードの電位をオートゼロ電位Vextとする。pMOSトランジスタ428は、タイミング制御回路212からの制御信号xΦ4に従って、オートゼロ電位Vextのノードと差動トランジスタ423のゲートとの間の経路を開閉するものである。pMOSトランジスタ429は、タイミング制御回路212からの制御信号xΦ3に従って、オートゼロ電位Vextのノードと差動トランジスタ424のゲートとの間の経路を開閉するものである。
The potential of the connection node between the external current mirror transistor 411 and the external pMOS transistor 412 is defined as the auto-zero potential Vext . The pMOS transistor 428 opens and closes the path between the node of the auto-zero potential Vext and the gate of the differential transistor 423 according to the control signal xΦ4 from the timing control circuit 212. The pMOS transistor 429 opens and closes the path between the node of the auto-zero potential Vext and the gate of the differential transistor 424 according to the control signal xΦ3 from the timing control circuit 212.
また、差動トランジスタ423のゲートは、垂直信号線229側の容量232にも接続される。この差動トランジスタ423のドレインは、カレントミラートランジスタ421のドレインに接続される。
Further, the gate of the differential transistor 423 is also connected to the capacitance 232 on the vertical signal line 229 side. The drain of the differential transistor 423 is connected to the drain of the current mirror transistor 421.
差動トランジスタ424のゲートは、DAC213側の容量233に接続される。この差動トランジスタ424のドレインは、カレントミラートランジスタ422のドレインに接続される。カレントミラートランジスタ422および差動トランジスタ424の接続ノードの電圧は、比較結果を示す出力電圧Voutとしてカウンタ234に出力される。
The gate of the differential transistor 424 is connected to the capacitance 233 on the DAC 213 side. The drain of the differential transistor 424 is connected to the drain of the current mirror transistor 422. The voltage of the connection node of the current mirror transistor 422 and the differential transistor 424 is output to the counter 234 as an output voltage Vout indicating the comparison result.
テール電流源425は、差動トランジスタ423および424のソースに共通に接続される。テール電流源425として、例えば、nMOSトランジスタが用いられる。
The tail current source 425 is commonly connected to the sources of the differential transistors 423 and 424. As the tail current source 425, for example, an nMOS transistor is used.
オートゼロトランジスタ426は、制御信号xΦ1に従って、差動トランジスタ424のゲートと、ドレインとの間の経路を開閉するものである。制御信号xΦ1は、例えば、タイミング制御回路212により供給される。
The auto-zero transistor 426 opens and closes the path between the gate and drain of the differential transistor 424 according to the control signal xΦ1. The control signal xΦ1 is supplied by, for example, the timing control circuit 212.
上述の回路において、テール電流源425の供給する電流をITとする。この場合、外部カレントミラートランジスタ411により、IT/2の電流が外部pMOSトランジスタ412および外部nMOSトランジスタ413のそれぞれに供給される。この電流に応じた、外部nMOSトランジスタ413のゲート-ソース間の電圧VN_TMは、次の式により表される。
VN_TM=VTHN_TM+(IT/βTM)1/2 ・・・式1
上式において、VTHN_TMは、外部nMOSトランジスタ413の閾値電圧であり、βTMは、トランジスタのサイズや酸化膜容量などにより決定される係数である。 In the above circuit, the current supplied by the tail current source 425 is defined as IT. In this case, the externalcurrent mirror transistor 411 supplies the IT / 2 current to the external pMOS transistor 412 and the external nMOS transistor 413, respectively. The gate-source voltage VN_TM of the external nMOS transistor 413 corresponding to this current is expressed by the following equation.
VN_TM = VTHN_TM + ( IT / βTM ) 1/2 ...Equation 1
In the above equation, VTHN_TM is the threshold voltage of theexternal nMOS transistor 413, and βTM is a coefficient determined by the size of the transistor, the oxide film capacity, and the like.
VN_TM=VTHN_TM+(IT/βTM)1/2 ・・・式1
上式において、VTHN_TMは、外部nMOSトランジスタ413の閾値電圧であり、βTMは、トランジスタのサイズや酸化膜容量などにより決定される係数である。 In the above circuit, the current supplied by the tail current source 425 is defined as IT. In this case, the external
VN_TM = VTHN_TM + ( IT / βTM ) 1/2 ...
In the above equation, VTHN_TM is the threshold voltage of the
また、IT/2の電流に応じた、外部pMOSトランジスタ412のゲート-ソース間の電圧VP_AZMは、次の式により表される。
VP_AZM=VTHP_AZM+(IT/βAZM)1/2 ・・・式2
上式において、VTHP_AZMは、外部pMOSトランジスタ412の閾値電圧であり、βAZMは、トランジスタのサイズや酸化膜容量などにより決定される係数である。 Further, the gate-source voltage VP_AZM of theexternal pMOS transistor 412 according to the current of IT / 2 is expressed by the following equation.
VP_AZM = V THP_AZM + ( IT / β AZM ) 1/2 ...Equation 2
In the above equation, VTHP_AZM is the threshold voltage of theexternal pMOS transistor 412, and β AZM is a coefficient determined by the size of the transistor, the oxide film capacity, and the like.
VP_AZM=VTHP_AZM+(IT/βAZM)1/2 ・・・式2
上式において、VTHP_AZMは、外部pMOSトランジスタ412の閾値電圧であり、βAZMは、トランジスタのサイズや酸化膜容量などにより決定される係数である。 Further, the gate-source voltage VP_AZM of the
VP_AZM = V THP_AZM + ( IT / β AZM ) 1/2 ...
In the above equation, VTHP_AZM is the threshold voltage of the
オートゼロ電位生成回路410内の接続構成より、電圧VN_TMと電圧VP_AZMとのうち、高い方がオートゼロ電位Vextとして出力される。このため、オートゼロ電位Vextは、次の式により表される。
From the connection configuration in the auto-zero potential generation circuit 410, the higher of the voltage VN_TM and the voltage VP_AZM is output as the auto-zero potential Vext . Therefore, the auto-zero potential Vext is expressed by the following equation.
これに対し、比較器420の入力レンジ(言い換えれば、動作レンジ)は、次の式により表される。
VOV0+VN_dif<Vext ・・・式4
Vext<VDD-VOV1-(VP_cur-VN_dif) ・・・式5
式4において、VOV0は、差動トランジスタ423のソースと基準電圧VSSとの間の電圧(言い換えれば、ソース電圧)を示す。VN_difは、差動トランジスタ423のゲート-ソース間の電圧を示す。式5において、VOV01は、差動トランジスタ423のドレイン-ソース間の電圧を示す。VP_curは、カレントミラートランジスタ421のゲート-ソース間の電圧を示す。 On the other hand, the input range (in other words, the operating range) of thecomparator 420 is expressed by the following equation.
V OV0 + VN_dif <V ext ...Equation 4
V ext <VDD-V OV1- ( VP_cur - VN_dif ) ... Equation 5
InEquation 4, VOV0 indicates the voltage between the source of the differential transistor 423 and the reference voltage VSS (in other words, the source voltage). VN_dim indicates the gate-source voltage of the differential transistor 423. In Equation 5, VOV01 represents the drain-source voltage of the differential transistor 423. VP_cur indicates the voltage between the gate and the source of the current mirror transistor 421.
VOV0+VN_dif<Vext ・・・式4
Vext<VDD-VOV1-(VP_cur-VN_dif) ・・・式5
式4において、VOV0は、差動トランジスタ423のソースと基準電圧VSSとの間の電圧(言い換えれば、ソース電圧)を示す。VN_difは、差動トランジスタ423のゲート-ソース間の電圧を示す。式5において、VOV01は、差動トランジスタ423のドレイン-ソース間の電圧を示す。VP_curは、カレントミラートランジスタ421のゲート-ソース間の電圧を示す。 On the other hand, the input range (in other words, the operating range) of the
V OV0 + VN_dif <V ext ...
V ext <VDD-V OV1- ( VP_cur - VN_dif ) ... Equation 5
In
式4を変形し、式3を代入すると、電圧VOV0は、次の式により表される。
By transforming Equation 4 and substituting Equation 3, the voltage VOV0 is expressed by the following equation.
式6において、電圧VN_TMと電圧VN_difとの差分は、外部nMOSトランジスタ413と差動トランジスタ423とのそれぞれの係数βが同一であれば、それらのトランジスタの閾値電圧の差分に該当する。この場合、VN_TM>VP_AZMのときに、次の式が成立する。
VOV0<VTHN_TM-VTHN_dif ・・・式7
上式において、VTHN_difは、差動トランジスタ423の閾値電圧である。 In Equation 6, the difference between the voltage VN_TM and the voltage VN_dif corresponds to the difference in the threshold voltage of theexternal nMOS transistor 413 and the differential transistor 423 if the respective coefficients β are the same. In this case, the following equation holds when VN_TM > VP_AZM .
V OV0 <V THN_TM -V THN_dif ... Equation 7
In the above equation, VTHN_dim is the threshold voltage of thedifferential transistor 423.
VOV0<VTHN_TM-VTHN_dif ・・・式7
上式において、VTHN_difは、差動トランジスタ423の閾値電圧である。 In Equation 6, the difference between the voltage VN_TM and the voltage VN_dif corresponds to the difference in the threshold voltage of the
V OV0 <V THN_TM -V THN_dif ... Equation 7
In the above equation, VTHN_dim is the threshold voltage of the
式7より、閾値電圧VTHN_TMおよびVTHN_difに相関があれば、プロセスばらつきに対する依存性は小さくなる。ただし、この効果が生じるには、「外部nMOSトランジスタ413は、差動トランジスタ423よりもVOV0以上高い閾値電圧を有するnMOSトランジスタである」、という条件(1)を満たす必要がある。
From Equation 7, if there is a correlation between the threshold voltages VTHN_TM and VTHN_dim , the dependence on process variation becomes small. However, in order for this effect to occur, it is necessary to satisfy the condition (1) that "the external nMOS transistor 413 is an nMOS transistor having a threshold voltage higher than the differential transistor 423 by VOV0 or more".
また、式6において、電圧VP_AZMと電圧VN_difとの差分は、VP_AZM≧VN_TMの条件が成立していることが前提であるため、条件(1)を満たしているのであれば、問題とならない。
Further, in Equation 6, the difference between the voltage VP_AZM and the voltage VN_dif is premised on the condition that VP_AZM ≧ VN_TM is satisfied. Therefore, if the condition (1) is satisfied, there is a problem. It does not become.
次に、オートゼロトランジスタ426のオン抵抗RONは、次の式により表される。
RON=1/{βAZ(Vext-VTHP_AZ)} ・・・式8
上式において、VTHP_AZは、オートゼロトランジスタ426の閾値電圧であり、βAZは、トランジスタのサイズや酸化膜容量などにより決定される係数である。 Next, the on-resistance RON of the auto-zero transistor 426 is expressed by the following equation.
R ON = 1 / {β AZ (V ext -V THP_AZ )} ... Equation 8
In the above equation, VTHP_AZ is the threshold voltage of the auto-zerotransistor 426, and β AZ is a coefficient determined by the size of the transistor, the oxide film capacity, and the like.
RON=1/{βAZ(Vext-VTHP_AZ)} ・・・式8
上式において、VTHP_AZは、オートゼロトランジスタ426の閾値電圧であり、βAZは、トランジスタのサイズや酸化膜容量などにより決定される係数である。 Next, the on-resistance RON of the auto-zero transistor 426 is expressed by the following equation.
R ON = 1 / {β AZ (V ext -V THP_AZ )} ... Equation 8
In the above equation, VTHP_AZ is the threshold voltage of the auto-zero
式8より、オン抵抗RONは、差動トランジスタ423に入力されるオートゼロ電位Vextに反比例している。このため、動作レンジを広げるために、オートゼロ電位Vextを低くしすぎると、オン抵抗RONが上昇し、オートゼロのセトリング時間が延びてしまう。したがって、オートゼロ電位Vextは、比較器420の動作レンジに加え、オン抵抗RONも考慮して決める必要がある。
From Equation 8, the on-resistance RON is inversely proportional to the auto-zero potential Vext input to the differential transistor 423. Therefore, if the auto-zero potential Vext is set too low in order to widen the operating range, the on -resistance RON rises and the settling time of auto-zero is extended. Therefore, the auto-zero potential Vext needs to be determined in consideration of the on -resistance RON in addition to the operating range of the comparator 420.
前述のように外部pMOSトランジスタ412の極性は、オートゼロトランジスタ426と同じである。このため、式9より、それらのトランジスタの閾値電圧が同一(すなわち、VTHP_AZM=VTHP_AZ)であれば、電圧VP_AZMと電圧VTHP_AZとの差分は「0」となる。また、VP_AZM>VN_TMのときに、次の式が成立する。
RON=1/[βAZ{(IT/βAZM)1/2}] ・・・式10 As described above, the polarity of theexternal pMOS transistor 412 is the same as that of the auto-zero transistor 426. Therefore, from Equation 9, if the threshold voltages of these transistors are the same (that is, VTHP_AZM = VTHP_AZ ), the difference between the voltage VP_AZM and the voltage V THP_AZ is “0”. Further, when VP_AZM > VN_TM , the following equation holds.
R ON = 1 / [β AZ {( IT / β AZM ) 1/2 }] ・ ・ ・ Equation 10
RON=1/[βAZ{(IT/βAZM)1/2}] ・・・式10 As described above, the polarity of the
R ON = 1 / [β AZ {( IT / β AZM ) 1/2 }] ・ ・ ・ Equation 10
係数βAZおよびβAZMが同一とすると、式9は次の式に置き換えることができる。
RON=1/{(βAZIT)1/2} ・・・式11 Assuming that the coefficients β AZ and β AZM are the same, Equation 9 can be replaced with the following equation.
R ON = 1 / {(β AZ IT ) 1/2 } ・ ・ ・ Equation 11
RON=1/{(βAZIT)1/2} ・・・式11 Assuming that the coefficients β AZ and β AZM are the same, Equation 9 can be replaced with the following equation.
R ON = 1 / {(β AZ IT ) 1/2 } ・ ・ ・ Equation 11
式11より、オン抵抗RONのプロセスのばらつきに対する依存性は小さいといえる。また、VP_AZM≧VN_TMの際のオン抵抗RONは、VP_AZM≧VN_TMの条件が成立していることが前提であるため、式11の値よりも小さくなる。
From Equation 11, it can be said that the dependence of the on-resistance RON on the process variation is small. Further, the on-resistance RON when VP_AZM ≧ VN_TM is smaller than the value of Equation 11 because it is premised that the condition of VP_AZM ≧ VN_TM is satisfied.
上述したように、オートゼロ電位Vextを、プロセスのばらつきに依存してオートゼロトランジスタ426と同じように変動する値にすることにより、式11に例示したように、そのばらつきによるオン抵抗RONの変動を相殺することができる。
As described above, by setting the auto-zero potential Vext to a value that fluctuates in the same manner as the auto-zero transistor 426 depending on the variation of the process, as illustrated in Equation 11, the variation of the on -resistance RON due to the variation. Can be offset.
図6は、本技術の第1の実施の形態における固体撮像素子200の動作の一例を示すタイミングチャートである。露光終了直前のタイミングT0乃至T1のオートゼロ期間において、タイミング制御回路212は、ローレベルの制御信号xΦ1およびxΦ4を供給する。制御信号xΦ2およびxΦ3は、ハイレベルに設定される。また、タイミングT0の直前において、タイミング制御回路212は、制御信号xΦ6をハイレベルにして制御信号xΦ7をローレベルにし、タイミングT1の直後において、制御信号xΦ6をローレベルにして制御信号xΦ7をハイレベルにする。
FIG. 6 is a timing chart showing an example of the operation of the solid-state image sensor 200 according to the first embodiment of the present technology. In the auto-zero period of timings T0 to T1 immediately before the end of exposure, the timing control circuit 212 supplies low-level control signals xΦ1 and xΦ4. The control signals xΦ2 and xΦ3 are set to a high level. Immediately before the timing T0, the timing control circuit 212 sets the control signal xΦ6 to a high level and sets the control signal xΦ7 to a low level, and immediately after the timing T1, sets the control signal xΦ6 to a low level and sets the control signal xΦ7 to a high level. To.
そして、タイミングT2乃至T3のP相変換期間において、画素220は、垂直信号線229を介して、リセットレベルを入力電圧VVSLとして供給する。ここで、リセットレベルは、画素220を初期化した際のレベルを示し、P相レベルとも呼ばれる。P相変換期間において、DAC213は、参照信号のレベルを徐々に上昇させる。リセットレベル(P相レベル)は、この期間内にAD変換される。
Then, during the P-phase conversion period of the timings T2 to T3, the pixel 220 supplies the reset level as the input voltage VVSL via the vertical signal line 229. Here, the reset level indicates the level when the pixel 220 is initialized, and is also called the P phase level. During the P-phase conversion period, the DAC 213 gradually increases the level of the reference signal. The reset level (P phase level) is AD converted within this period.
タイミングT4乃至T5のD相変換期間において、画素220は、垂直信号線229を介して、信号レベルを入力電圧VVSLとして供給する。ここで、信号レベルは、画素220内で浮遊拡散層へ電荷を転送した際のレベルを示し、D相レベルとも呼ばれる。D相変換期間において、DAC213は、参照信号のレベルを徐々に上昇させる。信号レベル(D相レベル)は、この期間内にAD変換される。
During the D-phase conversion period of timings T4 to T5, the pixel 220 supplies the signal level as an input voltage VVSL via the vertical signal line 229. Here, the signal level indicates the level when the electric charge is transferred to the floating diffusion layer in the pixel 220, and is also called the D phase level. During the D-phase conversion period, the DAC 213 gradually increases the level of the reference signal. The signal level (D phase level) is AD converted within this period.
一般に、P相レベル、D相レベルの順で変換が行われる。P相レベルよりもD相レベルの方が垂直信号線の電圧が低くなる傾向がある。このため、制御信号xΦ1のオートゼロ時のレベル(ローレベル)は、比較的高い値に設定される。例えば、電源電圧VDDから、ダイオード接続のカレントミラートランジスタのドレイン-ソース間電圧分、降下した電圧が制御信号xΦ1のオートゼロ時のローレベルとして用いられる。
Generally, conversion is performed in the order of P phase level and D phase level. The voltage of the vertical signal line tends to be lower at the D phase level than at the P phase level. Therefore, the level (low level) of the control signal xΦ1 at the time of auto zero is set to a relatively high value. For example, the voltage dropped from the power supply voltage VDD by the drain-source voltage of the current mirror transistor connected to the diode is used as the low level of the control signal xΦ1 at auto zero.
カラムADC230、または、後段の回路は、P相レベルとD相レベルとの差分を正味の画素信号として求めるCDS(Correlated Double Sampling)処理を行う。以下、行が選択されるたびに、同様の制御が繰り返し実行される。
The column ADC230 or the circuit in the subsequent stage performs CDS (Correlated Double Sampling) processing for obtaining the difference between the P phase level and the D phase level as a net pixel signal. Hereinafter, the same control is repeatedly executed each time a row is selected.
図7は、本技術の第1の実施の形態における比較器の特性の一例を示すグラフである。同図における縦軸は、電圧を示し、横軸は、抵抗値を示す。
FIG. 7 is a graph showing an example of the characteristics of the comparator according to the first embodiment of the present technique. In the figure, the vertical axis shows the voltage and the horizontal axis shows the resistance value.
プロセスのばらつきにより変動しない固定のオートゼロ電位Vextを設定した比較例を考える。この比較例において、オートゼロ電位Vextを動作レンジの下限より少し高い値にし、オン抵抗RONのクライテリアも満たされていれば、問題ないように思える。
Consider a comparative example in which a fixed auto-zero potential Vext that does not fluctuate due to process variation is set. In this comparative example, if the auto-zero potential Vext is set to a value slightly higher than the lower limit of the operating range and the criterion of on -resistance RON is also satisfied, it seems that there is no problem.
しかし、実際には、プロセスのばらつきに依存して比較器420の動作レンジの下限(式4の左辺)が変動することがある。同図における「SS」を付した矢印は、ばらつく範囲を示す。式4より、動作レンジの下限は、プロセスのばらつきによる差動トランジスタ423のゲート-ソース間の電圧VN_difの変動に応じて変化(例えば、上昇)する。
However, in reality, the lower limit of the operating range of the comparator 420 (the left side of Equation 4) may fluctuate depending on the variation in the process. Arrows with "SS" in the figure indicate the range of variation. From Equation 4, the lower limit of the operating range changes (for example, rises) according to the fluctuation of the voltage VN_dim between the gate and the source of the differential transistor 423 due to the variation in the process.
比較例では、オートゼロ電位Vextが変動しない一方で、動作レンジの下限が変動(上昇)するため、オートゼロ電位Vextが動作レンジから外れて比較器420が不安定になるおそれがある。例えば、比較器420の比較結果の反転が大幅に遅延する事象や、反転しない事象が発生する。
In the comparative example, while the auto-zero potential V ext does not fluctuate, the lower limit of the operating range fluctuates (rises), so that the auto-zero potential V ext may deviate from the operating range and the comparator 420 may become unstable. For example, an event in which the inversion of the comparison result of the comparator 420 is significantly delayed or an event in which the inversion is not performed occurs.
そこで、オートゼロ電位生成回路410は、式3に例示したようにVN_TM>VP_AZMのときに、プロセスのばらつきによる変動量が、差動トランジスタ423のゲート-ソース間の電圧VN_difの変動量と略同一のオートゼロ電位Vextを供給する。動作レンジの下限が電圧VN_difの変動に応じて変化(上昇)すると、同様にオートゼロ電位Vextも変動(上昇)する。これにより、オートゼロ電位Vextが動作レンジ外になることは無くなる。したがって、比較器420の動作を安定化することができる。ここで、「略同一」とは、比較する2つの値の差分が所定の許容値未満であることを意味する。
Therefore, in the auto-zero potential generation circuit 410, when VN_TM > VP_AZM as exemplified in Equation 3, the fluctuation amount due to the process variation is the fluctuation amount of the voltage VN_dif between the gate and the source of the differential transistor 423. It supplies substantially the same auto-zero potential V ext . When the lower limit of the operating range changes (rises) according to the fluctuation of the voltage VN_dim , the auto-zero potential Vext also fluctuates (rises). As a result, the auto-zero potential V ext does not go out of the operating range. Therefore, the operation of the comparator 420 can be stabilized. Here, "substantially the same" means that the difference between the two values to be compared is less than a predetermined allowable value.
また、比較例では、プロセスのばらつきに依存して、オン抵抗RONが変動することがある。そこで、オートゼロ電位生成回路410は、式3に例示したように、VN_TM≦VP_AZMのときに、プロセスのばらつきによる変動量が、オートゼロトランジスタ426の閾値電圧VTHP_AZMの変動量と略同一のオートゼロ電位Vextを供給する。このため、式10に例示したように、オン抵抗RONの変動を抑制することができる。これにより、オートゼロの際のセトリング時間の長期化を防止することができる。
Further, in the comparative example, the on-resistance RON may fluctuate depending on the variation of the process. Therefore, in the auto-zero potential generation circuit 410, as illustrated in Equation 3, when VN_TM ≤ VP_AZM , the amount of fluctuation due to process variation is substantially the same as the amount of fluctuation of the threshold voltage V THP_AZM of the auto-zero transistor 426. The potential Vext is supplied. Therefore, as illustrated in Equation 10, fluctuations in the on -resistance RON can be suppressed. As a result, it is possible to prevent a long settling time at the time of auto zero.
このように、本技術の第1の実施の形態によれば、オートゼロ電位生成回路410は、プロセスのばらつきによる変動量がオートゼロトランジスタ426と略同一のオートゼロ電位を供給するため、比較器420の動作を安定化することができる。
As described above, according to the first embodiment of the present technique, the auto-zero potential generation circuit 410 supplies an auto-zero potential in which the amount of fluctuation due to process variation is substantially the same as that of the auto-zero transistor 426, so that the comparator 420 operates. Can be stabilized.
<2.第2の実施の形態>
上述の第1の実施の形態では、pMOSトランジスタをオートゼロトランジスタ426として用いていたが、この構成では、オン抵抗RONの変動の抑制のために、外部pMOSトランジスタ412が必要となる。この第2の実施の形態の固体撮像素子200は、nMOSトランジスタをオートゼロトランジスタとして用いることにより、外部pMOSトランジスタ412を削減した点において第1の実施の形態と異なる。 <2. Second Embodiment>
In the first embodiment described above, the pMOS transistor is used as the auto-zerotransistor 426, but in this configuration, an external pMOS transistor 412 is required in order to suppress fluctuations in the on -resistance RON. The solid-state image sensor 200 of the second embodiment is different from the first embodiment in that the number of external pMOS transistors 412 is reduced by using the nMOS transistor as an auto-zero transistor.
上述の第1の実施の形態では、pMOSトランジスタをオートゼロトランジスタ426として用いていたが、この構成では、オン抵抗RONの変動の抑制のために、外部pMOSトランジスタ412が必要となる。この第2の実施の形態の固体撮像素子200は、nMOSトランジスタをオートゼロトランジスタとして用いることにより、外部pMOSトランジスタ412を削減した点において第1の実施の形態と異なる。 <2. Second Embodiment>
In the first embodiment described above, the pMOS transistor is used as the auto-zero
図8は、本技術の第2の実施の形態におけるオートゼロ電位生成回路410および比較器420の一構成例を示す回路図である。この第2の実施の形態の比較器420は、pMOSのオートゼロトランジスタ426の代わりに、nMOSのオートゼロトランジスタ427を備える点において第1の実施の形態と異なる。オートゼロトランジスタ427には、オートゼロ期間内にハイレベルとなる制御信号Φ1が入力される。
FIG. 8 is a circuit diagram showing a configuration example of the auto-zero potential generation circuit 410 and the comparator 420 according to the second embodiment of the present technology. The comparator 420 of the second embodiment differs from the first embodiment in that it includes an nMOS auto-zero transistor 427 instead of the pMOS auto-zero transistor 426. A control signal Φ1 that becomes a high level within the auto-zero period is input to the auto-zero transistor 427.
また、第2の実施の形態のオートゼロ電位生成回路410は、外部pMOSトランジスタ412が配置されない点において第1の実施の形態と異なる。
Further, the auto-zero potential generation circuit 410 of the second embodiment is different from the first embodiment in that the external pMOS transistor 412 is not arranged.
同図に例示するように、オートゼロトランジスタをnMOSに変更することにより、式8を、次の式に置き換えることができる。
RON=1/{βAZ(Vext-VTHN_AZ)} ・・・式12
上式においてVTHN_AZは、nMOSトランジスタの閾値電圧を示す。 As illustrated in the figure, the equation 8 can be replaced with the following equation by changing the auto-zero transistor to nMOS.
R ON = 1 / {β AZ (V ext -V THN_AZ )} ... Equation 12
In the above equation, VTHN_AZ indicates the threshold voltage of the nMOS transistor.
RON=1/{βAZ(Vext-VTHN_AZ)} ・・・式12
上式においてVTHN_AZは、nMOSトランジスタの閾値電圧を示す。 As illustrated in the figure, the equation 8 can be replaced with the following equation by changing the auto-zero transistor to nMOS.
R ON = 1 / {β AZ (V ext -V THN_AZ )} ... Equation 12
In the above equation, VTHN_AZ indicates the threshold voltage of the nMOS transistor.
式12より、オン抵抗RONも、動作レンジと同様にnMOSトランジスタの特性の変動に応じて変化する。このため、第1の実施の形態のように、pMOSトランジスタのばらつきを考慮する必要が無くなり、ロバスト性が向上する。特に、pMOSトランジスタのオン抵抗が高くなる際に、オートゼロ電位Vextを動作レンジの下限ぎりぎりに設定するために有効となる。
From Equation 12, the on-resistance RON also changes according to the fluctuation of the characteristics of the nMOS transistor as well as the operating range. Therefore, unlike the first embodiment, it is not necessary to consider the variation of the pMOS transistor, and the robustness is improved. In particular, it is effective for setting the auto-zero potential Vext to the limit of the lower limit of the operating range when the on-resistance of the pMOS transistor becomes high.
このように、本技術の第2の実施の形態によれば、nMOSのオートゼロトランジスタ427を用いるため、外部pMOSトランジスタ412が必要な第1の実施の形態と比較して、ロバスト性を向上させることができる。
As described above, according to the second embodiment of the present technique, since the nMOS auto-zero transistor 427 is used, the robustness is improved as compared with the first embodiment in which the external pMOS transistor 412 is required. Can be done.
<3.第3の実施の形態>
上述の第2の実施の形態では、カレントミラートランジスタ421および422に、差動トランジスタ423および424を接続していた。しかし、この構成では、オートゼロ電位Vextを動作レンジの下限ぎりぎりに設定した際に、比較器420の入力オフセット電圧が増加する傾向がある。これは、オートゼロ電位Vextが低下するほど、ランプ側の差動トランジスタ424のドレイン-ソース間電圧が下がり、入力側の差動トランジスタ423のドレイン-ソース間電圧との差が広がってしまうためである。この第3の実施の形態の固体撮像素子200は、カスコードトランジスタの挿入により、入力オフセット電圧を低減した点において第2の実施の形態と異なる。 <3. Third Embodiment>
In the second embodiment described above, the differential transistors 423 and 424 are connected to the current mirror transistors 421 and 422. However, in this configuration, the input offset voltage of the comparator 420 tends to increase when the auto-zero potential Vext is set to the very limit of the lower limit of the operating range. This is because as the auto-zero potential voltage decreases , the drain-source voltage of the differential transistor 424 on the lamp side decreases, and the difference from the drain-source voltage of the differential transistor 423 on the input side widens. be. The solid-state image sensor 200 of the third embodiment is different from the second embodiment in that the input offset voltage is reduced by inserting a cascode transistor.
上述の第2の実施の形態では、カレントミラートランジスタ421および422に、差動トランジスタ423および424を接続していた。しかし、この構成では、オートゼロ電位Vextを動作レンジの下限ぎりぎりに設定した際に、比較器420の入力オフセット電圧が増加する傾向がある。これは、オートゼロ電位Vextが低下するほど、ランプ側の差動トランジスタ424のドレイン-ソース間電圧が下がり、入力側の差動トランジスタ423のドレイン-ソース間電圧との差が広がってしまうためである。この第3の実施の形態の固体撮像素子200は、カスコードトランジスタの挿入により、入力オフセット電圧を低減した点において第2の実施の形態と異なる。 <3. Third Embodiment>
In the second embodiment described above, the
図9は、本技術の第3の実施の形態におけるオートゼロ電位生成回路410および比較器420の一構成例を示す回路図である。この第3の実施の形態のオートゼロ電位生成回路410は、制御トランジスタ414および外部nMOSトランジスタ415をさらに備える点において第2の実施の形態と異なる。
FIG. 9 is a circuit diagram showing a configuration example of the auto-zero potential generation circuit 410 and the comparator 420 according to the third embodiment of the present technology. The auto-zero potential generation circuit 410 of the third embodiment is different from the second embodiment in that it further includes a control transistor 414 and an external nMOS transistor 415.
また、第3の実施の形態の比較器420は、pMOSトランジスタ428および429を備えず、pMOSトランジスタ434と、nMOSトランジスタ435、438および439と、カスコードトランジスタ436および437とをさらに備える点において第2の実施の形態と異なる。また、列毎に、比較器420とカウンタ234との間にカラムアンプ440が挿入される。
Further, the comparator 420 of the third embodiment does not include the pMOS transistors 428 and 429, but further includes a pMOS transistor 434, an nMOS transistor 435, 438 and 439, and a cascode transistor 436 and 437. It is different from the embodiment of. Further, a column amplifier 440 is inserted between the comparator 420 and the counter 234 for each column.
制御トランジスタ414、外部nMOSトランジスタ415、外部nMOSトランジスタ413は、外部カレントミラートランジスタ411と基準電圧VSSとの間において直列に接続される。制御トランジスタ414のゲートには、タイミング制御回路212からの制御信号Φ5が入力される。
The control transistor 414, the external nMOS transistor 415, and the external nMOS transistor 413 are connected in series between the external current mirror transistor 411 and the reference voltage VSS. A control signal Φ5 from the timing control circuit 212 is input to the gate of the control transistor 414.
外部カレントミラートランジスタ411および制御トランジスタ414の接続ノードと、外部nMOSトランジスタ415のゲートとは、カスコードトランジスタ436のゲートに接続される。このノードの電圧をVext2とする。
The connection node of the external current mirror transistor 411 and the control transistor 414 and the gate of the external nMOS transistor 415 are connected to the gate of the cascode transistor 436. Let the voltage of this node be Vext2 .
pMOSトランジスタ431は、カレントミラートランジスタ421およびカスコードトランジスタ436の接続ノードと、差動トランジスタ423のゲートとの間の経路を、タイミング制御回路212からの制御信号xΦ2に従って開閉する。
The pMOS transistor 431 opens and closes the path between the connection node of the current mirror transistor 421 and the cascode transistor 436 and the gate of the differential transistor 423 according to the control signal xΦ2 from the timing control circuit 212.
pMOSトランジスタ434は、カレントミラートランジスタ422およびカスコードトランジスタ437の接続ノードと、差動トランジスタ424のゲートとの間の経路を、タイミング制御回路212からの制御信号xΦ3に従って開閉するものである。
The pMOS transistor 434 opens and closes the path between the connection node of the current mirror transistor 422 and the cascode transistor 437 and the gate of the differential transistor 424 according to the control signal xΦ3 from the timing control circuit 212.
nMOSトランジスタ435は、カレントミラートランジスタ421およびカスコードトランジスタ436の接続ノードと、差動トランジスタ423のゲートとの間に挿入される。このnMOSトランジスタ435のゲートには、所定のローレベルTIELが入力される。
The nMOS transistor 435 is inserted between the connection node of the current mirror transistor 421 and the cascode transistor 436 and the gate of the differential transistor 423. A predetermined low level TIEL is input to the gate of the nMOS transistor 435.
カスコードトランジスタ437のゲートには、所定のハイレベルTIEHが入力される。
A predetermined high level TIEH is input to the gate of the cascode transistor 437.
nMOSトランジスタ438は、外部nMOSトランジスタ413のゲートと、差動トランジスタ423のゲートとの間の経路を、タイミング制御回路212からの制御信号Φ4に従って開閉するものである。
The nMOS transistor 438 opens and closes the path between the gate of the external nMOS transistor 413 and the gate of the differential transistor 423 according to the control signal Φ4 from the timing control circuit 212.
nMOSトランジスタ439は、外部nMOSトランジスタ413および415の接続ノードと、差動トランジスタ424のゲートとの間に挿入される。このnMOSトランジスタ439のゲートには、所定のローレベルTIELが入力される。
The nMOS transistor 439 is inserted between the connection node of the external nMOS transistors 413 and 415 and the gate of the differential transistor 424. A predetermined low level TIEL is input to the gate of the nMOS transistor 439.
カラムアンプ440は、所定のアナログゲインにより比較器420の出力を増幅してカウンタ234に供給するものである。
The column amplifier 440 amplifies the output of the comparator 420 by a predetermined analog gain and supplies it to the counter 234.
なお、pMOSのオートゼロトランジスタ426を用いる第1の実施の形態に第3の実施の形態を適用することもできる。この場合には、オートゼロ電位生成回路410内に外部pMOSトランジスタを追加し、オートゼロトランジスタ426に制御信号xΦ1を入力すればよい。
It should be noted that the third embodiment can be applied to the first embodiment using the pMOS auto-zero transistor 426. In this case, an external pMOS transistor may be added to the auto-zero potential generation circuit 410, and the control signal xΦ1 may be input to the auto-zero transistor 426.
図10は、本技術の第3の実施の形態における固体撮像素子200の動作の一例を示すタイミングチャートである。制御信号xΦ2およびxΦ3は、ハイレベルに設定される。タイミングT0の直前において、タイミング制御回路212は、制御信号Φ5、xΦ6をハイレベルにし、制御信号xΦ7をローレベルにする。
FIG. 10 is a timing chart showing an example of the operation of the solid-state image sensor 200 according to the third embodiment of the present technology. The control signals xΦ2 and xΦ3 are set to a high level. Immediately before the timing T0, the timing control circuit 212 sets the control signals Φ5 and xΦ6 to the high level and the control signal xΦ7 to the low level.
そして、オートゼロ期間の開始のタイミングT0において、タイミング制御回路212は、制御信号Φ1、Φ4をハイレベルにする。オートゼロ期間の終了のタイミングT1において、タイミング制御回路212は、制御信号Φ1、Φ4をローレベルにする。
Then, at the timing T0 at the start of the auto-zero period, the timing control circuit 212 sets the control signals Φ1 and Φ4 to a high level. At the end timing T1 of the auto-zero period, the timing control circuit 212 sets the control signals Φ1 and Φ4 to a low level.
タイミングT1の直後において、タイミング制御回路212は、制御信号Φ5、xΦ6をローレベルにし、制御信号xΦ7をハイレベルにする。
Immediately after the timing T1, the timing control circuit 212 sets the control signals Φ5 and xΦ6 to the low level and the control signal xΦ7 to the high level.
図11は、本技術の第3の実施の形態における効果を説明するための図である。同図におけるaは、第2の実施の形態の比較器420を示す。この第2の実施の形態では、カレントミラー回路(カレントミラートランジスタ421および422)と、差動トランジスタ423および424との間には、カスコードトランジスタが挿入されていない。
FIG. 11 is a diagram for explaining the effect in the third embodiment of the present technique. A in the figure shows the comparator 420 of the second embodiment. In this second embodiment, the cascode transistor is not inserted between the current mirror circuit (current mirror transistors 421 and 422) and the differential transistors 423 and 424.
仮に、このまま、オートゼロを行うと、オートゼロ電位Vextを低下させるほど、ランプ側の差動トランジスタ424のドレイン-ソース間電圧が下がり、入力側の差動トランジスタ423のドレイン-ソース間電圧との差が広がってしまう。この結果、比較器420の入力オフセット電圧が増加するおそれがある。
If auto-zero is performed as it is, the drain-source voltage of the differential transistor 424 on the lamp side decreases as the auto-zero potential Vext decreases, and the difference from the drain-source voltage of the differential transistor 423 on the input side increases. It will spread. As a result, the input offset voltage of the comparator 420 may increase.
そこで、第3の実施の形態では、同図におけるbに例示するように、タイミング制御回路212がオートゼロ期間内に、制御信号Φ5によって制御トランジスタ414をオン状態にし、カスコードトランジスタ436および437を挿入している。そして、オートゼロが完了すると、タイミング制御回路212は、カスコードを解除する。
Therefore, in the third embodiment, as illustrated in b in the figure, the timing control circuit 212 turns on the control transistor 414 by the control signal Φ5 and inserts the cascode transistors 436 and 437 within the auto-zero period. ing. Then, when the auto zero is completed, the timing control circuit 212 releases the cascode.
このように、オートゼロ時のみカスコード化することにより、差動トランジスタ423および424のそれぞれのドレイン電位を揃えることができる。これにより、差動トランジスタ423および424のそれぞれのドレイン-ソース間電圧の差分の増大を抑制し、入力オフセット電圧を低減することができる。
In this way, by cascoding only at the time of auto zero, the drain potentials of the differential transistors 423 and 424 can be made uniform. As a result, it is possible to suppress an increase in the difference between the drain and source voltages of the differential transistors 423 and 424, respectively, and reduce the input offset voltage.
特に、カラムアンプ440などにより、アナログゲインをかけた際には、数ミリボルト(mV)オーダーのオフセットが致命的な結果を招くため、カスコード化が有効となる。
In particular, when analog gain is applied by a column amplifier 440 or the like, an offset on the order of several millivolts (mV) causes a fatal result, so cascode conversion is effective.
このように、本技術の第3の実施の形態によれば、オートゼロ期間内にカスコード化するため、比較器420内の入力オフセット電圧を低減することができる。
As described above, according to the third embodiment of the present technique, the input offset voltage in the comparator 420 can be reduced because the cascode is formed within the auto-zero period.
<4.第4の実施の形態>
上述の第1の実施の形態では、列ごとにオートゼロ電位生成回路410を配置していたが、この構成では、列数が増大するほど、カラムADC230の回路規模が増大してしまう。この第4の実施の形態の固体撮像素子200は、複数の列でオートゼロ電位生成回路410を共有することにより、回路規模を削減した点において第1の実施の形態と異なる。 <4. Fourth Embodiment>
In the first embodiment described above, the auto-zeropotential generation circuit 410 is arranged for each column, but in this configuration, the circuit scale of the column ADC 230 increases as the number of columns increases. The solid-state image sensor 200 of the fourth embodiment is different from the first embodiment in that the circuit scale is reduced by sharing the auto-zero potential generation circuit 410 in a plurality of rows.
上述の第1の実施の形態では、列ごとにオートゼロ電位生成回路410を配置していたが、この構成では、列数が増大するほど、カラムADC230の回路規模が増大してしまう。この第4の実施の形態の固体撮像素子200は、複数の列でオートゼロ電位生成回路410を共有することにより、回路規模を削減した点において第1の実施の形態と異なる。 <4. Fourth Embodiment>
In the first embodiment described above, the auto-zero
図12は、本技術の第4の実施の形態におけるカラムADC230の一構成例を示すブロック図である。この第4の実施の形態のカラムADC230では、ADC231の外に1つのオートゼロ電位生成回路410が配置される。そして、複数の列(例えば、全ての列)により、1つのオートゼロ電位生成回路410が共有される。
FIG. 12 is a block diagram showing a configuration example of the column ADC 230 according to the fourth embodiment of the present technology. In the column ADC 230 of the fourth embodiment, one auto-zero potential generation circuit 410 is arranged outside the ADC 231. Then, one auto-zero potential generation circuit 410 is shared by a plurality of columns (for example, all columns).
なお、オートゼロ電位生成回路410をM(Mは、2以上の整数)列ごとに配置し、それらのM列で1つのオートゼロ電位生成回路410を共有することもできる。
It is also possible to arrange the auto-zero potential generation circuit 410 for each M (M is an integer of 2 or more) columns, and share one auto-zero potential generation circuit 410 with those M columns.
複数の列によりオートゼロ電位生成回路410を共有することにより、列ごとにオートゼロ電位生成回路410を配置する第1の実施の形態と比較して回路規模を削減することができる。
By sharing the auto-zero potential generation circuit 410 among a plurality of rows, the circuit scale can be reduced as compared with the first embodiment in which the auto-zero potential generation circuit 410 is arranged for each row.
なお、第4の実施の形態に、第2、第3の実施の形態を適用することができる。
Note that the second and third embodiments can be applied to the fourth embodiment.
このように、第4の実施の形態によれば、複数の列によりオートゼロ電位生成回路410を共有するため、カラムADC230の回路規模を削減することができる。
As described above, according to the fourth embodiment, since the auto-zero potential generation circuit 410 is shared by a plurality of columns, the circuit scale of the column ADC 230 can be reduced.
<5.移動体への応用例>
本開示に係る技術(本技術)は、様々な製品へ応用することができる。例えば、本開示に係る技術は、自動車、電気自動車、ハイブリッド電気自動車、自動二輪車、自転車、パーソナルモビリティ、飛行機、ドローン、船舶、ロボット等のいずれかの種類の移動体に搭載される装置として実現されてもよい。 <5. Application example to moving body>
The technique according to the present disclosure (the present technique) can be applied to various products. For example, the technology according to the present disclosure is realized as a device mounted on a moving body of any kind such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility, an airplane, a drone, a ship, and a robot. You may.
本開示に係る技術(本技術)は、様々な製品へ応用することができる。例えば、本開示に係る技術は、自動車、電気自動車、ハイブリッド電気自動車、自動二輪車、自転車、パーソナルモビリティ、飛行機、ドローン、船舶、ロボット等のいずれかの種類の移動体に搭載される装置として実現されてもよい。 <5. Application example to moving body>
The technique according to the present disclosure (the present technique) can be applied to various products. For example, the technology according to the present disclosure is realized as a device mounted on a moving body of any kind such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility, an airplane, a drone, a ship, and a robot. You may.
図13は、本開示に係る技術が適用され得る移動体制御システムの一例である車両制御システムの概略的な構成例を示すブロック図である。
FIG. 13 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technique according to the present disclosure can be applied.
車両制御システム12000は、通信ネットワーク12001を介して接続された複数の電子制御ユニットを備える。図13に示した例では、車両制御システム12000は、駆動系制御ユニット12010、ボディ系制御ユニット12020、車外情報検出ユニット12030、車内情報検出ユニット12040、及び統合制御ユニット12050を備える。また、統合制御ユニット12050の機能構成として、マイクロコンピュータ12051、音声画像出力部12052、及び車載ネットワークI/F(interface)12053が図示されている。
The vehicle control system 12000 includes a plurality of electronic control units connected via the communication network 12001. In the example shown in FIG. 13, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside information detection unit 12030, an in-vehicle information detection unit 12040, and an integrated control unit 12050. Further, as a functional configuration of the integrated control unit 12050, a microcomputer 12051, an audio image output unit 12052, and an in-vehicle network I / F (interface) 12053 are shown.
駆動系制御ユニット12010は、各種プログラムにしたがって車両の駆動系に関連する装置の動作を制御する。例えば、駆動系制御ユニット12010は、内燃機関又は駆動用モータ等の車両の駆動力を発生させるための駆動力発生装置、駆動力を車輪に伝達するための駆動力伝達機構、車両の舵角を調節するステアリング機構、及び、車両の制動力を発生させる制動装置等の制御装置として機能する。
The drive system control unit 12010 controls the operation of the device related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 has a driving force generator for generating a driving force of a vehicle such as an internal combustion engine or a driving motor, a driving force transmission mechanism for transmitting the driving force to the wheels, and a steering angle of the vehicle. It functions as a control device such as a steering mechanism for adjusting and a braking device for generating braking force of the vehicle.
ボディ系制御ユニット12020は、各種プログラムにしたがって車体に装備された各種装置の動作を制御する。例えば、ボディ系制御ユニット12020は、キーレスエントリシステム、スマートキーシステム、パワーウィンドウ装置、あるいは、ヘッドランプ、バックランプ、ブレーキランプ、ウィンカー又はフォグランプ等の各種ランプの制御装置として機能する。この場合、ボディ系制御ユニット12020には、鍵を代替する携帯機から発信される電波又は各種スイッチの信号が入力され得る。ボディ系制御ユニット12020は、これらの電波又は信号の入力を受け付け、車両のドアロック装置、パワーウィンドウ装置、ランプ等を制御する。
The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a keyless entry system, a smart key system, a power window device, or a control device for various lamps such as headlamps, back lamps, brake lamps, turn signals or fog lamps. In this case, the body system control unit 12020 may be input with radio waves transmitted from a portable device that substitutes for the key or signals of various switches. The body system control unit 12020 receives inputs of these radio waves or signals and controls a vehicle door lock device, a power window device, a lamp, and the like.
車外情報検出ユニット12030は、車両制御システム12000を搭載した車両の外部の情報を検出する。例えば、車外情報検出ユニット12030には、撮像部12031が接続される。車外情報検出ユニット12030は、撮像部12031に車外の画像を撮像させるとともに、撮像された画像を受信する。車外情報検出ユニット12030は、受信した画像に基づいて、人、車、障害物、標識又は路面上の文字等の物体検出処理又は距離検出処理を行ってもよい。
The vehicle outside information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, the image pickup unit 12031 is connected to the vehicle outside information detection unit 12030. The vehicle outside information detection unit 12030 causes the image pickup unit 12031 to capture an image of the outside of the vehicle and receives the captured image. The vehicle outside information detection unit 12030 may perform object detection processing or distance detection processing such as a person, a vehicle, an obstacle, a sign, or a character on the road surface based on the received image.
撮像部12031は、光を受光し、その光の受光量に応じた電気信号を出力する光センサである。撮像部12031は、電気信号を画像として出力することもできるし、測距の情報として出力することもできる。また、撮像部12031が受光する光は、可視光であっても良いし、赤外線等の非可視光であっても良い。
The image pickup unit 12031 is an optical sensor that receives light and outputs an electric signal according to the amount of the light received. The image pickup unit 12031 can output an electric signal as an image or can output it as distance measurement information. Further, the light received by the image pickup unit 12031 may be visible light or invisible light such as infrared light.
車内情報検出ユニット12040は、車内の情報を検出する。車内情報検出ユニット12040には、例えば、運転者の状態を検出する運転者状態検出部12041が接続される。運転者状態検出部12041は、例えば運転者を撮像するカメラを含み、車内情報検出ユニット12040は、運転者状態検出部12041から入力される検出情報に基づいて、運転者の疲労度合い又は集中度合いを算出してもよいし、運転者が居眠りをしていないかを判別してもよい。
The in-vehicle information detection unit 12040 detects the in-vehicle information. For example, a driver state detection unit 12041 that detects a driver's state is connected to the vehicle interior information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that images the driver, and the in-vehicle information detection unit 12040 determines the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041. It may be calculated, or it may be determined whether or not the driver has fallen asleep.
マイクロコンピュータ12051は、車外情報検出ユニット12030又は車内情報検出ユニット12040で取得される車内外の情報に基づいて、駆動力発生装置、ステアリング機構又は制動装置の制御目標値を演算し、駆動系制御ユニット12010に対して制御指令を出力することができる。例えば、マイクロコンピュータ12051は、車両の衝突回避あるいは衝撃緩和、車間距離に基づく追従走行、車速維持走行、車両の衝突警告、又は車両のレーン逸脱警告等を含むADAS(Advanced Driver Assistance System)の機能実現を目的とした協調制御を行うことができる。
The microcomputer 12051 calculates the control target value of the driving force generator, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and the drive system control unit. A control command can be output to 12010. For example, the microcomputer 12051 realizes ADAS (Advanced Driver Assistance System) functions including vehicle collision avoidance or impact mitigation, follow-up driving based on inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane deviation warning, and the like. It is possible to perform cooperative control for the purpose of.
また、マイクロコンピュータ12051は、車外情報検出ユニット12030又は車内情報検出ユニット12040で取得される車両の周囲の情報に基づいて駆動力発生装置、ステアリング機構又は制動装置等を制御することにより、運転者の操作に拠らずに自律的に走行する自動運転等を目的とした協調制御を行うことができる。
Further, the microcomputer 12051 controls the driving force generating device, the steering mechanism, the braking device, and the like based on the information around the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040. It is possible to perform coordinated control for the purpose of automatic driving that runs autonomously without depending on the operation.
また、マイクロコンピュータ12051は、車外情報検出ユニット12030で取得される車外の情報に基づいて、ボディ系制御ユニット12020に対して制御指令を出力することができる。例えば、マイクロコンピュータ12051は、車外情報検出ユニット12030で検知した先行車又は対向車の位置に応じてヘッドランプを制御し、ハイビームをロービームに切り替える等の防眩を図ることを目的とした協調制御を行うことができる。
Further, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the vehicle outside information detection unit 12030. For example, the microcomputer 12051 controls the headlamps according to the position of the preceding vehicle or the oncoming vehicle detected by the outside information detection unit 12030, and performs cooperative control for the purpose of anti-glare such as switching the high beam to the low beam. It can be carried out.
音声画像出力部12052は、車両の搭乗者又は車外に対して、視覚的又は聴覚的に情報を通知することが可能な出力装置へ音声及び画像のうちの少なくとも一方の出力信号を送信する。図13の例では、出力装置として、オーディオスピーカ12061、表示部12062及びインストルメントパネル12063が例示されている。表示部12062は、例えば、オンボードディスプレイ及びヘッドアップディスプレイの少なくとも一つを含んでいてもよい。
The audio image output unit 12052 transmits an output signal of at least one of audio and an image to an output device capable of visually or audibly notifying information to the passenger or the outside of the vehicle. In the example of FIG. 13, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as output devices. The display unit 12062 may include, for example, at least one of an onboard display and a head-up display.
図14は、撮像部12031の設置位置の例を示す図である。
FIG. 14 is a diagram showing an example of the installation position of the imaging unit 12031.
図14では、撮像部12031として、撮像部12101,12102,12103,12104,12105を有する。
In FIG. 14, as the imaging unit 12031, the imaging unit 12101, 12102, 12103, 12104, 12105 is provided.
撮像部12101,12102,12103,12104,12105は、例えば、車両12100のフロントノーズ、サイドミラー、リアバンパ、バックドア及び車室内のフロントガラスの上部等の位置に設けられる。フロントノーズに備えられる撮像部12101及び車室内のフロントガラスの上部に備えられる撮像部12105は、主として車両12100の前方の画像を取得する。サイドミラーに備えられる撮像部12102,12103は、主として車両12100の側方の画像を取得する。リアバンパ又はバックドアに備えられる撮像部12104は、主として車両12100の後方の画像を取得する。車室内のフロントガラスの上部に備えられる撮像部12105は、主として先行車両又は、歩行者、障害物、信号機、交通標識又は車線等の検出に用いられる。
The image pickup units 12101, 12102, 12103, 12104, 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumpers, back doors, and the upper part of the windshield in the vehicle interior of the vehicle 12100. The image pickup unit 12101 provided on the front nose and the image pickup section 12105 provided on the upper part of the windshield in the vehicle interior mainly acquire an image in front of the vehicle 12100. The image pickup units 12102 and 12103 provided in the side mirror mainly acquire images of the side of the vehicle 12100. The image pickup unit 12104 provided in the rear bumper or the back door mainly acquires an image of the rear of the vehicle 12100. The image pickup unit 12105 provided on the upper part of the front glass in the vehicle interior is mainly used for detecting a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.
なお、図14には、撮像部12101ないし12104の撮影範囲の一例が示されている。撮像範囲12111は、フロントノーズに設けられた撮像部12101の撮像範囲を示し、撮像範囲12112,12113は、それぞれサイドミラーに設けられた撮像部12102,12103の撮像範囲を示し、撮像範囲12114は、リアバンパ又はバックドアに設けられた撮像部12104の撮像範囲を示す。例えば、撮像部12101ないし12104で撮像された画像データが重ね合わせられることにより、車両12100を上方から見た俯瞰画像が得られる。
Note that FIG. 14 shows an example of the shooting range of the imaging units 12101 to 12104. The imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, the imaging ranges 12112 and 12113 indicate the imaging range of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and the imaging range 12114 indicates the imaging range. The imaging range of the imaging unit 12104 provided on the rear bumper or the back door is shown. For example, by superimposing the image data captured by the imaging units 12101 to 12104, a bird's-eye view image of the vehicle 12100 can be obtained.
撮像部12101ないし12104の少なくとも1つは、距離情報を取得する機能を有していてもよい。例えば、撮像部12101ないし12104の少なくとも1つは、複数の撮像素子からなるステレオカメラであってもよいし、位相差検出用の画素を有する撮像素子であってもよい。
At least one of the image pickup units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image pickup units 12101 to 12104 may be a stereo camera including a plurality of image pickup elements, or may be an image pickup element having pixels for phase difference detection.
例えば、マイクロコンピュータ12051は、撮像部12101ないし12104から得られた距離情報を基に、撮像範囲12111ないし12114内における各立体物までの距離と、この距離の時間的変化(車両12100に対する相対速度)を求めることにより、特に車両12100の進行路上にある最も近い立体物で、車両12100と略同じ方向に所定の速度(例えば、0km/h以上)で走行する立体物を先行車として抽出することができる。さらに、マイクロコンピュータ12051は、先行車の手前に予め確保すべき車間距離を設定し、自動ブレーキ制御(追従停止制御も含む)や自動加速制御(追従発進制御も含む)等を行うことができる。このように運転者の操作に拠らずに自律的に走行する自動運転等を目的とした協調制御を行うことができる。
For example, the microcomputer 12051 has a distance to each three-dimensional object in the image pickup range 12111 to 12114 based on the distance information obtained from the image pickup unit 12101 to 12104, and a temporal change of this distance (relative speed with respect to the vehicle 12100). By obtaining can. Further, the microcomputer 12051 can set an inter-vehicle distance to be secured in advance in front of the preceding vehicle, and can perform automatic brake control (including follow-up stop control), automatic acceleration control (including follow-up start control), and the like. In this way, it is possible to perform coordinated control for the purpose of automatic driving or the like that autonomously travels without relying on the driver's operation.
例えば、マイクロコンピュータ12051は、撮像部12101ないし12104から得られた距離情報を元に、立体物に関する立体物データを、2輪車、普通車両、大型車両、歩行者、電柱等その他の立体物に分類して抽出し、障害物の自動回避に用いることができる。例えば、マイクロコンピュータ12051は、車両12100の周辺の障害物を、車両12100のドライバが視認可能な障害物と視認困難な障害物とに識別する。そして、マイクロコンピュータ12051は、各障害物との衝突の危険度を示す衝突リスクを判断し、衝突リスクが設定値以上で衝突可能性がある状況であるときには、オーディオスピーカ12061や表示部12062を介してドライバに警報を出力することや、駆動系制御ユニット12010を介して強制減速や回避操舵を行うことで、衝突回避のための運転支援を行うことができる。
For example, the microcomputer 12051 converts three-dimensional object data related to a three-dimensional object into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, electric poles, and other three-dimensional objects based on the distance information obtained from the image pickup units 12101 to 12104. It can be classified and extracted and used for automatic avoidance of obstacles. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 determines the collision risk indicating the risk of collision with each obstacle, and when the collision risk is equal to or higher than the set value and there is a possibility of collision, the microcomputer 12051 via the audio speaker 12061 or the display unit 12062. By outputting an alarm to the driver and performing forced deceleration and avoidance steering via the drive system control unit 12010, driving support for collision avoidance can be provided.
撮像部12101ないし12104の少なくとも1つは、赤外線を検出する赤外線カメラであってもよい。例えば、マイクロコンピュータ12051は、撮像部12101ないし12104の撮像画像中に歩行者が存在するか否かを判定することで歩行者を認識することができる。かかる歩行者の認識は、例えば赤外線カメラとしての撮像部12101ないし12104の撮像画像における特徴点を抽出する手順と、物体の輪郭を示す一連の特徴点にパターンマッチング処理を行って歩行者か否かを判別する手順によって行われる。マイクロコンピュータ12051が、撮像部12101ないし12104の撮像画像中に歩行者が存在すると判定し、歩行者を認識すると、音声画像出力部12052は、当該認識された歩行者に強調のための方形輪郭線を重畳表示するように、表示部12062を制御する。また、音声画像出力部12052は、歩行者を示すアイコン等を所望の位置に表示するように表示部12062を制御してもよい。
At least one of the image pickup units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the captured image of the imaging unit 12101 to 12104. Such recognition of a pedestrian is, for example, a procedure for extracting feature points in an image captured by an image pickup unit 12101 to 12104 as an infrared camera, and pattern matching processing is performed on a series of feature points indicating the outline of an object to determine whether or not the pedestrian is a pedestrian. It is done by the procedure to determine. When the microcomputer 12051 determines that a pedestrian is present in the captured image of the image pickup unit 12101 to 12104 and recognizes the pedestrian, the audio image output unit 12052 determines the square contour line for emphasizing the recognized pedestrian. The display unit 12062 is controlled so as to superimpose and display. Further, the audio image output unit 12052 may control the display unit 12062 so as to display an icon or the like indicating a pedestrian at a desired position.
以上、本開示に係る技術が適用され得る車両制御システムの一例について説明した。本開示に係る技術は、以上説明した構成のうち、例えば、撮像部12031に適用され得る。具体的には図1の撮像装置100は、撮像部12031に適用することができる。撮像部12031に本開示に係る技術を適用することにより、固体撮像素子内の比較器の動作を安定させ、システムの信頼性を向上させることができる。
The above is an example of a vehicle control system to which the technique according to the present disclosure can be applied. The technique according to the present disclosure can be applied to, for example, the image pickup unit 12031 among the configurations described above. Specifically, the image pickup apparatus 100 of FIG. 1 can be applied to the image pickup unit 12031. By applying the technique according to the present disclosure to the image pickup unit 12031, it is possible to stabilize the operation of the comparator in the solid-state image pickup device and improve the reliability of the system.
<6.内視鏡手術システムへの応用例>
本開示に係る技術は、様々な製品へ応用することができる。例えば、本開示に係る技術は、内視鏡手術システムに適用されてもよい。 <6. Application example to endoscopic surgery system>
The technique according to the present disclosure can be applied to various products. For example, the techniques according to the present disclosure may be applied to an endoscopic surgery system.
本開示に係る技術は、様々な製品へ応用することができる。例えば、本開示に係る技術は、内視鏡手術システムに適用されてもよい。 <6. Application example to endoscopic surgery system>
The technique according to the present disclosure can be applied to various products. For example, the techniques according to the present disclosure may be applied to an endoscopic surgery system.
図15は、本開示に係る技術が適用され得る内視鏡手術システム5000の概略的な構成の一例を示す図である。図15では、術者(医師)5067が、内視鏡手術システム5000を用いて、患者ベッド5069上の患者5071に手術を行っている様子が図示されている。図示するように、内視鏡手術システム5000は、内視鏡5001と、その他の術具5017と、内視鏡5001を支持する支持アーム装置5027と、内視鏡下手術のための各種の装置が搭載されたカート5037と、から構成される。
FIG. 15 is a diagram showing an example of a schematic configuration of an endoscopic surgery system 5000 to which the technique according to the present disclosure can be applied. FIG. 15 illustrates a surgeon (doctor) 5067 performing surgery on patient 5071 on patient bed 5069 using the endoscopic surgery system 5000. As shown in the figure, the endoscopic surgery system 5000 includes an endoscope 5001, other surgical tools 5017, a support arm device 5027 for supporting the endoscope 5001, and various devices for endoscopic surgery. It is composed of a cart 5037 and a cart 5037.
内視鏡手術では、腹壁を切って開腹する代わりに、トロッカ5025a~5025dと呼ばれる筒状の開孔器具が腹壁に複数穿刺される。そして、トロッカ5025a~5025dから、内視鏡5001の鏡筒5003や、その他の術具5017が患者5071の体腔内に挿入される。図示する例では、その他の術具5017として、気腹チューブ5019、エネルギー処置具5021及び鉗子5023が、患者5071の体腔内に挿入されている。また、エネルギー処置具5021は、高周波電流や超音波振動により、組織の切開及び剥離、又は血管の封止等を行う処置具である。ただし、図示する術具5017はあくまで一例であり、術具5017としては、例えば攝子、レトラクタ等、一般的に内視鏡下手術において用いられる各種の術具が用いられてよい。
In endoscopic surgery, instead of cutting the abdominal wall to open the abdomen, multiple tubular opening devices called trocca 5025a to 5025d are punctured into the abdominal wall. Then, from the trocca 5025a to 5025d, the lens barrel 5003 of the endoscope 5001 and other surgical tools 5017 are inserted into the body cavity of the patient 5071. In the illustrated example, as other surgical tools 5017, a pneumoperitoneum tube 5019, an energy treatment tool 5021 and forceps 5023 are inserted into the body cavity of patient 5071. Further, the energy treatment tool 5021 is a treatment tool for incising and peeling a tissue, sealing a blood vessel, or the like by using a high frequency current or ultrasonic vibration. However, the surgical tool 5017 shown is only an example, and as the surgical tool 5017, various surgical tools generally used in endoscopic surgery such as a sword and a retractor may be used.
内視鏡5001によって撮影された患者5071の体腔内の術部の画像が、表示装置5041に表示される。術者5067は、表示装置5041に表示された術部の画像をリアルタイムで見ながら、エネルギー処置具5021や鉗子5023を用いて、例えば患部を切除する等の処置を行う。なお、図示は省略しているが、気腹チューブ5019、エネルギー処置具5021及び鉗子5023は、手術中に、術者5067又は助手等によって支持される。
The image of the surgical site in the body cavity of the patient 5071 taken by the endoscope 5001 is displayed on the display device 5041. The surgeon 5067 performs a procedure such as excising the affected area by using the energy treatment tool 5021 or the forceps 5023 while viewing the image of the surgical site displayed on the display device 5041 in real time. Although not shown, the pneumoperitoneum tube 5019, the energy treatment tool 5021, and the forceps 5023 are supported by the operator 5067, an assistant, or the like during the operation.
(支持アーム装置)
支持アーム装置5027は、ベース部5029から延伸するアーム部5031を備える。図示する例では、アーム部5031は、関節部5033a、5033b、5033c、及びリンク5035a、5035bから構成されており、アーム制御装置5045からの制御により駆動される。アーム部5031によって内視鏡5001が支持され、その位置及び姿勢が制御される。これにより、内視鏡5001の安定的な位置の固定が実現され得る。 (Support arm device)
Thesupport arm device 5027 includes an arm portion 5031 extending from the base portion 5029. In the illustrated example, the arm portion 5031 is composed of joint portions 5033a, 5033b, 5033c, and links 5035a, 5035b, and is driven by control from the arm control device 5045. The endoscope 5001 is supported by the arm portion 5031, and its position and posture are controlled. Thereby, the stable position fixing of the endoscope 5001 can be realized.
支持アーム装置5027は、ベース部5029から延伸するアーム部5031を備える。図示する例では、アーム部5031は、関節部5033a、5033b、5033c、及びリンク5035a、5035bから構成されており、アーム制御装置5045からの制御により駆動される。アーム部5031によって内視鏡5001が支持され、その位置及び姿勢が制御される。これにより、内視鏡5001の安定的な位置の固定が実現され得る。 (Support arm device)
The
(内視鏡)
内視鏡5001は、先端から所定の長さの領域が患者5071の体腔内に挿入される鏡筒5003と、鏡筒5003の基端に接続されるカメラヘッド5005と、から構成される。図示する例では、硬性の鏡筒5003を有するいわゆる硬性鏡として構成される内視鏡5001を図示しているが、内視鏡5001は、軟性の鏡筒5003を有するいわゆる軟性鏡として構成されてもよい。 (Endoscope)
Theendoscope 5001 is composed of a lens barrel 5003 in which a region having a predetermined length from the tip is inserted into the body cavity of the patient 5071, and a camera head 5005 connected to the base end of the lens barrel 5003. In the illustrated example, the endoscope 5001 configured as a so-called rigid mirror having a rigid barrel 5003 is illustrated, but the endoscope 5001 is configured as a so-called flexible mirror having a flexible barrel 5003. May be good.
内視鏡5001は、先端から所定の長さの領域が患者5071の体腔内に挿入される鏡筒5003と、鏡筒5003の基端に接続されるカメラヘッド5005と、から構成される。図示する例では、硬性の鏡筒5003を有するいわゆる硬性鏡として構成される内視鏡5001を図示しているが、内視鏡5001は、軟性の鏡筒5003を有するいわゆる軟性鏡として構成されてもよい。 (Endoscope)
The
鏡筒5003の先端には、対物レンズが嵌め込まれた開口部が設けられている。内視鏡5001には光源装置5043が接続されており、当該光源装置5043によって生成された光が、鏡筒5003の内部に延設されるライトガイドによって当該鏡筒の先端まで導光され、対物レンズを介して患者5071の体腔内の観察対象に向かって照射される。なお、内視鏡5001は、直視鏡であってもよいし、斜視鏡又は側視鏡であってもよい。
An opening in which an objective lens is fitted is provided at the tip of the lens barrel 5003. A light source device 5043 is connected to the endoscope 5001, and the light generated by the light source device 5043 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 5003, and is an objective. It is irradiated toward the observation target in the body cavity of the patient 5071 through the lens. The endoscope 5001 may be a direct endoscope, a perspective mirror, or a side endoscope.
カメラヘッド5005の内部には光学系及び撮像素子が設けられており、観察対象からの反射光(観察光)は当該光学系によって当該撮像素子に集光される。当該撮像素子によって観察光が光電変換され、観察光に対応する電気信号、すなわち観察像に対応する画像信号が生成される。当該画像信号は、RAWデータとしてカメラコントロールユニット(CCU:Camera Control Unit)5039に送信される。なお、カメラヘッド5005には、その光学系を適宜駆動させることにより、倍率及び焦点距離を調整する機能が搭載される。
An optical system and an image pickup element are provided inside the camera head 5005, and the reflected light (observation light) from the observation target is focused on the image pickup element by the optical system. The observation light is photoelectrically converted by the image pickup device, and an electric signal corresponding to the observation light, that is, an image signal corresponding to the observation image is generated. The image signal is transmitted to the camera control unit (CCU: Camera Control Unit) 5039 as RAW data. The camera head 5005 is equipped with a function of adjusting the magnification and the focal length by appropriately driving the optical system thereof.
なお、例えば立体視(3D表示)等に対応するために、カメラヘッド5005には撮像素子が複数設けられてもよい。この場合、鏡筒5003の内部には、当該複数の撮像素子のそれぞれに観察光を導光するために、リレー光学系が複数系統設けられる。
Note that, for example, in order to support stereoscopic viewing (3D display) and the like, the camera head 5005 may be provided with a plurality of image pickup elements. In this case, a plurality of relay optical systems are provided inside the lens barrel 5003 in order to guide the observation light to each of the plurality of image pickup elements.
(カートに搭載される各種の装置)
CCU5039は、CPU(Central Processing Unit)やGPU(Graphics Processing Unit)等によって構成され、内視鏡5001及び表示装置5041の動作を統括的に制御する。具体的には、CCU5039は、カメラヘッド5005から受け取った画像信号に対して、例えば現像処理(デモザイク処理)等の、当該画像信号に基づく画像を表示するための各種の画像処理を施す。CCU5039は、当該画像処理を施した画像信号を表示装置5041に提供する。また、CCU5039は、カメラヘッド5005に対して制御信号を送信し、その駆動を制御する。当該制御信号には、倍率や焦点距離等、撮像条件に関する情報が含まれ得る。 (Various devices mounted on the cart)
TheCCU 5039 is composed of a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), and the like, and comprehensively controls the operations of the endoscope 5001 and the display device 5041. Specifically, the CCU 5039 performs various image processing for displaying an image based on the image signal, such as a development process (demosaic process), on the image signal received from the camera head 5005. The CCU 5039 provides the image signal subjected to the image processing to the display device 5041. Further, the CCU 5039 transmits a control signal to the camera head 5005 and controls the driving thereof. The control signal may include information about imaging conditions such as magnification and focal length.
CCU5039は、CPU(Central Processing Unit)やGPU(Graphics Processing Unit)等によって構成され、内視鏡5001及び表示装置5041の動作を統括的に制御する。具体的には、CCU5039は、カメラヘッド5005から受け取った画像信号に対して、例えば現像処理(デモザイク処理)等の、当該画像信号に基づく画像を表示するための各種の画像処理を施す。CCU5039は、当該画像処理を施した画像信号を表示装置5041に提供する。また、CCU5039は、カメラヘッド5005に対して制御信号を送信し、その駆動を制御する。当該制御信号には、倍率や焦点距離等、撮像条件に関する情報が含まれ得る。 (Various devices mounted on the cart)
The
表示装置5041は、CCU5039からの制御により、当該CCU5039によって画像処理が施された画像信号に基づく画像を表示する。内視鏡5001が例えば4K(水平画素数3840×垂直画素数2160)又は8K(水平画素数7680×垂直画素数4320)等の高解像度の撮影に対応したものである場合、及び/又は3D表示に対応したものである場合には、表示装置5041としては、それぞれに対応して、高解像度の表示が可能なもの、及び/又は3D表示可能なものが用いられ得る。4K又は8K等の高解像度の撮影に対応したものである場合、表示装置5041として55インチ以上のサイズのものを用いることで一層の没入感が得られる。また、用途に応じて、解像度、サイズが異なる複数の表示装置5041が設けられてもよい。
The display device 5041 displays an image based on the image signal processed by the CCU 5039 under the control of the CCU 5039. When the endoscope 5001 is compatible with high-resolution shooting such as 4K (horizontal number of pixels 3840 x vertical pixel number 2160) or 8K (horizontal pixel number 7680 x vertical pixel number 4320), and / or 3D display. In the case of the display device 5041, a display device capable of displaying a high resolution and / or a device capable of displaying in 3D can be used corresponding to each of the display devices 5041. When a display device 5041 having a size of 55 inches or more is used for high-resolution shooting such as 4K or 8K, a further immersive feeling can be obtained. Further, a plurality of display devices 5041 having different resolutions and sizes may be provided depending on the application.
光源装置5043は、例えばLED(light emitting diode)等の光源から構成され、術部を撮影する際の照射光を内視鏡5001に供給する。
The light source device 5043 is composed of, for example, a light source such as an LED (light emission diode), and supplies irradiation light for photographing the surgical site to the endoscope 5001.
アーム制御装置5045は、例えばCPU等のプロセッサによって構成され、所定のプログラムに従って動作することにより、所定の制御方式に従って支持アーム装置5027のアーム部5031の駆動を制御する。
The arm control device 5045 is configured by a processor such as a CPU, and operates according to a predetermined program to control the drive of the arm portion 5031 of the support arm device 5027 according to a predetermined control method.
入力装置5047は、内視鏡手術システム5000に対する入力インタフェースである。ユーザは、入力装置5047を介して、内視鏡手術システム5000に対して各種の情報の入力や指示入力を行うことができる。例えば、ユーザは、入力装置5047を介して、患者の身体情報や、手術の術式についての情報等、手術に関する各種の情報を入力する。また、例えば、ユーザは、入力装置5047を介して、アーム部5031を駆動させる旨の指示や、内視鏡5001による撮像条件(照射光の種類、倍率及び焦点距離等)を変更する旨の指示、エネルギー処置具5021を駆動させる旨の指示等を入力する。
The input device 5047 is an input interface for the endoscopic surgery system 5000. The user can input various information and input instructions to the endoscopic surgery system 5000 via the input device 5047. For example, the user inputs various information related to the surgery, such as physical information of the patient and information about the surgical procedure, via the input device 5047. Further, for example, the user is instructed to drive the arm portion 5031 via the input device 5047, or is instructed to change the imaging conditions (type of irradiation light, magnification, focal length, etc.) by the endoscope 5001. , Instructions to drive the energy treatment tool 5021, etc. are input.
入力装置5047の種類は限定されず、入力装置5047は各種の公知の入力装置であってよい。入力装置5047としては、例えば、マウス、キーボード、タッチパネル、スイッチ、フットスイッチ5057及び/又はレバー等が適用され得る。入力装置5047としてタッチパネルが用いられる場合には、当該タッチパネルは表示装置5041の表示面上に設けられてもよい。
The type of the input device 5047 is not limited, and the input device 5047 may be various known input devices. As the input device 5047, for example, a mouse, a keyboard, a touch panel, a switch, a foot switch 5057 and / or a lever and the like can be applied. When a touch panel is used as the input device 5047, the touch panel may be provided on the display surface of the display device 5041.
あるいは、入力装置5047は、例えばメガネ型のウェアラブルデバイスやHMD(Head Mounted Display)等の、ユーザによって装着されるデバイスであり、これらのデバイスによって検出されるユーザのジェスチャや視線に応じて各種の入力が行われる。また、入力装置5047は、ユーザの動きを検出可能なカメラを含み、当該カメラによって撮像された映像から検出されるユーザのジェスチャや視線に応じて各種の入力が行われる。更に、入力装置5047は、ユーザの声を収音可能なマイクロフォンを含み、当該マイクロフォンを介して音声によって各種の入力が行われる。このように、入力装置5047が非接触で各種の情報を入力可能に構成されることにより、特に清潔域に属するユーザ(例えば術者5067)が、不潔域に属する機器を非接触で操作することが可能となる。また、ユーザは、所持している術具から手を離すことなく機器を操作することが可能となるため、ユーザの利便性が向上する。
Alternatively, the input device 5047 is a device worn by the user, such as a glasses-type wearable device or an HMD (Head Mounted Display), and various inputs are made according to the user's gesture and line of sight detected by these devices. Is done. Further, the input device 5047 includes a camera capable of detecting the movement of the user, and various inputs are performed according to the gesture and the line of sight of the user detected from the image captured by the camera. Further, the input device 5047 includes a microphone capable of picking up the voice of the user, and various inputs are performed by voice via the microphone. In this way, the input device 5047 is configured to be able to input various information in a non-contact manner, so that a user who belongs to a clean area (for example, an operator 5067) can operate a device belonging to the unclean area in a non-contact manner. Is possible. In addition, the user can operate the device without taking his / her hand off the surgical tool that he / she has, which improves the convenience of the user.
処置具制御装置5049は、組織の焼灼、切開又は血管の封止等のためのエネルギー処置具5021の駆動を制御する。気腹装置5051は、内視鏡5001による視野の確保及び術者の作業空間の確保の目的で、患者5071の体腔を膨らめるために、気腹チューブ5019を介して当該体腔内にガスを送り込む。レコーダ5053は、手術に関する各種の情報を記録可能な装置である。プリンタ5055は、手術に関する各種の情報を、テキスト、画像又はグラフ等各種の形式で印刷可能な装置である。
The treatment tool control device 5049 controls the drive of the energy treatment tool 5021 for cauterizing tissue, incising, sealing a blood vessel, or the like. The pneumoperitoneum device 5051 gas in the body cavity of the patient 5071 via the pneumoperitoneum tube 5019 in order to inflate the body cavity of the patient 5071 for the purpose of securing the field of view by the endoscope 5001 and securing the work space of the operator. Is sent. The recorder 5053 is a device capable of recording various information related to surgery. The printer 5055 is a device capable of printing various information related to surgery in various formats such as text, images, and graphs.
以下、内視鏡手術システム5000において特に特徴的な構成について、更に詳細に説明する。
Hereinafter, a particularly characteristic configuration of the endoscopic surgery system 5000 will be described in more detail.
(支持アーム装置)
支持アーム装置5027は、基台であるベース部5029と、ベース部5029から延伸するアーム部5031と、を備える。図示する例では、アーム部5031は、複数の関節部5033a、5033b、5033cと、関節部5033bによって連結される複数のリンク5035a、5035bと、から構成されているが、図15では、簡単のため、アーム部5031の構成を簡略化して図示している。実際には、アーム部5031が所望の自由度を有するように、関節部5033a~5033c及びリンク5035a、5035bの形状、数及び配置、並びに関節部5033a~5033cの回転軸の方向等が適宜設定され得る。例えば、アーム部5031は、好適に、6自由度以上の自由度を有するように構成され得る。これにより、アーム部5031の可動範囲内において内視鏡5001を自由に移動させることが可能になるため、所望の方向から内視鏡5001の鏡筒5003を患者5071の体腔内に挿入することが可能になる。 (Support arm device)
Thesupport arm device 5027 includes a base portion 5029 as a base and an arm portion 5031 extending from the base portion 5029. In the illustrated example, the arm portion 5031 is composed of a plurality of joint portions 5033a, 5033b, 5033c and a plurality of links 5035a, 5035b connected by the joint portions 5033b, but in FIG. 15, for the sake of simplicity. , The configuration of the arm portion 5031 is simplified and shown. Actually, the shapes, numbers and arrangements of the joint portions 5033a to 5033c and the links 5035a and 5035b, the direction of the rotation axis of the joint portions 5033a to 5033c, and the like are appropriately set so that the arm portion 5031 has a desired degree of freedom. obtain. For example, the arm portion 5031 may be preferably configured to have more than 6 degrees of freedom. As a result, the endoscope 5001 can be freely moved within the movable range of the arm portion 5031, so that the lens barrel 5003 of the endoscope 5001 can be inserted into the body cavity of the patient 5071 from a desired direction. It will be possible.
支持アーム装置5027は、基台であるベース部5029と、ベース部5029から延伸するアーム部5031と、を備える。図示する例では、アーム部5031は、複数の関節部5033a、5033b、5033cと、関節部5033bによって連結される複数のリンク5035a、5035bと、から構成されているが、図15では、簡単のため、アーム部5031の構成を簡略化して図示している。実際には、アーム部5031が所望の自由度を有するように、関節部5033a~5033c及びリンク5035a、5035bの形状、数及び配置、並びに関節部5033a~5033cの回転軸の方向等が適宜設定され得る。例えば、アーム部5031は、好適に、6自由度以上の自由度を有するように構成され得る。これにより、アーム部5031の可動範囲内において内視鏡5001を自由に移動させることが可能になるため、所望の方向から内視鏡5001の鏡筒5003を患者5071の体腔内に挿入することが可能になる。 (Support arm device)
The
関節部5033a~5033cにはアクチュエータが設けられており、関節部5033a~5033cは当該アクチュエータの駆動により所定の回転軸まわりに回転可能に構成されている。当該アクチュエータの駆動がアーム制御装置5045によって制御されることにより、各関節部5033a~5033cの回転角度が制御され、アーム部5031の駆動が制御される。これにより、内視鏡5001の位置及び姿勢の制御が実現され得る。この際、アーム制御装置5045は、力制御又は位置制御等、各種の公知の制御方式によってアーム部5031の駆動を制御することができる。
An actuator is provided in the joint portions 5033a to 5033c, and the joint portions 5033a to 5033c are configured to be rotatable around a predetermined rotation axis by driving the actuator. By controlling the drive of the actuator by the arm control device 5045, the rotation angles of the joint portions 5033a to 5033c are controlled, and the drive of the arm portion 5031 is controlled. Thereby, control of the position and posture of the endoscope 5001 can be realized. At this time, the arm control device 5045 can control the drive of the arm unit 5031 by various known control methods such as force control or position control.
例えば、術者5067が、入力装置5047(フットスイッチ5057を含む)を介して適宜操作入力を行うことにより、当該操作入力に応じてアーム制御装置5045によってアーム部5031の駆動が適宜制御され、内視鏡5001の位置及び姿勢が制御されてよい。当該制御により、アーム部5031の先端の内視鏡5001を任意の位置から任意の位置まで移動させた後、その移動後の位置で固定的に支持することができる。なお、アーム部5031は、いわゆるマスタースレイブ方式で操作されてもよい。この場合、アーム部5031は、手術室から離れた場所に設置される入力装置5047を介してユーザによって遠隔操作され得る。
For example, when the operator 5067 appropriately inputs an operation via the input device 5047 (including the foot switch 5057), the drive of the arm unit 5031 is appropriately controlled by the arm control device 5045 according to the operation input. The position and orientation of the endoscope 5001 may be controlled. By this control, the endoscope 5001 at the tip of the arm portion 5031 can be moved from an arbitrary position to an arbitrary position, and then fixedly supported at the moved position. The arm portion 5031 may be operated by a so-called master slave method. In this case, the arm portion 5031 can be remotely controlled by the user via an input device 5047 installed at a location away from the operating room.
また、力制御が適用される場合には、アーム制御装置5045は、ユーザからの外力を受け、その外力にならってスムーズにアーム部5031が移動するように、各関節部5033a~5033cのアクチュエータを駆動させる、いわゆるパワーアシスト制御を行ってもよい。これにより、ユーザが直接アーム部5031に触れながらアーム部5031を移動させる際に、比較的軽い力で当該アーム部5031を移動させることができる。従って、より直感的に、より簡易な操作で内視鏡5001を移動させることが可能となり、ユーザの利便性を向上させることができる。
When force control is applied, the arm control device 5045 receives an external force from the user, and the actuators of the joint portions 5033a to 5033c are arranged so that the arm portion 5031 moves smoothly according to the external force. So-called power assist control for driving may be performed. As a result, when the user moves the arm portion 5031 while directly touching the arm portion 5031, the arm portion 5031 can be moved with a relatively light force. Therefore, the endoscope 5001 can be moved more intuitively and with a simpler operation, and the convenience of the user can be improved.
ここで、一般的に、内視鏡下手術では、スコピストと呼ばれる医師によって内視鏡5001が支持されていた。これに対して、支持アーム装置5027を用いることにより、人手によらずに内視鏡5001の位置をより確実に固定することが可能になるため、術部の画像を安定的に得ることができ、手術を円滑に行うことが可能になる。
Here, in general, in endoscopic surgery, the endoscope 5001 was supported by a doctor called a scopist. On the other hand, by using the support arm device 5027, the position of the endoscope 5001 can be more reliably fixed without human intervention, so that an image of the surgical site can be stably obtained. , It becomes possible to perform surgery smoothly.
なお、アーム制御装置5045は必ずしもカート5037に設けられなくてもよい。また、アーム制御装置5045は必ずしも1つの装置でなくてもよい。例えば、アーム制御装置5045は、支持アーム装置5027のアーム部5031の各関節部5033a~5033cにそれぞれ設けられてもよく、複数のアーム制御装置5045が互いに協働することにより、アーム部5031の駆動制御が実現されてもよい。
The arm control device 5045 does not necessarily have to be provided on the cart 5037. Further, the arm control device 5045 does not necessarily have to be one device. For example, the arm control device 5045 may be provided at each of the joint portions 5033a to 5033c of the arm portion 5031 of the support arm device 5027, and the plurality of arm control devices 5045 cooperate with each other to drive the arm portion 5031. Control may be realized.
(光源装置)
光源装置5043は、内視鏡5001に術部を撮影する際の照射光を供給する。光源装置5043は、例えばLED、レーザ光源又はこれらの組み合わせによって構成される白色光源から構成される。このとき、RGBレーザ光源の組み合わせにより白色光源が構成される場合には、各色(各波長)の出力強度及び出力タイミングを高精度に制御することができるため、光源装置5043において撮像画像のホワイトバランスの調整を行うことができる。また、この場合には、RGBレーザ光源それぞれからのレーザ光を時分割で観察対象に照射し、その照射タイミングに同期してカメラヘッド5005の撮像素子の駆動を制御することにより、RGBそれぞれに対応した画像を時分割で撮像することも可能である。当該方法によれば、当該撮像素子にカラーフィルタを設けなくても、カラー画像を得ることができる。 (Light source device)
Thelight source device 5043 supplies the endoscope 5001 with irradiation light for photographing the surgical site. The light source device 5043 is composed of, for example, an LED, a laser light source, or a white light source composed of a combination thereof. At this time, when the white light source is configured by the combination of the RGB laser light sources, the output intensity and the output timing of each color (each wavelength) can be controlled with high accuracy, so that the white balance of the captured image in the light source device 5043 can be controlled. Can be adjusted. Further, in this case, the laser light from each of the RGB laser light sources is irradiated to the observation target in a time-division manner, and the drive of the image sensor of the camera head 5005 is controlled in synchronization with the irradiation timing to correspond to each of RGB. It is also possible to capture the image in a time-division manner. According to this method, a color image can be obtained without providing a color filter in the image pickup device.
光源装置5043は、内視鏡5001に術部を撮影する際の照射光を供給する。光源装置5043は、例えばLED、レーザ光源又はこれらの組み合わせによって構成される白色光源から構成される。このとき、RGBレーザ光源の組み合わせにより白色光源が構成される場合には、各色(各波長)の出力強度及び出力タイミングを高精度に制御することができるため、光源装置5043において撮像画像のホワイトバランスの調整を行うことができる。また、この場合には、RGBレーザ光源それぞれからのレーザ光を時分割で観察対象に照射し、その照射タイミングに同期してカメラヘッド5005の撮像素子の駆動を制御することにより、RGBそれぞれに対応した画像を時分割で撮像することも可能である。当該方法によれば、当該撮像素子にカラーフィルタを設けなくても、カラー画像を得ることができる。 (Light source device)
The
また、光源装置5043は、出力する光の強度を所定の時間ごとに変更するようにその駆動が制御されてもよい。その光の強度の変更のタイミングに同期してカメラヘッド5005の撮像素子の駆動を制御して時分割で画像を取得し、その画像を合成することにより、いわゆる黒つぶれ及び白とびのない高ダイナミックレンジの画像を生成することができる。
Further, the drive of the light source device 5043 may be controlled so as to change the intensity of the output light at predetermined time intervals. By controlling the drive of the image sensor of the camera head 5005 in synchronization with the timing of the change of the light intensity to acquire an image in time division and synthesizing the image, so-called high dynamic without blackout and overexposure. Range images can be generated.
また、光源装置5043は、特殊光観察に対応した所定の波長帯域の光を供給可能に構成されてもよい。特殊光観察では、例えば、体組織における光の吸収の波長依存性を利用して、通常の観察時における照射光(すなわち、白色光)に比べて狭帯域の光を照射することにより、粘膜表層の血管等の所定の組織を高コントラストで撮影する、いわゆる狭帯域光観察(Narrow Band Imaging)が行われる。あるいは、特殊光観察では、励起光を照射することにより発生する蛍光により画像を得る蛍光観察が行われてもよい。蛍光観察では、体組織に励起光を照射し当該体組織からの蛍光を観察するもの(自家蛍光観察)、又はインドシアニングリーン(ICG)等の試薬を体組織に局注するとともに当該体組織にその試薬の蛍光波長に対応した励起光を照射し蛍光像を得るもの等が行われ得る。光源装置5043は、このような特殊光観察に対応した狭帯域光及び/又は励起光を供給可能に構成され得る。
Further, the light source device 5043 may be configured to be able to supply light in a predetermined wavelength band corresponding to special light observation. In special light observation, for example, by utilizing the wavelength dependence of light absorption in body tissue, the surface layer of the mucous membrane is irradiated with light in a narrower band than the irradiation light (that is, white light) during normal observation. So-called narrow band imaging, in which a predetermined tissue such as a blood vessel is photographed with high contrast, is performed. Alternatively, in special light observation, fluorescence observation may be performed in which an image is obtained by fluorescence generated by irradiating with excitation light. In fluorescence observation, the body tissue is irradiated with excitation light to observe the fluorescence from the body tissue (autofluorescence observation), or a reagent such as indocyanine green (ICG) is locally injected into the body tissue and the body tissue is injected. It is possible to obtain a fluorescence image by irradiating the excitation light corresponding to the fluorescence wavelength of the reagent. The light source device 5043 may be configured to be capable of supplying narrowband light and / or excitation light corresponding to such special light observation.
(カメラヘッド及びCCU)
図16を参照して、内視鏡5001のカメラヘッド5005及びCCU5039の機能についてより詳細に説明する。図16は、図15に示すカメラヘッド5005及びCCU5039の機能構成の一例を示すブロック図である。 (Camera head and CCU)
The functions of thecamera head 5005 and the CCU 5039 of the endoscope 5001 will be described in more detail with reference to FIG. FIG. 16 is a block diagram showing an example of the functional configuration of the camera head 5005 and CCU5039 shown in FIG.
図16を参照して、内視鏡5001のカメラヘッド5005及びCCU5039の機能についてより詳細に説明する。図16は、図15に示すカメラヘッド5005及びCCU5039の機能構成の一例を示すブロック図である。 (Camera head and CCU)
The functions of the
図16を参照すると、カメラヘッド5005は、その機能として、レンズユニット5007と、撮像部5009と、駆動部5011と、通信部5013と、カメラヘッド制御部5015と、を有する。また、CCU5039は、その機能として、通信部5059と、画像処理部5061と、制御部5063と、を有する。カメラヘッド5005とCCU5039とは、伝送ケーブル5065によって双方向に通信可能に接続されている。
Referring to FIG. 16, the camera head 5005 has a lens unit 5007, an image pickup unit 5009, a drive unit 5011, a communication unit 5013, and a camera head control unit 5015 as its functions. Further, the CCU 5039 has a communication unit 5059, an image processing unit 5061, and a control unit 5063 as its functions. The camera head 5005 and the CCU 5039 are bidirectionally connected by a transmission cable 5065 so as to be communicable.
まず、カメラヘッド5005の機能構成について説明する。レンズユニット5007は、鏡筒5003との接続部に設けられる光学系である。鏡筒5003の先端から取り込まれた観察光は、カメラヘッド5005まで導光され、当該レンズユニット5007に入射する。レンズユニット5007は、ズームレンズ及びフォーカスレンズを含む複数のレンズが組み合わされて構成される。レンズユニット5007は、撮像部5009の撮像素子の受光面上に観察光を集光するように、その光学特性が調整されている。また、ズームレンズ及びフォーカスレンズは、撮像画像の倍率及び焦点の調整のため、その光軸上の位置が移動可能に構成される。
First, the functional configuration of the camera head 5005 will be described. The lens unit 5007 is an optical system provided at a connection portion with the lens barrel 5003. The observation light taken in from the tip of the lens barrel 5003 is guided to the camera head 5005 and incident on the lens unit 5007. The lens unit 5007 is configured by combining a plurality of lenses including a zoom lens and a focus lens. The optical characteristics of the lens unit 5007 are adjusted so as to collect the observation light on the light receiving surface of the image pickup element of the image pickup unit 5009. Further, the zoom lens and the focus lens are configured so that their positions on the optical axis can be moved in order to adjust the magnification and the focus of the captured image.
撮像部5009は撮像素子によって構成され、レンズユニット5007の後段に配置される。レンズユニット5007を通過した観察光は、当該撮像素子の受光面に集光され、光電変換によって、観察像に対応した画像信号が生成される。撮像部5009によって生成された画像信号は、通信部5013に提供される。
The image pickup unit 5009 is composed of an image pickup element and is arranged after the lens unit 5007. The observation light that has passed through the lens unit 5007 is focused on the light receiving surface of the image pickup device, and an image signal corresponding to the observation image is generated by photoelectric conversion. The image signal generated by the image pickup unit 5009 is provided to the communication unit 5013.
撮像部5009を構成する撮像素子としては、例えばCMOS(Complementary Metal Oxide Semiconductor)タイプのイメージセンサであり、Bayer配列を有するカラー撮影可能なものが用いられる。なお、当該撮像素子としては、例えば4K以上の高解像度の画像の撮影に対応可能なものが用いられてもよい。術部の画像が高解像度で得られることにより、術者5067は、当該術部の様子をより詳細に把握することができ、手術をより円滑に進行することが可能となる。
As the image sensor constituting the image pickup unit 5009, for example, a CMOS (Complementary Metal Oxide Semiconductor) type image sensor having a Bayer array and capable of color photographing is used. As the image pickup device, for example, an image pickup device capable of capturing a high-resolution image of 4K or higher may be used. By obtaining the image of the surgical site with high resolution, the surgeon 5067 can grasp the state of the surgical site in more detail, and the operation can proceed more smoothly.
また、撮像部5009を構成する撮像素子は、3D表示に対応する右目用及び左目用の画像信号をそれぞれ取得するための1対の撮像素子を有するように構成される。3D表示が行われることにより、術者5067は術部における生体組織の奥行きをより正確に把握することが可能になる。なお、撮像部5009が多板式で構成される場合には、各撮像素子に対応して、レンズユニット5007も複数系統設けられる。
Further, the image pickup elements constituting the image pickup unit 5009 are configured to have a pair of image pickup elements for acquiring image signals for the right eye and the left eye corresponding to 3D display, respectively. The 3D display enables the surgeon 5067 to more accurately grasp the depth of the living tissue in the surgical site. When the image pickup unit 5009 is composed of a multi-plate type, a plurality of lens units 5007 are also provided corresponding to each image pickup element.
また、撮像部5009は、必ずしもカメラヘッド5005に設けられなくてもよい。例えば、撮像部5009は、鏡筒5003の内部に、対物レンズの直後に設けられてもよい。
Further, the image pickup unit 5009 does not necessarily have to be provided on the camera head 5005. For example, the image pickup unit 5009 may be provided inside the lens barrel 5003 immediately after the objective lens.
駆動部5011は、アクチュエータによって構成され、カメラヘッド制御部5015からの制御により、レンズユニット5007のズームレンズ及びフォーカスレンズを光軸に沿って所定の距離だけ移動させる。これにより、撮像部5009による撮像画像の倍率及び焦点が適宜調整され得る。
The drive unit 5011 is composed of an actuator, and the zoom lens and the focus lens of the lens unit 5007 are moved by a predetermined distance along the optical axis under the control of the camera head control unit 5015. As a result, the magnification and focus of the image captured by the image pickup unit 5009 can be adjusted as appropriate.
通信部5013は、CCU5039との間で各種の情報を送受信するための通信装置によって構成される。通信部5013は、撮像部5009から得た画像信号をRAWデータとして伝送ケーブル5065を介してCCU5039に送信する。この際、術部の撮像画像を低レイテンシで表示するために、当該画像信号は光通信によって送信されることが好ましい。手術の際には、術者5067が撮像画像によって患部の状態を観察しながら手術を行うため、より安全で確実な手術のためには、術部の動画像が可能な限りリアルタイムに表示されることが求められるからである。光通信が行われる場合には、通信部5013には、電気信号を光信号に変換する光電変換モジュールが設けられる。画像信号は当該光電変換モジュールによって光信号に変換された後、伝送ケーブル5065を介してCCU5039に送信される。
The communication unit 5013 is composed of a communication device for transmitting and receiving various information to and from the CCU 5039. The communication unit 5013 transmits the image signal obtained from the image pickup unit 5009 as RAW data to the CCU 5039 via the transmission cable 5065. At this time, in order to display the captured image of the surgical site with low latency, it is preferable that the image signal is transmitted by optical communication. At the time of surgery, the surgeon 5067 performs the surgery while observing the condition of the affected area with the captured image, so for safer and more reliable surgery, the moving image of the surgical site is displayed in real time as much as possible. This is because it is required. When optical communication is performed, the communication unit 5013 is provided with a photoelectric conversion module that converts an electric signal into an optical signal. The image signal is converted into an optical signal by the photoelectric conversion module, and then transmitted to the CCU 5039 via the transmission cable 5065.
また、通信部5013は、CCU5039から、カメラヘッド5005の駆動を制御するための制御信号を受信する。当該制御信号には、例えば、撮像画像のフレームレートを指定する旨の情報、撮像時の露出値を指定する旨の情報、並びに/又は撮像画像の倍率及び焦点を指定する旨の情報等、撮像条件に関する情報が含まれる。通信部5013は、受信した制御信号をカメラヘッド制御部5015に提供する。なお、CCU5039からの制御信号も、光通信によって伝送されてもよい。この場合、通信部5013には、光信号を電気信号に変換する光電変換モジュールが設けられ、制御信号は当該光電変換モジュールによって電気信号に変換された後、カメラヘッド制御部5015に提供される。
Further, the communication unit 5013 receives a control signal for controlling the drive of the camera head 5005 from the CCU 5039. The control signal includes, for example, information to specify the frame rate of the captured image, information to specify the exposure value at the time of imaging, and / or information to specify the magnification and focus of the captured image. Contains information about the condition. The communication unit 5013 provides the received control signal to the camera head control unit 5015. The control signal from the CCU 5039 may also be transmitted by optical communication. In this case, the communication unit 5013 is provided with a photoelectric conversion module that converts an optical signal into an electric signal, and the control signal is converted into an electric signal by the photoelectric conversion module and then provided to the camera head control unit 5015.
なお、上記のフレームレートや露出値、倍率、焦点等の撮像条件は、取得された画像信号に基づいてCCU5039の制御部5063によって自動的に設定される。つまり、いわゆるAE(Auto Exposure)機能、AF(Auto Focus)機能及びAWB(Auto White Balance)機能が内視鏡5001に搭載される。
The image pickup conditions such as the frame rate, exposure value, magnification, and focus are automatically set by the control unit 5063 of the CCU 5039 based on the acquired image signal. That is, the so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function are mounted on the endoscope 5001.
カメラヘッド制御部5015は、通信部5013を介して受信したCCU5039からの制御信号に基づいて、カメラヘッド5005の駆動を制御する。例えば、カメラヘッド制御部5015は、撮像画像のフレームレートを指定する旨の情報及び/又は撮像時の露光を指定する旨の情報に基づいて、撮像部5009の撮像素子の駆動を制御する。また、例えば、カメラヘッド制御部5015は、撮像画像の倍率及び焦点を指定する旨の情報に基づいて、駆動部5011を介してレンズユニット5007のズームレンズ及びフォーカスレンズを適宜移動させる。カメラヘッド制御部5015は、更に、鏡筒5003やカメラヘッド5005を識別するための情報を記憶する機能を備えてもよい。
The camera head control unit 5015 controls the drive of the camera head 5005 based on the control signal from the CCU 5039 received via the communication unit 5013. For example, the camera head control unit 5015 controls the drive of the image pickup element of the image pickup unit 5009 based on the information to specify the frame rate of the image pickup image and / or the information to specify the exposure at the time of image pickup. Further, for example, the camera head control unit 5015 appropriately moves the zoom lens and the focus lens of the lens unit 5007 via the drive unit 5011 based on the information that the magnification and the focus of the captured image are specified. The camera head control unit 5015 may further have a function of storing information for identifying the lens barrel 5003 and the camera head 5005.
なお、レンズユニット5007や撮像部5009等の構成を、気密性及び防水性が高い密閉構造内に配置することで、カメラヘッド5005について、オートクレーブ滅菌処理に対する耐性を持たせることができる。
By arranging the configuration of the lens unit 5007, the image pickup unit 5009, and the like in a sealed structure having high airtightness and waterproofness, the camera head 5005 can be made resistant to autoclave sterilization.
次に、CCU5039の機能構成について説明する。通信部5059は、カメラヘッド5005との間で各種の情報を送受信するための通信装置によって構成される。通信部5059は、カメラヘッド5005から、伝送ケーブル5065を介して送信される画像信号を受信する。この際、上記のように、当該画像信号は好適に光通信によって送信され得る。この場合、光通信に対応して、通信部5059には、光信号を電気信号に変換する光電変換モジュールが設けられる。通信部5059は、電気信号に変換した画像信号を画像処理部5061に提供する。
Next, the functional configuration of CCU5039 will be described. The communication unit 5059 is configured by a communication device for transmitting and receiving various information to and from the camera head 5005. The communication unit 5059 receives an image signal transmitted from the camera head 5005 via the transmission cable 5065. At this time, as described above, the image signal can be suitably transmitted by optical communication. In this case, corresponding to optical communication, the communication unit 5059 is provided with a photoelectric conversion module that converts an optical signal into an electric signal. The communication unit 5059 provides the image processing unit 5061 with an image signal converted into an electric signal.
また、通信部5059は、カメラヘッド5005に対して、カメラヘッド5005の駆動を制御するための制御信号を送信する。当該制御信号も光通信によって送信されてよい。
Further, the communication unit 5059 transmits a control signal for controlling the drive of the camera head 5005 to the camera head 5005. The control signal may also be transmitted by optical communication.
画像処理部5061は、カメラヘッド5005から送信されたRAWデータである画像信号に対して各種の画像処理を施す。当該画像処理としては、例えば現像処理、高画質化処理(帯域強調処理、超解像処理、NR(Noise reduction)処理及び/又は手ブレ補正処理等)、並びに/又は拡大処理(電子ズーム処理)等、各種の公知の信号処理が含まれる。また、画像処理部5061は、AE、AF及びAWBを行うための、画像信号に対する検波処理を行う。
The image processing unit 5061 performs various image processing on the image signal which is the RAW data transmitted from the camera head 5005. The image processing includes, for example, development processing, high image quality processing (band enhancement processing, super-resolution processing, NR (Noise reduction) processing and / or camera shake correction processing, etc.), and / or enlargement processing (electronic zoom processing). Etc., various known signal processing is included. In addition, the image processing unit 5061 performs detection processing on the image signal for performing AE, AF, and AWB.
画像処理部5061は、CPUやGPU等のプロセッサによって構成され、当該プロセッサが所定のプログラムに従って動作することにより、上述した画像処理や検波処理が行われ得る。なお、画像処理部5061が複数のGPUによって構成される場合には、画像処理部5061は、画像信号に係る情報を適宜分割し、これら複数のGPUによって並列的に画像処理を行う。
The image processing unit 5061 is composed of a processor such as a CPU or GPU, and the processor operates according to a predetermined program, so that the above-mentioned image processing and detection processing can be performed. When the image processing unit 5061 is composed of a plurality of GPUs, the image processing unit 5061 appropriately divides the information related to the image signal and performs image processing in parallel by the plurality of GPUs.
制御部5063は、内視鏡5001による術部の撮像、及びその撮像画像の表示に関する各種の制御を行う。例えば、制御部5063は、カメラヘッド5005の駆動を制御するための制御信号を生成する。この際、撮像条件がユーザによって入力されている場合には、制御部5063は、当該ユーザによる入力に基づいて制御信号を生成する。あるいは、内視鏡5001にAE機能、AF機能及びAWB機能が搭載されている場合には、制御部5063は、画像処理部5061による検波処理の結果に応じて、最適な露出値、焦点距離及びホワイトバランスを適宜算出し、制御信号を生成する。
The control unit 5063 performs various controls regarding the imaging of the surgical site by the endoscope 5001 and the display of the captured image. For example, the control unit 5063 generates a control signal for controlling the drive of the camera head 5005. At this time, when the imaging condition is input by the user, the control unit 5063 generates a control signal based on the input by the user. Alternatively, when the endoscope 5001 is equipped with an AE function, an AF function, and an AWB function, the control unit 5063 has an optimum exposure value, a focal length, and an optimum exposure value according to the result of detection processing by the image processing unit 5061. The white balance is calculated appropriately and a control signal is generated.
また、制御部5063は、画像処理部5061によって画像処理が施された画像信号に基づいて、術部の画像を表示装置5041に表示させる。この際、制御部5063は、各種の画像認識技術を用いて術部画像内における各種の物体を認識する。例えば、制御部5063は、術部画像に含まれる物体のエッジの形状や色等を検出することにより、鉗子等の術具、特定の生体部位、出血、エネルギー処置具5021使用時のミスト等を認識することができる。制御部5063は、表示装置5041に術部の画像を表示させる際に、その認識結果を用いて、各種の手術支援情報を当該術部の画像に重畳表示させる。手術支援情報が重畳表示され、術者5067に提示されることにより、より安全かつ確実に手術を進めることが可能になる。
Further, the control unit 5063 causes the display device 5041 to display the image of the surgical unit based on the image signal processed by the image processing unit 5061. At this time, the control unit 5063 recognizes various objects in the surgical unit image by using various image recognition techniques. For example, the control unit 5063 detects a surgical tool such as forceps, a specific biological part, bleeding, a mist when using the energy treatment tool 5021, etc. by detecting the shape, color, etc. of the edge of the object included in the surgical site image. Can be recognized. When displaying the image of the surgical site on the display device 5041, the control unit 5063 uses the recognition result to superimpose and display various surgical support information on the image of the surgical site. By superimposing the surgery support information and presenting it to the surgeon 5067, it becomes possible to proceed with the surgery more safely and surely.
カメラヘッド5005及びCCU5039を接続する伝送ケーブル5065は、電気信号の通信に対応した電気信号ケーブル、光通信に対応した光ファイバ、又はこれらの複合ケーブルである。
The transmission cable 5065 connecting the camera head 5005 and the CCU 5039 is an electric signal cable compatible with electric signal communication, an optical fiber compatible with optical communication, or a composite cable thereof.
ここで、図示する例では、伝送ケーブル5065を用いて有線で通信が行われていたが、カメラヘッド5005とCCU5039との間の通信は無線で行われてもよい。両者の間の通信が無線で行われる場合には、伝送ケーブル5065を手術室内に敷設する必要がなくなるため、手術室内における医療スタッフの移動が当該伝送ケーブル5065によって妨げられる事態が解消され得る。
Here, in the illustrated example, the communication is performed by wire using the transmission cable 5065, but the communication between the camera head 5005 and the CCU 5039 may be performed wirelessly. When the communication between the two is performed wirelessly, it is not necessary to lay the transmission cable 5065 in the operating room, so that the situation where the movement of the medical staff in the operating room is hindered by the transmission cable 5065 can be solved.
以上、本開示に係る技術が適用され得る内視鏡手術システム5000の一例について説明した。なお、ここでは、一例として内視鏡手術システム5000について説明したが、本開示に係る技術が適用され得るシステムはかかる例に限定されない。例えば、本開示に係る技術は、検査用軟性内視鏡システムや顕微鏡手術システムに適用されてもよい。
The above is an example of an endoscopic surgery system 5000 to which the technique according to the present disclosure can be applied. Although the endoscopic surgery system 5000 has been described here as an example, the system to which the technique according to the present disclosure can be applied is not limited to such an example. For example, the techniques according to the present disclosure may be applied to a flexible endoscopic system for examination or a microsurgery system.
本開示に係る技術は、以上説明した構成のうち、撮像部5009に好適に適用され得る。具体的には、図1の撮像装置100は、撮像部5009に適用することができる。撮像部5009に本開示に係る技術を適用することにより、固体撮像素子内の比較器の動作を安定させ、システムの信頼性を向上させる。
The technique according to the present disclosure can be suitably applied to the imaging unit 5009 among the configurations described above. Specifically, the image pickup apparatus 100 of FIG. 1 can be applied to the image pickup unit 5009. By applying the technique according to the present disclosure to the image pickup unit 5009, the operation of the comparator in the solid-state image pickup device is stabilized, and the reliability of the system is improved.
なお、上述の実施の形態は本技術を具現化するための一例を示したものであり、実施の形態における事項と、特許請求の範囲における発明特定事項とはそれぞれ対応関係を有する。同様に、特許請求の範囲における発明特定事項と、これと同一名称を付した本技術の実施の形態における事項とはそれぞれ対応関係を有する。ただし、本技術は実施の形態に限定されるものではなく、その要旨を逸脱しない範囲において実施の形態に種々の変形を施すことにより具現化することができる。
It should be noted that the above-described embodiment shows an example for embodying the present technology, and the matters in the embodiment and the matters specifying the invention within the scope of claims have a corresponding relationship with each other. Similarly, the matters specifying the invention within the scope of claims and the matters in the embodiment of the present technology having the same name have a corresponding relationship with each other. However, the present technique is not limited to the embodiment, and can be embodied by applying various modifications to the embodiment without departing from the gist thereof.
なお、本明細書に記載された効果はあくまで例示であって、限定されるものではなく、また、他の効果があってもよい。
It should be noted that the effects described in the present specification are merely examples and are not limited, and other effects may be obtained.
なお、本技術は以下のような構成もとることができる。
(1)入力電圧と所定の参照電圧との差分を増幅する一対の差動トランジスタと、
前記一対の差動トランジスタの一方のゲートおよびドレインの間の経路を開閉するオートゼロトランジスタと、
プロセスのばらつきによる変動量が前記差動トランジスタのゲート-ソース間電圧の変動量と略同一のオートゼロ電位を生成して前記一対の差動トランジスタの他方のゲートに供給するオートゼロ電位生成回路と
を具備する固体撮像素子。
(2)前記オートゼロトランジスタは、pMOS(p-channel Metal Oxide Semiconductor)トランジスタであり、
前記一対の差動トランジスタは、nMOS(n-channel MOS)トランジスタであり、
前記オートゼロ電位生成回路は、
オン状態の外部pMOSトランジスタと、
オン状態の外部nMOSトランジスタと、
前記外部pMOSトランジスタおよび前記外部nMOSトランジスタに電流を供給する外部カレントミラートランジスタと
を含む
前記(1)記載の固体撮像素子。
(3)前記オートゼロトランジスタと前記一対の差動トランジスタとは、nMOSトランジスタであり、
前記オートゼロ電位生成回路は、
オン状態の外部nMOSトランジスタと、
前記外部nMOSトランジスタに電流を供給する外部カレントミラートランジスタと
を含む
前記(1)記載の固体撮像素子。
(4)カレントミラー回路と、
前記一対の差動トランジスタと前記カレントミラー回路との間に挿入された一対のカスコードトランジスタと
をさらに具備し、
前記オートゼロ電位生成回路は、前記一対のカスコードトランジスタの一方を所定のオートゼロ期間内にオン状態に制御する
前記(1)から(3)のいずれかに記載の固体撮像素子。
(5)二次元格子状に複数の画素が配列された画素アレイ部をさらに具備し、
前記一対の差動トランジスタと、前記オートゼロトランジスタとを含む比較器は、前記画素アレイ部の列ごとに配置される
前記(1)から(4)のいずれかに記載の固体撮像素子。
(6)前記オートゼロ電位生成回路は、前記列ごとに配置される
前記(5)記載の固体撮像素子。
(7)前記オートゼロ電位生成回路は、複数の列のそれぞれの比較器により共有される
前記(5)記載の固体撮像素子。
(8)入力電圧と所定の参照電圧との差分を増幅して画素信号として出力する一対の差動トランジスタと、
前記一対の差動トランジスタの一方のゲートおよびドレインの間の経路を開閉するオートゼロトランジスタと、
プロセスのばらつきによる変動量が前記差動トランジスタのゲート-ソース間の変動量と略同一のオートゼロ電位を生成して前記一対の差動トランジスタの他方のゲートに供給するオートゼロ電位生成回路と、
前記画素信号を配列した画像データを処理する信号処理回路と
を具備する撮像装置。 The present technology can have the following configurations.
(1) A pair of differential transistors that amplify the difference between the input voltage and a predetermined reference voltage, and
An auto-zero transistor that opens and closes the path between one gate and drain of the pair of differential transistors,
Equipped with an auto-zero potential generation circuit that generates an auto-zero potential whose fluctuation amount due to process variation is substantially the same as the fluctuation amount of the gate-source voltage of the differential transistor and supplies it to the other gate of the pair of differential transistors. Solid-state imaging device.
(2) The auto-zero transistor is a pMOS (p-channel Metal Oxide Semiconductor) transistor.
The pair of differential transistors are nMOS (n-channel MOS) transistors.
The auto-zero potential generation circuit is
With an external pMOS transistor in the ON state,
An external nMOS transistor in the ON state and
The solid-state image pickup device according to (1) above, which includes the external pMOS transistor and an external current mirror transistor that supplies a current to the external nMOS transistor.
(3) The auto-zero transistor and the pair of differential transistors are nMOS transistors.
The auto-zero potential generation circuit is
An external nMOS transistor in the ON state and
The solid-state image pickup device according to (1) above, which includes an external current mirror transistor that supplies a current to the external nMOS transistor.
(4) Current mirror circuit and
Further, a pair of cascode transistors inserted between the pair of differential transistors and the current mirror circuit is provided.
The solid-state image pickup device according to any one of (1) to (3) above, wherein the auto-zero potential generation circuit controls one of the pair of cascode transistors to be turned on within a predetermined auto-zero period.
(5) A pixel array unit in which a plurality of pixels are arranged in a two-dimensional lattice is further provided.
The solid-state image pickup device according to any one of (1) to (4), wherein the comparator including the pair of differential transistors and the auto-zero transistor is arranged for each row of the pixel array unit.
(6) The solid-state image pickup device according to (5) above, wherein the auto-zero potential generation circuit is arranged in each row.
(7) The solid-state imaging device according to (5) above, wherein the auto-zero potential generation circuit is shared by each comparator in a plurality of rows.
(8) A pair of differential transistors that amplify the difference between the input voltage and the predetermined reference voltage and output it as a pixel signal.
An auto-zero transistor that opens and closes the path between one gate and drain of the pair of differential transistors,
An auto-zero potential generation circuit that generates an auto-zero potential whose fluctuation amount due to process variation is substantially the same as the fluctuation amount between the gate and source of the differential transistor and supplies it to the other gate of the pair of differential transistors.
An image pickup apparatus including a signal processing circuit for processing image data in which pixel signals are arranged.
(1)入力電圧と所定の参照電圧との差分を増幅する一対の差動トランジスタと、
前記一対の差動トランジスタの一方のゲートおよびドレインの間の経路を開閉するオートゼロトランジスタと、
プロセスのばらつきによる変動量が前記差動トランジスタのゲート-ソース間電圧の変動量と略同一のオートゼロ電位を生成して前記一対の差動トランジスタの他方のゲートに供給するオートゼロ電位生成回路と
を具備する固体撮像素子。
(2)前記オートゼロトランジスタは、pMOS(p-channel Metal Oxide Semiconductor)トランジスタであり、
前記一対の差動トランジスタは、nMOS(n-channel MOS)トランジスタであり、
前記オートゼロ電位生成回路は、
オン状態の外部pMOSトランジスタと、
オン状態の外部nMOSトランジスタと、
前記外部pMOSトランジスタおよび前記外部nMOSトランジスタに電流を供給する外部カレントミラートランジスタと
を含む
前記(1)記載の固体撮像素子。
(3)前記オートゼロトランジスタと前記一対の差動トランジスタとは、nMOSトランジスタであり、
前記オートゼロ電位生成回路は、
オン状態の外部nMOSトランジスタと、
前記外部nMOSトランジスタに電流を供給する外部カレントミラートランジスタと
を含む
前記(1)記載の固体撮像素子。
(4)カレントミラー回路と、
前記一対の差動トランジスタと前記カレントミラー回路との間に挿入された一対のカスコードトランジスタと
をさらに具備し、
前記オートゼロ電位生成回路は、前記一対のカスコードトランジスタの一方を所定のオートゼロ期間内にオン状態に制御する
前記(1)から(3)のいずれかに記載の固体撮像素子。
(5)二次元格子状に複数の画素が配列された画素アレイ部をさらに具備し、
前記一対の差動トランジスタと、前記オートゼロトランジスタとを含む比較器は、前記画素アレイ部の列ごとに配置される
前記(1)から(4)のいずれかに記載の固体撮像素子。
(6)前記オートゼロ電位生成回路は、前記列ごとに配置される
前記(5)記載の固体撮像素子。
(7)前記オートゼロ電位生成回路は、複数の列のそれぞれの比較器により共有される
前記(5)記載の固体撮像素子。
(8)入力電圧と所定の参照電圧との差分を増幅して画素信号として出力する一対の差動トランジスタと、
前記一対の差動トランジスタの一方のゲートおよびドレインの間の経路を開閉するオートゼロトランジスタと、
プロセスのばらつきによる変動量が前記差動トランジスタのゲート-ソース間の変動量と略同一のオートゼロ電位を生成して前記一対の差動トランジスタの他方のゲートに供給するオートゼロ電位生成回路と、
前記画素信号を配列した画像データを処理する信号処理回路と
を具備する撮像装置。 The present technology can have the following configurations.
(1) A pair of differential transistors that amplify the difference between the input voltage and a predetermined reference voltage, and
An auto-zero transistor that opens and closes the path between one gate and drain of the pair of differential transistors,
Equipped with an auto-zero potential generation circuit that generates an auto-zero potential whose fluctuation amount due to process variation is substantially the same as the fluctuation amount of the gate-source voltage of the differential transistor and supplies it to the other gate of the pair of differential transistors. Solid-state imaging device.
(2) The auto-zero transistor is a pMOS (p-channel Metal Oxide Semiconductor) transistor.
The pair of differential transistors are nMOS (n-channel MOS) transistors.
The auto-zero potential generation circuit is
With an external pMOS transistor in the ON state,
An external nMOS transistor in the ON state and
The solid-state image pickup device according to (1) above, which includes the external pMOS transistor and an external current mirror transistor that supplies a current to the external nMOS transistor.
(3) The auto-zero transistor and the pair of differential transistors are nMOS transistors.
The auto-zero potential generation circuit is
An external nMOS transistor in the ON state and
The solid-state image pickup device according to (1) above, which includes an external current mirror transistor that supplies a current to the external nMOS transistor.
(4) Current mirror circuit and
Further, a pair of cascode transistors inserted between the pair of differential transistors and the current mirror circuit is provided.
The solid-state image pickup device according to any one of (1) to (3) above, wherein the auto-zero potential generation circuit controls one of the pair of cascode transistors to be turned on within a predetermined auto-zero period.
(5) A pixel array unit in which a plurality of pixels are arranged in a two-dimensional lattice is further provided.
The solid-state image pickup device according to any one of (1) to (4), wherein the comparator including the pair of differential transistors and the auto-zero transistor is arranged for each row of the pixel array unit.
(6) The solid-state image pickup device according to (5) above, wherein the auto-zero potential generation circuit is arranged in each row.
(7) The solid-state imaging device according to (5) above, wherein the auto-zero potential generation circuit is shared by each comparator in a plurality of rows.
(8) A pair of differential transistors that amplify the difference between the input voltage and the predetermined reference voltage and output it as a pixel signal.
An auto-zero transistor that opens and closes the path between one gate and drain of the pair of differential transistors,
An auto-zero potential generation circuit that generates an auto-zero potential whose fluctuation amount due to process variation is substantially the same as the fluctuation amount between the gate and source of the differential transistor and supplies it to the other gate of the pair of differential transistors.
An image pickup apparatus including a signal processing circuit for processing image data in which pixel signals are arranged.
100 撮像装置
110 光学系
120 信号処理回路
130 メモリ
140 モニタ
200 固体撮像素子
211 垂直走査回路
212 タイミング制御回路
213 DAC
214 画素アレイ部
215 水平転送走査回路
220 画素
221 光電変換素子
222 転送トランジスタ
223 リセットトランジスタ
224 浮遊拡散層
225 増幅トランジスタ
226 選択トランジスタ
230 カラムADC
231 ADC
232、233 容量
234 カウンタ
235 ラッチ回路
410 オートゼロ電位生成回路
411 外部カレントミラートランジスタ
412 外部pMOSトランジスタ
413、415 外部nMOSトランジスタ
414 制御トランジスタ
420 比較器
421、422 カレントミラートランジスタ
423、424 差動トランジスタ
425 テール電流源
426、427 オートゼロトランジスタ
431~434 pMOSトランジスタ
435、438、439 nMOSトランジスタ
436、437 カスコードトランジスタ
440 カラムアンプ
5009、12031 撮像部 100Image sensor 110 Optical system 120 Signal processing circuit 130 Memory 140 Monitor 200 Solid-state image sensor 211 Vertical scanning circuit 212 Timing control circuit 213 DAC
214Pixel array part 215 Horizontal transfer scanning circuit 220 Pixel 221 Photoelectric conversion element 222 Transfer transistor 223 Reset transistor 224 Floating diffusion layer 225 Amplification transistor 226 Selective transistor 230 Column ADC
231 ADC
232, 233Capacity 234 Counter 235 Latch circuit 410 Auto zero potential generation circuit 411 External current mirror transistor 412 External pMOS transistor 413, 415 External nMOS transistor 414 Control transistor 420 Comparer 421, 422 Current mirror transistor 423, 424 Differential transistor 425 Tail current Source 426, 427 Auto-zero transistor 431 to 434 pMOS transistor 435, 438, 439 nMOS transistor 436, 437 Cascode transistor 440 Column amplifier 5009, 12031 Imaging unit
110 光学系
120 信号処理回路
130 メモリ
140 モニタ
200 固体撮像素子
211 垂直走査回路
212 タイミング制御回路
213 DAC
214 画素アレイ部
215 水平転送走査回路
220 画素
221 光電変換素子
222 転送トランジスタ
223 リセットトランジスタ
224 浮遊拡散層
225 増幅トランジスタ
226 選択トランジスタ
230 カラムADC
231 ADC
232、233 容量
234 カウンタ
235 ラッチ回路
410 オートゼロ電位生成回路
411 外部カレントミラートランジスタ
412 外部pMOSトランジスタ
413、415 外部nMOSトランジスタ
414 制御トランジスタ
420 比較器
421、422 カレントミラートランジスタ
423、424 差動トランジスタ
425 テール電流源
426、427 オートゼロトランジスタ
431~434 pMOSトランジスタ
435、438、439 nMOSトランジスタ
436、437 カスコードトランジスタ
440 カラムアンプ
5009、12031 撮像部 100
214
231 ADC
232, 233
Claims (8)
- 入力電圧と所定の参照電圧との差分を増幅する一対の差動トランジスタと、
前記一対の差動トランジスタの一方のゲートおよびドレインの間の経路を開閉するオートゼロトランジスタと、
プロセスのばらつきによる変動量が前記差動トランジスタのゲート-ソース間電圧の変動量と略同一のオートゼロ電位を生成して前記一対の差動トランジスタの他方のゲートに供給するオートゼロ電位生成回路と
を具備する固体撮像素子。 A pair of differential transistors that amplify the difference between the input voltage and a given reference voltage,
An auto-zero transistor that opens and closes the path between one gate and drain of the pair of differential transistors,
Equipped with an auto-zero potential generation circuit that generates an auto-zero potential whose fluctuation amount due to process variation is substantially the same as the fluctuation amount of the gate-source voltage of the differential transistor and supplies it to the other gate of the pair of differential transistors. Solid-state imaging device. - 前記オートゼロトランジスタは、pMOS(p-channel Metal Oxide Semiconductor)トランジスタであり、
前記一対の差動トランジスタは、nMOS(n-channel MOS)トランジスタであり、
前記オートゼロ電位生成回路は、
オン状態の外部pMOSトランジスタと、
オン状態の外部nMOSトランジスタと、
前記外部pMOSトランジスタおよび前記外部nMOSトランジスタに電流を供給する外部カレントミラートランジスタと
を含む
請求項1記載の固体撮像素子。 The auto-zero transistor is a pMOS (p-channel Metal Oxide Semiconductor) transistor.
The pair of differential transistors are nMOS (n-channel MOS) transistors.
The auto-zero potential generation circuit is
With an external pMOS transistor in the ON state,
An external nMOS transistor in the ON state and
The solid-state image sensor according to claim 1, further comprising the external pMOS transistor and an external current mirror transistor that supplies a current to the external nMOS transistor. - 前記オートゼロトランジスタと前記一対の差動トランジスタとは、nMOSトランジスタであり、
前記オートゼロ電位生成回路は、
オン状態の外部nMOSトランジスタと、
前記外部nMOSトランジスタに電流を供給する外部カレントミラートランジスタと
を含む
請求項1記載の固体撮像素子。 The auto-zero transistor and the pair of differential transistors are nMOS transistors.
The auto-zero potential generation circuit is
An external nMOS transistor in the ON state and
The solid-state image sensor according to claim 1, further comprising an external current mirror transistor that supplies a current to the external nMOS transistor. - カレントミラー回路と、
前記一対の差動トランジスタと前記カレントミラー回路との間に挿入された一対のカスコードトランジスタと
をさらに具備し、
前記オートゼロ電位生成回路は、前記一対のカスコードトランジスタの一方を所定のオートゼロ期間内にオン状態に制御する
請求項1記載の固体撮像素子。 With the current mirror circuit,
Further, a pair of cascode transistors inserted between the pair of differential transistors and the current mirror circuit is provided.
The solid-state image pickup device according to claim 1, wherein the auto-zero potential generation circuit controls one of the pair of cascode transistors to be turned on within a predetermined auto-zero period. - 二次元格子状に複数の画素が配列された画素アレイ部をさらに具備し、
前記一対の差動トランジスタと、前記オートゼロトランジスタとを含む比較器は、前記画素アレイ部の列ごとに配置される
請求項1記載の固体撮像素子。 It further includes a pixel array unit in which a plurality of pixels are arranged in a two-dimensional grid pattern.
The solid-state image sensor according to claim 1, wherein the comparator including the pair of differential transistors and the auto-zero transistor is arranged for each row of the pixel array unit. - 前記オートゼロ電位生成回路は、前記列ごとに配置される
請求項5記載の固体撮像素子。 The solid-state imaging device according to claim 5, wherein the auto-zero potential generation circuit is arranged for each of the columns. - 前記オートゼロ電位生成回路は、複数の列のそれぞれの比較器により共有される
請求項5記載の固体撮像素子。 The solid-state imaging device according to claim 5, wherein the auto-zero potential generation circuit is shared by each comparator in a plurality of rows. - 入力電圧と所定の参照電圧との差分を増幅して画素信号として出力する一対の差動トランジスタと、
前記一対の差動トランジスタの一方のゲートおよびドレインの間の経路を開閉するオートゼロトランジスタと、
プロセスのばらつきによる変動量が前記差動トランジスタのゲート-ソース間の変動量と略同一のオートゼロ電位を生成して前記一対の差動トランジスタの他方のゲートに供給するオートゼロ電位生成回路と、
前記画素信号を配列した画像データを処理する信号処理回路と
を具備する撮像装置。 A pair of differential transistors that amplify the difference between the input voltage and a predetermined reference voltage and output it as a pixel signal.
An auto-zero transistor that opens and closes the path between one gate and drain of the pair of differential transistors,
An auto-zero potential generation circuit that generates an auto-zero potential whose fluctuation amount due to process variation is substantially the same as the fluctuation amount between the gate and source of the differential transistor and supplies it to the other gate of the pair of differential transistors.
An image pickup apparatus including a signal processing circuit for processing image data in which pixel signals are arranged.
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