WO2022110212A1 - 一种存储器及电子设备 - Google Patents

一种存储器及电子设备 Download PDF

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Publication number
WO2022110212A1
WO2022110212A1 PCT/CN2020/132932 CN2020132932W WO2022110212A1 WO 2022110212 A1 WO2022110212 A1 WO 2022110212A1 CN 2020132932 W CN2020132932 W CN 2020132932W WO 2022110212 A1 WO2022110212 A1 WO 2022110212A1
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Prior art keywords
layer
magnetic structure
memory
free layer
magnetic
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PCT/CN2020/132932
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English (en)
French (fr)
Inventor
秦青
周雪
刘熹
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华为技术有限公司
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Priority to CN202080105274.0A priority Critical patent/CN116250388A/zh
Priority to EP20963100.1A priority patent/EP4243099A4/en
Priority to PCT/CN2020/132932 priority patent/WO2022110212A1/zh
Publication of WO2022110212A1 publication Critical patent/WO2022110212A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/10—Magnetoresistive devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • H10B61/20—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors
    • H10B61/22—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors of the field-effect transistor [FET] type
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/80—Constructional details

Definitions

  • the present application relates to the field of memory technologies, and in particular, to a memory and an electronic device.
  • Magnetic random access memory is a new type of non-volatile memory.
  • spin transfer torque magnetic random access memory is compatible with COMS (complementary metal-oxide-semiconductor, complementary metal-oxide-semiconductor) due to its high speed, low power consumption
  • COMS complementary metal-oxide-semiconductor, complementary metal-oxide-semiconductor
  • the read-write function of the spin-distance magnetic random access memory is realized by the storage unit of the spin-distance magnetic random access memory.
  • the main structure of a memory cell consists of a magnetic tunneling junction (MTJ) element and a transistor.
  • the structure of MTJ is mainly composed of a free layer for storing information, a tunneling layer, a reference layer with a fixed magnetization direction, and a pinned layer stacked in sequence.
  • the magnetization direction of the reference layer is pinned in a certain direction by the pinned layer and remains unchanged, the magnetization direction of the free layer can be changed, and the current flows through the MTJ from different directions (current flows from the pinned layer to the free layer or current flows from the free layer to the Fixed layer), the magnetization direction of the free layer will change accordingly.
  • the magnetization direction of the free layer is parallel to the magnetization direction of the reference layer, that is, when the magnetization direction of the free layer and the reference layer are the same, the memory cell exhibits low resistance.
  • the reading of magnetic random access memory is to detect the resistance of the memory cell. A constant small current flows from the bit line through the MTJ, and a potential difference will be generated at both ends of the MTJ. According to the magnitude of the potential difference, the resistance of the MTJ can be determined, and then the information stored in the magnetic random access memory can be judged. "0" or "" 1".
  • the flipping speed of the free layer is relatively slow, thus affecting the writing efficiency of the memory cell.
  • Embodiments of the present application provide a memory and an electronic device, which can improve the flipping speed of the free layer.
  • a memory in a first aspect, includes a plurality of memory cells and bit lines arranged in an array in a storage area of the memory, the memory cells include a transistor and a magnetic tunnel junction MTJ element connected to the transistor; the MTJ element is arranged on the source or drain of the transistor and the bit line
  • the MTJ element includes a pinned layer, a reference layer, a tunneling layer and a free layer that are stacked in sequence; the magnetization direction of the pinned layer is parallel to the stacking direction of each layer in the MTJ; the memory also includes a A first magnetic structure on the current transmission path; wherein the direction of the magnetic field generated by the first magnetic structure in the free layer is not parallel to the magnetization direction of the free layer.
  • the magnetic field generated by the first magnetic structure in the free layer can apply a magnetic field force to the free layer, which is beneficial to the flipping of the free layer.
  • the current required for the flipping of the free layer is reduced, the incubation time of the STT is reduced, the flipping speed of the free layer is increased, the writing time is shortened, and the writing efficiency is improved.
  • the direction of the magnetic field generated in the free layer by the first magnetic structure is perpendicular to the magnetization direction of the free layer.
  • the magnetic field generated by the first magnetic structure in the free layer is larger, which is more conducive to the inversion of the free layer, thus further reducing the incubation time of the STT, and more effectively increasing the inversion speed of the free layer.
  • the memory further includes a connection layer disposed between the first magnetic structure and the MTJ element, and the first magnetic structure is electrically connected to the MTJ element through the connection layer; wherein the projection of the MTJ element on the connection layer The projection of the first magnetic structure on the connection layer at least partially does not overlap.
  • the direction of the magnetic field generated by the first magnetic structure in the free layer can be adjusted by adjusting the magnetization direction of the first magnetic structure and the relative position of the MTJ element and the first magnetic structure in the stacking direction perpendicular to the layers in the MTJ, so that the The direction of the magnetic field generated in the free layer by the first magnetic structure is not parallel to the magnetization direction of the free layer.
  • the first magnetic structure is connected between the MTJ element and the source or drain of the transistor.
  • the first magnetic structure is connected between the MTJ element and the bit line.
  • the MTJ element further includes a first electrode and a second electrode; the first electrode is located on the side of the free layer away from the pinned layer, and the second electrode is located on the side of the pinned layer away from the free layer; An electrode is electrically connected to the bit line, and the second electrode is electrically connected to the source or drain of the transistor; or, the first electrode is electrically connected to the source or drain of the transistor, and the second electrode is electrically connected to the bit line.
  • the magnitude of the voltage applied on the first electrode and the second electrode determines the flow direction of the current in the MTJ element.
  • the material of the first magnetic structure includes one or more of cobalt element, iron element, nickel element, and an alloy containing at least one of cobalt, iron, and nickel.
  • the pinning layer includes a first sub-pinning layer, a non-magnetic layer and a second sub-pinning layer that are stacked in sequence; the magnetization direction of the first sub-pinning layer is the same as that of the second sub-pinning layer.
  • the magnetization directions of the layers are opposite.
  • the first sub-pinned layer is free
  • the direction of the stray field generated by the layer is opposite to the direction of the stray field generated by the second sub-pinned layer in the free layer, so the stray field generated by the first sub-pinned layer in the free layer and the stray field generated by the second sub-pinned layer in the free layer.
  • the stray field can be canceled, so that the influence of the stray field generated by the pinning layer in the free layer on the flipping of the free layer can be reduced, thereby reducing the current required for the flipping of the free layer.
  • both the first sub-pinning layer and the second sub-pinning layer include ferromagnetic layers and heavy metal layers alternately stacked along the stacking direction of the layers in the MTJ.
  • the material of the ferromagnetic layer includes one or more of cobalt element, iron element, nickel element, and an alloy containing at least one of cobalt, iron, and nickel;
  • the material of the heavy metal layer includes platinum One or more of elemental, tantalum elemental, copper elemental, iridium elemental, ruthenium elemental, tungsten elemental and alloys containing at least one of platinum, tantalum, copper, iridium, ruthenium, and tungsten.
  • the memory further includes a second magnetic structure disposed on the current transmission path and in contact with the MTJ element; the included angle between the magnetization direction of the second magnetic structure and the magnetization direction of the pinning layer is (90 °, 180 °]; wherein, the first magnetic structure is connected between the MTJ element and the source or drain of the transistor, and the second magnetic structure is connected between the MTJ element and the bit line; or, the first magnetic structure is connected to the MTJ Between the element and the bit line, the second magnetic structure is connected between the MTJ element and the source or drain of the transistor.
  • the angle between the magnetization direction of the second magnetic structure and the magnetization direction of the pinning layer is (90° ,180°]
  • the magnetic field generated by the second magnetic structure in the free layer can offset the magnetic field generated by the pinning layer in the free layer, thereby reducing or eliminating the compensation field generated by the free layer, thus reducing the need for flipping the free layer , and can solve the problem of MTJ inversion asymmetry (that is, the magnitude of the current required to change the magnetization direction of the free layer to two opposite directions) is different.
  • the magnetization direction of the second magnetic structure is opposite to the magnetization direction of the pinned layer, and the magnetic field generated by the second magnetic structure in the free layer is the same as the magnetic field generated by the pinned layer in the free layer.
  • the magnetic field generated by the second magnetic structure in the free layer can cancel the magnetic field generated by the pinning layer in the free layer, so the magnetic field received by the free layer is zero or close to zero, and the compensation field generated by the magnetic field in the free layer is zero Or approaching zero, in this way, the current required for the flipping of the free layer is further reduced, and the problem of asymmetric flipping of the MTJ is more effectively solved.
  • the magnetization direction of the second magnetic structure is opposite to the magnetization direction of the pinned layer, and the magnetic field generated by the second magnetic structure in the free layer is the same as the magnetic field generated by the pinned layer and the reference layer in the free layer. same. In this way, the magnetic fields generated by the pinned layer and the reference layer in the free layer can be canceled by the magnetic field generated by the second magnetic structure in the free layer, which further reduces the current required for the flipping of the free layer.
  • the pinning layer includes ferromagnetic layers and heavy metal layers alternately stacked along the stacking direction of the layers in the MTJ. Since the pinned layer only includes ferromagnetic layers and heavy metal layers alternately stacked along the stacking direction of each layer in the MTJ, the thickness of the pinned layer is greatly reduced, the structure is simplified, and the roughness of the interface between the tunneling layer and the free layer is reduced. degree, and reduce the stress accumulation, and is conducive to the scaling of the MTJ. In addition, the thickness of the pinning layer is greatly reduced, that is, the thickness of the conductive material under the tunneling layer is reduced, which reduces the probability of a short circuit caused by backsplash during the etching process, and improves the engineering yield.
  • the material of the pinning layer is a perpendicular magnetic anisotropy material. Since the material of the pinned layer is a perpendicular magnetic anisotropy material, the magnetization direction of the pinned layer is easily magnetized to be parallel to the stacking direction of each layer in the MTJ, so the thickness of the pinned layer can be set to be small, so that , the structure is simplified, which is beneficial to reduce the roughness of the interface between the tunneling layer and the free layer, reduce the stress accumulation, and is beneficial to the scaling of the MTJ. In addition, the thickness of the pinning layer is greatly reduced, that is, the thickness of the conductive material under the tunneling layer is reduced, which reduces the probability of a short circuit caused by backsplash during the etching process, and improves the engineering yield.
  • the material of the pinning layer includes one or more of iron-platinum alloy and cobalt-platinum alloy.
  • iron-platinum alloy and cobalt-platinum alloy are perpendicular magnetic anisotropy materials.
  • the materials of the reference layer and the free layer include cobalt iron boron CoFeB alloy; the material of the tunneling layer includes magnesium oxide MgO.
  • the gate of the transistor is connected to the word line control circuit through the word line WL, the source or drain of the transistor is connected to the data line; the bit line BL is connected to the bit line control circuit.
  • an electronic device in a second aspect, includes a circuit board and a memory electrically connected to the circuit board, where the memory is the above-mentioned memory.
  • the electronic device has the same technical effects as the foregoing embodiments, which will not be repeated here.
  • FIG. 1a is a schematic structural diagram of a storage system provided by an embodiment of the present application.
  • FIG. 1b is a schematic structural diagram of a storage system according to another embodiment of the present application.
  • FIG. 1c is a schematic structural diagram of a storage system according to another embodiment of the present application.
  • FIG. 2 is a schematic structural diagram of a memory provided by an embodiment of the present application.
  • 3a is a schematic structural diagram of an MTJ element provided by an embodiment of the present application.
  • 3b is a schematic structural diagram of an MTJ element provided by another embodiment of the present application.
  • FIG. 4a is a schematic structural diagram of a memory according to another embodiment of the present application.
  • 4b is a schematic structural diagram of an MTJ element, a conductive structure and a first magnetic structure provided by an embodiment of the present application;
  • 5a is a schematic structural diagram of a memory according to another embodiment of the present application.
  • 5b is a schematic structural diagram of an MTJ element, a conductive structure, and a first magnetic structure provided by another embodiment of the present application;
  • FIG. 6a is a schematic structural diagram of a memory according to still another embodiment of the present application.
  • 6b is a schematic structural diagram of an MTJ element and a first magnetic structure provided by an embodiment of the present application;
  • FIG. 7a is a schematic structural diagram of a memory according to another embodiment of the present application.
  • FIG. 7b is a schematic structural diagram of an MTJ element, a conductive structure, and a first magnetic structure provided by another embodiment of the present application;
  • FIG. 8a is a schematic diagram of a magnetic field direction within a first magnetic structure or a second magnetic structure and an external magnetic field direction provided by an embodiment of the present application;
  • Fig. 8b is the simulation result diagram of the plane of the position marked by the black straight line B in Fig. 8a;
  • Fig. 9 is the structural representation of MTJ element
  • FIG. 10 is a schematic structural diagram of a first sub-pinning layer, a second sub-pinning layer or a pinning layer in an MTJ element;
  • 11a is a schematic structural diagram of a memory according to another embodiment of the present application.
  • 11b is a schematic structural diagram of an MTJ element, a first magnetic structure, and a second magnetic structure provided by an embodiment of the present application;
  • FIG. 12a is a schematic structural diagram of a memory according to still another embodiment of the present application.
  • 12b is a schematic structural diagram of an MTJ element, a first magnetic structure, and a second magnetic structure provided by another embodiment of the present application;
  • FIG. 13 is a simulation result diagram of the position marked by the black straight line A and the black straight line B in FIG. 8a .
  • first”, second, etc. are only used for convenience of description, and should not be construed as indicating or implying relative importance or implying the number of indicated technical features. Thus, a feature defined as “first”, “second”, etc., may expressly or implicitly include one or more of that feature.
  • electrical connection may be a direct electrical connection or an indirect electrical connection through an intermediate medium.
  • the technical solutions provided in this application can be applied to various storage systems using magnetic random access memory.
  • the technical solution provided in this application is applied to a computer.
  • the technical solution provided in this application is applied to a storage system including a memory, or a processor and a memory, and the processor may be a central processing unit (CPU), artificial intelligence (artificial intelligence, AI) processing devices, digital signal processors, and neural network processors.
  • CPU central processing unit
  • AI artificial intelligence
  • digital signal processors digital signal processors
  • neural network processors neural network processors.
  • FIG. 1a is a schematic structural diagram of a storage system according to an embodiment of the present application.
  • the storage system may include a storage device, and the storage device may be a magnetic random access memory.
  • the storage system may further include a CPU, a cache (cache), a controller, and the like.
  • the storage system includes an integrated CPU, a buffer and a storage device.
  • the storage system can be used as an independent memory, and the storage system includes an integrated CPU, a buffer, a controller and a storage device, and the storage device passes through the controller. coupled with the buffer and the CPU.
  • the storage system includes a storage device, and an integrated CPU, a buffer, a controller and a dynamic random access memory (DRAM), and the storage device can The DRAM is coupled as an external storage device; wherein the DRAM is coupled to the buffer and the CPU through the controller.
  • the CPUs in the various memory systems shown in Figures 1a, 1b and 1c may also be replaced by CPU cores.
  • the storage devices in FIGS. 1a, 1b and 1c may be magnetic random access memories.
  • the structure of the memory 10 includes a plurality of memory cells 11 arranged in an array in a storage area of the memory 10 .
  • the memory cells 11 include a transistor T and a magnetic tunnel junction MTJ element 12 connected to the transistor T.
  • the above-mentioned transistor T may be a thin film transistor (thin film transistor, TFT), or may be other types of transistors such as a MOS (metal oxide semiconductor) tube.
  • the transistor T includes a source electrode, a drain electrode, an active layer, a gate insulating layer and a gate electrode, the source electrode and the drain electrode are both in contact with the active layer, and the gate insulating layer is arranged between the gate electrode and the active layer.
  • the structure of the memory 10 further includes a plurality of word lines (word lines, WL) arranged in parallel and a plurality of bit lines (bit lines, BL) arranged in parallel, and the word lines WL and the bit lines BL cross each other
  • the word line WL and the bit line BL are perpendicular to each other.
  • the memory 10 further includes a plurality of data lines arranged in parallel, and the data lines may be parallel to the bit lines BL.
  • the gate of the transistor T is electrically connected to the word line WL, and the source or drain of the transistor T is electrically connected to the data line.
  • the source of the transistor T may be electrically connected to the data line, and the data line may also be referred to as a source line (SL) at this time; the drain of the transistor T may also be electrically connected to the data line.
  • FIG. 2 takes the electrical connection between the source electrode and the source electrode line of the transistor T as an example for illustration.
  • the word line WL is also electrically connected to a word line control circuit, and the word line control circuit provides a high level signal or a low level signal for the word line WL, so that the transistor T is turned on or off.
  • the transistor T is an N-type transistor
  • the high-level signal controls the transistor T to be turned on
  • the low-level signal controls the transistor T to be turned off.
  • the transistor T is a P-type transistor
  • a low-level signal controls the transistor T to be turned on
  • a high-level signal controls the transistor T to be turned off.
  • bit line BL is also electrically connected to a bit line control circuit, and the bit line BL is provided with a signal through the bit line control circuit.
  • the data line is grounded.
  • the MTJ element 12 is provided on the current transmission path between the source or drain of the transistor T and the bit line BL.
  • the MTJ element 12 includes a first electrode 121, a second electrode 122, and an MTJ located between the first electrode 121 and the second electrode 122.
  • the MTJ includes a pinning layer 1231, a reference layer 1232, a pinning layer 1231, a reference layer 1232, a The direction of magnetization of the tunneling layer 1233 and the free layer 1234; the pinned layer 1231 (which may also be referred to as the direction of the magnetic moment) is parallel to the stacking direction of the layers in the MTJ.
  • the first electrode 121 is located on the side of the free layer 1234 away from the pinned layer 1231
  • the second electrode 122 is located on the side of the pinned layer 1231 away from the free layer 1234 .
  • the first electrode 121 in the MTJ element 12 is electrically connected to the bit line BL
  • the second electrode 122 is electrically connected to the drain or source of the transistor T; or, the first electrode 121 is electrically connected to the drain or source of the transistor T.
  • the source electrode is electrically connected
  • the second electrode 122 is electrically connected to the above-mentioned bit line BL.
  • the following description is given by taking an example that the first electrode 121 is electrically connected to the bit line BL, the second electrode 122 is electrically connected to the drain of the transistor T, and the source of the transistor T is electrically connected to the source line SL.
  • the source of the transistor T is electrically connected to the data line.
  • the drain of the transistor is electrically connected to the data line.
  • the stacking direction of each layer in the MTJ can be from the pinned layer 1231 to the free layer 1234 , or from the free layer 1234 to the pinned layer 1231 .
  • the arrows marked in the pinned layer 1231 in FIGS. 3 a and 3 b are the magnetization directions of the pinned layer 1231 . Taking the stacking direction of each layer in the MTJ as the direction from the pinned layer 1231 to the free layer 1234 as an example, in this case, the arrows marked by the pinned layer 1231 in FIG. 3a and FIG. 3b can also indicate the stacking of each layer in the MTJ direction.
  • the magnetization direction of the pinned layer 1231 is parallel to the stacking direction of each layer in the MTJ, which can be the magnetization direction of the pinned layer 1231 and the MTJ
  • the stacking direction of each layer is the same, that is, the magnetization direction of the pinned layer 1231 is the direction from the pinned layer 1231 to the free layer 1234; it can also be that the magnetization direction of the pinned layer 1231 is parallel and opposite to the stacking direction of each layer in the MTJ , that is, the magnetization direction of the pinned layer 1231 is the direction from the free layer 1234 to the pinned layer 1231 .
  • the reference layer 1232 is a film layer with a fixed magnetization direction in the MTJ, and there is a strong ferromagnetic coupling between the pinning layer 1231 and the reference layer (also referred to as a pinned layer) 1232, and the magnetization of the reference layer 1232
  • the direction can be pinned in a fixed direction by the pinned layer 1231, and the magnetization direction of the reference layer 1232 can hardly be changed.
  • the magnetization direction of the reference layer 1232 and the magnetization direction of the pinning layer 1231 are the same, so the magnetization direction of the reference layer 1232 is also parallel to the stacking direction of the layers in the MTJ.
  • the pinned layer 1231 is used to pin the magnetization direction of the reference layer 1232 in a fixed direction, so the magnetization direction of the pinned layer 1231 should not be easily changed, that is, the pinned layer 1231 should have a larger coercive field.
  • the reference layer 1232 and the free layer 1234 are in a decoupled state due to the effect of the tunneling layer 1233. Therefore, the magnetization direction of the free layer 1234 is easily changed under the action of an external magnetic field.
  • the magnetization direction of the free layer 1234 is the same as the reference layer.
  • the magnetization direction of the layer 1232 may be in a parallel or anti-parallel state, that is, the magnetization direction of the free layer 1234 and the magnetization direction of the reference layer 1232 may be the same or opposite.
  • the MTJ in the embodiment of the present application has perpendicular magnetic anisotropy (perpendicular magnetic anisotropy, MTJ of PMA).
  • the above-mentioned reference layer 1232 and the free layer 1234 are magnetic layers.
  • the materials of the reference layer 1232 and the free layer 1234 include a cobalt iron boron (CoFeB) alloy, a cobalt iron (CoFe) alloy or a nickel iron cobalt (NiFeCo) alloy. one or more.
  • the materials of the reference layer 1232 and the free layer 1234 as CoFeB alloy as an example, specifically, the materials of the reference layer 1232 and the free layer 1234 may be (CoxFe1 -x ) 1-yBy , wherein x and y are both Bounded between 0-0.30.
  • the above-mentioned tunneling layer 1233 is a non-magnetic layer.
  • the material of the tunneling layer 1233 includes one or more of magnesium oxide (MgO) or aluminum oxide (Al 2 O 3 ).
  • the MTJ element 12 further includes a seed layer (seed) 1235 disposed between the second electrode 122 and the pinning layer 1231.
  • a pinned layer 1231 is grown on layer 1235 .
  • the MTJ element 12 further includes a structure conversion layer 1236 disposed between the reference layer 1232 and the pinning layer 1231 , and the material of the structure conversion layer 1236 is an amorphous material.
  • the material of the structural transformation layer 1236 disposed between the reference layer 1232 and the pinning layer 1231 is an amorphous material, and the amorphous material has no fixed crystal orientation, growing the reference layer 1232 on the structural transformation layer 1236 can avoid crystal lattices Growth difficulties caused by differences, as well as problems such as roughness accumulation and stress accumulation.
  • the material of the structural transformation layer 1236 is one or more of tantalum (Ta), tantalum alloy, and tantalum-tungsten alloy.
  • tantalum is an amorphous material.
  • the MTJ element 12 further includes a capping layer 1237 disposed on the side of the free layer 1234 away from the tunneling layer 1233 and in contact with the free layer 1234 .
  • the interface between the capping layer 1237 and the free layer 1234 is beneficial to increase the perpendicular magnetic anisotropy of the free layer 1234, thereby achieving the purpose of increasing the data storage time.
  • the material of the capping layer 1237 includes magnesium oxide.
  • the tunneling layer 1233 is located between the reference layer 1232 and the free layer 1234.
  • TMR tunneling magneto-resistance
  • the resistance of the tunneling layer 1233 should be set larger, and the capping layer 1237 is located on the side of the free layer 1234 away from the tunneling layer 1233.
  • the capping layer 1237 is used to increase the vertical direction of the free layer 1234.
  • the magnetic anisotropy is also used for current transmission, so the resistance of the cover layer 1237 should be set small.
  • the resistance of the tunneling layer 1233 is much larger than that of the capping layer 1237 .
  • the material of the tunneling layer 1233 and the material of the cover layer 1237 are both selected from magnesium oxide, since the resistance of the tunnel layer 1233 is much larger than that of the cover layer 1237, the thickness of the cover layer 1237 can be adjusted to be smaller to make the cover layer 1237 resistance is smaller.
  • magnesium oxide can also be formed by oxidative growth of magnesium, and the resistance of the magnesium oxide formed in this way is relatively small.
  • the key to realizing reading and writing of magnetic random access memory is to have large tunneling magnetoresistance and high spin transfer efficiency, and the above MTJ structure of the present application can obtain a large tunneling magnetoresistance (150%-250%), At the same time, it has high spin transfer efficiency (>0.8), so it can ensure the realization of read and write functions.
  • the transistor T When the memory cell 11 is writing, the transistor T is in an on state.
  • the current direction flows from the free layer 1234 to the reference layer 1232, that is, the spin electrons flow from the reference layer 1232 to the free layer 1234, and the spin electrons pass through the reference layer 1232, the current
  • the electrons in the electrons are spin-polarized along the magnetization direction of the reference layer 1232, and the spin magnetic moment of the electrons is parallel to the magnetization direction of the reference layer 1232.
  • the electrons pass through the tunneling layer 1233 and reach the free layer 1234, the spin electrons will spin.
  • the spin torque (also known as spin angular momentum, or STT) is transferred to the free layer 1234, and the free layer 1234 subjected to the spin torque effect has a small magnetization, so the magnetization direction of the free layer 1234 can be determined according to the spin current.
  • the polarization direction of the spintronic changes freely, and finally the magnetization direction of the free layer 1234 and the magnetization direction of the reference layer 1232 are in a parallel state, that is, the magnetization direction of the free layer 1234 is the same as the magnetization direction of the reference layer 1232, which can represent writing Information is "0".
  • the magnetization direction of the free layer 1234 is rotated in the opposite direction of the magnetization direction of the reference layer 1232, and finally the magnetization direction of the free layer 1234 and the magnetization direction of the reference layer 1232 are in an antiparallel state, that is, the magnetization direction of the free layer 1234 and the reference layer 1232.
  • the magnetization direction is opposite, which can represent that the written information is "1".
  • the current direction can be controlled by the voltage provided on the bit line BL and the source line SL.
  • the current flows from the free layer 1234 to the reference layer 1232;
  • the supplied voltage is less than that supplied by the source line SL, and current flows from the reference layer 1232 to the free layer 1234 .
  • the resistance of the MTJ can be determined, that is, the relative orientation relationship between the magnetization directions of the free layer 1234 and the reference layer 1232 can be obtained, and then it can be determined whether the information stored in the memory unit 11 is “0” or “1”.
  • the MTJ exhibits low resistance, the magnetization direction of the free layer 1234 is parallel to the magnetization direction of the reference layer 1232, and the information stored in the memory cell 11 is “0”; the MTJ exhibits high resistance, and the magnetization direction of the free layer 1234 is parallel to the reference layer.
  • the magnetization direction of 1232 is in an anti-parallel state, and the information stored in the storage unit 11 is "1".
  • the word line control circuit provides a gate signal to the word lines row by row, so that the transistors T in the multi-row memory cells 11 are turned on row by row, so that writing can be performed row by row. Enter information or read information.
  • the memory 10 provided in this embodiment of the present application may also be referred to as a spin-shift magnetic random access memory.
  • the above-mentioned memory 10 may further include a base substrate 13 on which the transistor T, the MTJ element 12 and other patterns are arranged.
  • 4a, 5a and 6a are all illustrated by taking the transistor as a MOS tube as an example, and illustrate the source 141, the drain 142, the active layer 143 and the gate 144 of the transistor T, which are arranged on the gate 144 and the gate 144.
  • the gate insulating layer between the source layers 143 is not shown.
  • the MTJ element 12 is not directly fabricated. Usually, other conductive functions will be formed after the transistor T is fabricated and before the MTJ element 12 is fabricated. Pattern and insulating layer (the conductive functional pattern and insulating layer are not shown in FIGS. 4a, 5a and 6a). Based on this, in order to electrically connect the drain 142 of the transistor T with the second electrode 122 in the MTJ element 12, as shown in FIG. 4a, FIG. 5a and FIG.
  • the drain 142 of the transistor T and the MTJ element 12 On the current transmission path between the second electrode 122 and the drain 142 of the transistor T, at least one conductive structure 15 (also called a conductive tube or a metal conductive tube) is connected in series, and the second electrode 122 conducts electricity through the at least one conductive structure. Structure 15 is electrically connected to drain 142 of transistor T. Similarly, after the MTJ element 12 is fabricated and before the bit line BL is fabricated, a conductive functional pattern and an insulating layer are also formed. Based on this, in order to electrically connect the first electrode 121 and the bit line BL, as shown in FIGS.
  • the first electrode At least one conductive structure 15 is connected in series between 121 and the bit line BL, and the first electrode 121 is electrically connected to the bit line BL through the at least one conductive structure 15 .
  • the conductive structure 15 and the conductive functional pattern can be formed simultaneously.
  • the memory 10 provided by the embodiment of the present application further includes a first magnetic structure 16 disposed on the current transmission path; wherein, the first magnetic structure 16 is in the free layer
  • the direction of the magnetic field (which may be referred to as a static magnetic field or a stray field) generated by 1234 is not parallel to the magnetization direction of the free layer 1234 .
  • the embodiment of the present application adds a first magnetic structure 16 on the current transmission path between the source 141 or the drain 142 of the transistor T and the bit line BL.
  • the first magnetic structure 16 since the first magnetic structure 16 is disposed on the current transmission path between the source electrode 141 or the drain electrode 142 of the transistor T and the bit line BL, the first magnetic structure 16 has conductivity.
  • Two embodiments are exemplarily provided below to realize that the direction of the magnetic field generated by the first magnetic structure 16 in the free layer 1234 is not parallel to the magnetization direction of the free layer 1234 .
  • the above-mentioned memory further includes a connection layer 18 disposed between the first magnetic structure 16 and the MTJ element 12, and the first magnetic structure 16 passes through the connection layer 18 is electrically connected to the MTJ element 12; wherein, the projection of the MTJ element 12 on the connection layer 18 and the projection of the first magnetic structure 16 on the connection layer 18 do not overlap at least in a partial area.
  • the magnetization direction of the first magnetic structure 16 is parallel to the stacking direction of the layers in the MTJ.
  • the magnetization direction of the first magnetic structure 16 is parallel to the stacking direction of each layer in the MTJ, that is, in order to make The first magnetic structure 16 has magnetic shape anisotropy, so the length of the first magnetic structure 16 along the stacking direction parallel to the layers in the MTJ is greater than or equal to its length along the stacking direction perpendicular to the layers in the MTJ.
  • the first magnetic structure 16 is a cylinder, the height of the first magnetic structure 16 is greater than or equal to the diameter of the first magnetic structure 16 .
  • the freedom of the first magnetic structure 16 can be adjusted.
  • the projection of the MTJ element 12 on the connection layer 18 and the projection of the first magnetic structure 16 on the connection layer 18 overlap in some areas and do not overlap in some areas. In other examples, the projection of the MTJ element 12 on the connection layer 18 and the projection of the first magnetic structure 16 on the connection layer 18 do not overlap, that is, the projection of the MTJ element 12 on the connection layer 18 and the projection of the first magnetic structure 16 on the connection layer 18 do not overlap.
  • the projections on the connection layer 18 have no overlapping areas.
  • the drawings in the embodiments of the present application take the projection of the MTJ element 12 on the connection layer 18 and the projection of the first magnetic structure 16 on the connection layer 18 as an example without overlapping regions for illustration.
  • the first magnetic structure 16 is in contact with the MTJ element 12 , and the magnetization direction of the first magnetic structure 16 is perpendicular to the stacking direction of the layers in the MTJ.
  • the magnetization direction of the first magnetic structure 16 may be horizontal to the left or horizontal to the right.
  • the direction of the magnetic field generated by the first magnetic structure 16 in the free layer 1234 is the same as that in the MTJ.
  • the stacking direction of each layer is vertical.
  • the magnetization direction of the first magnetic structure 16 can still remain perpendicular to the stacking direction of each layer in the MTJ without changing, that is, in order to make the first magnetic structure 16 have a magnetic shape in all directions Therefore, the length of the first magnetic structure 16 along the stacking direction perpendicular to the layers in the MTJ is greater than or equal to its length along the stacking direction parallel to the layers in the MTJ. In the case where the first magnetic structure 16 is a cylinder, the diameter of the first magnetic structure 16 is greater than or equal to the height of the first magnetic structure 16 .
  • the above-mentioned memory 10 may include a first magnetic structure 16.
  • the first magnetic structure 16 is connected to the MTJ element 12 and the source 141 or the drain of the transistor T. between poles 142.
  • the first magnetic structure 16 is electrically connected to the MTJ element 12 through the connection layer 18 .
  • the first magnetic structure 16 is connected between the MTJ element 12 and the bit line BL.
  • the first magnetic structure 16 is electrically connected to the MTJ element 12 through the connection layer 18 .
  • the memory 10 may also include two first magnetic structures 16, in which case, as shown in FIGS. 6a and 6b, one first magnetic structure 16 is connected between the MTJ element 12 and the source 141 or the drain 142 of the transistor T. Meanwhile, another first magnetic structure 16 is connected between the MTJ element 12 and the bit line BL.
  • the two first magnetic structures 16 are electrically connected to the MTJ element 12 through the two connection layers 18 respectively, and the projections of the two first magnetic structures 16 on the connection layer 18 may overlap. regions, or non-overlapping regions.
  • FIGS. 6 a and 6 b illustrate the non-overlapping regions of the projections of the two first magnetic structures 16 on the connection layer 18 as an example.
  • the material of the first magnetic structure 16 includes one or more of cobalt element, iron element, nickel element, and an alloy containing at least one of cobalt, iron, and nickel.
  • the alloy containing at least one of cobalt, iron, and nickel may be, for example, a CoB (cobalt boron) alloy or a FeB (iron boron) alloy.
  • the material of the connection layer 16 may be copper (Cu).
  • the material of the conductive structure 15 in the memory 10 is a non-magnetic material, such as copper.
  • FIGS. 4 a , 4 b , 5 a , 5 b , 6 a , 6 b , 7 a and 7 b represent the magnetic lines of force of the first magnetic structure 16 .
  • the first magnetic structure 16 may be formed by a hole filling process, and the specific process is: firstly forming an insulating layer, the insulating layer including vias; next, depositing a layer of magnetic thin film; Next, the magnetic thin film outside the via hole is ground to form the first magnetic structure 16 in the via hole.
  • the conductive layer 15 in FIGS. 4a, 5a, 6a and 7a includes a first conductive part 151 and a second conductive part 152, because when the conductive structure 15 is fabricated, an insulating layer is formed first, and the insulating The layer includes vias; next, a conductive film is formed, and the portion of the conductive film deposited in the vias of the insulating layer is called the first conductive portion 151, and the conductive film is patterned to form the above-mentioned conductive functional pattern, and at the same time will be deposited on the The patterned portion of the conductive film above the via hole is called the second conductive portion 152 .
  • the conductive structure 15 may include a first conductive portion 151 and a second conductive portion 15 as shown in FIG. 4a.
  • the conductive portion 152 For the specific fabrication process of the conductive portion 152, reference may be made to the above, which will not be repeated here.
  • the conductive structure 15 may include a first conductive portion 151 and a second conductive portion Part, the specific production process can refer to the above, and will not be repeated here.
  • the conductive structure 15 may also include the first conductive portion 151, but not the second conductive portion 152, as shown in FIG. 5a.
  • the specific manufacturing process is as follows: firstly, an insulating layer is formed, and the insulating layer includes vias; then, a conductive film is formed.
  • the memory 10 includes the first magnetic structure 16 connected between the MTJ element 12 and the source 141 or the drain 142 of the transistor T
  • a conductive film is formed
  • the conductive thin film is patterned to form the connection layer 18
  • the MTJ element 12 is formed.
  • the memory 10 when the memory 10 includes the first magnetic structure 16 connected between the MTJ element 12 and the bit line BL, after the MTJ element 12 is fabricated, the connection layer 18 is formed, and then the first magnetic structure 16 is formed .
  • the connection layer 18 For the process of forming the connection layer 18, reference may be made to the above, which will not be repeated here.
  • the process of forming the conductive structure 15 may be as shown in FIG. 5a and FIG.
  • the insulating layer includes vias; next, a conductive film is formed, and the portion of the conductive film deposited in the vias of the insulating layer forms the first conductive portion 151 of the conductive structure 15, and the conductive film is patterned to form the above-mentioned conductive function
  • the portion formed by patterning the conductive thin film deposited over the via hole is the second conductive portion 152 of the conductive structure 15 .
  • the magnetic field generated by the first magnetic structure 16 in the free layer 1234 can give The free layer 1234 exerts a magnetic field force, which is beneficial to the inversion of the free layer 1234; when the direction of the magnetic field generated by the first magnetic structure 16 in the free layer 1234 is not parallel to the magnetization direction of the free layer 1234, and is not perpendicular, the free layer 1234 is in the When flipped, the magnetic field component (also referred to as the in-plane component) of the magnetic field generated by the first magnetic structure 16 in the free layer 1234 is perpendicular to the stacking direction of the layers in the MTJ, that is, the first magnetic structure 16 is generated in the free layer 1234.
  • the net in-plane field can apply a magnetic field force to the free layer 1234, which is beneficial to the flip of the free layer 1234
  • An embodiment of the present application provides a memory 10, the memory 10 includes a plurality of memory cells 11 and a bit line BL, the memory cell 11 includes a transistor T and an MTJ element 12 connected to the transistor T, and the MTJ element 12 is disposed at the source of the transistor T.
  • the MTJ element 12 includes a pinning layer 1231, a reference layer 1232, a tunneling layer 1233 and a free layer 1234 that are stacked in sequence, and the magnetization direction of the pinning layer 1231 parallel to the stacking direction of each layer in the MTJ;
  • the memory 10 further includes a first magnetic structure 16 disposed on the current transmission path; wherein, the direction of the magnetic field generated by the first magnetic structure 16 in the free layer 1234 and the magnetization direction of the free layer 1234 Not parallel.
  • the magnetic field generated by the first magnetic structure 16 in the free layer 1234 can apply a magnetic field force to the free layer 1234, which is beneficial to
  • the inversion of the free layer 1234 reduces the current required for the inversion of the free layer 1234, reduces the incubation time (incubation time) of the STT, increases the inversion speed of the free layer 1234, shortens the writing time, and improves the storage Write efficiency of cell 11.
  • the direction of the magnetic field generated by the first magnetic structure 16 in the free layer 1234 is perpendicular to the magnetization direction of the free layer 1234 .
  • first magnetic structure 16 when the first magnetic structure 16 is electrically connected to the MTJ element 12 through the connection layer 18 and the magnetization direction of the first magnetic structure 16 is parallel to the stacking direction of the layers in the MTJ, by adjusting the MTJ element 12 and the first magnetic
  • the relative positions of the structures 16 perpendicular to the stacking direction of the layers in the MTJ can make the direction of the magnetic field generated by the first magnetic structure 16 in the free layer 1234 perpendicular to the magnetization direction of the free layer 1234 .
  • the magnetization direction of the first magnetic structure 16 may be the same as the magnetization direction of the pinned layer 1231 , or may be the same as the magnetization direction of the pinned layer 1231 . In the opposite direction.
  • the magnetic field generated by the first magnetic structure 16 in the free layer 1234 is larger, which is more conducive to the flipping of the free layer 1234, Therefore, the current required for the flipping of the free layer 1234 can be further reduced, the incubation time of the STT can be further reduced, and the flipping speed of the free layer 1234 can be improved more effectively.
  • FIG. 8a is a schematic diagram of a simulation
  • the block in FIG. 8a represents the first magnetic structure 16, and the magnetization direction of the first magnetic structure 16 is parallel to the stacking direction of each layer in the MTJ
  • FIG. 8a schematically shows The direction of the magnetic field in the first magnetic structure 16 and the direction of the stray field generated outside are determined.
  • the direction of the magnetic field in the space where the first magnetic structure 16 is located is indicated by arrows
  • the direction of the magnetic field in the space where the first magnetic structure 16 is located includes the direction of the magnetic field in the first magnetic structure 16 and the direction of the stray field generated outside.
  • the black line A in Figure 8a is parallel to the stacking direction of the layers in the MTJ. It can be seen from the position indicated by the black straight line B in FIG. 8a that on the plane of the position indicated by the black straight line B, in-plane stray fields can be generated on both sides above the first magnetic structure 16 (that is, the direction of the magnetic field is perpendicular to stray fields in the stacking direction of the layers in the MTJ).
  • Fig. 8b is a simulation result diagram of the plane at the position indicated by the black straight line B in Fig. 8a, and the dashed circle in Fig. 8b represents the MTJ. According to Fig. 8b, on the plane shown by the black straight line B in Fig.
  • an in-plane stray field with an absolute value of about 3000e-800Oe will be generated on both sides above the first magnetic structure 16.
  • the stray field flips the free layer 1234 .
  • the magnitude of the in-plane stray field generated by the first magnetic structure 16 on the MTJ can be selected, that is, the stacking of the MTJ and the first magnetic structure 16 in the vertical direction of the layers in the MTJ can be adjusted.
  • the relative position in the direction eg, the horizontal direction
  • the current J th required to flip the free layer 1234 can be calculated according to the following formula:
  • H X is the in-plane field generated by the first magnetic structure 16 in the free layer 1234 (that is, the direction of the magnetic field generated by the first magnetic structure 16 in the free layer 1234 is a magnetic field perpendicular to the stacking direction of each layer in the MTJ)
  • H K , eff is the effective anisotropy field
  • MS is the saturation magnetization
  • tF is the thickness of the free layer 1234
  • e is the electronic constant
  • ⁇ is the magnetic damping
  • h Planck’s constant
  • ⁇ Spin transfer efficiency.
  • the in-plane field generated by the first magnetic structure 16 in the free layer 1234 can significantly reduce the magnitude of the current required for the free layer 1234 to flip.
  • the effect of thermal disturbance reduces the incubation time of the STT, accelerates the inversion of the free layer 1234, reduces the writing time of the MTJ, and further reduces the dynamic writing power consumption of the MTJ.
  • the pinning layer 1231 includes a first sub-pinning layer 1231a, a non-magnetic layer 1231b and a second sub-pinning layer 1231c that are stacked in sequence; the magnetization direction of the first sub-pinning layer 1231a is the same as that of the first sub-pinning layer 1231a. The magnetization directions of the second sub-pinned layers 1231c are opposite.
  • both the first sub-pinning layer 1231a and the second sub-pinning layer 1231c include ferromagnetic layers and heavy metal layers alternately stacked along the stacking direction of the layers in the MTJ.
  • the number of ferromagnetic layers and heavy metal layers in the first sub-pinning layer 1231a is different from the number of ferromagnetic layers and heavy metal layers in the second sub-pinning layer 1231c.
  • the first sub-pinning layer 1231a includes cobalt layers and platinum layers alternately stacked along the stacking direction of the layers in the MTJ, which is represented as [Co/Pt]M
  • the second sub-pinning layer 1231c includes layers along the stacking directions of the layers in the MTJ.
  • Cobalt layers and platinum layers alternately stacked in the stacking direction of the layers are expressed as [Co/Pt]N, where M and N are positive integers, both representing the number of cobalt layers or the number of platinum layers, where M, N of different sizes.
  • the material of the above-mentioned ferromagnetic layer includes one or more of cobalt element, iron element, nickel element, and an alloy containing at least one of cobalt, iron, and nickel.
  • the material of the heavy metal layer includes platinum (Pt) element, tantalum element, copper (Cu) element, iridium (Ir) element, ruthenium (Ru) element, tungsten (W) element, as well as platinum, tantalum, One or more of alloys of at least one of copper, iridium, ruthenium, and tungsten.
  • the material of the non-magnetic layer 1231b includes platinum element, tantalum element, copper element, iridium element, ruthenium element, tungsten element, and an alloy including at least one of platinum, tantalum, copper, iridium, ruthenium, and tungsten. one or more of.
  • the magnetization direction of the reference layer 1232 is the same as the magnetization direction of the first sub-pinned layer 1231a; If the sub-pinned layer 1231c is closer to the reference layer 1232 than the first sub-pinned layer 1231a, the magnetization direction of the reference layer 1232 is the same as that of the second sub-pinned layer 1231c.
  • the pinned layer 1231 includes the first sub-pinned layer 1231a and the second sub-pinned layer 1231c, and the magnetization direction of the first sub-pinned layer 1231a and the magnetization direction of the second sub-pinned layer 1231c
  • the direction of the stray field generated by the first sub-pinned layer 1231a in the free layer 1234 is opposite to the direction of the stray field generated by the second sub-pinned layer 1231c in the free layer 1234, so the first sub-pinned layer 1231a is free
  • the stray field generated by the layer 1234 and the stray field generated by the second sub-pinning layer 1231c in the free layer 1234 can be canceled, so that the influence of the stray field generated by the pinning layer 1231 in the free layer 1234 on the inversion of the free layer 1234 can be reduced or eliminated, This in turn reduces the current required for the free layer 1234 to flip.
  • the stray field generated by the first sub-pinned layer 1231a in the free layer 1234 and the stray field generated by the second sub-pinned layer 1231c in the free layer 1234 are of the same magnitude. In this way, the stray field generated by the first sub-pinning layer 1231a in the free layer 1234 and the stray field generated by the second sub-pinning layer 1231c in the free layer 1234 can be completely canceled, thereby further reducing the current required for the flipping of the free layer 1234 .
  • the above-mentioned memory 10 further includes a second magnetic structure 17 disposed on the current transmission path and in contact with the MTJ element 12; the magnetization direction of the second magnetic structure 17 is the same as the pin
  • the included angle between the magnetization directions of the pinned layer 1231 is (90°, 180°], that is, the included angle between the magnetization direction of the second magnetic structure 17 and the magnetization direction of the pinned layer 1231 is greater than 90° and less than or equal to 180°.
  • the first magnetic structure 16 is connected between the MTJ element 12 and the source 141 or the drain 142 of the transistor T
  • the second magnetic structure 17 is connected between the MTJ element 12 and the bit line BL 12a and 12b
  • the first magnetic structure 16 is connected between the MTJ element 12 and the bit line BL
  • the second magnetic structure 17 is connected between the MTJ element 12 and the source 141 or drain of the transistor T between 142.
  • the process of forming the second magnetic structure 17 may be the same as the above-mentioned process of forming the first magnetic structure 16 , which can be referred to above, and will not be repeated here.
  • the second magnetic structure 17 since the second magnetic structure 17 is disposed on the current transmission path between the source 141 or the drain 142 of the transistor T and the bit line BL, the second magnetic structure 17 has conductivity.
  • the angle between the magnetization direction of the second magnetic structure 17 and the magnetization direction of the pinned layer 1231 is (90°, 180°)
  • the direction of the magnetic field generated by the second magnetic structure 17 in the free layer 1234 is different from that of the pinned layer 1231 .
  • the included angle between the pinned layer 1231 and the direction of the magnetic field generated by the free layer 1234 is (90°, 180°).
  • the angle between the direction of the magnetic field generated by the second magnetic structure 17 in the free layer 1234 and the direction of the magnetic field generated by the pinning layer 1231 in the free layer 1234 is 180°, that is, the second magnetic structure 17 is generated in the free layer 1234 at an angle of 180°.
  • the direction of the magnetic field is opposite to the direction of the magnetic field generated by the pinned layer 1231 in the free layer 1234, the magnetic field generated by the second magnetic structure 17 in the free layer 1234 can cancel the magnetic field generated by the pinned layer 1231 in the free layer 1234, thereby reducing the pinning rate.
  • the influence of the magnetic field generated in the free layer 1234 by the pinned layer 1231 on the free layer 1234 is 180°, that is, the second magnetic structure 17 is generated in the free layer 1234 at an angle of 180°.
  • the magnetization between the second magnetic structure 17 and the pinned layer 1231 In the opposite direction the second magnetic structure 17 will generate a magnetic field component in the free layer 1234, and the magnetic field component generated by the second magnetic structure 17 in the free layer 1234 in the direction opposite to the magnetization direction of the pinned layer 1231 can be cancelled.
  • the magnetic field generated by the pinned layer 1231 in the free layer 1234 is (90°, 180°).
  • the magnetic field generated by the second magnetic structure 17 in the free layer 1234 can be canceled
  • the magnetic field generated by the pinned layer 1231 in the free layer 1234 can reduce or eliminate the compensation field generated by the free layer 1234, thus reducing the current required for the free layer 1234 to flip, and can solve the MTJ flip asymmetry (ie, make When the magnetization directions of the free layer 1234 are changed to opposite directions, the magnitude of the current required is different).
  • the magnetic field generated by the pinned layer 1231 in the free layer 1234 can be affected by the second magnetic structure 17 in the free layer 1234 The generated magnetic field cancels out, so there is no need to increase the current to overcome the difference in the influence of the stray field on the free layer 1234. In this way, the magnetization direction of the free layer 1234 can be reversed with a smaller current, which can reduce the power and reduce the power consumption.
  • the durability of the MTJ can be improved, and the life of the MTJ can be improved.
  • the magnetization direction of the second magnetic structure 17 is opposite to the magnetization direction of the pinned layer 1231 , and the magnetic field generated by the second magnetic structure 17 in the free layer 1234 is the same as the magnetic field generated by the pinned layer 1231 in the free layer 1234 .
  • the second The magnetic field generated by the magnetic structure 17 in the free layer 1234 can cancel the magnetic field generated by the pinned layer 1231 in the free layer 1234, so the magnetic field received by the free layer 1234 is zero or close to zero, and the compensation field generated by the magnetic field in the free layer 1234 is zero Or approaching zero, in this way, the current required for the flipping of the free layer 1234 is further reduced, and the problem of asymmetric flipping of the MTJ is more effectively solved.
  • the reference layer 1232 may also generate a stray field in the free layer 1234, in order to avoid the stray field generated by the reference layer 1232 in the free layer 1234 and increase the current required for the flip of the free layer 1234, in some examples, the second magnetic structure 17
  • the magnetization direction is opposite to that of the pinned layer 1231 , and the magnetic field generated by the second magnetic structure 17 in the free layer 1234 is the same as the magnetic field generated by the pinned layer 1231 and the reference layer 1232 in the free layer 1234 .
  • the magnetic fields generated by the pinned layer 1231 and the reference layer 1232 in the free layer 1234 can be offset by the magnetic field generated by the second magnetic structure 17 in the free layer 1234 , which further reduces the current required for the free layer 1234 to flip.
  • the second magnetic structure 17 is represented by the box in Fig. 8a, and the magnetization direction of the second magnetic structure 17 is parallel to the stacking direction of the layers in the MTJ, which can be seen along the position indicated by the black line A in Fig. 8a , the direction of the magnetic field in the second magnetic structure 17 is opposite to the direction of the stray field generated outside.
  • Fig. 13 is a simulation result diagram of the positions shown by the black straight line A (ie, the Z axis) and the black straight line B (ie, the X axis) in Fig. 8a, the abscissa represents the position of the X axis or the Z axis, and point a in Fig.
  • FIG. 8a represents The position of the Z-axis is -5.00E-08, the point b in Figure 8a represents the position of the X-axis is -5.00E-08, and the ordinate in Figure 13 represents the magnetic field strength, in Oe. It can be seen from FIG. 13 that the change of the magnetic field strength Hx along the X-axis direction and the change of the magnetic field strength Hz along the Z-axis direction. Taking the MTJ located above the second magnetic structure 17 as an example, the position P in FIG. 8a represents the position of the free layer 1234, and the position of the free layer 1234 on the Z axis is 20 nm. According to the simulation results provided in FIG.
  • the second magnetic The structure 17 generates a stray field of about 900Oe-2000Oe at the position P, and the direction of the stray field is opposite to the direction of the magnetic field in the second magnetic structure 17 . Based on this, the stray field generated by the pinning layer 1231 can be offset by the stray field generated by the second magnetic structure 17 .
  • the pinned layer 1231 includes a stacking direction of each layer in the MTJ. Ferromagnetic layers and heavy metal layers are alternately stacked.
  • the pinning layer 1231 includes cobalt layers and platinum layers ([Co/Pt]n, where n is a positive integer, indicating the number of cobalt layers or the number of platinum layers, which are alternately stacked along the stacking direction of each layer in the MTJ. ).
  • the pinned layer 1231 since the pinned layer 1231 only includes ferromagnetic layers and heavy metal layers alternately stacked along the stacking direction of each layer in the MTJ, the thickness of the pinned layer 1231 is greatly reduced, the structure is simplified, and the tunneling layer 1233 and the free layer are reduced. 1234 interface roughness, and reduce stress accumulation, and is conducive to the scaling of MTJ. In addition, the thickness of the pinning layer 1231 is greatly reduced, that is, the thickness of the conductive material under the tunneling layer 1233 is reduced, which reduces the probability of short circuit caused by backsplash during the etching process, and improves the engineering yield.
  • the material of the pinning layer 1231 is a perpendicular magnetic anisotropy material.
  • the material of the pinning layer 1231 includes one or more of an iron-platinum (FePt) alloy and a cobalt-platinum (CoPt) alloy.
  • FePt iron-platinum
  • CoPt cobalt-platinum
  • the magnetization direction of the pinned layer 1231 is easily magnetized to be parallel to the stacking direction of each layer in the MTJ, so the thickness of the pinned layer 1231 can be set smaller, In this way, the structure is simplified, which is beneficial to reduce the roughness of the interface between the tunneling layer 1233 and the free layer 1234, reduce the stress accumulation, and is beneficial to the scaling of the MTJ.
  • the thickness of the pinning layer 1231 is greatly reduced, that is, the thickness of the conductive material under the tunneling layer 1233 is reduced, which reduces the probability of short circuit caused by backsplash during the etching process, and improves the engineering yield.
  • first magnetic structure 16 or the second magnetic structure 17 may be larger, equal to or smaller than the size of the MTJ element 12 in a direction perpendicular to the stacking direction of the layers in the MTJ.
  • an embodiment of the present application further provides an electronic device, the electronic device includes a circuit board and a memory connected to the circuit board, where the memory can be any of the memories provided above.
  • the circuit board may be a printed circuit board (printed circuit board, PCB), of course, the circuit board may also be a flexible printed circuit board (flexible printed circuit board, FPC), etc., the circuit board is not limited in this embodiment.
  • the electronic device is different types of user equipment or terminal equipment such as a computer, a mobile phone, a tablet computer, a wearable device, and a vehicle-mounted device; the electronic device may also be a network device such as a base station.
  • the electronic device further includes a packaging substrate, the packaging substrate is fixed on the printed circuit board PCB by solder balls, and the memory is fixed on the packaging substrate by solder balls.
  • embodiments of the present application further provide a non-transitory computer-readable storage medium used with a computer, the computer has software for creating an integrated circuit, and one or more storage media are stored on the computer-readable storage medium.
  • computer readable data structures, one or more computer readable data structures having photomask data used to manufacture the memory provided by any one of the illustrations provided above.

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Abstract

本申请实施例提供一种存储器及电子设备，涉及存储器技术领域，可以提高自由层的翻转速度。该存储器包括设置于存储器的存储区域内阵列分布的多个存储单元以及位线，存储单元包括晶体管以及与晶体管连接的磁隧道结MTJ元件；MTJ元件设置于晶体管的源极或者漏极与位线之间的电流传输路径上；MTJ元件包括依次层叠设置的钉扎层、参考层、隧穿层和自由层；钉扎层的磁化方向平行于MTJ中各层的堆叠方向；存储器还包括设置于电流传输路径上的第一磁性结构；其中，第一磁性结构在自由层产生的磁场的方向与自由层的磁化方向不平行。

Description

一种存储器及电子设备 技术领域
本申请涉及存储器技术领域，尤其涉及一种存储器及电子设备。
背景技术
磁性随机存取存储器(magnetic random access memory，MRAM)是一种新型非易失性存储器。其中，自旋转移距磁性随机存取存储器(spin transfer torque magnetic random access memory，STT MRAM)因其具有速度快、功耗低、COMS(complementary metal-oxide-semiconductor，互补式金属氧化物半导体)兼容性好等优势，得到了广泛关注。
自旋转移距磁性随机存取存储器的读写功能由自旋转移距磁性随机存取存储器的存储单元来实现。存储单元的主要结构由磁隧道结(magnetic tunneling junction，MTJ)元件和晶体管组成。MTJ的结构主要由存储信息的自由层、隧穿层、固定磁化方向的参考层和钉扎层依次层叠组成。其中，参考层的磁化方向被钉扎层钉扎在某一方向保持不变，自由层的磁化方向可以改变，电流由不同方向流过MTJ(电流由固定层流向自由层或者电流由自由层流向固定层)时，自由层的磁化方向会随之改变，当自由层的磁化方向和参考层的磁化方向平行，即自由层的磁化方向和参考层的磁化方向相同时，存储单元呈现低电阻，即可存储为“0”；当自由层的磁化方向和参考层的磁化方向反平行，即自由层的磁化方向和参考层的磁化方向相反时，存储单元呈现高电阻，即可存储为“1”。磁性随机存取存储器的读取是检测存储单元的电阻。恒定的小电流从位线流经MTJ，在MTJ的两端会产生电位差，根据电位差的大小，可以确定MTJ的电阻，进而可以判断磁性随机存取存储器存储的信息是“0”还是“1”。
目前，由于存储单元在写入数据时，自由层翻转的速度较慢，因而影响了存储单元的写入效率。
发明内容
本申请实施例提供一种存储器及电子设备，可以提高自由层的翻转速度。
为达到上述目的，本申请采用如下技术方案：
第一方面，提供一种存储器。该存储器包括设置于存储器的存储区域内阵列分布的多个存储单元以及位线，存储单元包括晶体管以及与晶体管连接的磁隧道结MTJ元件；MTJ元件设置于晶体管的源极或者漏极与位线之间的电流传输路径上；MTJ元件包括依次层叠设置的钉扎层、参考层、隧穿层和自由层；钉扎层的磁化方向平行于MTJ中各层的堆叠方向；存储器还包括设置于电流传输路径上的第一磁性结构；其中，第一磁性结构在自由层产生的磁场的方向与自由层的磁化方向不平行。由于第一磁性结构在自由层产生的磁场的方向与自由层的磁化方向不平行，因而第一磁性结构在自由层产生的磁场可以给自由层施加一个磁场力，有利于自由层的翻转，这样一来，降低了自由层翻转需要的电流，且降低了STT的孵化时间，提高了自由层的翻转速度，缩短了写入时间，提高了写入效率。
在一种可能的实施方式中，第一磁性结构在自由层产生的磁场的方向与自由层的磁化方向垂直。这样一来，第一磁性结构在自由层产生的磁场更大，更有利于自由层的翻转，因而可以进一步降低了STT的孵化时间，更有效地提高自由层的翻转速度。
在一种可能的实施方式中，存储器还包括设置于第一磁性结构和MTJ元件之间的连接层，第一磁性结构通过连接层与MTJ元件电连接；其中，MTJ元件在连接层上的投影和第一磁性结构在连接层上的投影至少部分区域不重叠。可以通过调整第一磁性结构的磁化方向以及MTJ元件与第一磁性结构在垂直于MTJ中各层的堆叠方向上的相对位置，来调整第一磁性结构在自由层产生的磁场的方向，以使第一磁性结构在自由层产生的磁场的方向与自由层的磁化方向不平行。
在一种可能的实施方式中，第一磁性结构连接于MTJ元件与晶体管的源极或漏极之间。
在一种可能的实施方式中，第一磁性结构连接于MTJ元件和位线之间。
在一种可能的实施方式中，MTJ元件还包括第一电极和第二电极；第一电极位于自由层远离钉扎层的一侧，第二电极位于钉扎层远离自由层的一侧；第一电极与位线电连接，第二电极与晶体管的源极或漏极电连接；或者，第一电极与晶体管的源极或漏极电连接，第二电极与位线电连接。此处，第一电极和第二电极上施加的电压大小决定了MTJ元件中电流的流向。
在一种可能的实施方式中，第一磁性结构的材料包括钴单质、铁单质、镍单质以及包含钴、铁、镍中至少一种的合金中的一种或多种。
在一种可能的实施方式中，钉扎层包括依次层叠设置的第一子钉扎层、非磁性层和第二子钉扎层；第一子钉扎层的磁化方向与第二子钉扎层的磁化方向相反。由于钉扎层包括第一子钉扎层和第二子钉扎层，且第一子钉扎层的磁化方向与第二子钉扎层的磁化方向相反，因而第一子钉扎层在自由层产生的杂散场的方向与第二子钉扎层在自由层产生的杂散场的方向相反，因此第一子钉扎层在自由层产生的杂散场和第二子钉扎层在自由层产生的杂散场可以抵消，从而可以降低或消除钉扎层在自由层产生的杂散场对自由层翻转的影响，进而降低自由层翻转需要的电流。
在一种可能的实施方式中，第一子钉扎层和第二子钉扎层均包括沿所述MTJ中各层的堆叠方向交替层叠设置的铁磁层和重金属层。
在一种可能的实施方式中，铁磁层的材料包括钴单质、铁单质、镍单质以及包含钴、铁、镍中至少一种的合金中的一种或多种；重金属层的材料包括铂单质、钽单质、铜单质、铱单质、钌单质、钨单质以及包含铂、钽、铜、铱、钌、钨中至少一种的合金中的一种或多种。
在一种可能的实施方式中，存储器还包括设置于电流传输路径上，且与MTJ元件接触的第二磁性结构；第二磁性结构的磁化方向与钉扎层的磁化方向的夹角为(90°,180°]；其中，第一磁性结构连接于MTJ元件与晶体管的源极或漏极之间，第二磁性结构连接于MTJ元件和位线之间；或者，第一磁性结构连接于MTJ元件和位线之间，第二磁性结构连接于MTJ元件与所述晶体管的源极或漏极之间。由于第二磁性结构的磁化方向与钉扎层的磁化方向的夹角为(90°,180°]，因而第二磁性结构在自由层产生的磁场可以抵消钉扎层在自由层产生的磁场，从而可以降低或消除自由层产生 的补偿场，这样一来，降低了自由层翻转需要的电流，且可以解决MTJ翻转不对称(即，使自由层的磁化方向向相反的两个方向改变时所需的电流大小不一样)的问题。
在一种可能的实施方式中，第二磁性结构的磁化方向与钉扎层的磁化方向相反，且第二磁性结构在自由层产生的磁场与钉扎层在自由层产生的磁场大小相同。这样一来，第二磁性结构在自由层产生的磁场可以抵消钉扎层在自由层产生的磁场，因此自由层受到的磁场为零或趋近于零，自由层因磁场产生的补偿场为零或趋近于零，这样一来，进一步降低了自由层翻转需要的电流，更有效地解决了MTJ翻转不对称的问题。
在一种可能的实施方式中，第二磁性结构的磁化方向与钉扎层的磁化方向相反，且第二磁性结构在自由层产生的磁场与钉扎层和参考层在自由层产生的磁场大小相同。这样一来，钉扎层和参考层在自由层产生的磁场都可以被第二磁性结构在自由层产生的磁场抵消，更进一步地降低了自由层翻转需要的电流。
在一种可能的实施方式中，钉扎层包括沿MTJ中各层的堆叠方向交替层叠设置的铁磁层和重金属层。由于钉扎层只包括沿MTJ中各层的堆叠方向交替层叠设置的铁磁层和重金属层，因而钉扎层的厚度大大减小，结构简化，有利于降低隧穿层和自由层界面的粗糙度，并降低应力累积，且有利于MTJ的微缩。此外，钉扎层的厚度大大减小，即隧穿层下方的导电材料的厚度降低，降低了刻蚀过程中反溅导致短路的概率，提高了工程良率。
在一种可能的实施方式中，钉扎层的材料为垂直磁各向异性材料。由于钉扎层的材料为垂直磁各向异性材料，因而钉扎层的磁化方向容易被磁化成平行于MTJ中各层的堆叠方向，因而钉扎层的厚度可以设置的较小，这样一来，结构简化，有利于降低隧穿层和自由层界面的粗糙度，并降低应力累积，且有利于MTJ的微缩。此外，钉扎层的厚度大大减小，即隧穿层下方的导电材料的厚度降低，降低了刻蚀过程中反溅导致短路的概率，提高了工程良率。
在一种可能的实施方式中，钉扎层的材料包括铁铂合金、钴铂合金中的一种或多种。此处，铁铂合金、钴铂合金都是垂直磁各向异性材料。
在一种可能的实施方式中，参考层和自由层的材料包括钴铁硼CoFeB合金；隧穿层的材料包括氧化镁MgO。
在一种可能的实施方式中，晶体管的栅极通过字线WL连接字线控制电路，晶体管的源极或漏极连接数据线；位线BL连接位线控制电路。
第二方面，提供一种电子设备。该电子设备包括电路板以及与电路板电连接的存储器，存储器为上述的存储器。该电子设备具有与前述实施例相同的技术效果，此处不再赘述。
附图说明
图1a为本申请的实施例提供的一种存储系统的结构示意图；
图1b为本申请的另一实施例提供的一种存储系统的结构示意图；
图1c为本申请的又一实施例提供的一种存储系统的结构示意图；
图2为本申请的实施例提供的一种存储器的结构示意图；
图3a为本申请的实施例提供的一种MTJ元件的结构示意图；
图3b为本申请的另一实施例提供的一种MTJ元件的结构示意图；
图4a为本申请的另一实施例提供的一种存储器的结构示意图；
图4b为本申请的实施例提供的一种MTJ元件、导电结构和第一磁性结构的结构示意图；
图5a为本申请的又一实施例提供的一种存储器的结构示意图；
图5b为本申请的另一实施例提供的一种MTJ元件、导电结构和第一磁性结构的结构示意图；
图6a为本申请的再一实施例提供的一种存储器的结构示意图；
图6b为本申请的实施例提供的一种MTJ元件和第一磁性结构的结构示意图；
图7a为本申请的另一实施例提供的一种存储器的结构示意图；
图7b为本申请的又一实施例提供的一种MTJ元件、导电结构和第一磁性结构的结构示意图；
图8a为本申请实施例提供的一种第一磁性结构或第二磁性结构体内的磁场方向和外部的磁场方向的示意图；
图8b为图8a中的黑色直线B标示的位置的平面的仿真结果图；
图9为MTJ元件的结构示意图；
图10为MTJ元件中第一子钉扎层、第二子钉扎层或钉扎层的结构示意图；
图11a为本申请的又一实施例提供的一种存储器的结构示意图；
图11b为本申请的实施例提供的一种MTJ元件、第一磁性结构和第二磁性结构的结构示意图；
图12a为本申请的再一实施例提供的一种存储器的结构示意图；
图12b为本申请的另一实施例提供的一种MTJ元件、第一磁性结构和第二磁性结构的结构示意图；
图13为图8a中的黑色直线A和黑色直线B标示位置的仿真结果图。
附图标记：
10-存储器；11-存储单元；12-MTJ元件；13-衬底基板；15-导电层；16-第一磁性结构；17-第二磁性结构；18-连接层；121-第一电极；122-第二电极；141-源极；142-漏极；143-有源层；144-栅极；151-第一导电部分；152-第二导电部分；1231-钉扎层；1232-参考层；1233-隧穿层；1234-自由层；1235-种子层；1236-结构转化层；1237-覆盖层。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。
除非另有定义，否则本文所用的所有科技术语都具有与本领域普通技术人员公知的含义相同的含义。
以下，术语“第一”、“第二”等仅用于描述方便，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”等的特征可以明示或者隐含地包括一个或者更多个该特征。此外，术语“电连接”可以是直接的电性连接，也可以通过中间媒介间接的电性连接。
需要说明的是，本申请中，“示例性的”或者“例如”等词用于表示作例子、例证或 说明。本申请中被描述为“示例性的”或者“例如”的任何实施例或设计方案不应被解释为比其他实施例或设计方案更优选或更具优势。确切而言，使用“示例性的”或者“例如”等词旨在以具体方式呈现相关概念。
本申请提供的技术方案可以应用于采用磁性随机存取存储器的各种存储系统中。例如，本申请提供的技术方案应用于计算机中。又例如，本申请提供的技术方案应用于包括存储器、或者包括处理器和存储器的存储系统中，该处理器可以为中央处理器(central processing unit，CPU)、人工智能(artificial intelligence，AI)处理器、数字信号处理器(digital signal processor)和神经网络处理器等。
图1a为本申请实施例提供的一种存储系统的结构示意图，存储系统可以包括存储装置，该存储装置可以为磁性随机存取存储器。可选的，该存储系统还可以包括CPU、缓存器(cache)和控制器等。
在一种实施例中，如图1a所示，该存储系统包括集成在一起的CPU、缓存器和存储装置。在另一种实施例中，如图1b所示，该存储系统可以为作为独立的存储器，该存储系统包括集成在一起的CPU、缓存器、控制器和存储装置，该存储装置通过该控制器与该缓存器和该CPU相耦合。在又一种实施例中，如图1c所示，该存储系统包括存储装置，以及集成在一起的CPU、缓存器、控制器和动态随机存储器(dynamic random access memory，DRAM)，该存储装置可以作为外部的存储装置与DRAM耦合；其中，该DRAM通过该控制器与该缓存器和该CPU相耦合。图1a、图1b和图1c中所示的各种存储系统中的CPU也可以替换为CPU核(core)。图1a、图1b和图1c中存储装置可以为磁性随机存取存储器。
本申请实施例提供一种磁性随机存取存储器(下文中称为存储器)，可以应用于上述的存储系统中。如图2所示，该存储器10的结构包括设置于存储器10的存储区域内阵列分布的多个存储单元11，存储单元11包括晶体管T以及与晶体管T连接的磁隧道结MTJ元件12。
上述晶体管T可以是薄膜晶体管(thin film transistor，TFT)，也可以是MOS(metal oxide semiconductor)管等其他类型晶体管。晶体管T包括源极、漏极、有源层、栅绝缘层以及栅极，源极和漏极均与有源层接触，栅绝缘层设置于栅极和有源层之间。
如图2所示，存储器10的结构还包括多条平行排列的字线(word line，WL)和多条平行排列的位线(bit line，BL)，且字线WL与位线BL相互交叉，例如，字线WL与位线BL相互垂直。在一些实施例中，存储器10还包括多条平行排列的数据线，数据线可以与位线BL平行。其中，晶体管T的栅极与字线WL电连接，晶体管T的源极或漏极与数据线电连接。此处，可以是晶体管T的源极与数据线电连接，此时数据线可以也称为源极线(source line，SL)；也可以是晶体管T的漏极与数据线电连接。附图2以晶体管T的源极与源极线电连接为例进行示意。
在一些实施例中，字线WL还与字线控制电路电连接，通过字线控制电路为字线WL提供高电平信号或低电平信号，以使晶体管T处于导通状态或截止状态。在晶体管T为N型晶体管的情况下，高电平信号控制晶体管T导通，低电平信号控制晶体管T截止。在晶体管T为P型晶体管的情况下，低电平信号控制晶体管T导通，高电平信号控制晶体管T截止。
在一些实施例中，位线BL还与位线控制电路电连接，通过位线控制电路为位线BL提供信号。
在一些实施例中，数据线接地。
MTJ元件12设置于晶体管T的源极或者漏极与位线BL之间的电流传输路径上。
如图3a所示，MTJ元件12包括第一电极121、第二电极122和位于第一电极121和第二电极122之间的MTJ，MTJ包括依次层叠设置的钉扎层1231、参考层1232、隧穿层1233和自由层1234；钉扎层1231的磁化方向(也可以称为磁矩方向)平行于MTJ中各层的堆叠方向。第一电极121位于自由层1234远离钉扎层1231的一侧，第二电极122位于钉扎层1231远离自由层1234的一侧。其中，MTJ元件12中的第一电极121与上述位线BL电连接，第二电极122与上述晶体管T的漏极或源极电连接；或者，第一电极121与上述晶体管T的漏极或源极电连接，第二电极122与上述位线BL电连接。下文中是以第一电极121与位线BL电连接，第二电极122与晶体管T的漏极电连接，晶体管T的源极与源极线SL电连接为例进行的说明。
应当理解到，在第二电极122或第一电极121与晶体管T的漏极电连接时，晶体管T的源极与数据线电连接。在第二电极122或第一电极121与晶体管T的源极电连接时，晶体管的漏极与数据线电连接。
需要说明的是，MTJ中各层的堆叠方向可以由钉扎层1231指向自由层1234，也可以由自由层1234指向钉扎层1231。附图3a和图3b钉扎层1231中标示的箭头为钉扎层1231的磁化方向。以MTJ中各层的堆叠方向为由钉扎层1231指向自由层1234的方向为例，在此情况下，图3a和图3b中钉扎层1231标示的箭头也可以表示MTJ中各层的堆叠方向。以MTJ中各层的堆叠方向为由钉扎层1231指向自由层1234的方向为例，钉扎层1231的磁化方向平行于MTJ中各层的堆叠方向可以是钉扎层1231的磁化方向与MTJ中各层的堆叠方向相同，即钉扎层1231的磁化方向为由钉扎层1231指向自由层1234的方向；也可以是钉扎层1231的磁化方向与MTJ中各层的堆叠方向平行且相反，即钉扎层1231的磁化方向为由自由层1234指向钉扎层1231的方向。
此外，参考层1232是MTJ中具有固定磁化方向的膜层，钉扎层1231和参考层(也可以称为被钉扎层)1232之间具有很强的铁磁耦合作用，参考层1232的磁化方向可以被钉扎层1231钉扎在固定的方向上，参考层1232的磁化方向很难被改变。参考层1232的磁化方向和钉扎层1231的磁化方向相同，因而参考层1232的磁化方向也平行于MTJ中各层的堆叠方向。此外，钉扎层1231用于使参考层1232的磁化方向钉扎在固定的方向上，因而钉扎层1231的磁化方向应不易改变，即钉扎层1231应具有较大的矫顽场。而参考层1232和自由层1234之间由于隧穿层1233的作用，处于退耦合的状态，因此自由层1234的磁化方向很容易在外加磁场的作用下发生改变，自由层1234的磁化方向与参考层1232的磁化方向可以呈平行或反平行状态，即自由层1234的磁化方向与参考层1232的磁化方向可以相同或相反。
基于上述，由于钉扎层1231、参考层1232以及自由层1234的磁化方向均平行于MTJ中各层的堆叠方向，因而本申请实施例中的MTJ为具有垂直磁各向异性(perpendicular magnetic anisotropy，PMA)的MTJ。
上述参考层1232和自由层1234为磁性层，示例的，参考层1232和自由层1234 的材料包括钴铁硼(CoFeB)合金、钴铁(CoFe)合金或镍铁钴(NiFeCo)合金中的一种或多种。以参考层1232和自由层1234的材料为CoFeB合金为例，具体地，参考层1232和自由层1234的材料可以为(Co xFe 1-x) 1-yB y，其中，x，y均界于0-0.30之间。
上述隧穿层1233为非磁性层，示例的，隧穿层1233的材料包括氧化镁(MgO)或三氧化二铝(Al 2O 3)中的一种或多种。
为了便于生长钉扎层1231，因而在一些实施例中，如图3b所示，MTJ元件12还包括设置在第二电极122和钉扎层1231之间的种子层(seed)1235，可以在种子层1235上生长钉扎层1231。
考虑到参考层1232的材料一般为001晶向，钉扎层1231的材料一般为111晶向，由于参考层1232和钉扎层1231的晶格差异较大，因而在钉扎层1231上生长参考层1232比较困难，会造成粗糙度累积、应力累积等。基于此，在一些实施例中，如图3b所示，MTJ元件12还包括设置在参考层1232和钉扎层1231之间的结构转化层1236，结构转化层1236的材料为非晶材料。
由于设置在参考层1232和钉扎层1231之间的结构转化层1236的材料为非晶材料，而非晶材料没有固定的晶向，因而在结构转化层1236上生长参考层1232可以避免晶格差异导致的生长困难，以及粗糙度累积、应力累积等问题。
示例的，结构转化层1236的材料为钽(Ta)、钽合金、钽钨合金中的一种或多种。其中，钽为非晶材料。
在此基础上，在一些实施例中，如图3b所示，MTJ元件12还包括设置在自由层1234远离隧穿层1233一侧，且与自由层1234接触的覆盖层(capping)1237。此处，增加覆盖层1237后，覆盖层1237和自由层1234的界面有利于增大自由层1234的垂直磁各向异性，从而可以达到增大数据保存时间的目的。
示例的，覆盖层1237的材料包括氧化镁。
应当理解到，隧穿层1233位于参考层1232和自由层1234之间，在读取MTJ元件12存储的数据时，MTJ元件12的隧穿磁电阻(tunneling magneto resistance，TMR)的90％以上源自于隧穿层1233，因而隧穿层1233的电阻应设置的较大，而覆盖层1237位于自由层1234远离隧穿层1233一侧，覆盖层1237在用于起增大自由层1234的垂直磁各向异性的作用的同时，还用于电流的传输，因此覆盖层1237的电阻应设置的较小。也就是说，隧穿层1233的电阻远大于覆盖层1237的电阻。当隧穿层1233的材料和覆盖层1237的材料均选用氧化镁时，由于隧穿层1233的电阻远大于覆盖层1237的电阻，因而可以通过调整覆盖层1237的厚度较小以使得覆盖层1237的电阻的较小。当然还可以采用镁氧化生长的方式形成氧化镁，这样形成的氧化镁的电阻较小。
磁性随机存取存储器实现读写的关键是具有较大的隧穿磁电阻，同时具有高自旋转移效率，而本申请上述的MTJ结构可以获得较大的隧穿磁电阻(150％-250％),同时具有高自旋转移效率(＞0.8)，因此能够确保实现读写功能。
基于上述存储器10的结构，以下以一个存储单元11为例，介绍存储器10的工作过程。
存储单元11在写入时，晶体管T处于导通状态，当电流方向由自由层1234流向 参考层1232，即自旋电子从参考层1232流向自由层1234，自旋电子通过参考层1232时，电流中的电子沿着参考层1232的磁化方向被自旋极化，电子的自旋磁矩与参考层1232的磁化方向平行，电子穿过隧穿层1233到达自由层1234时，自旋电子将自旋矩(也称为自旋角动量，即STT)传递给自由层1234，而受到自旋矩效应的自由层1234，其磁化强度小，因而自由层1234的磁化方向能够根据自旋电流中自旋电子的极化方向自由地发生变化，最终使得自由层1234的磁化方向和参考层1232的磁化方向呈平行状态，即自由层1234的磁化方向与参考层1232的磁化方向相同，可以代表写入信息是“0”。
当电流方向由参考层1232流向自由层1234，即自旋电子从自由层1234流向参考层1232时，自旋电子与参考层1232中的磁矩发生交换耦合作用，使自旋平行于参考层1232的磁化方向的电子通过，而自旋反平行于参考层1232磁化方向的电子被反射，被反射的电子穿过隧穿层1233到达自由层1234，并与自由层1234磁矩发生交换耦合作用，使自由层1234的磁化方向向着参考层1232磁化方向的反方向转动，最终使得自由层1234的磁化方向与参考层1232的磁化方向呈反平行状态，即自由层1234的磁化方向与参考层1232的磁化方向相反，可以代表写入信息是“1”。此处电流方向可以通过位线BL和源极线SL上提供的电压控制，当位线BL提供的电压大于源极线SL提供的电压，电流由自由层1234流向参考层1232；当位线BL提供的电压小于源极线SL提供的电压，电流由参考层1232流向自由层1234。
存储单元11在读取时，恒定的小电流从位线BL经过MTJ到导通的晶体管T的漏极流出，在MTJ的两端会产生电位差。根据电位差的大小，可以确定MTJ的电阻，即，可以得到自由层1234与参考层1232的磁化方向的相对取向关系，进而可以判断存储单元11存储的信息是“0”还是“1”。具体的，MTJ呈现低电阻，自由层1234的磁化方向与参考层1232的磁化方向呈平行状态，存储单元11存储的信息为“0”；MTJ呈现高电阻，自由层1234的磁化方向与参考层1232的磁化方向呈反平行状态，存储单元11存储的信息为“1”。
应当理解到，存储器10在存储信息和读取信息时，字线控制电路逐行给字线提供选通信号，以使多行存储单元11中的晶体管T逐行导通，进而可以逐行写入信息或读取信息。
基于上述存储单元11的工作原理，本申请实施例提供的存储器10也可以称为自旋转移距磁性随机存取存储器。
参考图4a、图5a以及图6a，上述存储器10还可以包括衬底基板13，晶体管T、MTJ元件12以及其它图案等均设置于衬底基板13上。附图4a、图5a以及图6a均以晶体管为MOS管为例进行示意，示意出了晶体管T的源极141、漏极142、有源层143以及栅极144，设置在栅极144和有源层143之间的栅绝缘层未示意出。
应当理解到，在存储器10的制程中，在衬底基板13上制作完晶体管T后，不是直接制作MTJ元件12，通常在制作完晶体管T之后，制作MTJ元件12之前，还会形成其它导电功能图案和绝缘层(附图4a、图5a以及图6a未示意出导电功能图案和绝缘层)。基于此，为了将晶体管T的漏极142与MTJ元件12中的第二电极122电连接在一起，因而如图4a、图5a以及图6a所示，在晶体管T的漏极142和MTJ元件 12之间的电流传输路径上，第二电极122与晶体管T的漏极142之间串联有至少一个导电结构15(也可以称为导电管或金属导电管)，第二电极122通过该至少一个导电结构15与晶体管T的漏极142电连接。同样的，在制作完MTJ元件12之后，制作位线BL之前，也会形成导电功能图案和绝缘层。基于此，为了将第一电极121与位线BL电连接在一起，因而如图4a、图5a以及图6a所示，在MTJ元件12与位线BL之间的电流传输路径上，第一电极121与位线BL之间串联有至少一个导电结构15，第一电极121通过该至少一个导电结构15与位线BL电连接。其中，导电结构15与导电功能图案可以同步形成。
在此基础上，如图4a、图5a以及图6a所示，本申请实施例提供的存储器10还包括设置于电流传输路径上的第一磁性结构16；其中，第一磁性结构16在自由层1234产生的磁场(该磁场可以称为静磁场或杂散场)的方向与自由层1234的磁化方向不平行。
相对于现有技术，本申请实施例在晶体管T的源极141或漏极142与位线BL之间的电流传输路径上，增加了第一磁性结构16。
应当理解到，由于第一磁性结构16设置于晶体管T的源极141或漏极142与位线BL之间的电流传输路径上，因而第一磁性结构16具有导电性。
以下示例性地提供两种实施方式以实现第一磁性结构16在自由层1234产生磁场的方向与自由层1234的磁化方向不平行。
在第一种实施方式中，如图4a、图5a以及图6a所示，上述存储器还包括设置于第一磁性结构16和MTJ元件12之间的连接层18，第一磁性结构16通过连接层18与MTJ元件12电连接；其中，MTJ元件12在连接层18上的投影和第一磁性结构16在连接层18上的投影至少部分区域不重叠。
在该实施方式中，在一些实施例中，第一磁性结构16的磁化方向平行于MTJ中各层的堆叠方向。
需要说明的是，为了确保外加磁场去除后，第一磁性结构16的磁化方向能够仍然保持不变，例如第一磁性结构16的磁化方向平行于MTJ中各层的堆叠方向，也即，为了使第一磁性结构16具有磁形状各向异性，因此该第一磁性结构16沿平行于MTJ中各层的堆叠方向的长度大于或等于其沿垂直于MTJ中各层的堆叠方向的长度。在第一磁性结构16为圆柱体的情况下，第一磁性结构16的高度大于或等于第一磁性结构16的直径。
在此基础上，可以通过调整第一磁性结构16的磁化方向以及MTJ元件12与第一磁性结构16在垂直于MTJ中各层的堆叠方向上的相对位置，来调整第一磁性结构16在自由层1234产生的磁场的方向。
此外，在一些示例中，MTJ元件12在连接层18上的投影和第一磁性结构16在连接层18上的投影部分区域重叠，部分区域不重叠。在另一些示例中，MTJ元件12在连接层18上的投影和第一磁性结构16在连接层18上的投影不重叠，即MTJ元件12在连接层18上的投影和第一磁性结构16在连接层18上的投影无重叠区域。本申请实施例附图均以MTJ元件12在连接层18上的投影和第一磁性结构16在连接层18上的投影无重叠区域为例进行示意。
在第二种实施方式中，如图7a和图7b所示，第一磁性结构16与MTJ元件12接触，且第一磁性结构16的磁化方向垂直于MTJ中各层的堆叠方向。
此处，以MTJ中各层的堆叠方向为竖直方向为例，第一磁性结构16的磁化方向可以是水平向左，也可以是水平向右。
应当理解到，当第一磁性结构16的磁化方向垂直于MTJ中各层的堆叠方向时，如图7a和图7b所示，第一磁性结构16在自由层1234产生的磁场的方向与MTJ中各层的堆叠方向垂直。
需要说明的是，为了确保外加磁场去除后，第一磁性结构16的磁化方向能够仍然保持垂直于MTJ中各层的堆叠方向，不发生变化，即为了使第一磁性结构16具有磁形状各向异性，因此该第一磁性结构16沿垂直于MTJ中各层的堆叠方向的长度大于或等于其沿平行于MTJ中各层的堆叠方向的长度。在第一磁性结构16为圆柱体的情况下，第一磁性结构16的直径大于或等于第一磁性结构16的高度。
另外，上述的存储器10可以包括一个第一磁性结构16，在此情况下，可以是如图4a和图4b所示，第一磁性结构16连接于MTJ元件12与晶体管T的源极141或漏极142之间。在存储器10包括连接层18的情况下，第一磁性结构16通过连接层18与MTJ元件12电连接。也可以是如图5a和图5b所示，第一磁性结构16连接于MTJ元件12和位线BL之间。在存储器10包括连接层18的情况下，第一磁性结构16通过连接层18与MTJ元件12电连接。存储器10还可以包括两个第一磁性结构16，在此情况下，如图6a和图6b所示，一个第一磁性结构16连接于MTJ元件12与晶体管T的源极141或漏极142之间，另一个第一磁性结构16连接于MTJ元件12和位线BL之间。在存储器10包括连接层18的情况下，两个第一磁性结构16分别通过两个连接层18与MTJ元件12电连接，这两个第一磁性结构16在连接层18上的投影可以有重叠区域，也可以无重叠区域。图6a和图6b以这两个第一磁性结构16在连接层18上的投影无重叠区域为例进行示意。
在一些实施例中，上述第一磁性结构16的材料包括钴单质、铁单质、镍单质以及包含钴、铁、镍中至少一种的合金中的一种或多种。
其中，包含钴、铁、镍中至少一种的合金例如可以为CoB(钴硼)合金、FeB(铁硼)合金。
示例的，上述连接层16的材料可以为铜(Cu)。
可以理解的是，存储器10中的导电结构15的材料为非磁性材料，例如铜。
需要说明的是，图4a、图4b、图5a、图5b、图6a、图6b、图7a以及图7b中的虚曲线表示第一磁性结构16的磁力线。
在本申请的一些实施例中，可以通过填孔工艺形成第一磁性结构16，具体过程为：先形成一层绝缘层，绝缘层包括过孔(via)；接下来，沉积一层磁性薄膜；接下来，磨平过孔以外的磁性薄膜，以在过孔内形成第一磁性结构16。
此外，图4a、图5a、图6a以及图7a中有的导电层15包括第一导电部分151和第二导电部分152，这是因为在制作导电结构15时，先形成一层绝缘层，绝缘层包括过孔；接下来，形成导电薄膜，将导电薄膜沉积在绝缘层的过孔内的部分称为第一导电部分151，对导电薄膜进行构图，形成上述的导电功能图案，同时将沉积在过孔上 方的导电薄膜经构图后形成的部分称为第二导电部分152。
另外，在存储器10包括连接于MTJ元件12和位线BL之间，且与MTJ元件12接触的导电结构15时，该导电结构15可以如图4a所示，包括第一导电部分151和第二导电部分152，具体制作过程可以参考上述，此处不再赘述。
在存储器10包括连接于MTJ元件12与晶体管T的源极141或漏极142之间，且与MTJ元件12接触的导电结构15时，该导电结构15可以包括第一导电部分151和第二导电部分，具体制作过程可以参考上述，此处不再赘述。该导电结构15也可以如图5a所示，包括第一导电部分151，但不包括第二导电部分152，具体制作过程为：先形成绝缘层，绝缘层包括过孔；接下来，形成导电薄膜；接下来，去除(例如磨平)过孔外的导电薄膜,导电薄膜沉积在绝缘层的过孔内部分形成第一导电部分151，即导电结构15。
如图4a所示，在存储器10包括连接于MTJ元件12与晶体管T的源极141或漏极142之间的第一磁性结构16时，制作完第一磁性结构16后，形成一层导电薄膜，对导电薄膜进行构图，以形成连接层18，之后形成MTJ元件12。
如图5a所示，在存储器10包括连接于MTJ元件12和位线BL之间的第一磁性结构16时，在制作完MTJ元件12之后，形成连接层18，接下来形成第一磁性结构16。形成连接层18的过程可以参考上述，此处不再赘述。在此基础上，形成第一磁性结构16之后，形成导电结构15的过程可以为如图5a和图6a所示，形成导电薄膜，对导电薄膜进行构图，形成导电结构15；也可以为先形成绝缘层，绝缘层包括过孔；接下来，形成导电薄膜，导电薄膜沉积在绝缘层的过孔内的部分形成导电结构15的第一导电部分151，对导电薄膜进行构图，形成上述的导电功能图案，同时沉积在过孔上方的导电薄膜经构图后形成的部分为导电结构15的第二导电部分152。
应当理解到，当第一磁性结构16在自由层1234产生的磁场的方向与自由层1234的磁化方向垂直时，自由层1234在翻转时，第一磁性结构16在自由层1234产生的磁场可以给自由层1234施加一个磁场力，有利于自由层1234的翻转；当第一磁性结构16在自由层1234产生的磁场的方向与自由层1234的磁化方向不平行，且不垂直时，自由层1234在翻转时，第一磁性结构16在自由层1234产生的磁场在垂直于MTJ中各层的堆叠方向上的磁场分量(也可以称为面内分量)，即第一磁性结构16在自由层1234产生的净面内场，可以给自由层1234施加一个磁场力，有利于自由层1234的翻转。
本申请实施例提供一种存储器10，该存储器10包括多个存储单元11以及位线BL，存储单元11包括晶体管T以及与晶体管T连接的MTJ元件12，MTJ元件12设置于晶体管T的源极141或者漏极142与位线BL之间的电流传输路径上；MTJ元件12包括依次层叠设置的钉扎层1231、参考层1232、隧穿层1233和自由层1234，钉扎层1231的磁化方向平行于MTJ中各层的堆叠方向；存储器10还包括设置于电流传输路径上的第一磁性结构16；其中，第一磁性结构16在自由层1234产生的磁场的方向与自由层1234的磁化方向不平行。由于第一磁性结构16在自由层1234产生的磁场的方向与自由层1234的磁化方向不平行，因而第一磁性结构16在自由层1234产生的磁场可以给自由层1234施加一个磁场力，有利于自由层1234的翻转，这样一来，降低 了自由层1234翻转需要的电流，且降低了STT的incubation time(孵化时间)，提高了自由层1234的翻转速度，缩短了写入时间，提高了存储单元11的写入效率。
在一些实施例中，第一磁性结构16在自由层1234产生的磁场的方向与自由层1234的磁化方向垂直。
应当理解到，当第一磁性结构16通过连接层18与MTJ元件12电连接，且第一磁性结构16的磁化方向平行于MTJ中各层的堆叠方向时，通过调整MTJ元件12与第一磁性结构16在垂直于MTJ中各层的堆叠方向上的相对位置，可以使得第一磁性结构16在自由层1234产生的磁场的方向与自由层1234的磁化方向垂直。在第一磁性结构16的磁化方向平行于MTJ中各层的堆叠方向的情况下，第一磁性结构16的磁化方向可以与钉扎层1231的磁化方向相同，也可以与钉扎层1231的磁化方向相反。
由于当第一磁性结构16在自由层1234产生的磁场的方向与自由层1234的磁化方向垂直时，第一磁性结构16在自由层1234产生的磁场更大，更有利于自由层1234的翻转，因而可以进一步降低自由层1234翻转需要的电流，且进一步降低了STT的孵化时间，更有效地提高自由层1234的翻转速度。
参考图8a和图8b，图8a为模拟仿真的示意图，图8a中的方框表示第一磁性结构16，第一磁性结构16的磁化方向平行于MTJ中各层的堆叠方向，图8a示意出了第一磁性结构16体内的磁场方向以及外部产生的杂散场的方向。其中图8a中用箭头表示第一磁性结构16所处空间的磁场方向，第一磁性结构16所处空间的磁场方向包括第一磁性结构16体内的磁场方向以及外部产生的杂散场的方向。图8a中黑色直线A平行于MTJ中各层的堆叠方向。从图8a中黑色直线B所示的位置可以看出，在该黑色直线B所示的位置的平面上，在第一磁性结构16上方的两侧可以产生面内杂散场(即磁场方向垂直于MTJ中各层的堆叠方向的杂散场)。图8b为图8a中黑色直线B所示的位置的平面的仿真结果图，图8b中的虚线圈表示MTJ。根据图8b可知，在图8a中黑色直线B所示的位置的平面上，在第一磁性结构16上方的两侧会产生一个绝对值大小约为3000e-800Oe的面内杂散场，可以利用该杂散场翻转自由层1234。此外，移动MTJ(图8b中的虚线圈)，可以选择MTJ受到的第一磁性结构16产生的面内杂散场的大小，即调节MTJ和第一磁性结构16在垂直于MTJ中各层的堆叠方向(例如水平方向)上的相对位置可以调节MTJ受到的第一磁性结构16产生的面内杂散场的大小。
自由层1234翻转需要的电流J th可以根据以下公式计算：
Figure PCTCN2020132932-appb-000001
其中，H X是第一磁性结构16在自由层1234产生的面内场(即第一磁性结构16在自由层1234产生的磁场方向为垂直于MTJ中各层的堆叠方向的磁场)，H K,eff是有效各向异性场，M S是饱和磁化强度，t F是自由层1234的厚度，e是电子常量，α是磁阻尼系数(magnetic damping)，h是普朗克常数，η是自旋转移效率。
根据上述公式可知，第一磁性结构16在自由层1234产生的面内场能明显减小自由层 1234翻转需要的电流的大小，同时面内场作用于自由层1234的磁化方向的同时，加强了热扰动的效果，降低了STT的孵化时间，加快了自由层1234的翻转，减小了MTJ的写时长，进一步减小了MTJ的动态写功耗。
在此基础上，考虑到钉扎层1231在自由层1234产生的磁场，即钉扎层1231在自由层1234产生的杂散场会导致自由层1234产生较大的补偿场，进而可能导致自由层1234翻转需要的电流增大。基于此，为了避免钉扎层1231产生的杂散场，提高自由层1234翻转需要的电流，以下示例性地提供两种解决方式。
方式一：如图9所示，钉扎层1231包括依次层叠设置的第一子钉扎层1231a、非磁性层1231b和第二子钉扎层1231c；第一子钉扎层1231a的磁化方向与第二子钉扎层1231c的磁化方向相反。
此处，如图10所示，第一子钉扎层1231a和第二子钉扎层1231c均包括沿MTJ中各层的堆叠方向交替层叠设置的铁磁层和重金属层。
需要说明的是，第一子钉扎层1231a中铁磁层和重金属层的层数与第二子钉扎层1231c中铁磁层和重金属层的层数不相同。示例的，第一子钉扎层1231a包括沿MTJ中各层的堆叠方向交替层叠设置的钴层和铂层，表示为[Co/Pt]M，第二子钉扎层1231c包括沿MTJ中各层的堆叠方向交替层叠设置的钴层和铂层，表示为[Co/Pt]N，M,N均为正整数，均表示钴层的层数或铂层的层数，其中，M,N的大小不同。
在一些实施例中，上述铁磁层的材料包括钴单质、铁单质、镍单质以及包含钴、铁、镍中至少一种的合金中的一种或多种。
在一些实施例中，上述重金属层的材料包括铂(Pt)单质、钽单质、铜(Cu)单质、铱(Ir)单质、钌(Ru)单质、钨(W)单质以及包含铂、钽、铜、铱、钌、钨中至少一种的合金中的一种或多种。
在一些实施例中，非磁性层1231b的材料包括铂单质、钽单质、铜单质、铱单质、钌单质、钨单质以及包含铂、钽、铜、铱、钌、钨中至少一种的合金中的一种或多种。
可以理解的是，若第一子钉扎层1231a相对于第二子钉扎层1231c靠近参考层1232，则参考层1232的磁化方向与第一子钉扎层1231a的磁化方向相同；若第二子钉扎层1231c相对于第一子钉扎层1231a靠近参考层1232，则参考层1232的磁化方向与第二子钉扎层1231c的磁化方向相同。
本申请实施例中，由于钉扎层1231包括第一子钉扎层1231a和第二子钉扎层1231c，且第一子钉扎层1231a的磁化方向与第二子钉扎层1231c的磁化方向相反，因而第一子钉扎层1231a在自由层1234产生的杂散场的方向与第二子钉扎层1231c在自由层1234产生的杂散场的方向相反，因而第一子钉扎层1231a在自由层1234产生的杂散场和第二子钉扎层1231c在自由层1234产生的杂散场可以抵消，从而可以降低或消除钉扎层1231在自由层1234产生的杂散场对自由层1234翻转的影响，进而降低自由层1234翻转需要的电流。
在一些实施例中，第一子钉扎层1231a在自由层1234产生的杂散场和第二子钉扎层1231c在自由层1234产生的杂散场大小相同。这样一来，第一子钉扎层1231a在自由层1234产生的杂散场和第二子钉扎层1231c在自由层1234产生的杂散场可以完全抵消，从而可以进一步降低自由层1234翻转需要的电流。
方式二：
在一些实施例中，如图11a和图11b所示，上述存储器10还包括设置于电流传输路径上，且与MTJ元件12接触的第二磁性结构17；第二磁性结构17的磁化方向与钉扎层1231的磁化方向的夹角为(90°,180°]，即第二磁性结构17的磁化方向与钉扎层1231的磁化方向的夹角大于90°，小于等于180°。
其中，如图11a和图11b所示，第一磁性结构16连接于MTJ元件12与晶体管T的源极141或漏极142之间，第二磁性结构17连接于MTJ元件12和位线BL之间；或者，如图12a和图12b所示，第一磁性结构16连接于MTJ元件12和位线BL之间，第二磁性结构17连接于MTJ元件12与晶体管T的源极141或漏极142之间。
此处，形成第二磁性结构17的过程可以与上述形成第一磁性结构16的过程相同，可以参考上述，此处不再赘述。
应当理解到，由于第二磁性结构17设置于晶体管T的源极141或漏极142与位线BL之间的电流传输路径上，因而第二磁性结构17具有导电性。
可以理解的是，由于第二磁性结构17的磁化方向与钉扎层1231的磁化方向的夹角为(90°,180°]，因此第二磁性结构17在自由层1234产生的磁场的方向与钉扎层1231在自由层1234产生的磁场的方向的夹角为(90°,180°]。
此外，当第二磁性结构17在自由层1234产生的磁场的方向与钉扎层1231在自由层1234产生的磁场的方向的夹角为180°，即第二磁性结构17在自由层1234产生的磁场的方向与钉扎层1231在自由层1234产生的磁场的方向相反时，第二磁性结构17在自由层1234产生的磁场可以抵消钉扎层1231在自由层1234产生的磁场，因而可以降低钉扎层1231在自由层1234产生的磁场对自由层1234的影响。当第二磁性结构17在自由层1234产生的磁场的方向与钉扎层1231在自由层1234产生的磁场的方向的夹角为(90°,180°)时，在与钉扎层1231的磁化方向相反的方向上，第二磁性结构17在自由层1234会产生磁场分量，而第二磁性结构17在自由层1234产生的沿与钉扎层1231的磁化方向相反的方向上的磁场分量可以抵消钉扎层1231在自由层1234产生的磁场。
本申请实施例中，由于第二磁性结构17的磁化方向与钉扎层1231的磁化方向的夹角为(90°,180°]，因而第二磁性结构17在自由层1234产生的磁场可以抵消钉扎层1231在自由层1234产生的磁场，从而可以降低或消除自由层1234产生的补偿场，这样一来，降低了自由层1234翻转需要的电流，且可以解决MTJ翻转不对称(即，使自由层1234的磁化方向向相反的两个方向改变时所需的电流大小不一样)的问题。此外，由于钉扎层1231在自由层1234产生的磁场可以被第二磁性结构17在自由层1234产生的磁场抵消，因而无需提高电流来克服杂散场对自由层1234的影响存在的差异，这样一来，便可以利用较小的电流对自由层1234的磁化方向进行翻转，既可以降低功率，又可以提高MTJ的耐久性，提高了MTJ的寿命。
在一些示例中，第二磁性结构17的磁化方向与钉扎层1231的磁化方向相反，且第二磁性结构17在自由层1234产生的磁场与钉扎层1231在自由层1234产生的磁场大小相同。
当第二磁性结构17的磁化方向与钉扎层1231的磁化方向相反，且第二磁性结构 17在自由层1234产生的磁场与钉扎层1231在自由层1234产生的磁场大小相同时，第二磁性结构17在自由层1234产生的磁场可以抵消钉扎层1231在自由层1234产生的磁场，因此自由层1234受到的磁场为零或趋近于零，自由层1234因磁场产生的补偿场为零或趋近于零，这样一来，进一步降低了自由层1234翻转需要的电流，更有效地解决了MTJ翻转不对称的问题。
考虑到参考层1232在自由层1234也可能会产生杂散场，为了避免参考层1232在自由层1234产生的杂散场提高自由层1234翻转需要的电流，因此在一些示例中，第二磁性结构17的磁化方向与钉扎层1231的磁化方向相反，且第二磁性结构17在自由层1234产生的磁场与钉扎层1231和参考层1232在自由层1234产生的磁场大小相同。这样一来，钉扎层1231和参考层1232在自由层1234产生的磁场都可以被第二磁性结构17在自由层1234产生的磁场抵消，更进一步地降低了自由层1234翻转需要的电流。
参考图8a，以图8a中的方框表示第二磁性结构17，第二磁性结构17的磁化方向平行于MTJ中各层的堆叠方向，沿图8a中黑色直线A所示的位置可以看到，第二磁性结构17体内的磁场方向与外部产生的杂散场的方向相反。图13为图8a中的黑色直线A(即Z轴)和黑色直线B(即X轴)所示的位置的仿真结果图，横坐标表示X轴或Z轴的位置，图8a中a点表示Z轴的位置为-5.00E-08，图8a中b点表示X轴的位置为-5.00E-08，图13中纵坐标表示磁场(magnetic field)强度，单位为奥斯特(Oe)。从图13可以看出，沿X轴方向的磁场强度Hx的变化和沿Z轴方向的磁场强度Hz的变化。以MTJ位于第二磁性结构17的上方为例，图8a中的位置P表示自由层1234所在的位置，自由层1234在Z轴的位置为20nm，根据图13提供的仿真结果可知，第二磁性结构17在位置P大约会产生900Oe-2000Oe的杂散场，杂散场的方向与第二磁性结构17体内的磁场方向相反。基于此，可以利用第二磁性结构17产生的杂散场抵消钉扎层1231产生的杂散场。
在此基础上，基于方式二，为了减小钉扎层1231的厚度，降低MTJ的厚度，因此在一些实施例中，如图10所示，钉扎层1231包括沿MTJ中各层的堆叠方向交替层叠设置的铁磁层和重金属层。
示例的，钉扎层1231包括沿MTJ中各层的堆叠方向交替层叠设置的钴层和铂层([Co/Pt]n，n为正整数，表示钴层的层数或铂层的层数)。
需要说明的是，铁磁层和重金属层的材料可以参考上述，此处不再赘述。
由于钉扎层1231只包括沿MTJ中各层的堆叠方向交替层叠设置的铁磁层和重金属层，因而钉扎层1231的厚度大大减小，结构简化，有利于降低隧穿层1233和自由层1234界面的粗糙度，并降低应力累积，且有利于MTJ的微缩。此外，钉扎层1231的厚度大大减小，即隧穿层1233下方的导电材料的厚度降低，降低了刻蚀过程中反溅导致短路的概率，提高了工程良率。
在另一些实施例中，钉扎层1231的材料为垂直磁各向异性材料。
示例的，钉扎层1231的材料包括铁铂(FePt)合金、钴铂(CoPt)合金中的一种或多种。
由于钉扎层1231的材料为垂直磁各向异性材料，因而钉扎层1231的磁化方向容 易被磁化成平行于MTJ中各层的堆叠方向，因而钉扎层1231的厚度可以设置的较小，这样一来，结构简化，有利于降低隧穿层1233和自由层1234界面的粗糙度，并降低应力累积，且有利于MTJ的微缩。此外，钉扎层1231的厚度大大减小，即隧穿层1233下方的导电材料的厚度降低，降低了刻蚀过程中反溅导致短路的概率，提高了工程良率。
需要说明的是，本申请说明书附图4a、图4b、图5a、图5b、图6a、图6b、图7a、图7b、图11a、图11b、图12a以及图12b仅示意出MTJ元件12与第一磁性结构16或第二磁性结构17的连接关系以及位置关系，并不限定MTJ元件12与第一磁性结构16或第二磁性结构17的尺寸关系。沿垂直于MTJ中各层的堆叠方向的方向上，第一磁性结构16或第二磁性结构17的尺寸可以大于、等于或小于MTJ元件12的尺寸。
基于此，本申请实施例还提供一种电子设备，该电子设备包括电路板以及与电路板连接的存储器，该存储器可以为上文所提供的任一种存储器。其中，该电路板可以为印制电路板(printed circuit board，PCB)，当然电路板还可以为柔性电路板(flexible printed circuit board，FPC)等，本实施例对电路板不作限制。
可选的，该电子设备为计算机、手机、平板电脑、可穿戴设备和车载设备等不同类型的用户设备或者终端设备；该电子设备还可以为基站等网络设备。可选的，该电子设备还包括封装基板，该封装基板通过焊球固定于印刷电路板PCB上，该存储器通过焊球固定于封装基板上。需要说明的是，关于电子设备中存储器的相关描述，具体可以参见上述实施例关于存储器的描述，本申请实施例在此不再赘述。
在此基础上，本申请实施例还提供一种与计算机一起使用的非瞬时性计算机可读存储介质，该计算机具有用于创建集成电路的软件，该计算机可读存储介质上存储有一个或多个计算机可读数据结构，一个或多个计算机可读数据结构具有用于制造上文所提供的任意一个图示所提供的存储器的光掩膜数据。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (18)

  1. 一种存储器，其特征在于，包括设置于所述存储器的存储区域内阵列分布的多个存储单元以及位线，所述存储单元包括晶体管以及与所述晶体管连接的磁隧道结MTJ元件；
    所述MTJ元件设置于所述晶体管的源极或者漏极与所述位线之间的电流传输路径上；所述MTJ元件包括依次层叠设置的钉扎层、参考层、隧穿层和自由层；所述钉扎层的磁化方向平行于所述MTJ中各层的堆叠方向；
    所述存储器还包括设置于所述电流传输路径上的第一磁性结构；
    其中，所述第一磁性结构在所述自由层产生的磁场的方向与所述自由层的磁化方向不平行。
  2. 根据权利要求1所述的存储器，其特征在于，所述第一磁性结构在所述自由层产生的磁场的方向与所述自由层的磁化方向垂直。
  3. 根据权利要求1或2所述的存储器，其特征在于，所述存储器还包括设置于所述第一磁性结构和所述MTJ元件之间的连接层，所述第一磁性结构通过所述连接层与所述MTJ元件电连接；
    其中，所述MTJ元件在所述连接层上的投影和所述第一磁性结构在所述连接层上的投影至少部分区域不重叠。
  4. 根据权利要求1-3任一项所述的存储器，其特征在于，所述第一磁性结构连接于所述MTJ元件与所述晶体管的源极或漏极之间。
  5. 根据权利要求1-4任一项所述的存储器，其特征在于，所述第一磁性结构连接于所述MTJ元件和所述位线之间。
  6. 根据权利要求1-5任一项所述的存储器，其特征在于，所述MTJ元件还包括第一电极和第二电极；
    所述第一电极位于所述自由层远离所述钉扎层的一侧，所述第二电极位于所述钉扎层远离所述自由层的一侧；
    所述第一电极与所述位线电连接，所述第二电极与所述晶体管的源极或漏极电连接；或者，所述第一电极与所述晶体管的源极或漏极电连接，所述第二电极与所述位线电连接。
  7. 根据权利要求1-6任一项所述的存储器，其特征在于，所述第一磁性结构的材料包括钴单质、铁单质、镍单质以及包含钴、铁、镍中至少一种的合金中的一种或多种。
  8. 根据权利要求1-7任一项所述的存储器，其特征在于，所述钉扎层包括依次层叠设置的第一子钉扎层、非磁性层和第二子钉扎层；
    所述第一子钉扎层的磁化方向与所述第二子钉扎层的磁化方向相反。
  9. 根据权利要求8所述的存储器，其特征在于，所述第一子钉扎层和所述第二子钉扎层均包括沿所述MTJ中各层的堆叠方向交替层叠设置的铁磁层和重金属层。
  10. 根据权利要求9所述的存储器，其特征在于，所述铁磁层的材料包括钴单质、铁单质、镍单质以及包含钴、铁、镍中至少一种的合金中的一种或多种；
    所述重金属层的材料包括铂单质、钽单质、铜单质、铱单质、钌单质、钨单质以 及包含铂、钽、铜、铱、钌、钨中至少一种的合金中的一种或多种。
  11. 根据权利要求1-3任一项所述的存储器，其特征在于，所述存储器还包括设置于所述电流传输路径上，且与所述MTJ元件接触的第二磁性结构；所述第二磁性结构的磁化方向与所述钉扎层的磁化方向的夹角为(90°,180°]；
    其中，所述第一磁性结构连接于所述MTJ元件与所述晶体管的源极或漏极之间，所述第二磁性结构连接于所述MTJ元件和所述位线之间；或者，所述第一磁性结构连接于所述MTJ元件和所述位线之间，所述第二磁性结构连接于所述MTJ元件与所述晶体管的源极或漏极之间。
  12. 根据权利要求11所述的存储器，其特征在于，所述第二磁性结构的磁化方向与所述钉扎层的磁化方向相反，且所述第二磁性结构在所述自由层产生的磁场与所述钉扎层在所述自由层产生的磁场大小相同。
  13. 根据权利要求11或12所述的存储器，其特征在于，所述钉扎层包括沿所述MTJ中各层的堆叠方向交替层叠设置的铁磁层和重金属层。
  14. 根据权利要求11或12所述的存储器，其特征在于，所述钉扎层的材料为垂直磁各向异性材料。
  15. 根据权利要求14所述的存储器，其特征在于，所述钉扎层的材料包括铁铂合金、钴铂合金中的一种或多种。
  16. 根据权利要求1-15任一项所述的存储器，其特征在于，所述参考层和所述自由层的材料包括钴铁硼CoFeB合金；
    所述隧穿层的材料包括氧化镁MgO。
  17. 根据权利要求1所述的存储器，其特征在于，所述晶体管的栅极通过字线WL连接字线控制电路，所述晶体管的源极或漏极连接数据线；所述位线BL连接位线控制电路。
  18. 一种电子设备，包括电路板以及与所述电路板电连接的存储器，其特征在于，所述存储器为如权利要求1-17任一项所述的存储器。
PCT/CN2020/132932 2020-11-30 2020-11-30 一种存储器及电子设备 WO2022110212A1 (zh)

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