WO2022103666A1 - Fault-tolerant quantum hardware using hybrid acoustic-electrical qubits - Google Patents

Fault-tolerant quantum hardware using hybrid acoustic-electrical qubits Download PDF

Info

Publication number
WO2022103666A1
WO2022103666A1 PCT/US2021/058293 US2021058293W WO2022103666A1 WO 2022103666 A1 WO2022103666 A1 WO 2022103666A1 US 2021058293 W US2021058293 W US 2021058293W WO 2022103666 A1 WO2022103666 A1 WO 2022103666A1
Authority
WO
WIPO (PCT)
Prior art keywords
mechanical
qubit
clause
resonators
resonator
Prior art date
Application number
PCT/US2021/058293
Other languages
French (fr)
Other versions
WO2022103666A9 (en
Inventor
Patricio ARRANGOIZ ARRIOLA
Amir Safavi-Naeini
Oskar Jon Painter
Connor HANN
Fernando Brandao
Kyungjoo Noh
Joseph Kramer Iverson
Harald Esko Jakob Putterman
Christopher Chamberland
Earl CAMPBELL
Original Assignee
Amazon Technologies, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US17/098,240 external-priority patent/US11741279B2/en
Priority claimed from US17/098,248 external-priority patent/US12093785B2/en
Priority claimed from US17/098,232 external-priority patent/US11321627B1/en
Priority claimed from US17/098,237 external-priority patent/US11468219B2/en
Priority claimed from US17/098,245 external-priority patent/US11436398B2/en
Application filed by Amazon Technologies, Inc. filed Critical Amazon Technologies, Inc.
Priority to EP21815834.3A priority Critical patent/EP4244778A1/en
Priority to CN202180076347.2A priority patent/CN116547679A/en
Publication of WO2022103666A1 publication Critical patent/WO2022103666A1/en
Publication of WO2022103666A9 publication Critical patent/WO2022103666A9/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/40—Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/20—Models of quantum computing, e.g. quantum circuits or universal quantum computers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/70—Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation

Definitions

  • Quantum computing utilizes the laws of quantum physics to process information.
  • Quantum physics is a theory that describes the behavior of reality at the fundamental level. It is currently the only physical theory that is capable of consistently predicting the behavior of microscopic quantum objects like photons, molecules, atoms, and electrons.
  • a quantum computer is a device that utilizes quantum mechanics to allow one to write, store, process and read out information encoded in quantum states, e.g. the states of quantum objects.
  • a quantum object is a physical object that behaves according to the laws of quantum physics.
  • the state of a physical object is a description of the object at a given time.
  • the state of a two-level quantum system or simply, a qubit, is a list of two complex numbers, where the absolute value of the complex numbers must sum to one.
  • Each of the two numbers is called an amplitude, or quasi-probability.
  • the square of an amplitude gives a potentially negative probability.
  • each of the two numbers correspond to the square root that event zero and event one will happen, respectively.
  • a fundamental and counterintuitive difference between a probabilistic bit e.g.
  • Quantum computers are based on such quantum bits (qubits), which may experience the phenomena of “superposition” and “entanglement.” Superposition allows a quantum system to be in multiple states at the same time. For example, whereas a classical computer is based on bits that are either zero or one, a qubit may be both zero and one at the same time, with different probabilities assigned to zero and one. Entanglement is a strong correlation between quantum particles, such that the quantum particles are inextricably linked in unison even if separated by great distances.
  • a quantum algorithm is a reversible transformation acting on qubits in a desired and controlled way, followed by a measurement on one or multiple qubits. For example, if a system has two qubits, a transformation may modify four numbers; with three qubits this becomes eight numbers, and so on. As such, a quantum algorithm acts on a list of numbers exponentially large as dictated by the number of qubits.
  • the transform may be decomposed into small operations acting on a single qubit, or a set of qubits, as an example. Such small operations may be called quantum gates and the arrangement of the gates to implement a transformation may form a quantum circuit.
  • quantum computers may include qubits built from superconductors, trapped ions, semiconductors, photonics, etc. Each may experience different levels of interference, errors and decoherence. Also, some may be more useful for generating particular types of quantum circuits or quantum algorithms, while others may be more useful for generating other types of quantum circuits or quantum algorithms. Also, costs, run-times, error rates, error rates, availability, etc. may vary across quantum computing technologies. [0007] For some types of quantum computations, such as fault tolerant computation of large scale quantum algorithms, overhead costs for performing such quantum computations may be high.
  • FIG. 1A illustrates a system comprising a nano-mechanical linear resonator and an asymmetrically-threaded superconducting quantum interference device (ATS) that is configured to implement hybrid acoustic-electrical qubits, according to some embodiments.
  • ATS superconducting quantum interference device
  • FIG. 1B illustrates a modeling of a storage mode (a) and a dump mode (b) of a hybrid acoustic-electrical qubit, wherein for large energy decay rates (Kb) that are significantly larger than a two-phonon coupling rate (g 2 ), the dump mode can be adiabatically eliminated, such that the hybrid acoustic-electrical qubit can be modeled as having a single phonon decay rate (K1) and being driven by a two phonon drive having a two-phonon decay rate (K 2 ), according to some embodiments.
  • FIG. 2 illustrates a Foster network representing a one dimensional phononic-crystal- defect resonator (PCDR), according to some embodiments.
  • PCDR one dimensional phononic-crystal- defect resonator
  • FIG.3 illustrates a system comprising a plurality of nano-mechanical linear resonators and an asymmetrically-threaded superconducting quantum interference device (ATS) that is configured to provide multi-mode stabilization to hybrid acoustic-electrical qubits implemented via the plurality of nano-mechanical linear resonators, according to some embodiments.
  • ATS superconducting quantum interference device
  • FIG.4 illustrates a system comprising a plurality of nano-mechanical linear resonators and an asymmetrically-threaded superconducting quantum interference device (ATS) that is configured to provide multi-mode stabilization to hybrid acoustic-electrical qubits implemented via the plurality of nano-mechanical linear resonators, wherein a microwave filter suppresses correlated decay processes, according to some embodiments.
  • FIG. 5 illustrates a process of stabilizing a nano-mechanical resonator using an asymmetrically-threaded superconducting quantum interference device (ATS), according to some embodiments.
  • FIG. 4 illustrates a system comprising a plurality of nano-mechanical linear resonators and an asymmetrically-threaded superconducting quantum interference device (ATS) that is configured to provide multi-mode stabilization to hybrid acoustic-electrical qubits implemented via the plurality of nano-mechanical linear resonators, wherein a microwave filter suppresses correlated decay processes, according to some embodiments.
  • FIG. 6 illustrates a process of stabilizing multiple nano-mechanical resonators using a multiplexed ATS, according to some embodiments.
  • FIG.7 illustrates a data error occurring when measuring input errors for a set of qubits, wherein the data error causes multiple distinct syndromes, according to some embodiments.
  • FIG.8 illustrates a measurement of logical ⁇ ⁇ for a repetition code and a corresponding circuit for measuring the logical ⁇ for the repetition code, according to some embodiments.
  • FIG.10 illustrates a circuit for preparing S, wherein the CNOT gate is a single physical CNOT and ⁇ is applied if the measurement outcome is -1, according to some embodiments.
  • FIG. 11A illustrates a circuit for implementing a logical Toffoli gate using Toffoli magic state injection, wherein X and Z basis are measured, according to some embodiments.
  • FIG. 11B illustrates a table of Clifford error corrections to be applied based on the Z and X measurement basis of the circuit shown in FIG.11A, according to some embodiments.
  • FIG.12 illustrates a circuit for implementing a logical CZ gate using transversal CNOT gates and S gates, according to some embodiments.
  • FIG.13 illustrates a circuit for preparing the computational basis state according to some embodiments.
  • FIG. 14 illustrates a circuit for implementing a first step of a Toffoli magic state preparation using a controlled gA gate, wherein error correction (EC) is performed for one or more rounds using a STOP algorithm, according to some embodiments.
  • EC error correction
  • FIG. 15 illustrates circuits for implementing a second step of the Toffoli magic state preparation, wherein the measurement of g A is repeated a number of times corresponding to a code distance (d) minus one divided by two, wherein a round of repetition code stabilizer measurements are performed between rounds of measuring g A , and wherein the protocol is aborted and started anew if any of the error detection measurements or gA measurements are non-trivial, according to some embodiments.
  • FIG. 16 illustrates growing the computational basis state of , from a first code distance (d 1 ) to a second code distance (d 2 ), according to some embodiments.
  • FIG. 16 illustrates growing the computational basis state of , from a first code distance (d 1 ) to a second code distance (d 2 ), according to some embodiments.
  • FIG. 17 illustrates a circuit for measuring gA for a computational basis state with a code distance of three, according to some embodiments.
  • FIG.18 illustrates an alternative circuit for measuring g A for a computational basis state using a flag qubit, according to some embodiments.
  • FIG. 19A illustrates an implementation of the g A measurement for a distance 5 repetition code prepared using a GHZ state, according to some embodiments.
  • FIG. 19B illustrates a circuit equivalent for implementing the g A measurement shown in FIG.19A, according to some embodiments.
  • FIG.20A illustrates high-level steps of a protocol for implementing a STOP algorithm, according to some embodiments.
  • FIG. 20B illustrates high-level steps for determining a parameter (n diff ) used in the STOP algorithm, according to some embodiments.
  • FIG. 21 illustrates high-level steps of a protocol for growing a repetition code from a first code distance to a second code distance using a STOP algorithm, according to some embodiments.
  • FIG.22 illustrates high-level steps of a protocol for implementing a logical Toffoli gate using a bottom-up approach with Toffoli magic state injection, according to some embodiments.
  • FIG. 23 illustrates high-level steps for distilling a low-error rate logical Toffoli gate using multiple ones of the Toffoli magic states prepared using a bottom-up approach as described in FIG.22, according to some embodiments.
  • FIG. 24 illustrates a layout of multiple bottom up Toffoli magic states that are used to distill low-error rate logical Toffoli gates, according to some embodiments.
  • FIG.25 illustrates a gadget for injection of CCZ gates using a
  • FIG. 26 illustrates a circuit for implementing distillation of two low-error rate logical Toffoli gates (CCZ gates) from eight magic state inputs, according to some embodiments.
  • FIG. 24 illustrates a layout of multiple bottom up Toffoli magic states that are used to distill low-error rate logical Toffoli gates, according to some embodiments.
  • FIG.25 illustrates a gadget for injection of CCZ gates using a
  • FIG. 26 illustrates a circuit for implementing distillation of two low-error rate logical Tof
  • FIG. 27 illustrates a Litinski diagram for performing lattice surgery realization of a distillation of eight Toffoli magic states to yield two low-error rate logical Toffoli gates, according to some embodiments.
  • FIG. 28 illustrates a process for distilling low-error rate logical Toffoli gates from a plurality of noisy Toffoli magic states, according to some embodiments.
  • FIG.29A illustrates a process of distilling two low-error rate logical Toffoli gates from eight noisy Toffoli magic states, according to some embodiments.
  • FIG. 29B illustrates a process of distilling a low-error rate logical Toffoli gate from two noisy Toffoli magic states, according to some embodiments.
  • FIG. 29A illustrates a process of distilling two low-error rate logical Toffoli gate from two noisy Toffoli magic states, according to some embodiments.
  • FIG. 29B illustrates a process of distilling a low-error rate logical Toffoli gate from two noisy Toffoli magic states, according to some embodiments
  • FIG. 30 illustrates an example method of performing lattice surgery to distill a low- error rate logical Toffoli gate from a plurality of noisy Toffoli magic states, according to some embodiments.
  • FIG.31 illustrates a circuit for performing measurements of a readout qubit for a set of error correction gates in parallel with performing a next round of error correction gates, according to some embodiments.
  • FIG. 32 illustrates a more detailed circuit for performing measurements of a readout qubit for a set of error correction gates in parallel with performing a next round of error correction gates, according to some embodiments.
  • FIG.31 illustrates a circuit for performing measurements of a readout qubit for a set of error correction gates in parallel with performing a next round of error correction gates, according to some embodiments.
  • FIG. 32 illustrates a more detailed circuit for performing measurements of a readout qubit for a set of error correction gates in parallel with performing a next round of error correction gates, according to some embodiments.
  • FIG. 33 illustrates the more detailed circuit for performing measurements of a readout qubit for a set of error correction gates in parallel with performing a next round of error correction gates, wherein the circuit includes a deflation of the ancilla qubit prior to a swap to the readout qubit and wherein the measurement comprises a parity measurement of the readout qubit, according to some embodiments.
  • FIG.34 is a process flow diagram illustrating using a switch operator to excite a readout qubit such that a subsequent round of error correction gates can be applied in parallel with performing measurements of the readout qubit, according to some embodiments.
  • FIG. 35 is a process flow diagram illustrating a process for using deflation to perform measurements of a qubit, according to some embodiments.
  • FIG. 36A is a process flow diagram illustrating a process for deflating a cat qubit and measuring a “b” mode of the deflated cat qubit to determine information about a first mode of the deflated cat qubit, according to some embodiments.
  • FIG.36B is a process flow diagram illustrating another process for deflating a cat qubit and measuring a “b” mode of the deflated cat qubit to determine information about a first mode of the deflated cat qubit, according to some embodiments.
  • FIG. 36B is a process flow diagram illustrating another process for deflating a cat qubit and measuring a “b” mode of the deflated cat qubit to determine information about a first mode of the deflated cat qubit, according to some embodiments.
  • FIG. 37 is a process flow diagram illustrating a process for evolving a cat qubit via three wave or higher mixing Hamiltonian and performing a homodyne, heterodyne, or photo detection of the evolved cat qubit to measure a measured property of another bosonic mode of the cat qubit, according to some embodiments.
  • FIG.38 is a process flow diagram illustrating a process of utilizing a shifted Fock basis to simulate a cat qubit with according to some embodiments.
  • FIG.39 is a block diagram illustrating an example computing device that may be used in at least some embodiments.
  • the words “include,” “including,” and “includes” mean including, but not limited to.
  • the term “or” is used as an inclusive or and not as an exclusive or.
  • the phrase “at least one of x, y, or z” means any one of x, y, and z, as well as any combination thereof.
  • magic state distillation may be used for simulating non-Clifford gates in a fault tolerant way.
  • the Clifford operations must be encoded in a large distance code in order to have comparable failure rates with the magic states being distilled.
  • universal fault-tolerant quantum computers may be required to be built with the capability of implementing all gates from a universal gate set with low logical error rates. Further, the overhead cost for achieving such low error rates may need to be low.
  • Transversal gates are a natural way to implement such fault-tolerant gates.
  • efficiently implementing a universal gate set may involve multiple layers of a quantum computer/quantum algorithm.
  • building blocks of a quantum computer may include nano-mechanical resonators that are controlled using an asymmetrically-threaded superconducting quantum interference device (asymmetrically- threaded SQUID or ATS).
  • the nano-mechanical resonators may be configured to resonate at one or more frequencies and may be coupled to the ATS, wherein the ATS controls the phonic modes.
  • the ATS may be coupled to a bandpass filter and then an open transmission line that enables photons from the ATS to be adsorbed by the environment.
  • error correction may be implemented for the quantum computer comprising nano-mechanical resonators and an ATS.
  • error corrected codes may be built that utilize the ATS and phononic modes of the nano-mechanical resonators to detect and/or correct errors.
  • gates may be implemented for the quantum computer using the error corrected codes as inputs or outputs to the gates.
  • qubits of the gates may be error corrected.
  • logical gates may be built that utilize one or more of the physical gates.
  • a circuit for use in a quantum computer may comprise nano- mechanical linear resonators and an asymmetrically threaded superconducting quantum interference device (SQUID, ATS).
  • the nano-mechanical resonators and ATS may implement qubits that are hybrid acoustic-electrical qubits, for example as opposed to electromagnetic qubits.
  • both the nano-mechanical resonators and ATS may be situated on a same component and may provide for easily extending a system to include additional components with additional nano-mechanical resonators that implement additional hybrid acoustic-electrical qubits. This may also enable scaling of a number of qubits needed for a quantum computer by including more or fewer components. Such an approach may allow for simpler extension and scaling than a system wherein components that implement qubits are integrated into a single chip, and newly designed chips are required to extend or scale the system to have more or fewer qubits.
  • phononic resonators e.g. nano-mechanical resonators
  • ATS control circuit
  • electromagnetic resonators may be connected to a same control circuit, such as an ATS. This is due, at least in part, to the smaller size of the phononic resonators as compared to electromagnetic resonators.
  • cross-talk between the phononic resonators coupled to the same control circuit must be addressed in order to avoid errors.
  • Multiplexed control of phononic resonators using a common control circuit, such as an ATS is further discussed in detail below.
  • a structure of a chip comprising phononic resonators may take the form of a planar circuit with metal components that form superconducting circuits, such as the ATS.
  • the ATS may be physically connected via wire leads to very small (e.g. micron-sized or nano-sized) suspended mechanical devices, such a linear nano-mechanical resonator.
  • the suspended mechanical devices may be located on a same chip with the ATS circuit or may by located on a separate chip that has been heterogeneously integrated via a flip chip, or similar component, with a bottom chip comprising the ATS and/or additional suspended mechanical devices, e.g. other mechanical resonators.
  • electrical connections to the ATS may be laid on top of a piezoelectric material that has been etched into a pattern to form the nano-mechanical resonators.
  • different variables such as piezoelectric coefficient, density, etc. may affect how strongly coupled the ATS is to the mechanical resonators. This coupling may be expressed in terms of a phonon coupling rate in the Hamiltonian for the system.
  • a nano-structure such as a nano-mechanical resonator
  • very small capacitors are required since the nano-structure components, e.g. nano- mechanical resonators, are also very small.
  • an electrical circuit such as an ATS circuit
  • these other capacitances in the circuit may lower the signal voltage and thus dilute a signal directed to one of the nano-components, such as a nano-mechanical resonator.
  • a high-impedance inductor may be coupled in the control circuit between the ATS and the nano-mechanical resonator.
  • the high-impedance inductor may have a very low parasitic capacitance, thus electrical fields directed at the nano-mechanical resonators may act on the nano- mechanical resonators with only minimal dilution due to capacitance of the inductor (e.g. parasitic capacitance).
  • the high impedance inductor may suppress loss mechanisms.
  • the non-linear coupling of the nano-mechanical resonators may b e given by where is a coupling rate between a storage mode and a dump mode (b).
  • the non-linearity may be implemented using an asymmetrically threaded SQUID (superconducting quantum interference device), also referred to herein as an “ATS.”
  • the ATS may comprise a superconducting quantum interference device (SQUID) that has been split approximately in the middle by a linear inductor.
  • the ATS potential is given by the following equation: [ 0065] [0066] In the above equation, is the phase difference across the ATS, is the magnetic flux threading the left (right) loop, in units of the reduced magnetic flux quantum Here is the junction asymmetry.
  • This ATS potential can be further simplified by tuning ⁇ and with two separate flux lines.
  • FIG.1A illustrates ATS 102 included in control circuit 100, wherein ATS 102 includes separate flux lines 108 and 110. Note that FIG. 1A includes ATS 102 in control circuit 100 and also an enlarged depiction of ATS 102 adjacent to control circuit 102 that shows ATS 102 in more detail.
  • the flux lines may be set such that: [0067] In the above equations, is a small alternating current (AC) component added on top of the direct current (DC) basis. At this bias point, and assuming that then the equation above for can be reduced to: [0068]
  • quantum information may be stored in a state of a linear mechanical resonator.
  • quantum information may be stored in storage mode 106.
  • the stored quantum information may also be autonomously error corrected by way of artificially induced two-phonon driving and two-phonon decay controlled by the ATS. These two phonon processes are induced through the non-linear interaction g 2 between the storage mode a and an ancillary mode b, called the dump, such as dump mode 104 shown in FIG.
  • the dump mode is designed to have a large energy decay rate K d so that it rapidly and irreversibly “dumps” the photons it contains into the environment. If K d is much larger (e.g. ⁇ 10x or more) than the coupling rate g 2 . then the dump mode can be adiabatically eliminated from the Hamiltonian, for example as shown in FIG. IB. For example, as shown on the right side of FIG.
  • the emission of phonon pairs via can be accurately modeled as a dissipative process described by a dissipator ⁇ D [a 2 ]. Additionally, if the dump mode is linearly driven as h. c. this provides the required energy to stimulate the reverse process which in the adiabatic elimination, as shown in FIG. IB, can be modeled as an effective two-phonon drive. Altogether, the dynamics can be accurately modeled through the equation:
  • the steady states of the dynamics of the system shown in FIG. IB are the coherent states
  • This protected subspace can be used to encode a qubit through the following definition of a logical basis:
  • 0 L )
  • 1 L )
  • X errors e.g. bit flips
  • the bit-flip rate decays exponentially with the code distance
  • Z errors e.g. phase flips may not be protected by this code.
  • an ATS is formed by splitting a SQUID with a linear inductor.
  • the magnetic flux threading of each of the two resulting loops of the ATS can be controlled via two nearby on-chip flux lines, such as flux lines 108 and 110 shown in FIG. 1A.
  • These flux lines can be tuned to appropriate values and can send radio frequency (rl) signals at appropriate frequencies for a desired non-linear interaction to be resonantly activated in the nano-mechanical resonator.
  • the dump mode 104 may further be strongly coupled to a dump line of characteristic impedance Zo, which induces a large energy decay rate as required.
  • the nano-mechanical storage resonator (e.g. storage 106) may be a piezoelectric nano-mechanical resonator that supports resonances in the GHz range. These resonances may be coupled to superconducting circuits of the control circuit 100 via small superconducting electrodes (e.g. terminals) that either directly touch or closely approach the vibrating piezoelectric region of the nano-mechanical resonators.
  • the values of the nonlinear coupling rate g 2 , the two-phonon dissipation rate k 2 . and the ratio K 2 /K 1 can be calculated as follows:
  • a nano-mechanical element such as the nano-mechanical resonator that implements storage mode 106 and dump mode 104 may be represented as an equivalent circuit that accurately captures its linear response. This can be done using Foster synthesis if the admittance Y m (a>) seen from the terminals of the mechanical resonator is known. For example, the admittance may be computed using finite element modeling.
  • a Foster network may be used to accurately represent a one-dimensional (e.g. linear) phononic-crystal-defect resonator (PCDR), which may be a type of nano-mechanical resonator used in some embodiments.
  • the dump resonator may be modeled as having a fixed impedance, such as 1 kilo ohms.
  • FIG. 2 illustrates a version of control circuit 100 that has been represented using a Foster network (e.g. equivalent circuit 200).
  • equivalent circuit 200 may be represented as ‘a DC capacitance’ in series with an LC block (e.g. L represents an inductor and C represents a capacitor for the LC block), wherein an additional resistor is inserted to include the effects of the loss in the resonator.
  • Foster network 210 is modeled to include capacitor 204, inductor 206, and resistor 208.
  • the linear part of the dump resonator (including the inductor that splits the ATS) can also be represented as an LC block, such as LC block 212. In this representation the dump resonator (e.g.
  • FIG. 2 illustrates a diagnolized circuit representation 214.
  • the resulting “storage-like” and “dump-like” eigenmodes both contribute to the total phase drop across the ATS. For example These modes therefore mix the via the ATS potential, which may be redefined as because the inductor has already been absorbed into the linear network.
  • the zero-point phase fluctuations of each mode are given by :
  • C is the Maxwell capacitance matrix of the circuit.
  • U is the orthogonal matrix that diagnolizes where L -1 is the inverse inductance matrix.
  • the index labels the mode and j labels the node in question. Note that in some instances as described herein the notation of j may be omitted because it is clear from context, e.g. the node of interest is the one right above the ATS.
  • the scheme as described above may be extended to be used in a multi-mode setting, in which N>1 storage resonators are simultaneously coupled to a single dump +ATS. This may allow for the cat subspaces of each of the storage modes to be stabilized individually.
  • a dissipator of the form In order to avoid simultaneous or coherent loss of phonons from different modes (which fails to stabilize the desired subspaces), an incoherent dissipator is required. This can be achieved if the stabilization pumps and the drives for the different modes are purposefully detuned as follows:
  • the pump and drive frequencies for mode m are the pump and drive frequencies for mode m.
  • the pump operators of different modes can rotate with respect to each other. If the rotation rate is larger than k 2 then the coherences of the form in the Lindbladian vanish in a time averaged sense.
  • the drive de-tunings allow the pumps and drives to remain synchronized even though the pumps have been detuned relative to one another.
  • the de-tunings ⁇ ⁇ may all be different from each other by an amount greater than in order for the dissipation to be incoherent.
  • the spectral lines associated with emission of photons/phonons out of the dump must all be resolved. This, also sets a lower bound on the proximity of different tunings. As such, since an upper bound and lower bound are set, bandwidth limits for the de-tunings may be determined. Also, taking into account these limitations, an upper bound on the number of modes that can be simultaneously stabilized by a single dump can also be determined.
  • FIG. 3 illustrates a control circuit 300 that includes a single dump resonator 302 that stabilizes multiple storage resonators 304.
  • a high-impedance inductor to enhance coupling between a dump resonator and one or more storage resonators
  • the coupling rate ⁇ may be increased by using a high impedance inductor.
  • the inductor chosen to be included in the ATS circuit may be sufficiently linear to ensure stability of the dump circuit when driven strongly during stabilization.
  • a high impedance inductor used may comprise a planar meander or double-spiral inductor, a spiral inductor with air bridges, an array with a large number of (e.g. greater than 50) highly transparent Josephson junction, or other suitable high impedance inductor.
  • microwave filters e.g. metamaterial waveguides
  • FIG. 4 illustrates control circuit 400 that includes a single dump resonator 404, multiple storage resonators 406, and a filter 402.
  • FIG. 4 illustrates control circuit 400 that includes a single dump resonator 404, multiple storage resonators 406, and a filter 402.
  • these terms take the form of After adiabatic elimination of the b mode (for example as discussed in regard to FIG.1B), these terms effectively become jump operators of the form Unlike the desired jump processes which result in the individual stabilization of the cat subspace of each resonator, the correlated decay terms result in simultaneous phase flips of the resonators j and k. For example, these correlated errors can be damaging to the next layer of error correction, such as in a repetition or striped surface code. [0092] In some embodiments, in order to filter out the unwanted terms in the physical Hamiltonian that give rise to effective dissipators that cause correlated phase flips, the de-tunings of the unwanted terms may be larger than half the filter bandwidth.
  • the de-tunings and filter may be selected such that detuning of the effective Hamiltonian is larger than half the filter bandwidth.
  • the filter mode (along with the dump mode) may be adiabatically eliminated from the model in a similar manner as discussed in FIG.1B for the adiabatic elimination of the dump mode. This may be used to determine an effective dissipator for a circuit, such as control circuit 400, that includes both dump resonator 404 and filter 402. [0093] As discussed above, correlated phase errors may be suppressed by a filter if the corresponding emitted photons have frequencies outside of the filter bandwidth.
  • all correlated phase errors may be simultaneously suppressed by carefully choosing the frequencies of the storage modes. For example, cost functions may be used taking into account a filter bandwidth to determine optimized storage frequencies. For example, in some embodiments a single ATS/dump may be used to suppress decoherence associated with all effective Hamiltonians for 5 storage modes. In such embodiments, all dominant sources of stochastic, correlated phase errors in the cat qubits may be suppressed.
  • Multi-terminal mechanical resonators [0094]
  • nano-mechanical resonators such as those shown in FIGs.1-4, may be designed with multiple terminals that allow a given nano-mechanical resonator to be coupled with more than one ATS/control circuit.
  • a single connection ATS may include a ground terminal and a signal terminal, wherein the signal terminal couples with a control circuit comprising an ATS.
  • a multi-terminal nano-mechanical resonator may include more than one signal terminal that allows the nano-mechanical resonator to be coupled with more than one control circuit/more than one ATS.
  • a nano-mechanical resonator may include three or more terminals that enable the nano-mechanical resonator to be coupled with three or more ATSs. If not needed, an extra terminal could be coupled to ground, such that the multi-terminal nano-mechanical resonator functions like a single (or fewer) connection nano-mechanical resonator.
  • different signal terminals of a same nano-mechanical resonator may be coupled with different ATSs, wherein the ATSs may be used to implement gates between mechanical resonators, such as a CNOT gate. For example, this may allow for implementation of gates on the stabilizer function.
  • Example Physical Gate Implementations [0095] Recall the Hamiltonian of a system comprising of multiple phononic modes coupled to a shared ATS mode [0096] wherein . Also, quantify zero- point fluctuations of the modes To simplify the discussion, neglect small frequency shifts due to the pump for the moment and assume that the frequency of a mode is given by its bare frequency (in practice, however, the frequency shifts need to be taken into account; see below for the frequency shift due to pump). Then, in the rotating frame where every mode rotates with its own frequency, the following is obtained: where quantify zero-point fluctuations of the modes Note that the rotating frame has been used where each mode rotates with its own frequency.
  • a linear drive on a phononic mode say can be readily realized by using a pump and choosing the pump frequency to be the frequency of the mode that is to be driven, that is, . Then, by taking only the leading order linear term in the sine potential (e.g., sin we get the desired linear drive: where comprises fast-oscillating terms such as with I ⁇ k and as well as other terms that rotate even faster. Since the frequency differences between different modes are on the order of 100 MHz but is typically much smaller than 100 MHz, the faster oscillating terms can be ignored using a rotating wave approximation (RWA).
  • RWA rotating wave approximation
  • a compensating Hamiltonian for a CNOT gate may have the form:
  • H CN0T comprises an optomechanical coupling between two phononic modes, a linear drive on the control mode and a selective To realize the optomechanical coupling, one might be tempted to directly drive the cubic term . in the sine potential via a pump
  • the direct driving scheme is not suitable for a couple of reasons: since the term rotates with frequency the required pump frequency is given by which is the same pump frequency reserved to engineer a linear drive on the mode. Moreover, the term rotates at the same frequency as those of undesired cubic terms.
  • the optomechanical coupling is realized by off-resonantly driving the term For example, the fact that a time-dependent Hamiltonian yields an effective Hamiltonian upon time-averaging is used assuming that the population of the mode is small (e.g and the detuning ⁇ is sufficiently large. Hence given a
  • the optomechanical coupling can be realized as well as the selective frequency shift of the mode, e.g. up to an undesired cross-Ker term
  • the desired selectivity is achieved because the term is detuned from other undesired terms such as with k > 3 by a frequency difference
  • the unwanted optomechanical coupling can be suppressed by a suitable choice of the detuning
  • FIG. 5 illustrates a process of stabilizing a nano-mechanical resonator using an asymmetrically -threaded superconducting quantum interference device (ATS), according to some embodiments.
  • ATS superconducting quantum interference device
  • a control circuit of a system comprising one or more nano-mechanical resonators causes phonon pairs to be supplied to the nano-mechanical resonator via an ATS to drive a stabilization of a storage mode of the nano-mechanical resonator such that the storage mode is maintained in a coherent state. Also, at block 504, the control circuit dissipates phonon/photon pairs from the nano-mechanical resonator via an open transmission line of the control circuit that is coupled with the nano-mechanical resonator and the ATS.
  • FIG. 6 illustrates a process of stabilizing multiple nano-mechanical resonators using a multiplexed ATS, according to some embodiments.
  • block 602 storage modes for a plurality of nano-mechanical resonators that are driven by a multiplexed ATS are chosen such that the storage modes are de-tuned.
  • block 602 may include detuning storage modes supported by a plurality of nano-mechanical resonators from a dump resonator containing an asymmetrically-threaded superconducting quantum interference device
  • phonon pairs are supplied to a first one of the nano- mechanical resonators at a first frequency and at block 606 phonon pairs are supplied to other ones of the nano-mechanical resonators at other frequencies such that the frequencies for the respective storage modes of the nano-mechanical resonators are de-tuned.
  • blocks 604 and 606 may include applying a pump and drive to an ATS to activate two-phonon driven-dissipative stabilization to a first one of the nano- mechanical resonators and suppressing, via a microwave bandpass filter, correlated decay processes from the plurality of nano-mechanical resonators.
  • the storage mode frequencies and a bandwidth for a filter of the control circuit may be selected such that de-tunings of unwanted terms are larger than half the filter bandwidth.
  • a microwave filter with the determined filter bandwidth properties may be used to filter correlated decay terms from the plurality of nano-mechanical resonators.
  • the systems described above that implement hybrid acoustic- electrical qubits may be used to implement a universal gate set.
  • error correction may be used to correct for errors and/or noise in such systems.
  • a STOP algorithm as described herein, may provide an efficient protocol for providing error detection and/or correction.
  • systems, as described above, that implement hybrid acoustic-electrical qubits may introduce noise that is biased towards phase flip errors. With such knowledge about error bias, error correction protocols, such as a STOP algorithm, may be used to efficiently correct for errors.
  • error correction may be used to correct for errors when preparing Toffoli gates using a bottom-up approach (and/or when using a top-down approach which is further discussed in the next section).
  • a STOP algorithm may be used to determine when it is acceptable to STOP measuring stabilizer measurements as part of an error detection/error correction operation while guaranteeing a low probability of logical errors.
  • a STOP algorithm may be used to measure stabilizer measurements prior to performing a Toffoli gate wherein measured errors are corrected prior to applying the Toffoli gate.
  • An alternative to using a STOP decoder may be to use graph based error correction techniques.
  • a STOP algorithm may be used to determine when stabilizer measurements can be stopped while still guaranteeing a low probability of logical errors. For example, in some embodiments, a STOP algorithm may guarantee that a total number of failures is less than a code distance of repeatedly encoded data qubits (e.g. a repetition code) divided by two. Thus the majority of the repeated data qubits are known to not be erroneous and a logical error will not occur because the majority of the encoded data qubits are correct.
  • a code distance of repeatedly encoded data qubits e.g. a repetition code
  • errors can be tolerated as long as the total number of errors is less than the code distance divided by two. In such situations, the errors will not result in a logical error, because the majority of the encoded qubits are not erroneous.
  • a physical error is distinct from a logical error.
  • a physical error acts on an individual qubit, whereas a logical error is an erroneous logical output determined based on physical qubits.
  • a logical error cannot be directly detected, and if not detected, cannot be corrected. For example, an uncorrected physical error may result in a logical error, but if the physical error was undetected, there is no way to subsequently measure the logical error caused by the physical error, without knowing about the physical error.
  • a STOP algorithm may also be applied to qubits used for performing non-Clifford gates, such as a Toffoli gate.
  • a STOP algorithm may be used when growing a repetition code from a first code distance to a second code distance, wherein stabilizers at a boundary between code blocks that are being joined to grow the repetition code are measured. The STOP algorithm may be used to determine when repeated measurements of the stabilizers at the boundary can be stopped without introducing logical errors into the expanded repetition code.
  • a STOP algorithm when preparing a Toffoli gate, may be used to detect and/or correct errors in the initial computational basis states used to prepare the Toffoli gate.
  • the STOP algorithm may also be used in preparing Clifford gates that are applied in a sequence to implement the Toffoli gate, wherein the STOP algorithm is used to detect/correct errors in the Clifford gates. Additionally, the STOP algorithm may be used to perform error detection/correction between measurements of g A which is repeatedly measured as part of preparing the Toffoli gates using a bottom up approach, as further discussed below. In some embodiments, a round of error detection may be performed between each round of measuring g A . [00115] In some embodiments, a STOP algorithm may follow an algorithm similar to the algorithm shown below:
  • SynRep SynRep + 1 ;
  • S j be the error syndrome of the j th round of syndrome measurements.
  • the goal of the STOP algorithm is to compute the minimum number of faults that can cause changes between two consecutive syndromes.
  • the worst case scenario is where a single two-qubit gate failure results in three different syndrome outcomes.
  • S k-1 be the syndrome from round k - 1.
  • the last two- qubit gate fails resulting in the error A®.
  • the X error results in the data error XE in (e.g.
  • this example shows that a single fault can cause three distinct syndromes s k-1 , s k and s fc+1 .
  • the STOP decoder tracks consecutive syndrome measurement outcomes s 2 , ... , s r ', where r is the total number of syndrome measurements (r is not fixed), between two syndrome measurement rounds k and k + 1 (with corresponding syndromes s k and s fc+1 ), wherein the minimum number of faults causing a change in syndrome outcome (represented by the variable n diff) is only incremented if n diff did not increase in round k.
  • logical computational basis states may be prepared using a repetition code.
  • stabilizer measurements of a repetition code may be performed using a STOP algorithm, as described above.
  • the methods described herein may be applied to any family of Calderbank-Shor-Steane (CSS) codes.
  • computational basis states may be prepared using an approach that only involves stabilizer measurements. For example, starting with the state which is a +1 eigenstate of Z L , measure all stabilizers of the repetition code (each having a random ⁇ 1 outcome) resulting in the state:
  • the measurement outcome of the correction can be applied to the data to flip the sign back to +1. However given the possibility of measurement errors, the measurement of all stabilizers )must be repeated. If physical non-Clifford gates are applied prior to measuring the data, then the STOP algorithm can be used to determine when to stop measuring the syndrome outcomes. Subsequently, minimum-weight perfect matching (MWPM) may be applied to the full syndrome history to correct errors and apply the appropriate Z corrections to fix the code-space given the initial stabilizer measurements. When Clifford gates are applied to the data qubits in order to prepare a ⁇ TOF) magic state, this second scheme for preparing the computational basis states may be used along with the STOP algorithm.
  • MWPM minimum-weight perfect matching
  • H and S given above are the Hadamard and phase gate operators.
  • injection of the state which is a +1 eigenstate of the Pauli operator, may be performed.
  • FIG. 10 a circuit 1000 for implementing S L is given, wherein the circuit takes as an input state and includes a transversal CNOT gate and a logical Z-basis measurement. If a -1 measurement outcome is obtained, a Z L correction is applied to the data. Note however that a measurement error can result in a logical Z L being applied incorrectly to the data. As such, to guarantee fault-tolerance, one can repeat the circuit of FIG. 10 and use the STOP algorithm to decide when to terminate. The final measurement outcome may then be used to determine if Z L correction is necessary.
  • the implementation of S can thus be summarized as follows:
  • the circuit consists of an injected state, a transversal CNOT gate, and a logical X-basis measurement is applied to the input data qubits. If the measurement outcome is -1, Y L is applied to the data.
  • the application of the circuit in FIG. 9 is repeated according to the STOP algorithm to protect against measurement errors.
  • the full implementation of Q L is given as follows:
  • a state encoded in a distance d repetition code is grown to a state encoded in a distance d 2 repetition code.
  • Such a protocol may be used to grow ⁇ TOF) magic states as further described below.
  • th stabilizer in to be the Th stabilizer in The protocol for growing is given as follows:
  • step 5 Repeat the measurement of all stabilizers of S d2 using the STOP algorithm and use MWPM over the syndrome history to correct errors. If in the first round the stabilizer is measured as -1, apply the correction [00134]
  • the growing scheme involves two blocks, the first being the state which is grown to The second block involves the set of qubits which are prepared in the state and stabilized by (steps 1-3). The key is to measure the boundary operator between the two blocks which effectively merges both blocks into the encoded state which is a simple implementation of lattice surgery. To see this, consider the state prior to step 4:
  • a ⁇ TOF ⁇ magic state can be prepared using the repetition code, wherein the
  • aToffoli gate Given one copy of a ⁇ TOF) magic state, aToffoli gate can be simulated using the circuit 1102 in Fig. 11A, and the required Clifford corrections are given in FIG. 11B. Note that if a correction involves the stabilizer g c , the CZ gate can be implemented using the circuit 1200 in FIG. 12. Also, note that for the Clifford corrections a 0 indicates a +1 measurement outcome whereas a 1 indicates a -1 measurement outcome (in either the A or Z basis).
  • the stabilizers g A , g B and g c are given in the equations above.
  • Toffoli gates are applied sequentially as shown in the figure. Note that such a circuit can be used for any Calderbank-Shor-Steane (CSS) code. The sequence of Toffoli gates would remain unchanged. Generally more two-qubit gates would be required depending on the minimal weight representation of X L .
  • FIG. 18 illustrates a more parallelized circuit for measuring g A which requires one flag qubit 1802.
  • the flag qubit can also be used for detecting X errors arising on the control qubits of the CNOT and Toffoli gates. If an X error occurs, the flag qubit measurement outcome will be -1 instead of +1.
  • FIG. 19A an example 1900 is provided of a two-dimensional layout of qubits and sequence of operations for measuring g A , which is compatible with the above described ATS architecture for a distance 5 repetition code.
  • Such a layout uses a minimum number of ancilla qubits and can be straightforwardly generalized to arbitrary repetition code distances.
  • the ancilla qubits are used to first prepare a GHZ state. Subsequently the required Toffoli and CNOT gates are applied, followed by a disentangling of the GHZ states and measurement of the
  • the lighter grey vertices 1902 need to be swapped with the darker grey vertices 1904 on the second block (shown in the upper left comer of the lattice of FIG. 19A).
  • Such a role reversal between the ancilla and data qubits does not lead to additional cross-talk errors for the reasons discussed above with regard to a multiplexed ATS with filtering and thus can be tolerated.
  • all controlled g A measurements in FIG. 15 may be implemented using the circuit 1950 in FIG. 19B with the qubit layout given in FIG. 19A.
  • circuit 1950 in FIG. 19B used to measure g A is not fault-tolerant to X or Y errors. However, since it is assumed that X and Y errors are exponentially suppressed, flag qubits for detecting A-type error propagation are unnecessary as long as X or Y error rates multiplied by the total number of fault locations are below the target levels for algorithms of interest.
  • FIG. 20A illustrates high-level steps of a protocol for implementing a STOP algorithm, according to some embodiments.
  • syndrome outcome measurements are performed for an arbitrary Calderbank-Shor-Steane code.
  • consecutive ones of the syndrome outcomes are tracked to generate a syndrome history.
  • syndrome measurements are stopped if condition 1 (shown in block 2006A) or condition 2 (shown in block 2006B) are met.
  • Condition 1 is that a same syndrome outcome is repeated a threshold number of times in a row, wherein the threshold is equal to ((d-l)/2 )- n diff .- l
  • condition 1 is met
  • the repeated syndrome outcome is used to perform error correction.
  • condition 2 the subsequently measured syndrome outcome is used to perform error correction.
  • FIG. 20B illustrates high-level steps for determining a parameter (n diff ) used in the STOP algorithm, according to some embodiments.
  • n diff is initialized with an initial value equal to zero.
  • a first round of syndrome outcome measurements is performed.
  • a second round of syndrome outcome measurements is performed.
  • it is determined if the syndrome outcomes measured in the round performed at block 2056 (e.g. the current round of syndrome outcomes) differ from the syndrome outcomes measured for the preceding round. If so, at block 2060, it is determined if n diff was incremented in the previous round, if not, n diff is incremented by one at block 2062 and the process repeats for a subsequent round of syndrome outcome measurements.
  • condition 1 or condition 2 as shown in blocks 2006A and 2006B
  • FIG. 21 illustrates high-level steps of a protocol for growing a repetition code from a first code distance to a second code distance using a STOP algorithm, according to some embodiments.
  • a state is prepared as described above, for example using the circuit shown in FIG. 13.
  • all stabilizers Sd’i are measured resulting in a state - This may be done as described above with regard to stabilizer operations for the repetition code.
  • the measurements of the stabilizers in Sd’i are repeated using the STOP algorithm and MWPM is applied to the syndrome history to correct errors and project the code into the increased code space.
  • a state is prepared and are measured.
  • the measurements of all the stabilizers of Sd2 are repeated using the STOP algorithm and MWPM is applied over the syndrome history to correct errors.
  • FIG. 22 illustrates high-level steps of a protocol for implementing a logical Toffoli gate using a bottom-up approach with Toffoli magic state injection, according to some embodiments.
  • fault-tolerant computational basis states are prepared using the STOP algorithm, wherein the fault-tol erant computational basis states are to be used as inputs for a Toffoli gate preparation.
  • a CNOT gate is transversally applied to the fault-tolerant computational basis states to prepare a state.
  • g A is measured for the state, which yields a state If the measurement of g A has a measurement outcome of -1 then a Z correction is applied. This projects the state into a ⁇ TOFF) state.
  • the measurements of g A are repeated such that g A is measured (d- 1 )/2 times. Between rounds of measurement of g A , error detection is performed.
  • a sequence of Clifford gates as shown in circuit 1102 of FIG. 11 A are applied. Also the Clifford error corrections shown in FIG. 1 IB are applied. This may be done as part of a top down distillation of a logical Toffoli gate (as described in more detail below) that utilizes the prepared Toffoli magic state as an input to the distillation process.
  • the Toffoli gate when combined with the Clifford group forms a universal gate set for quantum computation.
  • universality can be achieved by complementing the Clifford group with a supply of high-fidelity Toffoli magic states encoded in a suitable quantum error correction code.
  • high threshold error correction codes such as repetition (for very biased noise) or surface codes
  • high fidelity Toffoli magic states are difficult to prepare.
  • the paradigm of magic state distillation uses encoded Clifford operations to distill higher fidelity magic states from lower fidelity magic states.
  • the Toffoli magic states prepared using the bottom-up approach described above may be used as in a magic state distillation process to yield even lower fault-rate Toffoli magic states.
  • the conventional approach to magic state distillation uses a supply of low fidelity T magic states as inputs to protocols that output other types of magic state, including TOFF states.
  • the supply of noisy TOFF states can be prepared at better fidelity than the noisy T states. This is because all Calderbank-Shor-Steane (CSS) codes, such as surface and repetition codes, have a transversal CNOT and this property can be used to robustly prepare the TOFF state (as described above for the bottom-up approach).
  • CCS Calderbank-Shor-Steane
  • the success probability of such “bottom-up preparation” protocols drops as the target fidelity is increased and so it is desirable to design magic distillation protocols that can further purify noisy TOFF states at low overhead.
  • a top-down distillation process is performed that uses TOFF or CCZ states without using any T states, either as raw distillation material or as catalysts.
  • triorthgonal codes are not used in the usual sense, but instead provide a new technique for protocol design by describing CCZ circuits in terms of cubic polynomials. It is noted that CCZ states are Clifford equivalent to TOFF states, and when using cubic polynomial formalism, it will be beneficial to work in the language of CCZ states. As an example of these techniques, it is shown, in some embodiments, that it is possible to achieve 8CCZ ⁇ 2CCZ distillation, equivalently 8TOFF ⁇ 2TOFF detecting a fault on any single TOFF state. In cases where noise on the CCZ state is very biased towards certain types of faults, more compact and efficient protocols are possible, which are also described.
  • various architectures may be used to implement the distillation processes described herein, such as a 2D architecture using the repetition code, asymmetric surface codes (for biased noise) or conventional square surface codes.
  • the 2D implementation performs the required Clifford operations using lattice surgery to realize a suitable sequence of multi-qubit Pauli observables (also called multi-patch measurements).
  • FIG. 23 illustrates high-level steps for distilling a low-error rate logical Toffoli gate using multiple ones of the logical Toffoli gates prepared using a bottom-up approach as described in FIG.22, according to some embodiments.
  • block 2302 physical Toffoli magic states are generated, which may have a probability of error of approximately 2.8 x 10 -4 .
  • This error probability may be improved by an order of magnitude or more by applying the STOP algorithm and error correction techniques described above for the bottom-up approach.
  • block 2304 illustrates the improvements in error-rate that are realized by utilizing the bottom-up approach.
  • further improvements in error rate can be achieved by performing a top-down distillation process.
  • block 2306 illustrates that error probabilities may be reduced to approximately 8 x 10 -10 by performing a single round of distillation using Toffoli magic states prepared using the bottom up approach as inputs.
  • FIG.24 illustrates a layout of multiple bottom up Toffoli gates that are used to distill low-error rate logical Toffoli gates, according to some embodiments.
  • FIG.24 illustrates a circuit 2400 that includes qubits that have been prepared to implement bottom up (e.g. “BU”) magic states. Also other qubits of the circuit have been prepared to implement CCZ magic states (or low-error rate Toffoli magic states/gates). Additionally, some of the qubits implement an error check for the CCZ magic states. For example each set of check qubits may be associated with a pair of CCZ magic states.
  • BU bottom up
  • CCZ magic states or low-error rate Toffoli magic states/gates
  • a generalized CCZ gate can be realized using a single CCZ magic state as shown in 2504 FIG.25.
  • the CCZ magic state is: and it can be used to inject a CCZ gate as illustrated in FIG. 25 and which can be extended to generalized CCZ gates by controlling the CNOT gates determined by the associated vectors and Furthermore, the CNOTs in the CCZ injection can be replaced with a sequence of multi- qubit Pauli measurements, which are the primitive operations in lattice surgery based architectures.
  • a unitary as shown below can be composed using CCZ, CZ, Z and CNOT gates: where J is invertible and is some Boolean function expressible as a cubic polynomial. Formally, this can be expressed as shown below in Theorem 1: [00166] Theorem 1: Let U be a unitary of the form of the equation above with a function f such that there exists a cubic polynomial representation: with integers ⁇ It follows that there are many different factorizations of the polynomial as follows: where are binary vectors (and therefore linear functions) and a Q is a lower-triangular binary matrix (representing a quadratic Boolean function).
  • cubic polynomial formalism is used to develop routines for distillation of high-fidelity magic states. For example, given a supply noisy states with Z noise, the noisy states can be distilled using Clifford operations to obtain a smaller number of states with less noise. Note that given any noise model, ⁇ magic states can be twirled so that the noise becomes pure Z noise.
  • a circuit is designed to realize a target unitary, say that acts on 3k qubits plus some number m of check qubits.
  • the proposed design is such that Z errors on the magic state propagate onto the check qubits. Therefore, by measuring the check qubits at the end of the circuit, errors can be detected on the noisy states.
  • the matrices are partitioned into (the bottom m rows) and as shown.
  • FIG.26 A possible circuit 2602 implementation of this protocol is illustrated in FIG.26.
  • This protocol uses 3 check qubits and the associated Jj matrices are shown in FIG. 26, such as matrix 2608 corresponding to a first CCZ, matrix 2610 corresponding to a second CCZ, matrix 2612 corresponding to a third CZZ, and matrix 2614 corresponding to an eighth CCZ. Note that there would be eight total matrices with one corresponding to each of the eight CCZ’s. However, for ease of illustration only matrices for CCZs 1-3 and 8 are shown. Computing the cubic polynomial, yields: which represents two CCZ gates and has trivial action on the check qubits.
  • the above protocol may be generalized to Example Implementation of Lattice Surgery
  • FIG. 27 illustrates an example implementation of the above described protocol using lattice surgery.
  • the generalized CCZ gates can be injected using only multi-Pauli measurements.
  • error correction codes such as topological codes and repetition codes
  • lattice surgery provides a natural way to measure multi-qubit Pauli operators.
  • the following examples are concerning using thin surface codes with asymmetric distance for bit-flip and phase-flip noise. When there is an asymmetry we use the convention that the bit-flip distance is smaller.
  • the lattice surgery approach dedicates some ancilla qubits to act as communication routes between logical qubits. When performing a multi-patch measurement, these qubits are temporarily brought into an error correction code for dm rounds of error correction.
  • the value of dm must be sufficiently large that the probability of an error during the multi-patch measurement is small enough. The larger dm, the more protection one has against measurement errors. However, an error during measurement is equivalent to a single-qubit Pauli error on the magic state. Therefore, dm has to be sufficiently large that the probability of measurement error is small than However, the measurement error probability does not have to be smaller than the intended infidelity of the output magic state.
  • the logical qubits labelled 1 through 6 need to be encoded in a code protecting with distance dx for bit-flips and dz for phase-flips, where these are sufficiently large that logical error rates are lower than [00186]
  • the logical qubits labelled 7 through 9 are the check qubits for the protocol and are encoded in a code with distance dx for bit-flips and for phase-flips. If there is a Z logical error on a check qubit at any point, this can be commuted to the end of the circuit and will be detected provided it is the only fault.
  • the space/qubit cost is 2dzdx, so the total space cost for qubits1 through 9 and the routing ancilla space is: [00187]
  • N0 space cost N0 for the L0 blocks responsible for preparing the input Toffoli or CCZ states.
  • the probability of all failing is approximately .
  • FIG. 28 illustrates a process for distilling low-error rate logical Toffoli gates from a plurality of noisy Toffoli magic states/Toffoli gates, according to some embodiments.
  • a plurality of Toffoli magic states/noisy Toffoli gates are prepared using a bottom-up approach or other suitable approach.
  • a low-error rate logical Toffoli gate is distilled from a plurality of the Toffoli magic states/Toffoli gates prepared at block 2802.
  • a check qubit is measured to check for errors, wherein the check qubit is associated with the distilled low-error rate logical Toffoli gate.
  • a low-error rate logical Toffoli gate operation is performed using the distilled low-error rate logical Toffoli gate in response to a verifying the check qubit does not indicate an error.
  • FIG.29A illustrates a process of distilling two low-error rate logical Toffoli gates from eight noisy Toffoli magic states/Toffoli gates, according to some embodiments.
  • 8 noisy Toffoli magic states/Toffoli gates are selected to be used in a distillation of a low-error rate logical Toffoli gate.
  • lattice surgery is performed to distil the one low-error rate logical Toffoli gate from the 8 noisy Toffoli magic states/Toffoli gates.
  • FIG. 29B illustrates a process of distilling a low-error rate logical Toffoli gate from two noisy Toffoli magic states/Toffoli gates, according to some embodiments.
  • two noisy Toffoli magic states/Toffoli gates are selected to be used in a distillation of a low-error rate logical Toffoli gate.
  • FIG. 30 illustrates an example method of performing lattice surgery to distill a low- error rate logical Toffoli gate from a plurality of noisy Toffoli magic states/Toffoli gates, according to some embodiments.
  • a measurement of is measured where Zk denotes Pauli Z acting on the k th qubit of the magic state and Z[J k ] is a string of Pauli operators acting on the algorithmic qubits indexed by the binary vector Jk.
  • measure X on the k th qubit of the magic state are also at block 3002, for each k, measure X on the k th qubit of the magic state.
  • circuit 3100 shown in FIG. 31 includes a readout qubit that enables measurements 3106 to be performed for a first round of error correction gates 3106 while (e.g. concurrently) a second round of error correction gates 3104 are being performed.
  • faster error correction cycles and lower measurement error can be achieve by swapping an ancilla (that would normally be interrogated directly) to an additional readout qubit (could be some other gate that achieves same purpose as SWAP like iSWAP, decomposition of SWAP into CNOTS etc. Then perform readout on the readout qubit while the rest of the error correction proceeds.
  • Such an approach not only reduces error correction cycle time, but also reduces idling errors on the data qubits. This is because the data qubits only idle during the time of the swap is typically shorter duration that was is required to perform the measurements.
  • the full error correction cycle time may be used to collect as many measurements as permitted to increase measurement fidelity or perform a single measurement with a long integration time for the time of the next cycle.
  • the error correction cycle time can be sped up by using this scheme. Additionally depending on the details, one may have more time to drive/integrate allowing for higher fidelity measurement without hurting the threshold because of large idling errors.
  • the additional readout mode may be a bosonic mode.
  • FIG. 32 illustrates a more specific example, wherein deflation is further added. Following the CNOT gates to entangle the ancilla qubit 3204 with the data qubits3202 the ancilla qubit is deflated. Deflation involves decreasing the steady state for the dissipatively stabilized ancilla qubit from an initial The deflation provides protection from single photon loss events which occur at a rate proportional to the average number of bosons in the readout mode.
  • a SWAP 3212 is performed which transfers the excitation from the ancilla qubit 3204 to the bosonic readout mode 3206 (which may be a phononic mode).
  • the bosonic readout mode 3206 (which may be a phononic mode).
  • repeated QND parity measurements of the bosonic readout mode 3206 are employed. Each individual parity measurement is achieved by dispersively coupling the readout mode to a transmon qubit 3208.
  • the aim is to determine whether there is an even or odd number of photons in a resonator. A single photon loss even during the process of a measurement will change the parity potentially resulting in an incorrect readout.
  • FIG.33 illustrates a parity measurement 3302 being taken subsequent to deflation.
  • bosonic modes may be readout in basis using a three or higher wave mixing Hamiltonian.
  • a procedure for such readouts may comprise evolving under a Hamiltonian and measuring (homodyne/heterodyne) the b mode to measure the bosonic mode in basis.
  • Hamiltonians of this form can be derived resonantly and non-resonantly from a three wave mixing Hamiltonian of the form:
  • FIG. 34 is a process flow diagram illustrating using a switch operator to excite a readout qubit such that a subsequent round of error correction gates can be applied in parallel with performing measurements of the readout qubit, according to some embodiments.
  • a set of error correction gates is applied between data qubits storing quantum information and an ancilla qubit.
  • a swap is performed between the ancilla qubit and a readout qubit.
  • one or more measurements are performed on the readout qubit. While this is taking place or without waiting for the measurements at block 3406 to complete, at block 3408 another set of error correction gates are applied between data qubits storing the quantum information and the ancilla qubit.
  • another swap is performed between the ancilla qubit and the readout qubit, subsequent to the measurement at block 3406 completing. And, at block 412 one or more measurement are performed on the readout qubit.
  • FIG.35 is a process flow diagram illustrating a process for using deflation or evolution using a three or higher wave mixing Hamiltonian to perform measurements of an ancilla qubit without requiring a transmon qubit, according to some embodiments.
  • one or more data qubits storing quantum information may be entangled with an ancilla qubit.
  • a qubit such as the ancilla qubit, is deflated prior to performing a readout of the qubit, such that phonons or photons are dissipated from the qubit while a measurement observable of the qubit is preserved.
  • FIG. 36A is a process flow diagram illustrating a process for deflating a cat qubit and measuring a b mode of the deflated cat qubit to determine information about a first mode of the deflated cat qubit, according to some embodiments.
  • cat qubit is deflated such that phonons or photons are dissipated from the cat qubit. For example, this may be achieved by adjusting a steady state dissipation rate, for example as may be driven by an ATS.
  • FIG. 36B is a process flow diagram illustrating another process for deflating a qubit and measuring a “b” mode of the deflated cat qubit to determine information about a first mode of the deflated cat qubit, according to some embodiments.
  • deflation is performed in a system wherein an “a” mode is a qubit mode and a “b” mode is a readout mode.
  • the system is evolved under a Hamiltonian derived from a three wave or higher mixing Hamiltonian. For example, a Hamiltonian
  • measurements of the “b” mode are performed to determine whether the qubit is in the + or – cat state.
  • FIG. 37 is a process flow diagram illustrating a process for evolving a cat qubit via three wave or higher mixing Hamiltonian and performing a homodyne, heterodyne, or photo detection of the evolved cat qubit to measure a measure property of another bosonic mode of the cat qubit, according to some embodiments.
  • a cat qubit is evolved under a Hamiltonian that couples a phase of the cat qubit to a measurable property of another bosonic mode of the cat qubit, wherein the Hamiltonian is selected from a three wave or higher mixing Hamiltonian.
  • a homodyne, heterodyne, or photo detection of the other bosonic mode is performed to determine the phase of the cat qubit.
  • Simulation of Cat Qubits Using a Shifted Fock Basis [00224]
  • a Fock basis is an algebraic construction used to construct quantum state space for a variable or unknown number of identical particles based on a single particle in Hilbert space.
  • a Fock basis could be used to simulate a cavity or the behavior of a phononic resonator using an n-dimensional ladder of states.
  • Fock basis may be used to simulate photon number states, wherein a base state represents a vacuum condition without any photons present.
  • the Hilbert space can be truncated to include a finite (as opposed to infinite) number of photon number states.
  • simulations can be simplified such that the truncated Hilbert space is simulated as opposed to the infinite Hilbert space, which cannot be effectively simulated.
  • a shifted Fock basis simulation may replace a vacuum state with one or more coherent states.
  • a shift operator may be applied to the vacuum state condition such that the lowest shifted Fock states correspond to the lowest operators for the lowest states of a cat qubit.
  • simulating a large cat qubit (with large ) using a traditional (e.g. non-shifted) Fock basis may be ineffective due to the large (or even infinite) number of states that would need to be simulated.
  • the simulation may be performed using a shifted Fock basis, which can be used to describe large cat states in a more compact way than is the case for a usual Fock basis. More specifically, the annihilation operator ⁇ may be constructed in a shifted Fock basis.
  • a cat state is composed of two coherent state components which can be understood as displaced vacuum states
  • 2d displaced Fock states are used as basis states where Note that while displaced Fock states in each ⁇ branch are orthonormalized, displaced Fock states in different branches are not necessarily orthogonal to each other. Thus the displaced Fock states need to be orthonormalized.
  • the basis states are orthonormalized by applying the Gram-Schmidt orthonormalization procedure. More specifically, given the non-orthonormalized basis states d orthonormalized basis states are constructed in each parity sector starting from the ground state
  • [00234] are the matrix elements of the operator in the non-orthonormalized basis .
  • the matrix may be conjugated by the Hadamard operator T hus, in the orthonormalized computational basis, the annihilation operator is given by: [00240]
  • the subscript SF indicates the action of the annihilation operator in the shifted F ock basis.
  • FIG.38 is a process flow diagram illustrating a process of utilizing a shifted Fock basis to simulate a cat qubit (with according to some embodiments.
  • non-orthonormalized basis states are defined as described above.
  • the basis states are orthonormalized to construct 2d orthonormalized shifted Fock basis states as described above.
  • matrix elements are determined for an operator in the orthonormalized basis as described above.
  • a method for simulating a Toffoli gate encoded in arbitrary Calderbank-Shor-Steane codes comprising: preparing computational basis states in a fault-tolerant manner by applying a STOP algorithm to determine when syndrome measurements of stabilizers of a repetition code for the computational basis states can be stopped such that a probability of faults for the computational basis states are below a threshold level; transversally applying a CNOT gate to the prepared computational basis states to prepare a state; measuring a Clifford stabilizer g A for the state, and applying a logical Z correction if the measurement outcome for the Clifford stabilizer gA is -1, wherein measuring the Clifford stabilizer g A and applying the logical Z correction based on a measurement outcome of the Clifford stabilizer gA prepares a state repeating the Clifford stabilizer gA measurement for the state a threshold number of times; preparing a Toffoli
  • applying the STOP algorithm comprises: tracking consecutive syndrome outcomes; computing a minimum number of faults capable of causing a tracked sequence of consecutive syndrome outcomes; stopping the STOP algorithm if either of the following conditions is met: 1) a same syndrome outcome is repeated a threshold number of times in a row, wherein the threshold is equal to one plus a difference between: a code distance of one of the computational basis states being prepared minus one wherein the result of the subtraction is divided by two; and a currently computed minimum number of faults capable of causing the tracked sequence of consecutive syndrome outcomes; or 2) the currently computed minimum number of faults capable of causing the tracked sequence of consecutive syndromes is equal to the code distance of the one of the computational basis states being prepared minus one wherein the result of the subtraction is divided by two, and wherein one additional round of syndrome measurements is performed subsequently; and utilizing the repeated syndrome if condition 1 is met or utilizing the syndrome for the subsequently performed syndrome measurement if condition 2 is met, wherein the utilized syndrome it utilized to error correct the one of
  • a method comprising: measuring syndrome outcomes of an ancilla qubit for an arbitrary Calderbank-Shor Steane code; tracking consecutive ones of the measured syndrome outcomes; computing a minimum number of faults capable of causing a tracked sequence of consecutive syndrome outcomes; stopping the measuring of the syndrome outcomes if either of the following conditions is met: 1) a same syndrome outcome is repeated a threshold number of times in a row, wherein the threshold is equal to one plus a difference between: a code distance of the arbitrary Calderbank-Shor-Steane code minus one wherein the result of the subtraction is divided by two; and a currently computed minimum number of faults capable of causing the tracked sequence of consecutive syndrome outcomes; or 2) the currently computed minimum number of faults capable of causing the tracked sequence of consecutive syndromes is equal to the code distance minus one wherein the result of the subtraction is divided by two, and wherein one additional round of syndrome measurements is performed subsequently; and utilizing the repeated syndrome outcome if condition 1 is met or utilizing the syndrome outcome for the subsequently performed
  • the arbitrary Calderbank-Shor-Steane code is a n-qubit repetition code
  • measuring the syndrome outcomes comprises measuring Z L at the ancilla for the n-qubit repetition code
  • performing the error correction for the n-qubit arbitrary Calderbank-Shor-Steane code further comprises applying an XL correction based on the measured ZL at the ancilla for the n-qubit repetition code, wherein performing the error correction prepares computational basis state to be used in implementing a Clifford gate.
  • Clause 12 The method of clause 11, wherein: repeating the measurement of the Clifford stabilizer gA for the state the threshold number of times comprises repeating the measurement such that the Clifford stabilizer gA is measured a number of times equal to (d-1)/2, wherein d is a code distance of the one of the fault tolerant computational basis states. Clause 13. The method of clause 12, wherein error detection is performed between respective measurements of the Clifford stabilizer g A . Clause 14. The method of clause 13, further comprising: growing the Toffoli magic state from a first code distance to a second code distance, wherein the STOP algorithm is used to measure stabilizers and minimum weight perfect matching (MWPM) is applied to a measured syndrome history generated from measuring the stabilizers to correct for errors.
  • MWPM minimum weight perfect matching
  • control circuit comprises: an asymmetrically-threaded superconducting quantum interference device (ATS) coupled with the mechanical linear resonators.
  • ATS superconducting quantum interference device
  • a system comprising: mechanical resonators; and a control circuit coupled with the mechanical resonators, wherein the control circuit is configured to stabilize arbitrary coherent state superpositions (cat states) of the mechanical resonators to store quantum information; and one or more computing devices storing program instructions, that when executed cause the control circuit to perform: measuring syndrome outcomes of an ancilla qubit for one or more qubits storing the quantum information, wherein the ancilla qubit and the one or more qubits storing the quantum information are implemented via one or more of the mechanical resonators; tracking consecutive ones of the measured syndrome outcomes; computing a minimum number of faults capable of causing a tracked sequence of consecutive syndrome outcomes; stopping the measuring of the syndrome outcomes if either of the following conditions is met: 1) a same syndrome outcome is repeated a threshold number of times in a row, wherein the threshold
  • Clause 18 The system of clause 17, wherein the one or more computing devices are further configured to implement: preparing computational basis states in a fault tolerant manner by applying a STOP algorithm to the fault-tolerant computational basis states to determine when syndrome measurements of stabilizers of a repetition code for the computational basis states can be stopped such that a probability of faults for the computational basis states are below a threshold level, wherein: applying the STOP algorithm comprises performing said measuring syndrome outcomes, said tracking consecutive ones of the measure outcomes, said computing a minimum number of faults, said stopping the measuring if condition 1 or condition 2 is met, and said error correction. Clause 19.
  • the one or more computing devices are further configured to implement: transversally applying a CNOT gate to the prepared computational basis states to prepare a state; measuring a Clifford stabilizer g A for the state, and applying a logical Z correction if the measurement outcome for the Clifford stabilizer gA is -1, wherein measuring the Clifford stabilizer g A and applying the logical Z correction based on a measurement outcome of the Clifford stabilizer g A prepares a state repeating the Clifford stabilizer gA measurement for the state a threshold number of times; preparing a Toffoli magic state in response to determining the Clifford stabilizer gA measurements are trivial; and applying a sequence of Clifford gates to a logical input state and the prepared Toffoli magic state to simulate the Toffoli gate, wherein Clifford error corrections are applied to the outputs of the sequence of Clifford gates applied to the logical inputs.
  • Clause 20 The system of clause 19, wherein the one or more computing devices are further configured to implement: growing the Toffoli magic state from a first code distance to a second code distance, wherein the STOP algorithm is used to measure stabilizers and minimum weight perfect matching (MWPM) is applied to a measured syndrome history generated from measuring the stabilizers to correct for errors.
  • MWPM minimum weight perfect matching
  • a method of preparing a Toffoli gate for use in quantum computing comprising: preparing a plurality of Toffoli magic states, wherein computational basis states used in preparing the Toffoli magic states are encoded using a repetition code; distilling the Toffoli gate from two or more of the prepared Toffoli magic states, wherein distilling the Toffoli gate comprises preparing a check qubit associated with the Toffoli gate, wherein the check qubit indicates whether an error is present in the distilled Toffoli gate; and in response to verifying the check qubit does not indicate an error, utilizing the distilled Toffoli gate to perform a logical Toffoli gate operation.
  • distilling the Toffoli gate from the two or more of the prepared Toffoli magic states comprises: performing a plurality of rounds of lattice surgery operations between qubits of a selected set of the plurality of Toffoli magic states and qubits of the distilled Toffoli gate; and wherein each of the rounds of lattice surgery acts on at least one of the check qubits associated with the distilled Toffoli gate.
  • Clause 23 The method of clause 21 or clause 22, wherein the distilled Toffoli gate has a fault rate of less than 1 x 10 -6 .
  • Clause 24 The method of any of clauses 21 through 23, wherein the distilled Toffoli gate is distilled using 8 of the Toffoli magic states.
  • the Toffoli magic states and the distilled Toffoli gate are implemented using a system comprising: mechanical linear resonators; and one or more control circuits coupled with the mechanical linear resonators, wherein the one or more control circuits are configured to stabilize an arbitrary coherent state superposition (cat state) of the mechanical resonators to store quantum information of the Toffoli magic states and the distilled Toffoli gate, wherein to stabilize the arbitrary cat-state, the one or more control circuits are configured to: excite phonons in the mechanical resonators by driving respective storage modes of the mechanical resonators; and dissipate phonons from the mechanical resonators via one or more respective open transmission lines of the one or more control circuits coupled to the mechanical resonators, wherein the open transmission line is configured to absorb photons from the respective one or more control circuits.
  • a system comprising: mechanical linear resonators; and one or more control circuits coupled with the mechanical linear resonators, wherein the one or more control circuits are configured
  • a system comprising: mechanical resonators; and one or more control circuits coupled with the mechanical resonators, wherein the one or more control circuits are configured to stabilize arbitrary coherent state superpositions (cat states) of the mechanical resonators to store quantum information; and one or more computing devices storing program instructions, that when executed cause the one or more control circuits to perform: preparing a plurality of Toffoli magic states; distilling a Toffoli gate from two or more of the prepared Toffoli magic states, wherein distilling the Toffoli gate comprises preparing a check qubit associated with the Toffoli gate, wherein the check qubit indicates whether an error is present in the distilled Toffoli gate; and in response to verifying the check qubit does not indicate an error, utilizing the distilled Toffoli gate to perform a logical Toffoli gate operation.
  • Clause 32 The system of clause 31, wherein the distilled Toffoli gates comprise two distilled Toffoli gates that are distilled using 8 of the Toffoli magic states. Clause 33. The system of clause 32, wherein the two distilled Toffoli gate have a probability of error that is less than a highest probability of error of the respective ones of the 8 Toffoli magic states reduced by a power of two. Clause 34. The system of clause 31, wherein the distilled Toffoli gate is distilled using 2 of the Toffoli magic states. Clause 35. The system of clause 34, wherein the distilled Toffoli gate has an error probability that is reduced by a power of two as compared to respective error rates of the 2 Toffoli magic states, when the 2 Toffoli magic states have highly biased noise. Clause 36.
  • Clause 38 The system of any of clauses 31 through 37, wherein respective ones of the one or more control circuits comprise: an asymmetrically-threaded superconducting quantum interference device (ATS) coupled with respective ones of the mechanical resonators.
  • ATS superconducting quantum interference device
  • Clause 39 A method of distilling a logical Toffoli gate from a plurality of Toffoli magic states, the method comprising: performing a plurality of rounds of lattice surgery operations between qubits of a selected set of the plurality of Toffoli magic states and qubits for a distilled Toffoli gate; and wherein each of the rounds of lattice surgery acts on at least one of the check qubits associated with the distilled Toffoli gate.
  • a method of simulating a cat qubit comprising: defining basis states for the cat qubit; orthonormalizing the defined basis states to construct 2d orthonormalized shifted Fock basis states for the cat qubit; and determining matrix elements of an operator in the orthonormalized shifted Fock basis states.
  • Clause 43 The method of clause 42, wherein, in a ground state, normalized versions of the defined basis states are equivalent to complementary basis states of the cat qubit expressed as instead of computational basis states expressed as Clause 44.
  • Clause 45 The method of clause 41, further comprising: applying the determined matrix elements of the operator to simulate the cat-qubit in the 2d orthonormalized shifted Fock basis states.
  • Clause 46 The method of any of clauses 41 through 45, wherein the cat qubit being simulated is a hybrid acoustic-electrical qubit implemented using a linear mechanical resonator.
  • Clause 48 One or more non-transitory computer-readable media storing program instructions, that when executed on or across one or more processors, cause the one or more processors to: define basis states for a cat qubit to be simulated; orthonormalize the defined basis states to construct 2d orthonormalized shifted Fock basis states for the cat qubit; and determine matrix elements of an operator in the orthonormalized basis states.
  • the one or more non-transitory computer-readable media of clause 48 wherein the program instructions, when executed on or across the one or more processors, further cause the one or more processors to: apply the determined matrix elements of the operator to simulate the cat-qubit in the 2d orthonormalized shifted Fock basis states.
  • Clause 50 The one or more non-transitory computer-readable media of clause 48, wherein the defined basis states, before performing the orthonormalization, are defined such that the defined basis states are grouped into even and odd branches.
  • Clause 51 The one or more non-transitory computer-readable media of clause 48, wherein, in a ground state, normalized versions of the defined basis states are equivalent to complementary basis states of the cat qubit expressed as instead of computational basis states expressed as Clause 52.
  • a system comprising: a memory storing program instructions; and one or more processors, wherein the program instructions, when executed on or across the one or more processors cause the one or more processors to: define basis states for a cat qubit to be simulated; orthonormalize the defined basis states to construct 2d orthonormalized shifted Fock basis states for the cat qubit; and determine matrix elements of an operator in the orthonormalized basis states.
  • Clause 58 The system of any of clauses 53 through 57, wherein the cat qubit to be simulated is implemented using mechanical resonators.
  • Clause 59 The system of any of clauses 53 through 57, wherein the cat qubit to be simulated is implemented using electromagnetic resonators.
  • Clause 60 The system of any of clauses 53 through 57, wherein the cat qubit to be simulated is implemented in as system comprising one or more mechanical resonators and one or more electromagnetic resonators.
  • a method of measuring an ancilla qubit in a context of error correction of stored quantum information wherein a set of one or more error correction gates are applied between one or more data qubits storing the quantum information and the ancilla qubit to entangle the ancilla qubit with the one or more data qubits, the method comprising: transferring an excitation of the ancilla qubit to an additional readout qubit using a SWAP gate or other sequence of one or more gates that perform a swap function; performing one or more measurements of the readout qubit; and applying another set of one or more error correction gates between the one or more data qubits storing the quantum information and the ancilla qubit concurrently with performing at least some of the one or more measurements of the readout qubit.
  • Clause 62 The method of clause 61, wherein the data qubits, the ancilla qubit, and the readout qubit are implemented using mechanical resonators.
  • Clause 63 The method of clause 62, wherein the swap gate is mediated by an asymmetrically threaded superconducting quantum interference device (ATS).
  • ATS asymmetrically threaded superconducting quantum interference device
  • Clause 64 The method of clause 61, wherein the data qubits, the ancilla qubit, and the readout qubit are implemented using bosonic modes.
  • Clause 65 The method of clause 61, wherein an amount of time during which the one or more data qubits idle while performing the swap gate is less than an amount of time required to perform the one or more measurements of the readout qubit.
  • the one or more measurements of the readout qubit comprise a plurality of repeated measurements taken subsequent to performing the swap gate or other gates that perform the swap function; and are repeated up until an approximate time when a swap gate operation is performed for a next round of error correction, wherein the swap gate operation of the next round of error correction is performed subsequent to applying the other set of one or more error correction gates.
  • the plurality of repeated measurements of the readout qubit comprise repeated QND (quantum non demolition) parity measurements of the readout qubit.
  • the readout qubit is a higher mode of an ancilla oscillator for the ancilla qubit.
  • a method of measuring a bosonic qubit wherein a measurement outcome is affected by a single photon loss event comprising: deflating the bosonic qubit, prior to performing a readout of the bosonic qubit, such that phonons or photons are dissipated from the bosonic qubit while a measurement observable of the bosonic qubit is preserved; and performing, subsequent to the deflating, a readout of the measurement observable of the deflated bosonic qubit.
  • deflating the bosonic qubit comprises: changing a dissipater parameter such that an average photon number or average phonon number of the bosonic qubit ( ⁇ ) is reduced from an ⁇ initial value to an ⁇ final value, wherein Clause 72.
  • deflating the bosonic qubit comprises varying a steady state of a two-photon dissipation process for the bosonic qubit; and performing the readout of the measurement observable of the deflated bosonic qubit comprises performing a parity readout of the deflated bosonic qubit.
  • the bosonic qubit is implemented using a system comprising: mechanical resonators; and a control circuit coupled with the mechanical resonators, wherein the control circuit is configured to stabilize an arbitrary coherent state superposition (cat state) of the mechanical resonators to store quantum information, wherein to stabilize the arbitrary cat-state, the control circuit is configured to: excite phonons in the mechanical resonators by driving respective storage modes of the mechanical resonators; and dissipate phonons via an open transmission line coupled to the control circuit configured to absorb photons from a dump mode of the control circuit.
  • a system comprising: mechanical resonators; and a control circuit coupled with the mechanical resonators, wherein the control circuit is configured to stabilize an arbitrary coherent state superposition (cat state) of the mechanical resonators to store quantum information, wherein to stabilize the arbitrary cat-state, the control circuit is configured to: excite phonons in the mechanical resonators by driving respective storage modes of the mechanical resonators; and diss
  • control circuit comprises: an asymmetrically-threaded superconducting quantum interference device (ATS) coupled with the mechanical resonators, and wherein deflating the bosonic qubit comprises changing a steady state of a two photon dissipation controlled by the ATS.
  • ATS superconducting quantum interference device
  • a method of performing a measurement of a first mode (a) representing quantum information stored in a cat qubit comprising: deflating the cat qubit such that an even number of phonons or photons are dissipated from the cat qubit; evolving the cat qubit under a Hamiltonian that couples a number of excitations of the cat qubit to a change in a measurable property of another mode (b); and measuring the other mode (b).
  • deflating the cat qubit comprises deflating the cat qubit such that an average photon number or average phonon number of the cat qubit is reduced to zero, wherein an even c at state is mapped to and an odd cat state is mapped to the Hamiltonian is selected from a three or higher wave mixing Hamiltonian that correlates phonon number or photon number to a change of the other mode (b); and measuring the other mode (b) using homodyne, heterodyne, or photo detection.
  • the Hamiltonian selected from the three or higher wave mixing Hamiltonian comprises Clause 78.
  • the Hamiltonian selected from the three or higher wave mixing Hamiltonian comprises Clause 79.
  • the method of clause 75, wherein the Hamiltonian selected from the three or higher wave mixing Hamiltonian comprises a product of a ⁇ a with a term that affects the other mode (b) in a measureable way.
  • Clause 80. The method of clause 75, wherein: the cat qubit is implemented via a mechanical resonator; the other mode (b) is a dump mode; and the Hamiltonian is selected from a three or higher wave mixing Hamiltonian that correlates the average phonon number or the average photon number to a change of the other mode (b), wherein the three wave mixing is mediated by an ATS.
  • a method of performing a measurement of quantum information in a cat qubit comprising: evolving under a Hamiltonian which couples the phase of ⁇ of the cat qubit (an “a” mode) to a measurable property of another bosonic mode (a “b” mode) wherein the Hamiltonian is achieved via a three wave or higher mixing Hamiltonian; and performing homodyne, heterodyne, or photo detection of the “b” mode to determine a state of the “a” mode, wherein the cat qubit is implemented using a system comprising: mechanical resonators; and a control circuit comprising an asymmetrically-threaded superconducting quantum interference device (ATS) coupled with the mechanical resonators, wherein the control circuit is configured to stabilize an arbitrary coherent state superposition (cat state) of the mechanical resonators to store quantum information, wherein to stabilize the arbitrary cat-state, the control circuit is configured to: excite phonons in the mechanical resonators by driving respective storage modes of the mechanical resonators; and
  • Clause 82 The method of clause 81, wherein: the Hamiltonian is derived from a three wave mixing Hamiltonian mediated by an ATS; the “a” mode is implemented via a mechanical storage resonator; and the “b” mode is implemented via an electromagnetic resonator.
  • Clause 83 The method of clause 82, wherein a Hamiltonian for the readout comprises: Clause 84.
  • a system comprising: a mechanical linear resonator; and a control circuit coupled with the mechanical linear resonator, wherein the control circuit is configured to stabilize an arbitrary coherent state superposition (cat state) of the mechanical linear resonator to store quantum information, wherein to stabilize the arbitrary cat-state, the control circuit is configured to: excite phonons in the mechanical linear resonator by driving a storage mode of the mechanical linear resonator; and dissipate phonons from the mechanical linear resonator via an open transmission line coupled to the control circuit configured to absorb photons from a dump mode of the control circuit.
  • control circuit comprises: an asymmetrically-threaded superconducting quantum interference device (ATS) coupled with the mechanical resonator.
  • ATS superconducting quantum interference device
  • control circuit further comprising: one or more additional mechanical linear resonators coupled to the control circuit, wherein the control circuit is configured to stabilize respective cat states of the mechanical linear resonator and the one or more additional mechanical linear resonators via the single ATS and the single open transmission line.
  • Clause 87. The system of clause 86, wherein the storage modes of the respective mechanical linear resonators are detuned, such that the phonons supplied to the respective mechanical linear resonators are supplied in an incoherent manner.
  • the high-impedance inductor comprises: a planar meander or double-spiral inductor; a spiral inductor with one or more air bridges; an array of Josephson junctions; or a thin-film superconductor with a high kinetic inductance.
  • Clause 92. The system of any of clauses 85 through 91, wherein at least some of the mechanical linear resonators comprise three or more terminals, the system further comprising: two or more additional asymmetrically-threaded superconducting quantum interference devices (ATS), wherein a given one of the mechanical linear resonators comprising three or more terminals is coupled with three or more ATSs via the respective three or more terminals.
  • ATS superconducting quantum interference devices
  • a method of stabilizing coherent state superpositions (cat states) of a mechanical resonator comprising: exciting phonons in the mechanical resonator by driving a storage mode of the mechanical resonator; and dissipating phonons from the mechanical resonator via an open transmission line coupled to the control circuit configured to absorb photons from a dump mode of the control circuit.
  • Clause 94 The method of clause 93, wherein the phonons are excited in the mechanical resonator and dissipated from the mechanical resonator in pairs comprising two phonons.
  • control circuit comprises an asymmetrically- threaded superconducting quantum interference device (ATS) coupled with the mechanical resonator, wherein the ATS is configured to cause the two-phonon pairs to be excited in the mechanical resonator.
  • ATS superconducting quantum interference device
  • a method of stabilizing coherent state superpositions (cat states) of a plurality of resonators storing quantum information comprising: causing, via a single asymmetrically-threaded superconducting quantum interference device (ATS), pairs of two phonons or pairs of two photons to be excited in respective ones of the respective resonators by driving respective storage modes of the respective resonators; and dissipating pairs of two photons from a dump mode of a control circuit comprising the ATS, wherein the control circuit is coupled with the respective resonators, and wherein an open transmission line is coupled to the dump mode of the control circuit.
  • ATS superconducting quantum interference device
  • Clause 104 A method, comprising: implementing a multi-qubit gate among control and target qubits in a system comprising resonators and an asymmetrically-threaded superconducting quantum interference device (ATS), wherein implementing the multi-qubit gate comprises: implementing a linear drive for a phononic mode of a cat qubit for the gate, wherein the cat qubit is implemented via one of the resonators of the system; orchestrating Hamiltonian interactions, wherein the Hamiltonian interactions comprise a compensating Hamiltonian for the multi-qubit gate, and wherein the compensating Hamiltonian includes a frequency shift of a target mode and a control mode at the mechanical resonator being driven, wherein the control mode and the target mode are coupled via an optomechancical coupling.
  • ATS superconducting quantum interference device
  • Clause 105 The method of clause 104, wherein a setting for the multi-qubit gate comprises multiple ones of the resonators coupled to the ATS, wherein the ATS is shared by the multiple ones of the resonators.
  • Clause 106. The method of clause 104, wherein the optomechanical coupling is realized by off- resonantly driving the resonators and the ATS.
  • Clause 107. The method of clause 106, wherein said off-resonantly driving the resonators and the ATS avoids frequency collisions.
  • Clause 108. The method of clause 104, wherein the multi-qubit gate is a CNOT gate.
  • FIG.39 is a block diagram illustrating an example computing device that may be used in at least some embodiments.
  • FIG. 39 illustrates such a general-purpose computing device 3900 as may be used in any of the embodiments described herein.
  • computing device 3900 includes one or more processors 3910 coupled to a system memory 3920 (which may comprise both non-volatile and volatile memory modules) via an input/output (I/O) interface 3930.
  • processors 3910 coupled to a system memory 3920 (which may comprise both non-volatile and volatile memory modules) via an input/output (I/O) interface 3930.
  • Computing device 3900 further includes a network interface 3940 coupled to I/O interface 3930.
  • computing device 3900 may be a uniprocessor system including one processor 3910, or a multiprocessor system including several processors 3910 (e.g., two, four, eight, or another suitable number).
  • Processors 3910 may be any suitable processors capable of executing instructions.
  • processors 3910 may be general-purpose or embedded processors implementing any of a variety of instruction set architectures (ISAs), such as the x86, PowerPC, SPARC, or MIPS ISAs, or any other suitable ISA.
  • ISAs instruction set architectures
  • each of processors 3910 may commonly, but not necessarily, implement the same ISA.
  • System memory 3920 may be configured to store instructions and data accessible by processor(s) 3910.
  • the system memory 3920 may comprise both volatile and non-volatile portions; in other embodiments, only volatile memory may be used.
  • the volatile portion of system memory 3920 may be implemented using any suitable memory technology, such as static random access memory (SRAM), synchronous dynamic RAM or any other type of memory.
  • SRAM static random access memory
  • synchronous dynamic RAM any other type of memory.
  • flash-based memory devices including NAND-flash devices, may be used.
  • the non-volatile portion of the system memory may include a power source, such as a supercapacitor or other power storage device (e.g., a battery).
  • a power source such as a supercapacitor or other power storage device (e.g., a battery).
  • memristor based resistive random access memory (ReRAM) may be used at least for the non-volatile portion of system memory.
  • ReRAM resistive random access memory
  • MRAM magnetoresistive RAM
  • PCM phase change memory
  • program instructions and data implementing one or more desired functions are shown stored within system memory 3920 as code 3925 and data 3926.
  • I/O interface 3930 may be configured to coordinate I/O traffic between processor 3910, system memory 3920, and any peripheral devices in the device, including network interface 3940 or other peripheral interfaces such as various types of persistent and/or volatile storage devices.
  • I/O interface 3930 may perform any necessary protocol, timing or other data transformations to convert data signals from one component (e.g., system memory 3920) into a format suitable for use by another component (e.g., processor 3910).
  • I/O interface 3930 may include support for devices attached through various types of peripheral buses, such as a variant of the Peripheral Component Interconnect (PCI) bus standard or the Universal Serial Bus (USB) standard, for example.
  • PCI Peripheral Component Interconnect
  • USB Universal Serial Bus
  • I/O interface 3930 may be split into two or more separate components, such as a north bridge and a south bridge, for example. Also, in some embodiments some or all of the functionality of I/O interface 3930, such as an interface to system memory 3920, may be incorporated directly into processor 3910. [00249]
  • Network interface 3940 may be configured to allow data to be exchanged between computing device 3900 and other devices 3960 attached to a network or networks 3950, such as other computer systems or devices. In various embodiments, network interface 3940 may support communication via any suitable wired or wireless general data networks, such as types of Ethernet network, for example.
  • network interface 3940 may support communication via telecommunications/telephony networks such as analog voice networks or digital fiber communications networks, via storage area networks such as Fibre Channel SANs, or via any other suitable type of network and/or protocol.
  • system memory 3920 may represent one embodiment of a computer-accessible medium configured to store at least a subset of program instructions and data used for implementing the methods and apparatus discussed in the context of FIG.1 through FIG. 38. However, in other embodiments, program instructions and/or data may be received, sent or stored upon different types of computer-accessible media.
  • a computer- accessible medium may include non-transitory storage media or memory media such as magnetic or optical media, e.g., disk or DVD/CD coupled to computing device 3900 via I/O interface 3930.
  • a non-transitory computer-accessible storage medium may also include any volatile or non- volatile media such as RAM (e.g. SDRAM, DDR SDRAM, RDRAM, SRAM, etc.), ROM, etc., that may be included in some embodiments of computing device 3900 as system memory 3920 or another type of memory.
  • a plurality of non-transitory computer-readable storage media may collectively store program instructions that when executed on or across one or more processors implement at least a subset of the methods and techniques described above.
  • a computer-accessible medium may further include transmission media or signals such as electrical, electromagnetic, or digital signals, conveyed via a communication medium such as a network and/or a wireless link, such as may be implemented via network interface 3940.
  • a communication medium such as a network and/or a wireless link, such as may be implemented via network interface 3940.
  • Portions or all of multiple computing devices such as that illustrated in FIG. 39 may be used to implement the described functionality in various embodiments; for example, software components running on a variety of different devices and servers may collaborate to provide the functionality.
  • portions of the described functionality may be implemented using storage devices, network devices, or special-purpose computer systems, in addition to or instead of being implemented using general-purpose computer systems.
  • Various embodiments may further include receiving, sending or storing instructions and/or data implemented in accordance with the foregoing description upon a computer-accessible medium.
  • a computer-accessible medium may include storage media or memory media such as magnetic or optical media, e.g., disk or DVD/CD-ROM, volatile or non- volatile media such as RAM (e.g. SDRAM, DDR, RDRAM, SRAM, etc.), ROM, etc., as well as transmission media or signals such as electrical, electromagnetic, or digital signals, conveyed via a communication medium such as network and/or a wireless link.
  • RAM e.g. SDRAM, DDR, RDRAM, SRAM, etc.
  • ROM etc.
  • transmission media or signals such as electrical, electromagnetic, or digital signals
  • the methods may be implemented in software, hardware, or a combination thereof.
  • the order of method may be changed, and various elements may be added, reordered, combined, omitted, modified, etc.
  • Various modifications and changes may be made as would be obvious to a person skilled in the art having the benefit of this disclosure. It is intended to embrace all such modifications and changes and, accordingly, the above description to be regarded in an illustrative rather than a restrictive sense.

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Data Mining & Analysis (AREA)
  • Evolutionary Computation (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Artificial Intelligence (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)

Abstract

A fault tolerant quantum computer is implementing using hybrid acoustic-electric qubits. A control circuit includes an asymmetrically threaded superconducting quantum interference devices (ATS) that excites phonons in a mechanical resonator by driving a storage mode of the mechanical resonator and dissipates phonons from the mechanical resonator via an open transmission line coupled to the control circuit, wherein the open transmission line is configured to absorb photons from a dump mode of the control circuit.

Description

FAULT-TOLERANT QUANTUM HARDWARE USING HYBRID ACOUSTIC- ELECTRICAL QUBITS BACKGROUND [0001] Quantum computing utilizes the laws of quantum physics to process information. Quantum physics is a theory that describes the behavior of reality at the fundamental level. It is currently the only physical theory that is capable of consistently predicting the behavior of microscopic quantum objects like photons, molecules, atoms, and electrons. [0002] A quantum computer is a device that utilizes quantum mechanics to allow one to write, store, process and read out information encoded in quantum states, e.g. the states of quantum objects. A quantum object is a physical object that behaves according to the laws of quantum physics. The state of a physical object is a description of the object at a given time. [0003] In quantum mechanics, the state of a two-level quantum system, or simply, a qubit, is a list of two complex numbers, where the absolute value of the complex numbers must sum to one. Each of the two numbers is called an amplitude, or quasi-probability. The square of an amplitude gives a potentially negative probability. Hence, each of the two numbers correspond to the square root that event zero and event one will happen, respectively. A fundamental and counterintuitive difference between a probabilistic bit (e.g. a traditional zero or one bit) and the qubit is that a probabilistic bit represents a lack of information about a two-level classical system, while a qubit contains maximal information about a two-level quantum system. [0004] Quantum computers are based on such quantum bits (qubits), which may experience the phenomena of “superposition” and “entanglement.” Superposition allows a quantum system to be in multiple states at the same time. For example, whereas a classical computer is based on bits that are either zero or one, a qubit may be both zero and one at the same time, with different probabilities assigned to zero and one. Entanglement is a strong correlation between quantum particles, such that the quantum particles are inextricably linked in unison even if separated by great distances. [0005] A quantum algorithm is a reversible transformation acting on qubits in a desired and controlled way, followed by a measurement on one or multiple qubits. For example, if a system has two qubits, a transformation may modify four numbers; with three qubits this becomes eight numbers, and so on. As such, a quantum algorithm acts on a list of numbers exponentially large as dictated by the number of qubits. To implement a transform, the transform may be decomposed into small operations acting on a single qubit, or a set of qubits, as an example. Such small operations may be called quantum gates and the arrangement of the gates to implement a transformation may form a quantum circuit. [0006] There are different types of qubits that may be used in quantum computers, each having different advantages and disadvantages. For example, some quantum computers may include qubits built from superconductors, trapped ions, semiconductors, photonics, etc. Each may experience different levels of interference, errors and decoherence. Also, some may be more useful for generating particular types of quantum circuits or quantum algorithms, while others may be more useful for generating other types of quantum circuits or quantum algorithms. Also, costs, run-times, error rates, error rates, availability, etc. may vary across quantum computing technologies. [0007] For some types of quantum computations, such as fault tolerant computation of large scale quantum algorithms, overhead costs for performing such quantum computations may be high. For example for types of quantum gates that are not naturally fault tolerant, the quantum gates may be encoded in error correcting code. However this may add to the overhead number of qubits required to implement the large scale quantum algorithms. Also, performing successive quantum gates, measurement of quantum circuits, etc. may introduce probabilities of errors in the quantum circuits and/or measured results of the quantum circuits. BRIEF DESCRIPTION OF THE DRAWINGS [0008] FIG. 1A illustrates a system comprising a nano-mechanical linear resonator and an asymmetrically-threaded superconducting quantum interference device (ATS) that is configured to implement hybrid acoustic-electrical qubits, according to some embodiments. [0009] FIG. 1B illustrates a modeling of a storage mode (a) and a dump mode (b) of a hybrid acoustic-electrical qubit, wherein for large energy decay rates (Kb) that are significantly larger than a two-phonon coupling rate (g2), the dump mode can be adiabatically eliminated, such that the hybrid acoustic-electrical qubit can be modeled as having a single phonon decay rate (K1) and being driven by a two phonon drive having a two-phonon decay rate (K2), according to some embodiments. [0010] FIG. 2 illustrates a Foster network representing a one dimensional phononic-crystal- defect resonator (PCDR), according to some embodiments. [0011] FIG.3 illustrates a system comprising a plurality of nano-mechanical linear resonators and an asymmetrically-threaded superconducting quantum interference device (ATS) that is configured to provide multi-mode stabilization to hybrid acoustic-electrical qubits implemented via the plurality of nano-mechanical linear resonators, according to some embodiments. [0012] FIG.4 illustrates a system comprising a plurality of nano-mechanical linear resonators and an asymmetrically-threaded superconducting quantum interference device (ATS) that is configured to provide multi-mode stabilization to hybrid acoustic-electrical qubits implemented via the plurality of nano-mechanical linear resonators, wherein a microwave filter suppresses correlated decay processes, according to some embodiments. [0013] FIG. 5 illustrates a process of stabilizing a nano-mechanical resonator using an asymmetrically-threaded superconducting quantum interference device (ATS), according to some embodiments. [0014] FIG. 6 illustrates a process of stabilizing multiple nano-mechanical resonators using a multiplexed ATS, according to some embodiments. [0015] FIG.7 illustrates a data error occurring when measuring input errors for a set of qubits, wherein the data error causes multiple distinct syndromes, according to some embodiments. [0016] FIG.8 illustrates a measurement of logical ^
Figure imgf000004_0003
̅ for a repetition code and a corresponding circuit for measuring the logical
Figure imgf000004_0002
̅ for the repetition code, according to some embodiments. [0017] FIG. 9 illustrates a circuit for preparing Q=SHS, wherein the CNOT gate is a single physical CNOT and
Figure imgf000004_0001
is applied if the measurement outcome is -1, according to some embodiments. [0018] FIG.10 illustrates a circuit for preparing S, wherein the CNOT gate is a single physical CNOT and ^^̅ is applied if the measurement outcome is -1, according to some embodiments. [0019] FIG. 11A illustrates a circuit for implementing a logical Toffoli gate using Toffoli magic state injection, wherein X and Z basis are measured, according to some embodiments. [0020] FIG. 11B illustrates a table of Clifford error corrections to be applied based on the Z and X measurement basis of the circuit shown in FIG.11A, according to some embodiments. [0021] FIG.12 illustrates a circuit for implementing a logical CZ gate using transversal CNOT gates and S gates, according to some embodiments. [0022] FIG.13 illustrates a circuit for preparing the computational basis state
Figure imgf000004_0004
according to some embodiments. [0023] FIG. 14 illustrates a circuit for implementing a first step of a Toffoli magic state preparation using a controlled gA gate, wherein error correction (EC) is performed for one or more rounds using a STOP algorithm, according to some embodiments. [0024] FIG. 15 illustrates circuits for implementing a second step of the Toffoli magic state preparation, wherein the measurement of gA is repeated a number of times corresponding to a code distance (d) minus one divided by two, wherein a round of repetition code stabilizer measurements are performed between rounds of measuring gA, and wherein the protocol is aborted and started anew if any of the error detection measurements or gA measurements are non-trivial, according to some embodiments. [0025] FIG. 16 illustrates growing the computational basis state of
Figure imgf000005_0001
, from a first code distance (d1) to a second code distance (d2), according to some embodiments. [0026] FIG. 17 illustrates a circuit for measuring gA for a computational basis state
Figure imgf000005_0002
with a code distance of three, according to some embodiments. [0027] FIG.18 illustrates an alternative circuit for measuring gA for a computational basis state using a flag qubit, according to some embodiments. [0028] FIG. 19A illustrates an implementation of the gA measurement for a distance 5 repetition code prepared using a GHZ state, according to some embodiments. [0029] FIG. 19B illustrates a circuit equivalent for implementing the gA measurement shown in FIG.19A, according to some embodiments. [0030] FIG.20A illustrates high-level steps of a protocol for implementing a STOP algorithm, according to some embodiments. [0031] FIG. 20B illustrates high-level steps for determining a parameter (ndiff) used in the STOP algorithm, according to some embodiments. [0032] FIG. 21 illustrates high-level steps of a protocol for growing a repetition code from a first code distance to a second code distance using a STOP algorithm, according to some embodiments. [0033] FIG.22 illustrates high-level steps of a protocol for implementing a logical Toffoli gate using a bottom-up approach with Toffoli magic state injection, according to some embodiments. [0034] FIG. 23 illustrates high-level steps for distilling a low-error rate logical Toffoli gate using multiple ones of the Toffoli magic states prepared using a bottom-up approach as described in FIG.22, according to some embodiments. [0035] FIG. 24 illustrates a layout of multiple bottom up Toffoli magic states that are used to distill low-error rate logical Toffoli gates, according to some embodiments. [0036] FIG.25 illustrates a gadget for injection of CCZ gates using a | ^^ ^^ ^^^ magic state and a gadget for generalized CCZ injection for a unitary, according to some embodiments. [0037] FIG. 26 illustrates a circuit for implementing distillation of two low-error rate logical Toffoli gates (CCZ gates) from eight magic state inputs, according to some embodiments. [0038] FIG. 27 illustrates a Litinski diagram for performing lattice surgery realization of a distillation of eight Toffoli magic states to yield two low-error rate logical Toffoli gates, according to some embodiments. [0039] FIG. 28 illustrates a process for distilling low-error rate logical Toffoli gates from a plurality of noisy Toffoli magic states, according to some embodiments. [0040] FIG.29A illustrates a process of distilling two low-error rate logical Toffoli gates from eight noisy Toffoli magic states, according to some embodiments. [0041] FIG. 29B illustrates a process of distilling a low-error rate logical Toffoli gate from two noisy Toffoli magic states, according to some embodiments. [0042] FIG. 30 illustrates an example method of performing lattice surgery to distill a low- error rate logical Toffoli gate from a plurality of noisy Toffoli magic states, according to some embodiments. [0043] FIG.31 illustrates a circuit for performing measurements of a readout qubit for a set of error correction gates in parallel with performing a next round of error correction gates, according to some embodiments. [0044] FIG. 32 illustrates a more detailed circuit for performing measurements of a readout qubit for a set of error correction gates in parallel with performing a next round of error correction gates, according to some embodiments. [0045] FIG. 33 illustrates the more detailed circuit for performing measurements of a readout qubit for a set of error correction gates in parallel with performing a next round of error correction gates, wherein the circuit includes a deflation of the ancilla qubit prior to a swap to the readout qubit and wherein the measurement comprises a parity measurement of the readout qubit, according to some embodiments. [0046] FIG.34 is a process flow diagram illustrating using a switch operator to excite a readout qubit such that a subsequent round of error correction gates can be applied in parallel with performing measurements of the readout qubit, according to some embodiments. [0047] FIG. 35 is a process flow diagram illustrating a process for using deflation to perform measurements of a qubit, according to some embodiments. [0048] FIG. 36A is a process flow diagram illustrating a process for deflating a cat qubit and measuring a “b” mode of the deflated cat qubit to determine information about a first mode of the deflated cat qubit, according to some embodiments. [0049] FIG.36B is a process flow diagram illustrating another process for deflating a cat qubit and measuring a “b” mode of the deflated cat qubit to determine information about a first mode of the deflated cat qubit, according to some embodiments. [0050] FIG. 37 is a process flow diagram illustrating a process for evolving a cat qubit via three wave or higher mixing Hamiltonian and performing a homodyne, heterodyne, or photo detection of the evolved cat qubit to measure a measured property of another bosonic mode of the cat qubit, according to some embodiments. [0051] FIG.38 is a process flow diagram illustrating a process of utilizing a shifted Fock basis to simulate a cat qubit with
Figure imgf000007_0001
according to some embodiments. [0052] FIG.39 is a block diagram illustrating an example computing device that may be used in at least some embodiments. [0053] While embodiments are described herein by way of example for several embodiments and illustrative drawings, those skilled in the art will recognize that embodiments are not limited to the embodiments or drawings described. It should be understood, that the drawings and detailed description thereto are not intended to limit embodiments to the particular form disclosed, but on the contrary, the intention is to cover all modifications, equivalents and alternatives falling within the spirit and scope as defined by the appended claims. The headings used herein are for organizational purposes only and are not meant to be used to limit the scope of the description or the claims. As used throughout this application, the word “may” is used in a permissive sense (i.e., meaning having the potential to), rather than the mandatory sense (i.e., meaning must). Similarly, the words “include,” “including,” and “includes” mean including, but not limited to. When used in the claims, the term “or” is used as an inclusive or and not as an exclusive or. For example, the phrase “at least one of x, y, or z” means any one of x, y, and z, as well as any combination thereof. DETAILED DESCRIPTION [0054] The present disclosure relates to methods and apparatus for implementing a universal gate set for quantum algorithms that are fault-tolerant and that efficiently use resources. [0055] In many circumstances, the overhead cost of performing universal fault-tolerant quantum computation for quantum algorithms may be high. To perform such fault-tolerant quantum computations, magic state distillation is often used. For example, magic state distillation may be used for simulating non-Clifford gates in a fault tolerant way. However, since magic state distillation circuits are not fault-tolerant, the Clifford operations must be encoded in a large distance code in order to have comparable failure rates with the magic states being distilled. [0056] In order to perform quantum computations, universal fault-tolerant quantum computers may be required to be built with the capability of implementing all gates from a universal gate set with low logical error rates. Further, the overhead cost for achieving such low error rates may need to be low. Transversal gates are a natural way to implement such fault-tolerant gates. However, as is known from the Eastin-Knill theorem, given any stabilizer code, there will always be at least one gate in a universal gate set that cannot be implemented using transversal operations at the logical level. [0057] In order to deal with this issue, several fault-tolerant methods for implementing gates in a universal gate set have been explored. However, magic state distillation remains a leading candidate in the implementation of a universal fault-tolerant quantum computer. However, the costs of performing magic state distillation remains high. One of the reasons for the high costs of magic state distillation is that the Clifford circuits used to distill the magic states are often not fault-tolerant. Consequently, the Clifford gates are encoded in some error correcting code (often the surface code) to ensure that these gates have negligible error rates compared to the magic states being injected. [0058] In some embodiments, efficiently implementing a universal gate set may involve multiple layers of a quantum computer/quantum algorithm. For example at a lowest layer, building blocks of a quantum computer may include nano-mechanical resonators that are controlled using an asymmetrically-threaded superconducting quantum interference device (asymmetrically- threaded SQUID or ATS). The nano-mechanical resonators may be configured to resonate at one or more frequencies and may be coupled to the ATS, wherein the ATS controls the phonic modes. Also the ATS may be coupled to a bandpass filter and then an open transmission line that enables photons from the ATS to be adsorbed by the environment. At a next level, error correction may be implemented for the quantum computer comprising nano-mechanical resonators and an ATS. For example error corrected codes may be built that utilize the ATS and phononic modes of the nano-mechanical resonators to detect and/or correct errors. At yet another level, gates may be implemented for the quantum computer using the error corrected codes as inputs or outputs to the gates. Also, qubits of the gates may be error corrected. At yet a higher level, logical gates may be built that utilize one or more of the physical gates. Note that while several of the protocols described herein, such as the STOP algorithm, bottom-up approach to preparing Toffoli gates, the top-down distillation of Toffoli gates, measurement techniques, and/or shifted Fock basis simulations are described in terms of a system that utilizes nano-mechanical resonators that implement hybrid acoustic-electrical qubits, in some embodiments other hardware types may be used, such as those that implement electromagnetic qubits. Asymmetrically Threaded Superconducting Quantum Interference Device (ATS)-Phononic Hybrid System [0059] In some embodiments, a circuit for use in a quantum computer may comprise nano- mechanical linear resonators and an asymmetrically threaded superconducting quantum interference device (SQUID, ATS). The nano-mechanical resonators and ATS may implement qubits that are hybrid acoustic-electrical qubits, for example as opposed to electromagnetic qubits. In some embodiments, both the nano-mechanical resonators and ATS may be situated on a same component and may provide for easily extending a system to include additional components with additional nano-mechanical resonators that implement additional hybrid acoustic-electrical qubits. This may also enable scaling of a number of qubits needed for a quantum computer by including more or fewer components. Such an approach may allow for simpler extension and scaling than a system wherein components that implement qubits are integrated into a single chip, and newly designed chips are required to extend or scale the system to have more or fewer qubits. As used herein, the terms “mechanical”. “acoustic”, “phononic”, etc. may be used to describe mechanical circuits as opposed to electromagnetic circuits. [0060] In some embodiments, more phononic resonators (e.g. nano-mechanical resonators) may be connected to a same control circuit, such as an ATS, than is possible for electromagnetic resonators. This is due, at least in part, to the smaller size of the phononic resonators as compared to electromagnetic resonators. However, in such systems cross-talk between the phononic resonators coupled to the same control circuit must be addressed in order to avoid errors. Multiplexed control of phononic resonators using a common control circuit, such as an ATS, is further discussed in detail below. [0061] In some embodiments, a structure of a chip comprising phononic resonators may take the form of a planar circuit with metal components that form superconducting circuits, such as the ATS. The ATS may be physically connected via wire leads to very small (e.g. micron-sized or nano-sized) suspended mechanical devices, such a linear nano-mechanical resonator. The suspended mechanical devices may be located on a same chip with the ATS circuit or may by located on a separate chip that has been heterogeneously integrated via a flip chip, or similar component, with a bottom chip comprising the ATS and/or additional suspended mechanical devices, e.g. other mechanical resonators. [0062] In some embodiments, electrical connections to the ATS may be laid on top of a piezoelectric material that has been etched into a pattern to form the nano-mechanical resonators. In some embodiments, different variables, such as piezoelectric coefficient, density, etc. may affect how strongly coupled the ATS is to the mechanical resonators. This coupling may be expressed in terms of a phonon coupling rate in the Hamiltonian for the system. [0063] When coupling a nano-structure, such as a nano-mechanical resonator, to an electrical circuit, very small capacitors are required since the nano-structure components, e.g. nano- mechanical resonators, are also very small. Typically in an electrical circuit, such as an ATS circuit, there are other capacitances. Since the capacitor for the nano-structure is very small, these other capacitances in the circuit may lower the signal voltage and thus dilute a signal directed to one of the nano-components, such as a nano-mechanical resonator. However, to deal with this issue, a high-impedance inductor may be coupled in the control circuit between the ATS and the nano-mechanical resonator. The high-impedance inductor may have a very low parasitic capacitance, thus electrical fields directed at the nano-mechanical resonators may act on the nano- mechanical resonators with only minimal dilution due to capacitance of the inductor (e.g. parasitic capacitance). Also, the high impedance inductor may suppress loss mechanisms. [0064] In some embodiments, the non-linear coupling of the nano-mechanical resonators may be given by
Figure imgf000010_0015
where
Figure imgf000010_0016
is a coupling rate between a storage mode
Figure imgf000010_0017
and a dump mode (b). In some embodiments, the non-linearity may be implemented using an asymmetrically threaded SQUID (superconducting quantum interference device), also referred to herein as an “ATS.” The ATS may comprise a superconducting quantum interference device (SQUID) that has been split approximately in the middle by a linear inductor. In its most general form, the ATS potential is given by the following equation: [0065]
Figure imgf000010_0001
[0066] In the above equation,
Figure imgf000010_0002
is the phase difference across the ATS,
Figure imgf000010_0003
Figure imgf000010_0004
is the magnetic flux threading the left (right) loop, in units of the reduced magnetic flux quantum
Figure imgf000010_0005
Here
Figure imgf000010_0006
is the junction asymmetry. This ATS potential
Figure imgf000010_0007
can be further simplified by tuning
Figure imgf000010_0008
^ and
Figure imgf000010_0009
with two separate flux lines. For example, FIG.1A illustrates ATS 102 included in control circuit 100, wherein ATS 102 includes separate flux lines 108 and 110. Note that FIG. 1A includes ATS 102 in control circuit 100 and also an enlarged depiction of ATS 102 adjacent to control circuit 102 that shows ATS 102 in more detail. The flux lines may be set such that:
Figure imgf000010_0010
[0067] In the above equations,
Figure imgf000010_0011
is a small alternating current (AC) component added on top of the direct current (DC) basis. At this bias point, and assuming that
Figure imgf000010_0013
then the equation above for
Figure imgf000010_0012
can be reduced to:
Figure imgf000010_0014
[0068] Using the control circuit 100 shown in FIG. 1A, quantum information may be stored in a state of a linear mechanical resonator. For example quantum information may be stored in storage mode 106. The stored quantum information may also be autonomously error corrected by way of artificially induced two-phonon driving and two-phonon decay controlled by the ATS. These two phonon processes are induced through the non-linear interaction
Figure imgf000011_0002
g2 between the storage mode a and an ancillary mode b, called the dump, such as dump mode 104 shown in FIG.
IA. The dump mode is designed to have a large energy decay rate Kd so that it rapidly and irreversibly “dumps” the photons it contains into the environment. If Kd is much larger (e.g. ~10x or more) than the coupling rate g2. then the dump mode can be adiabatically eliminated from the Hamiltonian, for example as shown in FIG. IB. For example, as shown on the right side of FIG.
IB, the emission of phonon pairs via
Figure imgf000011_0005
can be accurately modeled as a dissipative process described by a dissipator ~ D [a2]. Additionally, if the dump mode is linearly driven as
Figure imgf000011_0004
h. c. this provides the required energy to stimulate the reverse process which in the
Figure imgf000011_0003
adiabatic elimination, as shown in FIG. IB, can be modeled as an effective two-phonon drive. Altogether, the dynamics can be accurately modeled through the equation:
[0069]
Figure imgf000011_0001
[0070] The steady states of the dynamics of the system shown in FIG. IB are the coherent states | a), |— a), or any arbitrary superposition of the two. This protected subspace can be used to encode a qubit through the following definition of a logical basis: |0L)=|a), | 1L)=| — a}. Qubits encoded in this way are effectively protected from X errors (e.g. bit flips) because the bit-flip rate decays exponentially with the code distance |a |2, as long as K2 |a|2 » K1, wherein K1 is the ordinary (e.g. single-photon) decay rate of the storage mode. Since |a|2~l, this condition is generally equivalent to K2/K1 » 1. However, Z errors (e.g. phase flips) may not be protected by this code.
[0071] As discussed above, an ATS is formed by splitting a SQUID with a linear inductor. The magnetic flux threading of each of the two resulting loops of the ATS can be controlled via two nearby on-chip flux lines, such as flux lines 108 and 110 shown in FIG. 1A. These flux lines can be tuned to appropriate values and can send radio frequency (rl) signals at appropriate frequencies for a desired non-linear interaction to be resonantly activated in the nano-mechanical resonator. The dump mode 104, may further be strongly coupled to a dump line of characteristic impedance Zo, which induces a large energy decay rate as required.
[0072] In some embodiments, the nano-mechanical storage resonator (e.g. storage 106) may be a piezoelectric nano-mechanical resonator that supports resonances in the GHz range. These resonances may be coupled to superconducting circuits of the control circuit 100 via small superconducting electrodes (e.g. terminals) that either directly touch or closely approach the vibrating piezoelectric region of the nano-mechanical resonators. The values of the nonlinear coupling rate g2, the two-phonon dissipation rate k2. and the ratio K2/K1 can be calculated as follows:
[0073] First, compute the admittance seen at the terminals of the nano-mechanical
Figure imgf000012_0001
resonator using a finite element model solver. Next, find an equivalent circuit using a Foster synthesis algorithm (further discussed below). Then, diagonalize the combined circuit and compute the zero-point phase fluctuations
Figure imgf000012_0002
Furthermore, compute the dissipation rates kb and k1 of the eigenmodes. Next compute Also, compute k2 =
Figure imgf000012_0003
Figure imgf000012_0004
[0074] In some embodiments, a nano-mechanical element, such as the nano-mechanical resonator that implements storage mode 106 and dump mode 104 may be represented as an equivalent circuit that accurately captures its linear response. This can be done using Foster synthesis if the admittance Ym(a>) seen from the terminals of the mechanical resonator is known. For example, the admittance may be computed using finite element modeling. In some embodiments, a Foster network may be used to accurately represent a one-dimensional (e.g. linear) phononic-crystal-defect resonator (PCDR), which may be a type of nano-mechanical resonator used in some embodiments. In some embodiments, the dump resonator may be modeled as having a fixed impedance, such as 1 kilo ohms.
[0075] For example FIG. 2 illustrates a version of control circuit 100 that has been represented using a Foster network (e.g. equivalent circuit 200). In its simplest form, equivalent circuit 200 may be represented as ‘a DC capacitance’ in series with an LC block (e.g. L represents an inductor and C represents a capacitor for the LC block), wherein an additional resistor is inserted to include the effects of the loss in the resonator. For example, Foster network 210 is modeled to include capacitor 204, inductor 206, and resistor 208. The linear part of the dump resonator (including the inductor that splits the ATS) can also be represented as an LC block, such as LC block 212. In this representation the dump resonator (e.g. 212) and the storage resonator (e.g. 210) are represented as two linear circuits with a linear coupling and can therefore be diagnolized by a simple transformation of coordinates. For example, FIG. 2 illustrates a diagnolized circuit representation 214. The resulting “storage-like”
Figure imgf000012_0006
and “dump-like”
Figure imgf000012_0005
eigenmodes both contribute to the total phase drop across the ATS. For example These modes therefore
Figure imgf000012_0007
mix the via the ATS potential, which may be redefined as
Figure imgf000012_0008
because the inductor has already been absorbed into the linear network. The zero-point phase fluctuations of each mode are given by :
[0076]
Figure imgf000013_0001
[0077] In the above equation C is the Maxwell capacitance matrix of the circuit. U is the orthogonal matrix that diagnolizes
Figure imgf000013_0002
where L-1 is the inverse inductance matrix. The index
Figure imgf000013_0003
labels the mode and j labels the node in question. Note that in some instances as described herein the notation of j may be omitted because it is clear from context, e.g. the node of interest is the one right above the ATS.
[0078] The way in which the ATS mixes the modes is explicit given the third-order term in the Taylor series expansion of the sin
Figure imgf000013_0004
contains terms of the form which is the
Figure imgf000013_0005
required coupling. This is a reason for using the ATS as opposed to an ordinary junction, which has a potential ~ cos
Figure imgf000013_0006
[0079] For analysis the pump and drive frequencies may be set to
Figure imgf000013_0008
and a>d = a>b. This brings the terms into resonance allows the other terms in the
Figure imgf000013_0007
rotating wave approximation (RWA) to be dropped. The coupling is given by g2 = Additionally, a linear drive at frequency is added to supply
Figure imgf000013_0011
Figure imgf000013_0010
Figure imgf000013_0009
the required energy for the two-photon drive.
Multi-Mode Stabilization/ATS Multiplexing
[0080] In some embodiments, the scheme as described above may be extended to be used in a multi-mode setting, in which N>1 storage resonators are simultaneously coupled to a single dump +ATS. This may allow for the cat subspaces of each of the storage modes to be stabilized individually. For example, a dissipator of the form However, in order to avoid
Figure imgf000013_0016
simultaneous or coherent loss of phonons from different modes (which fails to stabilize the desired subspaces), an incoherent dissipator is required. This can be achieved if the stabilization pumps and the drives for the different modes are purposefully detuned as follows:
[0081]
Figure imgf000013_0012
Figure imgf000013_0013
[0082] In the above equation are the pump
Figure imgf000013_0014
and drive frequencies for mode m. By detuning the pumps, the pump operators of different modes can rotate with respect to each other. If the rotation rate is larger than k2 then the coherences of the form in the Lindbladian vanish in a time averaged sense. The drive de-tunings allow the
Figure imgf000013_0015
pumps and drives to remain synchronized even though the pumps have been detuned relative to one another. [0083] In some embodiments, the modes and may be simultaneously stabilized using a multiplexed ATS, wherein the pumps have been detuned. Simulations may be performed to determine the detuning parameters using the simulated master equation, as an example: [0084]
Figure imgf000014_0001
Bandwidth Limits [0085] The above described tuning works best when the detuning
Figure imgf000014_0013
is relatively small as compared to ^^^. This is due to the fact that, unlike the single-mode case, where the
Figure imgf000014_0003
two-phonon decay of the multi-mode system is given by: [0086]
Figure imgf000014_0002
[0087] The Lorentzian suppression factor can be understood by the fact that photons/phonons emitted by the dump mode as a result of stabilizing mode n are emitted at a frequency
Figure imgf000014_0012
and are therefore “filtered” by the Lorentzian line-shape of the dump mode which has linewidth This sets an upper bound on the size of the frequency region that the de-tunings are allowed to occupy. Furthermore, in some embodiments, the de-tunings ∆^ may all be different from each other by an amount greater than
Figure imgf000014_0011
in order for the dissipation to be incoherent. In a frequency domain picture, the spectral lines associated with emission of photons/phonons out of the dump must all be resolved. This, also sets a lower bound on the proximity of different tunings. As such, since an upper bound and lower bound are set, bandwidth limits for the de-tunings may be determined. Also, taking into account these limitations, an upper bound on the number of modes that can be simultaneously stabilized by a single dump can also be determined. For example, if de- tunings are selected to be
Figure imgf000014_0007
, then the maximum number of modes that may be simultaneously stabilized may be limited as
Figure imgf000014_0008
As a further example, for typical parameters, such as ~10 MHz and
Figure imgf000014_0009
1 MHz, this results in bandwidth limits that
Figure imgf000014_0010
allow for approximately 10 modes to be simultaneously stabilized. [0088] For example, FIG. 3 illustrates a control circuit 300 that includes a single dump resonator 302 that stabilizes multiple storage resonators 304. Use of a high-impedance inductor to enhance coupling between a dump resonator and one or more storage resonators [0089] In some embodiments, the coupling rate
Figure imgf000014_0005
^^ may be increased by using a high impedance inductor. This is because depends strongly on the effective impedance
Figure imgf000014_0006
of the dump resonator. For example, Thus, in some embodiments, using a large inductor in
Figure imgf000014_0004
the ATS may result in a large effective impedance In some embodiments, the inductor chosen to be included in the ATS circuit may be sufficiently linear to ensure stability of the dump circuit when driven strongly during stabilization. For example, a high impedance inductor used may comprise a planar meander or double-spiral inductor, a spiral inductor with air bridges, an array with a large number of (e.g. greater than 50) highly transparent Josephson junction, or other suitable high impedance inductor. Filtering in Multi-Mode Stabilization/Multiplexed ATS [0090] In some embodiments, microwave filters (e.g. metamaterial waveguides) may be used to alleviate the limitations with regard to bandwidth limits as discussed above. Such filters may also be used to eliminate correlated errors in multiplexed stabilization embodiments. For example, FIG. 4 illustrates control circuit 400 that includes a single dump resonator 404, multiple storage resonators 406, and a filter 402. [0091] More specifically, when stabilizing multiple storage modes with the same dump resonator and ATS device, a number of cross-terms appear in the Hamiltonian that would otherwise not be there in the single-mode case. For example, these terms take the form of
Figure imgf000015_0003
After adiabatic elimination of the b mode (for example as discussed in regard to FIG.1B), these terms effectively become jump operators of the form Unlike the
Figure imgf000015_0001
desired jump processes
Figure imgf000015_0002
which result in the individual stabilization of the cat subspace of each resonator, the correlated decay terms result in simultaneous phase flips of the resonators j and k. For example, these correlated errors can be damaging to the next layer of error correction, such as in a repetition or striped surface code. [0092] In some embodiments, in order to filter out the unwanted terms in the physical Hamiltonian that give rise to effective dissipators that cause correlated phase flips, the de-tunings of the unwanted terms may be larger than half the filter bandwidth. This may result in an exponential suppression of the unwanted terms. Said another way, the de-tunings and filter may be selected such that detuning of the effective Hamiltonian is larger than half the filter bandwidth. Moreover, the filter mode (along with the dump mode) may be adiabatically eliminated from the model in a similar manner as discussed in FIG.1B for the adiabatic elimination of the dump mode. This may be used to determine an effective dissipator for a circuit, such as control circuit 400, that includes both dump resonator 404 and filter 402. [0093] As discussed above, correlated phase errors may be suppressed by a filter if the corresponding emitted photons have frequencies outside of the filter bandwidth. In some embodiments, all correlated phase errors may be simultaneously suppressed by carefully choosing the frequencies of the storage modes. For example, cost functions may be used taking into account a filter bandwidth to determine optimized storage frequencies. For example, in some embodiments a single ATS/dump may be used to suppress decoherence associated with all effective Hamiltonians for 5 storage modes. In such embodiments, all dominant sources of stochastic, correlated phase errors in the cat qubits may be suppressed. Multi-terminal mechanical resonators [0094] In some embodiments, nano-mechanical resonators, such as those shown in FIGs.1-4, may be designed with multiple terminals that allow a given nano-mechanical resonator to be coupled with more than one ATS/control circuit. For example, a single connection ATS may include a ground terminal and a signal terminal, wherein the signal terminal couples with a control circuit comprising an ATS. In some embodiments, a multi-terminal nano-mechanical resonator may include more than one signal terminal that allows the nano-mechanical resonator to be coupled with more than one control circuit/more than one ATS. For example, in some embodiments, a nano-mechanical resonator may include three or more terminals that enable the nano-mechanical resonator to be coupled with three or more ATSs. If not needed, an extra terminal could be coupled to ground, such that the multi-terminal nano-mechanical resonator functions like a single (or fewer) connection nano-mechanical resonator. In some embodiments, different signal terminals of a same nano-mechanical resonator may be coupled with different ATSs, wherein the ATSs may be used to implement gates between mechanical resonators, such as a CNOT gate. For example, this may allow for implementation of gates on the stabilizer function. Example Physical Gate Implementations [0095] Recall the Hamiltonian of a system comprising of multiple phononic modes
Figure imgf000016_0008
coupled to a shared ATS mode
Figure imgf000016_0007
Figure imgf000016_0001
[0096] wherein
Figure imgf000016_0002
. Also,
Figure imgf000016_0003
quantify zero- point fluctuations of the modes
Figure imgf000016_0005
To simplify the discussion, neglect small frequency shifts due to the pump for the moment and assume that the frequency of a mode is given by
Figure imgf000016_0006
its bare frequency (in practice, however, the frequency shifts need to be taken into account; see below for the frequency shift due to pump). Then, in the rotating frame where every mode rotates with its own frequency, the following is obtained:
Figure imgf000016_0004
where quantify zero-point fluctuations of the modes
Figure imgf000017_0001
Note that the rotating
Figure imgf000017_0010
frame has been used where each mode rotates with its own frequency.
[0097] First, a linear drive on a phononic mode, say
Figure imgf000017_0002
can be readily realized by using a pump and choosing the pump frequency to be the frequency of the mode
Figure imgf000017_0003
Figure imgf000017_0026
that is to be driven, that is, . Then, by taking only the leading order linear term in the sine
Figure imgf000017_0004
potential (e.g., sin
Figure imgf000017_0005
we get the desired linear drive:
Figure imgf000017_0006
where comprises fast-oscillating terms such as with I ≠ k and
Figure imgf000017_0007
as well as other terms that rotate even faster. Since the frequency
Figure imgf000017_0009
differences between different modes are on the order of 100 MHz but
Figure imgf000017_0008
is typically much smaller than 100 MHz, the faster oscillating terms can be ignored using a rotating wave approximation (RWA).
[0098] To avoid driving unwanted higher order terms, one may alternatively drive the phononic mode directly, at the expense of increased hardware complexity, instead of using the pump at the ATS node.
Figure imgf000017_0027
[0099] Now moving on to the implementation of the compensating Hamiltonian for a CNOT gate. For example a compensating Hamiltonian for a CNOT gate may have the form:
Figure imgf000017_0011
[00100] Without loss of generality, consider the CNOT gate between the modes
Figure imgf000017_0013
(control) and d2 (target). Note that HCN0T comprises an optomechanical coupling
Figure imgf000017_0012
between two phononic modes, a linear drive on the control mode and a selective
Figure imgf000017_0014
To realize the optomechanical coupling, one might
Figure imgf000017_0015
be tempted to directly drive the cubic term . in the sine potential via a pump
Figure imgf000017_0016
Figure imgf000017_0017
However, the direct driving scheme is not suitable for a couple of reasons: since the
Figure imgf000017_0019
term rotates with frequency the required pump frequency is given by which
Figure imgf000017_0020
Figure imgf000017_0021
Figure imgf000017_0018
is the same pump frequency reserved to engineer a linear drive on the mode. Moreover, the
Figure imgf000017_0023
term rotates at the same frequency as those of undesired cubic terms. Hence, even if the
Figure imgf000017_0022
linear drive is realized by directly driving the phononic mode one cannot selectively drive the
Figure imgf000017_0024
desired optomechanical coupling by using the pump frequency due to the frequency
Figure imgf000017_0025
collision with the other cubic terms. [00101] In some embodiments, to overcome these frequency collision issues, the optomechanical coupling is realized by off-resonantly driving the term For
Figure imgf000018_0001
example, the fact that a time-dependent Hamiltonian
Figure imgf000018_0002
yields an effective Hamiltonian upon time-averaging is used assuming that the population of the
Figure imgf000018_0003
mode is small (e.g
Figure imgf000018_0017
and the detuning Δ is sufficiently large. Hence given a
Hamiltonian this gives
Figure imgf000018_0004
Figure imgf000018_0005
[00102] In particular, by choosing
Figure imgf000018_0007
the optomechanical coupling can be realized as well as the selective frequency shift of the mode, e.g. up to an
Figure imgf000018_0006
Figure imgf000018_0008
undesired cross-Ker term In this scheme, the desired selectivity is achieved
Figure imgf000018_0010
because the term is detuned from other undesired terms such as with
Figure imgf000018_0011
Figure imgf000018_0009
k > 3 by a frequency difference
Figure imgf000018_0013
Thus, the unwanted optomechanical coupling
Figure imgf000018_0012
can be suppressed by a suitable choice of the detuning It is remarked that the
Figure imgf000018_0015
unwanted cross-Kerr term can in principle be compensated by off-resonantly driving
Figure imgf000018_0014
another cubic term with a different detuning Δ'#= A.
Figure imgf000018_0016
[00103] Lastly, similar approaches as used in the compensating Hamiltonian for the CNOT gate can also be used for a compensating Hamiltonian for a Toffoli gate.
Example processes for implementing an ATS-Phononic Hybrid System
[00104] FIG. 5 illustrates a process of stabilizing a nano-mechanical resonator using an asymmetrically -threaded superconducting quantum interference device (ATS), according to some embodiments.
[00105] At block 502, a control circuit of a system comprising one or more nano-mechanical resonators causes phonon pairs to be supplied to the nano-mechanical resonator via an ATS to drive a stabilization of a storage mode of the nano-mechanical resonator such that the storage mode is maintained in a coherent state. Also, at block 504, the control circuit dissipates phonon/photon pairs from the nano-mechanical resonator via an open transmission line of the control circuit that is coupled with the nano-mechanical resonator and the ATS.
[00106] FIG. 6 illustrates a process of stabilizing multiple nano-mechanical resonators using a multiplexed ATS, according to some embodiments.
[00107] At block 602, storage modes for a plurality of nano-mechanical resonators that are driven by a multiplexed ATS are chosen such that the storage modes are de-tuned. For example, block 602 may include detuning storage modes supported by a plurality of nano-mechanical resonators from a dump resonator containing an asymmetrically-threaded superconducting quantum interference device At block 604 phonon pairs are supplied to a first one of the nano- mechanical resonators at a first frequency and at block 606 phonon pairs are supplied to other ones of the nano-mechanical resonators at other frequencies such that the frequencies for the respective storage modes of the nano-mechanical resonators are de-tuned. For example, blocks 604 and 606 may include applying a pump and drive to an ATS to activate two-phonon driven-dissipative stabilization to a first one of the nano- mechanical resonators and suppressing, via a microwave bandpass filter, correlated decay processes from the plurality of nano-mechanical resonators. [00108] Additionally, the storage mode frequencies and a bandwidth for a filter of the control circuit may be selected such that de-tunings of unwanted terms are larger than half the filter bandwidth. Then, at block 608 a microwave filter with the determined filter bandwidth properties may be used to filter correlated decay terms from the plurality of nano-mechanical resonators. STOP Algorithm and Preparation of a Fault-Tolerant Universal Gate Set Including Bottom-Up Preparation of Toffoli Gates [00109] In some embodiments, the systems described above that implement hybrid acoustic- electrical qubits may be used to implement a universal gate set. In some embodiments, error correction may be used to correct for errors and/or noise in such systems. In some embodiments, a STOP algorithm, as described herein, may provide an efficient protocol for providing error detection and/or correction. In some embodiments, systems, as described above, that implement hybrid acoustic-electrical qubits may introduce noise that is biased towards phase flip errors. With such knowledge about error bias, error correction protocols, such as a STOP algorithm, may be used to efficiently correct for errors. Additionally, as further discussed below, error correction may be used to correct for errors when preparing Toffoli gates using a bottom-up approach (and/or when using a top-down approach which is further discussed in the next section). [00110] In some embodiments, a STOP algorithm may be used to determine when it is acceptable to STOP measuring stabilizer measurements as part of an error detection/error correction operation while guaranteeing a low probability of logical errors. For example, a STOP algorithm may be used to measure stabilizer measurements prior to performing a Toffoli gate wherein measured errors are corrected prior to applying the Toffoli gate. [00111] An alternative to using a STOP decoder may be to use graph based error correction techniques. However, these techniques are typically predicated on the use of Clifford gates and are not as useful when applying Toffoli gates. For example, these techniques involve measuring data qubits at the end of performing an operation to determine errors. However, for non-Clifford gates, a single qubit error of the initial input qubits can cause a logical failure that may not be detected using a standard graph based error correction technique. [00112] In contrast, a STOP algorithm measures stabilizers for input data qubits such that error detection and/or correction can be performed prior to performing an operation, such as a non- Clifford gate. In addition, instead of measuring the stabilizers for the data qubits a fixed number of times, which may be insufficient to detect/correct logical errors in some situations, or which may be unnecessary in other situations, a STOP algorithm may be used to determine when stabilizer measurements can be stopped while still guaranteeing a low probability of logical errors. For example, in some embodiments, a STOP algorithm may guarantee that a total number of failures is less than a code distance of repeatedly encoded data qubits (e.g. a repetition code) divided by two. Thus the majority of the repeated data qubits are known to not be erroneous and a logical error will not occur because the majority of the encoded data qubits are correct. For example, errors can be tolerated as long as the total number of errors is less than the code distance divided by two. In such situations, the errors will not result in a logical error, because the majority of the encoded qubits are not erroneous. Note that a physical error is distinct from a logical error. A physical error acts on an individual qubit, whereas a logical error is an erroneous logical output determined based on physical qubits. A logical error cannot be directly detected, and if not detected, cannot be corrected. For example, an uncorrected physical error may result in a logical error, but if the physical error was undetected, there is no way to subsequently measure the logical error caused by the physical error, without knowing about the physical error. [00113] In some embodiments, a STOP algorithm may also be applied to qubits used for performing non-Clifford gates, such as a Toffoli gate. Also, in some embodiments, a STOP algorithm may be used when growing a repetition code from a first code distance to a second code distance, wherein stabilizers at a boundary between code blocks that are being joined to grow the repetition code are measured. The STOP algorithm may be used to determine when repeated measurements of the stabilizers at the boundary can be stopped without introducing logical errors into the expanded repetition code. [00114] In some embodiments, when preparing a Toffoli gate, a STOP algorithm may be used to detect and/or correct errors in the initial computational basis states used to prepare the Toffoli gate. The STOP algorithm may also be used in preparing Clifford gates that are applied in a sequence to implement the Toffoli gate, wherein the STOP algorithm is used to detect/correct errors in the Clifford gates. Additionally, the STOP algorithm may be used to perform error detection/correction between measurements of gA which is repeatedly measured as part of preparing the Toffoli gates using a bottom up approach, as further discussed below. In some embodiments, a round of error detection may be performed between each round of measuring gA. [00115] In some embodiments, a STOP algorithm may follow an algorithm similar to the algorithm shown below:
[00116] Set: t = (d - l)/2 ; ndiff = 0 ;countSyn = 1; SynRep = 1
Increase = 0 ; test = 0 while test = 0 {
~ t { test = 1;
Measure the error syndrome. Store the error syndrome from the previous round in synPreviousRound and the current syndrome in synCurrentRound. if (countSyn > 1) { if (synPreviousRound = synCurrentRound) {
SynRep = SynRep + 1 ;
Increase = 0;
} else {
SynRep = 0; if (ndiff lncrease = 0) { ndiff= n l"## + 1; ndiff Increase = 1;
} else ndiff Increase = 0 if (SynRep = t - ndiff+ 1) { test = 1; countSyn = countSyn + 1;
[00117] Said another way, let Sjbe the error syndrome of the jth round of syndrome measurements. The goal of the STOP algorithm is to compute the minimum number of faults that can cause changes between two consecutive syndromes. The worst case scenario is where a single two-qubit gate failure results in three different syndrome outcomes. To see this, let Sk-1be the syndrome from round k - 1. Now suppose the operator X®n is measured using the circuit 700 shown in FIG 7 with the input error Ein such that s(Ein) = sk-1. Further, suppose the last two- qubit gate fails resulting in the error A®. The X error results in the data error XEin(e.g. data error 702) which may have syndrome Sk-15 while the Z error flips the syndrome outcome (e.g. measurement outcome 704), resulting in the syndrome sk which can be different from Sk-1and Sk+1. Hence without any other failure, this example shows that a single fault can cause three distinct syndromes sk-1, sk and sfc+1.
[00118] The STOP decoder tracks consecutive syndrome measurement outcomes s2, ... , sr', where r is the total number of syndrome measurements (r is not fixed), between two syndrome measurement rounds k and k + 1 (with corresponding syndromes sk and sfc+1), wherein the minimum number of faults causing a change in syndrome outcome (represented by the variable ndiff) is only incremented if ndiff did not increase in round k.
[00119] Now assuming there were no more than t = (d - l)/2 faults for a distance d error correcting code, if the same syndrome Sj was repeated t - ndiff+ 1 times in a row, then the syndrome must have been correct (i.e. there were no measurement errors). As such, in this situation one could use the syndrome to correct the errors and terminate the protocol.
[00120] Similarly, if ndiff = t, then there must have been at least t faults. As such, by repeating the syndrome measurement one more time (resulting in the syndrome sr) and using that syndrome to decode, there would need to be more than t faults for sr to produce the wrong correction. Hence the STOP decoder terminates if one of the following two conditions are satisfied:
1) The syndrome Sj is obtained t - ndiff+ 1 times in a row. In which case the Sj syndrome is used to decode. OR
2) The variable ndi^ gets incremented to ndiff= t. In which case, the syndrome measurement is repeated one more time and the repeated syndrome measurement is used to decode.
Stabilizer Operations with the Repetition Code
[00121] In some embodiments, logical computational basis states may be prepared using a repetition code. In some embodiments, stabilizer measurements of a repetition code may be performed using a STOP algorithm, as described above. Also, in some embodiments, the methods described herein may be applied to any family of Calderbank-Shor-Steane (CSS) codes.
[00122] In some embodiments, using the fact that for an n-qubit repetition code | + >L = |+)®n, preparing |+)®n followed by a logical ZL = Z®n measurement (see FIG. 8) projects the state to given a +1 outcome and | 1)L given a -1 outcome. Since a measurement error on the ancilla results in a logical XL = X1 error applied to the data, fault tolerance can be achieved by repeating the measurement of using the STOP algorithm (where the syndrome corresponds to the ancilla measurement outcome), and applying the appropriate XL correction given the final measurement outcome. For instance, if is the desired state and the final measurement outcome
Figure imgf000023_0005
at the termination of the STOP algorithm is -1, X1 would be applied to the data. Lastly, note that only X errors can propagate from the ancilla to the data but are exponentially suppressed by the cat-qubits.
[00123] In some embodiments, computational basis states may be prepared using an approach that only involves stabilizer measurements. For example, starting with the state
Figure imgf000023_0007
Figure imgf000023_0006
which is a +1 eigenstate of ZL, measure all stabilizers of the repetition code (each having a random ±1 outcome) resulting in the state:
Figure imgf000023_0004
[00124] If the measurement outcome of
Figure imgf000023_0002
the correction can be applied to
Figure imgf000023_0003
the data to flip the sign back to +1. However given the possibility of measurement errors, the measurement of all stabilizers
Figure imgf000023_0001
)must be repeated. If physical non-Clifford gates are applied prior to measuring the data, then the STOP algorithm can be used to determine when to stop measuring the syndrome outcomes. Subsequently, minimum-weight perfect matching (MWPM) may be applied to the full syndrome history to correct errors and apply the appropriate Z corrections to fix the code-space given the initial stabilizer measurements. When Clifford gates are applied to the data qubits in order to prepare a \TOF) magic state, this second scheme for preparing the computational basis states may be used along with the STOP algorithm. [00125] Additionally, it is pointed out that although the logical component of an uncorrectable error
Figure imgf000023_0009
(where
Figure imgf000023_0010
is correctable) can always be absorbed by resulting in an output
Figure imgf000023_0011
state it is still important to have a fault-tolerant preparation scheme for
Figure imgf000023_0008
Figure imgf000023_0012
(and thus to repeat the measurement of all stabilizers enough times). For instance, if a single fault results in a weight-two correctable Z error (assuming n > 5), a second failure during a subsequent part of the computation can combine with the weight-two error resulting in an uncorrectable data qubit error. Hence, such a preparation protocol would not be fault-tolerant up to the full code distance.
Implementation of logical Clifford Gates [00126] Since the CNOT gate is transversal for the repetition code, focus can be placed on implementing a set of single qubit Clifford operations. Recall that the Clifford group is generated by:
Figure imgf000024_0001
[00127] Note that H and S given above are the Hadamard and phase gate operators. In some embodiments, 5 and Q= SHS may form a generating set for single-qubit Clifford operations. In implementing such states, injection of the state , which is a +1 eigenstate of
Figure imgf000024_0002
the Pauli operator, may be performed.
[00128] In FIG. 10 a circuit 1000 for implementing SL is given, wherein the circuit takes as
Figure imgf000024_0003
an input state and includes a transversal CNOT gate and a logical Z-basis measurement. If a -1 measurement outcome is obtained, a ZL correction is applied to the data. Note however that a measurement error can result in a logical ZL being applied incorrectly to the data. As such, to guarantee fault-tolerance, one can repeat the circuit of FIG. 10 and use the STOP algorithm to decide when to terminate. The final measurement outcome may then be used to determine if ZL correction is necessary. The implementation of S can thus be summarized as follows:
1.) Implement the circuit shown in FIG. 10 and let the measurement outcome be Si-
2.) Repeat the circuit of FIG. 10 and use the STOP algorithm to decide when to terminate; and
3.) If the final measurement outcome Sr = +1, do nothing, otherwise apply ZL = Z1Z2 . . . Zn to the data.
[00129] The circuit 900 for implementing the logical Q = SHS gate is given in FIG. 9. The circuit consists of an injected state, a transversal CNOT gate, and a logical X-basis
Figure imgf000024_0004
measurement is applied to the input data qubits. If the measurement outcome is -1, YL is applied to the data. As with the S gate, the application of the circuit in FIG. 9 is repeated according to the STOP algorithm to protect against measurement errors. The full implementation of QL is given as follows:
1.) Implement the circuit in FIG. 9 and let the measurement outcome be Si;
2.) Repeat the circuit in FIG. 9 and use the STOP algorithm to decide when to terminate; and
3.) If the final measurement outcome Sr = +1, do nothing, otherwise apply YL = to the data.
Figure imgf000024_0006
[00130] Note that the logical Hadamard gate can be obtained from the SL and QL protocols using the identity Hence ignoring repetitions of the circuits in FIGs. 9 and 10,
Figure imgf000024_0005
the implementation of HL requires three logical CNOT gates, two and one state, two
Figure imgf000025_0001
Figure imgf000025_0002
logical Z basis measurements and one logical % basis measurement. Instead of using two logical Hadamard gates and one CNOT gate to obtain a CZ gate, a more efficient circuit is shown in FIG. 12. Lastly, since the circuits in FIGs. 9 and 10 contain only stabilizer operations and injected states, using the STOP algorithm to repeat the measurements is not strictly necessary. For instance, one could repeat the measurement a fixed number of times and majority vote instead of using the STOP algorithm. However in low noise rate regimes, the STOP algorithm can potentially be much more efficient since the average number of repetitions for the measurements can approach t + 1 where t = (d- 1 )/2.
Growing encoded data qubits to larger code distances with the repetition code
[00131] In some embodiments, a state encoded in a distance d
Figure imgf000025_0003
Figure imgf000025_0010
repetition code is grown to a state encoded in a distance d2 repetition
Figure imgf000025_0004
code. Such a protocol may be used to grow \TOF) magic states as further described below.
[00132] Let
Figure imgf000025_0005
be the stabilizer group for a distance
Figure imgf000025_0009
repetition code with cardinality
Figure imgf000025_0006
Similarly
Figure imgf000025_0007
is defined as
Figure imgf000025_0008
Figure imgf000025_0011
with
Figure imgf000025_0012
. Furthermore the stabilizer group for a distance d2 repetition code is given by
Figure imgf000025_0013
[00133] Also
Figure imgf000025_0016
is defined as the th stabilizer in to be the
Figure imgf000025_0028
Th stabilizer in
Figure imgf000025_0014
The protocol for growing
Figure imgf000025_0017
Figure imgf000025_0015
is given as follows:
1.) Prepare the state
Figure imgf000025_0018
2.) Measure all stabilizers in resulting in the state
Figure imgf000025_0019
Figure imgf000025_0020
3.) Repeat the measurement of stabilizers in using the STOP algorithm and apply MWPM
Figure imgf000025_0027
to the syndrome history to correct errors and project to the code-space. If is measured
Figure imgf000025_0021
as -1 in the first round, apply the correction to the data.
Figure imgf000025_0022
4.) Prepare the state and measure
Figure imgf000025_0024
Figure imgf000025_0023
5. Repeat the measurement of all stabilizers of Sd2 using the STOP algorithm and use MWPM over the syndrome history to correct errors. If in the first round the stabilizer is
Figure imgf000025_0025
measured as -1, apply the correction
Figure imgf000025_0026
[00134] The growing scheme involves two blocks, the first being the state which is
Figure imgf000026_0001
grown to The second block involves the set of qubits which are prepared in the state
Figure imgf000026_0011
Figure imgf000026_0002
and stabilized by (steps 1-3). The key is to measure the boundary operator between
Figure imgf000026_0012
Figure imgf000026_0003
the two blocks which effectively merges both blocks into the encoded state which is a simple
Figure imgf000026_0004
implementation of lattice surgery. To see this, consider the state prior to step 4:
Figure imgf000026_0005
[00135] In the above equation Also, when measuring and
Figure imgf000026_0006
Figure imgf000026_0007
performing the correction if the measurement outcome is -1,
Figure imgf000026_0013
is projected to:
Figure imgf000026_0008
Figure imgf000026_0009
[00136] The rounds of repeated stabilizer measurements in steps 3 and 5 (above) may be required due to the random outcomes and measurement errors which can occur when performing the appropriate projections. A pictorial representation for the growing scheme is shown in FIG.
Bottom-Up Fault Tolerant Preparation of the \TOF) magic state
[00137] In some embodiments, a \TOF} magic state can be prepared using the repetition code, wherein the|TOF) magic state is used in simulating a Toffoli gate.
[00138] The \TOF} magic state is given by:
Figure imgf000026_0010
which is stabilized by the Abelian group where
Figure imgf000027_0001
[00139] Given one copy of a \TOF) magic state, aToffoli gate can be simulated using the circuit 1102 in Fig. 11A, and the required Clifford corrections are given in FIG. 11B. Note that if a correction involves the stabilizer gc, the CZ gate can be implemented using the circuit 1200 in FIG. 12. Also, note that for the Clifford corrections a 0 indicates a +1 measurement outcome whereas a 1 indicates a -1 measurement outcome (in either the A or Z basis). The stabilizers gA, gB and gc are given in the equations above.
[00140] Next, how to fault-tolerantly prepare the \TOF) magic state is discussed. First, note that the state
Figure imgf000027_0002
is stabilized bygA and gc. Such a state can V straightforwardly be prepared using the circuit 1300 in FIG. 13. In what follows, physical Toffoli gates will need to be applied between ancilla qubits and |ipi) prior to measuring the data. As such, it is important that the states |0)L and |1)L in the circuit 1300 of FIG. 13 be prepared using the STOP algorithm since otherwise measurement errors in the last ancilla measurement round could lead to logical failures. Once |+)L, |1)L and |0)L have been prepared, the CNOT gate 1302 in FIG. 13 is applied transversally.
[00141] Now, given a copy of
Figure imgf000027_0003
the \TOF) magic state can be prepared by measuring gA using the circuit 1400 of FIG. 14 resulting in the state If the measurement outcome is +1,
Figure imgf000027_0004
= \TOF) Otherwise, if the measurement is = Z2\TOF). Hence given a -1
Figure imgf000027_0006
Figure imgf000027_0005
measurement outcome, a logical ZL correction is applied to the second code block. A more detailed implementation 1700 of the controlled
Figure imgf000027_0007
gate 1400 is shown in FIG. 17. For example, the circuit 1700 is shown for measuring a code with code distance
Figure imgf000027_0008
. In general, d Toffoli gates are required. Note that for the repetition code, a single CNOT gate is required since XL = X1. Further, due to the transversal CNOT gates, physical Toffoli gates are applied sequentially as shown in the figure. Note that such a circuit can be used for any Calderbank-Shor-Steane (CSS) code. The sequence of Toffoli gates would remain unchanged. Generally more two-qubit gates would be required depending on the minimal weight representation of XL.
[00142] Note that since the gate can be done transversally for the repetition code, and
Figure imgf000027_0009
that XL on the second code block is given by a physical X gate on the first qubit of that block, the controlled-^ circuit can be highly parallelized thus greatly simplifying its implementation. For example, FIG. 18 illustrates a more parallelized circuit for measuring gA which requires one flag qubit 1802. Such a circuit reduces the depth of Toffoli gates in half at the cost of adding to timesteps due to the extra CNOT gates. The flag qubit can also be used for detecting X errors arising on the control qubits of the CNOT and Toffoli gates. If an X error occurs, the flag qubit measurement outcome will be -1 instead of +1. As in FIGs. 14, 15, and 17, if either the X or Z basis measurement outcomes are -1 instead of +1, the entire \TOF) magic state preparation protocol is aborted and begins anew.
[00143] As was also the case as discussed above with regard to the repetition code, a measurement error on the ancilla results in a logical Z2 failure and thus the measurement of gA needs to be repeated. This can be done deterministically using the STOP algorithm. However due to the increasing circuit depth with increasing repetition code distance in addition to the high cost of the controlled-^ gate, such a scheme does not have a threshold and results in relatively high logical failure rates. An alternative approach is to use an error detection scheme by repeating the measurement of gA exactly (d - l)/2 times for a distance d repetition code. In between each measurement of gA, one round of error detection is applied to the data qubits by measuring the stabilizers of the repetition code. This is shown in FIG. 15. If any of the measurement outcomes are non-trivial, the protocol for preparing the \TOF) magic state is aborted and reinitialized. In FIG. 19A, an example 1900 is provided of a two-dimensional layout of qubits and sequence of operations for measuring gA, which is compatible with the above described ATS architecture for a distance 5 repetition code. Such a layout uses a minimum number of ancilla qubits and can be straightforwardly generalized to arbitrary repetition code distances. The ancilla qubits are used to first prepare a GHZ state. Subsequently the required Toffoli and CNOT gates are applied, followed by a disentangling of the GHZ states and measurement of the |+) state ancilla. The equivalent circuit 1950 implementing the gA measurement for a d = 5 repetition code is shown in FIG. 19B. [00144] Notice that to respect the connectivity constraints of the ATS’s, the lighter grey vertices 1902 need to be swapped with the darker grey vertices 1904 on the second block (shown in the upper left comer of the lattice of FIG. 19A). Such a role reversal between the ancilla and data qubits does not lead to additional cross-talk errors for the reasons discussed above with regard to a multiplexed ATS with filtering and thus can be tolerated. As such, all controlled gA measurements in FIG. 15 may be implemented using the circuit 1950 in FIG. 19B with the qubit layout given in FIG. 19A.
[00145] Lastly, note that the circuit 1950 in FIG. 19B used to measure gA is not fault-tolerant to X or Y errors. However, since it is assumed that X and Y errors are exponentially suppressed, flag qubits for detecting A-type error propagation are unnecessary as long as X or Y error rates multiplied by the total number of fault locations are below the target levels for algorithms of interest.
[00146] FIG. 20A illustrates high-level steps of a protocol for implementing a STOP algorithm, according to some embodiments.
[00147] At block 2002 syndrome outcome measurements are performed for an arbitrary Calderbank-Shor-Steane code. At block 2004 consecutive ones of the syndrome outcomes are tracked to generate a syndrome history. At block 2006 syndrome measurements are stopped if condition 1 (shown in block 2006A) or condition 2 (shown in block 2006B) are met. Condition 1 is that a same syndrome outcome is repeated a threshold number of times in a row, wherein the threshold is equal to ((d-l)/2 )- ndiff.- l Condition 2 is that ndiff is equal to (d-l)/2, and one additional syndrome outcome has been measured subsequent to reaching ndiff=(d-l)/2. If either of these conditions are met, then the measurements of the syndrome outcomes can be stopped. At block 2008 if condition 1 is met, the repeated syndrome outcome is used to perform error correction. Also, at block 2008 if condition 2 is met, the subsequently measured syndrome outcome is used to perform error correction.
[00148] FIG. 20B illustrates high-level steps for determining a parameter (ndiff) used in the STOP algorithm, according to some embodiments.
[00149] At block 2052, ndiff is initialized with an initial value equal to zero. At block 2054, a first round of syndrome outcome measurements is performed. Also, at block 2056, a second round of syndrome outcome measurements is performed. At block 2058, it is determined if the syndrome outcomes measured in the round performed at block 2056 (e.g. the current round of syndrome outcomes) differ from the syndrome outcomes measured for the preceding round. If so, at block 2060, it is determined if ndiff was incremented in the previous round, if not, ndiff is incremented by one at block 2062 and the process repeats for a subsequent round of syndrome outcome measurements. However, note that when condition 1 or condition 2 (as shown in blocks 2006A and 2006B) are met, the syndrome measurements are stopped. If the syndrome outcomes measured in the round performed at block 2056 (e.g. the current round of syndrome outcomes) are the same as the syndrome outcomes measured for the preceding round or it is determined at block 2060 that ndiff was incremented for the preceding round, the process reverts to block 2056 and another round of syndrome outcomes are measured without incrementing ndiff. [00150] FIG. 21 illustrates high-level steps of a protocol for growing a repetition code from a first code distance to a second code distance using a STOP algorithm, according to some embodiments.
[00151] At block 2102 a
Figure imgf000030_0001
state is prepared as described above, for example using the circuit shown in FIG. 13. At block 2104, all stabilizers Sd’i are measured resulting in a state - This
Figure imgf000030_0003
may be done as described above with regard to stabilizer operations for the repetition code. At block 2106, the measurements of the stabilizers in Sd’i are repeated using the STOP algorithm and MWPM is applied to the syndrome history to correct errors and project the code into the increased code space. At block 2108 a
Figure imgf000030_0008
state is prepared and
Figure imgf000030_0002
are measured. At block 2110 the measurements of all the stabilizers of Sd2 are repeated using the STOP algorithm and MWPM is applied over the syndrome history to correct errors.
[00152] FIG. 22 illustrates high-level steps of a protocol for implementing a logical Toffoli gate using a bottom-up approach with Toffoli magic state injection, according to some embodiments.
[00153] At block 22, fault-tolerant computational basis states are prepared using the STOP algorithm, wherein the fault-tol erant computational basis states are to be used as inputs for a Toffoli gate preparation. At block, 2204, a CNOT gate is transversally applied to the fault-tolerant computational basis states to prepare a
Figure imgf000030_0004
state. At block 2206, gA is measured for the state, which yields a state If the measurement of gA has a measurement outcome of -1 then a Z
Figure imgf000030_0005
correction is applied. This projects the state into a \TOFF) state. At block 2208 the measurements of gA are repeated such that gA is measured (d- 1 )/2 times. Between rounds of measurement of gA, error detection is performed. If non-trivial values are measured for either gA or the error detection, the protocol is aborted and re-initiated anew. At block 2208, if all the measurements outcomes of gA and the error detection performed at 2208 are trivial, a Toffoli magic state (e.g. \TOFF) state) is prepared based on the measurement of gA and the state
Figure imgf000030_0007
For example, if all the measurements outcomes of gA and the error detection performed at 2208 are trivial, then = \TOFF). At block 2210 a sequence of Clifford gates as shown in circuit
Figure imgf000030_0006
1102 of FIG. 11 A are applied. Also the Clifford error corrections shown in FIG. 1 IB are applied. This may be done as part of a top down distillation of a logical Toffoli gate (as described in more detail below) that utilizes the prepared Toffoli magic state as an input to the distillation process.
Top-Down Distillation Process to Yield Low-Error Rate Toffoli Gates
[00154] As discussed above, the Toffoli gate when combined with the Clifford group forms a universal gate set for quantum computation. Alternatively, universality can be achieved by complementing the Clifford group with a supply of high-fidelity Toffoli magic states encoded in a suitable quantum error correction code. For many high threshold error correction codes, such as repetition (for very biased noise) or surface codes, high fidelity Toffoli magic states are difficult to prepare. The paradigm of magic state distillation uses encoded Clifford operations to distill higher fidelity magic states from lower fidelity magic states. For example, the Toffoli magic states prepared using the bottom-up approach described above may be used as in a magic state distillation process to yield even lower fault-rate Toffoli magic states. [00155] The conventional approach to magic state distillation uses a supply of low fidelity T magic states as inputs to protocols that output other types of magic state, including TOFF states. However, in some architectures the supply of noisy TOFF states can be prepared at better fidelity than the noisy T states. This is because all Calderbank-Shor-Steane (CSS) codes, such as surface and repetition codes, have a transversal CNOT and this property can be used to robustly prepare the TOFF state (as described above for the bottom-up approach). However, the success probability of such “bottom-up preparation” protocols drops as the target fidelity is increased and so it is desirable to design magic distillation protocols that can further purify noisy TOFF states at low overhead. If the bottom-up TOFF protocol is used to prepare TOFF states with 10-5 – 10-6 error rates, then for several quantum algorithms only a single round of magic state distillation would be need to achieve 10-9 – 10-10 logical error rates. In contrast, for T states prepared at 10-3 – 10-4 error rates, to achieve comparable logical error rates it would require two rounds of magic state distillation with quadratic error suppression, or alternatively a single round of the 15T→1T protocol with low (1/15) rate. [00156] In some embodiments, to address these issues, a top-down distillation process is performed that uses TOFF or CCZ states without using any T states, either as raw distillation material or as catalysts. Also triorthgonal codes are not used in the usual sense, but instead provide a new technique for protocol design by describing CCZ circuits in terms of cubic polynomials. It is noted that CCZ states are Clifford equivalent to TOFF states, and when using cubic polynomial formalism, it will be beneficial to work in the language of CCZ states. As an example of these techniques, it is shown, in some embodiments, that it is possible to achieve 8CCZ→2CCZ distillation, equivalently 8TOFF→2TOFF detecting a fault on any single TOFF state. In cases where noise on the CCZ state is very biased towards certain types of faults, more compact and efficient protocols are possible, which are also described. [00157] In some embodiments, various architectures may be used to implement the distillation processes described herein, such as a 2D architecture using the repetition code, asymmetric surface codes (for biased noise) or conventional square surface codes. The 2D implementation performs the required Clifford operations using lattice surgery to realize a suitable sequence of multi-qubit Pauli observables (also called multi-patch measurements). [00158] FIG. 23 illustrates high-level steps for distilling a low-error rate logical Toffoli gate using multiple ones of the logical Toffoli gates prepared using a bottom-up approach as described in FIG.22, according to some embodiments. [00159] For example, at block 2302 physical Toffoli magic states are generated, which may have a probability of error of approximately 2.8 x 10-4. This error probability may be improved by an order of magnitude or more by applying the STOP algorithm and error correction techniques described above for the bottom-up approach. For example, block 2304 illustrates the improvements in error-rate that are realized by utilizing the bottom-up approach. However, further improvements in error rate can be achieved by performing a top-down distillation process. For example, block 2306 illustrates that error probabilities may be reduced to approximately 8 x 10-10 by performing a single round of distillation using Toffoli magic states prepared using the bottom up approach as inputs. [00160] FIG. 24 illustrates a layout of multiple bottom up Toffoli gates that are used to distill low-error rate logical Toffoli gates, according to some embodiments. [00161] To give a general view of the distillation process, FIG.24 illustrates a circuit 2400 that includes qubits that have been prepared to implement bottom up (e.g. “BU”) magic states. Also other qubits of the circuit have been prepared to implement CCZ magic states (or low-error rate Toffoli magic states/gates). Additionally, some of the qubits implement an error check for the CCZ magic states. For example each set of check qubits may be associated with a pair of CCZ magic states. Synthesis [00162] First, observe that a
Figure imgf000032_0007
gate on qubits i, j and k, will perform:
Figure imgf000032_0001
where
Figure imgf000032_0002
represents a computational basis state described as a binary string
Figure imgf000032_0003
More generally, consider conjugating these CCZ gates with a CNOT circuit. For any invertible matrix J, there exists a CNOT circuit V such that :
Figure imgf000032_0004
[00163] Composing these operations a generalized CCZ gate is given by:
Figure imgf000032_0005
where ^^^ is the kth column vector of
Figure imgf000032_0006
is the dot product between this vector and the bit string vector x. Because J is invertible, the must be linearly independent, but otherwise there are no constraints. Furthermore, only three column vectors are needed to describe the action of a single generalized CCZ gate. [00164] Alternatively, a generalized CCZ gate can be realized using a single CCZ magic state as shown in 2504 FIG.25. The CCZ magic state is:
Figure imgf000033_0005
and it can be used to inject a CCZ gate as illustrated in FIG. 25 and which can be extended to generalized CCZ gates by controlling the CNOT gates determined by the associated vectors
Figure imgf000033_0006
and Furthermore, the CNOTs in the CCZ injection can be replaced with a sequence of multi- qubit Pauli measurements, which are the primitive operations in lattice surgery based architectures. [00165] In some embodiments, a unitary as shown below can be composed using CCZ, CZ, Z and CNOT gates:
Figure imgf000033_0003
where J is invertible and
Figure imgf000033_0004
is some Boolean function expressible as a cubic polynomial. Formally, this can be expressed as shown below in Theorem 1: [00166] Theorem 1: Let U be a unitary of the form of the equation above with a function f such that there exists a cubic polynomial representation:
Figure imgf000033_0002
with integers ^ It follows that there are many different factorizations of the polynomial as
Figure imgf000033_0014
follows:
Figure imgf000033_0001
where are binary vectors (and therefore linear functions) and a Q is a lower-triangular binary matrix (representing a quadratic Boolean function). Then there exists a circuit composed of ^CCZ, CZ, Z, CNOT that implements U using at most ζ copies of the CCZ gates. We call the minimal such ζ the cubic rank of the polynomial. CCZ Magic State Distillation [00167] In some embodiments, cubic polynomial formalism is used to develop routines for distillation of high-fidelity
Figure imgf000033_0011
magic states. For example, given a supply noisy
Figure imgf000033_0008
states with Z noise, the noisy
Figure imgf000033_0012
states can be distilled using Clifford operations to obtain a smaller number of
Figure imgf000033_0013
states with less noise. Note that given any noise model,
Figure imgf000033_0009
^magic states can be twirled so that the noise becomes pure Z noise. Accordingly, in some embodiments, a circuit is designed to realize a target unitary, say
Figure imgf000033_0007
that acts on 3k qubits plus some number m of check qubits. However, instead of minimizing the number of
Figure imgf000033_0010
gates in the circuit, the proposed design is such that Z errors on the magic state propagate onto the check qubits. Therefore, by measuring the check qubits at the end of the circuit, errors can be detected on the noisy states.
Figure imgf000034_0001
[00168] To be more precise about the error correction properties of a circuit, as an example, take the following definitions:
[00169] Definition 1: Given two Boolean functions
Figure imgf000034_0004
f and g that can be expressed as cubic polynomials, it can be said they are Clifford-equivalent
Figure imgf000034_0003
if and only if there exists a Boolean function q expressible as a quadratic function, such that
Figure imgf000034_0002
[00170] If
Figure imgf000034_0005
then clearly they also have the same cubic rank, and the associated unitaries have the same minimal CCZ count.
[00171] Definition 2: Given a sequence of generalized-CCZ gates described by the set of
Figure imgf000034_0022
column vectors as used in the eqluation above in the Synthesis discussion a set of
Figure imgf000034_0006
matrices is defined each with three columns as follows:
Figure imgf000034_0007
If the last m qubits are considered as check qubits, then the matrices are partitioned into
Figure imgf000034_0024
(the bottom m rows) and
Figure imgf000034_0009
as shown.
[00172] It is noted that play a role
Figure imgf000034_0008
analogous to -check and logical operator matrices of quantum code. Also error notation for the
Figure imgf000034_0023
error patterns on the initial magic states is needed.
[00173] Definition 3: Given a
Figure imgf000034_0010
| ) magic state, it is said that it has error pattern e =
Figure imgf000034_0020
error if it is in the state
Figure imgf000034_0011
Given a sequence of generalized-CCZ gates, the notation used is to denote the
Figure imgf000034_0021
Figure imgf000034_0012
error for the jth |CCZ) state, so that the joint state is:
Figure imgf000034_0013
It is said that an error has w fault-locations if
Figure imgf000034_0025
is non-zero for w of the
Figure imgf000034_0014
states.
[00174] The distinction between notion used above with regard to weight and the usual Hamming weight of the concatenated string is important because many methods of
Figure imgf000034_0015
preparing a noisy state will lead to errors such as
Figure imgf000034_0016
that have a comparable
Figure imgf000034_0018
probability to a single qubit error
Figure imgf000034_0017
Indeed, we will typically be interested in knowing how many states are affected by an arbitrary error, though it is assumed errors are
Figure imgf000034_0019
uncorrelated between different
Figure imgf000035_0001
states. Observations about error propagation in FIG.25 can now be formalized as follows: Given unitary U realized by a sequence of generalized CCZ gates represented by matrices as in Def.2 with magic states suffering Pauli error Then the resulting unitary on the target qubits is UZ[w], where
Figure imgf000035_0002
an
Figure imgf000035_0004
d the vector is
Figure imgf000035_0003
Identifying the last m qubits as check qubits, w can be partitioned into two parts as follows:
Figure imgf000035_0005
[00175] Now knowing how errors propagate generally, this knowledge can be applied to a specific protocol, such as distillation of 2 low-error rate logical Toffoli gates from 8 noisy Toffoli magic states, or a distillation of 1 low-error rate logical Toffoli gate from 2 noisy Toffoli magic states. [00176] Consider a unitary U realized by a sequence of generalized CCZ gates represented by matrices as in Def. 2 and with the last m qubits identified as check qubits and
Figure imgf000035_0015
Figure imgf000035_0009
where is Clifford and acts on the check qubits. Consider the following
Figure imgf000035_0010
Figure imgf000035_0011
protocol: 1.) Prepare all qubits in the state 2.) Perform the Clifford inverse
Figure imgf000035_0013
and any Clifford corrections from gate injection; 3.) Measure the last m qubits in the X basis. [00177] Then X basis measurements in step 4 will yield +1 outcomes provided the magic state error pattern satisfies:
Figure imgf000035_0006
The protocol outputs the magic state
Figure imgf000035_0007
with error
Figure imgf000035_0014
that is trivial whenever
Figure imgf000035_0008
Example Protocols [00178] Consider the
Figure imgf000035_0012
protocol with matrices:
Figure imgf000036_0001
It is straightforward to verify that the corresponding cubic polynomial is:
Figure imgf000036_0002
[00179] So the circuit realizes
Figure imgf000036_0003
, which is a single CCZ gate and (up to a Clifford) it acts trivially on the check qubit. There is only a single check qubit
Figure imgf000036_0004
Therefore, it detects any error pattern where
Figure imgf000036_0005
which includes a single
Figure imgf000036_0008
error on either input magic state. However, it fails to detect other single fault error patterns such as(
Figure imgf000036_0006
on one magic state. [00180] Now consider the 8
Figure imgf000036_0007
protocol that detects an arbitrary error on a single input CCZ state. A possible circuit 2602 implementation of this protocol is illustrated in FIG.26. This protocol uses 3 check qubits and the associated Jj matrices are shown in FIG. 26, such as matrix 2608 corresponding to a first CCZ, matrix 2610 corresponding to a second CCZ, matrix 2612 corresponding to a third CZZ, and matrix 2614 corresponding to an eighth CCZ. Note that there would be eight total matrices with one corresponding to each of the eight CCZ’s. However, for ease of illustration only matrices for CCZs 1-3 and 8 are shown. Computing the cubic polynomial, yields:
Figure imgf000036_0009
which represents two CCZ gates and has trivial action on the check qubits. Notice, there is no quadratic component to this polynomial, so no inverse Clifford is required. Regarding the error detection capabilities, notice that every check matrix is the identity and so the three bit error syndrome is
Figure imgf000036_0011
Given a fault on a single CCZ state, one of the
Figure imgf000036_0010
vectors will be non-zero and so v will be non-zero and the error is detected. In contrast, if two CCZ states have an identical error pattern, so
Figure imgf000036_0013
then the syndromes will cancel and this will be an undetected error. However, not all two fault errors go undetected. If magic states j and
Figure imgf000036_0018
suffer faults, but
Figure imgf000036_0012
then this two fault pattern will be detected. The intuition for why the above matrices have the desired property is related to the fact that the matrices are built using a subset of the codewords from 3 copies of a Reed-Muller code. [00181] Consider an error model where a single noisy magic state has error pattern
Figure imgf000036_0017
with probability We will use the convention
Figure imgf000036_0016
. The success probability is:
Figure imgf000036_0015
Figure imgf000036_0014
where the sum is over all configurations with trivial syndrome. To determine the fidelity of the output magic state, we should sum over all configurations with trivial syndrome and no logical damage on the state. To leading order this is dominated by the “no error” case, and indeed this gives a firm lower bound on the fidelity, so
Figure imgf000037_0001
Now considering the depolarizing error distribution:
Figure imgf000037_0002
Then the leading order contributions to the success probability can be counted as follows. The zero faults contribution adds to the success probability. We do not count any single fault events since they are all detected. Of the two fault events, we need a pair
Figure imgf000037_0006
of magic states (of which there are 8 choose 2 = 28 combinations) to suffer the same non-trivial error pattern
Figure imgf000037_0007
of which there are 7 types of
Figure imgf000037_0004
This means there are 196 undetected two fault error patterns, which contributes 196
Figure imgf000037_0005
to the success probability. However, not all of the undetected two fault error patterns lead to a logical failure, with a contribution of (184/49)
Figure imgf000037_0010
to undetected logical failures. This leads to the approximate results of:
Figure imgf000037_0003
[00182] Note that the constant factor 3.755 in front of is quite small for a distillation
Figure imgf000037_0011
protocol. This is because this protocol detects the vast majority of all two fault events. [00183] In some embodiments, the above protocol may be generalized to
Figure imgf000037_0008
Example Implementation of Lattice Surgery [00184] FIG. 27 illustrates an example implementation of the above described protocol using lattice surgery. Throughout, we refer to the input magic state error rate as ∈ and the output error rate is simply ∈
Figure imgf000037_0009
As noted earlier, the generalized CCZ gates can be injected using only multi-Pauli measurements. For many error correction codes, such as topological codes and repetition codes, lattice surgery provides a natural way to measure multi-qubit Pauli operators. The following examples are concerning using thin surface codes with asymmetric distance for bit-flip and phase-flip noise. When there is an asymmetry we use the convention that the bit-flip distance is smaller. This also includes the repetition code as the limit where the bit-flip distance is one. [00185] The lattice surgery approach dedicates some ancilla qubits to act as communication routes between logical qubits. When performing a multi-patch measurement, these qubits are temporarily brought into an error correction code for dm rounds of error correction. The value of dm must be sufficiently large that the probability of an error during the multi-patch measurement is small enough. The larger dm, the more protection one has against measurement errors. However, an error during measurement is equivalent to a single-qubit Pauli error on the magic state. Therefore, dm has to be sufficiently large that the probability of measurement error is small than
Figure imgf000038_0011
However, the measurement error probability does not have to be smaller than the intended infidelity of the output magic state. However, the logical qubits labelled 1 through 6, need to be encoded in a code protecting with distance dx for bit-flips and dz for phase-flips, where these are sufficiently large that logical error rates are lower than
Figure imgf000038_0001
[00186] The logical qubits labelled 7 through 9 are the check qubits for the protocol and are encoded in a code with distance dx for bit-flips and
Figure imgf000038_0002
for phase-flips. If there is a Z logical error on a check qubit at any point, this can be commuted to the end of the circuit and will be detected provided it is the only fault. Therefore, we can set
Figure imgf000038_0003
requiring only that
Figure imgf000038_0010
is sufficiently large that a Z logical occurring is less likely than
Figure imgf000038_0004
In the surface code, the space/qubit cost is 2dzdx, so the total space cost for qubits1 through 9 and the routing ancilla space is:
Figure imgf000038_0005
[00187] In addition, there is a space cost N0 for the L0 blocks responsible for preparing the input Toffoli or CCZ states. We will need 8 such CCZ states, though in FIG.27 the injection process is divided into two batches of 4 CCZ states. Therefore, we need at least 4 L0 blocks, but due to the finite success probability pf of each L0 block, some redundancy is needed to ensure we succeed with high probability (otherwise there will be a slight time delay). Given a factor R redundancy, so we use 4R copies of the L0 blocks, the probability of all failing is approximately . The size
Figure imgf000038_0007
of the L0 blocks will depends on the underlying protocol used, which in the case of the bottom protocol is
Figure imgf000038_0008
If a factor R redundancy is require then the total L0 space requirement is:
Figure imgf000038_0006
[00188] In FIG.27 a layout is shown where R=3. Note that if
Figure imgf000038_0009
, as in the figure 27, then the L0 blocks neatly line up with the ancilla routing region. If all the L0 blocks cannot fit adjacent to the routing region and a different placement (such as having two columns of LO blocks) will need to be used. [00189] The time cost of the whole distillation protocol is 10 dm code cycles. Most of this cost is due to multi-patch measurements. Recall that in FIG. 27 the injection process is divided into two batches of 4 CCZ states. In each batch, there are several injection events interspersed with each other, which is possible because all the gates involved commute. Note also that the protocol uses multi-patch measurements and single-qubit measurements, but the single qubit measurements can be realized in 1 code-cycle and so are a negligible cost. Assuming a surface code architecture where each code cycle takes 4tCNOT where tCNOT is the CNOT gate time, gives a total 40 dm tCNOT time cost. [00190] FIG. 28 illustrates a process for distilling low-error rate logical Toffoli gates from a plurality of noisy Toffoli magic states/Toffoli gates, according to some embodiments. [00191] At block 2802 a plurality of Toffoli magic states/noisy Toffoli gates are prepared using a bottom-up approach or other suitable approach. At block 2804 a low-error rate logical Toffoli gate is distilled from a plurality of the Toffoli magic states/Toffoli gates prepared at block 2802. At block 2806 a check qubit is measured to check for errors, wherein the check qubit is associated with the distilled low-error rate logical Toffoli gate. At block 2808 a low-error rate logical Toffoli gate operation is performed using the distilled low-error rate logical Toffoli gate in response to a verifying the check qubit does not indicate an error. [00192] FIG.29A illustrates a process of distilling two low-error rate logical Toffoli gates from eight noisy Toffoli magic states/Toffoli gates, according to some embodiments. [00193] At block 2902, 8 noisy Toffoli magic states/Toffoli gates are selected to be used in a distillation of a low-error rate logical Toffoli gate. At block 2904 lattice surgery is performed to distil the one low-error rate logical Toffoli gate from the 8 noisy Toffoli magic states/Toffoli gates. At block 2906 a logical Toffoli gate operation is performed using the distilled low-error rate logical Toffoli gate, wherein a probability of error is quadratically suppressed for the low-error rate logical Toffoli gate as compared to the error rates of the 8 noisy Toffoli magic states/Toffoli gates. [00194] FIG. 29B illustrates a process of distilling a low-error rate logical Toffoli gate from two noisy Toffoli magic states/Toffoli gates, according to some embodiments. [00195] At block 2952, two noisy Toffoli magic states/Toffoli gates are selected to be used in a distillation of a low-error rate logical Toffoli gate. At block 2954, lattice surgery is performed to distil the one low-error rate logical Toffoli gate from the 2 noisy Toffoli magic states/Toffoli gates. At block 2956, a logical Toffoli gate operation is performed using the distilled low-error rate logical Toffoli gate, wherein a probability of very biased noise is quadratically suppressed for the low-error rate logical Toffoli gate as compared to the very biased noise of the 2 noisy Toffoli magic states/Toffoli gates. [00196] FIG. 30 illustrates an example method of performing lattice surgery to distill a low- error rate logical Toffoli gate from a plurality of noisy Toffoli magic states/Toffoli gates, according to some embodiments. [00197] At block 3002, multi-qubit Pauli operator measurements are performed during lattice surgery used to distill a low-error rate logical Toffoli gate from noisy Toffoli magic states/Toffoli gates, wherein for each Jk with k= 1, 2, 3, ...the following steps are performed. For example, at block 3004, for each k value, a measurement of is measured where Zk
Figure imgf000040_0001
denotes Pauli Z acting on the kth qubit of the magic state and Z[Jk ] is a string of Pauli operators acting on the algorithmic qubits indexed by the binary vector Jk. Also at block 3006, for each k, measure X on the kth qubit of the magic state. At block 3008 for each “-1” outcome measured in step 3006, update the Clifford correction frame by Z[Jk ]. Then at block 3010 using the measurement outcome from step 3004, update the Clifford correction frame by the correction given in the figure. High Fidelity Measurements [00198] In some embodiments, low measurement error and/or faster error correction can be achieved by using an additional readout mode that is interrogated as the next error correction cycle proceeds. For example, circuit 3100 shown in FIG. 31 includes a readout qubit that enables measurements 3106 to be performed for a first round of error correction gates 3106 while (e.g. concurrently) a second round of error correction gates 3104 are being performed. [00199] Note that while some of the examples included herein are for hybrid acoustic-electrical qubits and the architecture described in FIGs.1-30, in some embodiments such measurement techniques could be applied in other architectures. [00200] Consider fault tolerant operation of a quantum computer where properties (like stabilizers) of data qubits are repeatedly measured. In a given cycle of the error correction this often involves two steps. First gates act between the data qubits and an ancilla qubit and then the ancilla qubit is measured. Subsequent to the measurement of the ancilla qubit another error correction cycle can proceed. [00201] In some embodiments, faster error correction cycles and lower measurement error can be achieve by swapping an ancilla (that would normally be interrogated directly) to an additional readout qubit (could be some other gate that achieves same purpose as SWAP like iSWAP, decomposition of SWAP into CNOTS etc. Then perform readout on the readout qubit while the rest of the error correction proceeds. [00202] Such an approach not only reduces error correction cycle time, but also reduces idling errors on the data qubits. This is because the data qubits only idle during the time of the swap is typically shorter duration that was is required to perform the measurements. Also, because idling is not a concern when measurements are performed on a readout qubit, more repeated measurement may be taken, which also increases measurement fidelity. For example, the full error correction cycle time may be used to collect as many measurements as permitted to increase measurement fidelity or perform a single measurement with a long integration time for the time of the next cycle. [00203] For example, in a traditional surface code architecture with transmons measurement is often much slower than the gates. The error correction cycle time can be sped up by using this scheme. Additionally depending on the details, one may have more time to drive/integrate allowing for higher fidelity measurement without hurting the threshold because of large idling errors. [00204] In some embodiments, the additional readout mode may be a bosonic mode. In such embodiments, for the measurement of the readout mode repeated individual parity measurements are performed which are then majority voted to determine the final outcome. Being able to take more of the repeated measurements increases the fidelity of the final outcome. [00205] FIG. 32 illustrates a more specific example, wherein deflation is further added. Following the CNOT gates to entangle the ancilla qubit 3204 with the data qubits3202 the ancilla qubit is deflated. Deflation involves decreasing the steady state
Figure imgf000041_0004
for the dissipatively stabilized ancilla qubit from an initial
Figure imgf000041_0001
The deflation provides protection from single photon loss events which occur at a rate proportional to the average number of bosons in the readout mode. Once the mode has been deflated a SWAP 3212 is performed which transfers the excitation from the ancilla qubit 3204 to the bosonic readout mode 3206 (which may be a phononic mode). To achieve high fidelity readout, repeated QND parity measurements of the bosonic readout mode 3206 are employed. Each individual parity measurement is achieved by dispersively coupling the readout mode to a transmon qubit 3208. [00206] In some embodiments, during a parity measurement of a bosonic mode the aim is to determine whether there is an even or odd number of photons in a resonator. A single photon loss even during the process of a measurement will change the parity potentially resulting in an incorrect readout. For dissipatively stabilized systems a simple way to improve the measurement fidelity is to perform a deflation operation 3214 before the measurement. [00207] In the specific case of a system stabilized by two photon dissipation this involves taking the dissipator
Figure imgf000041_0002
This is done by varying ^^( ^^) from the initial to final value. In most cases sufficient abrupt change is acceptable since there is no need to maintain phase coherence between the even and odd parity states. [00208] As is clear in the case without the deflation there is a significant degradation in the infidelities as average photon number
Figure imgf000041_0003
is increased because the measurements are more sensitive to single photon loss which changes parity. With the deflation added this problem is corrected. [00209] As an example, FIG.33 illustrates a parity measurement 3302 being taken subsequent to deflation. [00210] In some embodiments, where a is the qubit mode and b is another mode used for readout, deflation can follow the following procedure: 1.) Deflate the qubit to a = 0 mapping the + cat sate to |0) and the - cat sate to 11).
2.) Evolve under a Hamiltonian
Figure imgf000042_0001
and measure (homodyne/heterodyne) the b mode to determine whether the qubit was in a + or - cat state. If the qubit was in the - cat state then there is a drive on the b mode implemented by the Hamiltonian whereas if the qubit was in the + cat state there is no drive on the b mode. Hamiltonians of this form can be derived resonantly and non-resonantly from a three wave mixing Hamiltonian of the form:
Figure imgf000042_0002
[00211] In some embodiments, other Hamiltonians may be used, such as
Figure imgf000042_0003
Figure imgf000042_0004
[00212] In some embodiments, bosonic modes may be readout in basis using a three or
Figure imgf000042_0009
higher wave mixing Hamiltonian. In some embodiments a procedure for such readouts may comprise evolving under a Hamiltonian and measuring
Figure imgf000042_0005
(homodyne/heterodyne) the b mode to measure the bosonic mode in basis. Hamiltonians of
Figure imgf000042_0010
this form can be derived resonantly and non-resonantly from a three wave mixing Hamiltonian of the form:
Figure imgf000042_0008
[00213] In some embodiments, other Hamiltonians may be used, such as
Figure imgf000042_0006
etc.
Figure imgf000042_0007
[00214] FIG. 34 is a process flow diagram illustrating using a switch operator to excite a readout qubit such that a subsequent round of error correction gates can be applied in parallel with performing measurements of the readout qubit, according to some embodiments.
[00215] At block 3402, a set of error correction gates is applied between data qubits storing quantum information and an ancilla qubit. At block 3404, a swap is performed between the ancilla qubit and a readout qubit. At block 3406, one or more measurements are performed on the readout qubit. While this is taking place or without waiting for the measurements at block 3406 to complete, at block 3408 another set of error correction gates are applied between data qubits storing the quantum information and the ancilla qubit. At block 3410, another swap is performed between the ancilla qubit and the readout qubit, subsequent to the measurement at block 3406 completing. And, at block 412 one or more measurement are performed on the readout qubit. Note that this process can be repeated for multiple additional rounds of error correction. [00216] FIG.35 is a process flow diagram illustrating a process for using deflation or evolution using a three or higher wave mixing Hamiltonian to perform measurements of an ancilla qubit without requiring a transmon qubit, according to some embodiments. [00217] As an example, one or more data qubits storing quantum information may be entangled with an ancilla qubit. At block 3502, a qubit, such as the ancilla qubit, is deflated prior to performing a readout of the qubit, such that phonons or photons are dissipated from the qubit while a measurement observable of the qubit is preserved. Then at block 3504, a readout of the measurement observable of the deflated qubit is performed. [00218] FIG. 36A is a process flow diagram illustrating a process for deflating a cat qubit and measuring a b mode of the deflated cat qubit to determine information about a first mode of the deflated cat qubit, according to some embodiments. [00219] At block 3602, cat qubit is deflated such that phonons or photons are dissipated from the cat qubit. For example, this may be achieved by adjusting a steady state dissipation rate, for example as may be driven by an ATS. At block 3604, the cat qubit is evolved under Hamiltonian that couples a number of excitations of the cat qubit to a second mode (b mode) of the cat qubit. Then, at block 3606, the second mode (e.g. b mode) of the cat qubit is measured to determine information about the first mode (e.g. a mode) of the cat qubit. [00220] FIG. 36B is a process flow diagram illustrating another process for deflating a qubit and measuring a “b” mode of the deflated cat qubit to determine information about a first mode of the deflated cat qubit, according to some embodiments. [00221] At block 3652, deflation is performed in a system wherein an “a” mode is a qubit mode and a “b” mode is a readout mode. The deflation includes deflating a qubit to ^^ = 0 such that the + cat sate is mapped to
Figure imgf000043_0001
and the – cat sate is mapped to
Figure imgf000043_0003
. At block 3654, the system is evolved under a Hamiltonian derived from a three wave or higher mixing Hamiltonian. For example, a Hamiltonian
Figure imgf000043_0002
At block 3656 measurements of the “b” mode are performed to determine whether the qubit is in the + or – cat state. For example, (homodyne/heterodyne) measurements of the b mode are performed to determine whether the qubit was in a + or - cat state. If the qubit was in the – cat state then there is a drive on the “b” mode implemented by the Hamiltonian whereas if the qubit was in the + cat state there is no drive on the “b” mode. [00222] FIG. 37 is a process flow diagram illustrating a process for evolving a cat qubit via three wave or higher mixing Hamiltonian and performing a homodyne, heterodyne, or photo detection of the evolved cat qubit to measure a measure property of another bosonic mode of the cat qubit, according to some embodiments. [00223] At block 3702, a cat qubit is evolved under a Hamiltonian that couples a phase of the cat qubit to a measurable property of another bosonic mode of the cat qubit, wherein the Hamiltonian is selected from a three wave or higher mixing Hamiltonian. At block 3704, a homodyne, heterodyne, or photo detection of the other bosonic mode is performed to determine the phase of the cat qubit. Simulation of Cat Qubits Using a Shifted Fock Basis [00224] A Fock basis is an algebraic construction used to construct quantum state space for a variable or unknown number of identical particles based on a single particle in Hilbert space. For example, a Fock basis could be used to simulate a cavity or the behavior of a phononic resonator using an n-dimensional ladder of states. For example, Fock basis may be used to simulate photon number states, wherein a base state represents a vacuum condition without any photons present. However, by shifting the Fock basis, the Hilbert space can be truncated to include a finite (as opposed to infinite) number of photon number states. Thus, simulations can be simplified such that the truncated Hilbert space is simulated as opposed to the infinite Hilbert space, which cannot be effectively simulated. As an example, a shifted Fock basis simulation may replace a vacuum state with one or more coherent states. For example, a shift operator may be applied to the vacuum state condition such that the lowest shifted Fock states correspond to the lowest operators for the lowest states of a cat qubit. [00225] For example, simulating a large cat qubit (with large
Figure imgf000044_0007
) using a traditional (e.g. non-shifted) Fock basis may be ineffective due to the large (or even infinite) number of states that would need to be simulated. Instead, in some embodiments, the simulation may be performed using a shifted Fock basis, which can be used to describe large cat states in a more compact way than is the case for a usual Fock basis. More specifically, the annihilation operator ^^^ may be constructed in a shifted Fock basis. [00226] Recall that a cat state is composed of two coherent state components
Figure imgf000044_0004
which can be understood as displaced vacuum states
Figure imgf000044_0003
In the shifted Fock basis, 2d displaced Fock states
Figure imgf000044_0005
are used as basis states where
Figure imgf000044_0002
Note that while displaced Fock states in each ±
Figure imgf000044_0006
branch are orthonormalized, displaced Fock states in different branches are not necessarily orthogonal to each other. Thus the displaced Fock states need to be orthonormalized. [00227] The non-orthonormalized basis states may be defined as follows:
Figure imgf000044_0001
where have even and odd excitation number parity, respectively. Note that the
Figure imgf000045_0018
non-orthonormalized states are grouped into the even and odd branches instead of the +a branches. As a result, in the ground state manifold (n = 0), the normalized basis states are
Figure imgf000045_0017
equivalent to the complementary basis states of the cat qubit |±), not the computational basis states 10/1). For example:
Figure imgf000045_0001
[00228] The even/odd branching convention is used so that any two basis states in different branches are orthogonal to each other and hence the orthonormalization can be done separately in each parity sector. Note that:
Figure imgf000045_0002
where
Figure imgf000045_0003
are the matrix elements of the displacement operator in the usual Fock basis:
Figure imgf000045_0004
[00229] Here, is the generalized Laguerre polynomial. Since
Figure imgf000045_0005
Figure imgf000045_0007
is negligible if
Figure imgf000045_0009
In this regime, the basis states
Figure imgf000045_0006
Figure imgf000045_0008
are almost orthonormal. For the purpose of estimating the phase-flip (or Z) error rates within a small multiplicative error, it is often permissible to neglect the non-orthogonality of the states \(/)n, +)• However, this is generally not the case if the Z error rates are to be evaluated with a very high precision or if it is desired to estimate the bit-flip (or A) error rates. In these cases, taking into account the non-orthogonality of the states
Figure imgf000045_0016
may be necessary.
[00230] In such embodiments, the basis states are orthonormalized by applying the
Figure imgf000045_0015
Gram-Schmidt orthonormalization procedure. More specifically, given the non-orthonormalized basis states d orthonormalized basis states are constructed in each parity sector starting from
Figure imgf000045_0013
the ground state
Figure imgf000045_0014
Figure imgf000045_0010
[00231] The coefficients of are determined inductively. In the base
Figure imgf000045_0011
case (k=0),
Figure imgf000045_0012
and thus the logical | ± > states of the cat qubit are given by:
Figure imgf000046_0001
[00232] In general, the case with we are given with for all 0
Figure imgf000046_0002
Figure imgf000046_0003
Figure imgf000046_0004
1 and 0
Figure imgf000046_0007
Thus, at this point, the first k columns of are known. Let
Figure imgf000046_0005
be the d x k matrix which is obtained by taking the first k columns of the matrix we
Figure imgf000046_0006
assign the k+\ column
Figure imgf000046_0008
as follows:
Figure imgf000046_0009
[00233] Having constructed the 2d orthonormalized shifted Fock basis states the matrix
Figure imgf000046_0010
elements for an operator
Figure imgf000046_0011
in the orthonormalized basis need to be determined. To do this, let and also define and
Figure imgf000046_0012
Figure imgf000046_0013
Figure imgf000046_0016
similarly. Suppose the operator O transforms the non-orthonormalized basis states as
Figure imgf000046_0014
follows:
Figure imgf000046_0015
[00234] are the matrix elements of the operator
Figure imgf000046_0020
in the non-orthonormalized basis .
Figure imgf000046_0018
Then, in the orthonormalized basis, the matrix elements of the operator 0 are given by:
Figure imgf000046_0019
Figure imgf000046_0017
where and c are 2d x 2d matrices which are defined as:
Figure imgf000046_0021
[00235] The matrix elements of the d x d matrices
Figure imgf000046_0022
are given above.
[00236] Consider the annihilation operator
Figure imgf000046_0023
and note that it transforms the non- orthonormalized basis states 38 follows:
Figure imgf000046_0025
Figure imgf000046_0024
[00237] Here, the ± parity is flipped to the ∓ parity. Thus, in the non-orthonormalized basis, the matrix elements of the annihilation operator are given by:
Figure imgf000047_0001
[00238] where
Figure imgf000047_0002
s the Pauli
Figure imgf000047_0014
X operator and
Figure imgf000047_0015
is the truncated annihilation operator of size
Figure imgf000047_0013
. Then, the matrix elements of the annihilation operator in the orthonormalized basis
Figure imgf000047_0003
can be obtained via the transformation given above with regard to
Figure imgf000047_0006
[00239] Recall that are complementary basis states. To find the matrix elements of an
Figure imgf000047_0004
operator in the computational basis states, the matrix may be conjugated by the Hadamard operator Thus, in the orthonormalized computational basis, the annihilation operator is given by:
Figure imgf000047_0005
[00240] Here the subscript SF indicates the action of the annihilation operator in the shifted Fock basis. The approximate expression
Figure imgf000047_0007
is useful for analyzing the Z error rates of large cat qubits (with
Figure imgf000047_0008
in the perturbative regime where the cat qubit states may sometimes be excited to the first excited state manifold
Figure imgf000047_0009
(n ) but quickly decay back to the ground state manifold (n = 0). Lastly, it is noted that the parity operator
Figure imgf000047_0010
is exactly given by
Figure imgf000047_0016
n the shifted Fock basis because of the way the basis states are defined, e.g.,
Figure imgf000047_0011
has an even (odd) excitation number parity. [00241] FIG.38 is a process flow diagram illustrating a process of utilizing a shifted Fock basis to simulate a cat qubit (with
Figure imgf000047_0012
according to some embodiments. [00242] At block 3802, non-orthonormalized basis states are defined as described above. At block 3804 the basis states are orthonormalized to construct 2d orthonormalized shifted Fock basis states as described above. At block 3806 matrix elements are determined for an operator in the orthonormalized basis as described above. [00243] Embodiments of the present disclosure can be described in view of the following clauses: Clause 1. A method for simulating a Toffoli gate encoded in arbitrary Calderbank-Shor-Steane codes, the method comprising: preparing computational basis states in a fault-tolerant manner by applying a STOP algorithm to determine when syndrome measurements of stabilizers of a repetition code for the computational basis states can be stopped such that a probability of faults for the computational basis states are below a threshold level; transversally applying a CNOT gate to the prepared computational basis states to prepare a
Figure imgf000048_0005
state; measuring a Clifford stabilizer gA for the
Figure imgf000048_0004
state, and applying a logical Z correction if the measurement outcome for the Clifford stabilizer gA is -1, wherein measuring the Clifford stabilizer gA and applying the logical Z correction based on a measurement outcome of the Clifford stabilizer gA prepares a state
Figure imgf000048_0002
repeating the Clifford stabilizer gA measurement for the
Figure imgf000048_0003
state a threshold number of times; preparing a Toffoli magic state in response to determining the Clifford stabilizer gA measurements are trivial; and applying a sequence of Clifford gates to a logical input state and the prepared Toffoli
Figure imgf000048_0001
magic state to simulate the logical Toffoli gate, wherein Clifford error corrections are applied to the outputs of the sequence of Clifford gates applied to the logical inputs. Clause 2. The method of clause 1, wherein applying the STOP algorithm comprises: tracking consecutive syndrome outcomes; computing a minimum number of faults capable of causing a tracked sequence of consecutive syndrome outcomes; stopping the STOP algorithm if either of the following conditions is met: 1) a same syndrome outcome is repeated a threshold number of times in a row, wherein the threshold is equal to one plus a difference between: a code distance of one of the computational basis states being prepared minus one wherein the result of the subtraction is divided by two; and a currently computed minimum number of faults capable of causing the tracked sequence of consecutive syndrome outcomes; or 2) the currently computed minimum number of faults capable of causing the tracked sequence of consecutive syndromes is equal to the code distance of the one of the computational basis states being prepared minus one wherein the result of the subtraction is divided by two, and wherein one additional round of syndrome measurements is performed subsequently; and utilizing the repeated syndrome if condition 1 is met or utilizing the syndrome for the subsequently performed syndrome measurement if condition 2 is met, wherein the utilized syndrome it utilized to error correct the one of the computational basis states being prepared. Clause 3. The method of clause 2, wherein: repeating the measurement of the Clifford stabilizer gA for the
Figure imgf000049_0001
state the threshold number of times comprises repeating the measurement such that the Clifford stabilizer gA is measured a number of times equal to (d-1)/2, wherein d is a code distance of the one of the fault tolerant computational basis states. Clause 4. The method of clause 3, wherein error detection is performed between respective measurements of the Clifford stabilizer gA. Clause 5. The method of any of clauses 1 through 4, further comprising: growing the Toffoli magic state from a first code distance to a second code distance, wherein the STOP algorithm is used to measure stabilizers and minimum weight perfect matching (MWPM) is applied to a measured syndrome history generated from measuring the stabilizers to correct for errors. Clause 6. A method, comprising: measuring syndrome outcomes of an ancilla qubit for an arbitrary Calderbank-Shor Steane code; tracking consecutive ones of the measured syndrome outcomes; computing a minimum number of faults capable of causing a tracked sequence of consecutive syndrome outcomes; stopping the measuring of the syndrome outcomes if either of the following conditions is met: 1) a same syndrome outcome is repeated a threshold number of times in a row, wherein the threshold is equal to one plus a difference between: a code distance of the arbitrary Calderbank-Shor-Steane code minus one wherein the result of the subtraction is divided by two; and a currently computed minimum number of faults capable of causing the tracked sequence of consecutive syndrome outcomes; or 2) the currently computed minimum number of faults capable of causing the tracked sequence of consecutive syndromes is equal to the code distance minus one wherein the result of the subtraction is divided by two, and wherein one additional round of syndrome measurements is performed subsequently; and utilizing the repeated syndrome outcome if condition 1 is met or utilizing the syndrome outcome for the subsequently performed syndrome measurement if condition 2 is met, wherein the utilized syndrome outcome is utilized to error correct the arbitrary Calderbank-Shor-Steane code. Clause 7. The method of clause 6, wherein: the arbitrary Calderbank-Shor-Steane code is a n-qubit repetition code; measuring the syndrome outcomes comprises measuring ZL at the ancilla for the n-qubit repetition code; and performing the error correction for the n-qubit arbitrary Calderbank-Shor-Steane code further comprises applying an XL correction based on the measured ZL at the ancilla for the n-qubit repetition code, wherein performing the error correction prepares computational basis state to be used in implementing a Clifford gate. Clause 8. The method of clause 6 or clause 7, further comprising: growing the arbitrary Calderbank-Shor-Steane code from a first code distance to a second code distance, wherein a STOP algorithm is used to measure stabilizers and minimum weight perfect matching (MWPM) is applied to a measured syndrome history generated from measuring the stabilizers to correct for errors, wherein the STOP algorithm comprises said measuring syndrome outcomes, said tracking consecutive ones of the measured outcomes, said computing a minimum number of faults, said stopping the measuring if condition 1 or condition 2 is met, and said error correction. Clause 9. The method of clause 8, wherein said growing the arbitrary Calderbank-Shor-Steane code from the first code distance to the second code distance comprises: performing lattice surgery to merge together two code blocks, wherein the measuring comprises measuring a boundary operator between the two code blocks being merged. Clause 10. The method of any of clauses 6 through 9, further comprising: preparing computational basis states in a fault tolerant manner by applying a STOP algorithm to determine when syndrome measurements of stabilizers of a repetition code for the computational basis states can be stopped such that a probability of faults for the computational basis states are below a threshold level, wherein: the computational basis states are encoded using the arbitrary Calderbank-Shor- Steane code; and applying the STOP algorithm comprises performing said measuring syndrome outcomes, said tracking consecutive ones of the measured outcomes, said computing a minimum number of faults, said stopping the measuring if condition 1 or condition 2 is met, and said error correction. Clause 11. The method of clause 10, further comprising: transversally applying a CNOT gate to the prepared computational basis states to prepare a
Figure imgf000051_0006
state; measuring a Clifford stabilizer gA for the
Figure imgf000051_0001
state, and applying a logical Z correction if the measurement outcome for the Clifford stabilizer gA is -1, wherein measuring the Clifford stabilizer gA and applying the logical Z correction based on a measurement outcome of the Clifford stabilizer gA prepares a state
Figure imgf000051_0003
repeating the Clifford stabilizer gA measurement for the state a threshold number of
Figure imgf000051_0002
times; preparing a Toffoli magic state in response to determining the Clifford stabilizer gA measurements are trivial; and applying a sequence of Clifford gates to the state and the prepared Toffoli magic state
Figure imgf000051_0005
to simulate a Toffoli gate, wherein Clifford error corrections are applied to the outputs of the sequence of Clifford gates applied to a logical input. Clause 12. The method of clause 11, wherein: repeating the measurement of the Clifford stabilizer gA for the state the threshold
Figure imgf000051_0004
number of times comprises repeating the measurement such that the Clifford stabilizer gA is measured a number of times equal to (d-1)/2, wherein d is a code distance of the one of the fault tolerant computational basis states. Clause 13. The method of clause 12, wherein error detection is performed between respective measurements of the Clifford stabilizer gA. Clause 14. The method of clause 13, further comprising: growing the Toffoli magic state from a first code distance to a second code distance, wherein the STOP algorithm is used to measure stabilizers and minimum weight perfect matching (MWPM) is applied to a measured syndrome history generated from measuring the stabilizers to correct for errors. Clause 15. The method of any of clauses 6 through 14, wherein the arbitrary Calderbank-Shor- Steane code and the ancilla are implemented using a system comprising: mechanical linear resonators; and a control circuit coupled with the mechanical linear resonators, wherein the control circuit is configured to stabilize an arbitrary coherent state superposition (cat state) of the mechanical linear resonators to store quantum information of the Calderbank-Shor-Steane code, wherein to stabilize the arbitrary cat-state, the control circuit is configured to: excited phonons in the mechanical linear resonators by driving respective storage modes of the mechanical linear resonators; and dissipate phonons from the mechanical linear resonators via an open transmission line coupled to the control circuit configured to absorb photons from a dump mode of the control circuit. Clause 16. The method of clause 15, wherein the control circuit comprises: an asymmetrically-threaded superconducting quantum interference device (ATS) coupled with the mechanical linear resonators. Clause 17. A system comprising: mechanical resonators; and a control circuit coupled with the mechanical resonators, wherein the control circuit is configured to stabilize arbitrary coherent state superpositions (cat states) of the mechanical resonators to store quantum information; and one or more computing devices storing program instructions, that when executed cause the control circuit to perform: measuring syndrome outcomes of an ancilla qubit for one or more qubits storing the quantum information, wherein the ancilla qubit and the one or more qubits storing the quantum information are implemented via one or more of the mechanical resonators; tracking consecutive ones of the measured syndrome outcomes; computing a minimum number of faults capable of causing a tracked sequence of consecutive syndrome outcomes; stopping the measuring of the syndrome outcomes if either of the following conditions is met: 1) a same syndrome outcome is repeated a threshold number of times in a row, wherein the threshold is equal to one plus a difference between: a code distance of the one or more qubits storing quantum information minus one wherein the result of the subtraction is divided by two; and a currently computed minimum number of faults capable of causing the tracked sequence of consecutive syndrome outcomes; or 2) the currently computed minimum number of faults capable of causing the tracked sequence of consecutive syndromes is equal to the code distance minus one wherein the result of the subtraction is divided by two, and wherein one additional round of syndrome measurements is performed subsequently; and utilizing the repeated syndrome if condition 1 is met or utilizing the syndrome outcome for the subsequently performed syndrome measurement if condition 2 is met, wherein the utilized syndrome outcome is utilized to error correct the stored quantum information. Clause 18. The system of clause 17, wherein the one or more computing devices are further configured to implement: preparing computational basis states in a fault tolerant manner by applying a STOP algorithm to the fault-tolerant computational basis states to determine when syndrome measurements of stabilizers of a repetition code for the computational basis states can be stopped such that a probability of faults for the computational basis states are below a threshold level, wherein: applying the STOP algorithm comprises performing said measuring syndrome outcomes, said tracking consecutive ones of the measure outcomes, said computing a minimum number of faults, said stopping the measuring if condition 1 or condition 2 is met, and said error correction. Clause 19. The system of clause 17 or clause 18, wherein the one or more computing devices are further configured to implement: transversally applying a CNOT gate to the prepared computational basis states to prepare a
Figure imgf000053_0003
state; measuring a Clifford stabilizer gA for the state, and applying a logical Z correction if
Figure imgf000053_0002
the measurement outcome for the Clifford stabilizer gA is -1, wherein measuring the Clifford stabilizer gA and applying the logical Z correction based on a measurement outcome of the Clifford stabilizer gA prepares a state
Figure imgf000053_0001
repeating the Clifford stabilizer gA measurement for the state a threshold number of
Figure imgf000054_0002
times; preparing a Toffoli magic state in response to determining the Clifford stabilizer gA measurements are trivial; and applying a sequence of Clifford gates to a logical input state
Figure imgf000054_0001
and the prepared Toffoli magic state to simulate the Toffoli gate, wherein Clifford error corrections are applied to the outputs of the sequence of Clifford gates applied to the logical inputs. Clause 20. The system of clause 19, wherein the one or more computing devices are further configured to implement: growing the Toffoli magic state from a first code distance to a second code distance, wherein the STOP algorithm is used to measure stabilizers and minimum weight perfect matching (MWPM) is applied to a measured syndrome history generated from measuring the stabilizers to correct for errors. Clause 21. A method of preparing a Toffoli gate for use in quantum computing, the method comprising: preparing a plurality of Toffoli magic states, wherein computational basis states used in preparing the Toffoli magic states are encoded using a repetition code; distilling the Toffoli gate from two or more of the prepared Toffoli magic states, wherein distilling the Toffoli gate comprises preparing a check qubit associated with the Toffoli gate, wherein the check qubit indicates whether an error is present in the distilled Toffoli gate; and in response to verifying the check qubit does not indicate an error, utilizing the distilled Toffoli gate to perform a logical Toffoli gate operation. Clause 22. The method of clause 21, wherein distilling the Toffoli gate from the two or more of the prepared Toffoli magic states, comprises: performing a plurality of rounds of lattice surgery operations between qubits of a selected set of the plurality of Toffoli magic states and qubits of the distilled Toffoli gate; and wherein each of the rounds of lattice surgery acts on at least one of the check qubits associated with the distilled Toffoli gate. Clause 23. The method of clause 21 or clause 22, wherein the distilled Toffoli gate has a fault rate of less than 1 x 10-6. Clause 24. The method of any of clauses 21 through 23, wherein the distilled Toffoli gate is distilled using 8 of the Toffoli magic states. Clause 25. The method of clause 24, wherein the two distilled Toffoli gate have a probability of error that is less than a highest probability of error of the respective ones of the 8 Toffoli magic states reduced by a power of two. Clause 26. The method of clause 21, wherein the distilled Toffoli gate is distilled using 2 of the Toffoli magic states. Clause 27. The method of clause 26, wherein the distilled Toffoli gate has an error probability that is reduced by a power of two as compared to respective error rates of the 2 Toffoli magic states, when the 2 Toffoli magic states have highly biased noise. Clause 28. The method of clause 21, wherein the distilled Toffoli gate is distilled using 8 of the Toffoli magic states, and wherein the distilled Toffoli gate has an error probability that is reduced by a power of three as compared to error rates of respective ones of the 8 Toffoli magic states, when the 8 Toffoli magic states have highly biased noise. Clause 29. The method of clause 21, wherein a single round of distillation is performed to distill the Toffoli magic state, and wherein the single round of distillation comprises performing a plurality of lattice surgery operations. Clause 30. The method of any of clauses 21 through 29, wherein the Toffoli magic states and the distilled Toffoli gate are implemented using a system comprising: mechanical linear resonators; and one or more control circuits coupled with the mechanical linear resonators, wherein the one or more control circuits are configured to stabilize an arbitrary coherent state superposition (cat state) of the mechanical resonators to store quantum information of the Toffoli magic states and the distilled Toffoli gate, wherein to stabilize the arbitrary cat-state, the one or more control circuits are configured to: excite phonons in the mechanical resonators by driving respective storage modes of the mechanical resonators; and dissipate phonons from the mechanical resonators via one or more respective open transmission lines of the one or more control circuits coupled to the mechanical resonators, wherein the open transmission line is configured to absorb photons from the respective one or more control circuits. Clause 31. A system comprising: mechanical resonators; and one or more control circuits coupled with the mechanical resonators, wherein the one or more control circuits are configured to stabilize arbitrary coherent state superpositions (cat states) of the mechanical resonators to store quantum information; and one or more computing devices storing program instructions, that when executed cause the one or more control circuits to perform: preparing a plurality of Toffoli magic states; distilling a Toffoli gate from two or more of the prepared Toffoli magic states, wherein distilling the Toffoli gate comprises preparing a check qubit associated with the Toffoli gate, wherein the check qubit indicates whether an error is present in the distilled Toffoli gate; and in response to verifying the check qubit does not indicate an error, utilizing the distilled Toffoli gate to perform a logical Toffoli gate operation. Clause 32. The system of clause 31, wherein the distilled Toffoli gates comprise two distilled Toffoli gates that are distilled using 8 of the Toffoli magic states. Clause 33. The system of clause 32, wherein the two distilled Toffoli gate have a probability of error that is less than a highest probability of error of the respective ones of the 8 Toffoli magic states reduced by a power of two. Clause 34. The system of clause 31, wherein the distilled Toffoli gate is distilled using 2 of the Toffoli magic states. Clause 35. The system of clause 34, wherein the distilled Toffoli gate has an error probability that is reduced by a power of two as compared to respective error rates of the 2 Toffoli magic states, when the 2 Toffoli magic states have highly biased noise. Clause 36. The system of clause 31, wherein the distilled Toffoli gate is distilled using 8 of the Toffoli magic states, and wherein the distilled Toffoli gate has an error probability that is reduced by a power of three as compared to error rates of respective ones of the 8 Toffoli magic states, when the 8 Toffoli magic states have highly biased noise. Clause 37. The system of any of clauses 31 through 36, wherein the plurality of Toffoli magic states uses as inputs are stabilized using a STOP algorithm wherein to apply the STOP algorithm, the one or more computing devices are configured to implement: tracking consecutive syndrome outcomes; computing a minimum number of faults capable of causing a tracked sequence of consecutive syndrome outcomes; stopping the STOP algorithm if either of the following conditions is met: 1) a same syndrome outcome is repeated a threshold number of times in a row, wherein the threshold is equal to one plus a difference between: a code distance of one of the fault-tolerant computational basis states minus one wherein the result of the subtraction is divided by two; and a currently computed minimum number of faults capable of causing the tracked sequence of consecutive syndrome outcomes; or 2) the currently computed minimum number of faults capable of causing the tracked sequence of consecutive syndromes is equal to the code distance of the one of the fault-tolerant computational basis states minus one wherein the result of the subtraction is divided by two, and wherein one additional round of syndrome measurements is performed subsequently; and utilizing the repeated syndrome if condition 1 is met or utilizing the syndrome for the subsequently performed syndrome measurement if condition 2 is met, wherein the utilized syndrome it utilized to error correct the one of the fault-tolerant computational basis states. Clause 38. The system of any of clauses 31 through 37, wherein respective ones of the one or more control circuits comprise: an asymmetrically-threaded superconducting quantum interference device (ATS) coupled with respective ones of the mechanical resonators. Clause 39. A method of distilling a logical Toffoli gate from a plurality of Toffoli magic states, the method comprising: performing a plurality of rounds of lattice surgery operations between qubits of a selected set of the plurality of Toffoli magic states and qubits for a distilled Toffoli gate; and wherein each of the rounds of lattice surgery acts on at least one of the check qubits associated with the distilled Toffoli gate. Clause 40. The method of clause 39, wherein the distilled Toffoli gate is distilled using 8 of the Toffoli magic states; and the distilled Toffoli gate has a probability of error that is less than a highest probability of error of the respective ones of the 8 Toffoli magic states reduced by a power of two. Clause 41. A method of simulating a cat qubit, the method comprising: defining basis states for the cat qubit; orthonormalizing the defined basis states to construct 2d orthonormalized shifted Fock basis states for the cat qubit; and determining matrix elements of an operator in the orthonormalized shifted Fock basis states. Clause 42. The method of clause 41, wherein the defined basis states, before performing the orthonormalization, are defined such that the defined basis states are grouped into even and odd branches. Clause 43. The method of clause 42, wherein, in a ground state, normalized versions of the defined basis states are equivalent to complementary basis states of the cat qubit expressed as
Figure imgf000058_0002
instead of computational basis states expressed as
Figure imgf000058_0001
Clause 44. The method of clause 43, wherein the defined basis states in different parity sectors are orthogonal to one another such that the orthonormalization is performed separately in the respective parity sectors. Clause 45. The method of clause 41, further comprising: applying the determined matrix elements of the operator to simulate the cat-qubit in the 2d orthonormalized shifted Fock basis states. Clause 46. The method of any of clauses 41 through 45, wherein the cat qubit being simulated is a hybrid acoustic-electrical qubit implemented using a linear mechanical resonator. Clause 47. The method of any of clauses 41 through 45, wherein the cat qubit being simulated is implemented using an electromagnetic resonator. Clause 48. One or more non-transitory computer-readable media storing program instructions, that when executed on or across one or more processors, cause the one or more processors to: define basis states for a cat qubit to be simulated; orthonormalize the defined basis states to construct 2d orthonormalized shifted Fock basis states for the cat qubit; and determine matrix elements of an operator in the orthonormalized basis states. Clause 49. The one or more non-transitory computer-readable media of clause 48, wherein the program instructions, when executed on or across the one or more processors, further cause the one or more processors to: apply the determined matrix elements of the operator to simulate the cat-qubit in the 2d orthonormalized shifted Fock basis states. Clause 50. The one or more non-transitory computer-readable media of clause 48, wherein the defined basis states, before performing the orthonormalization, are defined such that the defined basis states are grouped into even and odd branches. Clause 51. The one or more non-transitory computer-readable media of clause 48, wherein, in a ground state, normalized versions of the defined basis states are equivalent to complementary basis states of the cat qubit expressed as instead of computational basis states expressed as
Figure imgf000059_0001
Figure imgf000059_0002
Clause 52. The one or more non-transitory computer-readable media of clause 48, wherein the defined basis states are orthogonal to one another such that the orthonormalization is performed separately in respective parity sectors. Clause 53. A system, comprising: a memory storing program instructions; and one or more processors, wherein the program instructions, when executed on or across the one or more processors cause the one or more processors to: define basis states for a cat qubit to be simulated; orthonormalize the defined basis states to construct 2d orthonormalized shifted Fock basis states for the cat qubit; and determine matrix elements of an operator in the orthonormalized basis states. Clause 54. The system of clause 53, wherein the program instructions, when executed on or across the one or more processors, further cause the one or more processors to: apply the determined matrix elements of the operator to simulate the cat-qubit in the 2d orthonormalized shifted Fock basis states. Clause 55. The system of clause 53, wherein the defined basis states, before performing the orthonormalization, are defined such that the defined basis states are grouped into even and odd branches. Clause 56. The system of clause 53, wherein, in a ground state, normalized versions of the defined basis states are equivalent to complementary basis states of the cat qubit expressed as
Figure imgf000059_0004
instead of computational basis states expressed as
Figure imgf000059_0003
Clause 57. The system of clause 53, wherein the defined basis states are orthogonal to one another such that the orthonormalization is performed separately in respective parity sectors. Clause 58. The system of any of clauses 53 through 57, wherein the cat qubit to be simulated is implemented using mechanical resonators. Clause 59. The system of any of clauses 53 through 57, wherein the cat qubit to be simulated is implemented using electromagnetic resonators. Clause 60. The system of any of clauses 53 through 57, wherein the cat qubit to be simulated is implemented in as system comprising one or more mechanical resonators and one or more electromagnetic resonators. Clause 61. A method of measuring an ancilla qubit in a context of error correction of stored quantum information, wherein a set of one or more error correction gates are applied between one or more data qubits storing the quantum information and the ancilla qubit to entangle the ancilla qubit with the one or more data qubits, the method comprising: transferring an excitation of the ancilla qubit to an additional readout qubit using a SWAP gate or other sequence of one or more gates that perform a swap function; performing one or more measurements of the readout qubit; and applying another set of one or more error correction gates between the one or more data qubits storing the quantum information and the ancilla qubit concurrently with performing at least some of the one or more measurements of the readout qubit. Clause 62. The method of clause 61, wherein the data qubits, the ancilla qubit, and the readout qubit are implemented using mechanical resonators. Clause 63. The method of clause 62, wherein the swap gate is mediated by an asymmetrically threaded superconducting quantum interference device (ATS). Clause 64. The method of clause 61, wherein the data qubits, the ancilla qubit, and the readout qubit are implemented using bosonic modes. Clause 65. The method of clause 61, wherein an amount of time during which the one or more data qubits idle while performing the swap gate is less than an amount of time required to perform the one or more measurements of the readout qubit. Clause 66. The method of clause 65, wherein the one or more measurements of the readout qubit: comprise a plurality of repeated measurements taken subsequent to performing the swap gate or other gates that perform the swap function; and are repeated up until an approximate time when a swap gate operation is performed for a next round of error correction, wherein the swap gate operation of the next round of error correction is performed subsequent to applying the other set of one or more error correction gates. Clause 67. The method of clause 66, wherein the plurality of repeated measurements of the readout qubit comprise repeated QND (quantum non demolition) parity measurements of the readout qubit. Clause 68. The method of clause 65, wherein the readout qubit is a higher mode of an ancilla oscillator for the ancilla qubit. Clause 69. The method of clause 68, wherein the ancilla oscillator is a λ/2 oscillator, and wherein the readout qubit has a mode that is twice a base mode of the ancilla oscillator. Clause 70. A method of measuring a bosonic qubit wherein a measurement outcome is affected by a single photon loss event, the method comprising: deflating the bosonic qubit, prior to performing a readout of the bosonic qubit, such that phonons or photons are dissipated from the bosonic qubit while a measurement observable of the bosonic qubit is preserved; and performing, subsequent to the deflating, a readout of the measurement observable of the deflated bosonic qubit. Clause 71. The method of clause 70, wherein deflating the bosonic qubit comprises: changing a dissipater parameter such that an average photon number or average phonon number of the bosonic qubit ( ^^) is reduced from an ^^initial value to an ^^final value, wherein
Figure imgf000061_0001
Clause 72. The method of clause 70, wherein: deflating the bosonic qubit comprises varying a steady state of a two-photon dissipation process for the bosonic qubit; and performing the readout of the measurement observable of the deflated bosonic qubit comprises performing a parity readout of the deflated bosonic qubit. Clause 73. The method of any of clauses 70 through 72, wherein the bosonic qubit is implemented using a system comprising: mechanical resonators; and a control circuit coupled with the mechanical resonators, wherein the control circuit is configured to stabilize an arbitrary coherent state superposition (cat state) of the mechanical resonators to store quantum information, wherein to stabilize the arbitrary cat-state, the control circuit is configured to: excite phonons in the mechanical resonators by driving respective storage modes of the mechanical resonators; and dissipate phonons via an open transmission line coupled to the control circuit configured to absorb photons from a dump mode of the control circuit. Clause 74. The method of clause 73, wherein the control circuit comprises: an asymmetrically-threaded superconducting quantum interference device (ATS) coupled with the mechanical resonators, and wherein deflating the bosonic qubit comprises changing a steady state of a two photon dissipation controlled by the ATS. Clause 75. A method of performing a measurement of a first mode (a) representing quantum information stored in a cat qubit, the method comprising: deflating the cat qubit such that an even number of phonons or photons are dissipated from the cat qubit; evolving the cat qubit under a Hamiltonian that couples a number of excitations of the cat qubit to a change in a measurable property of another mode (b); and measuring the other mode (b). Clause 76. The method of clause 75, wherein: the measurement is a determination of a parity of the cat qubit; deflating the cat qubit comprises deflating the cat qubit such that an average photon number or average phonon number of the cat qubit
Figure imgf000062_0004
is reduced to zero, wherein an even cat state is mapped to
Figure imgf000062_0005
and an odd cat state is mapped to
Figure imgf000062_0003
the Hamiltonian is selected from a three or higher wave mixing Hamiltonian that correlates phonon number or photon number to a change of the other mode (b); and measuring the other mode (b) using homodyne, heterodyne, or photo detection. Clause 77. The method of clause 75, wherein the Hamiltonian selected from the three or higher wave mixing Hamiltonian comprises
Figure imgf000062_0002
Clause 78. The method of clause 75, wherein the Hamiltonian selected from the three or higher wave mixing Hamiltonian comprises
Figure imgf000062_0001
Clause 79. The method of clause 75, wherein the Hamiltonian selected from the three or higher wave mixing Hamiltonian comprises a product of aறa with a term that affects the other mode (b) in a measureable way. Clause 80. The method of clause 75, wherein: the cat qubit is implemented via a mechanical resonator; the other mode (b) is a dump mode; and the Hamiltonian is selected from a three or higher wave mixing Hamiltonian that correlates the average phonon number or the average photon number to a change of the other mode (b), wherein the three wave mixing is mediated by an ATS. Clause 81. A method of performing a measurement of quantum information in a cat qubit, the method comprising: evolving under a Hamiltonian which couples the phase of ^^ of the cat qubit (an “a” mode) to a measurable property of another bosonic mode (a “b” mode) wherein the Hamiltonian is achieved via a three wave or higher mixing Hamiltonian; and performing homodyne, heterodyne, or photo detection of the “b” mode to determine a state of the “a” mode, wherein the cat qubit is implemented using a system comprising: mechanical resonators; and a control circuit comprising an asymmetrically-threaded superconducting quantum interference device (ATS) coupled with the mechanical resonators, wherein the control circuit is configured to stabilize an arbitrary coherent state superposition (cat state) of the mechanical resonators to store quantum information, wherein to stabilize the arbitrary cat-state, the control circuit is configured to: excite phonons in the mechanical resonators by driving respective storage modes of the mechanical resonators; and dissipate phonons via an open transmission line coupled to the control circuit configured to absorb photons from a dump mode of the control circuit. Clause 82. The method of clause 81, wherein: the Hamiltonian is derived from a three wave mixing Hamiltonian mediated by an ATS; the “a” mode is implemented via a mechanical storage resonator; and the “b” mode is implemented via an electromagnetic resonator. Clause 83. The method of clause 82, wherein a Hamiltonian for the readout comprises:
Figure imgf000063_0001
Clause 84. A system, comprising: a mechanical linear resonator; and a control circuit coupled with the mechanical linear resonator, wherein the control circuit is configured to stabilize an arbitrary coherent state superposition (cat state) of the mechanical linear resonator to store quantum information, wherein to stabilize the arbitrary cat-state, the control circuit is configured to: excite phonons in the mechanical linear resonator by driving a storage mode of the mechanical linear resonator; and dissipate phonons from the mechanical linear resonator via an open transmission line coupled to the control circuit configured to absorb photons from a dump mode of the control circuit. Clause 85. The system of clause 84, wherein the control circuit comprises: an asymmetrically-threaded superconducting quantum interference device (ATS) coupled with the mechanical resonator. Clause 86. The system of clause 85, further comprising: one or more additional mechanical linear resonators coupled to the control circuit, wherein the control circuit is configured to stabilize respective cat states of the mechanical linear resonator and the one or more additional mechanical linear resonators via the single ATS and the single open transmission line. Clause 87. The system of clause 86, wherein the storage modes of the respective mechanical linear resonators are detuned, such that the phonons supplied to the respective mechanical linear resonators are supplied in an incoherent manner. Clause 88. The system of clause 87, wherein pumps of the respective mechanical linear resonators are separated by a frequency bandwidth greater than a two-phonon dissipation rate of the respective mechanical linear resonators. Clause 89. The system of clause 88, wherein the control circuit further comprises: one or more microwave filters configured to filter out correlated decay terms that if not filtered out cause simultaneous phase flips of storage modes of two or more of the mechanical linear resonators. Clause 90. The system of any of clauses 85 through 89, wherein the control circuit further comprises: a high-impedance inductor used as part of the ATS coupled to the mechanical linear resonator. Clause 91. The system of clause 90, wherein the high-impedance inductor comprises: a planar meander or double-spiral inductor; a spiral inductor with one or more air bridges; an array of Josephson junctions; or a thin-film superconductor with a high kinetic inductance. Clause 92. The system of any of clauses 85 through 91, wherein at least some of the mechanical linear resonators comprise three or more terminals, the system further comprising: two or more additional asymmetrically-threaded superconducting quantum interference devices (ATS), wherein a given one of the mechanical linear resonators comprising three or more terminals is coupled with three or more ATSs via the respective three or more terminals. Clause 93. A method of stabilizing coherent state superpositions (cat states) of a mechanical resonator, the method comprising: exciting phonons in the mechanical resonator by driving a storage mode of the mechanical resonator; and dissipating phonons from the mechanical resonator via an open transmission line coupled to the control circuit configured to absorb photons from a dump mode of the control circuit. Clause 94. The method of clause 93, wherein the phonons are excited in the mechanical resonator and dissipated from the mechanical resonator in pairs comprising two phonons. Clause 95. The method of clause 94, wherein the excitation and dissipation of the phonon pairs is induced via a non-linear interaction between the storage mode of the mechanical resonator and the dump mode of the control circuit, wherein a square of the storage mode of the mechanical resonator is coupled to the dump mode of the control circuit via a two-phonon coupling rate (g2), and wherein a decay rate at which photons are absorbed via the open transmission line is approximately ten times or greater than the coupling rate (g2). Clause 96. The method of clause 94, wherein the control circuit comprises an asymmetrically- threaded superconducting quantum interference device (ATS) coupled with the mechanical resonator, wherein the ATS is configured to cause the two-phonon pairs to be excited in the mechanical resonator. Clause 97. The method of clause 96, further comprising: causing phonons to be excited in one or more additional mechanical resonators by driving respective storage modes of the one or more additional mechanical resonators; and dissipating phonons from the one or more additional mechanical resonators via the open transmission line configured to absorb the photons from the dump mode of the control circuit, wherein the single ATS is used to cause the phonons to be excited in the mechanical resonator and the one or more additional mechanical resonators. Clause 98. The method of clause 97, wherein the storage modes of the respective mechanical resonators are detuned. Clause 99. The method of clause 98, wherein the storage modes of the respective mechanical resonators are separated by a frequency bandwidth greater than a two-phonon dissipation rate of the dump mode of the control circuit. Clause 100. The method of clause 99, further comprising: filtering out, via one or more microwave filters, correlated decay terms of storage modes of two or more of the mechanical resonators. Clause 101. A method of stabilizing coherent state superpositions (cat states) of a plurality of resonators storing quantum information, the method comprising: causing, via a single asymmetrically-threaded superconducting quantum interference device (ATS), pairs of two phonons or pairs of two photons to be excited in respective ones of the respective resonators by driving respective storage modes of the respective resonators; and dissipating pairs of two photons from a dump mode of a control circuit comprising the ATS, wherein the control circuit is coupled with the respective resonators, and wherein an open transmission line is coupled to the dump mode of the control circuit. Clause 102. The method of clause 101, wherein the resonators are mechanical resonators. Clause 103. The method of clause 101, wherein the resonators are electromagnetic resonators. Clause 104. A method, comprising: implementing a multi-qubit gate among control and target qubits in a system comprising resonators and an asymmetrically-threaded superconducting quantum interference device (ATS), wherein implementing the multi-qubit gate comprises: implementing a linear drive for a phononic mode of a cat qubit for the gate, wherein the cat qubit is implemented via one of the resonators of the system; orchestrating Hamiltonian interactions, wherein the Hamiltonian interactions comprise a compensating Hamiltonian for the multi-qubit gate, and wherein the compensating Hamiltonian includes a frequency shift of a target mode and a control mode at the mechanical resonator being driven, wherein the control mode and the target mode are coupled via an optomechancical coupling. Clause 105. The method of clause 104, wherein a setting for the multi-qubit gate comprises multiple ones of the resonators coupled to the ATS, wherein the ATS is shared by the multiple ones of the resonators. Clause 106. The method of clause 104, wherein the optomechanical coupling is realized by off- resonantly driving the resonators and the ATS. Clause 107. The method of clause 106, wherein said off-resonantly driving the resonators and the ATS avoids frequency collisions. Clause 108. The method of clause 104, wherein the multi-qubit gate is a CNOT gate. Clause 109. The method of clause 104, wherein the multi-qubit gate is a Toffoli gate. Clause 110. The method of clause 104, wherein the resonators are mechanical resonators. Clause 111. The method of clause 104, wherein the resonators are electromagnetic resonators. Illustrative computer system [00244] FIG.39 is a block diagram illustrating an example computing device that may be used in at least some embodiments. [00245] FIG. 39 illustrates such a general-purpose computing device 3900 as may be used in any of the embodiments described herein. In the illustrated embodiment, computing device 3900 includes one or more processors 3910 coupled to a system memory 3920 (which may comprise both non-volatile and volatile memory modules) via an input/output (I/O) interface 3930. Computing device 3900 further includes a network interface 3940 coupled to I/O interface 3930. [00246] In various embodiments, computing device 3900 may be a uniprocessor system including one processor 3910, or a multiprocessor system including several processors 3910 (e.g., two, four, eight, or another suitable number). Processors 3910 may be any suitable processors capable of executing instructions. For example, in various embodiments, processors 3910 may be general-purpose or embedded processors implementing any of a variety of instruction set architectures (ISAs), such as the x86, PowerPC, SPARC, or MIPS ISAs, or any other suitable ISA. In multiprocessor systems, each of processors 3910 may commonly, but not necessarily, implement the same ISA. In some implementations, graphics processing units (GPUs) may be used instead of, or in addition to, conventional processors. [00247] System memory 3920 may be configured to store instructions and data accessible by processor(s) 3910. In at least some embodiments, the system memory 3920 may comprise both volatile and non-volatile portions; in other embodiments, only volatile memory may be used. In various embodiments, the volatile portion of system memory 3920 may be implemented using any suitable memory technology, such as static random access memory (SRAM), synchronous dynamic RAM or any other type of memory. For the non-volatile portion of system memory (which may comprise one or more NVDIMMs, for example), in some embodiments flash-based memory devices, including NAND-flash devices, may be used. In at least some embodiments, the non-volatile portion of the system memory may include a power source, such as a supercapacitor or other power storage device (e.g., a battery). In various embodiments, memristor based resistive random access memory (ReRAM), three-dimensional NAND technologies, Ferroelectric RAM, magnetoresistive RAM (MRAM), or any of various types of phase change memory (PCM) may be used at least for the non-volatile portion of system memory. In the illustrated embodiment, program instructions and data implementing one or more desired functions, such as those methods, techniques, and data described above, are shown stored within system memory 3920 as code 3925 and data 3926. [00248] In some embodiments, I/O interface 3930 may be configured to coordinate I/O traffic between processor 3910, system memory 3920, and any peripheral devices in the device, including network interface 3940 or other peripheral interfaces such as various types of persistent and/or volatile storage devices. In some embodiments, I/O interface 3930 may perform any necessary protocol, timing or other data transformations to convert data signals from one component (e.g., system memory 3920) into a format suitable for use by another component (e.g., processor 3910). In some embodiments, I/O interface 3930 may include support for devices attached through various types of peripheral buses, such as a variant of the Peripheral Component Interconnect (PCI) bus standard or the Universal Serial Bus (USB) standard, for example. In some embodiments, the function of I/O interface 3930 may be split into two or more separate components, such as a north bridge and a south bridge, for example. Also, in some embodiments some or all of the functionality of I/O interface 3930, such as an interface to system memory 3920, may be incorporated directly into processor 3910. [00249] Network interface 3940 may be configured to allow data to be exchanged between computing device 3900 and other devices 3960 attached to a network or networks 3950, such as other computer systems or devices. In various embodiments, network interface 3940 may support communication via any suitable wired or wireless general data networks, such as types of Ethernet network, for example. Additionally, network interface 3940 may support communication via telecommunications/telephony networks such as analog voice networks or digital fiber communications networks, via storage area networks such as Fibre Channel SANs, or via any other suitable type of network and/or protocol. [00250] In some embodiments, system memory 3920 may represent one embodiment of a computer-accessible medium configured to store at least a subset of program instructions and data used for implementing the methods and apparatus discussed in the context of FIG.1 through FIG. 38. However, in other embodiments, program instructions and/or data may be received, sent or stored upon different types of computer-accessible media. Generally speaking, a computer- accessible medium may include non-transitory storage media or memory media such as magnetic or optical media, e.g., disk or DVD/CD coupled to computing device 3900 via I/O interface 3930. A non-transitory computer-accessible storage medium may also include any volatile or non- volatile media such as RAM (e.g. SDRAM, DDR SDRAM, RDRAM, SRAM, etc.), ROM, etc., that may be included in some embodiments of computing device 3900 as system memory 3920 or another type of memory. In some embodiments, a plurality of non-transitory computer-readable storage media may collectively store program instructions that when executed on or across one or more processors implement at least a subset of the methods and techniques described above. A computer-accessible medium may further include transmission media or signals such as electrical, electromagnetic, or digital signals, conveyed via a communication medium such as a network and/or a wireless link, such as may be implemented via network interface 3940. Portions or all of multiple computing devices such as that illustrated in FIG. 39 may be used to implement the described functionality in various embodiments; for example, software components running on a variety of different devices and servers may collaborate to provide the functionality. In some embodiments, portions of the described functionality may be implemented using storage devices, network devices, or special-purpose computer systems, in addition to or instead of being implemented using general-purpose computer systems. The term “computing device”, as used herein, refers to at least all these types of devices, and is not limited to these types of devices. Conclusion [00251] Various embodiments may further include receiving, sending or storing instructions and/or data implemented in accordance with the foregoing description upon a computer-accessible medium. Generally speaking, a computer-accessible medium may include storage media or memory media such as magnetic or optical media, e.g., disk or DVD/CD-ROM, volatile or non- volatile media such as RAM (e.g. SDRAM, DDR, RDRAM, SRAM, etc.), ROM, etc., as well as transmission media or signals such as electrical, electromagnetic, or digital signals, conveyed via a communication medium such as network and/or a wireless link. [00252] The various methods as illustrated in the Figures and described herein represent exemplary embodiments of methods. The methods may be implemented in software, hardware, or a combination thereof. The order of method may be changed, and various elements may be added, reordered, combined, omitted, modified, etc. [00253] Various modifications and changes may be made as would be obvious to a person skilled in the art having the benefit of this disclosure. It is intended to embrace all such modifications and changes and, accordingly, the above description to be regarded in an illustrative rather than a restrictive sense.

Claims

CLAIMS WHAT IS CLAIMED IS: 1. A system, comprising: a mechanical linear resonator; and a control circuit coupled with the mechanical linear resonator, wherein the control circuit is configured to stabilize an arbitrary coherent state superposition (cat state) of the mechanical linear resonator to store quantum information, wherein to stabilize the arbitrary cat-state, the control circuit is configured to: excite phonons in the mechanical linear resonator by driving a storage mode of the mechanical linear resonator; and dissipate phonons from the mechanical linear resonator via an open transmission line coupled to the control circuit configured to absorb photons from a dump mode of the control circuit.
2. The system of claim 1, wherein the control circuit comprises: an asymmetrically-threaded superconducting quantum interference device (ATS) coupled with the mechanical linear resonator.
3. The system of claim 2, further comprising: one or more additional mechanical linear resonators coupled to the control circuit, wherein the control circuit is configured to stabilize respective cat states of the mechanical linear resonator and the one or more additional mechanical linear resonators via the single ATS and the single open transmission line.
4. The system of claim 3, wherein the storage modes of the respective mechanical linear resonators are detuned, such that the phonons supplied to the respective mechanical linear resonators are supplied in an incoherent manner.
5. The system of claim 4, wherein pumps of the respective mechanical linear resonators are separated by a frequency bandwidth greater than a two-phonon dissipation rate of the respective mechanical linear resonators.
6. The system of claim 5, wherein the control circuit further comprises: one or more microwave filters configured to filter out correlated decay terms that if not filtered out cause simultaneous phase flips of storage modes of two or more of the mechanical linear resonators.
7. The system of any of claims 2 through 6, wherein the control circuit further comprises: a high-impedance inductor used as part of the ATS coupled to the mechanical linear resonator.
8. The system of claim 7, wherein the high-impedance inductor comprises: a planar meander or double-spiral inductor; a spiral inductor with one or more air bridges; an array of Josephson junctions; or a thin-film superconductor with a high kinetic inductance.
9. The system of any of claims 2 through 8, wherein at least some of the mechanical linear resonators comprise three or more terminals, the system further comprising: two or more additional asymmetrically-threaded superconducting quantum interference devices (ATS), wherein a given one of the mechanical linear resonators comprising three or more terminals is coupled with three or more ATSs via the respective three or more terminals.
10. A method of stabilizing coherent state superpositions (cat states) of a mechanical resonator, the method comprising: exciting phonons in the mechanical resonator by driving a storage mode of the mechanical resonator; and dissipating phonons from the mechanical resonator via an open transmission line coupled to the control circuit configured to absorb photons from a dump mode of the control circuit.
11. The method of claim 10, wherein the phonons are excited in the mechanical resonator and dissipated from the mechanical resonator in pairs comprising two phonons.
12. The method of claim 11, wherein the excitation and dissipation of the phonon pairs is induced via a non-linear interaction between the storage mode of the mechanical resonator and the dump mode of the control circuit, wherein a square of the storage mode of the mechanical resonator is coupled to the dump mode of the control circuit via a two-phonon coupling rate (g2), and wherein a decay rate at which photons are absorbed via the open transmission line is approximately ten times or greater than the coupling rate (g2).
13. The method of claim 11 or claim 12, wherein the control circuit comprises an asymmetrically-threaded superconducting quantum interference device (ATS) coupled with the mechanical resonator, wherein the ATS is configured to cause the two-phonon pairs to be excited in the mechanical resonator.
14. The method of claim 13, further comprising: causing phonons to be excited in one or more additional mechanical resonators by driving respective storage modes of the one or more additional mechanical resonators; and dissipating phonons from the one or more additional mechanical resonators via the open transmission line configured to absorb the photons from the dump mode of the control circuit, wherein the single ATS is used to cause the phonons to be excited in the mechanical resonator and the one or more additional mechanical resonators.
15. The method of claim 14, wherein the storage modes of the respective mechanical resonators are detuned.
PCT/US2021/058293 2020-11-13 2021-11-05 Fault-tolerant quantum hardware using hybrid acoustic-electrical qubits WO2022103666A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP21815834.3A EP4244778A1 (en) 2020-11-13 2021-11-05 Fault-tolerant quantum hardware using hybrid acoustic-electrical qubits
CN202180076347.2A CN116547679A (en) 2020-11-13 2021-11-05 Fault tolerant quantum hardware using mixed acousto-electric qubits

Applications Claiming Priority (10)

Application Number Priority Date Filing Date Title
US17/098,240 US11741279B2 (en) 2020-11-13 2020-11-13 Toffoli gate distillation from Toffoli magic states
US17/098,240 2020-11-13
US17/098,232 2020-11-13
US17/098,245 2020-11-13
US17/098,237 2020-11-13
US17/098,248 US12093785B2 (en) 2020-11-13 2020-11-13 High-fidelity measurement of bosonic modes
US17/098,232 US11321627B1 (en) 2020-11-13 2020-11-13 Fault-tolerant quantum hardware using hybrid acoustic-electrical qubits
US17/098,237 US11468219B2 (en) 2020-11-13 2020-11-13 Toffoli gate preparation for a quantum hardware system comprising hybrid acoustic-electrical qubits
US17/098,245 US11436398B2 (en) 2020-11-13 2020-11-13 Simulating large cat qubits using a shifted fock basis
US17/098,248 2020-11-13

Publications (2)

Publication Number Publication Date
WO2022103666A1 true WO2022103666A1 (en) 2022-05-19
WO2022103666A9 WO2022103666A9 (en) 2023-02-02

Family

ID=78806730

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2021/058293 WO2022103666A1 (en) 2020-11-13 2021-11-05 Fault-tolerant quantum hardware using hybrid acoustic-electrical qubits

Country Status (2)

Country Link
EP (1) EP4244778A1 (en)
WO (1) WO2022103666A1 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220156441A1 (en) * 2020-11-13 2022-05-19 Amazon Technologies, Inc. Toffoli gate distillation from toffoli magic states
WO2022251913A1 (en) * 2021-06-04 2022-12-08 University Of Technology, Sydney Non-clifford quantum gates
EP4383139A1 (en) * 2022-12-07 2024-06-12 Alice & Bob Superconducting quantum circuit for bosonic codes with galvanic coupling

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
J\'ER\'EMIE GUILLAUD ET AL: "Repetition cat-qubits: fault-tolerant quantum computation with highly reduced overhead", ARXIV.ORG, CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 20 April 2019 (2019-04-20), XP081450162 *
MAREK PECHAL ET AL: "Superconducting circuit quantum computing with nanomechanical resonators as storage", ARXIV.ORG, CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 24 August 2018 (2018-08-24), XP081101763 *

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220156441A1 (en) * 2020-11-13 2022-05-19 Amazon Technologies, Inc. Toffoli gate distillation from toffoli magic states
US11741279B2 (en) * 2020-11-13 2023-08-29 Amazon Technologies, Inc. Toffoli gate distillation from Toffoli magic states
WO2022251913A1 (en) * 2021-06-04 2022-12-08 University Of Technology, Sydney Non-clifford quantum gates
EP4383139A1 (en) * 2022-12-07 2024-06-12 Alice & Bob Superconducting quantum circuit for bosonic codes with galvanic coupling
WO2024121273A1 (en) * 2022-12-07 2024-06-13 Alice & Bob Superconducting quantum circuit for bosonic codes with galvanic coupling

Also Published As

Publication number Publication date
EP4244778A1 (en) 2023-09-20
WO2022103666A9 (en) 2023-02-02

Similar Documents

Publication Publication Date Title
US11321627B1 (en) Fault-tolerant quantum hardware using hybrid acoustic-electrical qubits
US11436398B2 (en) Simulating large cat qubits using a shifted fock basis
US12093785B2 (en) High-fidelity measurement of bosonic modes
US11468219B2 (en) Toffoli gate preparation for a quantum hardware system comprising hybrid acoustic-electrical qubits
Chamberland et al. Building a fault-tolerant quantum computer using concatenated cat codes
US11741279B2 (en) Toffoli gate distillation from Toffoli magic states
WO2022103666A1 (en) Fault-tolerant quantum hardware using hybrid acoustic-electrical qubits
US20230267354A1 (en) Measurement based uncomputation for quantum circuit optimization
Devitt et al. Quantum error correction for beginners
Cross et al. A comparative code study for quantum fault-tolerance
US11941483B2 (en) Cross-talk reduction in fault tolerant quantum computing system
Shee et al. Qubit-efficient encoding scheme for quantum simulations of electronic structure
Bohdanowicz et al. Good approximate quantum LDPC codes from spacetime circuit Hamiltonians
Nezami et al. Classification of small triorthogonal codes
Omanakuttan et al. Fault-Tolerant Quantum Computation Using Large Spin-Cat Codes
Darmawan et al. Low-depth random Clifford circuits for quantum coding against Pauli noise using a tensor-network decoder
US20230186132A1 (en) CONTROL CIRCUIT COMPRISING SYMMETRIC ASYMMETRIC THREADED SUPERCONDUCTING QUANTUM INTERFERENCE DEVICES (SYMMETRIC ATSs)
Suchara et al. Estimating the resources for quantum computation with the QuRE Toolbox
US11983601B2 (en) Hybrid bacon-shor surface codes in a concatenated cat-qubit architecture
US11900221B1 (en) Error correction decoding techniques for lattice surgery
Chien et al. Simulating quantum error mitigation in fermionic encodings
Nickerson Practical fault-tolerant quantum computing
Novais et al. Hamiltonian formulation of quantum error correction and correlated noise: Effects of syndrome extraction in the long-time limit
Boykin et al. Algorithms on ensemble quantum computers
Prabhu et al. New magic state distillation factories optimized by temporally encoded lattice surgery

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 21815834

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 202180076347.2

Country of ref document: CN

NENP Non-entry into the national phase

Ref country code: DE

ENP Entry into the national phase

Ref document number: 2021815834

Country of ref document: EP

Effective date: 20230613