WO2022078001A1 - 静态规则的管理方法、装置、电子设备和存储介质 - Google Patents

静态规则的管理方法、装置、电子设备和存储介质 Download PDF

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Publication number
WO2022078001A1
WO2022078001A1 PCT/CN2021/108832 CN2021108832W WO2022078001A1 WO 2022078001 A1 WO2022078001 A1 WO 2022078001A1 CN 2021108832 W CN2021108832 W CN 2021108832W WO 2022078001 A1 WO2022078001 A1 WO 2022078001A1
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rule
static
current static
current
static rule
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PCT/CN2021/108832
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English (en)
French (fr)
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暴宇
谢永恒
万月亮
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北京锐安科技有限公司
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Publication of WO2022078001A1 publication Critical patent/WO2022078001A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/22—Parsing or analysis of headers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/03—Protocol definition or specification 

Definitions

  • the embodiments of the present application relate to digital communication technologies, for example, to a static rule management method, apparatus, electronic device, and storage medium.
  • Static rules refer to quintuple rules.
  • the source ip address, destination ip address, source port number, destination port number and protocol type in network data packets are called quintuple, using sip, dip, sp, dp, protocol respectively.
  • Rules refer to the processing method of network data packets. According to different user requirements, static rules should be prioritized. Different static rules correspond to different users and policies, so as to realize network data forwarding.
  • the embodiments of the present application provide a method, apparatus, electronic device, and storage medium for managing static rules, so as to implement efficient management of static rules.
  • an embodiment of the present application provides a static rule management method, which is applied to a digital integrated circuit chip, and the method includes:
  • corresponding management is performed on the static rule corresponding to the operation command in the memory.
  • an embodiment of the present application also provides a static rule management device, which is arranged in a digital integrated circuit chip, including:
  • the operation command receiving module is set to receive the operation commands of the batch static rules to be managed
  • an operation command parsing module configured to parse the operation command and determine the command type of the operation command
  • the management module is configured to perform corresponding management on the static rules corresponding to the operation commands in the memory based on the command types and preset management rules corresponding to the command types.
  • an embodiment of the present application also provides an electronic device, the electronic device comprising:
  • processors one or more processors
  • storage means arranged to store one or more programs
  • the one or more processors When the one or more programs are executed by the one or more processors, the one or more processors implement the static rule management method described in any of the embodiments of this application.
  • the embodiments of the present application further provide a storage medium containing computer-executable instructions, where the computer-executable instructions, when executed by a computer processor, are configured to execute any of the static rules described in the embodiments of the present application management method.
  • FIG. 1 is a flowchart of a method for managing static rules provided by an embodiment of the present application
  • FIG. 2 is a schematic diagram of execution of a method for managing static rules provided by another embodiment of the present application.
  • Fig. 3 is the management method of the static rule in the related art
  • FIG. 4 is a flowchart of a method for managing static rules provided by another embodiment of the present application.
  • FIG. 5 is an execution flowchart of a static rule management method provided by another embodiment of the present application.
  • FIG. 6 is a schematic structural diagram of an apparatus for managing static rules provided by an embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of an electronic device provided by an embodiment of the present application.
  • the quintuple is a communication term and usually refers to the source Internet Protocol (IP) address, source port, destination IP address, destination port and transport layer. protocol.
  • IP Internet Protocol
  • 192.168.1.1 10000 TCP 121.14.88.76 80 which constitutes a quintuple.
  • TCP Transmission Control Protocol
  • a terminal with an IP address of 192.168.1.1 uses the Transmission Control Protocol (TCP) to connect to a terminal with an IP address of 121.14.88.76 and a port of 80 through port 10000.
  • TCP Transmission Control Protocol
  • FIG. 1 is a flow chart of a method for managing static rules provided by an embodiment of the application. This embodiment is applicable to the situation of managing batches of static rules.
  • the method is applied to a digital integrated circuit chip (Field Programmable Gate Array, FPGA). ), can be executed by the management device of the static rule, the management device of the static rule can be realized by software and/or hardware, the management device of the static rule can be configured on the electronic computing equipment, including the following steps:
  • the operation command may be a command for managing a batch of static rules to be managed.
  • the operation command here can be sent by the host.
  • it can be sent by the Host_fc module in the host.
  • the command type of the operation command may be a type that manages batch static rules, for example, may be reading static rules from memory, writing static rules into memory, or erasing static rules in memory.
  • the batch of operation commands After receiving the batch of operation commands, the batch of operation commands is parsed, and the type of the operation command can be obtained, for example, the operation command can be parsed through the Fc_rule_op_prep_nz module.
  • the content of the static rule corresponding to the operation command may also be preprocessed, for example, the format of the content of the static rule may be converted into a data format that can be processed by the FPGA.
  • the corresponding hash address of the operation command may also be calculated according to the command type of the operation command. For example, calculating the hash address according to the command type belongs to the related art, which will not be repeated here.
  • the analyzing the operation command to determine the command type of the operation command may be: analyzing the operation command, and determining the command type of the operation command based on the rule type of the static rule in the parsed operation command.
  • the rule type of the static rule may be the type of the static rule, for example, may be write, read or erase.
  • the rule type of the static rule can be obtained, and according to the rule type of each static rule, the command type of the operation command can be determined.
  • the preset management rule may be a preset management rule, or may be a management rule set by the user according to different command types.
  • rule identity (Identity, ID) table There are two tables in the memory, one is a rule identity (Identity, ID) table, the other is a rule hash table, the rule ID table is used for software management, and the rule hash table is used for business search.
  • the rule hash table is obtained by calculating the hash address according to the five-tuple. Therefore, for the same command type, two different static rules may have the same hash address.
  • a rule ID table corresponds to a static rule
  • the content in a rule hash table may be for multiple rule ID tables, that is, the hash address in the rule hash table corresponds to multiple different rules.
  • static rules after calculating the hash addresses of multiple different static rules, the obtained hash addresses are consistent, so they are stored in a rule hash table.
  • each rule ID table has a flag bit, which may be an identifier indicating whether the rule ID table is valid. For example, if the value on the flag bit of a rule ID table is "1", it means that the rule ID table is valid, and that the rule ID table is valid means that there is a static code corresponding to the rule ID table in the memory. Rule; if the value on the flag bit of the rule ID table is "0”, it means that the rule ID table is invalid, and the rule ID table is invalid, it means that there is no static rule corresponding to the rule ID table in the memory .
  • each rule hash table also has a flag bit. If there are multiple user rules stored in the rule hash table (that is, the rule hash table corresponds to multiple static rules), if one of the user rules If it is valid, the flag bit of the rule hash table is valid, and if all user rules in the rule hash table are invalid, the flag bit of the rule hash table is invalid.
  • the static rules corresponding to the operation commands in the memory can be managed correspondingly. For example, if the command type is to read a static rule in the memory, the static rule is read from the memory according to the command type and the preset management rule corresponding to the command type.
  • the corresponding static rules in the memory can be processed in batches by receiving batches of operation commands of the static rules to be managed.
  • Management that is, after receiving the operation commands of the static rules in batches, the operation commands are first stored in the FPGA internal random access memory (Random Access Memory, RAM), and then written into the memory uniformly, and the rules in the memory are read first.
  • Out to the internal first-in first-out queue (First Input First Output, FIFO) and then read by the master.
  • the number of rules that support the operation command each time is determined by the evaluation of the resources of the programmable logic device.
  • each operation command needs to access the memory independently.
  • the technical solution of the embodiment of the present application can obtain batches of operation commands sent by the master. This improves the efficiency of static rule management operations, and realizes memory management for large-scale rule policy requirements on the existing network.
  • the technical solution of the embodiment of the present application is to receive the operation commands of the batch static rules to be managed, parse the operation commands, determine the command type of the operation command, and based on the command type and the preset management rule corresponding to the command type, the memory
  • the static rules corresponding to the operation commands are managed correspondingly, so that the operation commands sent by the master can be processed in batches, which improves the efficiency of static rule management operations, and manages the memory required by large-scale rules and policies on the existing network.
  • FIG. 4 is a flowchart of a method for managing static rules provided by another embodiment of the present application, and the embodiment of the present application may be combined with multiple exemplary solutions in the above-mentioned embodiments.
  • the operation command includes: the rule ID of the static rule and the quintuple in the static rule; after parsing the operation command and determining the command type of the operation command, the method further includes: Based on the rule ID of the static rule, the rule ID table of the static rule is determined; based on the rule ID of the static rule and the quintuple in the static rule, the rule hash table of the static rule is determined.
  • the method of the embodiment of the present application includes the following steps:
  • the operation command corresponding to the multiple static rules includes the rule ID of the static rule, where the rule ID is an identifier used to distinguish the multiple static rules.
  • the rule ID is used for self-setting, for example, multiple static rules may be marked as serial numbers 1, 2, 3, ..., respectively, so as to distinguish multiple static rules.
  • a corresponding rule ID table can be set for each static rule, and each rule ID table corresponds to a static rule.
  • the operation commands corresponding to the multiple static rules also include quintuple information of the static rules.
  • the hash address of each static rule can be calculated, and a rule hash table can be constructed according to the hash address of each static rule.
  • the root calculation of the hash address of the static rule is a related technology, which will not be described in detail here.
  • the static rule corresponding to the operation command in the memory is corresponding Management can be: based on the operation of reading the current static rules in the memory, determine whether the rule ID table corresponding to the current static rule in the memory is valid; if valid, return the content in the rule ID table corresponding to the current static rule ; If invalid, return invalid information, wherein the invalid information is used to indicate that the rule ID table corresponding to the current static rule is invalid.
  • a static rule current static rule
  • the static rule corresponding to the operation command in the memory is corresponding Management can be: based on the operation of erasing the current static rules in the memory, determine whether the rule ID table of the current static rule in the memory is valid; if the rule ID table of the current static rule is valid, then obtain the current static rule corresponding to the For the policy of the current static rule in the rule hash table, invalidate the policy of the current static rule in the rule hash table corresponding to the current static rule, and invalidate the rule ID table corresponding to the current static rule; if the rule ID of the current static rule If the table is invalid, return invalid information, wherein the invalid information is used to indicate that the current static rule is invalid in the rule ID table.
  • a static rule current static rule
  • the policy of the current static rule in the current static rule invalidate (ie erase) the policy of the current static rule in the rule hash table corresponding to the current static rule, and invalidate the rule ID table corresponding to the current static rule. If the rule ID table of the current static rule is invalid, invalid information is returned.
  • the rule ID table of the current static rule is valid, the policy of the current static rule in the rule hash table corresponding to the current static rule is obtained, and the policy of the current static rule in the rule hash table corresponding to the current static rule is obtained. If there are static rules of multiple users in the rule hash table corresponding to the current static rule, it can be determined whether the policies corresponding to the static rules of other users in the current rule hash table are valid. If the policy corresponding to the static rule is valid, the policy corresponding to the static rule of the current user is invalid; if the policies corresponding to the static rules of other users are invalid, the entire rule hash table can be invalidated directly.
  • the static rule corresponding to the operation command in the memory is corresponding Management can be: based on the operation of writing the current static rules in the memory, judge whether the rule ID table of the current static rules in the memory is valid; if the current static rules are valid in the rule ID table, then the current static rules The content of the original current static rule in the rule ID table of the current static rule is erased, and the new current static rule is rewritten into the rule ID table of the current static rule; if the rule ID table of the current static rule is invalid, the current static rule is obtained.
  • the hash address corresponding to the rule determines whether the policy of the current static rule in the rule hash table corresponding to the current static rule is valid. If it is valid, the rule ID of the current static rule is obtained, and the original The content of the current static rule is erased, and the new current static rule is rewritten into the rule ID table of the current static rule and the rule hash table of the current static rule. If it is invalid, the current static rule is written into the rule hash. table and rule ID table.
  • a static rule current static rule
  • the content of the original current static rule in the rule ID table of the rule is erased, and the new current static rule is rewritten into the rule ID table.
  • rule ID table corresponding to the current static rule If the rule ID table corresponding to the current static rule is invalid, obtain the hash address corresponding to the current static rule, and judge whether the policy corresponding to the current static rule in the rule hash table of the current static rule is valid. If the policy of the current static rule is valid, then Erase the policy of the current static rule, obtain the rule ID of the current static rule, and rewrite the new current static rule into the rule ID table and rule hash table of the current static rule. If the policy of the current static rule is invalid, the current static rule can be directly written into the rule hash table and rule ID table corresponding to the current static rule.
  • the corresponding static rules in the memory are managed in batches by receiving the operation commands of the static rules to be managed in batches.
  • each operation command needs to access the memory independently.
  • the technical solution of the embodiment of the present application can process the operation commands sent by the master in batches, which improves the static Efficiency of rule management operations, managing the memory required by large-scale rules and policies on the existing network.
  • the rule ID table of the static rule is determined based on the rule ID of the static rule; based on the rule ID of the static rule and the quintuple in the static rule, the rule hash table of the static rule is determined, so that The rule ID table and rule hash table of each static rule, so that each static rule can be managed correspondingly according to the operation command of each static rule.
  • the embodiments of the present application may be combined with multiple exemplary solutions in the above-mentioned embodiments.
  • the corresponding rule hash table is found according to the calculated hash address, which refers to the rule hash table that completely matches the quintuple in the static rule. Because there is a hash address conflict in the rule configuration, that is, the hash addresses calculated by the five-tuple in multiple static rules are the same, so there will be a conflict when obtaining the hash address, and the conflicting rule configuration will form Hash chain, when the hash chain is formed, it is not known which static rule the hash address at the node corresponds to. Therefore, this conflict is avoided in the following manner.
  • the command type is to erase a static rule
  • set the pointer at the hash address of the current static rule in the rule hash table Move to the previous hash address of the hash address of the current static rule, that is, move the pointer from the current node to the next node.
  • the implementation of the above pointer movement is that the pointer will move only when the entire rule hash table corresponding to the current static rule is invalid, and the hash chain formed by the current static rule is not a single node and has only one node. There is only one node in the chain, so after erasing the node, there is no need to move the pointer.
  • command type is to write a static rule
  • a new pointer is obtained to write the next static rule into the memory .
  • a new pointer is obtained to write the next static rule.
  • the pointer is used to accurately find the static rules to be managed.
  • the static rules to be managed are accurately found by means of pointers, so as to avoid the chaotic situation of static rule management.
  • FIG. 6 is a schematic structural diagram of an apparatus for managing static rules according to an embodiment of the present application. As shown in FIG. 6 , the apparatus includes an operation command receiving module 31 , an operation command parsing module 32 and a management module 33 .
  • the operation command receiving module 31 is configured to receive the operation commands of the batch static rules to be managed;
  • the operation command parsing module 32 is configured to analyze the operation commands and determine the command type of the operation commands;
  • the management module 33 It is set to perform corresponding management on the static rules corresponding to the operation commands in the memory based on the command types and the preset management rules corresponding to the command types.
  • the operation command includes: the rule type of the static rule.
  • the operation command parsing module 32 is configured to: parse the operation command, and determine the operation command based on the rule type of the static rule in the parsed operation command. command type.
  • the operation command includes: a rule ID of the static rule and a quintuple in the static rule.
  • the apparatus further includes: a rule ID table determination module, configured to determine the rule ID table of the static rule based on the rule ID of the static rule; a rule hash table determination module, It is set to determine the rule hash table of the static rule based on the rule ID of the static rule and the quintuple in the static rule.
  • a rule ID table determination module configured to determine the rule ID table of the static rule based on the rule ID of the static rule
  • a rule hash table determination module It is set to determine the rule hash table of the static rule based on the rule ID of the static rule and the quintuple in the static rule.
  • the management module 33 is set to: for any current static rule, based on the operation of reading the current static rule in the memory, determine Whether the rule ID table corresponding to the current static rule in the memory is valid; if valid, return the content in the rule ID table corresponding to the current static rule; if invalid, return invalid information, wherein, the invalid information uses Indicates that the rule ID table corresponding to the current static rule is invalid.
  • the management module 33 is set to: for any current static rule, based on the operation of erasing the current static rule in the memory, determine the Whether the rule ID table of the current static rule is valid; if the rule ID table of the current static rule is valid, then obtain the policy of the current static rule in the rule hash table corresponding to the current static rule, and use Invalidate the policy of the current static rule in the rule hash table corresponding to the current static rule, and invalidate the rule ID table corresponding to the current static rule; if the rule ID table of the current static rule is invalid , then return invalid information, wherein the invalid information is used to indicate that the rule ID table of the current static rule is invalid.
  • the management module 33 is set to: for any current static rule, based on the operation of writing the current static rule in the memory, determine Whether the rule ID table of the current static rule in the memory is valid; if the rule ID table of the current static rule is valid, then the content of the original current static rule in the rule ID table of the current static rule is erased , and rewrite the new current static rule into the rule ID table of the current static rule; if the rule ID table of the current static rule is invalid, then obtain the hash address corresponding to the current static rule, and judge the Whether the policy of the current static rule in the rule hash table corresponding to the current static rule is valid, if valid, obtain the rule ID of the current static rule, and convert the original static rule in the rule ID table of the current static rule The content of the current static rule is erased, and the new current static rule is rewritten into the rule ID table of the current static rule and the rule hash table of the current static rule, if invalid, the
  • the apparatus further includes: a first pointer moving module, configured to: when the command type is an operation of erasing the static rules, when the rules in the memory are erased After the policy of the current static rule in the hash table is invalidated, move the pointer at the hash address of the current static rule in the rule hash table to the previous hash address of the current static rule. Hi address.
  • the second pointer moving module is configured to obtain a new static rule after writing the current static rule into the rule ID table and rule hash table in the memory when the command type is an operation of writing the static rule. pointer to write the next static rule to memory.
  • the static rule management apparatus provided by the embodiment of the present application can execute the static rule management method provided by any embodiment of the present application, and has functional modules and beneficial effects corresponding to the execution method.
  • FIG. 7 is a schematic structural diagram of an electronic device according to an embodiment of the application.
  • the electronic device includes a processor 70, a memory 71, an input device 72, and an output device 73;
  • the number can be one or more, and one processor 70 is taken as an example in FIG. 7 ; the processor 70, memory 71, input device 72 and output device 73 in the electronic device can be connected by a bus or in other ways. Take bus connection as an example.
  • the memory 71 can be configured to store software programs, computer-executable programs, and modules, such as program instructions/modules (for example, an operation command receiving module) corresponding to the static rule management method in the embodiment of the present application. 31. Operation command parsing module 32 and management module 33).
  • the processor 70 executes various functional applications and data processing of the electronic device by running the software programs, instructions and modules stored in the memory 71 , that is, to implement the above-mentioned static rule management method.
  • the memory 71 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created according to the use of the terminal, and the like.
  • the memory 71 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid-state storage device.
  • memory 71 may include memory located remotely from processor 70, which may be connected to the electronic device through a network. Examples of such networks include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.
  • the input device 72 may be configured to receive input numerical or character information, and to generate key signal input related to user settings and function control of the electronic device.
  • the output device 73 may include a display device such as a display screen.
  • An embodiment of the present application further provides a storage medium containing computer-executable instructions, where the computer-executable instructions are configured to execute a static rule management method when executed by a computer processor.
  • a storage medium containing computer-executable instructions provided by the embodiments of the present application, the computer-executable instructions of which are not limited to the above-mentioned method operations, and can also execute the static rule management method provided by any embodiment of the present application. related operations in .
  • the present application can be implemented by means of software and necessary general-purpose hardware, and certainly can also be implemented by hardware.
  • the technical solutions of the present application can be embodied in the form of software products in essence or the parts that make contributions to related technologies, and the computer software products can be stored in a computer-readable storage medium, such as a computer floppy disk, Read-Only Memory (ROM), Random Access Memory (RAM), Flash Memory (FLASH), hard disk or optical disk, etc., including several instructions for making a computer electronic device (which may be a personal computer) , server, or network device, etc.) to execute the methods described in the various embodiments of the present application.
  • ROM Read-Only Memory
  • RAM Random Access Memory
  • FLASH Flash Memory
  • the multiple units and modules included are only divided according to functional logic, but are not limited to the above-mentioned division, as long as the corresponding functions can be realized;
  • the specific names of the multiple functional units are only for the convenience of distinguishing from each other, and are not used to limit the protection scope of the present application.

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Abstract

本申请实施例公开了一种静态规则的管理方法、装置、电子设备和存储介质。所述方法包括：接收待管理的批量静态规则的操作命令；对所述操作命令进行解析，确定所述操作命令的命令类型；基于所述命令类型，以及与所述命令类型对应的预设管理规则，对内存中的与所述操作命令对应的静态规则进行对应管理。

Description

静态规则的管理方法、装置、电子设备和存储介质
本申请要求在2020年10月16日提交中国专利局、申请号为202011110922.X的中国专利申请的优先权，该申请的全部内容通过引用结合在本申请中。
技术领域
本申请实施例涉及数字通信技术，例如涉及一种静态规则的管理方法、装置、电子设备和存储介质。
背景技术
静态规则指的是五元组规则，网络数据包中的源ip地址、目的ip地址、源端口号、目的端口号和协议类型称为五元组，分别使用sip、dip、sp、dp、protocol表示。规则是指网络数据包的处理方式，依据不同的用户需求，静态规则要区分优先级，不同的静态规则对应不同的用户和策略，从而实现网路数据的转发。
相关技术中，对静态规则的管理，例如，实现静态规则的写入、读出及擦除功能，都是逐条规则去处理，但是这样的方式对于少量的静态规则可以使用，在实际应用时，静态规则的数量在百万以上，对如此大量的静态规则进行内存管理，则管理效率低下，降低系统的灵活性。
发明内容
本申请实施例提供一种静态规则的管理方法、装置、电子设备和存储介质，以实现对静态规则进行高效管理。
第一方面，本申请实施例提供了一种静态规则的管理方法，应用于数字集成电路芯片，该方法包括：
接收待管理的批量静态规则的操作命令；
对所述操作命令进行解析，确定所述操作命令的命令类型；
基于所述命令类型，以及与所述命令类型对应的预设管理规则，对内存中的与所述操作命令对应的静态规则进行对应管理。
第二方面，本申请实施例还提供了一种静态规则的管理装置，该装置设置 于数字集成电路芯片中，包括：
操作命令接收模块，设置为接收待管理的批量静态规则的操作命令；
操作命令解析模块，设置为对所述操作命令进行解析，确定所述操作命令的命令类型；
管理模块，设置为基于所述命令类型，以及与所述命令类型对应的预设管理规则，对内存中的与所述操作命令对应的静态规则进行对应管理。
第三方面，本申请实施例还提供了一种电子设备，该电子设备包括：
一个或多个处理器；
存储装置，设置为存储一个或多个程序；
当所述一个或多个程序被所述一个或多个处理器执行，使得所述一个或多个处理器实现本申请实施例中任一所述的静态规则的管理方法。
第四方面，本申请实施例还提供了一种包含计算机可执行指令的存储介质，所述计算机可执行指令在由计算机处理器执行时设置为执行本申请实施例中任一所述的静态规则的管理方法。
附图说明
图1是本申请一实施例提供的静态规则的管理方法的流程图；
图2是本申请另一实施例提供的静态规则的管理方法的执行示意图；
图3是相关技术中的静态规则的管理方法；
图4是本申请另一实施例提供的静态规则的管理方法的流程图；
图5是本申请另一实施例提供的静态规则的管理方法的执行流程图；
图6是本申请一实施例提供的静态规则的管理装置的结构示意图；
图7是本申请一实施例提供的一种电子设备的结构示意图。
具体实施方式
下面结合附图和实施例对本申请作进一步的详细说明。可以理解的是，此处所描述的具体实施例仅仅用于解释本申请，而非对本申请的限定。另外还需要说明的是，为了便于描述，附图中仅示出了与本申请相关的部分而非全部结构。
在介绍本申请实施例的技术方案之前，首先介绍一下五元组，五元组是通信术语，通常指源互联网协议(Internet Protocol，IP)地址，源端口，目的IP 地址，目的端口和传输层协议。例如：192.168.1.1 10000 TCP 121.14.88.76 80，就构成了一个五元组。其意义是，一个IP地址为192.168.1.1的终端通过端口10000，利用传输控制协议(Transmission Control Protocol，TCP)，和IP地址为121.14.88.76，端口为80的终端进行连接。
图1为本申请一实施例提供的静态规则的管理方法的流程图，本实施例可适用于对批量的静态规则进行管理的情况，该方法应用于数字集成电路芯片(Field Programmable Gate Array，FPGA)上，可以由静态规则的管理装置来执行，该静态规则的管理装置可以由软件和/或硬件来实现，该静态规则的管理装置可以配置在电子计算设备上，包括如下步骤：
S110、接收待管理的批量静态规则的操作命令。
示例性的，操作命令可以是对待管理的批量静态规则进行管理的命令。
需要说明的是，这里的操作命令可以是由主机发送的。例如可以是由主机中的Host_fc模块来发送的。
S120、对操作命令进行解析，确定操作命令的命令类型。
示例性的，操作命令的命令类型可以是对批量静态规则进行管理的类型，例如，可以是从内存中读取静态规则、将静态规则写入内存或擦除内存中的静态规则。
接收到批量的操作命令后，对批量的操作命令进行解析，可得到操作命令的类型，例如可以是通过Fc_rule_op_prep_nz模块对操作命令进行解析。
需要说明的是，在对操作命令进行解析时，还可以对操作命令所对应的静态规则的内容进行预处理，例如可以是将静态规则的内容的格式转换为FPGA可处理的数据格式。还可以根据操作命令的命令类型计算其对应的哈希地址，例如根据命令类型计算哈希地址属于相关技术，这里不再赘述。
例如，在操作命令中包括：静态规则的规则类型。
所述对操作命令进行解析，确定操作命令的命令类型，可以是：对操作命令进行解析，基于解析出的操作命令中的静态规则的规则类型，确定操作命令的命令类型。
示例性的，静态规则的规则类型可以是静态规则的类型，例如，可以是写入、读取或擦除。
根据对操作命令的解析，可得到静态规则的规则类型，根据每个静态规则的规则类型，即可确定操作命令的命令类型。
S130、基于命令类型，以及与命令类型对应的预设管理规则，对内存中的与操作命令对应的静态规则进行对应管理。
示例性的，预设管理规则可以是预先设置的管理规则，可以是根据不同的命令类型，用户自行设定的管理规则。
在内存中具有两张表，一张是规则身份标识(Identity，ID)表，一张是规则哈希表，规则ID表用于软件管理使用，规则哈希表用于业务查找使用。其中，规则哈希表是根据五元组进行哈希地址的计算得到的，因此，针对同一命令类型，可能两个不同的静态规则会有相同的哈希地址。需要说明的是，一张规则ID表对应一条静态规则，一张规则哈希表中的内容可能针对多个规则ID表，即在该张规则哈希表中的哈希地址对应多个不同的静态规则，多个不同的静态规则经哈希地址计算后，得到的哈希地址是一致的，因此，存储在一张规则哈希表上。
需要说明的是，每个规则ID表中均有一个标志位，可以是一个表示该规则ID表是否有效的标识。例如，可以是若某一规则ID表的标志位上的数值为“1”，则表示该张规则ID表有效，该张规则ID表有效则表示在内存中具有与该规则ID表对应的静态规则；若该张规则ID表的标志位上的数值为“0”，则表示该张规则ID表无效，该张规则ID表无效则表示在内存中不具有与该规则ID表对应的静态规则。
同样的，每个规则哈希表中也均有一个标志位，若该规则哈希表中存储有多个用户规则(即该规则哈希表对应多个静态规则)，则若其中一个用户规则有效则该规则哈希表的标志位为有效，该规则哈希表中的所有用户规则均无效则该规则哈希表的标志位无效。
根据确定的命令类型，以及与该命令类型对应的预设管理规则，可对内存中的与操作命令对应的静态规则进行对应管理。例如，命令类型为读取内存中的一个静态规则，则根据该命令类型，以及与该命令类型对应的预设管理规则，从内存中将该静态规则进行读取。
本申请实施例的技术方案，参考图2所述的本申请的静态规则的管理方法的执行示意图，可通过接收批量的待管理的静态规则的操作命令，来批量对内存中对应的静态规则进行管理，即接收到批量的静态规则的操作命令后，采用先将操作命令存入FPGA内部随机存取存储器(Random Access Memory，RAM)，然后统一写入内存的方式，以及先将内存中规则读出到内部先进先出队列(First  Input First Output，FIFO)再由主控读取的方式。每次支持操作命令的规则数目多少，由可编程逻辑器件资源情况评估而定。这样相比图3所述的相关技术中的静态规则的管理方法的执行示意图中每次操作命令都要独立的访问内存，本申请实施例的技术方案，可对主控发送的操作命令得到批量处理，提高了静态规则的管理操作的效率，实现了对现网大规模规则策略需求的内存管理。
需要说明的是，在接收到批量的静态规则的操作命令后，将其先存储到FPGA的内部RAM中，当需对RAM中的操作命令进行修改时，可采用不同的获取方式。可以是，若要对写入RAM中的一条静态规则进行更改，则从RAM中获取到该静态规则，并对该静态规则进行擦除，然后重新写入更改后的静态规则；若要读取一条静态规则，则访问的是FIFO中的静态规则，这是由于在RAM中可对其内部的内容进行修改，而在FIFO中不可对其进行修改。
本申请实施例的技术方案，通过接收待管理的批量静态规则的操作命令，对操作命令进行解析，确定操作命令的命令类型，基于命令类型，以及与命令类型对应的预设管理规则，对内存中的与操作命令对应的静态规则进行对应管理，这样可对主控发送的操作命令得到批量处理，提高了静态规则的管理操作的效率，对现网大规模规则策略需求的内存进行管理。
图4为本申请另一实施例提供的静态规则的管理方法的流程图，本申请实施例与上述实施例中多个示例方案可以结合。在本申请实施例中，例如，所述操作命令包括：静态规则的规则ID和静态规则中的五元组；在对操作命令进行解析，确定操作命令的命令类型之后，所述方法还包括：基于静态规则的规则ID，确定静态规则的规则ID表；基于静态规则的规则ID和静态规则中的五元组，确定静态规则的规则哈希表。
如图4所示，本申请实施例的方法包括如下步骤：
S210、接收待管理的批量静态规则的操作命令。
S220、对操作命令进行解析，确定操作命令的命令类型。
S230、基于静态规则的规则ID，确定静态规则的规则ID表。
示例性的，在多个静态规则对应的操作命令中包含该静态规则的规则ID，该规则ID是用于区分多个静态规则的标识。该规则ID是用于自行设定的，例如，可以是将多个静态规则分别标志为序号1、2、3、……，以此来区分多个静态规则。
根据多个静态规则的规则ID，可对每个静态规则设置其对应的一张规则ID 表，每张规则ID表对应于一个静态规则。
S240、基于静态规则的规则ID和静态规则中的五元组，确定静态规则的规则哈希表。
示例性的，在多个静态规则对应的操作命令中还包含该静态规则的五元组信息。根据上述确定的每个静态规则的规则ID，以及静态规则的五元组，可计算每个静态规则的哈希地址，根据每个静态规则的哈希地址构建规则哈希表。根计算静态规则的哈希地址是相关技术，这里不做详细描述。
这样确定每个静态规则的规则ID表和规则哈希表，以便后续根据每个静态规则的操作命令，来对每个静态规则进行对应管理。
S250、基于命令类型，以及与命令类型对应的预设管理规则，对内存中的与操作命令对应的静态规则进行对应管理。
例如，当所述命令类型为读取内存中的任一当前静态规则时，所述基于命令类型，以及与命令类型对应的预设管理规则，对内存中的与操作命令对应的静态规则进行对应管理，可以是：基于对内存中的当前静态规则进行读取的操作，判断内存中当前静态规则对应的规则ID表是否有效；若有效，则返回当前静态规则所对应的规则ID表中的内容；若无效，则返回无效信息，其中，无效信息用于指示当前静态规则所对应的规则ID表无效。
示例性的，当要读取内存中的一个静态规则(当前静态规则)时，首先判断内存中当前静态规则对应的规则ID表是否有效，若有效，则证明在内存中存储有该当前静态规则，则返回当前静态规则所对应的规则ID表中的内容，若内存中当前静态规则对应的规则ID表无效，则说明在内存中没有存储有该当前静态规则，则返回无效消息，这里的无效消息用于指示当前静态规则所对应的规则ID表无效，即在内存中不存在该当前静态规则的内容。
例如，当所述命令类型为擦除内存中的任一当前静态规则时，所述基于命令类型，以及与命令类型对应的预设管理规则，对内存中的与操作命令对应的静态规则进行对应管理，可以是：基于对内存中的当前静态规则进行擦除的操作，判断内存中当前静态规则的规则ID表中是否有效；若当前静态规则的规则ID表有效，则获取当前静态规则对应的规则哈希表中当前静态规则的策略，将当前静态规则对应的规则哈希表中当前静态规则的策略置无效，并将当前静态规则对应的规则ID表置无效；若当前静态规则的规则ID表无效，则返回无效信息，其中，无效信息用于指示当前静态规则的规则ID表中无效。
示例性的，当要擦除内存中的一个静态规则(当前静态规则)时，首先判断内存中当前静态规则对应的规则ID表是否有效，若有效，则获取当前静态规则对应的规则哈希表中当前静态规则的策略，将当前静态规则对应的规则哈希表中当前静态规则的策略置无效(即擦除)，并将当前静态规则对应的规则ID表也置无效。若当前静态规则的规则ID表无效，则返回无效信息。
需要说明的是，若当前静态规则的规则ID表有效时，则获取当前静态规则对应的规则哈希表中当前静态规则的策略，将当前静态规则对应的规则哈希表中当前静态规则的策略置无效，可以是，若在当前静态规则对应的规则哈希表中具有多个用户的静态规则，则可以判断当前规则哈希表中其他用户的静态规则对应的策略是否有效，若其他用户的静态规则对应的策略有效，则将当前用户的静态规则对应的策略置无效；若其他用户的静态规则对应的策略均无效，则可直接将整个规则哈希表置无效。
例如，当所述命令类型为写入内存中的任一当前静态规则时，所述基于命令类型，以及与命令类型对应的预设管理规则，对内存中的与操作命令对应的静态规则进行对应管理，可以是：基于对内存中的当前所述静态规则进行写入的操作，判断内存中当前静态规则的规则ID表是否有效；若当前静态规则的规则ID表中有效，则将当前静态规则的规则ID表中的原始的当前静态规则的内容进行擦除，并重新将新的当前静态规则写入当前静态规则的规则ID表；若当前静态规则的规则ID表中无效，则获取当前静态规则对应的哈希地址，判断当前静态规则对应的规则哈希表中当前静态规则的策略是否有效，若有效，则获取当前静态规则的规则ID，将当前静态规则的规则ID表中的原始的当前静态规则的内容进行擦除，并重新将新的当前静态规则写入当前静态规则的规则ID表和当前静态规则的规则哈希表中，若无效，则将当前静态规则写入规则哈希表和规则ID表中。
示例性的，当要写入内存中一个静态规则(当前静态规则)时，首先判断内存中当前静态规则对应的规则ID表是否有效，若当前静态规则对应的规则ID表有效，则将当前静态规则的规则ID表中的原始的当前静态规则的内容进行擦除，并重新将新的当前静态规则写入规则ID表中。
若当前静态规则对应的规则ID表无效，则获取当前静态规则对应的哈希地址，判断当前静态规则的规则哈希表中当前静态规则对应的策略是否有效，若当前静态规则的策略有效，则将当前静态规则的策略擦除，同时获取当前静态 规则的规则ID，并重新将新的当前静态规则写入当前静态规则的规则ID表和规则哈希表中。若当前静态规则的策略无效，则将当前静态规则直接写入当前静态规则对应的规则哈希表和规则ID表中即可。
这样通过接收批量的待管理的静态规则的操作命令，来批量对内存中对应的静态规则进行管理，即接收到批量的静态规则的操作命令后，采用先将操作命令存入FPGA内部RAM，然后统一写入内存的方式，以及先将内存中规则读出到内部FIFO再由主控读取的方式。这样相比相关技术中的静态规则的管理方法的执行示意图中每次操作命令都要独立的访问内存，本申请实施例的技术方案，可对主控发送的操作命令得到批量处理，提高了静态规则的管理操作的效率，对现网大规模规则策略需求的内存进行管理。
本申请实施例的技术方案，通过基于静态规则的规则ID，确定静态规则的规则ID表；基于静态规则的规则ID和静态规则中的五元组，确定静态规则的规则哈希表，这样确定每个静态规则的规则ID表和规则哈希表，以便后续根据每个静态规则的操作命令，来对每个静态规则进行对应管理。
本申请实施例与上述实施例中多个示例方案可以结合。在本申请实施例中，在擦除操作和写入操作中，依据计算后的哈希地址找到对应的规则哈希表，是指与静态规则中的五元组完全匹配的规则哈希表。由于规则配置存在哈希地址冲突的情况，即多个静态规则中的五元组所计算得到的哈希地址是相同的，这样在获取哈希地址时就会存在冲突，冲突的规则配置会形成哈希链，在形成哈希链时就不知道该节点处的哈希地址对应哪个静态规则。因此，通过如下方式，来避免这种冲突。
例如，当命令类型是对静态规则进行擦除操作时，当对内存中规则哈希表中当前静态规则的策略置无效后，将规则哈希表中的当前静态规则的哈希地址处的指针移动到当前静态规则的哈希地址的前一个哈希地址处，即将指针由当前节点移动到下一节点处。
示例性的，参考图5所述的静态规则的管理方法的执行流程图，在擦除操作中，当对内存中的规则哈希表中的当前静态规则的策略置无效后，将规则哈希表中的当前静态规则的哈希地址处的指针移动到当前静态规则的哈希地址的前一哈希地址处。这样利用指针的方式，精准找到要管理的静态规则。
需要说明的是，上述指针移动的实现是在当前静态规则对应的整个规则哈希表无效，且当前静态规则所构成的哈希链不是单独的只有一个节点时，指针 才会移动，若在哈希链中只有一个节点，这将该节点擦除后，不需移动指针。
例如，当命令类型是对静态规则进行写入操作时，当将当前静态规则写入内存中的规则ID表和规则哈希表中后，获取新的指针来将下一静态规则进行写入内存。
示例性的，在写入操作中，当将当前静态规则写入内存中的规则ID表和规则哈希表中后，获取一个新的指针来将下一静态规则进行写入。这样利用指针的方式，精准找到要管理的静态规则。
需要说明的是，在图5中node0地址是指当前静态规则所对应的哈希地址；rule-id指当前静态规则的规则ID；id表对应的是规则ID表；指针node0表示当前指针；指针node1表示在当前指针的基础上，新获取的指针。
需要说明的是，上述获取新的指针是在哈希链有冲突的情况下才会实现，即在多个静态规则对应的哈希地址为同一个时，且这几个静态规则中至少两个均在哈希链中出现，即造成哈希链有冲突时才取新的指针。当获取到新的指针后，再写入下一静态规则。
本申请实施例的技术方案，在擦除和写入操作中，通过指针的方式，精准找到要管理的静态规则，避免静态规则管理的混乱的情况。
图6为本申请一实施例提供的静态规则的管理装置的结构示意图，如图6所示，该装置包括：操作命令接收模块31、操作命令解析模块32和管理模块33。
其中，操作命令接收模块31，设置为接收待管理的批量静态规则的操作命令；操作命令解析模块32，设置为对所述操作命令进行解析，确定所述操作命令的命令类型；管理模块33，设置为基于所述命令类型，以及与所述命令类型对应的预设管理规则，对内存中的与所述操作命令对应的静态规则进行对应管理。
例如，所述操作命令包括：所述静态规则的规则类型。
在上述实施例的技术方案的基础上，操作命令解析模块32设置为：对所述操作命令进行解析，基于解析出的所述操作命令中的所述静态规则的规则类型，确定所述操作命令的命令类型。
例如，所述操作命令包括：所述静态规则的规则ID和所述静态规则中的五元组。
在上述实施例的技术方案的基础上，该装置还包括：规则ID表确定模块， 设置为基于所述静态规则的规则ID，确定所述静态规则的规则ID表；规则哈希表确定模块，设置为基于所述静态规则的规则ID和所述静态规则中的五元组，确定所述静态规则的规则哈希表。
例如，当所述命令类型为对所述静态规则进行读取的操作时；管理模块33设置为：对于任一当前静态规则，基于对内存中的所述当前静态规则进行读取的操作，判断内存中所述当前静态规则对应的规则ID表是否有效；若有效，则返回所述当前静态规则所对应的规则ID表中的内容；若无效，则返回无效信息，其中，所述无效信息用于指示所述当前静态规则所对应的规则ID表无效。
例如，当所述命令类型为对所述静态规则进行擦除的操作时；管理模块33设置为：对于任一当前静态规则，基于对内存中的当前静态规则进行擦除的操作，判断内存中所述当前静态规则的规则ID表中是否有效；若所述当前静态规则的规则ID表有效，则获取所述当前静态规则对应的所述规则哈希表中所述当前静态规则的策略，将所述当前静态规则对应的规则哈希表中所述当前静态规则的策略置无效，并将所述当前静态规则对应的所述规则ID表置无效；若所述当前静态规则的规则ID表无效，则返回无效信息，其中，所述无效信息用于指示所述当前静态规则的规则ID表中无效。
例如，当所述命令类型为对所述静态规则进行写入的操作时；管理模块33设置为：对于任一当前静态规则，基于对内存中的当前所述静态规则进行写入的操作，判断内存中所述当前静态规则的规则ID表是否有效；若所述当前静态规则的规则ID表中有效，则将所述当前静态规则的规则ID表中的原始的当前静态规则的内容进行擦除，并重新将新的当前静态规则写入所述当前静态规则的规则ID表；若所述当前静态规则的规则ID表中无效，则获取所述当前静态规则对应的哈希地址，判断所述当前静态规则对应的所述规则哈希表中所述当前静态规则的策略是否有效，若有效，则获取所述当前静态规则的规则ID，将所述当前静态规则的规则ID表中的原始的当前静态规则的内容进行擦除，并重新将新的当前静态规则写入所述当前静态规则的规则ID表和所述当前静态规则的规则哈希表，若无效，则将所述当前静态规则写入所述规则哈希表和所述规则ID表中。
在上述实施例的技术方案的基础上，该装置还包括：第一指针移动模块，设置为当所述命令类型是对所述静态规则进行擦除的操作时，当对内存中所述规则哈希表中所述当前静态规则的策略置无效后，将所述规则哈希表中的所述 当前静态规则的哈希地址处的指针移动到所述当前静态规则的哈希地址的前一个哈希地址处。第二指针移动模块，设置为当所述命令类型是对所述静态规则进行写入的操作时，当将当前静态规则写入内存中的规则ID表和规则哈希表中后，获取新的指针来将下一静态规则进行写入内存。
本申请实施例所提供的静态规则的管理装置可执行本申请任意实施例所提供的静态规则的管理方法，具备执行方法相应的功能模块和有益效果。
图7为本申请一实施例提供的一种电子设备的结构示意图，如图7所示，该电子设备包括处理器70、存储器71、输入装置72和输出装置73；电子设备中处理器70的数量可以是一个或多个，图7中以一个处理器70为例；电子设备中的处理器70、存储器71、输入装置72和输出装置73可以通过总线或其他方式连接，图7中以通过总线连接为例。
存储器71作为一种计算机可读存储介质，可设置为存储软件程序、计算机可执行程序以及模块，如本申请实施例中的静态规则的管理方法对应的程序指令/模块(例如，操作命令接收模块31、操作命令解析模块32和管理模块33)。处理器70通过运行存储在存储器71中的软件程序、指令以及模块，从而执行电子设备的多种功能应用以及数据处理，即实现上述的静态规则的管理方法。
存储器71可主要包括存储程序区和存储数据区，其中，存储程序区可存储操作系统、至少一个功能所需的应用程序；存储数据区可存储根据终端的使用所创建的数据等。此外，存储器71可以包括高速随机存取存储器，还可以包括非易失性存储器，例如至少一个磁盘存储器件、闪存器件、或其他非易失性固态存储器件。在一些实例中，存储器71可包括相对于处理器70远程设置的存储器，这些远程存储器可以通过网络连接至电子设备。上述网络的实例包括但不限于互联网、企业内部网、局域网、移动通信网及其组合。
输入装置72可设置为接收输入的数字或字符信息，以及产生与电子设备的用户设置以及功能控制有关的键信号输入。输出装置73可包括显示屏等显示设备。
本申请一实施例还提供一种包含计算机可执行指令的存储介质，所述计算机可执行指令在由计算机处理器执行时设置为执行一种静态规则的管理方法。
当然,本申请实施例所提供的一种包含计算机可执行指令的存储介质,其计算机可执行指令不限于如上所述的方法操作,还可以执行本申请任意实施例所提供的静态规则的管理方法中的相关操作。
通过以上关于实施方式的描述，所属领域的技术人员可以清楚地了解到，本申请可借助软件及必需的通用硬件来实现，当然也可以通过硬件实现。基于这样的理解，本申请的技术方案本质上或者说对相关技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品可以存储在计算机可读存储介质中，如计算机的软盘、只读存储器(Read-Only Memory,ROM)、随机存取存储器(Random Access Memory,RAM)、闪存(FLASH)、硬盘或光盘等，包括若干指令用以使得一台计算机电子设备(可以是个人计算机，服务器，或者网络设备等)执行本申请多个实施例所述的方法。
值得注意的是，上述静态规则的管理装置的实施例中，所包括的多个单元和模块只是按照功能逻辑进行划分的，但并不局限于上述的划分，只要能够实现相应的功能即可；另外，多个功能单元的具体名称也只是为了便于相互区分，并不用于限制本申请的保护范围。

Claims (10)

  1. 一种静态规则的管理方法，应用于数字集成电路芯片，包括：
    接收待管理的批量静态规则的操作命令；
    对所述操作命令进行解析，确定所述操作命令的命令类型；
    基于所述命令类型，以及与所述命令类型对应的预设管理规则，对内存中的与所述操作命令对应的静态规则进行对应管理。
  2. 根据权利要求1所述的方法，其中，所述操作命令包括：所述静态规则的规则类型；
    所述对所述操作命令进行解析，确定所述操作命令的命令类型，包括：
    对所述操作命令进行解析，基于解析出的所述操作命令中的所述静态规则的规则类型，确定所述操作命令的命令类型。
  3. 根据权利要求2所述的方法，其中，所述操作命令包括：所述静态规则的规则ID和所述静态规则中的五元组；
    在对所述操作命令进行解析，确定所述操作命令的命令类型之后，所述方法还包括：
    基于所述静态规则的规则ID，确定所述静态规则的规则ID表；
    基于所述静态规则的规则ID和所述静态规则中的五元组，确定所述静态规则的规则哈希表。
  4. 根据权利要求3所述的方法，其中，所述命令类型包括：对所述静态规则进行读取的操作；
    对于任一当前静态规则，所述基于所述命令类型，以及与所述命令类型对应的预设管理规则，对内存中的与所述操作命令对应的静态规则进行对应管理，包括：
    基于对内存中的所述当前静态规则进行读取的操作，判断内存中所述当前静态规则对应的规则ID表是否有效；
    基于所述当前静态规则对应的规则ID表有效的判断结果，返回所述当前静态规则所对应的规则ID表中的内容；
    基于所述当前静态规则对应的规则ID表无效的判断结果，返回无效信息，其中，所述无效信息用于指示所述当前静态规则所对应的规则ID表无效。
  5. 根据权利要求3所述的方法，其中，所述命令类型包括：对所述静态规则进行擦除的操作；
    对于任一当前静态规则，所述基于所述命令类型，以及与所述命令类型对应的预设管理规则，对内存中的与所述操作命令对应的静态规则进行对应管理，包括：
    基于对内存中的当前静态规则进行擦除的操作，判断内存中所述当前静态规则的规则ID表中是否有效；
    基于所述当前静态规则的规则ID表有效的判断结果，获取所述当前静态规则对应的所述规则哈希表中所述当前静态规则的策略，将所述当前静态规则对应的规则哈希表中所述当前静态规则的策略置无效，并将所述当前静态规则对应的所述规则ID表置无效；
    基于所述当前静态规则的规则ID表无效的判断结果，返回无效信息，其中，所述无效信息用于指示所述当前静态规则的规则ID表中无效。
  6. 根据权利要求3所述的方法，其中，所述命令类型包括：对所述静态规则进行写入的操作；
    对于任一当前静态规则，所述基于所述命令类型，以及与所述命令类型对应的预设管理规则，对内存中的与所述操作命令对应的静态规则进行对应管理，包括：
    基于对内存中的当前所述静态规则进行写入的操作，判断内存中所述当前静态规则的规则ID表是否有效；
    基于所述当前静态规则的规则ID表中有效的判断结果，将所述当前静态规则的规则ID表中的原始的当前静态规则的内容进行擦除，并重新将新的当前静态规则写入所述当前静态规则的规则ID表；
    基于所述当前静态规则的规则ID表中无效的判断结果，获取所述当前静态规则对应的哈希地址，判断所述当前静态规则对应的所述规则哈希表中所述当前静态规则的策略是否有效，基于所述当前静态规则的策略有效的判断结果，获取所述当前静态规则的规则ID，将所述当前静态规则的规则ID表中的原始的当前静态规则的内容进行擦除，并重新将新的当前静态规则写入所述当前静态规则的规则ID表和所述当前静态规则的规则哈希表，基于所述当前静态规则的策略无效的判断结果，将所述当前静态规则写入所述规则哈希表和所述规则ID表中。
  7. 根据权利要求5所述的方法，当所述命令类型是对所述静态规则进行擦除的操作时，所述方法还包括：
    当对内存中所述规则哈希表中所述当前静态规则的策略置无效后，将所述规则哈希表中的所述当前静态规则的哈希地址处的指针移动到所述当前静态规则的哈希地址的前一个哈希地址处。
  8. 一种静态规则的管理装置，设置于数字集成电路芯片中，包括：
    操作命令接收模块，设置为接收待管理的批量静态规则的操作命令；
    操作命令解析模块，设置为对所述操作命令进行解析，确定所述操作命令的命令类型；
    管理模块，设置为基于所述命令类型，以及与所述命令类型对应的预设管理规则，对内存中的与所述操作命令对应的静态规则进行对应管理。
  9. 一种电子设备，包括：
    一个或多个处理器；
    存储装置，设置为存储一个或多个程序；
    当所述一个或多个程序被所述一个或多个处理器执行，使得所述一个或多个处理器实现如权利要求1-7中任一项所述的静态规则的管理方法。
  10. 一种包含计算机可执行指令的存储介质，所述计算机可执行指令在由计算机处理器执行时设置为执行如权利要求1-7中任一项所述的静态规则的管理方法。
PCT/CN2021/108832 2020-10-16 2021-07-28 静态规则的管理方法、装置、电子设备和存储介质 WO2022078001A1 (zh)

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