WO2022062946A1 - 一种数据编码方法、数据解码方法及通信装置 - Google Patents

一种数据编码方法、数据解码方法及通信装置 Download PDF

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Publication number
WO2022062946A1
WO2022062946A1 PCT/CN2021/118074 CN2021118074W WO2022062946A1 WO 2022062946 A1 WO2022062946 A1 WO 2022062946A1 CN 2021118074 W CN2021118074 W CN 2021118074W WO 2022062946 A1 WO2022062946 A1 WO 2022062946A1
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unit
type
identifier
transmission channel
coding units
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PCT/CN2021/118074
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English (en)
French (fr)
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陆玉春
马林
李亮
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华为技术有限公司
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Priority to EP21871317.0A priority Critical patent/EP4203356A4/en
Publication of WO2022062946A1 publication Critical patent/WO2022062946A1/zh
Priority to US18/188,251 priority patent/US20230224194A1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4917—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0009—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the channel coding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0002—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate
    • H04L1/0003—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate by switching between different modulation schemes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0006—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
    • H04L25/4908—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes

Definitions

  • the present application relates to the technical field of data encoding, and in particular, to a data encoding method, a data decoding method, and a communication device.
  • the transmitting side encodes the data to be transmitted, so that the transmitted data conforms to the characteristics of the transmission channel.
  • Data encoding is essentially a mapping rule, such as mapping m-bit information to n-bit information.
  • Common data encoding methods include 8b/10b encoding, 64b/66b encoding, 128b/130b encoding, and 256b/257b transcoding.
  • the 8b/10b encoding overhead is relatively large.
  • the coding overhead of 64b/66b is smaller than that of 8b/10b, but since "01" and "10" will introduce a relatively large baseline drift, PAM4 modulation for 64b/66b coding cannot ensure better signal DC balance, that is, 64b /66b encoding is not friendly to PAM4 modulation.
  • the 128b/130b coding further reduces the coding overhead on the basis of the 64b/66b coding, but the same as the 64b/66b coding type, the 128b/130b coding adopts PAM4 modulation, which cannot guarantee a better signal DC balance.
  • a 256b/257b transcoding scheme is introduced, which is obtained by transcoding based on 64b/66b, and this transcoding scheme inherits the shortcomings of 64b/66b encoding.
  • the 256b/257b transcoding scheme has 257, that is, a relatively large prime number, which limits the design flexibility of the Solomon code (reed-solomon forward error, RS-FEC) and causes a large delay.
  • the existing 8b/10b encoding, 64b/66b encoding, 128b/130b encoding, and 256b/257b transcoding cannot take into account the requirements of encoding overhead, time delay and signal DC equalization.
  • the present application provides a data encoding method, a data decoding method and a communication device, which can ensure that DC balance is achieved under 4th-order pulse amplitude modulation (4 Pulse Amplitude Modulation, PAM4) modulation and reduce the delay of data transmission.
  • PAM4 Pulse Amplitude Modulation
  • an embodiment of the present application provides a data encoding method, and the method may be executed by a first communication device, and the first communication device may be a communication device or a communication device capable of supporting the functions required by the communication device to implement the method, such as a chip system.
  • the following description will be given by taking the communication device as the sending end as an example, wherein the sending end may be a device with an Ethernet interface or the sending end may also be a device with an internet technology (internet technolog, IT) interface, and the sending end may also be an Ethernet interface. network interface or IT interface, etc.
  • the method includes:
  • the M coding units are obtained by encoding L frames, and the M coding units include at least one first type unit, the first A type of unit includes a first identifier, the first identifier is used to indicate the start position of the frame header of the first frame in the L frames in the first type of unit, M is an integer greater than or equal to 1, and L is An integer greater than or equal to 1, and N is an integer greater than or equal to 1.
  • the data is divided into M encoding units, and the start position of the frame header included in each encoding unit is indicated by the first identifier, so that the receiving end can define each frame.
  • the first identifier can control the number of continuous "0" and continuous "1" in the entire data stream, which is convenient for the clock recovery circuit of the receiving end to work normally and avoids clock drift. And can make the first mark itself can realize the signal DC equalization, even if the payload in the encoding unit is scrambled, for the entire encoding unit, the signal DC equalization can be better achieved, so as to ensure that the PAM4 modulation method and Under the NRZ modulation mode, the signal DC balance is satisfied.
  • the unit of the first type includes a first field, a second field and a third field, the first field is used to carry the first identifier, and the second field is used to carry the Part or all of the data in one or more frames of the L frames, and the third field is used to carry check information for checking the first type of unit.
  • the solution provides a structure of the first type unit, that is, it includes a first field for carrying a first identifier, a second field for carrying data, and a third field for carrying verification information for verifying the first type of unit.
  • the length of each field can be specified in advance, which is convenient for the receiving end to decode the unit of the first type.
  • the first type unit includes a first field and a second field, the first field is used to carry the first identifier, and the second field is used to carry the L Part or all of the data in one or more frames in a frame.
  • This solution provides a structure of the first type of unit, that is, it includes a first field carrying a first identifier and a second field carrying data. Under this structure, the first type unit no longer performs independent verification on the data in the unit, and the reliability of the load carried by the first type unit is guaranteed by the check bit provided by the upper layer frame. This solution can further compress the overhead of the coding unit and improve the bearing rate of the coding unit.
  • the M coding units further include at least one unit of the second type, and the unit of the second type includes a second field, wherein the data carried by the first unit belongs to the data in the second unit.
  • the first field used to carry the first identifier can be used to carry data, so as to improve the carrying efficiency of the coding unit.
  • the receiving end may determine that the payload carried by a unit of the second type belongs to the frame corresponding to the first identifier in the unit of the second type preceding the unit of the first type; or the receiving end may determine that a plurality of consecutive The payload carried by the second-type unit belongs to the frame corresponding to the first identifier in the previous first-type unit of the consecutive multiple second-type units.
  • the second field includes K subfields, and the number of bits occupied by each subfield in the K subfields is the same, or the number of bits occupied by at least two subfields in the K subfields Are not the same.
  • the payloads of L frames are carried in K subfields, and the payloads of different frames can be carried in different subfields of the same coding unit.
  • This scheme does not limit the length of the K subfields.
  • Each subfield in the K subfields The lengths can also be the same or different to improve the flexibility of carrying loads.
  • the start position of the frame header of the first frame is the start position of the first subfield among the K subfields.
  • the scheme specifies the starting position of the frame header of the first frame, and the receiving end can clearly know the starting position of the frame header from the received coding unit, so as to realize the delimitation of each frame.
  • the first identifier includes X bits, and the X bits satisfy DC equalization in a fourth-order pulse amplitude modulation PAM4 modulation manner.
  • the X bits also satisfy DC equalization in a non-return-to-zero NRZ modulation manner.
  • the first identification itself can satisfy the signal DC equalization.
  • the signal DC equalization can be better achieved for the entire encoding unit, so as to ensure that the PAM4 modulation mode and NRZ modulation mode meet the signal DC balance.
  • the X is equal to 16, the first identifier comprising 1110010011101100001001100100000000111, 100001100100100000000111110000100110000000000001111100101100000000000000111, 00011011000000000000111, or 00011011000000000000111,.
  • This solution provides a specific implementation form of the first identification.
  • X bits are obtained by adjusting the bit order of the eBCH codeword according to a preset rule. Since the first identifier can be generated through an eBCH codeword, that is, an error correction and error detection codeword, the protection of the first identifier is realized, and there is no need to additionally set check information for protecting the first identifier, which can reduce coding overhead.
  • the at least one unit of the first type is polled and distributed to N transmission channels with a fixed length.
  • the distribution order of the first identifier of the third unit in the at least one first type of unit precedes the distribution order of the payload. That is, it is relatively simple to distribute at least one unit of the first type to the N transmission channels according to the distribution sequence of the first identification and then the payload with a fixed length of at least the unit of the first type.
  • the distribution sequence of the first identifier of the fourth unit in the at least one first type unit is located after the distribution sequence of the partial payloads. That is, the distribution order of the first identifiers of some units in the at least one first-type unit is located before the distribution order of the payload, and the distribution order of the first identifiers of some units in the at least one first-type unit is located in the part of the payload. After the distribution order. That is, in the same round or in different rounds, the distribution order of the first identifiers of the units of the first type may be different.
  • the probability of the first identifier on each transmission channel is different, then in the next polling, you can The distribution sequence of the transmission channels is adjusted so that the probability of the occurrence of the first identifier on each transmission channel is the same, so as to realize the signal DC equalization of all the transmission channels.
  • the N transmission channels include P transmission channel groups, wherein in the first round, the polling order of the first transmission channel group in the P transmission channel groups is located in the P transmission channel groups. In another round, the polling order of the first transmission channel group precedes the polling order of the second transmission channel group. That is, the N transmission channels can be bound in groups, for example, two adjacent transmission channels are bound into a group, and the M coding units are distributed to the P transmission channel groups by taking the transmission channel group as a unit. The polling order of the same transport channel group may not be the same in different rounds.
  • adjusting the polling sequence of the transmission channel group means adjusting the polling sequence of the load carried by the transmission channel group together, which is beneficial to decoding by the receiving end and can reduce the complexity of the implementation of the receiving end.
  • the method before sending the M coding units, the method further includes:
  • the DC balance of the transmission channel For any one of the N transmission channels, according to the DC balance of the transmission channel, adjust some bits of one or more first identifiers in the transmission channel.
  • the first identifier is generated by an error correction and error detection codeword, and then the first identifier itself has error correction capability, so that even if some bits of the first identifier are adjusted, the receiving end can correct them without error. It will affect the recognition of the first identification. Therefore, the signal DC balance of any data stream within a certain length range can be ensured by adjusting some bits of the first identification.
  • an embodiment of the present application provides a data decoding method, the method can be executed by a second communication device, and the second communication device can be a communication device or a communication device capable of supporting the functions required by the communication device to implement the method, such as a chip system. Described below by taking the communication equipment as a receiving end as an example, wherein, the transmitting end can be a device with an Ethernet interface or the transmitting end can also be a device with an IT interface, and the receiving end can also be an Ethernet interface or an IT interface and the like.
  • the method includes:
  • the M coding units include at least one first type unit, the first type unit includes a first identifier, the first The identifier is used to indicate the position of the frame header of the first frame in the L frames in the first type unit, M is an integer greater than or equal to 1, the L is an integer greater than or equal to 1, the N is an integer greater than or equal to 1;
  • the unit of the first type includes a first field and a second field, the first field is used to carry the first identifier, and the second field is used to carry one of the L frames or Some or all of the data in multiple frames.
  • the unit of the first type further includes a third field, and the third field is used to carry verification information for verifying the unit of the first type.
  • the M coding units further include at least one unit of the second type, and the unit of the second type includes a second field, wherein the data carried by the first unit belongs to the first unit in the second unit Identifies the corresponding frame, the first unit is one unit in the at least one second type unit, the second unit is one unit in the at least one first type unit, and the second unit is all the The first type unit preceding the first unit described above.
  • the second field includes K subfields, and the number of bits occupied by each subfield in the K subfields is the same, or the number of bits occupied by at least two subfields in the K subfields is different .
  • the start position of the frame header of the first frame is the start position of the first subfield of the K fields.
  • the first identifier includes X bits, and the X bits satisfy DC equalization in a fourth-order pulse amplitude modulation PAM4 modulation manner.
  • the X bits also satisfy DC equalization in a non-return-to-zero NRZ modulation manner.
  • the X is equal to 16, the first identifier comprising 1110010011101100001001100100000000111, 100001100100100000000111110000100110000000000001111100101100000000000000111, 00011011000000000000111, or 00011011000000000000111,.
  • the M coding units are received from the N transmission channels in a fixed-length poll.
  • the distribution order of the first identifier of the third unit in the at least one first type of unit precedes the distribution order of the payload.
  • the distribution sequence of the first identifier of the fourth unit in the at least one first type unit is located after the distribution sequence of the partial payloads.
  • the N transmission channels include P transmission channel groups, wherein, in the first round, the polling order of the first transmission channel group in the P transmission channel groups is located in the P transmission channels. Before the polling order of the second transport channel group in the group.
  • the polling order of the first transmission channel group in the P transmission channel groups is located after the polling order of the second transmission channel group.
  • a communication device in a third aspect, has a function of implementing the behaviors in the method embodiments of the first aspect.
  • the functions can be implemented by hardware, or can be implemented by hardware executing corresponding software.
  • the hardware or software includes one or more modules corresponding to the above functions.
  • a processor and a transceiver are included, where:
  • the processor is configured to generate M coding units, the M coding units are obtained by encoding L frames, the M coding units include at least one first type unit, the first type unit includes a first identifier, the first The identifier is used to indicate the starting position of the frame header of the first frame of the L frames in the first type unit, M is an integer greater than or equal to 1, and L is an integer greater than or equal to 1;
  • the controller is used to distribute the M coding units to N transmission channels, where N is an integer greater than or equal to 1.
  • the unit of the first type includes a first field, a second field and a third field, the first field is used to carry the first identifier, and the second field is used to carry the Part or all of the data in one or more frames of the L frames, and the third field is used to carry check information for checking the first type of unit.
  • the first type unit includes a first field and a second field, the first field is used to carry the first identifier, and the second field is used to carry the L Part or all of the data in one or more frames in a frame.
  • the M coding units further include at least one unit of the second type, and the unit of the second type includes a second field, wherein the data carried by the first unit belongs to the data in the second unit.
  • the second field includes K subfields, and the number of bits occupied by each subfield in the K subfields is the same, or the number of bits occupied by at least two subfields in the K subfields Are not the same.
  • the start position of the frame header of the first frame is the start position of the first subfield among the K subfields.
  • the first identifier includes X bits, and the X bits satisfy DC equalization in a fourth-order pulse amplitude modulation PAM4 modulation manner.
  • the X bits also satisfy DC equalization in a non-return-to-zero NRZ modulation manner.
  • the X is equal to 16, the first identifier comprising 1110010011101100001001100100000000111, 100001100100100000000111110000100110000000000001111100101100000000000000111, 00011011000000000000111, or 00011011000000000000111,.
  • the transceiver is specifically configured to poll and distribute the at least one unit of the first type to N transmission channels with a fixed length.
  • the distribution order of the first identifier of the third unit in the at least one first type of unit precedes the distribution order of the payload.
  • the distribution sequence of the first identifier of the fourth unit in the at least one first type unit is located after the distribution sequence of the partial payloads.
  • the N transmission channels include P transmission channel groups, wherein, in the first round, the polling order of the first transmission channel group in the P transmission channel groups is located in the P transmission channels. Before the polling order of the second transport channel group in the group.
  • the polling order of the first transmission channel group in the P transmission channel groups is located after the polling order of the second transmission channel group.
  • the transceiver before sending the M coding units, is further configured to:
  • any one of the N transmission channels according to the DC balance of the transmission channel, adjust some bits of one or more first identifiers in the transmission channel.
  • a communication device in a fourth aspect, has a function of implementing the behavior in the method embodiment of the second aspect.
  • the functions can be implemented by hardware, or can be implemented by hardware executing corresponding software.
  • the hardware or software includes one or more modules corresponding to the above functions.
  • a processor and a transceiver are included, where:
  • the transceiver is configured to receive M coding units from N transmission channels, the M coding units are obtained by encoding L frames, the M coding units include at least one first type unit, and the first type unit includes the first type of unit.
  • an identifier where the first identifier is used to indicate the position of the frame header of the first frame in the L frames in the first type unit, M is an integer greater than or equal to 1, and the L is an integer greater than or equal to 1 Integer, the N is an integer greater than or equal to 1; the processor is configured to decode the M coding units according to at least one first identifier to obtain the L frames.
  • the unit of the first type includes a first field and a second field, the first field is used to carry the first identifier, and the second field is used to carry one of the L frames or Some or all of the data in multiple frames.
  • the unit of the first type further includes a third field, and the third field is used to carry verification information for verifying the unit of the first type.
  • the M coding units further include at least one unit of the second type, and the unit of the second type includes a second field, wherein the data carried by the first unit belongs to the first unit in the second unit Identifies the corresponding frame, the first unit is one unit in the at least one second type unit, the second unit is one unit in the at least one first type unit, and the second unit is all the The first type unit preceding the first unit described above.
  • the second field includes K subfields, and the number of bits occupied by each subfield in the K subfields is the same, or the number of bits occupied by at least two subfields in the K subfields is different .
  • the start position of the frame header of the first frame is the start position of the first subfield of the K fields.
  • the first identifier includes X bits, and the X bits satisfy DC equalization in a fourth-order pulse amplitude modulation PAM4 modulation manner.
  • the X bits also satisfy DC equalization in a non-return-to-zero NRZ modulation manner.
  • the X is equal to 16, the first identifier comprising 1110010011101100001001100100000000111, 100001100100100000000111110000100110000000000001111100101100000000000000111, 00011011000000000000111, or 00011011000000000000111,.
  • the transceiver is specifically configured to receive the M coding units from the N transmission channels in a fixed-length poll.
  • the distribution order of the first identifier of the third unit in the at least one first type of unit precedes the distribution order of the payload.
  • the distribution sequence of the first identifier of the fourth unit in the at least one first type unit is located after the distribution sequence of the partial payloads.
  • the N transmission channels include P transmission channel groups, wherein, in the first round, the polling order of the first transmission channel group in the P transmission channel groups is located in the P transmission channels. Before the polling order of the second transport channel group in the group.
  • the polling order of the first transmission channel group in the P transmission channel groups is located after the polling order of the second transmission channel group.
  • an embodiment of the present application provides a communication device, and the communication device may be the communication device in the third aspect or the fourth aspect in the foregoing embodiments, or the communication device set in the third aspect or the fourth aspect in the chip.
  • the communication device includes a communication interface, a processor, and optionally, a memory.
  • the memory is used to store computer programs or instructions or data
  • the processor is coupled with the memory and the communication interface, and when the processor reads the computer program or instructions or data, the communication device is made to execute the above first aspect or the second aspect The method performed by the sending end or the receiving end in the method embodiment.
  • an embodiment of the present application provides a chip system, where the chip system includes a processor, and may further include a memory, for implementing the method executed by the communication apparatus in the third aspect or the fourth aspect.
  • the chip system further includes a memory for storing program instructions and/or data.
  • the chip system can be composed of chips, and can also include chips and other discrete devices.
  • an embodiment of the present application provides a communication system, where the communication system includes the communication device described in the third aspect and the communication device described in the fourth aspect.
  • the present application provides a computer-readable storage medium, where a computer program is stored in the computer-readable storage medium, and when the computer program is executed, the method executed by the sender in the above aspects is implemented; or the above-mentioned method is implemented; A method of various aspects performed by a receiving end.
  • a computer program product comprising: computer program code, when the computer program code is executed, the method executed by the sender in the above aspects is executed, or the above The methods performed by the receiving end of the various aspects are performed.
  • 1 is a schematic structural diagram of a communication interface
  • Fig. 2 is the 128b/130b encoding format under one transmission link
  • Figure 3 shows the 128b/130b encoding format under 4 transmission links
  • FIG. 4 is a schematic flowchart of a data encoding method provided by an embodiment of the present application.
  • FIG. 5 is a schematic diagram of a frame structure of a first-type unit provided by an embodiment of the present application.
  • FIG. 6 is a schematic diagram of a mapping manner for mapping a first frame to a first type of unit provided by an embodiment of the present application
  • FIG. 7 is a schematic diagram of a mapping manner in which L frames are mapped to M coding units according to an embodiment of the present application
  • FIG. 8 is a schematic diagram of another frame structure of a first-type unit provided by an embodiment of the present application.
  • FIG. 9 is a schematic diagram of a mapping manner for mapping a first frame to a first-type unit provided by an embodiment of the present application.
  • FIG. 10 is a schematic diagram of another mapping manner in which L frames are mapped to M coding units according to an embodiment of the present application
  • FIG. 11 is a schematic diagram of still another frame structure of a first-type unit provided by an embodiment of the present application.
  • FIG. 12 is a schematic diagram of a mapping manner for mapping a first frame to a plurality of units of the first type provided by an embodiment of the present application;
  • FIG. 13 is a schematic diagram of a frame structure of a second type of unit provided by an embodiment of the present application.
  • FIG. 14 is a schematic diagram of a mapping manner for mapping a frame to a plurality of first-type units and second-type units according to an embodiment of the present application;
  • 15 is a schematic diagram of a distribution rule for polling M coding units to 16 transmission channels according to 68 bytes according to an embodiment of the present application;
  • 16 is a schematic diagram of a distribution rule for polling M coding units to 12 transmission channels according to 68 bytes according to an embodiment of the present application;
  • 17 is a schematic diagram of a distribution rule for polling M coding units to 8 transmission channels according to 68 bytes according to an embodiment of the present application;
  • 18 is a schematic diagram of a distribution rule for polling M coding units to 16 transmission channels according to 66 bytes according to an embodiment of the present application;
  • 19 is a schematic diagram of a distribution rule for polling M coding units to 16 transmission channels according to 82 bytes according to an embodiment of the present application;
  • FIG. 20 is a schematic structural diagram of a communication device provided by an embodiment of the present application.
  • FIG. 21 is another schematic structural diagram of a communication apparatus provided by an embodiment of the present application.
  • the communication interface may be an Ethernet interface, an IT interface, or other communication interfaces that may transmit information.
  • the communication interface may include other higher layers, a media access control (MAC) layer, a physical coding sublayer, PCS), physical medium attachment (PMA) layer, and physical medium dependent (PMD) layer.
  • MAC media access control
  • PCS physical coding sublayer
  • PMA physical medium attachment
  • PMD physical medium dependent
  • the communication interface may also include other possible layers, such as a logic link control (LLC) layer located between other upper layers and the MAC layer, a layer located in the MAC
  • LLC logic link control
  • RS Reed-solomon forward error
  • RS-FEC Reed-solomon forward error sublayer
  • the transmission of data by the MAC layer to the PCS layer can be considered as the transmission of data by the upper layer to the PCS layer.
  • the application of the embodiments of the present application to an Ethernet interface is taken as an example.
  • the sender When the sender sends a data stream, it is transmitted through the communication interface. From top to bottom, it involves the processing of the MAC layer, RS layer, PCS layer, RS-FEC sublayer, PMA layer and PMD layer.
  • the processed data stream is represented as The signal sent onto the link medium.
  • the receiving end receives the signal from the link medium, and processes the PMD layer, the PMA layer, the RS-FEC sublayer, and the PCS layer in turn to recover the MAC layer data stream, that is, the receiving end is the inverse process of the transmitting end.
  • Data encoding is involved from the PCS layer to the PMA layer, so that the transmitted data conforms to the characteristics of the transmission channel.
  • Data encoding is essentially a mapping rule, such as mapping m-bit (bit) information to n-bit information.
  • mapping m-bit (bit) information to n-bit information.
  • 8b/10b encoding is to decompose a group of continuous 8-bit data into a group of data including 3-bit data and a group of data including 5-bit data, that is Two sets of data, add special characters to the two sets of data, respectively, after encoding, become a set of 4-bit data and a set of 6-bit data, that is, 10-bit data.
  • decoding is to decode a group of 10-bit data to obtain 8-bit data. Since 8b/10b encoding encodes 8bit data and some special characters into 10bit data according to specific rules, single or multiple bit errors generated during transmission can be detected. error, try to ensure the correct transmission of data.
  • the 8b/10b encoding adopts non-return to zero (NRZ) modulation, and determines the encoding of the next character by detecting the unbalanced type of the previous character. That is, if the former character is a positive disequilibrium character, the latter one should choose a negative disequilibrium. In this way, a "0" must be inserted after every 5 consecutive "1”s or a "1” must be inserted after every 5 consecutive "0”s, that is, the consecutive "1” or “0” shall not exceed 5 bits.
  • This continuous unbalance mechanism keeps the number of "0" and "1” in the entire bit stream basically the same, thereby ensuring the signal direct current (DC) balance.
  • the receiving end can consider that the level transition occurs after 5 consecutive bits, which can ensure the normal operation of the clock recovery circuit and avoid the clock drift or synchronization loss of the receiving end. To cause data loss, that is, to ensure that the data transmitted by the sender can be correctly restored at the receiver.
  • 8b/10b encoding essentially inserts 2-bit redundancy into the 8-bit payload, so the overhead of 8b/10b encoding is as high as 25%, and the encoding efficiency is low.
  • lower overhead encoding methods such as 64b/66b encoding with an encoding overhead of 3.125%.
  • 64b/66b encoding is an encoding method for converting 64bit payloads into 66bit code blocks, which is defined by the IEEE 802.3 working group.
  • a 66bit code block consists of a 2bit sync header and a 64bit payload.
  • the 2-bit synchronization header includes the 0th bit and the 1st bit of the code block. There are two cases for the 2-bit synchronization header, that is, the 2-bit synchronization header can be "01" or "10". If the sync header is "01", the 64-bit payload is a data code block.
  • the 64-bit payload includes an 8-bit control code block and 56-bit control information and/or data.
  • the control code The field of the block may be referred to as the type field of the control code block (may be referred to as the type field). It should be understood that "00” and “11” are not used, and if "00” and "11” appear in the 66-bit code block, the link may be considered to be in error.
  • the 64b/66b encoding usually adopts the NRZ modulation format, and scrambles the 64-bit payload according to the self-synchronizing scrambling method of X ⁇ 58+X ⁇ 39+1, so that "0" and "0” in the transmitted 66-bit code block "1" is relatively uniform and ensures DC balance.
  • the physical interface using 64b/66b encoding will distribute the data to be transmitted to multiple transmission channels with 66-bit code blocks as the granularity, and then aggregate the data of the multiple transmission channels for transmission on the multiple transmission channels. However, for each transmission channel, it will wait until the 64-bit payload is obtained, determine the type and add the synchronization header, and then send it after obtaining the 66-bit code block. That is, each transmission channel needs to wait until a 64-bit payload is obtained before sending a code block, that is, the waiting time causes a delay in data transmission.
  • 128b/130b encoding can improve bandwidth utilization, for example, bandwidth utilization can be increased from 80% to 98.46%.
  • 128b/130b encoding adds a 2-bit sync header in front of the 128-bit payload. When the sync header is "01", it means that it is followed by control data (Ordered Set); when the sync header is "10", it means that it is followed by payload data (non-Ordered Set).
  • the difference from 64b/66b encoding is that the physical interface using 128b/130b encoding, such as the peripheral component interconnect express (PCIE) interface, first distributes data to multiple transmission links in units of bytes, Then add synchronization headers to each transmission link one by one. Among them, if the 128bit data is pure data, add a "01" sync header, if the 128bit data is not pure data, add a "10" sync header. The 2bit sync header and the 128bit payload are collectively called a data block.
  • PCIE peripheral component interconnect express
  • FIG. 2 and FIG. 3 respectively show the 128b/130b encoding format under one transmission link and four transmission links.
  • one symbol (symbol) in FIG. 2 and FIG. 3 can carry an 8-bit code block (S0-S7), wherein S0 is the least significant bit and S7 is the most significant bit.
  • the sending side adds a 2-bit synchronization header (H0 and H1) to the transmission link, and the synchronization block is followed by a 128-bit payload.
  • the code block stream on the entire transmission link includes a 2-bit sync header and a 128-bit payload.
  • the sending side encodes the data blocks to be sent and distributes them to four transmission links. During distribution, a synchronization header is added to each transmission link in turn, and the data is distributed to each transmission in units of bytes. link.
  • 256b/257b transcoding which refers to the mapping of four 66b code blocks to one 257b code block, which can further reduce the encoding overhead.
  • 256b/257b transcoding is obtained based on 64b/66b transcoding, and this transcoding scheme inherits the shortcomings of 64b/66b encoding.
  • the 256b/257b transcoding scheme has 257, that is, a relatively large prime number, which limits the design flexibility of the Solomon code (reed-solomon forward error, RS-FEC) and causes a large delay.
  • RS-FEC Reed-solomon forward error
  • the embodiments of the present application provide a data coding scheme applicable to NRZ modulation and PAM4 modulation, so as to reduce coding delay as much as possible, simplify Gearbox design, and ensure DC equalization.
  • the solutions provided by the embodiments of the present application can be applied to scenarios that require encoding format conversion. For example, it involves technical fields such as Ethernet interfaces, IT interfaces, PCI interfaces, PCIe interfaces, and memory interfaces.
  • Ethernet interfaces such as Ethernet interfaces, IT interfaces, PCI interfaces, PCIe interfaces, and memory interfaces.
  • the following takes the application of the embodiments of the present application to an Ethernet interface as an example.
  • the solutions provided in the embodiments of the present application can encode the data stream to be sent, and the improved solution can be implemented in the sending module.
  • the solutions provided in the embodiments of the present application can also decode the received data stream, and the improved solution can be implemented in the receiving module. That is, the improved solution in the embodiment of the present application involves a sending module and a receiving module, and the sending module and the receiving module may be located on one node, or the sending module and the receiving module may be located on different nodes respectively.
  • the technical solutions provided by the embodiments of the present application are introduced by taking the sending module at the sending end and the receiving module at the receiving end as an example.
  • FIG. 4 it is a schematic flowchart of a data encoding method provided by an embodiment of the present application.
  • the data encoding in the embodiments of this application refers to the encoding of the PCS layer.
  • the upper layer transmits data to the PCS layer, and the PCS layer receives L frames from the upper layer, encodes the L frames, and generates multiple coding units.
  • the coding unit may also be referred to as a physical coding unit (physical coding unit), which may be referred to as phit for short. That is, phit represents a coding unit hereinafter.
  • the frame here refers to the data unit (MAC frame) that meets the requirements of the IEEE802.3 frame. If the data encoding is applied to other protocol standard interfaces, the frame here can also be a data unit conforming to other protocol standards, such as data link layer package (DLLP). Specifically, the flow of the data encoding method provided by the embodiments of the present application is described as follows.
  • the transmitting end generates M coding units, where the M coding units are obtained by encoding L frames, and the M coding units include at least one first-type unit, the first-type unit includes a first identifier, and the first identifier It is used to indicate the position of the frame header of the first frame of the L frames at the first type of coding, where M is an integer greater than or equal to 1, and L is an integer greater than or equal to 1.
  • the embodiments of the present application aim to provide a coding scheme suitable for PAM4 modulation, and at the same time can ensure the DC balance of the signal.
  • the PCS layer may encode one or more received frames to generate multiple coding units.
  • the PCS layer encodes frames, that is, maps frames to coding units.
  • the coding unit should include the original information of the frame and additional information, so that the receiving end can correctly decode the M coding units to obtain the original information of the frame.
  • the length of each coding unit may be fixed to reduce coding complexity.
  • the length of each coding unit may be defined by the system, or may be agreed upon by the sending end and the receiving end, which is not limited in this embodiment of the present application.
  • each time a frame is received by the PCS layer the frame may be encoded and a coding unit resulting from the encoding may be sent. Since a frame is received, encoded and sent, the latency is low. However, one frame corresponds to one coding unit. If the data amount of the frame is small, the bearing rate of the coding unit is low, and the coding overhead is large. In order to improve the bearing efficiency of the coding unit, multiple small frames may be spliced into a long frame, and the long frame may be mapped to a coding unit.
  • the PCS layer may continue to receive other frames, and then map multiple received frames to one coding unit.
  • the PCS layer receives L frames, and encodes the L frames to generate M coding units, where L is greater than or equal to 2, and M is greater than or equal to 1. Since the L frames are coded together, the bearing rate of the coding unit can be increased, and the coding overhead can be reduced.
  • the L frames may include frames of the same type, or may include frames of multiple types, which are not limited in this embodiment of the present application.
  • the PCS layer may divide L frames to obtain multiple data units, and map the multiple data units to M coding units. Considering that the receiving end receives M coding units and obtains multiple data units after decoding the M coding units, it is necessary to determine which data units belong to the same frame from the multiple data units.
  • the PCS layer divides L frames, which can be divided according to data information and control information. It should be understood that, for a certain frame, the control information is usually used to indicate the length of the frame, the source address of the frame, the destination address of the frame and other information, which can be considered as the frame header of the frame. Relatively speaking, the data information can be the frame body and frame trailer of the frame.
  • Control information is less than data information, so the control information can be divided into one data unit, and the data information can be divided into multiple data units. It should be noted here that when the length of the control information is greater than the length of one data unit, the Part of the data of the control information is divided into a data unit, and the remaining part of the control information is divided together with the data information. In this way, the receiving end can delimit multiple data units through the control information, that is, determine the starting position of the frame, and then determine which data blocks belong to the same frame.
  • control block control block
  • data block data block
  • the PCS layer maps multiple control blocks and multiple data blocks obtained by dividing L frames to M coding units, and sends them to the receiving end. For the receiving end, it is necessary to determine which control blocks and data blocks belong to the same frame from the received M coding units, that is, correctly decode the M coding units to obtain correct L frames. In order to enable the receiving end to correctly decode the M coding units, the transmitting end can specify the starting position of the control block in the coding unit, so that the receiving end can delimit multiple data blocks according to the starting position of the control block in the coding unit. It should be understood that the length of each coding unit in the M coding units is fixed, while some of the L frames are longer and some are shorter.
  • the embodiments of the present application allow one frame to be mapped to multiple coding units, so as to save coding unit overhead as much as possible.
  • some coding units may include frame headers and data blocks, and some coding units may include data blocks and do not include frame headers. Then, the structures of different types of coding units in the M coding units may be the same or different.
  • the transmitting end may indicate whether the unit includes the frame header through the first identifier. Further, even if the receiving end determines that a certain unit includes a frame header, if the receiving end cannot determine the starting position of the frame header in the unit, the receiving end still cannot determine the accurate frame header from the unit, that is, the encoding unit cannot be determined. which data blocks belong to the same frame. Therefore, the first identifier can be further used to indicate the starting position of the frame header in a certain unit in the unit, so that the receiving end can delimit each frame included in the received M coding units according to the first identifier.
  • a unit may not carry the first identifier, so as to improve the data carrying rate of the unit.
  • coding units including the first identifier are referred to as units of the first type
  • coding units not including the first identifier are referred to as units of the second type. It should be understood that the structures of the first type of unit and the second type of unit may be different.
  • the M coding units may include at least one unit of the first type, or the M coding units may include at least one unit of the first type and at least one unit of the second type.
  • the manner of mapping the multiple control blocks and the multiple data blocks into which the L frames are divided into the M coding units varies according to the structure of the coding units. The following describes how the PCS layer maps multiple control blocks and multiple data blocks to M coding units with reference to several possible implementation forms of the coding unit.
  • FIG. 5 shows a frame structure of the first type of unit.
  • the first type of unit includes a first field and a second field and a third field.
  • the first field is used to carry the first identifier
  • the second field is used to carry the frame header and data of the first frame
  • the third field is used to carry the verification information for verifying the first type of unit.
  • the first frame may be any one of the L frames.
  • the first identifier is used to indicate the starting position of the frame header of the first frame in a certain first-type unit, and only needs to occupy less bits or bytes.
  • the second field is used to carry the frame header and data, and needs to occupy more bits or bytes.
  • the third field is used to carry the verification information for verifying the first type of unit.
  • the verification information can be the verification information of the first frame, for example, it can be a frame check sequence (FCS), so the third field
  • FCS frame check sequence
  • FIG. 5 takes as an example that the first field occupies X bytes, the second field occupies Y bytes, and the third field occupies Z bytes.
  • this embodiment of the present application does not limit the lengths of the first field, the second field, and the third field.
  • the second field may be divided into multiple subfields.
  • the second field may include K subfields (ie, U 0 to U k-1 ), where K is greater than or equal to 2.
  • K is greater than or equal to 2.
  • the frame header of the first frame may be located in any one of the K subfields.
  • the start position of the frame header of the first frame may be specified as the start position of the subfield, so that the sending end indicates which subfield the frame header of the first frame is located in, and the receiving end can determine the correct frame header.
  • the start position of the frame header of the first frame and the start position of the subfield have a first offset, so that the sender indicates which subfield the frame header of the first frame is located in, and the receiver can also determine the correct frame header .
  • This embodiment of the present application does not limit the granularity of the first offset.
  • the granularity of the first offset may be bits or bytes.
  • the remaining subfields in the K subfields except the subfield carrying the frame header may be used to carry payload and check information.
  • the payload includes the payload in the frame body, and may also include the payload in the frame trailer, a control frame or an idle code block.
  • the frame header of the first frame can be mapped to any subfield in the second field in the first type unit.
  • the first identifier carried in the first field may indicate the position of the frame header in the unit of the first type. Different values of the first identifier correspond to different positions.
  • the frame header of the first frame can be located in the first subfield, and the value of the first identifier can be the first value; in the second mapping scheme shown in Figure 6, The frame header of the first frame may be located in the second subfield, and the value of the first identifier may be the second value; as shown in the third mapping scheme shown in FIG.
  • the frame header of the first frame may be located in the third subfield,
  • the value of the first identification can be the third value; as shown in the fourth mapping scheme as shown in Figure 6, the frame header of the first frame can be located in the Kth field, and the value of the first identification can be the fourth value; such as In the fifth mapping scheme shown in FIG. 6 , the first type of unit may not include the frame header of the first frame, and the value of the first identifier may be the fifth value.
  • the length of the first field may be determined according to K, for example, the first field may occupy at least log 2 K bits.
  • the first identifier is located before the payload, so the first identifier may also be called a prefix. It should be noted that the embodiment of the present application does not limit the position of the first identification, for example, the first identification may also be located at the tail of the first type of unit. In the following, it is taken as an example that the first identification is a pre-identification.
  • the second field may be divided into K subfields with the same length, or the second field may be divided into subfields with different lengths. That is, the number of bits occupied by each subfield in the K subfields is the same, or the number of bits occupied by at least two subfields in the K subfields is different, which can improve the flexibility of the load bearing.
  • the control frame can be considered as only the header (Header), and the data frame includes the frame body and the frame tail in addition to the frame header.
  • the frame body is usually the payload in the body, and the frame trailer may include the payload in tail and FCS.
  • the frame header is usually short, so the frame header can be mapped to a certain subfield, such as the first subfield, among the K subfields in the first type unit. From this perspective, the length of any subfield may be determined according to the maximum length of the frame header, for example, the length of the subfield may be equal to the maximum length of the frame header.
  • the payload and check information in the first frame may be carried in other subfields except the first subfield. Of course, if there is still space after the first subfield carries the frame header, the remaining space can also carry the payload and check information of the first frame.
  • the first field may be any subfield of the K subfields, and one unit of the first type may be used to carry multiple frames.
  • the receiving end can specify the starting position of each frame through the first identifier in the at least one first type unit, so as to realize the delimitation of the frame.
  • the Kth subfield can be used to carry part of the information of the frame header of the first frame, as shown in the sixth mapping method shown in FIG. 6 .
  • the rest of the information in the frame header of the first frame may be carried in a certain subfield in another first-type unit.
  • the mapping of the first frame cannot be completed in one first type unit, that is, the first frame can be mapped to multiple first type units.
  • one of the first-type units in the plurality of first-type units only needs to carry the frame header of the first frame, and the other first-type units can be used to carry data included in the first frame.
  • the remaining units of the first type can be mapped in the fifth mapping manner as shown in FIG. 6 , that is, the first identifier is used to indicate that the unit of the first type does not include a preamble.
  • the remaining units of the first type may not bear the first identifier, for example, the first field may be used to bear data.
  • coding units that do not include the first identifier are referred to herein as second-type units. It should be understood that a frame may be mapped to a certain first type unit, and one or more second type units. Since one or more units of the second type do not include the first identifier, the receiving end needs to determine which frame the payload carried by the received one or more units of the second type belongs to.
  • the first identifier is located before the payload, then the receiving end can determine that the payload carried by a second-type unit belongs to the frame corresponding to the first identifier in the first-type unit preceding the second-type unit; or the receiving end can determine that the continuous The payload carried by the plurality of second-type units belongs to the frame corresponding to the first identifier in the previous first-type unit of the consecutive plurality of second-type units.
  • FIG. 7 is a mapping manner in which L frames are mapped to M coding units.
  • the M coding units include at least one unit of the first type and at least one unit of the second type.
  • Figure 7 takes the example of including 3 first-type units and 2 second-type units.
  • the first field in the first type unit 1, the first type unit 2 and the first type unit 3 carries the first identifier; the second type unit 1 and the second type unit 2 do not carry the frame header, and the second type unit
  • the first field in type 1 and unit 2 of the second type carries at least one of payload, control frame and idle code block.
  • the payloads carried by the second type unit 1 and the second type unit 2 belong to the frame corresponding to the frame header in the first type unit 1 .
  • the receiving end receives the 5 units in Figure 7, and it can be considered that the load carried by the second type unit 1 and the second type unit 2 without the frame header belongs to the frame corresponding to the first identifier in the first type unit before the load.
  • the payloads and check information of L frames are mapped to a plurality of first-type units, that is, the check of the first-type units is implemented at the physical layer, which enables frame flow control and retransmission operations.
  • Implemented at the physical layer Since the coding unit of the physical layer is used as the granularity, operations such as frame flow control and retransmission are implemented, which can improve the operation efficiency and reduce the delay. Compared with the traditional method, which implements frame flow control and retransmission operations at the data link layer, the delay is obviously lower and the transmission efficiency is higher.
  • a first identifier prefix identifier
  • FIG. 8 shows a frame structure of the first type of unit.
  • the first type of unit includes a first field and a second field. That is, the difference from the first implementation form is that the first type unit does not include the third field, that is, the check digit is not separately set in the coding unit.
  • the check information of L frames can be included in the upper-layer packet, and carried to the load field together with the data in the L frames, then the reliability of the load carried by the first-type unit is carried by the upper-layer frame. The check digit is guaranteed.
  • This solution can further compress the overhead of the coding unit and improve the bearing rate of the coding unit.
  • FIG. 9 shows a mapping manner in which a frame is mapped to a unit of the first type.
  • Figure 9 takes the mapping of L frames to 5 first-type units as an example.
  • the difference from FIG. 6 is that, among the K subfields included in the second field, the subfields used for carrying data may carry the payload within the frame and the frame trailer.
  • the frame trailer includes the payload and check information in the frame trailer, such as FCS.
  • the subfields used to carry data can also carry control frames, idle code blocks, and the like.
  • a subfield in the first type of unit may be used to carry at least one of a payload within a frame, a control frame, and a trailer.
  • some coding units in the M coding units may adopt the structure of the first implementation form, and another part of the coding units may adopt the structure of the second implementation form.
  • the verification information is carried in the encoding unit of the first implementation form, and the verification information can be used to ensure the reliability of the frame header in the encoding unit.
  • the coding unit of the second implementation form can be used to improve the data carrying rate of the coding unit except for the frame header, and is more suitable for long frame application scenarios.
  • a frame can also be mapped to a first-type unit and at least one second-type unit.
  • FIG. 10 is a schematic diagram of mapping frames to coding units.
  • Figure 10 takes the example of including 3 first-type units and 2 second-type units.
  • the first field in the first type unit 1, the first type unit 2 and the first type unit 3 carries the first identifier; the second type unit 1 and the second type unit 2 do not carry the frame header, and the second type unit
  • the first field in type 1 and unit 2 of the second type carries at least one of a payload, a control frame, a frame trailer, and an idle code block.
  • the payloads carried by the second type unit 1 and the second type unit 2 belong to the frame corresponding to the frame header in the first type unit 1 .
  • the receiving end receives the 5 units in Figure 10
  • the load carried by the second type unit 1 and the second type unit 2 without the frame header belongs to the frame to which the frame header corresponding to the previous first identifier of the load belongs.
  • the first field in the second type unit 1 and the second type unit 2 is used to carry the load, the carrying rate of the coding unit can be improved, and it is more suitable for the transmission of long frames.
  • the units of the first type and the units of the second type do not include the third field, which can reduce the overhead of the M coding units.
  • the third implementation form please refer to FIG. 11 , which shows a frame structure of the first type of unit.
  • the first type of unit includes a first field and a second field.
  • the first field is used to carry the first identifier
  • the second field is used to carry the frame header and data of the first frame.
  • the difference from the foregoing implementation form 1 and implementation form 2 is that the Kth subfield in the second field can be extended by Z bytes.
  • the third field in the structure of implementation form 1 is used to carry data. Since the field used to carry the check information can be used to carry data, the overhead of the coding unit can be further compressed. In addition, the data carrying rate of the coding unit can be improved.
  • FIG. 12 shows a mapping manner in which a frame is mapped to a plurality of units of the first type.
  • Figure 12 takes the mapping of L frames to 5 first-type units as an example.
  • the difference from FIG. 6 is that the K subfields included in the second field are extended with Z bytes, which are used to carry at least one of the payload in the frame, the control frame, and the idle code block at the end of the frame. kind.
  • some coding units in the M coding units may adopt the structure of the first implementation form, and another part of the coding units may adopt the structure of the third implementation form.
  • the verification information is carried in the encoding unit of the first implementation form, and the verification information can be used to ensure the reliability of the frame header in the encoding unit.
  • Adopting the coding unit of realization form 3 can be used to improve the data carrying rate except the frame header in the coding unit, and is more suitable for application scenarios of long frames.
  • the first field in the third implementation form can be used to carry data, so as to improve the data carrying rate of the coding unit. That is, the coding unit can also be realized by implementing form 4.
  • FIG. 13 shows a frame structure of the second type of unit.
  • the second type of unit includes a first field and a second field.
  • the difference from the third implementation form is that the first field is used to carry data. Since the field for carrying the first identification carries data, the overhead of the coding unit can be further compressed.
  • FIG. 14 shows a mapping manner in which a frame is mapped to a plurality of units of the first type and units of the second type.
  • Figure 14 takes the mapping of L frames to 3 first-type units and 2 second-type units as an example.
  • the first field in the first type unit 1, the first type unit 2 and the first type unit 3 carries the first identifier; the second type unit 1 and the second type unit 2 do not carry the frame header, and the second type unit
  • the first field in type 1 and unit 2 of the second type carries at least one of a payload, a control frame, a frame trailer, and an idle code block.
  • the payloads carried by the second type unit 1 and the second type unit 2 belong to the frame corresponding to the frame header in the first type unit 1 .
  • the receiving end receives the 5 units in Fig. 14, and it can be considered that the load carried by the second type unit 1 and the second type unit 2 without the frame header belongs to the previous first identifier located between the second type unit 1.
  • the frame to which the frame header belongs Since the first field in the second type unit 1 and the second type unit 2 is used to carry the load, and the field used to carry the check information can be used to carry the data, the overhead of the coding unit can be further compressed and the data carrying capacity of the coding unit can be improved. rate, which is suitable for transmission of long frames.
  • the M coding units for mapping the L frames may adopt one or more structures of the foregoing implementation form 1 to implementation form 4.
  • Delimitation of the frame can be achieved due to the insertion of the first identification.
  • the insertion of the first identification can also control the number of continuous "0" or continuous “1” in the system, for example, the number of continuous "0” or continuous “1” is controlled within the length of each coding unit to ensure The clock recovery circuit at the receiving end works normally to avoid data loss.
  • the first identifier may also be used to indicate the type of the frame header, that is, the type of the frame to which the frame header belongs.
  • the type here can be the service type or the protocol type of the encapsulated frame.
  • the encapsulation protocols corresponding to different services are different, so it can also be considered that the first identifier can be used to isolate services. Since the first identifier can be used to identify the type of the frame, different services corresponding to the L frames can be distinguished according to the first identifier, so that the L frames can be flexibly mapped to the M coding units to achieve isolation of multiple services.
  • the encapsulation protocol of each frame can be determined by the first identifier, and the L frames can be parsed. In this way, the upper-layer data processing process on the receiving side can be simplified, and the service data transmission delay can be reduced.
  • the first identifier may be generated by error correction and error detection coding, for example, the first identifier may be generated by an eBCH codeword or a BCH codeword. Since the error correction and error detection coding has the capability of error correction and error detection, the protection of the first identification can be realized through the error correction and error detection coding itself, without the need to protect the first identification through other information, which can ensure the reliability of the first identification. to avoid misjudgment of the frame format by the receiver.
  • the payload of the coding unit is usually scrambled.
  • 64b/66b encoding adopts NRZ modulation, and scrambles the 64-bit payload according to the self-synchronizing scrambling method of X ⁇ 58+X ⁇ 39+1; for example, 128b/130b encoding adopts NRZ modulation, which introduces scrambling in the data part
  • 256b/257b transcoding needs to add scrambling code to the encoded data to achieve DC equalization.
  • the first identifier itself can achieve DC equalization through coding design, that is, the first identifier itself provided in the embodiment of the present application can implement DC equalization. Even if the payload in the coding unit is scrambled, DC equalization can still be achieved well for the entire coding unit.
  • the first identifier includes X bits, and the X bits satisfy DC equalization in the PAM4 modulation mode.
  • the first identifier includes X bits, and the X bits satisfy DC equalization in the NRZ modulation mode, or the X bits satisfy the DC equalization in the NRZ modulation mode and the PAM4 modulation mode.
  • the error correction and error detection code is an eBCH codeword with a code length of 16 bits, and the minimum Hamming distance of the eBCH codeword is 8.
  • the eBCH codeword can satisfy DC equalization under NRZ modulation. It should be understood that there are 32 eBCH codewords with a code length of 16 bits and a minimum Hamming distance of 8 in total. The 32 eBCH codewords are shown in Table 1.
  • Each eBCH codeword in Table 1 can be used to generate an identity, as shown in Table 1.
  • the first identifier in this embodiment of the present application may also be a partial identifier in Table 1, that is, the first identifier includes 16 bits, and these 16 bits may be part of the codewords in Table 1, so as to meet the DC requirements in the NRZ modulation mode. Equalization, or satisfy the DC equalization in the PAM4 modulation mode, or the first identifier satisfies the NRZ modulation mode and the PAM4 modulation mode.
  • the first identification may include codewords as shown in Table 2.
  • the eBCH codewords corresponding to the first identifier are actually 10 codewords in Table 1. Since the number of "0" and “1" in the first 8 bits of the first identifier in Table 2 is the same, and the number of "0" and “1” in the last 8 bits is the same, the first identifier in Table 2 has the same number of "0” and "1". DC equalization is satisfied in the NRZ modulation mode.
  • the first identifier may be obtained by adjusting the bit order of the eBCH codeword according to a preset rule, so as to satisfy DC equalization in the PAM4 modulation mode.
  • a possible preset rule is that the sequence "43275160" of the first 8 bits of the original eBCH codeword corresponds to the sequence "76543210" of the first 8 bits of the first identifier, and the sequence "75432160" of the last 8 bits of the original eBCH codeword corresponds to The sequence of the first 8 bits of the first flag is "76543210".
  • the 4th bit of the first 8 bits of the original eBCH codeword is used as the 7th bit of the first 8 bits of the first identifier
  • the 3rd bit of the first 8 bits of the original eBCH codeword is used as the first identifier.
  • the first identifier shown in Table 3 can be obtained according to the above preset rules.
  • the bit sequence "76543210_76543210” of the first identifier in Table 3 corresponds to the bit sequence "43275160_75432160" of the original eBCH codeword.
  • the first identifier itself can implement DC equalization in the NRZ modulation mode and the PAM4 modulation mode, by scrambling the payload in the coding unit, the DC equalization of the payload can be implemented. However, for a certain data stream, DC imbalance may still occur. In this case, the embodiment of the present application may adjust some bits in the first identifier to ensure DC balance on each data stream. For example, the DC unbalance degree of the data stream within a certain length range can be counted, and the DC unbalance degree of the data stream can be realized by adjusting, for example, the last 2 bits in the first identifier to compensate for the DC unbalance degree within the length range.
  • the receiving end since the first identifier has a 3-bit error correction capability, even if some bits of the first identifier used to adjust DC equalization are wrong, the receiving end can also perform error correction through eBCH decoding. It will affect the recognition of the first identification.
  • the transmitting end distributes the M coding units to the N transmission channels, and the receiving end receives the M coding units from the N transmission channels.
  • the M coding units may be distributed to N transmission channels.
  • the sending end may distribute at least one unit of the first type to N transmission channels by polling with a fixed length.
  • the sender may distribute the at least one unit of the first type to the N transmission channels in a polling sequence in accordance with the distribution sequence of the first identifier and then the payload.
  • the sender distributes at least one unit of the first type to N transmission channels in a polling manner. If the probability of the first identifier appearing on each transmission channel is Are not the same. For example, some transmission channels on the N transmission channels do not have the first identifier all the time.
  • the DC equalization adjustment is performed on the data stream through the first identifier, only the DC equalization adjustment of some transmission channels can be realized, and the DC equalization adjustment of all transmission channels cannot be realized. Equalization adjustment, thus affecting the effect of DC equalization adjustment. In this case, when at least one unit of the first type is distributed in the next round, the distribution rules can be adjusted.
  • the polling sequence of the first identification of another unit or units of the at least one first type of units in the next round follows the partial payload. That is, in different rounds, the polling sequence of the first identifier may be different, so that the probability of the first identifier appearing on each transmission channel is the same, and the DC balance of each transmission channel is ensured, that is, the DC balance of all transmission channels is guaranteed.
  • the distribution sequence of the first identifiers of the multiple first-type units in a round may be the same, which is relatively simple. Certainly, the distribution order of the first identifiers of the multiple first-type units in a round may also be different, which is not limited in this embodiment of the present application.
  • N transmission channels may be bound in groups, for example, N transmission channels are grouped in units of the granularity of the transmission channel carrying the first identifier. For example, the number of transmission channels carrying the first identifier is 2, then two adjacent transmission channels are bound into one group to obtain P transmission channel groups. Then, the M coding units are distributed to the P transmission channel groups in units of transmission channel groups.
  • the polling order of a certain transmission channel in the N transmission channels may be specified to be before the polling order of another transmission channel in the N transmission channels, or the polling order of some transmission channels in the N transmission channels may be specified.
  • the polling order precedes the polling order of other of the N transmission channels.
  • a certain transmission channel is referred to as a first transmission channel
  • the other transmission channel is referred to as a second transmission channel.
  • Some transmission channels are referred to as the first transmission channel group, and other transmission channels are referred to as the second transmission channel group.
  • the polling order of the first transmission channel group in the P transmission channel groups precedes the polling order of the second transmission channel group in the P transmission channel groups. That is, the sending end may poll and distribute the M coding units in the order of the first transmission channel group and then the second transmission channel group.
  • the transmission channel group is bound with the transmission channel carrying the first identifier as the granularity, so it can be specified that the sender polls and distributes M coding units in the order of the first identifier and then the payload, then the first transmission channel is: The transmission channel carrying the first identifier.
  • the polling order of the first transmission channel group in the P transmission channel groups is located before the polling order of the second transmission channel group in the P transmission channel groups.
  • M coding units M coding units, and the probability that the first identifier appears on each transmission channel is not necessarily the same. That is to say, some transmission channel groups do not have the first identifier all the time, so when the DC equalization adjustment is performed on the data stream through the first identifier, only the DC equalization adjustment of some transmission channels can be realized, and the DC equalization adjustment of all transmission channels cannot be realized. The effect of DC equalization adjustment.
  • the distribution rule can be adjusted, that is, in different rounds, the polling sequence of the same transmission channel group is different.
  • it can be specified to adjust the polling sequence of the transmission channel group in the previous round.
  • the polling sequence of the second transmission channel in the above N transmission channels is located before the polling sequence of the first transmission channel, so that each transmission channel appears
  • the probability of the first identification is the same, so as to ensure the DC balance of each transmission channel as much as possible, that is, to ensure the DC balance of all transmission channels.
  • the numbers of the P transmission channel groups are N k , N k+1 , . . . , N k+P-1 , and k is an integer greater than or equal to 0.
  • N k and the second transmission channel group Take the first transmission channel group as the transmission channel group N k+1 as an example, and take the first transmission channel group and the second transmission channel group as two adjacent transmission channels group for example.
  • the first transmission channel group and the second transmission channel group may not be adjacent.
  • the sender When the sender distributes M coding units in the i-th polling, according to the fixed length, and according to the polling order of the transmission channel group N k in the P transmission channel groups, it is located before the polling order of the transmission channel group N k+1 .
  • M coding units are distributed to N transmission channels. After that, the probability of the first identifier appearing on each transmission channel is the same, then when the sender distributes M coding units in the i+1th poll, it is still located in the transmission channel according to the polling order of the transmission channel group N k in the P transmission channel groups.
  • the polling sequence of channel group Nk+1 distributes M coding units to N transmission channels before. That is, in different rounds, the polling sequence of the N transmission channels is the same.
  • the polling order of the group Nk+1 precedes the polling order of the transmission channel group Nk to distribute the M coding units to the N transmission channels. That is, in different rounds, the polling sequence of the N transmission channels may be different, so as to ensure that the probability of the first identifier appearing on each transmission channel is the same, which ensures DC balance of all transmission channels.
  • the following describes the distribution rules for distributing M coding units to N transmission channels by taking the distribution of M coding units to 16 transmission channels, 12 transmission channels, and 8 transmission channels as examples respectively.
  • the 16 transmission channels adjacent to 2 transmission channels are a transmission channel group, that is, transmission channel 0 and transmission channel 1 are a group of transmission channels, transmission channel 2 and transmission channel 3 are a group, and so on, there are 8 transmission channels channel group.
  • the numbers of these 8 transmission channel groups are sequentially from 0 to 7, and it can be specified that the polling sequence of the odd-numbered transmission channel group precedes the polling sequence of the even-numbered transmission channel group.
  • FIG. 15 takes as an example that the length of the coding unit is 68 bytes.
  • the sending end polls and distributes at least one unit of the first type to 16 transmission channels according to the length of 68 bytes.
  • the M coding units may be distributed to the 8 transmission channel groups in sequence according to the distribution sequence of the data after the first identification. After 4 distribution cycles, 4 coding units can be completely distributed to 16 transmission channels. That is, after one round, 4 coding units can be completely distributed to 16 transmission channels, as shown in Figure 15.
  • the first round payload in FIG. 15 includes code blocks A0-A65, B0-B65, C0-C65, and D0-D65 in the first round.
  • the polling order of one transmission channel group in two adjacent transmission channel groups is located before the polling order of the other transmission channel group, for example, the polling order of the odd transmission channel group is located in the even transmission channel group. before the polling sequence.
  • the first identification A to the first identification D are distributed in transmission channel 0, transmission channel 1, transmission channel 4, transmission channel 5, transmission channel 8, transmission channel 9, transmission channel 12, transmission channel 13, and There is no first identification on other transmission channels. If the distribution rules of the previous round are followed when the encoding units are distributed in the next round, that is, the fifth to eighth encoding units are distributed, then after distribution, the first identifiers are still distributed in transmission channel 0, transmission channel 1, and transmission channel 4.
  • transmission channel 5, transmission channel 8, transmission channel 9, transmission channel 12, transmission channel 13, and other transmission channels still do not have the first identification.
  • DC equalization adjustment is performed on the data stream through the first identifier, only DC equalization adjustment of some transmission channels can be realized, and DC equalization adjustment of all transmission channels cannot be realized, thereby affecting the effect of DC equalization adjustment.
  • the distribution rules can be adjusted so that the probability of the first identifier appearing in each transmission channel is the same, so as to achieve DC equalization of all transmission channels. For example, it may be specified that the polling order of the even-numbered transmission channel group precedes the polling order of the odd-numbered transmission channel group. That is, when the 5th to 8th coding units are distributed in the second round, the data can be distributed first and then the first identifier can be distributed, that is, the polling sequence of the first identifier is located after the polling sequence of some payloads, for example, the transmission channel 0 And the data of transmission channel 1 is exchanged with the data of transmission channel 2 and transmission channel 3, as shown in Figure 15.
  • the fifth to eighth coding units are distributed, and the first identification E to the first identification H are distributed in transmission channel 2, transmission channel 3, transmission channel 6, transmission channel 7, transmission channel 10, transmission channel 11, transmission channel 14, Transmission channel 15.
  • the number of first identifiers on each transmission channel is the same.
  • the distribution rules of the third round of distribution coding units are the same as those of the first round, and the distribution rules of the fourth round of distribution of the coding units are the same as the distribution rules of the second round, so the first sign appears on each transmission channel. The probability is the same.
  • adjusting the polling sequence of the transmission channel group is to adjust the polling sequence of the load carried by the transmission channel group together. That is, in each polling period, each transmission channel corresponds to the fixed position load in the coding unit, as shown in FIG. 15 .
  • the numbers of the payloads carried by the transmission channel 0 where the first identifier A to the first identifier I are located are 14, 30, 46, and 62, and the numbers of the payloads carried by the transmission channel 0 where the first identifier A to the first identifier I are located are 15, 31, 47, 63. Since in each polling period, each transmission channel corresponds to the fixed position load in the coding unit, it is easy for the receiving end to decode, and the complexity of the realization of the receiving end can be reduced.
  • the 12 transmission channels two adjacent transmission channels are a transmission channel group, that is, transmission channel 0 and transmission channel 1 are a group of transmission channels, transmission channel 2 and transmission channel 3 are a group, and so on, there are 6 Transmission channel group.
  • the numbers of the 6 transmission channel groups are sequentially from 0 to 5, and it can be specified that the polling order of the odd-numbered transmission channel group precedes the polling order of the even-numbered transmission channel group.
  • FIG. 16 takes as an example that the length of the coding unit is 68 bytes.
  • the sending end polls and distributes at least one unit of the first type to 12 transmission channels according to the length of 68 bytes. Similar to Example 1, the M coding units are distributed to the 6 transmission channel groups in sequence according to the distribution sequence of the first identification and then the data. After 3 distribution cycles (that is, after one round), 3 coding units can be completely distributed to 12 transmission channels, as shown in FIG. 16 .
  • the first round payload in FIG. 16 includes code blocks A0-A65, B0-B65, and C0-C65 in the first round. It can be seen from Fig. 16 that the polling sequence of the first identifier in the three coding units is located before the polling sequence of the payload.
  • the first identifier A to the first identifier C are distributed on the transmission channel 0, the Channel 1, transmission channel 4, transmission channel 5, transmission channel 8, transmission channel 9, and other transmission channels do not have a first identification. If the 4th to 6th coding units are distributed in the next round, the distribution rules of the previous round are followed, then after distribution, the first identifiers are still distributed in transmission channel 0, transmission channel 1, transmission channel 4, transmission channel 5, transmission channel 5, and transmission channel 5. Channel 8, transmission channel 9, and other transmission channels still do not have the first logo.
  • the distribution rules can be adjusted so that the probability of the first identifier appearing in each transmission channel is the same, so as to realize DC equalization of all transmission channels. For example, it may be specified that the polling order of the even-numbered transmission channel group precedes the polling order of the odd-numbered transmission channel group. That is, when the 4th to 6th coding units are distributed in the second round, the data may be distributed first and then the first identifier is distributed, that is, the polling sequence of the first identifier is located after the polling sequence of the partial payload. For example, the data of transmission channel 0 and transmission channel 1 are exchanged with the data of transmission channel 2 and transmission channel 3, as shown in FIG. 16 .
  • the fourth to sixth coding units are distributed in this way, and the first identifiers D to F are distributed on transmission channel 2 , transmission channel 3 , transmission channel 6 , transmission channel 7 , transmission channel 10 , and transmission channel 11 .
  • the number of first identifiers on each transmission channel is the same.
  • the distribution rules of the third round of distribution coding units are the same as those of the first round, and the distribution rules of the fourth round of distribution of the coding units are the same as the distribution rules of the second round, so the first sign appears on each transmission channel. The probability is the same.
  • each transmission channel corresponds to the fixed position load in the encoding unit, which is easy to realize at the receiving end.
  • the adjacent 2 transmission channels are a transmission channel group, that is, transmission channel 0 and transmission channel 1 are a group of transmission channels, transmission channel 2 and transmission channel 3 are a group, and so on, there are 4 transmission channels.
  • Transmission channel group The numbers of the four transmission channel groups are sequentially from 0 to 3, and it can be specified that the polling sequence of the odd-numbered transmission channel group precedes the polling sequence of the even-numbered transmission channel group.
  • the adjacent 2 transmission channels are a transmission channel group, that is, transmission channel 0 and transmission channel 1 are a group
  • the first round payload in Figure 17 includes code blocks A0-A65 and B0-B65 in the first round. It can be seen from FIG. 17 that the polling sequence of the first identifier in the two coding units is located before the polling sequence of the payload.
  • the first identifier A to the first identifier B are distributed in Channel 1, transmission channel 4, transmission channel 5, and other transmission channels do not have a first identification. If the distribution rules of the previous round are followed when the 3rd to 4th coding units are distributed in the next round, after the distribution, the first identifiers are still distributed in transmission channel 0, transmission channel 1, transmission channel 4, transmission channel 5, and others. There is still no first identification on the transmission channel.
  • the distribution rules can be adjusted so that the probability of the first identifier appearing in each transmission channel is the same, so as to realize DC balance of all transmission channels. For example, it may be specified that the polling order of the even-numbered transmission channel group precedes the polling order of the odd-numbered transmission channel group. That is, when the 3rd to 4th coding units are distributed in the second round, the data may be distributed first and then the first identifier is distributed, that is, the polling sequence of the first identifier is located after the polling sequence of the partial payload. For example, the data of transmission channel 0 and transmission channel 1 are exchanged with the data of transmission channel 2 and transmission channel 3, as shown in FIG. 17 .
  • the third to fourth coding units are distributed in this way, and the first identifier C and the first identifier D are distributed on the transmission channel 2 , the transmission channel 3 , the transmission channel 6 , and the transmission channel 7 .
  • the number of first identifiers on each transmission channel is the same.
  • the distribution rules of the third round of distribution coding units are the same as those of the first round, and the distribution rules of the fourth round of distribution of the coding units are the same as the distribution rules of the second round, so the first sign appears on each transmission channel. The probability is the same.
  • each transmission channel corresponds to a fixed position load in the encoding unit, which is easy to implement at the receiving end.
  • the 16 transmission channels adjacent to 2 transmission channels are a transmission channel group, that is, transmission channel 0 and transmission channel 1 are a group of transmission channels, transmission channel 2 and transmission channel 3 are a group, and so on, there are 8 transmission channels channel group.
  • the numbers of these 8 transmission channel groups are sequentially from 0 to 7, and it can be specified that the polling sequence of the odd-numbered transmission channel group precedes the polling sequence of the even-numbered transmission channel group.
  • FIG. 18 takes as an example that the length of the coding unit is 66 bytes.
  • the sending end polls and distributes at least one unit of the first type to 16 transmission channels according to the length of 66 bytes.
  • the M coding units may be distributed to the 16 transmission channels in sequence according to the distribution sequence of the data after the first identification. After 8 distribution cycles, that is, 8 coding units can be completely distributed to 16 transmission channels. That is, after one round, 8 coding units can be completely distributed to 16 transmission channels, as shown in Figure 18. It can be seen from FIG. 18 that after a round of distribution of 8 coding units, the first identifiers are evenly distributed in transmission channel 0 to transmission channel 15.
  • each transmission channel corresponds to a fixed position load in the coding unit, which is easy to implement at the receiving end.
  • FIG. 19 takes as an example that the length of the coding unit is 82 bytes.
  • the sending end polls and distributes at least one unit of the first type to 12 transmission channels according to the length of 82 bytes.
  • the M coding units may be distributed to the 12 transmission channels in sequence according to the distribution sequence of the data after the first identification. It can be seen from FIG. 19 that after one round of distribution of the 6 coding units, the first identifiers are evenly distributed in the transmission channel 0 to the transmission channel 11. If the distribution rules of the previous round are followed when the coding units are distributed in the next round, that is, when the 7th to 12th coding units are distributed, then after distribution, the first identifiers are still evenly distributed in transmission channels 0 to 11. In this way, when the 7th to 12th coding units are distributed in the next round, the distribution rules may not be adjusted. Similar to Example 1, in each polling period, each transmission channel corresponds to a fixed position load in the encoding unit, which is easy to implement at the receiving end.
  • the polling sequence of the N transmission channels in one round is the same as an example.
  • This embodiment of the present application does not limit this.
  • the polling sequence of different transmission channel groups in the N transmission channels in a round may also be different, as long as the probability of the first identifier appearing on each transmission channel can be the same after multiple rounds of distribution. That's it.
  • Example 1 to Example 5 taking one transmission channel carrying 8 bits of payload as an example, then the first identifier, namely 16 bits, is carried in two transmission channels, and it can be considered that one transmission channel in these two transmission channels can carry the first 8 bits of 16 bits. , and another transmission channel carries the last 8 bits of the 16 bits. Since the number of "0" and "1" in the first 8bit and the last 8bit of 16bit are the same, the DC balance of each transmission channel can be guaranteed.
  • the receiving end decodes the M coding units according to the first identifier included in the at least one first-type unit to obtain L frames.
  • the receiving end receives M coding units from the N transmission channels.
  • the receiving rule for the receiving end to receive M coding units from the N transmission channels corresponds to the distribution rule for the sending end to distribute the M coding units.
  • the sending end polls and distributes at least one first-type unit according to the length of the above examples 1 to 3, that is, the length of 68 bytes, then the receiving end receives at least one first-type unit from N transmission channels according to the length of 68 bytes. unit.
  • the receiving end can determine the transmission channel where the first mark is located in each round according to the distribution rules of each round, and then determine the position of the first mark, decode the received coding unit according to the first mark, and obtain L frame.
  • the receiving end before encoding the data, by inserting a first identifier for identifying the start position of the frame header of each frame in the L frames, the receiving end can define each frame.
  • the insertion of the first identifier can control the number of continuous "0" and continuous "1" in the entire data stream, the DC baseline drift is avoided, and the receiving end can correctly parse each frame.
  • the first identifier can be generated by an error correction and error detection codeword, so that the protection of the first identifier can be realized, and verification information for protecting the first identifier cannot be additionally set, which can reduce coding overhead.
  • the first identification itself can realize DC balance, even if the payload in the coding unit is scrambled, DC balance can be better achieved for the entire coding unit, so as to ensure that the PAM4 modulation method and the NRZ modulation method are used. satisfies DC equilibrium.
  • the first identifier since the first identifier can be generated through error correction and error detection codewords, the first identifier itself has error correction capability, so even if some bits of the first identifier are adjusted, the receiving end can correct them by correcting them without affecting the Identification of the first identification. Therefore, DC balance of any data stream within a certain length range can be guaranteed by adjusting some bits of the first identifier.
  • the transmitting end and the receiving end may include hardware structures and/or software modules, and implement the above functions in the form of hardware structures, software modules, or hardware structures plus software modules . Whether one of the above functions is performed in the form of a hardware structure, a software module, or a hardware structure plus a software module depends on the specific application and design constraints of the technical solution.
  • FIG. 20 is a schematic structural diagram of a communication apparatus 2000 provided by an embodiment of the present application.
  • the communication apparatus 2000 can correspondingly implement the functions or steps implemented by the sending end or the receiving end in the above-mentioned method embodiments.
  • the communication device may be a network device (for example, a switch), or a chip or circuit, such as a chip or circuit that can be provided in the network device.
  • the communication apparatus 2000 may include a processor 2001 and a transceiver 2002, wherein the processor 2001 and the transceiver 2002 may be connected through a bus system.
  • the communication device may further include a memory, and the storage unit may be used to store instructions (codes or programs) and/or data.
  • the transceiver 2002 and the processor 2001 may be coupled with the storage unit, for example, the processor 2001 may read instructions (codes or programs) and/or data in the storage unit to implement a corresponding method.
  • the above-mentioned units may be set independently, or may be partially or fully integrated, for example, the transceiver 2002 may include a transmitter and a receiver set independently.
  • the transceiver 2002 may also be a communication interface 2003, or the transceiver 2002 may further include a communication interface 2003, the communication interface 2003 is used for inputting and/or outputting information; the processor 2001 is used for executing a computer program Or an instruction, so that the communication apparatus 2000 implements the method of the sending end or the receiving end in the above-mentioned related solution of FIG. 4 . Because the communication interface 2003 is optional, it is illustrated in dashed lines in FIG. 20 .
  • the above-mentioned processor 2001 may be a chip.
  • the processor may be a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a system on chip (SoC), or a It is a central processing unit (CPU), a network processor (NP), a digital signal processing circuit (DSP), or a microcontroller (microcontroller unit). , MCU), it can also be a programmable logic device (PLD) or other integrated chips.
  • FPGA field programmable gate array
  • ASIC application specific integrated circuit
  • SoC system on chip
  • MCU microcontroller unit
  • MCU programmable logic device
  • PLD programmable logic device
  • each step of the above-mentioned method can be completed by a hardware integrated logic circuit in a processor or an instruction in the form of software.
  • the steps of the methods disclosed in conjunction with the embodiments of the present application may be directly embodied as executed by a hardware processor, or executed by a combination of hardware and software modules in the processor.
  • the software modules may be located in random access memory, flash memory, read-only memory, programmable read-only memory or electrically erasable programmable memory, registers and other storage media mature in the art.
  • the storage medium is located in the memory, and the processor reads the information in the memory, and completes the steps of the above method in combination with its hardware.
  • processor 2001 in this embodiment of the present application may be an integrated circuit chip, which has a signal processing capability.
  • each step of the above method embodiments may be completed by a hardware integrated logic circuit in a processor or an instruction in the form of software.
  • the aforementioned processors may be general purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components .
  • DSPs digital signal processors
  • ASICs application specific integrated circuits
  • FPGAs field programmable gate arrays
  • the methods, steps, and logic block diagrams disclosed in the embodiments of this application can be implemented or executed.
  • a general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
  • the steps of the method disclosed in conjunction with the embodiments of the present application may be directly embodied as executed by a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor.
  • the software modules may be located in random access memory, flash memory, read-only memory, programmable read-only memory or electrically erasable programmable memory, registers and other storage media mature in the art.
  • the storage medium is located in the memory, and the processor reads the information in the memory, and completes the steps of the above method in combination with its hardware.
  • the memory in this embodiment of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memory.
  • the non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically programmable Erase programmable read-only memory (electrically EPROM, EEPROM) or flash memory.
  • Volatile memory may be random access memory (RAM), which acts as an external cache.
  • RAM random access memory
  • DRAM dynamic random access memory
  • SDRAM synchronous DRAM
  • SDRAM double data rate synchronous dynamic random access memory
  • ESDRAM enhanced synchronous dynamic random access memory
  • SLDRAM synchronous link dynamic random access memory
  • direct rambus RAM direct rambus RAM
  • the communication apparatus 2000 can correspondingly implement the behaviors and functions of the sender in the foregoing method embodiments.
  • the communication apparatus 2000 may be a transmitter, and may also be a component (eg, a chip or a circuit) applied to the transmitter.
  • the communication apparatus 2000 may include a processor 2001 and a transceiver 2002, and the transceiver 2002 may be used to perform all receiving or sending operations performed by the transmitting end in the embodiment shown in FIG. 4 , for example, in the embodiment shown in FIG. 4 .
  • the processor 2001 is configured to perform operations other than all receiving or sending operations performed by the sender in the embodiment shown in FIG. 4, for example, FIG. 4 S401 in the illustrated embodiment, and/or other processes for supporting the techniques described herein.
  • the processor 2001 is configured to generate M coding units, where the M coding units are obtained by encoding L frames, the M coding units include at least one first type unit, the first type unit includes a first identifier, and the first type unit includes a first identifier.
  • An identifier is used to indicate the starting position of the frame header of the first frame of the L frames in the first type unit, the M is an integer greater than or equal to 1, and the L is greater than or equal to 1 integer;
  • the processor 2001 is configured to distribute the M coding units to N transmission channels, where N is an integer greater than or equal to 1.
  • the first type of unit includes a first field and a second field, the first field is used to carry the first identifier, and the second field is used to carry one or more of the L frames Some or all of the data in the frame.
  • the unit of the first type further includes a third field, where the third field is used to carry verification information for verifying the unit of the first type.
  • the M coding units further include at least one unit of the second type, where the unit of the second type includes a second field, wherein the data carried by the first unit belongs to the first unit in the second unit Identifies the corresponding frame, the first unit is one unit of the at least one second type unit, the second unit is one unit of the at least one first type unit, and the second unit is one unit.
  • the first identification is the first identification preceding the first unit.
  • the second field includes K subfields, and the number of bits occupied by each subfield in the K subfields is the same, or the number of bits occupied by at least two subfields in the K subfields is different .
  • the start position of the frame header of the first frame is the start position of the first subfield in the K subfields.
  • the first identifier includes X bits, and the X bits satisfy DC equalization in a PAM4 modulation manner.
  • the X bits also satisfy DC equalization in the NRZ modulation manner.
  • X is equal to 16, the first identifier comprising 111001001110110010010010010000001111, 10000110011000000001100111, 110110000000111, or 00010110000000000000011, or 000101100011011.
  • the X bits are obtained by adjusting the bit order of the eBCH codeword according to a preset rule.
  • the at least one unit of the first type is polled and distributed to N transmission channels with a fixed length.
  • the distribution order of the first identifier of the third unit in the at least one first type of unit precedes the distribution order of the payload.
  • the distribution sequence of the first identifier of the fourth unit in the at least one first type unit is located after the distribution sequence of the partial payloads.
  • the N transmission channels include P transmission channel groups, wherein, in the first round, the polling order of the first transmission channel group in the P transmission channel groups is located in the P transmission channel groups before the polling sequence of the second transport channel group.
  • the polling order of the first transmission channel group is located after the polling order of the second transmission channel group.
  • the transceiver 2002 before sending the M coding units, is further configured to:
  • any one of the N transmission channels according to the DC balance of the transmission channel, adjust some bits of one or more first identifiers in the transmission channel.
  • the communication apparatus 2000 can correspondingly implement the behaviors and functions of the receiving end in the foregoing method embodiments.
  • the communication apparatus 2000 may be a receiving end, or may be a component (eg, a chip or a circuit) applied to the receiving end.
  • the communication apparatus 2000 may include a processor 2001 and a transceiver 2002, and the transceiver 2002 may be used to perform all receiving or sending operations performed by the transmitting end in the embodiment shown in FIG. 4 , for example, in the embodiment shown in FIG. 4 .
  • the processor 2001 is configured to perform operations other than all receiving or sending operations performed by the sender in the embodiment shown in FIG. 4, for example, FIG. 4 S403 in the illustrated embodiment, and/or other processes for supporting the techniques described herein.
  • the transceiver 2002 is configured to receive M coding units from N transmission channels, where the M coding units are obtained by encoding L frames, and the M coding units include at least one first type unit, the first type The unit includes a first identifier, the first identifier is used to indicate the position of the frame header of the first frame in the L frames in the first type unit, M is an integer greater than or equal to 1, and L is greater than or equal to 1 , where N is an integer greater than or equal to 1;
  • the processor 2001 is configured to decode the M coding units according to at least one first identifier to obtain the L frames.
  • the first type of unit includes a first field and a second field, the first field is used to carry the first identifier, and the second field is used to carry one or more of the L frames Some or all of the data in the frame.
  • the unit of the first type further includes a third field, where the third field is used to carry verification information for verifying the unit of the first type.
  • the M coding units further include at least one unit of the second type, where the unit of the second type includes a second field, wherein the data carried by the first unit belongs to the first unit in the second unit Identifies the corresponding frame, the first unit is one unit of the at least one second type unit, the second unit is one unit of the at least one first type unit, and the second unit is one unit.
  • the first identification is the first identification preceding the first unit.
  • the second field includes K subfields, and the number of bits occupied by each subfield in the K subfields is the same, or the number of bits occupied by at least two subfields in the K subfields is different .
  • the start position of the frame header of the first frame is the start position of the first subfield in the K subfields.
  • the first identifier includes X bits, and the X bits satisfy DC equalization in a PAM4 modulation manner.
  • the X bits also satisfy DC equalization in the NRZ modulation manner.
  • the X is equal to 16, the first identifier comprising 11100100111011000010011000010000001111100001100110000000000111110000100110000000000001111, 01100000000000000001111, 0110000000000011,.
  • the X bits are obtained by adjusting the bit order of the eBCH codeword according to a preset rule.
  • the transceiver 2002 is specifically configured to receive the M coding units from the N transmission channels with a fixed length.
  • the distribution order of the first identifier of the third unit in the at least one first type of unit precedes the distribution order of the payload.
  • the distribution sequence of the first identifier of the fourth unit in the at least one first type unit is located after the distribution sequence of the partial payloads.
  • the N transmission channels include P transmission channel groups, wherein the polling order of the first transmission channel group in the P transmission channel groups is located in the P transmission channel groups before the polling sequence of the second transport channel group.
  • the polling order of the first transmission channel group is located after the polling order of the second transmission channel group.
  • FIG. 21 shows another schematic structural diagram of the communication device provided by the embodiment of the present application.
  • the communication device 2100 may include a processing module 2101 and a transceiver module 2102.
  • the division of the units of the communication device 2100 is only It is a division of logical functions, which can be fully or partially integrated into a physical entity in actual implementation, or can be physically separated.
  • the transceiver module 2102 may be implemented by the transceiver 2002 shown in FIG. 20 above
  • the processing module 2101 may be implemented by the processor 2001 shown in FIG. 20 above.
  • the communication apparatus 2100 can correspondingly implement the steps performed by the transmitting end side and/or the receiving end side in the above method embodiments.
  • the communication apparatus 2100 may be a sending end, or may be a component (eg, a chip or a circuit) applied to the sending end.
  • the processing module 2101 is configured to generate M coding units, where the M coding units are obtained by encoding L frames, and the M coding units include at least one first type unit, where the first type unit includes The first identifier, the first identifier is used to indicate the starting position of the frame header of the first frame in the L frames in the first type unit, M is an integer greater than or equal to 1, and L is greater than or equal to 1. an integer equal to 1;
  • the transceiver module 2102 is configured to distribute the M coding units to N transmission channels, where N is an integer greater than or equal to 1.
  • the communication apparatus 2100 can correspondingly implement the behaviors and functions of the receiving end in the foregoing method embodiments.
  • the communication apparatus 2100 may be a receiving end, or may be a component (eg, a chip or a circuit) applied to the receiving end.
  • the transceiver module 2102 is configured to receive M coding units from N transmission channels, the M coding units are obtained by encoding L frames, and the M coding units include at least one unit of the first type, so The unit of the first type includes a first identifier, and the first identifier is used to indicate the position of the frame header of the first frame in the L frames in the unit of the first type, M is an integer greater than or equal to 1, and L is an integer greater than or equal to 1, and N is an integer greater than or equal to 1;
  • the processing module 2101 is configured to decode the M coding units according to at least one first identifier to obtain the L frames.
  • the above division of the modules of the communication apparatus 2100 is only a division of logical functions, and in actual implementation, all or part of the modules may be integrated into one physical entity, or may be physically separated.
  • the transceiver module 2102 may be implemented by the transceiver 2002 shown in FIG. 20 above, and the processing module 2101 may be implemented by the processor 2001 shown in FIG. 20 above.
  • Embodiments of the present application further provide a communication system, which includes the aforementioned communication device for executing the sending-side solution and a communication device for executing the receiving-side solution; or may further include more sending end or receiving end side scheme of the communication device.
  • the above communication device may be a chip, and the processor may be implemented by hardware or software.
  • the processor may be a logic circuit, an integrated circuit, etc.; when implemented by software
  • the processor can be a general-purpose processor, which is realized by reading the software codes stored in the memory, and the memory can be integrated in the processor, and can be located outside the processor and exist independently.
  • the present application also provides a computer program product, the computer program product includes: computer program code, when the computer program code is run on a computer, the computer causes the computer to execute the method of any one of the embodiments shown in FIG. 4 .
  • the present application further provides a computer-readable storage medium, where the computer-readable medium stores program codes, and when the program codes are run on a computer, the computer is made to execute the implementation shown in FIG. 4 .
  • At least one (a) of a, b or c can represent: a, b, c, a and b, a and c, b and c, or a, b and c, where a, b, c Can be single or multiple.
  • the ordinal numbers such as “first” and “second” mentioned in the embodiments of the present application are used to distinguish multiple objects, and are not used to limit the order, sequence, priority or priority of multiple objects. Importance.
  • the first information and the second information are only for differentiating different indication information, and do not indicate the difference in priority or importance of the two kinds of information.
  • the size of the sequence numbers of the above-mentioned processes does not mean the sequence of execution, and the execution sequence of each process should be determined by its functions and internal logic, and should not be dealt with in the embodiments of the present application. implementation constitutes any limitation.
  • the word "exemplary” is used to indicate an example or illustration. Any embodiment or implementation described in this application summary as an “example” should not be construed as preferred over other embodiments or implementations. That is, the use of the word “example” is intended to present concepts in a concrete manner.
  • the methods provided in the embodiments of the present application may be implemented in whole or in part by software, hardware, firmware, or any combination thereof.
  • software When implemented in software, it can be implemented in whole or in part in the form of a computer program product.
  • the computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present invention are generated.
  • the computer may be a general purpose computer, a special purpose computer, a computer network, network equipment, user equipment, or other programmable apparatus.
  • the computer instructions may be stored in or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be downloaded from a website site, computer, server, or data center Transmission to another website site, computer, server or data center by means of wired (such as coaxial cable, optical fiber, digital subscriber line, DSL for short) or wireless (such as infrared, wireless, microwave, etc.)
  • a computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains an integration of one or more available media.
  • the available media can be magnetic media (eg, floppy disks, hard disks, magnetic tape), optical media (eg, digital video disc (DVD) for short), or semiconductor media (eg, SSD), and the like.
  • the size of the sequence numbers of the above-mentioned processes does not mean the sequence of execution, and the execution sequence of each process should be determined by its functions and internal logic, and should not be dealt with in the embodiments of the present application. implementation constitutes any limitation.
  • the word "exemplary” is used to indicate an example or illustration. Any embodiment or implementation described in this application summary as an “example” should not be construed as preferred over other embodiments or implementations. That is, the use of the word “example” is intended to present concepts in a concrete manner.

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Abstract

本申请公开一种数据编码方法、数据解码方法及通信装置，其中数据编码方法包括：生成M个编码单元以及将M个编码单元分发到N个传输通道，M个编码单元是对L个帧进行编码得到的，M个编码单元包括至少一个第一类单元，第一类单元包括第一标识，第一标识用于指示L个帧中的第一帧的帧头在第一类单元中的开始位置。本申请在对L个帧进行编码之后，将数据划分到M个编码单元，通过第一标识来指示每个编码单元包括的帧头的开始位置，实现对各个帧的定界。通过编码设计可使得第一标识本身具有一定的纠错能力，同时满足NRZ调制和PAM4调制下的直流均衡。且通过对第一标识的部分比特的调整，实现对各个传输链路上所传输数据的直流均衡。

Description

一种数据编码方法、数据解码方法及通信装置
相关申请的交叉引用
本申请要求在2020年09月24日提交中国专利局、申请号为202011019513.9、申请名称为“一种数据编码方法、数据解码方法及通信装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及数据编码技术领域，尤其涉及一种数据编码方法、数据解码方法及通信装置。
背景技术
为了保证数据传输的可靠性和质量，通常发送侧会对要传输的数据进行编码，以使得传输的数据符合传输通道的特征。数据编码实质上是一种映射规则，例如将m比特信息映射为n比特信息。
常见的数据编码方式包括8b/10b编码、64b/66b编码、128b/130b编码，以及256b/257b转码等。其中，8b/10b编码开销较大。64b/66b编码开销相比8b/10b编码开销小，但是由于“01”和“10”会引入比较大的基线漂移，所以64b/66b编码采用PAM4调制无法保证较好的信号直流均衡，即64b/66b编码对PAM4调制方式不友好。128b/130b编码在64b/66b编码的基础上进一步降低编码开销，但同64b/66b编码类型，128b/130b编码采用PAM4调制无法保证较好的信号直流均衡。为了进一步降低编码开销，引入了256b/257b转码方案，该转码方案以64b/66b为基础转码得到，该转码方案继承64b/66b编码的缺点。另外，256b/257b转码方案存在257，即比较大的素数，限制了里的索罗门编码(reed-solomon forward error，RS-FEC)的设计灵活性，时延较大。
即现有的8b/10b编码、64b/66b编码、128b/130b编码，以及256b/257b转码无法兼顾编码开销的需求、时延需求以及信号直流均衡的需求。
发明内容
本申请提供一种数据编码方法、数据解码方法及通信装置，能够保证在4阶脉冲幅度调制(4Pulse Amplitude Modulation，PAM4)调制下达到直流平衡，降低数据传输的时延。
第一方面，本申请实施例提供一种数据编码方法，该方法可由第一通信装置执行，第一通信装置可以是通信设备或能够支持通信设备实现该方法所需的功能的通信装置，例如芯片系统。下面以所述通信设备为发送端为例进行描述，其中，发送端可以是具有以太网接口装置或者发送端也可以是具有互联网技术(internet technolog，IT)接口的装置，发送端也可以是以太网接口或IT接口等。该方法包括：
生成M个编码单元，并将M个编码单元分发到N个传输通道，其中，该M个编码单元是对L个帧进行编码得到的，这M个编码单元包括至少一个第一类单元，第一类单元包括第一标识，第一标识用于指示所述L个帧中的第一帧的帧头在所述第一类单元中的开 始位置，M为大于或等于1的整数，L为大于或等于1的整数，N为大于或等于1的整数。
本申请实施例在对L个帧进行编码之后，将数据划分到M个编码单元，通过第一标识来指示每个编码单元包括的帧头的开始位置，可实现接收端对各个帧的界定。另外，第一标识可控制整个数据流中连续“0”和连续“1”的个数，便于接收端的时钟恢复电路正常工作，避免时钟漂移。且可使得第一标识本身可实现信号直流均衡，即使对编码单元中的有效载荷进行扰码，对于整个编码单元来说，还是能够较好地实现信号直流均衡，从而能够保证在PAM4调制方式和NRZ调制方式下满足信号直流均衡。
在一种可能的实现方式中，所述第一类单元包括第一字段和第二字段和第三字段，所述第一字段用于承载所述第一标识，所述第二字段用于承载所述L个帧中一个或多个帧中的部分或全部数据，所述第三字段用于承载用于校验所述第一类单元的校验信息。
该方案提供了第一类单元的一种结构，即包括用于承载第一标识的第一字段，承载数据的第二字段，以及承载校验第一类单元的校验信息的第三字段。预先可规定各个字段的长度，这样便于接收端解码第一类单元。
在一种可能的实现方式中，所述第一类单元包括第一字段和第二字段，所述第一字段用于承载所述第一标识，所述第二字段用于承载所述L个帧中一个或多个帧中的部分或全部数据。
该方案提供了第一类单元的一种结构，即包括承载第一标识的第一字段，承载数据的第二字段。该结构下第一类单元不再对该单元中的数据进行单独校验，那么第一类单元所承载的载荷的可靠性由上层帧自带的校验位保证。该方案可进一步压缩编码单元的开销，提高编码单元的承载率。
在一种可能的实现方式中，所述M个编码单元还包括至少一个第二类单元，所述第二类单元包括第二字段，其中，第一单元所承载的数据属于第二单元中的第一标识对应的帧，所述第一单元为所述至少一个第二类单元中的一个单元，所述第二单元为所述至少一个第一类单元中的一个单元，所述第二单元为所述第一单元的前一个第一类单元。
该方案中，用于承载第一标识的第一字段可用于承载数据，以提高编码单元的承载效率。对于接收端而言，接收端可确定一个第二类单元承载的有效载荷属于该第二类单元的前一个第一类单元中第一标识对应的帧；或者接收端可确定连续的多个第二类单元承载的有效载荷属于该连续的多个第二类单元的前一个第一类单元中第一标识对应的帧。
在一种可能的实现方式中，所述第二字段包括K个子字段，所述K个子字段中每个子字段占用的比特数相同，或者，所述K个子字段中至少两个子字段占用的比特数不相同。
该方案中，L个帧的有效载荷承载于K个子字段，不同帧的有效载荷可承载于同一个编码单元的不同子字段，该方案不限制K个子字段的长度，K个子字段中各个子字段的长度也可以相同，也可以不相同，以提高承载载荷的灵活度。
在一种可能的实现方式中，所述第一帧的帧头的开始位置为所述K个子字段的中的第一子字段的开始位置。该方案规定了第一帧的帧头的开始位置，接收端可从接收的编码单元中明确知道帧头的开始位置，以实现对各个帧的定界。
在一种可能的实现方式中，所述第一标识包括X个比特，所述X个比特在4阶脉冲幅度调制PAM4调制方式下满足直流均衡。
在一种可能的实现方式中，所述X个比特还在非归零NRZ调制方式下满足直流均衡。
该方案中，第一标识自身可满足信号直流均衡，这样的话，即使对编码单元中的有效 载荷进行扰码，对于整个编码单元来说，还是能够较好地实现信号直流均衡，从而能够保证在PAM4调制方式和NRZ调制方式下满足信号直流均衡。
在一种可能的实现方式中，所述X等于16，所述第一标识包括1110010011100100、0010011111011000、0110001110000111、1000011101100011、0111100010011100、1001110001111000、1101100000100111或0001101100011011。该方案提供了第一标识的具体实现形式。例如X个比特是根据预设规则调整eBCH码字的比特位顺序获得的。由于该第一标识可通过eBCH码字，即纠错检错码字生成，实现对第一标识的保护，无需另外设置用于保护第一标识的校验信息，可降低编码开销。
在一种可能的实现方式中，以固定长度将所述至少一个第一类单元轮询分发到N个传输通道。
示例性的，所述至少一个第一类单元中的第三单元的第一标识的分发顺序位于有效载荷的分发顺序之前。即至少第一类单元以固定长度，按照先第一标识后有效载荷的分发顺序将至少一个第一类单元中分发到N个传输通道，较为简单。
进一步地，所述至少一个第一类单元中的第四单元的第一标识的分发顺序位于部分有效载荷的分发顺序之后。即至少一个第一类单元中的某些单元的第一标识的分发顺序位于有效载荷的分发顺序之前，至少一个第一类单元中的某些单元的第一标识的分发顺序位于部分有效载荷的分发顺序之后。也就是同一轮或者不同轮中，第一类单元的第一标识的分发顺序可能不相同。例如前一轮按照第一标识的分发顺序位于有效载荷的分发顺序之前将第一类单元轮询分发之后，各个传输通道上的第一标识出现的概率不相同，那么下一次轮询时，可调整传输通道的分发顺序，以使得各个传输通道上的第一标识出现的概率相同，从而实现全部传输通道的信号直流均衡。
又一示例性的，N个传输通道包括P个传输通道组，其中，在第一轮中所述P个传输通道组中的第一传输通道组的轮询顺序位于所述P个传输通道组中的第二传输通道组的轮询顺序之前，在另一轮中，所述第一传输通道组的轮询顺序位于所述第二传输通道组的轮询顺序之后。即可对N个传输通道进行分组绑定，例如将相邻的两个传输通道绑定为一组，以传输通道组为单位，将M个编码单元分发到P个传输通道组。在不同轮中，同一传输通道组的轮询顺序可能不相同。例如如果某次轮询之后，各个传输通道上的第一标识出现的概率不相同，那么下一次轮询时，调整传输通道组的轮询顺序，以保证各个传输通道上的第一标识出现的概率相同，从而实现全部传输通道的信号直流均衡。由于以传输通道组为单位，调整传输通道组的轮询顺序也就是将该传输通道组承载的载荷的轮询顺序一并调整，利于接收端解码，可降低接收端实现的复杂度。
在一种可能的实现方式中，在发送所述M个编码单元之前，所述方法还包括：
针对所述N个传输通道中的任意一条传输通道，根据该传输通道的直流均衡情况，调整该传输通道中的一个或多个第一标识的部分比特位。该方案中，可认为第一标识通过纠错检错码字生成，那么第一标识本身具有纠错能力，这样即使调整第一标识的部分比特，接收端也可以通过对其进行纠错，不会影响对第一标识的识别。因此，可通过调整第一标识的部分比特保证一定长度范围内的任意数据流的信号直流均衡。
第二方面，本申请实施例提供一种数据解码方法，该方法可由第二通信装置执行，第二通信装置可以是通信设备或能够支持通信设备实现该方法所需的功能的通信装置，例如芯片系统。下面以所述通信设备为接收端为例进行描述，其中，发送端可以是具有以太网 接口装置或者发送端也可以是具有IT接口的装置，接收端也可以是以太网接口或IT接口等。该方法包括：
从N个传输通道中接收M个编码单元，该M个编码单元是对L个帧进行编码得到的，M个编码单元包括至少一个第一类单元，第一类单元包括第一标识，第一标识用于指示所述L帧中的第一帧的帧头在所述第一类单元中的位置，M为大于或等于1的整数，所述L为大于或等于1的整数，所述N为大于或等于1的整数；
根据至少一个第一标识解码所述M个编码单元，获得所述L个帧。
在一种可能的实现方式中，所述第一类单元包括第一字段和第二字段，第一字段用于承载所述第一标识，第二字段用于承载所述L个帧中一个或多个帧中的部分或全部数据。
在一种可能的实现方式中，所述第一类单元还包括第三字段，第三字段用于承载用于校验所述第一类单元的校验信息。
在一种可能的实现方式中，所述M个编码单元还包括至少一个第二类单元，第二类单元包括第二字段，其中，第一单元所承载的数据属于第二单元中的第一标识对应的帧，所述第一单元为所述至少一个第二类单元中的一个单元，所述第二单元为所述至少一个第一类单元中的一个单元，所述第二单元为所述第一单元的前一个第一类单元。
在一种可能的实现方式中，第二字段包括K个子字段，所述K个子字段中每个子字段占用的比特数相同，或者，所述K个子字段中至少两个子字段占用的比特数不相同。
在一种可能的实现方式中，所述第一帧的帧头的开始位置为所述K个字段的中的第一子字段的开始位置。
在一种可能的实现方式中，所述第一标识包括X个比特，所述X个比特在4阶脉冲幅度调制PAM4调制方式下满足直流均衡。
在一种可能的实现方式中，所述X个比特还在非归零NRZ调制方式下满足直流均衡。
在一种可能的实现方式中，所述X等于16，所述第一标识包括1110010011100100、0010011111011000、0110001110000111、1000011101100011、0111100010011100、1001110001111000、1101100000100111或0001101100011011。
在一种可能的实现方式中，以固定长度轮询从所述N个传输通道接收所述M个编码单元。
示例性的，所述至少一个第一类单元中的第三单元的第一标识的分发顺序位于有效载荷的分发顺序之前。
进一步地，所述至少一个第一类单元中的第四单元的第一标识的分发顺序位于部分有效载荷的分发顺序之后。
又一示例性的，N个传输通道包括P个传输通道组，其中，在第一轮中，所述P个传输通道组中的第一传输通道组的轮询顺序位于所述P个传输通道组中的第二传输通道组的轮询顺序之前。
进一步地，在第二轮中，P个传输通道组中的所述第一传输通道组的轮询顺序位于所述第二传输通道组的轮询顺序之后。
关于第二方面或第二方面的各种可能的实施方式所带来的技术效果，可以参考对第一方面或第一方面的各种可能的实施方式的技术效果的介绍。
第三方面，提供一种通信装置，该通信装置具有实现上述第一方面方法实施例中的行为的功能。所述功能可以通过硬件实现，也可以通过硬件执行相应的软件实现。所述硬件 或软件包括一个或多个与上述功能相对应的模块。在一种可能的实现方式中，包括处理器和收发器，其中：
所述处理器用于生成M个编码单元，该M个编码单元是对L个帧进行编码得到的，这M个编码单元包括至少一个第一类单元，第一类单元包括第一标识，第一标识用于指示所述L个帧中的第一帧的帧头在所述第一类单元中的开始位置，M为大于或等于1的整数，L为大于或等于1的整数；所述收发器用于将M个编码单元分发到N个传输通道，其中，N为大于或等于1的整数。
在一种可能的实现方式中，所述第一类单元包括第一字段和第二字段和第三字段，所述第一字段用于承载所述第一标识，所述第二字段用于承载所述L个帧中一个或多个帧中的部分或全部数据，所述第三字段用于承载用于校验所述第一类单元的校验信息。
在一种可能的实现方式中，所述第一类单元包括第一字段和第二字段，所述第一字段用于承载所述第一标识，所述第二字段用于承载所述L个帧中一个或多个帧中的部分或全部数据。
在一种可能的实现方式中，所述M个编码单元还包括至少一个第二类单元，所述第二类单元包括第二字段，其中，第一单元所承载的数据属于第二单元中的第一标识对应的帧，所述第一单元为所述至少一个第二类单元中的一个单元，所述第二单元为所述至少一个第一类单元中的一个单元，所述第二单元为所述第一单元的前一个第一类单元。
在一种可能的实现方式中，所述第二字段包括K个子字段，所述K个子字段中每个子字段占用的比特数相同，或者，所述K个子字段中至少两个子字段占用的比特数不相同。
在一种可能的实现方式中，所述第一帧的帧头的开始位置为所述K个子字段的中的第一子字段的开始位置。
在一种可能的实现方式中，所述第一标识包括X个比特，所述X个比特在4阶脉冲幅度调制PAM4调制方式下满足直流均衡。
在一种可能的实现方式中，所述X个比特还在非归零NRZ调制方式下满足直流均衡。
在一种可能的实现方式中，所述X等于16，所述第一标识包括1110010011100100、0010011111011000、0110001110000111、1000011101100011、0111100010011100、1001110001111000、1101100000100111或0001101100011011。
在一种可能的实现方式中，所述收发器具体用于以固定长度将所述至少一个第一类单元轮询分发到N个传输通道。
示例性的，所述至少一个第一类单元中的第三单元的第一标识的分发顺序位于有效载荷的分发顺序之前。
进一步地，所述至少一个第一类单元中的第四单元的第一标识的分发顺序位于部分有效载荷的分发顺序之后。
又一示例性的，N个传输通道包括P个传输通道组，其中，在第一轮中，所述P个传输通道组中的第一传输通道组的轮询顺序位于所述P个传输通道组中的第二传输通道组的轮询顺序之前。
进一步地，在第二轮中P个传输通道组中的所述第一传输通道组的轮询顺序位于所述第二传输通道组的轮询顺序之后。
在一种可能的实现方式中，在发送所述M个编码单元之前，所述收发器还用于：
针对所述N个传输通道中的任意一条传输通道，根据该传输通道的直流均衡情况，调 整该传输通道中的一个或多个第一标识的部分比特位。
关于第三方面或第三方面的各种可能的实施方式所带来的技术效果，可以参考对第一方面或第一方面的各种可能的实施方式的技术效果的介绍。
第四方面，提供一种通信装置，该通信装置具有实现上述第二方面方法实施例中的行为的功能。所述功能可以通过硬件实现，也可以通过硬件执行相应的软件实现。所述硬件或软件包括一个或多个与上述功能相对应的模块。在一种可能的实现方式中，包括处理器和收发器，其中：
所述收发器用于从N个传输通道中接收M个编码单元，该M个编码单元是对L个帧进行编码得到的，M个编码单元包括至少一个第一类单元，第一类单元包括第一标识，第一标识用于指示所述L帧中的第一帧的帧头在所述第一类单元中的位置，M为大于或等于1的整数，所述L为大于或等于1的整数，所述N为大于或等于1的整数；所述处理器用于根据至少一个第一标识解码所述M个编码单元，获得所述L个帧。
在一种可能的实现方式中，所述第一类单元包括第一字段和第二字段，第一字段用于承载所述第一标识，第二字段用于承载所述L个帧中一个或多个帧中的部分或全部数据。
在一种可能的实现方式中，所述第一类单元还包括第三字段，第三字段用于承载用于校验所述第一类单元的校验信息。
在一种可能的实现方式中，所述M个编码单元还包括至少一个第二类单元，第二类单元包括第二字段，其中，第一单元所承载的数据属于第二单元中的第一标识对应的帧，所述第一单元为所述至少一个第二类单元中的一个单元，所述第二单元为所述至少一个第一类单元中的一个单元，所述第二单元为所述第一单元的前一个第一类单元。
在一种可能的实现方式中，第二字段包括K个子字段，所述K个子字段中每个子字段占用的比特数相同，或者，所述K个子字段中至少两个子字段占用的比特数不相同。
在一种可能的实现方式中，所述第一帧的帧头的开始位置为所述K个字段的中的第一子字段的开始位置。
在一种可能的实现方式中，所述第一标识包括X个比特，所述X个比特在4阶脉冲幅度调制PAM4调制方式下满足直流均衡。
在一种可能的实现方式中，所述X个比特还在非归零NRZ调制方式下满足直流均衡。
在一种可能的实现方式中，所述X等于16，所述第一标识包括1110010011100100、0010011111011000、0110001110000111、1000011101100011、0111100010011100、1001110001111000、1101100000100111或0001101100011011。
在一种可能的实现方式中，所述收发器具体用于以固定长度轮询从所述N个传输通道接收所述M个编码单元。
示例性的，所述至少一个第一类单元中的第三单元的第一标识的分发顺序位于有效载荷的分发顺序之前。
进一步地，所述至少一个第一类单元中的第四单元的第一标识的分发顺序位于部分有效载荷的分发顺序之后。
又一示例性的，N个传输通道包括P个传输通道组，其中，在第一轮中，所述P个传输通道组中的第一传输通道组的轮询顺序位于所述P个传输通道组中的第二传输通道组的轮询顺序之前。
进一步地，在第二轮中，P个传输通道组中的所述第一传输通道组的轮询顺序位于所 述第二传输通道组的轮询顺序之后。
关于第四方面或第四方面的各种可能的实施方式所带来的技术效果，可以参考对第二方面或第二方面的各种可能的实施方式的技术效果的介绍。
第五方面，本申请实施例提供一种通信装置，该通信装置可以为上述实施例中第三方面或第四方面中的通信装置，或者为设置在第三方面或第四方面中的通信装置中的芯片。该通信装置包括通信接口以及处理器，可选的，还包括存储器。其中，该存储器用于存储计算机程序或指令或者数据，处理器与存储器、通信接口耦合，当处理器读取所述计算机程序或指令或数据时，使通信装置执行上述第一方面或第二方面方法实施例中由发送端或接收端所执行的方法。
应理解，该通信接口可以通过所述通信装置中的IT接口、以太网接口和编解码器等实现，或者，如果通信装置为设置在发送端或接收端中的芯片，则通信接口可以是该芯片的输入/输出接口，例如输入/输出管脚等。
第六方面，本申请实施例提供了一种芯片系统，该芯片系统包括处理器，还可以包括存储器，用于实现第三方面或第四方面中的通信装置执行的方法。在一种可能的实现方式中，所述芯片系统还包括存储器，用于保存程序指令和/或数据。该芯片系统可以由芯片构成，也可以包含芯片和其他分立器件。
第七方面，本申请实施例提供了一种通信系统，所述通信系统包括第三方面所述的通信装置和第四方面所述的通信装置。
第八方面，本申请提供了一种计算机可读存储介质，该计算机可读存储介质存储有计算机程序，当该计算机程序被运行时，实现上述各方面中由发送端执行的方法；或实现上述各方面中由接收端执行的方法。
第九方面，提供了一种计算机程序产品，所述计算机程序产品包括：计算机程序代码，当所述计算机程序代码被运行时，使得上述各方面中由发送端执行的方法被执行，或使得上述各方面中由接收端执行的方法被执行。
上述第五方面至第九方面及其实现方式的有益效果可以参考对第一方面或第二方面的方法及其实现方式的有益效果的描述。
附图说明
图1为一种通信接口的结构示意图；
图2为一个传输链路下的128b/130b编码格式；
图3为4个传输链路下的128b/130b编码格式；
图4为本申请实施例提供的数据编码方法的示意性流程图；
图5为本申请实施例提供的第一类单元的一种帧结构示意图；
图6为本申请实施例提供的将第一帧映射至第一类单元的映射方式示意图；
图7为本申请实施例提供的L个帧映射到M个编码单元的一种映射方式示意图；
图8为本申请实施例提供的第一类单元的另一种帧结构示意图；
图9为本申请实施例提供的将第一帧映射至第一类单元的映射方式示意图；
图10为本申请实施例提供的L个帧映射到M个编码单元的另一种映射方式示意图；
图11为本申请实施例提供的第一类单元的再一种帧结构示意图；
图12为本申请实施例提供的将第一帧映射至多个第一类单元的映射方式示意图；
图13为本申请实施例提供的第二类单元的一种帧结构示意图；
图14为本申请实施例提供的将帧映射到多个第一类单元和第二类单元的一种映射方式示意图；
图15为本申请实施例提供的按照68字节将M编码单元轮询到16个传输通道的分发规则示意图；
图16为本申请实施例提供的按照68字节将M编码单元轮询到12个传输通道的分发规则示意图；
图17为本申请实施例提供的按照68字节将M编码单元轮询到8个传输通道的分发规则示意图；
图18为本申请实施例提供的按照66字节将M编码单元轮询到16个传输通道的分发规则示意图；
图19为本申请实施例提供的按照82字节将M编码单元轮询到16个传输通道的分发规则示意图；
图20为本申请实施例提供的通信装置的一种结构示意图；
图21为本申请实施例提供的通信装置的另一种结构示意图。
具体实施方式
为了使本申请实施例的目的、技术方案和优点更加清楚，下面将结合附图对本申请实施例作进一步地详细描述。
请参见图1，示出了一种通信接口的结构，该通信接口可以是以太网接口，也可以是IT接口，或者其他可能传输信息的通信接口。以该通信接口是以太网接口为例，如图1所示，该通信接口可包括其他高层(higher layer)、媒质访问控制(media access control，MAC)层、物理编码子层(physical coding sublayer，PCS)、物理介质附加层(physical medium attachment，PMA)层，物理介质依附层(physical medium dependent，PMD)层。需要说明的是，图1仅示出了部分层，该通信接口还可包括其他可能的层，例如位于其他高层和MAC层之间的逻辑链路控制(logic link control，LLC)层、位于MAC层和PCS层之间的协调子层(reconciliation sublayer，RS)，位于PCS层和PMA层之间的里的索罗门编码(reed-solomon forward error，RS-FEC)子层等。应理解，对于不同的接口标准协议，各层的命名存在差异，本申请实施例不限制各种接口标准协议所涉及的层的名称。例如在一些接口标准协议中可能不存在MAC层，那么MAC层将数据传输给PCS层可以认为是上层将数据传输给PCS层。在下文的描述中，以本申请实施例应用于以太网接口为例。
当发送端发送数据流时，经过通信接口进行传输，自上而下依次涉及MAC层、RS层、PCS层、RS-FEC子层、PMA层和PMD层的处理，处理后的数据流体现为发送到链路媒质上的信号。接收端从链路媒质上接收信号，依次经PMD层、PMA层、RS-FEC子层、PCS层的处理，恢复出MAC层数据流，即接收端是发送端的逆过程。
为了保证数据传输的可靠性和质量，从PCS层到PMA层会涉及到数据编码，以使得传输的数据符合传输通道的特征。数据编码实质上是一种映射规则，例如将m比特(bit)信息映射为n比特信息。为便于本领域技术人员理解本申请实施例提供的技术方案，首先介绍几种常见的数据编码格式。
1)8b/10b编码，即m＝8，n＝10。8b/10b编码是将一组连续的8位数据分解成包括3位数 据的一组数据以及包括5位数据的一组数据，即两组数据，分别在这两组数据中添加特殊字符，经过编码后分别成为一组4位数据和一组6位数据，即10位数据。相反，解码是将输入的1组10位数据经过解码得到8位数据。由于8b/10b编码是将8bit数据和一些特殊字符按照特定的规则编码为10bit数据，因此可检测出传输过程中产生的单个或多个比特误码，在发现数据位的传输错误，可纠正该错误，尽量保证数据的正确传输。
8b/10b编码采用非回零(不归零)(non-return to zero，NRZ)调制，通过检测前一个字符的不均衡型来决定后一个字符的编码。即如果前一个字符是正不均衡性字符，则后一个就应该选择负不均衡性。这样每5个连续的“1”后必须插入一位“0”或每5个连续的“0”后必须插入一位“1”，即连续的“1”或“0”不超过5位。这种连续不均衡机制使得整个比特流中“0”、“1”数量保持基本一致，从而保证信号直流(direct current，DC)平衡。且由于连续的“1”或“0”不超过5位，所以接收端可认为连续5位后发生电平的跳变，这样可保证时钟恢复电路能正常工作，避免接收端时钟漂移或同步丢失而引起数据丢失，即保证发送端传输的数据在接收端能够被正确复原。
但是8b/10b编码实质上是在8bit有效载荷中插入2bit冗余，所以8b/10b编码的开销高达25％，编码效率低。为此，提出了较低开销的编码方式，例如编码开销是3.125％的64b/66b编码等。
2)64b/66b编码，即m＝64，n＝66。64b/66b编码是将64bit有效载荷转换为66bit码块的编码方式，由IEEE 802.3工作组定义。66bit码块由2bit同步头和64bit有效载荷构成。2bit同步头包括码块的第0比特和第1比特，2bit同步头有两种情况，即2bit同步头可为“01”或“10”。如果同步头为“01”，则64bit有效载荷为数据码块，如果同步头为“10”，则64比特有效载荷包括8bit的控制码块和56比特的控制信息和/或数据，该控制码块的字段可称为控制码块的类型域(可称为type域)。应理解，“00”和“11”并未被使用，如果66比特码块出现“00”和“11”，那么可认为链路出现误码。
由于每64bit有效载荷插入2bit同步头，所以可保证每66比特会出现一次比特的跳变，所以可使得时钟恢复电路更加容易正常工作，避免接收端时钟漂移或同步丢失而引起数据丢失，即保证传输的数据串在接收端能够被正确复原。
如果接收端接收的码块流中“0”和“1”不均匀的话，接收端可能无法准确地确定同步头。因此通常64b/66b编码采用NRZ调制格式，并根据X^58+X^39+1的自同步加扰方式对64比特有效载荷进行扰码，使传输的66比特码块中“0”和“1”相对均匀，可保证DC均衡。
应理解，采用64b/66b编码的物理接口会以66比特码块为粒度将要传输的数据分发到多个传输通道，之后在汇聚多个传输通道的数据，在多个传输通道上进行传输。然而对于每个传输通道而言，会等到获得64比特有效载荷，并判断类型以及添加同步头，获得66比特码块之后再发送。即各个传输通道发送码块之前，需要一直等到获取到64比特有效载荷，即等待时间造成数据传输的延迟。
3)128b/130b编码，即m＝128，n＝130。128b/130b编码相比于8b/10b编码可提高带宽利用率，例如带宽利用率从80％可提高到98.46％。与64b/66b编码类似，128b/130b编码是在128bit载荷前面加上2bit的同步头。该同步头为“01”时，表示其后面是控制数据(Ordered Set)；该同步头为“10”，则表示其后面是载荷数据(非Order Set)。与64b/66b编码不同之处在于，采用128b/130b编码的物理接口，例如外设部件互联标准(peripheral component interconnect express，PCIE)接口先按照字节为单位将数据分发到多个传输链路，然后逐个 在各个传输链路添加同步头。其中，如果128bit数据是纯数据，则添加“01”同步头，如果128bit数据不是纯数据，则添加“10”同步头。2bit同步头和128bit载荷，一起称为数据块(data block)。
示例性的，图2和图3分别示出了一个传输链路和4个传输链路下128b/130b编码格式。其中，图2和图3中一个符号(symbol)可承载8比特码块(S0-S7)，其中S0是最低有效位，S7是最高有效位。如图2所示，发送侧在传输链路上添加2bit同步头(H0和H1)，同步块后面是128bit载荷。整个传输链路上的码块流包括2bit同步头和128bit载荷。如图3所示，发送侧将要发送的数据块编码后分发到4个传输链路，在分发时，依次在各个传输链路上添加同步头，并按照字节为单位将数据分发到各个传输链路。
应理解，链路上连续的“0”和连续的“1”最多为128个，如果接收端接收的码块流中“0”和“1”不均匀的话，系统会存在比较明显的基线漂移，影响接收侧SerDes性能。由于链路上连续的“0”和连续的“1”最多为128个，仅依靠128b/130b编码不能实现较好的DC均衡。因此，128b/130b编码与64b/66b编码类似，通过在128b/130b编码中的数据部分引入扰码来实现DC均衡。
4)256b/257b转码，指的是4个66b码块到1个257b码块的映射，可进一步降低编码开销。
256b/257b转码以64b/66b为基础转码得到，该转码方案继承64b/66b编码的缺点。另外，256b/257b转码方案存在257，即比较大的素数，限制了里的索罗门编码(reed-solomon forward error，RS-FEC)的设计灵活性，时延较大。
前述的8b/10b、64b/66b以及128b/130b和、256b/257b转码并不适用PAM4调制方式。这是因为“01”和“10”在格雷编码及PAM4调制下分别映射为“-1”电平和“+1”电平，但是通常在链路中同步头“01”出现的概率远高于同步头“10”出现的概率。因此如果8b/10b、64b/66b以及128b/130b采用PAM4调制，一段时间内出现“-1”电平的概率较大，这样会引入直流基线漂移，无法保证接收端时钟数据恢复电路(clock data recovery，CDR)正常工作，造成数据丢失或引入误码。即无法保证发送端传输的数据在接收端能够被正确复原。
鉴于此，本申请实施例提供了一种可适用于NRZ调制和PAM4调制的数据编码方案，以尽量降低编码时延，简化Gearbox设计，且能够保证DC均衡。
本申请实施例提供的方案可以应用于需要编码格式转换的场景。例如涉及到以太网接口、IT接口、PCI接口、PCIe接口、存储器接口等技术领域。下文以本申请实施例应用于以太网接口为例。
本申请实施例中提供的方案可以对要发送的数据流进行编码，该改进的方案可以在发送模块中实现。本申请实施例中提供的方案还可以对接收的数据流进行解码，该改进的方案可以在接收模块中实现。即本申请实施例中改进的方案涉及到发送模块和接收模块，该发送模块和接收模块可以位于在一个节点，或者，该发送模块和接收模块分别位于不同的节点。下文以发送模块位于发送端，接收模块位于接收端为例，对本申请实施例提供的技术方案进行介绍。
请参见图4，为本申请实施例提供的数据编码方法的示意性流程图。本申请实施例中数据编码指的是PCS层的编码。上层将数据传输给PCS层，PCS层从上层接收L个帧，对这L个帧进行编码，生成多个编码单元。由于本申请实施例中编码指的是PCS层的编码，所以编码单元也可以称为物理编码单元(physical coding unit)，可简称为phit。即下文中phit表示编码单元。这里的帧是指符合IEEE802.3帧要求的数据单元(MAC frame)。如果该数 据编码应用于其他协议标准接口，那么这里的帧也可以是符合其他协议标准的数据单元，例如数据链路报文(data link layer package，DLLP)。具体的，本申请实施例提供的数据编码方法的流程描述如下。
S401、发送端生成M个编码单元，该M个编码单元是对L个帧进行编码得到的，M个编码单元包括至少一个第一类单元，该第一类单元包括第一标识，第一标识用于指示所述L个帧中的第一帧的帧头在所述第一类编码的位置，M为大于或等于1的整数，L为大于或等于1的整数。
本申请实施例旨在提供适用于PAM4调制的编码方案，且同时能够保证信号直流平衡。在本申请实施例中，PCS层可对接收到的一个或多个帧进行编码，生成多个编码单元。PCS层对帧进行编码，也就是将帧映射到编码单元。应理解，编码单元应包括帧的原始信息，以及另外添加的信息，便于接收端对M个编码单元正确解码，以获得该帧的原始信息。应理解，如果多个编码单元的长度不同，编码较为复杂。所以在本申请实施例中，每个编码单元的长度可以是固定的，以降低编码的复杂度。示例性的，每个编码单元的长度可以是系统定义的，也可以是发送端和接收端约定的，对此，本申请实施例不作限制。
在一些实施例中，PCS层每接收到一个帧，可对该帧进行编码，并发送编码生成的编码单元。由于接收到某个帧，对该帧编码并发送，所以时延较低。但是一个帧对应一个编码单元，如果该帧的数据量较小，那么该编码单元的承载率较低，编码开销较大。为了提高编码单元的承载效率，可以将多个小帧拼接为一个长帧，将该长帧映射到一个编码单元。或者也可以理解为，当PCS层接收的某个帧的长度小于一个编码单元的长度，PCS层可继续接收其它帧，之后将接收的多个帧映射到一个编码单元。例如PCS层接收到L个帧，对这L个帧进行编码生成M个编码单元，其中，L大于或等于2，M大于或等于1。由于L个帧一起编码，所以可提高编码单元的承载率，降低编码开销。需要说明的是，L个帧可包括同一种类型的帧，也可以包括多种类型的帧，对此本申请实施例不作限制。
作为一种示例，PCS层可对L个帧进行分割，获得多个数据单元，将这多个数据单元映射到M个编码单元。考虑到接收端接收到M个编码单元，对M个编码单元进行解码后获得多个数据单元，需要从这多个数据单元中确定哪些数据单元属于同一个帧。PCS层对L个帧进行分割，可按照数据信息和控制信息来划分。应理解，对于某个帧来说，控制信息通常用于指示该帧的长度、该帧的源地址、该帧的目的地址等信息，可以认为是该帧的帧头。相对来说，数据信息可以是帧的帧体和帧尾。控制信息相对于数据信息较少，所以可将控制信息划分到一个数据单元，将数据信息划分成多个数据单元，此处需要说明的是，当控制信息长度大于一个数据单元长度时，可将控制信息的部分数据划分到一个数据单元中，将控制信息中剩余的部分与数据信息一起进行划分。这样接收端通过控制信息可对多个数据单元进行定界，即确定帧的开始位置，进而确定哪些数据块属于同一个帧。为了便于区分，下文中将控制信息划分成的数据单元称为控制块(control block)或者帧头，将数据信息划分成的数据单元称为数据块(data block)或者有效载荷。即PCS层将L个帧划分为多个控制块和多个数据块。
PCS层将对L个帧划分获得的多个控制块和多个数据块映射到M个编码单元，并发送给接收端。对于接收端而言，需要从接收的M个编码单元中确定哪些控制块和数据块属于同一个帧，即正确解码M个编码单元，以获得正确的L个帧。为了使得接收端可正确解码M个编码单元，发送端可指定控制块在编码单元的开始位置，以使得接收端根据编码单元中控 制块的开始位置实现对多个数据块的定界。应理解，M个编码单元中每个编码单元的长度固定，而L个帧中有的帧较长，有的帧较多短，如果一个帧对应一个编码单元，显然每个编码单元的长度较长，开销较大。如果某个帧的长度大于一个编码单元的长度，那么在一个编码单元完成不了一个帧的映射，因此，本申请实施例允许一个帧可映射至多个编码单元，以尽量节约编码单元的开销。这就意味M个编码单元中，有的编码单元可包括帧头和数据块，有的编码单元可包括数据块，且不包括帧头。那么M个编码单元中不同类编码单元的结构可相同，也可不同。
为了使得接收端能够区分接收的M个编码单元中哪些单元有帧头，哪些单元没有帧头。发送端可通过第一标识指示该个单元是否包括帧头。进一步的，即使接收端确定某个单元包括帧头，如果接收端无法确定该帧头在该单元中的开始位置，接收端还是无法从该单元中确定准确的帧头，也就是无法确定编码单元上哪些数据块属于同一个帧。因此，第一标识可进一步用于指示某个单元中的帧头在该单元中的开始位置，这样接收端可根据第一标识实现对接收的M个编码单元中包括的各个帧进行定界。应理解，如果一个单元不包括帧头，那么该单元可不用承载第一标识，以提高该单元的数据承载率。为便于描述，在下文中，将包括第一标识的编码单元称为第一类单元，将不包括第一标识的编码单元称为第二类单元。应理解，第一类单元和第二类单元的结构可不相同。
M个编码单元可包括至少一个第一类单元，或者，M个编码单元包括至少一个第一类单元和至少一个第二类单元。将L个帧划分成的多个控制块和多个数据块映射到M个编码单元的方式，因编码单元的结构形式的不同而有所不同。下面结合编码单元的几种可能的实现形式，说明PCS层如何将多个控制块和多个数据块映射到M个编码单元。
实现形式一，请参见图5，示出了一种第一类单元的帧结构。第一类单元包括第一字段和第二字段和第三字段。其中，第一字段用于承载第一标识，第二字段用于承载第一帧的帧头和数据，第三字段用于承载校验该第一类单元的校验信息。第一帧可以是L个帧的任意一个帧。
通常来说，第一标识用于指示第一帧的帧头在某个第一类单元中的开始位置，占用较少的比特或字节(byte)即可。而第二字段用于承载帧头和数据，需要占用较多的比特或字节。第三字段用于承载校验第一类单元的校验信息，该校验信息可以是第一帧的校验信息，例如可以是帧校验序列码(frame check sequence，FCS)，因此第三字段相对第二字段来说占用较少的比特或字节。为便于描述，图5以第一字段占用X字节、第二字段占用Y字节，第三字段占用Z字节为例。但是本申请实施例对于第一字段、第二字段和第三字段的长度不作限制。
本申请实施例可将第二字段划分为多个子字段。例如第二字段可包括K个子字段(即U 0至U k-1)，K大于或等于2。这样以每个子字段的开始位置为参考点，可明确指示第一帧的帧头在第一类单元中的开始位置。例如第一帧的帧头可位于K个子字段中的任一子字段。示例性的，可规定第一帧的帧头的开始位置为子字段的开始位置，这样发送端指示第一帧的帧头位于哪个子字段，接收端可确定正确的帧头。或者，可规定第一帧的帧头的开始位置与子字段的开始位置具有第一偏移量，这样发送端指示第一帧的帧头位于哪个子字段，接收端也可确定正确的帧头。本申请实施例不限制第一偏移量的粒度，例如第一偏移量的粒度可以是比特，也可以是字节。K个子字段中除承载帧头的子字段之外的其余子字段可用于承载载荷和校验信息。其中，载荷包括帧体内的有效载荷，也可以包括帧尾内的有效 载荷、控制帧或者空闲码块。
请参见图6，示出了将第一帧映射至第一类单元的映射方式。第一帧的帧头可映射至第一类单元中第二字段中的任一子字段。第一字段承载的第一标识可指示帧头在第一类单元中的位置。第一标识的取值不同对应的位置也不同。如图6所示的第1种映射方案，第一帧的帧头可位于第一个子字段，第一标识的取值可为第一值；如图6所示的第2种映射方案，第一帧的帧头可位于第二个子字段，第一标识的取值可为第二值；如图6所示的第3种映射方案，第一帧的帧头可位于第三个子字段，第一标识的取值可为第三值；如图6所示的第4种映射方案，第一帧的帧头可位于第K个字段，第一标识的取值可为第四值；如图6所示的第5种映射方案，第一类单元可不包括第一帧的帧头，第一标识的取值可为第五值。应理解，第一字段的长度可根据K确定，例如第一字段可至少占用log 2 K个比特。
需要说明的是，图6以第一标识位于有效载荷之前，所以第一标识也可以称为前置标识(prefix)。需要说明的是，本申请实施例不限制第一标识的位置，例如第一标识也可以位于第一类单元的尾部。在下文中，以第一标识是前置标识为例。
本申请实施例可将第二字段划分为长度相同的K个子字段，也可以将第二字段划分为长度不同的子字段。即K个子字段中每个子字段占用的比特数相同，或者K个子字段中至少两个子字段占用的比特数不同，可提高承载载荷的灵活度。
通常来说，上层发送给PCS层的帧有两类，一类是控制帧，一类是数据帧。控制帧可认为是只有帧头(Header)，数据帧除了包括帧头，还包括帧体(body)和帧尾(tail)。帧体通常是体内的有效载荷(payload in body)，帧尾可包括有效载荷(payload in tail)和FCS。帧头通常较短，所以可将帧头映射至第一类单元中K个子字段中的某个子字段例如第一子字段。从这个角度来说，任意一个子字段的长度可根据帧头的最大长度来确定，例如子字段的长度可以等于帧头的最大长度。对于第一帧内的有效载荷和校验信息可以承载在除第一子字段之外的其余子字段。当然，如果第一子字段承载帧头之后还有剩余空间，那么该剩余空间也可以承载第一帧的有效载荷和校验信息。第一字段可以是K个子字段的任一子字段，且一个第一类单元可用于承载多个帧。接收端通过至少个第一类单元中的第一标识可明确各个帧的起始位置，以实现对帧的定界。
但是如果第K个子字段不足以承载第一帧的帧头的全部信息，那么第K个子字段可用于承载第一帧的帧头的部分信息，如图6所示的第6种映射方式。而该第一帧的帧头的其余部分信息可承载于另一个第一类单元中的某个子字段。
当然考虑到第一帧的长度大于第一类单元的长度，那么在一个第一类单元完成不了第一帧的映射，即第一帧可映射到多个第一类单元。然而这多个第一类单元中有一个第一类单元承载第一帧的帧头即可，其余第一类单元可用于承载第一帧包括的数据。如果沿用图9所示的结构，那么其余第一类单元可如图6所示的第5种映射方式，即第一标识用于指示第一类单元不包括前置标识。
为了提高编码单元的承载效率，作为一种可替换的方案，其余第一类单元可不承载第一标识，例如第一字段可用于承载数据。为了便于区分，本文中将不包括第一标识的编码单元称为第二类单元。应理解，一个帧可映射到某个第一类单元，以及一个或多个第二类单元。由于一个或多个第二类单元不包括第一标识，接收端需要确定接收的一个或多个第二类单元承载的有效载荷属于哪个帧。第一标识位于有效载荷之前，那么接收端可确定一个第二类单元承载的有效载荷属于该第二类单元的前一个第一类单元中的第一标识对应 的帧；或者接收端可确定连续的多个第二类单元承载的有效载荷属于该连续的多个第二类单元的前一个第一类单元中的第一标识对应的帧。
例如，请参见图7，为L个帧映射到M个编码单元的一种映射方式。应理解，M个编码单元包括至少一个第一类单元和至少一个第二类单元。图7以包括3个第一类单元和2个第二类单元为例。其中，第一类单元1、第一类单元2和第一类单元3中的第一字段承载有第一标识；第二类单元1和第二类单元2没有承载帧头，第二类单元1和第二类单元2中的第一字段承载载荷、控制帧和空闲码块的至少一种。应理解，第二类单元1和第二类单元2承载的载荷属于第一类单元1中的帧头对应的帧。接收端接收到图7中的5个单元，可认为没有承载帧头的第二类单元1和第二类单元2承载的载荷属于该载荷的前一个第一类单元中第一标识对应的帧头所属的帧。由于第二类单元1和第二类单元2中的第一字段用于承载载荷，所以可提高编码单元的承载效率。
本申请实施例中，将L个帧的有效载荷和校验信息映射到多个第一类单元，即第一类单元的校验在物理层实现，可使得帧的流控以及重传等操作在物理层实现。由于以物理层的编码单元为粒度，实现帧的流控以及重传等操作，可提高操作效率，降低时延。相较于传统的方式，即在数据链路层(data link layer)实现帧的流控以及重传等操作，显然时延更低，传输效率更高。且，本申请实施例通过在编码单元中插入第一标识(前置标识)，标识每个帧的起始位置，能够保证接收端正确恢复L个帧。
实现形式二，请参见图8，示出了一种第一类单元的帧结构。第一类单元包括第一字段和第二字段。即与实现形式一的不同之处在于，第一类单元不包括第三字段，即编码单元中不单独设置校验位。这种情况下，L个帧的校验信息可包含在上层报文中，跟L个帧中的数据一起承载到负载字段，那么第一类单元所承载的载荷的可靠性由上层帧自带的校验位保证。该方案可进一步压缩编码单元的开销，提高编码单元的承载率。
需要说明的是，这里第一类单元包括的第一字段的实现可参考实现形式一中的第一类单元的第一字段的实现。同理，实现形式二中，第一类单元包括的第二字段的实现可参考实现形式一中的第一类单元的第二字段的实现，这里不再赘述。
示例性的，请参见图9，示出了帧映射到第一类单元的一种映射方式。图9以L个帧映射到5个第一类单元为例。如图9所示，与图6的不同之处在于，第二字段包括的K个子字段中，用于承载数据的子字段可承载帧体内有效载荷和帧尾。应理解，该帧尾包括帧尾内有效载荷和校验信息，例如FCS。当然用于承载数据的子字段也可以承载控制帧，空闲码块等。例如，第一类单元中的子字段可用于承载帧体内有效载荷、控制帧和帧尾的至少一种。
需要说明的是，在本申请实施例中，M个编码单元中部分编码单元可采用实现形式一的结构，另一部分编码单元可采用实现形式二的结构。采用实现形式一的编码单元中承载校验信息，可利用该校验信息保证编码单元中帧头的可靠性。采用实现形式二的编码单元，可用于提升编码单元中除帧头之外的数据承载率，更适用于长帧的应用场景。
在实现形式二的结构下，一个帧也可映射至一个第一类单元和至少一个第二类单元。作为一种示例，请参见图10，为帧映射到编码单元的一种示意。图10以包括3个第一类单元和2个第二类单元为例。其中，第一类单元1、第一类单元2和第一类单元3中的第一字段承载有第一标识；第二类单元1和第二类单元2没有承载帧头，第二类单元1和第二类单元2中的第一字段承载载荷、控制帧、帧尾和空闲码块的至少一种。应理解，第二类单元1和第二类单元2承载的载荷属于第一类单元1中的帧头对应的帧。接收端接收到图10中的5个 单元，可认为没有承载帧头的第二类单元1和第二类单元2承载的载荷属于该载荷的前一个第一标识对应的帧头所属的帧。由于第二类单元1和第二类单元2中的第一字段用于承载载荷，所以可提高编码单元的承载率，更适用于长帧的传输。且第一类单元和第二类单元不包括第三字段，可降低M个编码单元的开销。
实现形式三，请参见图11，示出了一种第一类单元的帧结构。第一类单元包括第一字段和第二字段。其中，第一字段用于承载第一标识，第二字段用于承载第一帧的帧头和数据。与前述实现形式一和实现形式二的不同之处在于，所述第二字段中的第K个子字段可扩展Z个字节。可以理解为将实现形式一的结构中第三字段用于承载数据。由于用于承载校验信息的字段可用于承载数据，所以可进一步压缩编码单元的开销。且还可以提高编码单元的数据承载率。
示例性的，请参见图12，示出了帧映射到多个第一类单元的一种映射方式。图12以L个帧映射到5个第一类单元为例。如图12所示，与图6的不同之处在于，第二字段包括的K个子字段扩展了Z字节，用于承载帧体内有效载荷、控制帧、帧尾的空闲码块中的至少一种。
需要说明的是，在本申请实施例中，M个编码单元中部分编码单元可采用实现形式一的结构，另一部分编码单元可采用实现形式三的结构。采用实现形式一的编码单元中承载校验信息，可利用该校验信息保证编码单元中帧头的可靠性。采用实现形式三的编码单元，可用于提升编码单元中除帧头之外的数据承载率，更适用于长帧的应用场景。
在一些实施例中，实现形式三中的第一字段可用于承载数据，以提高编码单元的数据承载率。即编码单元也可以通过实现形式四实现。
实现形式四，请参见图13，示出了一种第二类单元的帧结构。该第二类单元包括第一字段和第二字段。与实现形式三的不同之处在于，第一字段用于承载数据。由于用于承载第一标识的字段承载数据，所以可进一步压缩编码单元的开销。
示例性的，请参见图14，示出了帧映射到多个第一类单元和第二类单元的一种映射方式。图14以L个帧映射到3个第一类单元和2个第二类单元为例。其中，第一类单元1、第一类单元2和第一类单元3中的第一字段承载有第一标识；第二类单元1和第二类单元2没有承载帧头，第二类单元1和第二类单元2中的第一字段承载载荷、控制帧、帧尾和空闲码块的至少一种。应理解，第二类单元1和第二类单元2承载的载荷属于第一类单元1中的帧头对应的帧。接收端接收到图14中的5个单元，可认为没有承载帧头的第二类单元1和第二类单元2承载的载荷属于位于第二类单元1之间的前一个第一标识对应的帧头所属的帧。由于第二类单元1和第二类单元2中的第一字段用于承载载荷，用于承载校验信息的字段可用于承载数据，所以可进一步压缩编码单元的开销，提高编码单元的数据承载率，适用于长帧的传输。
如上介绍了编码单元的几种可能的结构。在本申请实施例中，映射L个帧的M个编码单元可采用前述实现形式一到实现形式四中的一种或多种结构。由于第一标识的插入可实现对帧的定界。且第一标识的插入也能够控制系统内连续“0”或连续“1”的个数，例如将连续“0”或连续“1”的个数控制在每个编码单元的长度内，以保证接收端的时钟恢复电路正常工作，避免数据的丢失。
在本申请实施例中，第一标识还可用于指示帧头的类型，也就是帧头所属帧的类型。这里的类型可以是业务类型，也可以是封装帧的协议类型。通常来说，不同业务对应的封 装协议不同，所以也可以认为第一标识可用于实现对业务的隔离。由于第一标识可用于标识帧的类型，那么根据第一标识可区分L个帧对应的不同业务，这样L个帧可灵活映射到M个编码单元，实现对多个业务的隔离。对于接收端而言，可通过第一标识确定各个帧的封装协议，对L个帧进行解析。这样可简化接收侧上层数据处理流程，降低业务数据传输时延。
在可能的实现方式中，第一标识可由纠错检错编码生成，例如第一标识可由eBCH码字生成或者BCH码字生成。由于纠错检错编码具有纠错检错能力，所以可通过纠错检错编码本身实现对第一标识的保护，而无需另外通过其他信息对第一标识进行保护，能够保证第一标识的可靠性，避免接收端对帧格式的误判。
应理解，数据编码之后，在发送给接收端之前，需要进行调制。例如可以通过NRZ调制方式或PAM4调制方式等。为保证DC均衡，通常对编码单元的有效载荷进行扰码。例如64b/66b编码采用NRZ调制，并根据X^58+X^39+1的自同步加扰方式对64比特有效载荷进行扰码；又例如128b/130b编码采用NRZ调制，在数据部分引入扰码来实现DC均衡；又例如256b/257b转码需要通过在编码后数据中添加扰码以实现DC均衡。然而由于扰码是对有效载荷进行的，即64b/66b编码和128b/130b编码中的2bit同步头，或者256b/257b转码第0bit或者第0bit到第5bit不参与扰码，所以还是不能实现较好的DC均衡。
为此，通过编码设计可使得第一标识本身实现DC均衡，即本申请实施例提供的第一标识本身可实现DC均衡。即使对编码单元中的有效载荷进行扰码，对于整个编码单元来说，还是能够较好地实现DC均衡。例如第一标识包括X个比特，这X个比特在PAM4调制方式下满足直流均衡。又例如第一标识包括X个比特，这X个比特在NRZ调制方式下满足直流均衡，或者这X个比特在NRZ调制方式以及PAM4调制方式下满足直流均衡。
作为一种示例，纠错检错编码为码长是16比特的eBCH码字，该eBCH码字的最小汉明距为8。该eBCH码字能够满足NRZ调制下的DC均衡。应理解，码长为16比特，且最小汉明距为8的eBCH码字共有32个。这32个eBCH码字如表1所示。
表1 eBCH码字及第一标识的对应关系
码字编号 原始eBCH码字 标识
0 00000000_00000000 00000000_00000000
1 00001010_01101111 01000100_01011111
2 00010100_11011101 10100000_10111011
3 00011110_10110010 11100100_11100100
4 00100011_11010110 00001101_10101110
5 00101001_10111001 01001001_11110001
6 00110111_00001011 10101101_00010101
7 00111101_01100100 11101001_01001010
8 01000111_10101100 00100111_11011000
9 01001101_11000011 01100011_10000111
10 01010011_01110001 10000111_01100011
11 01011001_00011110 11000011_00111100
12 01100100_01111010 00101010_01110110
13 01101110_00010101 01101110_00101001
14 01110000_10100111 10001010_11001101
15 01111010_11001000 11001110_10010010
16 10000101_00110111 00110001_01101101
17 10001111_01011000 01110101_00110010
18 10010001_11101010 10010001_11010110
19 10011011_10000101 11010101_10001001
20 10100110_11100001 00111100_11000011
21 10101100_10001110 01111000_10011100
22 10110010_00111100 10011100_01111000
23 10111000_01010011 11011000_00100111
24 11000010_10011011 00010110_10110101
25 11001000_11110100 01010010_11101010
26 11010110_01000110 10110110_00001110
27 11011100_00101001 11110010_01010001
28 11100001_01001101 00011011_00011011
29 11101011_00100010 01011111_01000100
30 11110101_10010000 10111011_10100000
31 11111111_11111111 11111111_11111111
表1中的各个eBCH码字分别可用于生成标识，如表1所示。本申请实施例中的第一标识也可以是表1中的部分标识，即第一标识包括16个比特，这16个比特可以是表1中的部分码字，以满足NRZ调制方式下的DC均衡，或者满足PAM4调制方式下的DC均衡，又或者第一标识满足NRZ调制方式以及PAM4调制方式。
作为一种示例，第一标识可包括如表2所示的码字。
表2
码字编号 原始eBCH码字 第一标识(NRZ调制)
3 00011110_10110010 11100100_11100100
8 01000111_10101100 00100111_11011000
9 01001101_11000011 01100011_10000111
10 01010011_01110001 10000111_01100011
11 01011001_00011110 11000011_00111100
20 10100110_11100001 00111100_11000011
21 10101100_10001110 01111000_10011100
22 10110010_00111100 10011100_01111000
23 10111000_01010011 11011000_00100111
28 11100001_01001101 00011011_00011011
从表2可以看出，第一标识对应的eBCH码字实际上表1中的10个码字。由于表2中的第一标识的前8比特中“0”和“1”的个数相同，且后8比特中“0”和“1”的个数相同，所以表2中的 第一标识在NRZ调制方式下满足DC均衡。
进一步的，第一标识可以是根据预设规则调整eBCH码字的比特位顺序获得的，以在PAM4调制方式下满足DC均衡。例如可能的一种预设规则为原始eBCH码字的前8比特的顺序“43275160”对应第一标识的前8比特的顺序“76543210”，原始eBCH码字的后8比特的顺序“75432160”对应第一标识的前8比特的顺序“76543210”。也就是将原始eBCH码字的前8比特的第4个比特作为第一标识的前8比特的第7个比特，将原始eBCH码字的前8比特的第3个比特作为第一标识的前8比特的第6个比特，以此类推。按照上述预设规则可获得如表3所示的第一标识。表3中第一标识的比特顺序“76543210_76543210”对应原始eBCH码字的比特顺序“43275160_75432160”。
表3
Figure PCTCN2021118074-appb-000001
从表3可以看出，第一标识对应的eBCH码字实际上表2中的部分码字。由于表3中的第一标识的前8比特中“0”和“1”的个数相同，且后8比特中“0”和“1”的个数相同，所以表3中的第一标识在NRZ调制方式下满足DC均衡。且表3中的码字采用PAM4调制，4种电平即“0”、“1”、“2”、“3”是均匀出现的，所以表3中的第一标识在PAM4调制方式下也能够满足DC均衡。
虽然第一标识本身在NRZ调制方式和PAM4调制方式下可实现DC均衡，通过对编码单元中的有效载荷进行扰码，可实现有效载荷的DC均衡。但是对于某条数据流来说，可能还是出现DC不均衡的情况。这种情况下，本申请实施例可调整第一标识中的部分比特位，以保证每条数据流上的DC均衡。例如可统计数据流在一定长度范围内的DC不均衡程度，通过调整第一标识中的例如最后2个比特补偿该长度范围内DC的不均衡程度，从而实现对数据流的DC均衡。对于接收端而言，由于第一标识具有3比特的纠错能力，即使用于调整DC均衡的第一标识的部分比特是错误的，接收端也可以通过eBCH译码对其进行纠错，不会影响对第一标识的识别。
S402、发送端将M个编码单元分发到N个传输通道，接收端从N个传输通道接收该M个编码单元。
发送端生成M个编码单元之后，可将该M个编码单元分发到N个传输通道。具体来讲，发送端可将至少一个第一类单元以固定长度轮询分发到N个传输通道。
作为一种示例，可规定至少一个第一类单元中的某个或某些单元的第一标识的分发顺 序位于有效载荷的分发顺序之前。即发送端可按照先第一标识后有效载荷的分发顺序将至少一个第一类单元轮询分发到N个传输通道。
由于第一标识的部分比特可用于调整数据流的DC均衡，因此，发送端按照轮询方式将至少一个第一类单元分发到N个传输通道，如果第一标识在各个传输通道上出现的概率不相同。例如N个传输通道上有的传输通道上一直没有第一标识，那么当通过第一标识对数据流进行DC均衡调整时，只能实现部分传输通道的DC均衡调整，无法实现全部传输通道的DC均衡调整，从而影响DC均衡调整的效果。这种情况下，下一轮分发至少一个第一类单元时，可调整分发规则。例如可规定下一轮至少一个第一类单元的另一个单元或另一些单元的第一标识的轮询顺序位于部分有效载荷之后。即不同轮中，第一标识的轮询顺序可不相同，以使得各个传输通道出现第一标识的概率相同，保证各个传输通道的DC均衡，即保证全部传输通道的DC均衡。
需要说明的是，一轮中多个第一类单元的第一标识的分发顺序可以相同，较为简单。当然，一轮中多个第一类单元的第一标识的分发顺序也可以不相同，对此，本申请实施例不作限制。
作为另一种示例，可对N个传输通道进行分组绑定，例如以承载第一标识的传输通道的粒度为单位对N个传输通道分组。例如承载第一标识的传输通道的个数为2，那么将相邻的2个传输通道绑定为一组，获得P个传输通道组。之后以传输通道组为单位，将M个编码单元分发到P个传输通道组。
示例性的，可规定N个传输通道中的某个传输通道的轮询顺序位于N个传输通道中另一个传输通道的轮询顺序之前，或者可规定N个传输通道中的某些传输通道的轮询顺序位于N个传输通道中另一些传输通道的轮询顺序之前。为了便于描述，下文中将这里的某个传输通道称为第一传输通道，将另一个传输通道称为第二传输通道。将某些传输通道称为第一传输通道组，将另一些传输通道称为第二传输通道组。
例如规定P个传输通道组中的第一传输通道组的轮询顺序位于P个传输通道组中的第二传输通道组的轮询顺序之前。即发送端可按照先第一传输通道组后第二传输通道组的顺序轮询分发M个编码单元。应理解，传输通道组是以承载第一标识的传输通道为粒度绑定的，所以可规定发送端按照先第一标识后有效载荷的顺序轮询分发M个编码单元，那么第一传输通道为承载第一标识的传输通道。
应理解，根据编码单元的长度的不同，按照P个传输通道组中的第一传输通道组的轮询顺序位于P个传输通道组中的第二传输通道组的轮询顺序之前的顺序轮询M个编码单元，各个传输通道上出现第一标识的概率未必相同。即有些传输通道组上一直没有第一标识，那么当通过第一标识对数据流进行DC均衡调整时，只能实现部分传输通道的DC均衡调整，无法实现全部传输通道的DC均衡调整，从而影响DC均衡调整的效果。
因此，分发M个编码单元时，可调整分发规则，即不同轮中，同一传输通道组的轮询顺序不同。例如可规定调整上一轮中传输通道组的轮询顺序，例如可规定上述N个传输通道中第二传输通道的轮询顺序位于第一传输通道的轮询顺序之前，以使得各个传输通道出现第一标识的概率相同，以尽量保证各个传输通道的DC均衡，即保证全部传输通道的DC均衡。
为了便于描述，下文中假设P个传输通道组的编号依次为N k，N k+1,…，N k+P-1，k为大于或等于0的整数。以第一传输通道组为传输通道组N k，第二传输通道组为传输通道组N k+1 为例，且以第一传输通道组和第二传输通道组为相邻的两个传输通道组为例。当然第一传输通道组和第二传输通道组也可以不相邻。
发送端在第i次轮询分发M个编码单元时，按照固定长度，并按照P个传输通道组中传输通道组N k的轮询顺序位于传输通道组N k+1的轮询顺序之前将M个编码单元分发到N个传输通道。之后各个传输通道上第一标识出现的概率相同，那么发送端在第i+1次轮询分发M个编码单元时，仍然按照P个传输通道组中传输通道组N k的轮询顺序位于传输通道组N k+1的轮询顺序之前将M个编码单元分发到N个传输通道。即不同轮中，N个传输通道的轮询顺序相同。
相反，如果第i次轮询之后，各个传输通道上第一标识出现的概率不相同，那么发送端在第i+1次轮询分发M个编码单元时，按照P个传输通道组中传输通道组N k+1的轮询顺序位于传输通道组N k的轮询顺序之前将M个编码单元分发到N个传输通道。即不同轮中，N个传输通道的轮询顺序可不同，以保证各个传输通道上第一标识出现的概率相同，既保证全部传输通道的DC均衡。
下面分别以M个编码单元分发到16个传输通道、12个传输通道、8个传输通道为例，介绍将M个编码单元分发到N个传输通道的分发规则。
示例一、请参见图15，为16个传输通道对应的分发规则示意图。即N＝16，图15中的x16表示16个传输通道，这16个传输通道的编号依次从0到15。这16个传输通道相邻2个传输通道为一个传输通道组，即传输通道0和传输通道1为一组传输通道，传输通道2和传输通道3为一组，以此类推，有8个传输通道组。这8个传输通道组的编号依次从0到7，可规定奇数传输通道组的轮询顺序位于偶数传输通道组的轮询顺序之前。图15以编码单元的长度是68字节(byte)为例。即发送端按照68字节的长度将至少一个第一类单元轮询分发到16个传输通道。可按照先第一标识后数据的分发顺序依次将M个编码单元分发到8个传输通道组。经过4个分发循环周期，4个编码单元刚好可以完整地分发到16个传输通道。也就是经过一轮之后，4个编码单元刚好可以完整地分发到16个传输通道，如图15所示。图15中第一轮有效载荷包括第一轮中的码块A0-A65、B0-B65、C0-C65，以及D0-D65。从图15可以看出相邻两个传输通道组中的一个传输通道组的轮询顺序位于另外一个传输通道组的轮询顺序之前，例如奇数传输通道组的轮询顺序位于偶数传输通道组的轮询顺序之前。经过一轮的分发，第一标识A至第一标识D分布在传输通道0、传输通道1、传输通道4、传输通道5、传输通道8、传输通道9、传输通道12、传输通道13，而其他传输通道上并没有第一标识。如果下一轮分发编码单元时，即分发第5至第8个编码单元时，沿用上一轮的分发规则，那么分发后，第一标识还是分布在传输通道0、传输通道1、传输通道4、传输通道5、传输通道8、传输通道9、传输通道12、传输通道13，其他传输通道上还是没有第一标识。这样当通过第一标识对数据流进行DC均衡调整时，只能实现部分传输通道的DC均衡调整，无法实现全部传输通道的DC均衡调整，从而影响DC均衡调整的效果。
因此，在下一轮分发第5至第8个编码单元时，可调整分发规则，以使得第一标识在每个传输通道出现的概率相同，实现全部传输通道的DC均衡。例如可规定偶数传输通道组的轮询顺序位于奇数传输通道组的轮询顺序之前。即在第二轮分发第5至第8个编码单元时，可先分发数据再分发第一标识，也就是第一标识的轮询顺序位于部分有效载荷的轮询顺序之后，例如将传输通道0和传输通道1的数据与传输通道2和传输通道3的数据对换，如图15所示。这样分发第5至第8个编码单元，第一标识E至第一标识H分布在传输通道2、传输通 道3、传输通道6、传输通道7、传输通道10、传输通道11、传输通道14、传输通道15。这样经过两轮的分发，每个传输通道上的第一标识的个数是相同的。以此类推，第三轮分发编码单元的分发规则同第一轮的分发规则，第四轮分发编码单元的分发规则同第二轮的分发规则，那么第一标识在每个传输通道上出现的概率是相同的。
由于以传输通道组为单位，调整传输通道组的轮询顺序也就是将该传输通道组承载的载荷的轮询顺序一并调整。也就是每个轮询周期内，每个传输通道对应编码单元中的固定位置的载荷，如图15所示。第一标识A到第一标识I所在传输通道0承载的有效载荷的编号均为14、30、46、62，第一标识A到第一标识I所在传输通道0承载的有效载荷的编号均为15、31、47、63。由于每个轮询周期内，每个传输通道对应编码单元中的固定位置的载荷，易于接收端解码，可降低接收端实现的复杂度。
示例二、请参见图16，为12个传输通道对应的分发规则示意图。即N＝12，图16中的x12表示12个传输通道，这12个传输通道的编号依次从0到11。这12个传输通道中相邻2个传输通道为一个传输通道组，即传输通道0和传输通道1为一组传输通道，传输通道2和传输通道3为一组，以此类推，有6个传输通道组。这6个传输通道组的编号依次从0到5，可规定奇数传输通道组的轮询顺序位于偶数传输通道组的轮询顺序之前。图16以编码单元的长度是68字节(byte)为例。即发送端按照68字节的长度将至少一个第一类单元轮询分发到12个传输通道。同示例一类似，也按照先第一标识后数据的分发顺序依次将M个编码单元分发到6个传输通道组。经过3个分发循环周期(即经过一轮)，3个编码单元刚好可以完整地分发到12个传输通道，如图16所示。图16中第一轮有效载荷包括第一轮中的码块A0-A65、B0-B65以及C0-C65。从图16可以看出3个编码单元中的第一标识的轮询顺序位于有效载荷的轮询顺序之前，经过一轮的分发，第一标识A至第一标识C分布在传输通道0、传输通道1、传输通道4、传输通道5、传输通道8、传输通道9，而其他传输通道上并没有第一标识。如果下一轮分发第4到第6个编码单元时，沿用上一轮的分发规则，那么分发后，第一标识还是分布在传输通道0、传输通道1、传输通道4、传输通道5、传输通道8、传输通道9，其他传输通道上还是没有第一标识。
因此，在下一轮分发第4至第6个编码单元时，可调整分发规则，以使得第一标识在每个传输通道出现的概率相同，实现全部传输通道的DC均衡。例如可规定偶数传输通道组的轮询顺序位于奇数传输通道组的轮询顺序之前。即在第二轮分发第4至第6个编码单元时，可先分发数据再分发第一标识，也就是第一标识的轮询顺序位于部分有效载荷的轮询顺序之后。例如将传输通道0和传输通道1的数据与传输通道2和传输通道3的数据对换，如图16所示。这样分发第4至第6个编码单元，第一标识D至第一标识F分布在传输通道2、传输通道3、传输通道6、传输通道7、传输通道10、传输通道11。这样经过两轮的分发，每个传输通道上的第一标识的个数是相同的。以此类推，第三轮分发编码单元的分发规则同第一轮的分发规则，第四轮分发编码单元的分发规则同第二轮的分发规则，那么第一标识在每个传输通道上出现的概率是相同的。
与示例一相同，从图16中可看出，第一标识A到第一标识I所在传输通道0承载的有效载荷的编号均为10、22、34、46，第一标识A到第一标识I所在传输通道0承载的有效载荷的编号均为11、23、35、47。即每个轮询周期内，每个传输通道对应编码单元中的固定位置的载荷，易于接收端的实现。
示例三、请参见图17，为8个传输通道对应的分发规则示意图。即N＝8，图17中的x8 表示8个传输通道，这8个传输通道的编号依次从0到7。这8个传输通道中相邻2个传输通道为一个传输通道组，即传输通道0和传输通道1为一组传输通道，传输通道2和传输通道3为一组，以此类推，有4个传输通道组。这4个传输通道组的编号依次从0到3，可规定奇数传输通道组的轮询顺序位于偶数传输通道组的轮询顺序之前。图17以编码单元的长度是68字节(byte)为例。即发送端按照68字节的长度将至少一个第一类单元分发到8个传输通道。同示例一类似，也按照先第一标识后数据的分发顺序依次将M个编码单元分发到8个传输通道。经过2个分发循环周期(即经过一轮)，2个编码单元刚好可以完整地分发到8个传输通道，如图21所示。图17中第一轮有效载荷包括第一轮中的码块A0-A65和B0-B65。从图17可以看出2个编码单元中的第一标识的轮询顺序位于有效载荷的轮询顺序之前，经过一轮的分发，第一标识A至第一标识B分布在传输通道0、传输通道1、传输通道4、传输通道5，而其他传输通道上并没有第一标识。如果下一轮分发第3到第4个编码单元时，沿用上一轮的分发规则，那么分发后，第一标识还是分布在传输通道0、传输通道1、传输通道4、传输通道5，其他传输通道上还是没有第一标识。
因此，在下一轮分发第3至第4个编码单元时，可调整分发规则，以使得第一标识在每个传输通道出现的概率相同，实现全部传输通道的DC均衡。例如可规定偶数传输通道组的轮询顺序位于奇数传输通道组的轮询顺序之前。即在第二轮分发第3至第4个编码单元时，可先分发数据再分发第一标识，也就是第一标识的轮询顺序位于部分有效载荷的轮询顺序之后。例如将传输通道0和传输通道1的数据与传输通道2和传输通道3的数据对换，如图17所示。这样分发第3至第4个编码单元，第一标识C和第一标识D分布在传输通道2、传输通道3、传输通道6、传输通道7。这样经过两轮的分发，每个传输通道上的第一标识的个数是相同的。以此类推，第三轮分发编码单元的分发规则同第一轮的分发规则，第四轮分发编码单元的分发规则同第二轮的分发规则，那么第一标识在每个传输通道上出现的概率是相同的。
当然，如果发送端按照固定长度将至少一个第一类单元轮询分发到N个传输通道后，每个传输通道上出现第一标识的概率相同，那么在分发M个编码单元过程中也可以不调整分发规则。与示例一类似，每个轮询周期内，每个传输通道对应编码单元中的固定位置的载荷，易于接收端的实现。
示例四、请参见图18，为16个传输通道对应的分发规则示意图。即N＝16，图18中的x16表示16个传输通道，这16个传输通道的编号依次从0到15。这16个传输通道相邻2个传输通道为一个传输通道组，即传输通道0和传输通道1为一组传输通道，传输通道2和传输通道3为一组，以此类推，有8个传输通道组。这8个传输通道组的编号依次从0到7，可规定奇数传输通道组的轮询顺序位于偶数传输通道组的轮询顺序之前。图18以编码单元的长度是66字节(byte)为例。即发送端按照66字节的长度将至少一个第一类单元轮询分发到16个传输通道。可按照先第一标识后数据的分发顺序依次将M个编码单元分发到16个传输通道。经过8个分发循环周期，即8个编码单元刚好可以完整地分发到16个传输通道。也就是经过一轮之后，8个编码单元刚好可以完整地分发到16个传输通道，如图18所示。从图18可以看出8个编码单元经过一轮的分发，第一标识均匀分布在传输通道0至传输通道15。如果下一轮分发编码单元时，即分发第9至第16个编码单元时，沿用上一轮的分发规则，那么分发后，第一标识还是均匀分布在传输通道0至传输通道15。这样在下一轮分发第9至第16个编码单元时，可不调整分发规则。与示例一类似，每个轮询周期内，每个传输通道对应编 码单元中的固定位置的载荷，易于接收端的实现。
示例五、请参见图19，为16个传输通道对应的分发规则示意图。即N＝12，图19中的x12表示12个传输通道，这12个传输通道的编号依次从0到11。这12个传输通道相邻2个传输通道为一个传输通道组，即传输通道0和传输通道1为一组传输通道，传输通道2和传输通道3为一组，以此类推，有6个传输通道组。这6个传输通道组的编号依次从0到5，可规定奇数传输通道组的轮询顺序位于偶数传输通道组的轮询顺序之前。图19以编码单元的长度是82字节(byte)为例。即发送端按照82字节的长度将至少一个第一类单元轮询分发到12个传输通道。可按照先第一标识后数据的分发顺序依次将M个编码单元分发到12个传输通道。从图19可以看出6个编码单元经过一轮的分发，第一标识均匀分布在传输通道0至传输通道11。如果下一轮分发编码单元时，即分发第7至第12个编码单元时，沿用上一轮的分发规则，那么分发后，第一标识还是均匀分布在传输通道0至传输通道11。这样在下一轮分发第7至第12个编码单元时，可不调整分发规则。与示例一类似，每个轮询周期内，每个传输通道对应编码单元中的固定位置的载荷，易于接收端的实现。
需要说明的是，上述的示例一到示例五，以一轮中N个传输通道的轮询顺序相同为例。本申请实施例对此不作限制，例如一轮中N个传输通道中不同传输通道组的轮询顺序也可以不相同，只要经过多轮分发之后能够使得各个传输通道上出现第一标识的概率相同即可。
在示例一到示例五中，以一个传输通道承载8bit的载荷为例，那么第一标识即16bit承载于两个传输通道，可认为这两个传输通道中一个传输通道可承载16bit中的前8bit，另一个传输通道承载16bit中的后8bit。由于16bit中前8bit和后8bit中的“0”和“1”个数相同，所以可保证每个传输通道的DC均衡。如果采用PAM4调制，那么16bit中前8bit对应的“0”、“1”、“2”、“3”均匀，且后8bit对应的“0”、“1”、“2”、“3”也均匀，即保证每个传输通道的DC均衡。
S403、接收端根据至少一个第一类单元包括的第一标识，对M个编码单元解码，获得L个帧。
接收端从N个传输通道中接收M个编码单元。应理解，接收端从N个传输通道接收M个编码单元的接收规则与发送端分发M个编码单元的分发规则对应。例如发送端按照上述示例一到示例三的长度，即68字节的长度轮询分发至少一个第一类单元，那么接收端按照68字节的长度从N个传输通道中接收至少一个第一类单元。且接收端根据每一轮的分发规则，可确定在每一轮中第一标识所在的传输通道，进而确定第一标识的位置，根据第一标识对所接收的编码单元进行解码，获得L个帧。
本申请实施例提供的数据编码方法，在对数据进行编码之前，通过插入用于标识L个帧中各个帧的帧头的开始位置的第一标识，可实现接收端对各个帧的界定。且由于第一标识的插入可控制整个数据流中连续“0”和连续“1”的个数，避免直流基线漂移，使得接收端正确解析各个帧。第一标识可通过纠错检错码字生成，即可实现对第一标识的保护，无法另外设置用于保护第一标识的校验信息，可降低编码开销。另外，第一标识本身可实现DC平衡，即使对编码单元中的有效载荷进行扰码，对于整个编码单元来说，还是能够较好地实现DC均衡，从而能够保证在PAM4调制方式和NRZ调制方式下满足DC均衡。另外，由于第一标识可通过纠错检错码字生成，那么第一标识本身具有纠错能力，这样即使调整第一标识的部分比特，接收端也可以通过对其进行纠错，不会影响对第一标识的识别。因此，可通过调整第一标识的部分比特保证一定长度范围内的任意数据流的DC均衡。
上述本申请提供的实施例中，分别从发送端和接收端之间交互的角度对本申请实施例 提供的方法进行了介绍。为了实现上述本申请实施例提供的方法中的各功能，发送端和接收端可以包括硬件结构和/或软件模块，以硬件结构、软件模块、或硬件结构加软件模块的形式来实现上述各功能。上述各功能中的某个功能以硬件结构、软件模块、还是硬件结构加软件模块的方式来执行，取决于技术方案的特定应用和设计约束条件。
下面结合附图介绍本申请实施例中用来实现上述方法的通信装置。因此，上文中的内容均可以用于后续实施例中，重复的内容不再赘述。
图20为本申请实施例提供的通信装置2000的一种结构示意图。该通信装置2000，可以对应实现上述各个方法实施例中由发送端或接收端实现的功能或者步骤。该通信装置可以为网络设备(例如交换机)，也可以为芯片或电路，比如可设置于网络设备的芯片或电路。该通信装置2000可包括处理器2001和收发器2002，其中，处理器2001、收发器2002可以通过总线系统相连。可选的，该通信装置还可以包括存储器，该存储单元可以用于存储指令(代码或者程序)和/或数据。收发器2002和处理器2001可以与该存储单元耦合，例如，处理器2001可以读取存储单元中的指令(代码或者程序)和/或数据，以实现相应的方法。上述各个单元可以独立设置，也可以部分或者全部集成，例如收发器2002可包括独立设置的发送器和接收器。可选的，收发器2002还可以为通信接口2003，或者收发器2002还可以包括通信接口2003，所述通信接口2003用于输入和/或输出信息；所述处理器2001，用于执行计算机程序或指令，使得通信装置2000实现上述图4的相关方案中发送端或接收端的方法。因为通信接口2003是可选的，所以在图20中以虚线进行示意。
应理解，上述处理器2001可以是一个芯片。例如，该处理器可以是现场可编程门阵列(field programmable gate array，FPGA)，可以是专用集成芯片(application specific integrated circuit，ASIC)，还可以是系统芯片(system on chip，SoC)，还可以是中央处理器(central processor unit，CPU)，还可以是网络处理器(network processor，NP)，还可以是数字信号处理电路(digital signal processor，DSP)，还可以是微控制器(micro controller unit，MCU)，还可以是可编程控制器(programmable logic device，PLD)或其他集成芯片。
在实现过程中，上述方法的各步骤可以通过处理器中的硬件的集成逻辑电路或者软件形式的指令完成。结合本申请实施例所公开的方法的步骤可以直接体现为硬件处理器执行完成，或者用处理器中的硬件及软件模块组合执行完成。软件模块可以位于随机存储器，闪存、只读存储器，可编程只读存储器或者电可擦写可编程存储器、寄存器等本领域成熟的存储介质中。该存储介质位于存储器，处理器读取存储器中的信息，结合其硬件完成上述方法的步骤。
应注意，本申请实施例中的处理器2001可以是一种集成电路芯片，具有信号的处理能力。在实现过程中，上述方法实施例的各步骤可以通过处理器中的硬件的集成逻辑电路或者软件形式的指令完成。上述的处理器可以是通用处理器、数字信号处理器(DSP)、专用集成电路(ASIC)、现场可编程门阵列(FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。可以实现或者执行本申请实施例中的公开的各方法、步骤及逻辑框图。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。结合本申请实施例所公开的方法的步骤可以直接体现为硬件译码处理器执行完成，或者用译码处理器中的硬件及软件模块组合执行完成。软件模块可以位于随机存储器，闪存、只读存储器，可编程只读存储器或者电可擦写可编程存储器、寄存器等本领域成熟的存储介质中。该存储介质位于存储器，处理器读取存储器中的信息，结合其硬件完成上述方法的 步骤。
可以理解，本申请实施例中的存储器可以是易失性存储器或非易失性存储器，或可包括易失性和非易失性存储器两者。其中，非易失性存储器可以是只读存储器(read-only memory，ROM)、可编程只读存储器(programmable ROM，PROM)、可擦除可编程只读存储器(erasable PROM，EPROM)、电可擦除可编程只读存储器(electrically EPROM，EEPROM)或闪存。易失性存储器可以是随机存取存储器(random access memory，RAM)，其用作外部高速缓存。通过示例性但不是限制性说明，许多形式的RAM可用，例如静态随机存取存储器(static RAM，SRAM)、动态随机存取存储器(dynamic RAM，DRAM)、同步动态随机存取存储器(synchronous DRAM，SDRAM)、双倍数据速率同步动态随机存取存储器(double data rate SDRAM，DDR SDRAM)、增强型同步动态随机存取存储器(enhanced SDRAM，ESDRAM)、同步连接动态随机存取存储器(synchlink DRAM，SLDRAM)和直接内存总线随机存取存储器(direct rambus RAM，DR RAM)。应注意，本文描述的系统和方法的存储器旨在包括但不限于这些和任意其它适合类型的存储器。
在一些实施例中，通信装置2000能够对应实现上述方法实施例中发送端的行为和功能。例如通信装置2000可以为发送端，也可以为应用于发送端中的部件(例如芯片或者电路)。通信装置2000可以包括处理器2001和收发器2002，收发器2002可以用于执行图4所示的实施例中由发送端所执行的全部接收或发送操作，例如图4所示的实施例中的S402，和/或用于支持本文所描述的技术的其它过程；处理器2001用于执行图4所示的实施例中由发送端所执行的除全部接收或发送操作以外的操作，例如图4所示的实施例中的S401，和/或用于支持本文所描述的技术的其它过程。
例如，处理器2001用于生成M个编码单元，该M个编码单元是对L个帧进行编码得到的，M个编码单元包括至少一个第一类单元，第一类单元包括第一标识，第一标识用于指示所述L个帧中的第一帧的帧头在所述第一类单元中的开始位置，所述M为大于或等于1的整数，所述L为大于或等于1的整数；
处理器2001用于将述M个编码单元分发到N个传输通道，所述N为大于或等于1的整数。
作为一种可选的实现方式，第一类单元包括第一字段和第二字段，第一字段用于承载所述第一标识，第二字段用于承载所述L个帧中一个或多个帧中的部分或全部数据。
作为一种可选的实现方式，第一类单元还包括第三字段，第三字段用于承载用于校验所述第一类单元的校验信息。
作为一种可选的实现方式，M个编码单元还包括至少一个第二类单元，所述第二类单元包括第二字段，其中，第一单元所承载的数据属于第二单元中的第一标识对应的帧，所述第一单元为所述至少一个第二类单元中的一个单元，所述第二单元为所述至少一个第一类单元中的一个单元，所述第二单元中的所述第一标识是位于所述第一单元之前的第一个标识。
作为一种可选的实现方式，第二字段包括K个子字段，所述K个子字段中每个子字段占用的比特数相同，或者，所述K个子字段中至少两个子字段占用的比特数不相同。
作为一种可选的实现方式，所述第一帧的帧头的开始位置为所述K个子字段的中的第一子字段的开始位置。
作为一种可选的实现方式，所述第一标识包括X个比特，X个比特在PAM4调制方式下满足直流均衡。
作为一种可选的实现方式，X个比特还在NRZ调制方式下满足直流均衡。
作为一种可选的实现方式，X等于16，所述第一标识包括1110010011100100、0010011111011000、0110001110000111、1000011101100011、0111100010011100、1001110001111000、1101100000100111或0001101100011011。
作为一种可选的实现方式，所述X个比特是根据预设规则调整eBCH码字的比特位顺序获得的。
作为一种可选的实现方式，以固定长度将所述至少一个第一类单元轮询分发到N个传输通道。
示例性的，所述至少一个第一类单元中的第三单元的第一标识的分发顺序位于有效载荷的分发顺序之前。
进一步地，所述至少一个第一类单元中的第四单元的第一标识的分发顺序位于部分有效载荷的分发顺序之后。
又一示例性的，N个传输通道包括P个传输通道组，其中，在第一轮中，P个传输通道组中的第一传输通道组的轮询顺序位于所述P个传输通道组中的第二传输通道组的轮询顺序之前。
进一步地，在第二轮中，所述第一传输通道组的轮询顺序位于所述第二传输通道组的轮询顺序之后。
作为一种可选的实现方式，在发送所述M个编码单元之前，收发器2002还用于：
针对N个传输通道中的任意一条传输通道，根据该传输通道的直流均衡情况，调整该传输通道中的一个或多个第一标识的部分比特位。
在一些实施例中，通信装置2000能够对应实现上述方法实施例中接收端的行为和功能。例如通信装置2000可以为接收端，也可以为应用于接收端中的部件(例如芯片或者电路)。通信装置2000可以包括处理器2001和收发器2002，收发器2002可以用于执行图4所示的实施例中由发送端所执行的全部接收或发送操作，例如图4所示的实施例中的S402，和/或用于支持本文所描述的技术的其它过程；处理器2001用于执行图4所示的实施例中由发送端所执行的除全部接收或发送操作以外的操作，例如图4所示的实施例中的S403，和/或用于支持本文所描述的技术的其它过程。
例如，收发器2002用于从N个传输通道中接收M个编码单元，M个编码单元是对L个帧进行编码得到的，M个编码单元包括至少一个第一类单元，所述第一类单元包括第一标识，第一标识用于指示所述L帧中的第一帧的帧头在所述第一类单元中的位置，M为大于或等于1的整数，L为大于或等于1的整数，N为大于或等于1的整数；
处理器2001用于根据至少一个第一标识解码所述M个编码单元，获得所述L个帧。
作为一种可选的实现方式，第一类单元包括第一字段和第二字段，第一字段用于承载所述第一标识，第二字段用于承载所述L个帧中一个或多个帧中的部分或全部数据。
作为一种可选的实现方式，第一类单元还包括第三字段，第三字段用于承载用于校验所述第一类单元的校验信息。
作为一种可选的实现方式，M个编码单元还包括至少一个第二类单元，所述第二类单元包括第二字段，其中，第一单元所承载的数据属于第二单元中的第一标识对应的帧，所述第一单元为所述至少一个第二类单元中的一个单元，所述第二单元为所述至少一个第一类单元中的一个单元，所述第二单元中的所述第一标识是位于所述第一单元之前的第一个 标识。
作为一种可选的实现方式，第二字段包括K个子字段，所述K个子字段中每个子字段占用的比特数相同，或者，所述K个子字段中至少两个子字段占用的比特数不相同。
作为一种可选的实现方式，所述第一帧的帧头的开始位置为所述K个子字段的中的第一子字段的开始位置。
作为一种可选的实现方式，所述第一标识包括X个比特，所述X个比特在PAM4调制方式下满足直流均衡。
作为一种可选的实现方式，所述X个比特还在NRZ调制方式下满足直流均衡。
作为一种可选的实现方式，所述X等于16，所述第一标识包括1110010011100100、0010011111011000、0110001110000111、1000011101100011、0111100010011100、1001110001111000、1101100000100111或0001101100011011。
作为一种可选的实现方式，所述X个比特是根据预设规则调整eBCH码字的比特位顺序获得的。
作为一种可选的实现方式，收发器2002具体用于以固定长度从所述N个传输通道接收所述M个编码单元。
示例性的，所述至少一个第一类单元中的第三单元的第一标识的分发顺序位于有效载荷的分发顺序之前。
进一步地，所述至少一个第一类单元中的第四单元的第一标识的分发顺序位于部分有效载荷的分发顺序之后。
又一示例性的，在第一轮中，N个传输通道包括P个传输通道组，其中，P个传输通道组中的第一传输通道组的轮询顺序位于所述P个传输通道组中的第二传输通道组的轮询顺序之前。
进一步地，在第二轮中，所述第一传输通道组的轮询顺序位于所述第二传输通道组的轮询顺序之后。
该通信装置2000所涉及的与本申请实施例提供的技术方案相关的概念，解释和详细说明及其他步骤请参见前述方法或其他实施例中关于这些内容的描述，此处不做赘述。
图21示出了本申请实施例提供的通信装置的另一结构示意图，如图21所示，通信装置2100可以包括处理模块2101和收发模块2102，应理解，该通信装置2100的单元的划分仅仅是一种逻辑功能的划分，实际实现时可以全部或部分集成到一个物理实体上，也可以物理上分开。本申请实施例中，收发模块2102可以由上述图20的收发器2002实现，处理模块2101可以由上述图20的处理器2001实现。
该通信装置2100能够对应实现上述方法实施例中发送端侧和/或接收端侧所执行的步骤。例如通信装置2100可以为发送端，也可以为应用于发送端中的部件(例如芯片或者电路)。
在一些实施例中，处理模块2101用于生成M个编码单元，M个编码单元是对L个帧进行编码得到的，M个编码单元包括至少一个第一类单元，所述第一类单元包括第一标识，所述第一标识用于指示所述L个帧中的第一帧的帧头在所述第一类单元中的开始位置，M为大于或等于1的整数，L为大于或等于1的整数；
收发模块2102用于将M个编码单元分发到N个传输通道，N为大于或等于1的整数。
该通信装置2100所涉及的与本申请实施例提供的技术方案相关的概念，解释和详细 说明及其他步骤请参见前述方法或其他实施例中关于这些内容的描述，此处不作赘述。可以理解的是，上述通信装置2100中各个模块的功能可以参考相应方法实施例的实现，此处不再赘述。
又例如该通信装置2100能够对应实现上述方法实施例中接收端的行为和功能。例如通信装置2100可以为接收端，也可以为应用于接收端中的部件(例如芯片或者电路)。
在一些实施例中，收发模块2102用于从N个传输通道中接收M个编码单元，M个编码单元是对L个帧进行编码得到的，M个编码单元包括至少一个第一类单元，所述第一类单元包括第一标识，第一标识用于指示所述L帧中的第一帧的帧头在所述第一类单元中的位置，M为大于或等于1的整数，L为大于或等于1的整数，N为大于或等于1的整数；
处理模块2101用于根据至少一个第一标识解码所述M个编码单元，获得所述L个帧。
该通信装置2100所涉及的与本申请实施例提供的技术方案相关的概念，解释和详细说明及其他步骤请参见前述方法或其他实施例中关于这些内容的描述，此处不作赘述。可以理解的是，上述通信装置2100中各个模块的功能可以参考相应方法实施例的实现，此处不再赘述。
应理解，以上通信装置2100的模块的划分仅仅是一种逻辑功能的划分，实际实现时可以全部或部分集成到一个物理实体上，也可以物理上分开。本申请实施例中，收发模块2102可以由上述图20的收发器2002实现，处理模块2101可以由上述图20的处理器2001实现。
本申请实施例还提供一种通信系统，其包括前述的用于执行发送端侧方案的通信装置和用于执行接收到侧方案的通信装置；或者还可以包括更多的发送端侧或接收端侧方案的通信装置。
应理解，上述通信装置可以是一个芯片，所述处理器可以通过硬件来实现也可以通过软件来实现，当通过硬件实现时，该处理器可以是逻辑电路、集成电路等；当通过软件来实现时，该处理器可以是一个通用处理器，通过读取存储器中存储的软件代码来实现，改存储器可以集成在处理器中，可以位于所述处理器之外，独立存在。
本申请还提供一种计算机程序产品，该计算机程序产品包括：计算机程序代码，当该计算机程序代码在计算机上运行时，使得该计算机执行图4所示实施例中任意一个实施例的方法。
根据本申请实施例提供的方法，本申请还提供一种计算机可读存储介质，该计算机可读介质存储有程序代码，当该程序代码在计算机上运行时，使得该计算机执行图4所示实施例中任意一个实施例的方法。
应理解，本申请实施例中的术语“系统”和“网络”可被互换使用。“至少一个”是指一个或者多个，“多个”是指两个或两个以上。“和/或”，描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B的情况，其中A，B可以是单数或者复数。字符“/”一般表示前后关联对象是一种“或”的关系。“以下至少一项(个)”或其类似表达，是指的这些项中的任意组合，包括单项(个)或复数项(个)的任意组合。例如，a，b或c中的至少一项(个)，可以表示：a，b，c，a和b，a和c，b和c，或a、b和c，其中a，b，c可以是单个，也可以是多个。
以及，除非有相反的说明，本申请实施例提及“第一”、“第二”等序数词是用于对多个对象进行区分，不用于限定多个对象的顺序、时序、优先级或者重要程度。例如，第一信 息和第二信息，只是为了区分不同的指示信息，而并不是表示这两种信息的优先级、或者重要程度等的不同。
应理解，在本申请的各种实施例中，上述各过程的序号的大小并不意味着执行顺序的先后，各过程的执行顺序应以其功能和内在逻辑确定，而不应对本申请实施例的实施过程构成任何限定。
另外，在本申请实施例中，“示例性的”一词用于表示例子或说明。本申请实施例汇总被描述为“示例”的任何实施例或实现方案不应被解释为比其他实施例或实现方案更优选。也就是，使用“示例”一词旨在以具体方式呈现概念。
本申请实施例提供的方法中，可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时，全部或部分地产生按照本发明实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、网络设备、用户设备或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(digital subscriber line，简称DSL)或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机可以存取的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质(例如，软盘、硬盘、磁带)、光介质(例如，数字视频光盘(digital video disc，简称DVD))、或者半导体介质(例如，SSD)等。
应理解，在本申请的各种实施例中，上述各过程的序号的大小并不意味着执行顺序的先后，各过程的执行顺序应以其功能和内在逻辑确定，而不应对本申请实施例的实施过程构成任何限定。
另外，在本申请实施例中，“示例性的”一词用于表示例子或说明。本申请实施例汇总被描述为“示例”的任何实施例或实现方案不应被解释为比其他实施例或实现方案更优选。也就是，使用“示例”一词旨在以具体方式呈现概念。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (33)

  1. 一种数据编码方法，其特征在于，包括：
    生成M个编码单元，所述M个编码单元是对L个帧进行编码得到的，所述M个编码单元包括至少一个第一类单元，所述第一类单元包括第一标识，所述第一标识用于指示所述L个帧中的第一帧的帧头在所述第一类单元中的开始位置，所述M为大于或等于1的整数，所述L为大于或等于1的整数；
    将所述M个编码单元分发到N个传输通道，所述N为大于或等于1的整数。
  2. 如权利要求1所述的方法，其特征在于，所述第一类单元包括第一字段和第二字段，所述第一字段用于承载所述第一标识，所述第二字段用于承载所述L个帧中一个或多个帧中的部分或全部数据。
  3. 如权利要求2所述的方法，其特征在于，所述第一类单元还包括第三字段，所述第三字段用于承载用于校验所述第一类单元的校验信息。
  4. 如权利要求2或3所述的方法，其特征在于，所述M个编码单元还包括至少一个第二类单元，所述第二类单元包括第二字段，其中，第一单元所承载的数据属于第二单元中的第一标识对应的帧，所述第一单元为所述至少一个第二类单元中的一个单元，所述第二单元为所述至少一个第一类单元中的一个单元，所述第二单元为所述第一单元的前一个第一类单元。
  5. 如权利要求2-4任一项所述的方法，其特征在于，所述第二字段包括K个子字段，所述K个子字段中每个子字段占用的比特数相同，或者，所述K个子字段中至少两个子字段占用的比特数不相同。
  6. 如权利要求5所述的方法，其特征在于，所述第一帧的帧头在所述第一类单元中的开始位置为所述K个子字段的中的第一子字段的开始位置。
  7. 如权利要求1-6任一项所述的方法，其特征在于，所述第一标识包括X个比特，所述X个比特在4阶脉冲幅度调制PAM4调制方式下满足直流均衡。
  8. 如权利要求7所述的方法，其特征在于，所述X个比特还在非归零NRZ调制方式下满足直流均衡。
  9. 如权利要求7或8所述的方法，其特征在于，所述X等于16，所述第一标识包括1110010011100100、0010011111011000、0110001110000111、1000011101100011、0111100010011100、1001110001111000、1101100000100111或0001101100011011。
  10. 如权利要求1-9任一项所述的方法，其特征在于，以固定长度将所述至少一个第一类单元轮询分发到N个传输通道。
  11. 如权利要求10所述的方法，其特征在于，所述至少一个第一类单元中的第三单元的第一标识的分发顺序位于有效载荷的分发顺序之前。
  12. 如权利要求11所述的方法，其特征在于，所述至少一个第一类单元中的第四单元的第一标识的分发顺序位于部分有效载荷的分发顺序之后。
  13. 如权利要求10所述的方法，其特征在于，所述N个传输通道包括P个传输通道组，在第一轮中，所述P个传输通道组中的第一传输通道组的轮询顺序位于所述P个传输通道组中的第二传输通道组的轮询顺序之前。
  14. 如权利要求13所述的方法，其特征在于，在第二轮中所述P个传输通道组中的第 一传输通道组的轮询顺序位于第二传输通道组的轮询顺序之后。
  15. 如权利要求7-14任一项所述的方法，其特征在于，在发送所述M个编码单元之前，所述方法还包括：
    针对所述N个传输通道中的任意一条传输通道，根据该传输通道的直流均衡情况，调整该传输通道中的一个或多个第一标识的部分比特位。
  16. 一种数据解码方法，其特征在于，包括：
    从N个传输通道中接收M个编码单元，所述M个编码单元是对L个帧进行编码得到的，所述M个编码单元包括至少一个第一类单元，所述第一类单元包括第一标识，所述第一标识用于指示所述L帧中的第一帧的帧头在所述第一类单元中的位置，所述M为大于或等于1的整数，所述L为大于或等于1的整数，所述N为大于或等于1的整数；
    根据至少一个第一标识解码所述M个编码单元，获得所述L个帧。
  17. 如权利要求16所述的方法，其特征在于，所述第一类单元包括第一字段和第二字段，所述第一字段用于承载所述第一标识，所述第二字段用于承载所述L个帧中一个或多个帧中的部分或全部数据。
  18. 如权利要求17所述的方法，其特征在于，所述第一类单元还包括第三字段，所述第三字段用于承载用于校验所述第一类单元的校验信息。
  19. 如权利要求17或18所述的方法，其特征在于，所述M个编码单元还包括至少一个第二类单元，所述第二类单元包括第二字段，其中，第一单元所承载的数据属于第二单元中的第一标识对应的帧，所述第一单元为所述至少一个第二类单元中的一个单元，所述第二单元为所述至少一个第一类单元中的一个单元，所述第二单元为所述第一单元的前一个第一类单元。
  20. 如权利要求17-19任一项所述的方法，其特征在于，所述第二字段包括K个子字段，所述K个子字段中每个子字段占用的比特数相同，或者，所述K个子字段中至少两个子字段占用的比特数不相同。
  21. 如权利要求20所述的方法，其特征在于，所述第一帧的帧头的开始位置为所述K个字段的中的第一子字段的开始位置。
  22. 如权利要求16-21任一项所述的方法，其特征在于，所述第一标识包括X个比特，所述X个比特在4阶脉冲幅度调制PAM4调制方式下满足直流均衡。
  23. 如权利要求22所述的方法，其特征在于，所述X个比特还在非归零NRZ调制方式下满足直流均衡。
  24. 如权利要求22或23所述的方法，其特征在于，所述X等于16，所述第一标识包括1110010011100100、0010011111011000、0110001110000111、1000011101100011、0111100010011100、1001110001111000、1101100000100111或0001101100011011。
  25. 如权利要求16-24任一项所述的方法，其特征在于，以固定长度从所述N个传输通道轮询接收所述M个编码单元。
  26. 如权利要求25所述的方法，其特征在于，所述至少一个第一类单元中的第三单元的第一标识的分发顺序位于有效载荷的分发顺序之前。
  27. 如权利要求26所述的方法，其特征在于，所述至少一个第一类单元中的第四单元的第一标识的分发顺序位于部分有效载荷的分发顺序之后。
  28. 如权利要求25所述的方法，其特征在于，所述N个传输通道包括P个传输通道组， 在第一轮中，所述P个传输通道组中的第一传输通道组的轮询顺序位于所述P个传输通道组中的第二传输通道组的轮询顺序之前。
  29. 如权利要求28所述的方法，其特征在于，在第二轮中，所述P个传输通道组中的第一传输通道组的轮询顺序位于第二传输通道组的轮询顺序之后。
  30. 一种通信装置，其特征在于，包括处理器和收发器，其中，
    所述处理器用于生成M个编码单元，所述M个编码单元是对L个帧进行编码得到的，所述M个编码单元包括至少一个第一类单元，所述第一类单元包括第一标识，所述第一标识用于指示所述L个帧中的第一帧的帧头在所述第一类单元中的开始位置，所述M为大于或等于1的整数，所述L为大于或等于1的整数；
    所述收发器，用于将所述M个编码单元分发到N个传输通道，所述N为大于或等于1的整数。
  31. 一种通信装置，其特征在于，包括处理器和收发器，其中，
    所述收发器用于从N个传输通道中接收M个编码单元，所述M个编码单元是对L个帧进行编码得到的，所述M个编码单元包括至少一个第一类单元，所述第一类单元包括第一标识，所述第一标识用于指示所述L帧中的第一帧的帧头在所述第一类单元中的位置，所述M为大于或等于1的整数，所述L为大于或等于1的整数，所述N为大于或等于1的整数；
    所述处理器用于根据至少一个第一标识解码所述M个编码单元，获得所述L个帧。
  32. 一种芯片，其特征在于，所述芯片包括至少一个处理器和接口，所述处理器用于读取并执行存储器中存储的指令，当所述指令被运行时，使得所述芯片执行如权利要求1-15或16-29任一项所述的方法。
  33. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质存储有计算机程序，所述计算机程序包括程序指令，所述程序指令当被计算机执行时，使所述计算机执行如权利要求1-15或16-29任一项所述的方法。
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116132549A (zh) * 2022-11-03 2023-05-16 北京晟芯网络科技有限公司 一种以太网数据接收方法、发送方法、装置及收发系统

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150229329A1 (en) * 2012-09-21 2015-08-13 Nippon Telegraph And Telephone Corporation Encoding/decoding system for parallel data
CN105406937A (zh) * 2014-09-12 2016-03-16 中兴通讯股份有限公司 定帧方法及装置
CN106341207A (zh) * 2015-07-06 2017-01-18 华为技术有限公司 一种编码块数据流的发送和接收方法、设备和系统
US10644834B1 (en) * 2017-08-08 2020-05-05 Marvell International Ltd. Efficient ethernet multi-mode coding and modulation for twisted-pair
CN111385058A (zh) * 2018-12-27 2020-07-07 华为技术有限公司 一种数据传输的方法和装置
CN111669250A (zh) * 2019-03-06 2020-09-15 华为技术有限公司 数据传输方法、装置及系统

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9602401B2 (en) * 2014-09-22 2017-03-21 Intel Corporation Technologies for high-speed PCS supporting FEC block synchronization with alignment markers
US20160261375A1 (en) * 2015-03-04 2016-09-08 Qualcomm Incorporated Packet format and coding method for serial data transmission

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150229329A1 (en) * 2012-09-21 2015-08-13 Nippon Telegraph And Telephone Corporation Encoding/decoding system for parallel data
CN105406937A (zh) * 2014-09-12 2016-03-16 中兴通讯股份有限公司 定帧方法及装置
CN106341207A (zh) * 2015-07-06 2017-01-18 华为技术有限公司 一种编码块数据流的发送和接收方法、设备和系统
US10644834B1 (en) * 2017-08-08 2020-05-05 Marvell International Ltd. Efficient ethernet multi-mode coding and modulation for twisted-pair
CN111385058A (zh) * 2018-12-27 2020-07-07 华为技术有限公司 一种数据传输的方法和装置
CN111669250A (zh) * 2019-03-06 2020-09-15 华为技术有限公司 数据传输方法、装置及系统

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP4203356A4 *

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