WO2022052240A1 - 多灰阶像素驱动电路及显示面板 - Google Patents

多灰阶像素驱动电路及显示面板 Download PDF

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Publication number
WO2022052240A1
WO2022052240A1 PCT/CN2020/124659 CN2020124659W WO2022052240A1 WO 2022052240 A1 WO2022052240 A1 WO 2022052240A1 CN 2020124659 W CN2020124659 W CN 2020124659W WO 2022052240 A1 WO2022052240 A1 WO 2022052240A1
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module
light
emitting
film transistor
thin film
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English (en)
French (fr)
Inventor
李艳
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TCL China Star Optoelectronics Technology Co Ltd
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TCL China Star Optoelectronics Technology Co Ltd
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Priority to US15/734,577 priority Critical patent/US11328654B2/en
Publication of WO2022052240A1 publication Critical patent/WO2022052240A1/zh
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

Definitions

  • the present application relates to the field of display technology, and in particular, to a multi-gray-scale pixel driving circuit and a display panel.
  • each pixel unit of a display panel only includes a limited number of light-emitting devices, for example, each pixel unit includes three sub-pixel circuits of red, green, and blue, and each color sub-pixel circuit uses only one LED as a light-emitting device. show.
  • the limited number of light-emitting devices generally cannot be adjusted by the control module, so the existing pixel units can achieve fewer grayscales, which are only suitable for low grayscale display, and cannot meet high grayscale display.
  • the existing pixel unit can realize a small number of gray scales, which is only suitable for low gray scale display, and cannot satisfy high gray scale display.
  • the present application provides a multi-gray-scale pixel driving circuit
  • the multi-gray-scale pixel driving circuit includes: a driving module, a light-emitting module and a light-emitting control module, which are arranged in series between the first electrode and the second electrode, The potential of the first electrode is the first potential, and the potential of the second electrode is the second potential; wherein, the driving module and the light-emitting control module control the light-emitting condition of the light-emitting module according to a preset timing sequence to achieve Multi-grayscale display below or above the grayscale threshold.
  • the light-emitting module includes a plurality of light-emitting units arranged in parallel, and each of the light-emitting units includes several light-emitting devices connected in series and/or in parallel.
  • the multi-gray-scale pixel driving circuit further includes a writing module, a control terminal of the writing module is connected to a scan signal, an input terminal of the writing module is connected to a data signal, and the writing module is connected to a data signal. The output end of the module is connected with the control end of the driving module.
  • the multi-gray-scale pixel driving circuit further includes a storage module, the output terminal of the writing module and the output terminal of the driving module are respectively connected to the first terminal of the storage module, and the storage module is connected to the first terminal of the storage module. The second end of the module is grounded.
  • the light emission control module includes a plurality of control thin film transistors, the gate of each control thin film transistor is connected to a corresponding light emission signal received by the light emission control module, and each control film
  • the source electrode of the transistor is connected to the second electrode, and the drain electrode of each control thin film transistor is connected to the input end of a corresponding one of the light emitting units.
  • the driving module includes a second thin film transistor, a drain electrode of the second thin film transistor is connected to the first electrode, and a source electrode of the second thin film transistor is connected to a corresponding one of the light-emitting units output connection.
  • the writing module includes a third thin film transistor, a gate of the third thin film transistor is connected to a scan signal, a source of the third thin film transistor is connected to a data signal, and a source of the third thin film transistor is connected to a data signal.
  • the drain is connected to the gate of the second thin film transistor.
  • the storage module includes a storage capacitor, a first end of the storage capacitor is connected to the gate of the second thin film transistor and the drain of the third thin film transistor, respectively, and the storage capacitor is The second terminal is grounded.
  • the present application also provides a display panel, which includes the above-mentioned multi-gray-scale pixel driving circuit, wherein the multi-gray-scale pixel circuit includes a driving module arranged in series between the first electrode and the second electrode, A light-emitting module and a light-emitting control module, the potential of the first electrode is a first potential, and the potential of the second electrode is a second potential; wherein, the driving module and the light-emitting control module control the The light-emitting condition of the light-emitting module is to realize multi-gray-scale display lower than the gray-scale threshold or higher than the gray-scale threshold.
  • the light-emitting module includes a plurality of light-emitting units arranged in parallel, and each of the light-emitting units includes several light-emitting devices connected in series and/or in parallel.
  • the multi-gray-scale pixel driving circuit further includes a writing module, a control terminal of the writing module is connected to a scan signal, an input terminal of the writing module is connected to a data signal, and the writing module is connected to a data signal. The output end of the module is connected with the control end of the driving module.
  • the multi-gray-scale pixel driving circuit further includes a storage module, the output terminal of the writing module and the output terminal of the driving module are respectively connected to the first terminal of the storage module, and the storage module is connected to the first terminal of the storage module. The second end of the module is grounded.
  • the light emission control module includes a plurality of control thin film transistors, the gate of each control thin film transistor is connected to a corresponding light emission signal received by the light emission control module, and each control film
  • the source electrode of the transistor is connected to the second electrode, and the drain electrode of each control thin film transistor is connected to the input end of a corresponding one of the light emitting units.
  • the driving module includes a second thin film transistor, a drain electrode of the second thin film transistor is connected to the first electrode, and a source electrode of the second thin film transistor is connected to a corresponding one of the light-emitting units output connection.
  • the writing module includes a third thin film transistor, a gate of the third thin film transistor is connected to a scan signal, a source of the third thin film transistor is connected to a data signal, and a source of the third thin film transistor is connected to a data signal.
  • the drain is connected to the gate of the second thin film transistor.
  • the storage module includes a storage capacitor, a first end of the storage capacitor is connected to the gate of the second thin film transistor and the drain of the third thin film transistor, respectively, and the storage capacitor is The second terminal is grounded.
  • a driving module, a light-emitting module and a light-emitting control module are arranged in series between the first electrode and the second electrode in the multi-gray-scale pixel driving circuit, and the first electrode has a
  • the potential is the first potential
  • the potential of the second electrode is the second potential
  • the driving module and the light-emitting control module are used to control the light-emitting conditions of the light-emitting module according to the preset timing, so that the light-emitting module can realize low grayscale or high grayscale.
  • the gray-scale display greatly increases the number of gray-scales that can be displayed, compared with the prior art that can only realize low-gray-scale display.
  • the multi-gray-scale pixel driving circuit is used in a display panel to realize the display of more gray-scale numbers.
  • FIG. 1 is a schematic diagram of a first structure of a multi-gray-scale pixel driving circuit provided by an embodiment of the present application.
  • FIG. 2 is a schematic diagram of a second structure of a multi-gray-scale pixel driving circuit provided by an embodiment of the present application.
  • FIG. 3 is a schematic diagram of a third structure of a multi-gray-scale pixel driving circuit provided by an embodiment of the present application.
  • FIG. 4 is a schematic diagram of a specific structure of a multi-gray-scale pixel driving circuit provided by an embodiment of the present application.
  • FIG. 5( a ) is a low-gray-scale timing diagram of a multi-gray-scale pixel driving circuit provided by an embodiment of the present application.
  • FIG. 5( b ) is a schematic diagram of a high grayscale timing sequence of a multi-grayscale pixel driving circuit according to an embodiment of the present application.
  • FIG. 6 is a schematic structural diagram of a display panel provided by an embodiment of the present application.
  • the transistors used in all the embodiments of the present application may include both P-type and/or N-type transistors, wherein the P-type transistor is turned on when the gate is at a low potential, and is turned off when the gate is at a high potential; the N-type transistor is at a gate of Turns on when the gate is high and turns off when the gate is low.
  • FIG. 1 is a schematic diagram of a first structure of a multi-gray-scale pixel driving circuit provided by an embodiment of the present application
  • FIG. 2 is a schematic diagram of a second structure of a multi-gray-scale pixel driving circuit provided by an embodiment of the present application.
  • the present application provides a multi-gray-scale pixel driving circuit.
  • the multi-gray-scale pixel driving circuit includes: a driving module 10 and a light-emitting module 20 which are arranged in series between the first electrode and the second electrode.
  • the potential of the first electrode is the first potential V1
  • the potential of the second electrode is the second potential V2; wherein, the driving module 10 and the light-emitting control module control the light-emitting condition of the light-emitting module according to the preset timing, so as to realize Multiple grayscale display below or above the grayscale threshold.
  • the driving module 10 is used to control the magnitude of the current flowing between the first electrode and the second electrode
  • the lighting control module 30 is used to control the lighting conditions of the light-emitting devices in the lighting module 20.
  • the driving module 10 and the lighting control module 30 work together According to the preset timing sequence, the light emitting module 20 realizes multi-grayscale display that is lower than the grayscale threshold or higher than the grayscale threshold.
  • the grayscale threshold can be selected from a grayscale value between 0 and 255 according to the actual situation. For example, if the grayscale threshold is selected to be 50, the grayscale values below 50 are low grayscales, and the grayscales not lower than 50 are high grayscales.
  • the series sequence of the driving module 10 , the light emitting module 20 and the light emitting control module 30 between the first electrode and the second electrode is not limited. 1 and 2 are examples of two different series relationships between the first electrode and the second electrode of the driving module 10, the light-emitting module 20 and the light-emitting control module 30: In between, the driving module 10 , the light emitting module 20 and the light emitting control module 30 are connected in series; in FIG. 2 , the light emitting control module 30 , the light emitting module 20 and the driving module 10 are connected in series between the first electrode and the second electrode.
  • the following embodiments are extended based on FIG. 1 , but the extended embodiments based on FIG. 2 are all within the scope of protection of the present application.
  • a driving module 10, a light-emitting module 20 and a light-emitting control module 30 are arranged in series between the first electrode and the second electrode, and the driving module 10 and the light-emitting control module 30 are used to control a preset timing sequence.
  • the light-emitting condition of the light-emitting module 20 enables the light-emitting module to realize multi-grayscale display of low grayscale or high grayscale, which greatly increases the number of grayscales that can be displayed.
  • FIG. 3 is a schematic diagram of a third structure of a multi-gray-scale pixel driving circuit provided by an embodiment of the present application.
  • the multi-gray-scale pixel driving circuit further includes a writing module 40 , the control terminal of the writing module 40 is connected to the scan signal SS, the input terminal of the writing module 40 is connected to the data signal DS, and the The output terminal is connected to the control terminal of the driving module 10 .
  • the multi-gray-scale pixel driving circuit further includes a storage module 50 .
  • the output terminal of the writing module 40 and the output terminal of the driving module 10 are respectively connected to the first terminal of the storage module 50 , and the second terminal of the storage module 50 is connected to the first terminal of the storage module 50 respectively. ground.
  • the light emitting module 20 includes a plurality of light emitting units arranged in parallel, and each light emitting unit includes several light emitting devices LEDs connected in series and/or in parallel.
  • FIG. 4 is a schematic diagram of a specific structure of a multi-gray-scale pixel driving circuit provided by an embodiment of the present application.
  • each light-emitting unit may actually include several LEDs in series and/or parallel, that is, several LEDs in each light-emitting unit may be combined in series or in parallel according to actual needs to achieve different display effects.
  • the light-emitting control module 30 includes a plurality of control thin-film transistors T1 (not shown in the figure), and the gate of each control thin-film transistor T1 is connected to a corresponding light-emitting signal EM received by the light-emitting control module 30, and each control The source of the thin film transistor T1 is connected to the second electrode, and the drain of each control thin film transistor T1 is connected to the input end of a corresponding one of the light-emitting units.
  • each control thin film transistor T1 controls the switch of a corresponding light-emitting unit in the light-emitting module 20 according to a light-emitting signal EM of the light-emitting control module 30 .
  • some light-emitting units can be kept on, that is, the light-emitting signal EM received by the control thin-film transistor T1 connected to this part of the light-emitting unit is kept at a constant potential, so that this part of the light-emitting unit can be kept at a constant potential.
  • the control thin film transistor T1 between the light emitting unit and the second electrode is kept normally on.
  • the control thin film transistor T1 connected to this part of the light emitting unit is removed, so that this part of the light emitting unit is directly connected to the second electrode without connecting to the second electrode through the corresponding control thin film transistor T1, which simplifies the circuit structure.
  • the light emission control module 30 includes two control thin film transistors T1 (a first control thin film transistor T11 and a second control thin film transistor T12 ), wherein the first control thin film transistor T11 controls the first control thin film transistor T11 according to the first light emission signal EM1
  • the second control thin film transistor T12 controls the switch of the second light-emitting unit 22 according to the second light-emitting signal EM2.
  • the driving module 10 includes a second thin film transistor T2, the drain electrode of the second thin film transistor T2 is connected to the first electrode, and the source electrode of the second thin film transistor T2 is connected to the output end of a corresponding light emitting unit.
  • the writing module 40 includes a third thin film transistor T3, the gate of the third thin film transistor T3 is connected to the scan signal SS, the source of the third thin film transistor T3 is connected to the data signal DS, and the third thin film transistor T3 is connected to the data signal DS.
  • the drain of T3 is connected to the gate of the control thin film transistor.
  • the storage module 50 includes a storage capacitor CS, the first end of the storage capacitor CS is connected to the gate of the second thin film transistor T2 and the drain of the third thin film transistor T3, respectively, and the second end of the storage capacitor CS ground.
  • FIG. 5( a ) is a low-gray-scale timing diagram of a multi-gray-scale pixel driving circuit provided by an embodiment of the present application. 4 and 5(a), when the scan signal SS is at a high potential, the third thin film transistor T3 is turned on, the high potential data signal DS is written into the storage capacitor CS and the second thin film transistor T2 is turned on, at this time the first light-emitting When the signal EM1 is high, the first control thin film transistor T11 is turned on, and the LED1 of the first light-emitting unit 21 emits light. At the same time, the second light-emitting signal EM2 is low to turn off the second control thin-film transistor T12, and the LED2 of the second light-emitting unit 22 does not emit light. , so as to achieve low grayscale display.
  • FIG. 5(b) is a schematic diagram of the high grayscale timing sequence of the multi-grayscale pixel driving circuit provided by the embodiment of the present application.
  • the third thin film transistor T3 is turned on, The high-potential data signal DS is written into the storage capacitor CS and turns on the second thin film transistor T2.
  • the first light-emitting signal EM1 is at a high potential to turn on the first control thin-film transistor T11, the LED1 of the first light-emitting unit 21 emits light, and the When the second light-emitting signal EM2 is at a low potential, the second control thin film transistor T12 is turned on, and the LED2 of the second light-emitting unit 22 emits light, thereby realizing high grayscale display.
  • the first control thin film transistor T11 under the control of the first light-emitting signal EM1
  • the second control thin-film transistor T12 under the control of the second light-emitting signal EM2
  • low grayscale display is realized when only the LED1 emits light.
  • high grayscale display is realized, so that the grayscale number is increased compared with the prior art that can only realize the light emission of the LED1.
  • LED1 is always on at low gray level and high gray level. Therefore, the first control thin film transistor T11 can be removed, and the LED1 can be directly connected to the second electrode to simplify the circuit structure.
  • the light-emitting module 20 and the light-emitting control module 30 are modified embodiments of the above-mentioned embodiments, which are all within the scope of protection of the present application.
  • FIG. 6 is a schematic structural diagram of a display panel according to an embodiment of the present application. As shown in FIG. 6 , an embodiment of the present application further provides a display panel 1 .
  • the display panel 1 includes the multi-gray-scale pixel driving circuit 2 described in the above-mentioned embodiment, and a plurality of multi-gray-scale pixel driving circuits 2 are arranged in the display panel. arranged in an array.
  • the display panel 1 has the same structure and beneficial effects as the multi-gray-scale pixel circuit 2 . Since the structure and beneficial effects of the multi-gray-scale pixel driving circuit 2 have been described in detail in the above-mentioned embodiments, they will not be repeated here.
  • each multi-gray-scale pixel driving circuit is used as a sub-pixel circuit, and every three multi-gray-scale pixel driving circuits constitute a pixel unit, and the LEDs in the three multi-gray-scale pixel circuits can emit red, The light of three colors of green and blue is used to realize multi-gray-scale display of each of the three colors of red, green and blue, so as to realize multi-gray-scale display of each pixel unit.

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  • Physics & Mathematics (AREA)
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Abstract

一种多灰阶像素驱动电路（2）及显示面板（1），多灰阶像素驱动电路（2）在第一电极和第二电极之间串联设置驱动模块（10）、发光模块（20）和发光控制模块（30），利用驱动模块（10）和发光控制模块（30）依照预设时序控制发光模块（20）的发光情况，使得发光模块（20）能够实现低灰阶或高灰阶的多灰阶显示，大大提高了显示面板（1）可以进行显示的灰阶数。

Description

多灰阶像素驱动电路及显示面板 技术领域
本申请涉及显示技术领域，尤其涉及一种多灰阶像素驱动电路及显示面板。
 背景技术
目前，显示面板的每个像素单元仅包括有限数量的发光器件，例如每个像素单元包括红色、绿色、蓝色三个子像素电路，而每种颜色的子像素电路仅利用一个LED作为发光器件进行显示。并且，这有限数量的发光器件一般不能通过控制模块进行调节，因此现有的像素单元能实现的灰阶数较少，仅仅适用于低灰阶的显示，无法满足高灰阶的显示。
 技术问题
现有的像素单元能实现的灰阶数较少，仅仅适用于低灰阶的显示，无法满足高灰阶的显示。
 技术解决方案
为了解决上述问题，本申请提供一种多灰阶像素驱动电路，该多灰阶像素驱动电路包括：串联设置于第一电极和第二电极之间的驱动模块、发光模块和发光控制模块，所述第一电极的电位为第一电位，所述第二电极的电位为第二电位；其中，所述驱动模块和所述发光控制模块依照预设时序控制所述发光模块的发光情况，以实现低于灰阶阈值或高于所述灰阶阈值的多灰阶显示。
在一些实施例中，所述发光模块包括多个并联设置的发光单元，每个所述发光单元包括若干个串联和/或并联的发光器件。
在一些实施例中，所述多灰阶像素驱动电路还包括写入模块，所述写入模块的控制端接入扫描信号，所述写入模块的输入端接入数据信号，所述写入模块的输出端与所述驱动模块的控制端连接。
在一些实施例中，所述多灰阶像素驱动电路还包括存储模块，所述写入模块的输出端和所述驱动模块的输出端分别与所述存储模块的第一端连接，所述存储模块的第二端接地。
在一些实施例中，所述发光控制模块包括多个控制薄膜晶体管，每个所述控制薄膜晶体管的栅极接入所述发光控制模块接收到的对应的一个发光信号，每个所述控制薄膜晶体管的源极与所述第二电极连接，每个所述控制薄膜晶体管的漏极与对应的一个所述发光单元的输入端连接。
在一些实施例中，所述驱动模块包括第二薄膜晶体管，所述第二薄膜晶体管的漏极与所述第一电极连接，所述第二薄膜晶体管的源极与对应的一个所述发光单元的输出端连接。
在一些实施例中，所述写入模块包括第三薄膜晶体管，所述第三薄膜晶体管的栅极接入扫描信号，所述第三薄膜晶体管的源极接入数据信号，第三薄膜晶体管的漏极与所述第二薄膜晶体管的栅极连接。
在一些实施例中，所述存储模块包括存储电容，所述存储电容的第一端分别与所述第二薄膜晶体管的栅极和所述第三薄膜晶体管的漏极连接，所述存储电容的第二端接地。
另外，本申请还提供一种显示面板，该显示面板包括如上所述的多灰阶像素驱动电路，所述多灰阶像素电路包括串联设置于第一电极和第二电极之间的驱动模块、发光模块和发光控制模块，所述第一电极的电位为第一电位，所述第二电极的电位为第二电位；其中，所述驱动模块和所述发光控制模块依照预设时序控制所述发光模块的发光情况，以实现低于灰阶阈值或高于所述灰阶阈值的多灰阶显示。
在一些实施例中，所述发光模块包括多个并联设置的发光单元，每个所述发光单元包括若干个串联和/或并联的发光器件。
在一些实施例中，所述多灰阶像素驱动电路还包括写入模块，所述写入模块的控制端接入扫描信号，所述写入模块的输入端接入数据信号，所述写入模块的输出端与所述驱动模块的控制端连接。
在一些实施例中，所述多灰阶像素驱动电路还包括存储模块，所述写入模块的输出端和所述驱动模块的输出端分别与所述存储模块的第一端连接，所述存储模块的第二端接地。
在一些实施例中，所述发光控制模块包括多个控制薄膜晶体管，每个所述控制薄膜晶体管的栅极接入所述发光控制模块接收到的对应的一个发光信号，每个所述控制薄膜晶体管的源极与所述第二电极连接，每个所述控制薄膜晶体管的漏极与对应的一个所述发光单元的输入端连接。
在一些实施例中，所述驱动模块包括第二薄膜晶体管，所述第二薄膜晶体管的漏极与所述第一电极连接，所述第二薄膜晶体管的源极与对应的一个所述发光单元的输出端连接。
在一些实施例中，所述写入模块包括第三薄膜晶体管，所述第三薄膜晶体管的栅极接入扫描信号，所述第三薄膜晶体管的源极接入数据信号，第三薄膜晶体管的漏极与所述第二薄膜晶体管的栅极连接。
在一些实施例中，所述存储模块包括存储电容，所述存储电容的第一端分别与所述第二薄膜晶体管的栅极和所述第三薄膜晶体管的漏极连接，所述存储电容的第二端接地。
 有益效果
本申请提供的多灰阶像素驱动电路及显示面板中，该多灰阶像素驱动电路在第一电极和第二电极之间串联设置驱动模块、发光模块和发光控制模块，所述第一电极的电位为第一电位，所述第二电极的电位为第二电位，利用驱动模块和发光控制模块依照预设时序控制发光模块的发光情况，使得发光模块能够实现低灰阶或高灰阶的多灰阶显示，与现有技术仅能实现低灰阶的显示相比，大大提高了可以进行显示的灰阶数。将该多灰阶像素驱动电路用于显示面板中，能实现更多灰阶数的显示。
 附图说明
图1为本申请实施例提供的多灰阶像素驱动电路的第一种结构示意图。
图2为本申请实施例提供的多灰阶像素驱动电路的第二种结构示意图。
图3为本申请实施例提供的多灰阶像素驱动电路的第三种结构示意图。
图4为本申请实施例提供的多灰阶像素驱动电路的具体结构示意图。
图5（a）为本申请实施例提供的多灰阶像素驱动电路的低灰阶时序示意图。
图5（b）为本申请实施例提供的多灰阶像素驱动电路的高灰阶时序示意图。
图6本申请实施例提供的显示面板的结构示意图。
 本发明的实施方式
为使本申请的目的、技术方案及效果更加清楚、明确，以下参照附图并举实施例对本申请进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不用于限定本申请。
本申请所有实施例为区分晶体管处栅极之外的两极，将其中一极称为源极，另一极称为漏极。由于晶体管的源极和漏极是对称的，因此其源极和漏极是可以互换的。按附图中的形态规定晶体管的中间端为栅极、信号输入端为源极、信号输出端为漏极。此外，本申请所有实施例采用的晶体管可以包括P型和/或N型晶体管两种，其中，P型晶体管在栅极为低电位时打开，在栅极为高电位时关闭；N型晶体管在栅极为高电位时打开，在栅极为低电位时关闭。
图1为本申请实施例提供的多灰阶像素驱动电路的第一种结构示意图，图2为本申请实施例提供的多灰阶像素驱动电路的第二种结构示意图。如图1或图2所示，本申请提供一种多灰阶像素驱动电路，该多灰阶像素驱动电路包括：串联设置于第一电极和第二电极之间的驱动模块10、发光模块20和发光控制模块30，第一电极的电位为第一电位V1，第二电极的电位为第二电位V2；其中，驱动模块10和发光控制模块依照预设时序控制发光模块的发光情况，以实现低于灰阶阈值或高于灰阶阈值的多灰阶显示。
具体地，驱动模块10用于控制流经第一电极和第二电极之间的电流大小，发光控制模块30用于控制发光模块20中发光器件的发光情况，驱动模块10和发光控制模块30共同依照预设时序互相配合，使得发光模块20实现低于灰阶阈值或高于灰阶阈值的多灰阶显示。
需要说明的是，灰阶阈值可以根据实际情况选取0~255之间的灰阶值。例如选择灰阶阈值为50，则低于50的灰阶值为低灰阶，不低于50的灰阶值为高灰阶。
可以理解的是，驱动模块10、发光模块20和发光控制模块30在第一电极和第二电极之间的串联顺序并不限制。图1和图2为驱动模块10、发光模块20和发光控制模块30在第一电极和第二电极之间两种不同的串联关系的举例：在图1中，在第一电极与第二电极之间，驱动模块10、发光模块20和发光控制模块30依次串联；在图2中，在第一电极与第二电极之间，发光控制模块30、发光模块20和驱动模块10依次串联。以下实施例均以图1为基础进行扩展，但是以图2为基础进行扩展的实施例，均为本申请所保护的范围。
本申请提供的多灰阶像素驱动电路，在第一电极与第二电极之间串联设置驱动模块10、发光模块20和发光控制模块30，利用驱动模块10和发光控制模块30依照预设时序控制发光模块20的发光情况，使得发光模块实现低灰阶或高灰阶的多灰阶显示，大大提高了可以进行显示的灰阶数。
图3为本申请实施例提供的多灰阶像素驱动电路的第三种结构示意图。如图3所示，多灰阶像素驱动电路还包括写入模块40，写入模块40的控制端接入扫描信号SS，写入模块40的输入端接入数据信号DS，写入模块40的输出端与驱动模块10的控制端连接。
如图3所示，多灰阶像素驱动电路还包括存储模块50，写入模块40的输出端和驱动模块10的输出端分别与存储模块50的第一端连接，存储模块50的第二端接地。
进一步地，发光模块20包括多个并联设置的发光单元，每个发光单元包括若干个串联和/或并联的发光器件LED。
图4为本申请实施例提供的多灰阶像素驱动电路的具体结构示意图，图4为发光模块20包括2个并联设置的第一发光单元21和第二发光单元22，且第一发光单元21仅包括一个发光器件LED1，第二发光单元22仅包括一个发光器件LED2的示例。
需要说明的是，每个发光单元实际上可以包括若干个串联和/或并联的LED，即每个发光单元中的若干个LED可根据实际需要任意串联或并联组合，以实现不同的显示效果。
进一步地，发光控制模块30包括多个控制薄膜晶体管T1（图中未示出），每个控制薄膜晶体管T1的栅极接入发光控制模块30接收到的对应的一个发光信号EM，每个控制薄膜晶体管T1的源极与第二电极连接，每个控制薄膜晶体管T1的漏极与对应的一个发光单元的输入端连接。由此，每个控制薄膜晶体管T1根据发光控制模块30的一个发光信号EM来控制发光模块20中对应的一个发光单元的开关。
可以理解的是，在高灰阶显示或者低灰阶显示中，可以使部分发光单元保持常亮，即这部分发光单元连接的控制薄膜晶体管T1收到的发光信号EM保持恒定电位，使得这部分发光单元与第二电极之间的控制薄膜晶体管T1保持常开。或者，去掉这部分发光单元连接的控制薄膜晶体管T1，使这部分发光单元直接与第二电极连接，而无需经过对应的控制薄膜晶体管T1与第二电极连接，简化了电路结构。
如图4所示，发光控制模块30包括2个控制薄膜晶体管T1（第一控制薄膜晶体管T11和第二控制薄膜晶体管T12），其中，第一控制薄膜晶体管T11根据第一发光信号EM1控制第一发光单元21的开关，第二控制薄膜晶体管T12根据第二发光信号EM2控制第二发光单元22的开关。
结合图3和图4，驱动模块10包括第二薄膜晶体管T2，第二薄膜晶体管T2的漏极与第一电极连接，第二薄膜晶体管T2的源极与对应的一个发光单元的输出端连接。
结合图3和图4，写入模块40包括第三薄膜晶体管T3，第三薄膜晶体管T3的栅极接入扫描信号SS，第三薄膜晶体管T3的源极接入数据信号DS，第三薄膜晶体管T3的漏极与控制薄膜晶体管的栅极连接。
结合图3和图4，存储模块50包括存储电容CS，存储电容CS的第一端分别与第二薄膜晶体管T2的栅极和第三薄膜晶体管T3的漏极连接，存储电容CS的第二端接地。
以图4为例，假设图4中的所有薄膜晶体管均为N型薄膜晶体管，则本申请提供的多灰阶像素驱动电路的一种工作流程为：
图5（a）为本申请实施例提供的多灰阶像素驱动电路的低灰阶时序示意图。结合图4和图5（a），扫描信号SS处于高电位时，第三薄膜晶体管T3打开，高电位的数据信号DS写入存储电容CS并使得第二薄膜晶体管T2打开，此时第一发光信号EM1为高电位使第一控制薄膜晶体管T11打开，第一发光单元21的LED1发光，同时第二发光信号EM2为低电位使第二控制薄膜晶体管T12关闭，第二发光单元22的LED2不发光，从而实现低灰阶的显示。
图5（b）为本申请实施例提供的多灰阶像素驱动电路的高灰阶时序示意图，结合图4和图5（b），扫描信号SS处于高电位时，第三薄膜晶体管T3打开，高电位的数据信号DS写入存储电容CS并使得第二薄膜晶体管T2打开，此时第一发光信号EM1为高电位使第一控制薄膜晶体管T11打开，第一发光单元21的LED1发光，同时第二发光信号EM2为低电位使第二控制薄膜晶体管T12打开，第二发光单元22的LED2发光，从而实现高灰阶的显示。
由此，通过第一控制薄膜晶体管T11在第一发光信号EM1的控制下，以及第二控制薄膜晶体管T12在第二发光信号EM2的控制下，在仅LED1发光时实现低灰阶的显示，在LED1和LED2同时发光时实现高灰阶的显示，从而与现有技术只能实现LED1发光相比，提高了灰阶数。其中，LED1在低灰阶和高灰阶时均保持常亮，因此，可以去掉第一控制薄膜晶体管T11，使LED1直接与第二电极连接，以简化电路结构。
需要说明的是，在图4的基础上，将发光模块20和发光控制模块30进行上述实施例的变形实施例，均为本申请所保护的范围。
图6为本申请实施例提供的显示面板的结构示意图。如图6所示，本申请实施例还提供一种显示面板1，该显示面板1包括上述实施例所述的多灰阶像素驱动电路2，多个多灰阶像素驱动电路2在显示面板中呈阵列排布。该显示面板1具有与该多灰阶像素电路2相同的结构和有益效果，由于上述实施例已经对多灰阶像素驱动电路2的结构和有益效果进行了详细的描述，此处不再赘述。
可以理解的是，每个多灰阶像素驱动电路作为一个子像素电路，每三个多灰阶像素驱动电路组成一个像素单元，且这三个多灰阶像素电路中的LED分别能够发出红、绿、蓝三种颜色的光，以实现红、绿、蓝三种颜色中每种颜色的多灰阶显示，从而实现每个像素单元的多灰阶显示。
可以理解的是，对本领域普通技术人员来说，可以根据本申请的技术方案及其发明构思加以等同替换或改变，而所有这些改变或替换都应属于本申请所附的权利要求的保护范围。

Claims (16)

  1. 一种多灰阶像素驱动电路，其包括：串联设置于第一电极和第二电极之间的驱动模块、发光模块和发光控制模块，所述第一电极的电位为第一电位，所述第二电极的电位为第二电位；
    其中，所述驱动模块和所述发光控制模块依照预设时序控制所述发光模块的发光情况，以实现低于灰阶阈值或高于所述灰阶阈值的多灰阶显示。
  2. 如权利要求1所述的多灰阶像素驱动电路，其中，所述发光模块包括多个并联设置的发光单元，每个所述发光单元包括若干个串联和/或并联的发光器件。
  3. 如权利要求2所述的多灰阶像素驱动电路，其中，所述多灰阶像素驱动电路还包括写入模块，所述写入模块的控制端接入扫描信号，所述写入模块的输入端接入数据信号，所述写入模块的输出端与所述驱动模块的控制端连接。
  4. 如权利要求3所述的多灰阶像素驱动电路，其中，所述多灰阶像素驱动电路还包括存储模块，所述写入模块的输出端和所述驱动模块的输出端分别与所述存储模块的第一端连接，所述存储模块的第二端接地。
  5. 如权利要求2所述的多灰阶像素驱动电路，其中，所述发光控制模块包括多个控制薄膜晶体管，每个所述控制薄膜晶体管的栅极接入所述发光控制模块接收到的对应的一个发光信号，每个所述控制薄膜晶体管的源极与所述第二电极连接，每个所述控制薄膜晶体管的漏极与对应的一个所述发光单元的输入端连接。
  6. 如权利要求4所述的多灰阶像素驱动电路，其中，所述驱动模块包括第二薄膜晶体管，所述第二薄膜晶体管的漏极与所述第一电极连接，所述第二薄膜晶体管的源极与对应的一个所述发光单元的输出端连接。
  7. 如权利要求6所述的多灰阶像素驱动电路，其中，所述写入模块包括第三薄膜晶体管，所述第三薄膜晶体管的栅极接入扫描信号，所述第三薄膜晶体管的源极接入数据信号，第三薄膜晶体管的漏极与所述第二薄膜晶体管的栅极连接。
  8. 如权利要求7所述的多灰阶像素驱动电路，其中，所述存储模块包括存储电容，所述存储电容的第一端分别与所述第二薄膜晶体管的栅极和所述第三薄膜晶体管的漏极连接，所述存储电容的第二端接地。
  9. 一种显示面板，其包括多灰阶像素驱动电路，所述多灰阶像素电路包括串联设置于第一电极和第二电极之间的驱动模块、发光模块和发光控制模块，所述第一电极的电位为第一电位，所述第二电极的电位为第二电位；
    其中，所述驱动模块和所述发光控制模块依照预设时序控制所述发光模块的发光情况，以实现低于灰阶阈值或高于所述灰阶阈值的多灰阶显示。
  10. 如权利要求9所述的显示面板，其中，所述发光模块包括多个并联设置的发光单元，每个所述发光单元包括若干个串联和/或并联的发光器件。
  11. 如权利要求10所述的显示面板，其中，所述多灰阶像素驱动电路还包括写入模块，所述写入模块的控制端接入扫描信号，所述写入模块的输入端接入数据信号，所述写入模块的输出端与所述驱动模块的控制端连接。
  12. 如权利要求11所述的显示面板，其中，所述多灰阶像素驱动电路还包括存储模块，所述写入模块的输出端和所述驱动模块的输出端分别与所述存储模块的第一端连接，所述存储模块的第二端接地。
  13. 如权利要求10所述的显示面板，其中，所述发光控制模块包括多个控制薄膜晶体管，每个所述控制薄膜晶体管的栅极接入所述发光控制模块接收到的对应的一个发光信号，每个所述控制薄膜晶体管的源极与所述第二电极连接，每个所述控制薄膜晶体管的漏极与对应的一个所述发光单元的输入端连接。
  14. 如权利要求12所述的显示面板，其中，所述驱动模块包括第二薄膜晶体管，所述第二薄膜晶体管的漏极与所述第一电极连接，所述第二薄膜晶体管的源极与对应的一个所述发光单元的输出端连接。
  15. 如权利要求14所述的显示面板，其中，所述写入模块包括第三薄膜晶体管，所述第三薄膜晶体管的栅极接入扫描信号，所述第三薄膜晶体管的源极接入数据信号，第三薄膜晶体管的漏极与所述第二薄膜晶体管的栅极连接。
  16. 如权利要求15所述的显示面板，其中，所述存储模块包括存储电容，所述存储电容的第一端分别与所述第二薄膜晶体管的栅极和所述第三薄膜晶体管的漏极连接，所述存储电容的第二端接地。
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