WO2022052011A1 - Display substrate, display device, and high-precision metal mask - Google Patents

Abstract

A display substrate, a display device and a high-precision metal mask. The display substrate comprises: first sub-pixels (R), second sub-pixels (G) and third sub-pixels (B); the first sub-pixels (R) and the third sub-pixels (B) are alternately arranged in a first direction to form a first sub-pixel row, and the second sub-pixels (G) form a second sub-pixel row; the first sub-pixel row and the second sub-pixel row are alternately arranged in a second direction; two first sub-pixels (R) and two third sub-pixels (B), which are distributed in two adjacent rows and two columns, form a 2*2 matrix; in the matrix, the two first sub-pixels (R) and the two third sub-pixels (B) are located in different rows and columns; line connecting centers of the two first sub-pixels (R) and the two third sub-pixels (B) form a virtual quadrangle; the second sub-pixels (G) are located in the virtual quadrangle; and in the virtual quadrangle, there are at least two different distances among the distances from the centers of the two first sub-pixels (R) and the two third sub-pixels (B) to the center of the second sub-pixels (G) respectively, so that the virtual pixel brightness center is arranged more uniformly.

Description

Display substrate, display device and high-precision metal mask technical field

The present disclosure relates to the field of display technology, and in particular, to a display substrate, a display device and a high-precision metal mask.

Background technique

An organic light-emitting diode display (Organic light-emitting diode, OLED) display device includes a base substrate, a light-emitting layer and an encapsulation protection layer, and the light-emitting layer includes sub-pixels arranged in a matrix on the base substrate. Each sub-pixel generally uses a fine metal mask (FMM) to vapor-deposit an organic light-emitting material on the corresponding sub-pixel position of the array substrate. With the development of technology, people have higher and higher requirements for the resolution of display devices.

Currently limited by the fabrication level of FMM and the precision of the evaporation process, it is difficult to increase the high resolution by reducing the sub-pixel size and pixel pitch. A commonly used method is the Sub-Pixel Rendering (SPR) technology, which uses sub-pixels that share certain positions among different pixels to simulate a higher resolution with relatively few sub-pixels. The SPR increases the aperture ratio of the light-emitting layer, and improves the aperture ratio and lifetime of the display device. However, in the existing pixel arrangement structure, the brightness centers of the virtual pixels are usually unevenly arranged, so when displaying some text and specific graphics, the display will inevitably bring about a sense of graininess and distortion.

SUMMARY OF THE INVENTION

In view of this, the present disclosure provides a display substrate, a display device, and a high-precision metal mask, which are used to solve the uneven distribution of the brightness center of the virtual pixel in the existing pixel arrangement structure, which brings the graininess and distortion of the display. The problem.

In order to solve the above-mentioned technical problems, the present disclosure adopts the following technical solutions:

In a first aspect, an embodiment of the present disclosure provides a display substrate, including: a first sub-pixel, a second sub-pixel and a third sub-pixel;

In the first direction, the first subpixels and the third subpixels are alternately arranged to form a first subpixel row, and the second subpixels form a second subpixel row;

In a second direction, the first sub-pixel rows and the second sub-pixel rows are alternately arranged, and the first direction and the second direction are substantially perpendicular;

Two first sub-pixels and two third sub-pixels distributed in two adjacent rows and two columns form a 2*2 matrix, and in the 2*2 matrix, the two first sub-pixels are located in different rows and different columns, The two third sub-pixels are located in different rows and different columns, the center line connecting the two first sub-pixels and the two third sub-pixels forms a virtual quadrilateral, and the second sub-pixels are located in the virtual quadrilateral. inside the quadrilateral;

In the virtual quadrilateral, there are at least two different distances between the centers of the two first sub-pixels and the centers of the two third sub-pixels, respectively, to the centers of the second sub-pixels;

The third sub-pixel includes an axis of symmetry along a first oblique direction and a symmetry axis along a second oblique direction, and the width of the third sub-pixel in the first oblique direction is the same as that in the second oblique direction. The widths in the diagonal direction are different; and/or, the first sub-pixel includes an axis of symmetry along a first diagonal direction and a symmetry axis along a second diagonal direction, and the first sub-pixel is in the first diagonal direction. the width in the diagonal direction is different from the width in the second diagonal direction;

Wherein, the second oblique line direction is substantially perpendicular to the first oblique line direction, and the second oblique line direction and the first oblique line direction intersect both the first direction and the second direction.

Optionally, within at least one of the virtual quadrilaterals, the distance between the center of the second sub-pixel and the centers of the two third sub-pixels is unequal, and the center of the second sub-pixel and the two The centers of the first sub-pixels are equally spaced;

or

Within at least one of the virtual quadrilaterals, the distance between the center of the second sub-pixel and the centers of the two third sub-pixels is equal, and the center of the second sub-pixel is equal to the distance between the centers of the two first sub-pixels Centers are equally spaced;

or

Within at least one of the virtual quadrilaterals, the distance between the center of the second sub-pixel and the centers of the two third sub-pixels is equal, and the center of the second sub-pixel is equal to the distance between the centers of the two first sub-pixels The center spacing is unequal.

Optionally, within at least one of the virtual quadrilaterals, the distance between the second subpixel and the first third subpixel is L1, and the second subpixel and the second third subpixel are The distance between the centers of , is L2, and the distance between the second sub-pixel and the two first sub-pixels is L1;

or

In at least one of the virtual quadrilaterals, the distance between the second sub-pixel and the two third sub-pixels and the distance between the two first sub-pixels are both L1;

or

In at least one of the virtual quadrilaterals, the distance between the second sub-pixel and the two third sub-pixels and the distance between the two first sub-pixels are both L2;

or

In at least one of the virtual quadrilaterals, the distance between the second sub-pixel and the two third sub-pixels is L1, and the distance between the second sub-pixel and the first first sub-pixel is L1 , and the distance from the second first sub-pixel is L 2 ;

or

In at least one of the virtual quadrilaterals, the distance between the second sub-pixel and the two third sub-pixels is L2, and the distance between the second sub-pixel and the two first sub-pixels is L1 ;

Among them, L2 is greater than L1.

Optionally, the difference between L2 and L1 is greater than or equal to 1 μm, and the range of L1 is 12-30 μm.

Optionally, the virtual quadrilateral is a right-angled trapezoid, two interior angles are 90°, and one of the other two interior angles is an obtuse angle and the other is an acute angle.

Optionally, the range of the obtuse angle is greater than 90° and less than or equal to 100°, and the range of the acute angle is greater than or equal to 80° and greater than 90°.

Optionally, some of the virtual quadrilaterals are first parallelograms, and some of the virtual quadrilaterals are second parallelograms, and in the row direction and the column direction, the first parallelograms and the second parallelograms are alternately arranged. , the interior angles of the first parallelogram and the second parallelogram are different.

Optionally, the range of the acute angle of the parallelogram is greater than or equal to 80° and greater than 90°.

Optionally, the difference between the widths of the third sub-pixel and/or the first sub-pixel in the first oblique line direction and the second oblique line direction is greater than or equal to 1 μm.

Optionally, the widths of the second sub-pixels in the first oblique line direction and the second oblique line direction are different.

Optionally, within the virtual quadrilateral, the second sub-pixel is connected to the center line of the two third sub-pixels that are adjacently arranged in the first diagonal direction or the second diagonal direction. Symmetrical, and symmetrical with respect to the connecting line between the centers of the two first sub-pixels that are adjacently arranged in the second oblique direction or the first oblique direction.

Optionally, the respective total opening areas of the third sub-pixel, the second sub-pixel and the first sub-pixel are sequentially reduced, the total opening area of the first sub-pixel is x, and the second sub-pixel has an area of x. The total opening area is a*x, and the total opening area of the third sub-pixel is b*x, where 0.5≤a≤0.8, 1≤b≤2.2.

Optionally, the shape of the first sub-pixel, the second sub-pixel and the third sub-pixel is a polygon; or, the first sub-pixel, the second sub-pixel and the third sub-pixel The shape of the pixel is any of a polygon with rounded corners, a circle, and an ellipse.

Optionally, the shapes of the first sub-pixel, the second sub-pixel and the third sub-pixel are selected from quadrilateral, hexagonal, octagonal, quadrilateral with rounded corners, and rounded corners. Any of hexagon or octagon with rounded corners, circle, and ellipse.

Optionally, the first subpixel is a red subpixel, the second subpixel is a green subpixel, and the third subpixel is a blue subpixel.

In a second aspect, an embodiment of the present disclosure provides a display device including the display substrate of the first aspect.

In a third aspect, embodiments of the present disclosure provide a high-precision metal mask for fabricating the display substrate of the first aspect, the first sub-pixel includes a multi-layer film, and the second sub-pixel includes a multi-layer film layer, the third sub-pixel includes a multi-layer film layer, and the mask plate includes: a plurality of opening areas, the plurality of opening areas include shapes and distributions corresponding to at least one film layer in the first sub-pixel , or the second opening area corresponding to the shape and distribution of at least one film layer in the second sub-pixel, or corresponding to the shape and distribution of at least one film layer in the third sub-pixel the third opening area.

The beneficial effects of the above technical solutions of the present disclosure are as follows:

In the embodiments of the present disclosure, on the one hand, by sharing sub-pixels, a higher resolution can be achieved; There are at least two differences in the distances between the centers of the two first sub-pixels and the centers of the two third sub-pixels in the quadrilateral to the centers of the second sub-pixels, so that the brightness centers of the virtual pixels are arranged more uniformly. Improves the display effect by avoiding the graininess and distortion of the display. On the other hand, the brightness center of the virtual pixel can be displaced without moving the position of the sub-pixel, and the implementation cost is low.

Description of drawings

1 is a schematic diagram of a pixel arrangement structure in the related art;

FIG. 2 is a schematic diagram of a display substrate according to an embodiment of the disclosure;

3 and 5 are schematic diagrams of the display substrate according to the first embodiment of the disclosure;

4 and 6 are schematic diagrams of the display substrate according to the second embodiment of the disclosure;

7-13 are schematic diagrams showing the positional relationship between the display substrate and the opening area of the light-emitting layer according to the embodiment of the disclosure;

14-15 are schematic diagrams of the display substrate according to the third embodiment of the disclosure;

16-18 are schematic diagrams of high-precision metal masks used to manufacture the first sub-pixel, the second sub-pixel and the third sub-pixel in the display substrate of the above-mentioned embodiment, respectively;

FIG. 19 is a schematic diagram of a cross-sectional structure of a display substrate according to an embodiment of the disclosure.

detailed description

In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. Obviously, the described embodiments are some, but not all, embodiments of the present disclosure. Based on the described embodiments of the present disclosure, all other embodiments obtained by those of ordinary skill in the art fall within the protection scope of the present disclosure.

Please refer to FIG. 1. FIG. 1 is a schematic diagram of a pixel arrangement structure in the related art. In FIG. 1, both the blue sub-pixel (B) and the red sub-pixel (R) are square. The distance l1 between the brightness centers (black dots in the figure) of the virtual pixels in the j+1th column is larger than the distance l2 between the virtual pixels in the jth column and the brightness centers of the virtual pixels in the j-1th column, resulting in the display of vertical lines or When images are dominated by vertical lines, the human eye will have perceptible distortion and graininess.

In order to solve the above problem, please refer to FIG. 2 , an embodiment of the present disclosure provides a display substrate, including: a first sub-pixel R, a second sub-pixel G and a third sub-pixel B;

In the first direction, the first sub-pixels R and the third sub-pixels B are alternately arranged to form a first sub-pixel row, and the second sub-pixels G form a second sub-pixel row;

In a second direction, the first sub-pixel rows and the second sub-pixel rows are alternately arranged, and the first direction and the second direction are perpendicular or substantially perpendicular;

The two first subpixels R and the two third subpixels B distributed in two adjacent rows and two columns form a 2*2 matrix, and in the 2*2 matrix, the two first subpixels R are located in different rows In different columns, the two third sub-pixels B are located in different rows and different columns, and the center line connecting the two first sub-pixels R and the two third sub-pixels B forms a virtual quadrilateral, the second sub-pixel G is located within the virtual quadrilateral;

In the virtual quadrilateral, at least two different distances from the centers of the two first sub-pixels R and the centers of the two third sub-pixels B to the centers of the second sub-pixels G respectively. ;

The third sub-pixel B includes an axis of symmetry along the first oblique direction and a symmetry axis along the second oblique direction, and the width of the third sub-pixel B in the first oblique direction is the same as the width in the second oblique direction. The widths in the directions are different (one of which is W1 and one is H1), wherein the second oblique line direction is perpendicular or substantially perpendicular to the first oblique line direction, and the second oblique line direction is perpendicular to the first oblique line direction. A diagonal direction intersecting both the first direction and the second direction.

It can be seen from FIG. 2 that the adjacent first sub-pixel R and third sub-pixel B located in the same row, and a second sub-pixel G in the next row, form a virtual pixel (the triangle in the figure), Moreover, adjacent virtual pixels in the same row share a first sub-pixel R or a third sub-pixel B.

In addition, it can also be seen from FIG. 2 that in the embodiment of the present disclosure, the difference in the spacing between the luminance centers of adjacent virtual pixels in the same row is smaller than the luminance centers of adjacent virtual pixels in the same row in the related art The difference in the spacing between them, that is, the brightness centers of the virtual pixels are arranged more uniformly in the embodiment of the present disclosure.

In the embodiments of the present disclosure, on the one hand, by sharing sub-pixels, a higher resolution can be achieved; There are at least two differences in the distance between the center of the sub-pixel and the center of the two third sub-pixels to the center of the second sub-pixel, so as to achieve a more uniform distribution of the brightness center of the virtual pixels and avoid the graininess and appearance of the display. Distortion, improve display effect. On the other hand, the brightness center of the virtual pixel can be displaced without moving the position of the sub-pixel, and the implementation cost is low.

As mentioned in the above embodiment, in the virtual quadrilateral, the center of the two first sub-pixels R and the center of the two third sub-pixels B are respectively the distances from the center of the second sub-pixel G Among them, there are at least two differences, which will be explained with examples below.

In some embodiments of the present disclosure, optionally, please refer to FIG. 3 . In Embodiment 1 of the present disclosure, within at least one of the virtual quadrilaterals (see the two virtual quadrilaterals on the left side of FIG. 3 ), the second subsection The distance D1 between the center of the pixel G and the center of the first third sub-pixel B is not equal to the distance D2 between the center of the second sub-pixel G and the center of the second third sub-pixel B, The distance between the center of the second sub-pixel G and the center of the first first sub-pixel R, and the distance between the center of the second sub-pixel G and the center of the second first sub-pixel R Equal, both are D3. Optionally, D2 is greater than D1. Optionally, D1 is greater than D3.

In some embodiments of the present disclosure, optionally, please refer to FIG. 3 and FIG. 4 , within at least one of the virtual quadrilaterals (see the two virtual quadrilaterals on the right side of FIG. 3 and the virtual quadrilateral in FIG. 4 ) the first The distance between the center of the second sub-pixel and the center of the two third sub-pixels is equal to D1 or D2, and the distance between the center of the second sub-pixel and the center of the two first sub-pixels is equal, both of which are D1 or D2. for D3. Optionally, D2 is greater than D1. Optionally, D1 is greater than D3.

In the first embodiment shown in FIG. 3 , the widths of the third sub-pixels B in the same row in the direction of the first oblique line are the same (that is, the direction of the long side is the same), and the third sub-pixels B in the same column are in the first diagonal direction. The widths in the diagonal direction are the same (that is, the directions of the long sides are the same), and the widths of the third sub-pixels B located in adjacent rows and columns in the first diagonal direction are different (that is, the long sides are perpendicular to each other or approximately perpendicular to each other). , the long-side direction is indicated by the dashed arrow in Figure 3).

In the second embodiment shown in FIG. 4 , all the third subpixels B have the same width in the direction of the first oblique line (ie, the direction of the long side is the same, and the direction of the long side is indicated by the dotted arrow in FIG. 4 ).

In the embodiments shown in FIG. 3 and FIG. 4 above, the first subpixel R and the third subpixel B located in the same row are not on the same straight line, and the first subpixel R and the third subpixel B located in the same column are not on the same line. on the same straight line.

In the above embodiments shown in FIGS. 3 and 4 , a virtual octagon formed by four adjacent virtual quadrilaterals forms a repeating unit. The centers of the four first subpixels R and the four third subpixels B are located at the vertices of the virtual octagon, and the first subpixels R and the third subpixels B are alternately arranged clockwise. One of the third subpixels B is located in the center of the virtual octagon.

In this embodiment of the present disclosure, optionally, within the virtual quadrilateral, the second sub-pixel G is opposite to the third sub-pixel B that is adjacently arranged in the first oblique line direction or the second oblique line direction The center connection line of is symmetrical, that is, the second sub-pixel G is on the symmetry axis of the two third sub-pixels B. Optionally, as shown in FIG. 5 , the width of one third sub-pixel B in the direction of the symmetry axis is smaller than the width of the other third sub-pixel B in the direction of the symmetry axis, and the width of the other third sub-pixel B in the direction of the symmetry axis is greater than The width in the direction along another axis of symmetry (that is, the long sides of the two third sub-pixels B within the virtual quadrilateral are vertical or approximately vertical), or, as shown in FIG. 6 , the two third sub-pixels B are on this axis of symmetry The widths in the directions are all smaller than the widths in the direction on the other axis of symmetry (that is, the long sides of the two third sub-pixels B in the virtual quadrilateral are parallel).

In different situations in the above embodiments, the spacing between the sub-pixels in the virtual quadrilateral also changes. At least part of the virtual quadrilateral exists, and the spacing between the two third sub-pixels B and the second sub-pixel G is different. Examples are given below.

The so-called spacing between sub-pixels refers to the vertical distance between two adjacent parallel sides of the sub-pixels.

In some embodiments of the present disclosure, optionally, please refer to FIG. 5 , within at least one of the virtual quadrilaterals (two virtual quadrilaterals on the left in FIG. 5 ), the second sub-pixel G and the first The distance between the third sub-pixel B is L1, the distance between the second sub-pixel G and the center of the second third sub-pixel B is L2, the second sub-pixel G and the two The pitches of a sub-pixel R are all L1, wherein L2 is greater than L1.

In some embodiments of the present disclosure, optionally, please refer to FIG. 5 and FIG. 6 , in at least one of the virtual quadrilaterals, the distance between the second sub-pixel G and the two third sub-pixels B, the distance between the two The pitches of the first sub-pixels R are both L1 (the two virtual quadrilaterals on the right side in FIG. 5 , and the other three virtual quadrilaterals except the upper left corner in FIG. 6 ) or L2 (not shown in the figure) , where L2 is greater than L1.

In some embodiments of the present disclosure, optionally, please refer to FIG. 6 (the virtual quadrilateral in the upper left corner of FIG. 6 ), within at least one of the virtual quadrilaterals, the second sub-pixel G and two of the third sub-pixels The distance between the pixels B is L2, and the distance between the second sub-pixel G and the two first sub-pixels R is L1, where L2 is greater than L1.

In the above embodiment, optionally, the difference between L2 and L1 is greater than or equal to 1 μm, and further optionally, the difference between L2 and L1 is greater than or equal to 2 μm or 3 μm.

In the above embodiment, optionally, the range of L1 is 12-30 μm, further optionally, the range of L1 is 14-28 μm, and further optionally, the range of L1 is 16-26 μm.

In the embodiment of the present disclosure, optionally, please refer to FIG. 3 and FIG. 5 , the virtual quadrilateral is a right-angled trapezoid, two interior angles are 90°, one of the other two interior angles is an obtuse angle, which is X°, and the other is an acute angle, which is Y°. Wherein, the range of the obtuse angle is greater than 90° and less than or equal to 100°, further optional, it is 91°-96°, the range of the acute angle is greater than or equal to 80° and greater than 90°, and further optionally, it is 84°-89° °.

As can be seen from Figure 3 and Figure 5, a virtual quadrilateral is rotated 90°+X° around the center of the third sub-pixel located at the center of the virtual octagon, or, rotated 90°+Y°, can be combined with the focused virtual quadrilateral. The quadrilaterals overlap.

In this embodiment of the present disclosure, optionally, some of the virtual quadrilaterals are first parallelograms, and some of the virtual quadrilaterals are second parallelograms. In row and column directions, the first parallelogram and the second parallelogram are Two parallelograms are alternately arranged, and the interior angles of the first parallelogram and the second parallelogram are different. The interior angles of the first parallelogram and the second parallelogram are different, and all four interior angles may be different, or interior angles having the same angle but with different orientations. Different orientation means that at least one of the two sides forming the first interior angle and the two sides forming the second interior angle is not parallel.

Optionally, the second parallelogram may be a rectangle. Rectangles include rectangles and squares.

In this embodiment of the present disclosure, optionally, please refer to FIG. 4 and FIG. 6 , wherein some of the virtual quadrilaterals are parallelograms, and some of the virtual quadrilaterals are squares. In the row and column directions, the parallelograms and The squares are arranged alternately.

In the embodiment of the present disclosure, optionally, the range of the acute angle Z of the parallelogram is greater than or equal to 80° and greater than 90°, and further optionally, it is 84°-89°.

As can be seen from Figure 4 and Figure 6, in a virtual octagon, the two opposite virtual quadrilaterals are parallelograms, and the other two in-focus virtual quadrilaterals are squares, the two squares are the same, and the two parallelograms are different .

In the above embodiment, optionally, the difference between the widths of the third sub-pixels in the first oblique line direction and the second oblique line direction is greater than or equal to 1 μm, and further optionally, greater than or equal to 3 μm .

In the above embodiment, optionally, the first sub-pixel R is a square.

In the embodiment of the present disclosure, optionally, the third sub-pixel B is removed by a certain width in the first oblique line direction or the second oblique line direction (the blank area on the side of the third sub-pixel B in the figure is the removal area) , change the shape of the third sub-pixel B to achieve the center of the two first sub-pixels R and the center of the two third sub-pixels B in the virtual quadrilateral to the second sub-pixel G, respectively At least two of the center-to-center spacings are different.

Please refer to FIG. 7 and FIG. 8. In the figures, the frame body around the first sub-pixel R, the second sub-pixel G and the third sub-pixel B is the opening area of the light-emitting layer, and the third sub-pixel B is in the direction of the first oblique line or After a certain width is removed in the second diagonal direction, the distance between the removed side and the boundary of the opening area of the peripheral light-emitting layer is m1, which is greater than the distance m2 between the other side and the boundary of the opening area of the peripheral light-emitting layer.

The above-mentioned embodiment is only an example. In a virtual octagon, the side of each third sub-pixel B with its width removed is not limited to this, and can be combined arbitrarily, please refer to FIG. 9-FIG. 13 . Referring to FIGS. 7-13 , a third sub-pixel B can have a certain width removed at any one of the two sides perpendicular to the first diagonal direction and the two sides parallel to the first diagonal direction.

Referring to FIG. 14 , a third embodiment of the present disclosure provides a display substrate, including: a first sub-pixel R, a second sub-pixel G and a third sub-pixel B;

In the first direction, the first sub-pixels R and the third sub-pixels B are alternately arranged to form a first sub-pixel row, and the second sub-pixels G form a second sub-pixel row;

In a second direction, the first sub-pixel rows and the second sub-pixel rows are alternately arranged, and the first direction and the second direction are perpendicular or substantially perpendicular;

The two first subpixels R and the two third subpixels B distributed in two adjacent rows and two columns form a 2*2 matrix, and in the 2*2 matrix, the two first subpixels R are located in different rows In different columns, the two third sub-pixels B are located in different rows and different columns, and the center line connecting the two first sub-pixels R and the two third sub-pixels B forms a virtual quadrilateral, the second sub-pixel G is located within the virtual quadrilateral;

In the virtual quadrilateral, at least two different distances from the centers of the two first sub-pixels R and the centers of the two third sub-pixels B to the centers of the second sub-pixels G respectively. ;

The first sub-pixel R includes an axis of symmetry along the first oblique direction and a symmetry axis along the second oblique direction, and the width in the first oblique direction is different from the width in the second oblique direction (wherein One is W2 and the other is H2), wherein the second oblique direction is perpendicular or substantially perpendicular to the first oblique direction, and the second oblique direction is the same as the first oblique direction and the first oblique direction. Both the one direction and the second direction intersect.

It can be seen from FIG. 14 that the adjacent first sub-pixel R and third sub-pixel B located in the same row, and a second sub-pixel G in the next row, form a virtual pixel (the triangle in the figure), Moreover, adjacent virtual pixels in the same row share a first sub-pixel R or a third sub-pixel B.

In the embodiment of the present disclosure, on the one hand, by sharing sub-pixels, a higher resolution can be achieved; There are at least two differences in the distance between the center of the sub-pixel and the center of the two third sub-pixels to the center of the second sub-pixel, so as to achieve a more uniform distribution of the brightness center of the virtual pixels and avoid the graininess and appearance of the display. Distortion, improve display effect. On the other hand, the brightness center of the virtual pixel can be displaced without moving the position of the sub-pixel, and the implementation cost is low.

As mentioned in the above embodiment, in the virtual quadrilateral, the center of the two first sub-pixels R and the center of the two third sub-pixels B are respectively the distances from the center of the second sub-pixel G Among them, there are at least two differences, which are explained by the following examples.

In some embodiments of the present disclosure, optionally, please refer to FIG. 7 (two virtual quadrilaterals on the right side of FIG. 7 ), in at least one of the virtual quadrilaterals, the center of the second subpixel G is the same as the first The distance between the centers of the third sub-pixel B is equal to the distance between the center of the second sub-pixel G and the center of the second third sub-pixel B, and both are D1, and the second sub-pixel G The distance D3 between the center of the first sub-pixel R and the center of the first sub-pixel R is different from the distance D4 between the center of the second sub-pixel G and the center of the second first sub-pixel R.

In some embodiments of the present disclosure, optionally, please refer to FIG. 14 , within at least one of the virtual quadrilaterals (two virtual quadrilaterals on the left side of FIG. 14 ), the center of the second sub-pixel G is the same as the first sub-pixel G. The distance between the centers of the third sub-pixel B is equal to the distance between the center of the second sub-pixel G and the center of the second third sub-pixel B, and both are D1, and the second sub-pixel G The distance between the center of the first sub-pixel R and the center of the first sub-pixel R is equal to the distance between the center of the second sub-pixel G and the center of the second first sub-pixel R, and both are D3.

In the third embodiment shown in FIG. 14, the first sub-pixels R in the same row have the same width in the first diagonal direction (that is, the direction of the long side is the same), and the third sub-pixels B in the same column are in the same row. The widths in the diagonal direction are the same (that is, the directions of the long sides are the same), and the widths of the first sub-pixels R located in adjacent rows and columns in the first diagonal direction are different (that is, the long sides are perpendicular to each other or substantially perpendicular to each other). , the long-side direction is indicated by the dotted arrow in Fig. 14).

Of course, in some other embodiments of the present disclosure, optionally, all the first sub-pixels R have the same width in the direction of the first oblique line (that is, the directions of the long sides are the same).

In the embodiment shown in FIG. 14 above, the first sub-pixel R and the third sub-pixel B located in the same row are not on the same straight line, and the first sub-pixel R and the third sub-pixel B located in the same column are not on the same straight line. superior.

In the above-mentioned embodiment shown in FIG. 14 , a virtual octagon formed by four adjacent virtual quadrilaterals forms a repeating unit. The centers of the four first subpixels R and the four third subpixels B are located at the vertices of the virtual octagon, and the first subpixels R and the third subpixels B are alternately arranged clockwise. One of the third subpixels B is located in the center of the virtual octagon.

In the embodiment of the present disclosure, optionally, within the virtual quadrilateral, the second sub-pixel G is opposite to the two first sub-pixels that are adjacently arranged in the second oblique direction or the first oblique direction. The center connection line of the pixel R is symmetrical, that is, the second sub-pixel G is on the symmetry axis of the two first sub-pixels B. Optionally, as shown in FIG. 14 , the width of one of the first sub-pixels R in the direction of the symmetry axis is smaller than the width of the other first sub-pixel R in the direction of the symmetry axis, and the width of the other first sub-pixel R in the direction of the symmetry axis is greater than The width in the direction of the other symmetry axis (that is, the long sides of the two third sub-pixels B in the virtual quadrilateral are vertical or approximately vertical), or, the width of the two first sub-pixels R in the direction of the symmetry axis is smaller than that of the other one. The width in the direction of a symmetry axis (that is, the long sides of the two first sub-pixels R in the virtual quadrilateral are parallel).

In different situations in the above embodiments, the spacing between sub-pixels in the virtual quadrilateral also changes. At least part of the virtual quadrilateral exists, and the spacing between the two first sub-pixels R and the second sub-pixels G is different. Examples are given below.

In some embodiments of the present disclosure, optionally, please refer to FIG. 15 , within at least one of the virtual quadrilaterals, the distance between the second sub-pixel G and the two third sub-pixels B, the distance between the two The pitches of the first sub-pixels R are both L1 (two virtual quadrilaterals on the left side of FIG. 15 ) or L2 (not shown in the figure), where L2 is greater than L1 .

In some embodiments of the present disclosure, optionally, please refer to FIG. 15 , within at least one of the virtual quadrilaterals (two virtual quadrilaterals on the right side of FIG. 8 ), the second sub-pixel G and two of the first The distances between the three sub-pixels B are all L1, the distance between the second sub-pixel G and the first first sub-pixel R is L1, and the distance between the second and the first sub-pixel R is L2, wherein , L2 is greater than L1.

In the above embodiment, optionally, the difference between L2 and L1 is greater than or equal to 1 μm, and further optionally, the difference between L2 and L1 is greater than or equal to 2 μm or 3 μm.

In the above embodiment, optionally, the range of L1 is 12-30 μm, further optionally, the range of L1 is 14-28 μm, and further optionally, the range of L1 is 16-26 μm.

14, the virtual quadrilateral is a right-angled trapezoid, two interior angles are 90°, one of the other two interior angles is an obtuse angle, which is X°, and the other is an acute angle, which is Y°. Wherein, the range of the obtuse angle is greater than 90° and less than or equal to 100°, further optional, it is 91°-96°, the range of the acute angle is greater than or equal to 80° and greater than 90°, and further optionally, it is 84°-89° °.

It can be seen from Fig. 14 that a virtual quadrilateral is rotated by 90°+X° around the center of the third sub-pixel located at the center of the virtual octagon, or rotated by 90°+Y°, which can coincide with the in-focus virtual quadrilateral.

In the above embodiment, optionally, the difference between the widths of the first sub-pixels in the first oblique line direction and the second oblique line direction is greater than or equal to 1 μm, and further optionally, greater than or equal to 3 μm .

In the above embodiments shown in FIG. 14 and FIG. 15 , optionally, the third sub-pixel B is a square.

In the above-mentioned embodiments shown in FIGS. 3 to 6 , the widths of the third sub-pixels are different in different diagonal directions. In the embodiments shown in FIGS. 14 and 15 , the widths of the first sub-pixels in different diagonal directions are different. Differently, in some other embodiments of the present disclosure, the first sub-pixel and the third sub-pixel may have different widths in different diagonal directions at the same time.

In the foregoing embodiments of the present disclosure, optionally, the widths of the second sub-pixels G in the first oblique line direction and the second oblique line direction are different.

In the foregoing embodiments of the present disclosure, optionally, within one of the virtual quadrilaterals, the second sub-pixel G is opposite to two adjacent ones arranged in the first oblique direction or the second oblique direction. The connecting lines of the centers of the third sub-pixels B are symmetrical, and are symmetrical with respect to the connecting lines of the centers of the two first sub-pixels R that are adjacently arranged in the second oblique direction or the first oblique direction. .

The human eye has different resolution capabilities for the first sub-pixel R, the second sub-pixel G and the third sub-pixel B, and the brightness effects of the three sub-pixels are also different. The second sub-pixel G has the largest brightness effect, followed by the first sub-pixel. Pixel R, the third sub-pixel B has the smallest brightness effect; at the same time, different colors of organic light-emitting materials have different device lifetimes. Therefore, optionally, the total opening area of the sub-pixel: the third sub-pixel B > the second sub-pixel G > The first sub-pixel R. That is, the total opening area of the third sub-pixel B, the second sub-pixel G and the first sub-pixel R decreases sequentially, the total opening area of the first sub-pixel R is x, and the The total opening area is a*x, and the total opening area of the third sub-pixel B is b*x, where 0.5≤a≤0.8, 1≤b≤2.2. In the embodiment of the present disclosure, the total opening area of the sub-pixel refers to the total light-emitting area of the sub-pixel on the entire panel. In the above-mentioned embodiments of the present disclosure, the first sub-pixel, the second sub-pixel and the third sub-pixel are all shaped as quadrilaterals with rounded corners as examples for description. In some embodiments, optionally, the shapes of the first subpixel, the second subpixel, and the third subpixel may also be other polygons; or, the first subpixel, the second subpixel, and the second subpixel The shapes of the sub-pixels and the third sub-pixels may also be any of other types of polygons, circles, and ellipses with rounded corners.

In some other embodiments of the present disclosure, optionally, the shapes of the first sub-pixel, the second sub-pixel and the third sub-pixel may also be selected from quadrilateral, hexagonal, octagonal, Any of rounded hexagons or rounded octagons, circles, and ellipses.

In the above embodiments of the present disclosure, the first sub-pixel is a red sub-pixel (R), the second sub-pixel is a green sub-pixel (G), and the third sub-pixel is a blue sub-pixel (B) is described as an example, and the present disclosure does not exclude the use of sub-pixels of other colors.

In the above-mentioned embodiments of the present disclosure, the ratio of the numbers of the first sub-pixel, the second sub-pixel and the third sub-pixel is 1:2:1, thereby realizing sub-pixel sharing and improving resolution.

Embodiments of the present disclosure also provide a display device including the above-mentioned display substrate.

An embodiment of the present disclosure further provides a high-precision metal mask for fabricating the display substrate in any of the above embodiments, wherein the first sub-pixel includes a multi-layer film layer, and the second sub-pixel includes a multi-layer film layer , the third sub-pixel includes a multi-layer film layer, the mask plate includes: a plurality of opening areas, and the plurality of opening areas include a shape and distribution corresponding to at least one film layer in the first sub-pixel The first opening area, or the second opening area corresponding to the shape and distribution of the at least one film layer in the second sub-pixel, or the shape and distribution of the at least one film layer in the third sub-pixel the third opening area.

The shape refers to the type and/or size of graphics, etc., and the distribution refers to spacing, orientation, and/or density, etc.

Please refer to FIG. 16 to FIG. 18 , which are schematic diagrams of high-precision metal masks used to respectively manufacture the first sub-pixel, the second sub-pixel and the third sub-pixel of the display substrate in the above-mentioned embodiment. A first sub-pixel, a second sub-pixel or a third sub-pixel is shown in the opening area, and the first sub-pixel, the second sub-pixel or the third sub-pixel does not belong to a part of the mask.

In some embodiments, a first sub-pixel includes a first effective light-emitting area, a second sub-pixel includes a second effective light-emitting area, a third sub-pixel includes a third effective light-emitting area, and a second effective light-emitting area The area of the region < a first effective light-emitting region < a third effective light-emitting region. On one display substrate, the total area of all the third effective light-emitting regions included in the third subpixel>the total area of all the third effective light-emitting regions included in the second subpixel>all the third effective light-emitting regions included in the first subpixel total area. In some embodiments, each of the first effective light-emitting regions, each of the second effective light-emitting regions, and each of the third effective light-emitting regions are separated. In some embodiments, each of the first effective light emitting regions, each of the second effective light emitting regions, and each of the third effective light emitting regions are defined by a plurality of separated openings formed in the pixel defining layer. In some embodiments, each first effective light-emitting region is defined by a light-emitting layer in the corresponding first sub-pixel, which is located between opposite anodes and cathodes in a direction perpendicular to the substrate and is driven to emit light. In some embodiments, each second effective light-emitting region is defined by a light-emitting layer in a corresponding second sub-pixel, which is located between the opposite anode and cathode in a direction perpendicular to the substrate substrate, and is driven to emit light. In some embodiments, each third effective light-emitting region is defined by a light-emitting layer in a corresponding third sub-pixel, which is located between the opposite anode and cathode in a direction perpendicular to the substrate and is driven to emit light. In some embodiments, each of the first effective light-emitting regions, each of the second effective light-emitting regions, and each of the third effective light-emitting regions is composed of a corresponding light-emitting layer and an electrode having carrier (hole or electron) transport with the corresponding light-emitting layer (Anode or cathode) or partial definition of an electrode. In some embodiments, each first effective light emitting area, each second effective light emitting area, and each third effective light emitting area are defined by at least a portion of the cathode and at least a portion of the anode that overlap in orthographic projection on the base substrate, And at least part of the cathode and at least part of the anode do not overlap with the orthographic projection of the first insulating layer on the base substrate, and the first insulating layer is located between the cathode and the anode in a direction perpendicular to the base substrate. For example, the first insulating layer includes a pixel defining layer. In some embodiments, each of the first sub-pixels, each of the second sub-pixels and each of the third sub-pixels respectively includes a first electrode, a light-emitting layer located on a side of the first electrode away from the base substrate, and a light-emitting layer located away from the first The second electrode on one side of the electrode is further provided with a second insulating layer between the first electrode and the light-emitting layer, and/or between the second electrode and the light-emitting layer, in the direction perpendicular to the substrate substrate, and the second insulating layer Projecting overlap with the first electrode or the second electrode on the base substrate, and the second insulating layer has an opening, and the opening of the second insulating layer on the side facing the light-emitting layer can expose at least part of the first electrode or the second electrode , so that it can be in contact with the light-emitting layer or the functional layer of auxiliary light-emitting, each first effective light-emitting area, each second effective light-emitting area and each third effective light-emitting area are connected with the light-emitting layer or A portion of the functional layer that assists light emission is defined. In some embodiments, the second insulating layer includes a pixel defining layer. In some embodiments, the auxiliary light-emitting functional layer may be a hole injection layer, a hole transport layer, an electron transport layer, a hole blocking layer, an electron blocking layer, an electron injection layer, an auxiliary light-emitting layer, an interface improvement layer, Any one or more of antireflection layers, etc. In some embodiments, the first electrode may be an anode and the second electrode may be a cathode. In some embodiments, the first electrode may include at least two layers of indium tin oxide (ITO), silver (A) g, such as three layers of ITO, Ag, and ITO. In some embodiments, the second electrode may include any one or more of magnesium (Mg), Ag, ITO, and indium zinc oxide (IZO), such as a mixed layer or alloy layer of Mg and Ag.

Each sub-pixel includes a light-emitting layer, each first sub-pixel includes a first-color light-emitting layer located in the opening and on the pixel-defining layer, each second sub-pixel includes a second-color light-emitting layer located in the opening and on the pixel-defining layer, each The third sub-pixel includes a third-color light-emitting layer within the opening and on the pixel-defining layer.

Please refer to FIG. 8. In FIG. 8, the first effective light-emitting area of the first sub-pixel is the area indicated by the arrow corresponding to R, the second effective light-emitting area of the second sub-pixel is the area indicated by the arrow corresponding to G, and the third sub-pixel is the area indicated by the arrow corresponding to G. The third effective light-emitting area of the pixel is the area indicated by the arrow corresponding to B, and the frame around the effective light-emitting area is the area of the corresponding light-emitting layer.

In some exemplary embodiments, the preparation process of the display substrate of this embodiment may include the following steps (1) to (9). In this exemplary embodiment, referring to FIG. 19 , a flexible display substrate with a top emission structure is taken as an example for description.

(1), prepare the base substrate on the glass carrier plate.

In some exemplary embodiments, the base substrate 10 may be a flexible base substrate, for example, including a first flexible material layer, a first inorganic material layer, a semiconductor layer, and a second flexible material layer stacked on the glass carrier 1 and the second inorganic material layer. The materials of the first flexible material layer and the second flexible material layer are polyimide (PI), polyethylene terephthalate (PET), or a surface-treated soft polymer film. The materials of the first inorganic material layer and the second inorganic material layer are silicon nitride (SiNx) or silicon oxide (SiOx), etc., which are used to improve the water and oxygen resistance of the substrate. The layer is also referred to as a barrier layer. The material of the semiconductor layer is amorphous silicon (a-si). In some exemplary embodiments, taking the laminated structure PI1/Barrier1/a-si/PI2/Barrier2 as an example, the preparation process includes: firstly coating a layer of polyimide on the glass carrier 1, and curing to form a film Then, a first flexible (PI1) layer is formed; then a barrier film is deposited on the first flexible layer to form a first barrier (Barrier1) layer covering the first flexible layer; then an amorphous layer is deposited on the first barrier layer A silicon film to form an amorphous silicon (a-si) layer covering the first barrier layer; then a layer of polyimide is coated on the amorphous silicon layer, and a second flexible (PI2) layer is formed after curing into a film; Then, a barrier film is deposited on the second flexible layer to form a second barrier (Barrier 2 ) layer covering the second flexible layer, and the preparation of the base substrate 10 is completed.

(2), preparing the driving structure layer on the base substrate. The driving structure layer includes a plurality of driving circuits, each of which includes a plurality of transistors and at least one storage capacitor, such as a 2T1C, 3T1C or 7T1C design.

In some exemplary embodiments, the preparation process of the driving structure layer may refer to the following description. The manufacturing process of the driving circuit of the first sub-pixel 21 is taken as an example for description.

A first insulating film and an active layer film are sequentially deposited on the base substrate 10, and the active layer film is patterned through a patterning process to form a first insulating layer 11 covering the entire base substrate 10, and a first insulating layer 11 disposed on the first insulating layer The active layer pattern on 11, the active layer pattern includes at least the first active layer.

Subsequently, a second insulating film and a first metal film are sequentially deposited, and the first metal film is patterned through a patterning process to form a second insulating layer 12 covering the pattern of the active layer, and a first insulating layer 12 disposed on the second insulating layer 12 A gate metal layer pattern, the first gate metal layer pattern at least includes a first gate electrode and a first capacitor electrode.

Subsequently, a third insulating film and a second metal film are sequentially deposited, and the second metal film is patterned through a patterning process to form a third insulating layer 13 covering the first gate metal layer, and a third insulating layer 13 disposed on the third insulating layer 13 There are two gate metal layer patterns, the second gate metal layer pattern at least includes a second capacitor electrode, and the position of the second capacitor electrode corresponds to the position of the first capacitor electrode.

Subsequently, a fourth insulating film is deposited, and the fourth insulating film is patterned by a patterning process to form a fourth insulating layer 14 pattern covering the second gate metal layer, and at least two first via holes are opened on the fourth insulating layer 14, The fourth insulating layer 14, the third insulating layer 13 and the second insulating layer 12 in the two first via holes are etched away, exposing the surface of the first active layer.

Subsequently, a third metal film is deposited, the third metal film is patterned through a patterning process, and a source-drain metal layer pattern is formed on the fourth insulating layer 14, and the source-drain metal layer at least includes the first source electrode and the first source electrode located in the display area. drain electrode. The first source electrode and the first drain electrode may be connected to the first active layer through first via holes, respectively.

In the driving circuit of the first sub-pixel 21 in the display area, the first active layer, the first gate electrode, the first source electrode and the first drain electrode may form the first transistor 210, and the first capacitor electrode and the second capacitor electrode may The first storage capacitor 212 is formed. In the above-mentioned preparation process, the driving circuit of the second sub-pixel 22 and the driving circuit of the third-color sub-pixel 23 can be formed at the same time.

In some exemplary embodiments, the first insulating layer 11 , the second insulating layer 12 , the third insulating layer 13 and the fourth insulating layer 14 are silicon oxide (SiOx), silicon nitride (SiNx) and silicon oxynitride ( Any one or more of SiON), which may be a single layer, a multi-layer or a composite layer. The first insulating layer 11 is called a buffer layer, which is used to improve the water and oxygen resistance of the base substrate; the second insulating layer 12 and the third insulating layer 13 are called gate insulating (GI, Gate Insulator) layers; The fourth insulating layer 14 is called an interlayer insulating (ILD, Interlayer Dielectric) layer. The first metal film, the second metal film and the third metal film are made of metal materials, such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo). Various, or alloy materials of the above metals, such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb), can be a single-layer structure, or a multi-layer composite structure, such as Ti/Al/Ti and the like. The active layer film is made of amorphous indium gallium zinc oxide (a-IGZO), zinc oxynitride (ZnON), indium zinc tin oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p-Si), One or more materials such as hexathiophene and polythiophene, that is, the present disclosure is applicable to transistors manufactured based on oxide technology, silicon technology and organic matter technology.

(3) A flat layer is formed on the base substrate on which the pattern is formed.

In some exemplary embodiments, a planar thin film of organic material is coated on the base substrate 10 on which the aforementioned patterns are formed, to form a planarization (PLN, Planarization) layer 15 covering the entire base substrate 10, and through masking, exposure, In the developing process, a plurality of second via holes K2 are formed on the flat layer 15 in the display area. The flat layer 15 in the plurality of second via holes K2 is developed away, exposing the surface of the first drain electrode of the first transistor 210 of the driving circuit of the first sub-pixel 21 and the surface of the first drain electrode of the driving circuit of the second sub-pixel 22 respectively. The surface of the first drain electrode of a transistor and the surface of the first drain electrode of the first transistor of the driving circuit of the third color sub-pixel 23 .

(4) Form a first electrode pattern on the base substrate on which the pattern is formed. In some examples, the first electrode is a reflective anode.

In some exemplary embodiments, a conductive thin film is deposited on the base substrate 10 on which the aforementioned patterns are formed, and the conductive thin film is patterned through a patterning process to form the first electrode pattern. The first anode 213 of the first sub-pixel 21 is connected to the first drain electrode of the first transistor 210 through the second via K2, and the second anode 223 of the second sub-pixel 22 is connected to the second sub-pixel 22 through the second via K2 The first drain electrode of the first transistor of the third color sub-pixel 23 is connected to the first drain electrode of the first transistor of the third color sub-pixel 23 through the second via K2.

In some examples, the first electrode may employ a metallic material, such as any one or more of magnesium (Mg), silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo). Various, or alloy materials of the above metals, such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb), can be a single-layer structure, or a multi-layer composite structure, such as Ti/Al/Ti, etc., or, a metal and Stacked structures formed of transparent conductive materials, such as reflective materials such as ITO/Ag/ITO, Mo/AlNd/ITO, etc.

(5) On the base substrate on which the aforementioned pattern is formed, a pixel definition layer (PDL, Pixel Definition Layer) pattern is formed.

In some exemplary embodiments, a pixel definition film is coated on the base substrate 10 on which the aforementioned pattern is formed, and a pixel definition layer pattern is formed by masking, exposing, and developing processes. The pixel definition layer 30 in the display area includes a plurality of sub-pixel definition parts 302, a plurality of pixel definition layer openings 301 are formed between adjacent sub-pixel definition parts 302, and the pixel definition layer 30 in the plurality of pixel definition layer openings 301 is developed and removed , at least part of the surface of the first anode 213 of the first subpixel 21 , at least part of the surface of the second anode 223 of the second subpixel 22 and at least part of the surface of the third anode 233 of the third color subpixel 23 are exposed, respectively.

In some examples, the pixel definition layer 30 may employ polyimide, acrylic, polyethylene terephthalate, or the like.

(6), forming a spacer column (PS, Post Spacer) pattern on the base substrate on which the aforementioned pattern is formed.

In some exemplary embodiments, a thin film of organic material is coated on the base substrate 10 on which the aforementioned patterns are formed, and a pattern of spacer pillars 34 is formed by masking, exposing, and developing processes. The spacer posts 34 may act as a support layer configured to support the FMM during the evaporation process. In some examples, along the row arrangement direction of the sub-pixels, a repeating unit is spaced between two adjacent spacer columns 34. For example, the spacer columns 34 may be located in adjacent first sub-pixels 21 and third adjacent ones. between color sub-pixels 23 .

(7) On the base substrate on which the pattern is formed, an organic functional layer and a second electrode are sequentially formed. In some examples, the second electrode is a transparent cathode. The light-emitting element can emit light from the side away from the base substrate 10 through the transparent cathode to realize top emission. In some examples, the organic functional layers of the light emitting element include: a hole injection layer, a hole transport layer, a light emitting layer, and an electron transport layer.

In some exemplary embodiments, the hole injection layer 241 and the hole transport layer 242 are sequentially formed by vapor deposition on the base substrate 10 on which the aforementioned patterns are formed by using an open mask, and then the hole injection layer 241 and the hole transport layer 242 are sequentially vapor deposited by using FMM The blue light-emitting layer 236 , the green light-emitting layer 216 and the red light-emitting layer 226 are formed, and then the electron transport layer 243 , the cathode 244 and the light coupling layer 245 are formed by successive evaporation using an open mask. The hole injection layer 241 , the hole transport layer 242 , the electron transport layer 243 and the cathode 244 are all common layers of a plurality of sub-pixels. In some examples, the organic functional layer may further include: a microcavity adjustment layer between the hole transport layer and the light emitting layer. For example, after the hole transport layer is formed, FMM can be used to sequentially evaporate a blue microcavity adjusting layer, a blue light-emitting layer, a green microcavity adjusting layer, a green light-emitting layer, a red microcavity adjusting layer, and a red light-emitting layer.

In some exemplary embodiments, the organic functional layer is formed in the sub-pixel region to realize the connection between the organic functional layer and the anode. The cathode is formed on the pixel definition layer and connected to the organic functional layer.

In some exemplary embodiments, the cathode may employ any one or more of magnesium (Mg), silver (Ag), aluminum (Al), or an alloy made of any one or more of the foregoing metals , or a transparent conductive material, such as indium tin oxide (ITO), or a multi-layer composite structure of metal and transparent conductive material.

In some exemplary embodiments, a light coupling layer may be formed on the side of the cathode 244 away from the base substrate 10 , and the light coupling layer may be a common layer of a plurality of sub-pixels. The light coupling layer can cooperate with the transparent cathode to increase the light output. For example, the material of the light coupling layer can be a semiconductor material. However, this embodiment does not limit this.

(8), forming an encapsulation layer on the base substrate on which the pattern is formed.

In some exemplary embodiments, an encapsulation layer is formed on the base substrate 10 on which the aforementioned patterns are formed, and the encapsulation layer may include a stacked first encapsulation layer 41 , a second encapsulation layer 42 and a third encapsulation layer 43 . The first encapsulation layer 41 is made of inorganic material and covers the cathode 244 in the display area. The second encapsulation layer 42 adopts an organic material. The third encapsulation layer 43 is made of inorganic material and covers the first encapsulation layer 41 and the second encapsulation layer 42 . However, this embodiment does not limit this. In some examples, the encapsulation layer may adopt a five-layer structure of inorganic/organic/inorganic/organic/inorganic.

The above are some embodiments of the present disclosure. It should be pointed out that for those skilled in the art, without departing from the principles described in the present disclosure, several improvements and modifications can be made. It should be regarded as the protection scope of the present disclosure.

Claims (17)

1. A display substrate, comprising: a first sub-pixel, a second sub-pixel and a third sub-pixel;

   In the first direction, the first subpixels and the third subpixels are alternately arranged to form a first subpixel row, and the second subpixels form a second subpixel row;

   In a second direction, the first sub-pixel rows and the second sub-pixel rows are alternately arranged, and the first direction and the second direction are substantially perpendicular;

   Two first sub-pixels and two third sub-pixels distributed in two adjacent rows and two columns form a 2*2 matrix, and in the 2*2 matrix, the two first sub-pixels are located in different rows and different columns, The two third sub-pixels are located in different rows and different columns, the center line connecting the two first sub-pixels and the two third sub-pixels forms a virtual quadrilateral, and the second sub-pixels are located in the virtual quadrangle. inside the quadrilateral;

   In the virtual quadrilateral, there are at least two different distances between the centers of the two first sub-pixels and the centers of the two third sub-pixels, respectively, to the centers of the second sub-pixels;

   The third sub-pixel includes an axis of symmetry along a first oblique direction and a symmetry axis along a second oblique direction, and the width of the third sub-pixel in the first oblique direction is the same as that in the second oblique direction. The widths in the diagonal direction are different; and/or, the first sub-pixel includes an axis of symmetry along a first diagonal direction and a symmetry axis along a second diagonal direction, and the first sub-pixel is in the first diagonal direction. the width in the diagonal direction is different from the width in the second diagonal direction;

   Wherein, the second oblique line direction is substantially perpendicular to the first oblique line direction, and the second oblique line direction and the first oblique line direction intersect both the first direction and the second direction.
2. The display substrate according to claim 1, wherein,

   In at least one of the virtual quadrilaterals, the distance between the center of the second sub-pixel and the centers of the two third sub-pixels is unequal, and the center of the second sub-pixel is not equal to the two first sub-pixels are equally spaced between the centers;

   or

   Within at least one of the virtual quadrilaterals, the distance between the center of the second sub-pixel and the centers of the two third sub-pixels is equal, and the center of the second sub-pixel is equal to the distance between the centers of the two first sub-pixels Centers are equally spaced;

   or

   Within at least one of the virtual quadrilaterals, the distance between the center of the second sub-pixel and the centers of the two third sub-pixels is equal, and the center of the second sub-pixel is equal to the distance between the centers of the two first sub-pixels The center spacing is unequal.
3. The display substrate according to claim 2, wherein,

   In at least one of the virtual quadrilaterals, the distance between the second sub-pixel and the first third sub-pixel is L1, and the distance between the second sub-pixel and the center of the second third sub-pixel is L1 is L2, and the distance between the second sub-pixel and the two first sub-pixels is L1;

   or

   In at least one of the virtual quadrilaterals, the distance between the second sub-pixel and the two third sub-pixels and the distance between the two first sub-pixels are both L1;

   or

   In at least one of the virtual quadrilaterals, the distance between the second sub-pixel and the two third sub-pixels and the distance between the two first sub-pixels are both L2;

   or

   In at least one of the virtual quadrilaterals, the distance between the second sub-pixel and the two third sub-pixels is L1, and the distance between the second sub-pixel and the first first sub-pixel is L1 , and the distance from the second first sub-pixel is L2;

   or

   In at least one of the virtual quadrilaterals, the distance between the second sub-pixel and the two third sub-pixels is L2, and the distance between the second sub-pixel and the two first sub-pixels is L1 ;

   Among them, L2 is greater than L1.
4. The display substrate according to claim 3, wherein the difference between L2 and L1 is greater than or equal to 1 μm, and the range of L1 is 12-30 μm.
5. The display substrate according to claim 1, wherein the virtual quadrilateral is a right-angled trapezoid, two interior angles are 90°, and one of the other two interior angles is an obtuse angle and the other is an acute angle.
6. The display substrate according to claim 5, wherein the range of the obtuse angle is greater than 90° and less than or equal to 100°, and the range of the acute angle is greater than or equal to 80° and greater than 90°.
7. The display substrate according to claim 1, wherein part of the virtual quadrilateral is a first parallelogram, part of the virtual quadrilateral is a second parallelogram, and in row and column directions, the first parallelogram is Alternately arranged with the second parallelogram, the interior angles of the first parallelogram and the second parallelogram are different.
8. The display substrate according to claim 7, wherein the range of the acute angle of the parallelogram is greater than or equal to 80° and greater than 90°.
9. The display substrate according to claim 1, wherein the difference between the widths of the third sub-pixel and/or the first sub-pixel in the first oblique line direction and the second oblique line direction greater than or equal to 1 μm.
10. The display substrate according to claim 1, wherein the widths of the second sub-pixels in the first oblique line direction and the second oblique line direction are different.
11. The display substrate according to claim 10, wherein in the virtual quadrilateral, the second sub-pixels are opposite to two adjacent ones arranged in the first oblique line direction or the second oblique line direction The center connection line of the third sub-pixel is symmetrical, and is symmetrical with respect to the center connection line of the two first sub-pixels arranged adjacently in the second oblique line direction or the first oblique line direction.
12. The display substrate according to claim 1, wherein the respective total opening areas of the third sub-pixel, the second sub-pixel and the first sub-pixel decrease in sequence, and the total opening area of the first sub-pixel is is x, the total opening area of the second sub-pixel is a*x, and the total opening area of the third sub-pixel is b*x, where 0.5≤a≤0.8, 1≤b≤2.2.
13. The display substrate according to claim 1, wherein the shape of the first sub-pixel, the second sub-pixel and the third sub-pixel is a polygon; The shape of the second sub-pixel and the third sub-pixel is any one of a polygon with rounded corners, a circle, and an ellipse.
14. The display substrate according to claim 13, wherein the shapes of the first sub-pixel, the second sub-pixel and the third sub-pixel are selected from the group consisting of quadrilateral, hexagonal, octagonal, inverted Any of a quadrilateral with rounded corners, a hexagon with rounded corners, an octagon with rounded corners, a circle, and an ellipse.
15. The display substrate of claim 1, wherein the first sub-pixel is a red sub-pixel, the second sub-pixel is a green sub-pixel, and the third sub-pixel is a blue sub-pixel.
16. A display device, characterized by comprising the display substrate according to any one of claims 1-15.
17. A high-precision metal mask for making the display substrate according to any one of claims 1-15, wherein the first sub-pixel comprises a multi-layer film, the second sub-pixel comprises a multi-layer film, The third sub-pixel includes a multi-layer film layer, and the mask plate includes: a plurality of opening regions, the plurality of opening regions including a first sub-pixel corresponding to the shape and distribution of the at least one film layer. an opening area, or a second opening area corresponding to the shape and distribution of at least one film layer in the second subpixel, or a second opening area corresponding to the shape and distribution of at least one film layer in the third subpixel Three open areas.

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