WO2022036844A1 - 显示装置及其驱动方法 - Google Patents

显示装置及其驱动方法 Download PDF

Info

Publication number
WO2022036844A1
WO2022036844A1 PCT/CN2020/123130 CN2020123130W WO2022036844A1 WO 2022036844 A1 WO2022036844 A1 WO 2022036844A1 CN 2020123130 W CN2020123130 W CN 2020123130W WO 2022036844 A1 WO2022036844 A1 WO 2022036844A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal
gate
sub
driving
liquid crystal
Prior art date
Application number
PCT/CN2020/123130
Other languages
English (en)
French (fr)
Inventor
黄北洲
Original Assignee
惠科股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 惠科股份有限公司 filed Critical 惠科股份有限公司
Publication of WO2022036844A1 publication Critical patent/WO2022036844A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0242—Compensation of deficiencies in the appearance of colours

Definitions

  • the present application relates to a display device and a driving method thereof, and in particular, to a display device and a driving method thereof that can improve the color shift phenomenon.
  • liquid crystal display devices As an example, due to their superior characteristics such as thin body, low power consumption and no radiation, they have gradually replaced traditional cathode ray tube displays.
  • the device is used in many types of electronic products, such as mobile phones, portable multimedia devices, notebook computers, LCD TVs and LCD screens.
  • the liquid crystal display device mainly uses an electric field to control the rotation angle of liquid crystal molecules, so that light can pass through the liquid crystal molecules to display images.
  • VA vertical alignment
  • LCD low color shift
  • the purpose of the present application is to provide a display device and a driving method thereof different from the prior art, which can improve the color shift phenomenon of the display device and enhance the optical quality.
  • the present application provides a driving method of a display device.
  • the display device includes a switch array substrate, a first gate driving circuit and a second gate driving circuit.
  • the switch array substrate has a display area and includes a plurality of first gates pole line, a plurality of second gate lines and a plurality of pixels, the plurality of pixels are located in the display area, each pixel is divided into a first sub-area and a second sub-area, the first gate driving circuit and the second gate
  • the driving circuits are respectively located on opposite sides outside the display area, and the driving method is characterized by comprising: using a first gate driving circuit to output a first gate driving signal according to a first signal and passing through a plurality of first gate lines respectively A plurality of first sub-regions of a plurality of pixels are driven; a second gate driving circuit is used to output a second gate driving signal according to a second signal, and the plurality of first sub-regions of the plurality of pixels are respectively driven through a plurality of second gate lines Two sub-
  • the present application further provides a display device including a switch array substrate, a first gate driving circuit and a second gate driving circuit.
  • the switch array substrate has a display area, and includes a plurality of first gate lines, a plurality of second gate lines and a plurality of pixels, the plurality of pixels are located in the display area, and each pixel is divided into a first sub-area and a first sub-area. Second sub-district.
  • the first gate driving circuit and the second gate driving circuit are respectively located on opposite sides outside the display area.
  • the first gate driving circuit outputs a first gate driving signal according to a first signal and passes through the plurality of first gates respectively.
  • the polar lines drive a plurality of first sub-regions of a plurality of pixels
  • the second gate driving circuit outputs a first gate driving signal according to a second signal, and respectively drives a plurality of the plurality of pixels through the plurality of second gate lines In the second sub-region, the duty cycles of the first signal and the second signal are different.
  • the first gate driving circuit includes a first driving element
  • the second gate driving circuit includes a second driving element
  • the first driving element is electrically connected to the first sub-region of the pixel through the first gate line.
  • the second driving element is electrically connected to the second sub-region of the pixel through the second gate line.
  • the first driving element and the second driving element respectively include a shift register.
  • the first signal is input to the first driving element, so that the first driving element outputs the first gate driving signal to drive the first sub-region of the pixel
  • the second signal is input to the second driving element, so that the second driving element outputs The second gate driving signal drives the second sub-region of the pixel.
  • the first signal has two first clocks
  • the second signal has two second clocks
  • the two first clocks turn on two adjacent first driving elements in sequence
  • the two The second clock turns on two adjacent second driving elements in sequence.
  • the levels of the first clock and the second clock are the same.
  • the first sub-region includes a first liquid crystal capacitor
  • the second sub-region includes a second liquid crystal capacitor.
  • a source driving signal is respectively applied to the first liquid crystal capacitor and the second liquid crystal capacitor, so that the voltage across the first liquid crystal capacitor and the second liquid crystal capacitor are different.
  • the first sub-region further includes a first switch
  • the second sub-region further includes a second switch, when the first gate driving signal turns on the first switch and the second gate driving signal turns on the first switch.
  • the source driving signal makes the voltage across the first liquid crystal capacitor and the second liquid crystal capacitor different.
  • the duty cycle of the first signal is greater than the level of the second signal, so that the voltage across the first liquid crystal capacitor is higher than the voltage across the second liquid crystal capacitor.
  • the display device is a gate-in-array (GOA) liquid crystal display device.
  • GAA gate-in-array
  • the present application further provides a display device including a switch array substrate, a first gate driving circuit and a second gate driving circuit.
  • the switch array substrate has a display area, and includes a plurality of first gate lines, a plurality of second gate lines and a plurality of pixels, the plurality of pixels are located in the display area, and each pixel is divided into a first sub-area and a first sub-area. Second sub-district.
  • the first gate driving circuit and the second gate driving circuit are respectively located on opposite sides outside the display area.
  • the first gate driving circuit outputs a first gate driving signal according to a first signal and passes through the plurality of first gates respectively.
  • the polar lines drive a plurality of first sub-regions of a plurality of pixels
  • the second gate driving circuit outputs a second gate driving signal according to a second signal, and respectively drives a plurality of the plurality of pixels through the plurality of second gate lines In the second sub-region, the duty cycles of the first signal and the second signal are different;
  • the first gate driving circuit includes a first driving element
  • the second gate driving circuit includes a second driving element
  • the first signal is input, so that the first drive element outputs the first gate drive signal to drive the first sub-region of the pixel
  • the second signal is input into the second drive element, so that the second drive element outputs the second gate drive signal to drive the pixel's first sub-region.
  • the first sub-region includes a first liquid crystal capacitor
  • the second sub-region includes a second liquid crystal capacitor, when the first gate driving signal and the second gate driving signal respectively drive the first sub-region of the pixel
  • a source driving signal is respectively applied to the first liquid crystal capacitor and the second liquid crystal capacitor, so that the cross voltages of the first liquid crystal capacitor and the second liquid crystal capacitor are different.
  • the first gate driving circuit outputs the first gate driving signal according to the first signal and drives the plurality of pixels through the plurality of first gate lines respectively.
  • the plurality of first sub-regions and the second gate driving circuit outputs the first gate driving signal according to the second signal and drives the plurality of second sub-regions of the plurality of pixels through the plurality of second gate lines respectively, and
  • the design with different duty ratios of the first signal and the second signal can form different gate drive signal waveforms, so that the first sub-region and the second sub-region of each pixel have different charging effects to form a bright region and dark area, thereby, the display device and the driving method thereof of the present application can improve the color shift phenomenon and enhance the optical quality.
  • FIG. 1 and FIG. 2 are different schematic diagrams of a display device according to an embodiment of the present application, respectively.
  • FIG. 3 is a schematic diagram illustrating the relationship between a switch array substrate and two gate driving circuits of a display device according to an embodiment.
  • FIG. 4 is a schematic diagram of an equivalent circuit of one pixel of a display device according to an embodiment.
  • FIG. 5 is a schematic diagram of waveforms of a first signal and a second signal according to an embodiment.
  • FIG. 6A is a schematic diagram of waveforms of the first clock rate, the first gate driving signal and the voltage across the first liquid crystal capacitor according to an embodiment.
  • 6B is a schematic diagram of waveforms of the second clock, the second gate driving signal and the voltage across the second liquid crystal capacitor according to an embodiment.
  • first and second are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implying the number of indicated technical features.
  • a feature defined as “first”, “second” may expressly or implicitly include one or more of that feature.
  • plural means two or more.
  • the term “comprising” and any variations thereof are intended to cover non-exclusive inclusion.
  • the terms “installed”, “connected” and “connected” should be understood in a broad sense, for example, it may be a fixed connection or a detachable connection Connection, or integral connection; can be mechanical connection, can also be electrical connection; can be directly connected, can also be indirectly connected through an intermediate medium, can be internal communication between two elements.
  • installed should be understood in a broad sense, for example, it may be a fixed connection or a detachable connection Connection, or integral connection; can be mechanical connection, can also be electrical connection; can be directly connected, can also be indirectly connected through an intermediate medium, can be internal communication between two elements.
  • FIG. 1 and FIG. 2 are different schematic diagrams of a display device 1 according to an embodiment of the present application, respectively.
  • 1 is a schematic side view of the display device 1
  • FIG. 2 is a top schematic view of the switch array substrate 11 of the display device 1 .
  • the display device 1 can be used for displaying images, and includes a switch array substrate 11 and a pair of opposite substrates 12 , and the switch array substrate 11 and the opposite substrate 12 are disposed opposite to each other.
  • the display device 1 is a flat display device, such as a liquid crystal display device (LCD) or an organic light emitting diode display device (OLED).
  • the display device 1 of this embodiment is a liquid crystal display device as an example. Therefore, a liquid crystal layer 13 can be sandwiched between the switch array substrate 11 and the opposite substrate 12 to form a plurality of pixels arranged in an array.
  • the switch array substrate 11 of this embodiment is a display substrate, and the opposite substrate 12 is a color filter substrate as an example.
  • the black matrix layer or the filter layer on the color filter substrate can also be disposed on the switch array substrate 11, so that the switch array substrate 11 becomes a BOA (BM on array) substrate , or become a COA (color filter on array) substrate, which is not limited.
  • the opposite substrate 12 can be a protective substrate to protect the switch array substrate 11 from intrusion of foreign objects.
  • the switch array substrate 11 of this embodiment has a display area (Active Area) AA and a non-display area NAA.
  • the display area AA is an area on the switch array substrate 11 for displaying the image picture, and the light can pass through the display area AA to reach the person viewing the picture.
  • the non-display area NAA is an area on the switch array substrate 11 where the image screen cannot be displayed.
  • the display device 1 of the present embodiment is a display device of Gate on Array (GOA) technology. Therefore, the display device 1 may further include at least one gate driving circuit, and the gate driving circuit is located on the switch array substrate 11 .
  • the non-display area NAA so it will not block the penetration of light.
  • the display device 1 of the present embodiment includes two gate driving circuits: the first gate driving circuit 14a and the second gate driving circuit 14b are located on opposite sides of the display area AA respectively, so that the display device 1 becomes A bilaterally drivable display.
  • the first gate driving circuit 14a and the second gate driving circuit 14b are fabricated on the switch array substrate 11 by a thin film process, so they can be called GOA or GOP (Gate on Plane) circuits, so that the gate can be saved.
  • GOA Gate on Plane
  • FIG. 3 is a schematic diagram illustrating the relationship between the switch array substrate 11 and the two gate driving circuits 14 a and 14 b of the display device 1 according to an embodiment.
  • the switch array substrate 11 includes a plurality of first gate lines, a plurality of second gate lines, and a plurality of pixels P (in FIG. Two gate lines Gb1-Gb6 and 6 pixels P are taken as an example), a plurality of pixels P are located in the display area AA of the switch array substrate 11, and can be arranged in an array. Wherein, each pixel P can be divided into a first sub-region a and a second sub-region b.
  • the first gate driving circuit 14a may include a plurality of first driving elements 141a
  • the second gate driving circuit 14b may include a plurality of second driving elements 141b
  • the plurality of first driving elements of the first gate driving circuit 14a The plurality of second driving elements 141b of the second gate driving circuit 14b can be respectively connected to the plurality of first sub-regions a of the plurality of pixels P through the plurality of first gate lines Ga1-Ga6 respectively.
  • the second gate lines Gb1 to Gb6 are electrically connected to the plurality of second sub-regions b of the plurality of pixels P.
  • the first driving element 141a of the first gate driving circuit 14a can output a first gate driving signal according to a first signal Sa and drive the first sub-region a of the pixel P through the first gate lines Ga1-Ga6, and the first The second driving elements 141b of the two gate driving circuits 14b can output a second gate driving signal according to a second signal Sb and drive the second sub-region b of the pixel P through the second gate lines Gb1-Gb6.
  • the first driving element 141a and the second driving element 141b can be respectively a shift register (SR), and when the first signal Sa is input to the first driving element 141a, the second signal Sb is input to the second driving element
  • the first driving element 141a and the second driving element 141b can turn on the switches of the first sub-region a and the second sub-region b of the pixel P, respectively.
  • the display device 1 may further include a timing control circuit and a source driving circuit (not shown in the figure), and the source driving circuit may be respectively connected with the plurality of switch array substrates 11 through a plurality of data lines (not shown).
  • the pixel electrodes (not shown) of each pixel P are electrically connected.
  • the timing control circuit can be electrically connected to the source driving circuit and the first gate driving circuit 14a and the second gate driving circuit 14b respectively, and the timing control circuit can transmit the vertical clock signal and the vertical synchronization signal to the first gate driving circuit
  • the circuit 14a and the second gate driving circuit 14b convert the video signal received from the external interface into the data signal used by the source driving circuit, and transmit the data signal, horizontal clock signal and horizontal synchronization signal to the source driving circuit .
  • the first gate driving circuit 14a can sequentially turn on the first gate lines Ga1-Ga6 through the first driving element 141a according to the vertical clock signal and the vertical synchronization signal
  • the second gate driving circuit 14b can turn on the first gate lines Ga1-Ga6 according to the vertical clock signal
  • the signal and the vertical synchronizing signal turn on the second gate lines Gb1 - Gb6 sequentially through the second driving element 141b.
  • the source driving circuit can transmit the data signal corresponding to each row of pixels P to the data signals of each pixel P through the data lines.
  • the pixel electrodes enable the display device 1 to display images.
  • FIG. 4 is a schematic diagram of an equivalent circuit of a pixel P of the display device 1 according to an embodiment
  • FIG. 5 is a first signal Sa and a first signal of an embodiment.
  • the first sub-region a of a pixel P in this embodiment may include a first switch T1, a first liquid crystal capacitor Clca and a first storage capacitor Csta
  • the second sub-region b may include a second The switch T2, a second liquid crystal capacitor Clcb and a second storage capacitor Cstb.
  • the gate of the first switch T1 is electrically connected to the first gate line GaN (N is a positive integer), the source of the first switch T1 is electrically connected to the data line SM (M is a positive integer), and the drain of the first switch T1
  • the electrodes are electrically connected to one end of the first liquid crystal capacitor Clca and the first storage capacitor Csta, and the other ends of the first liquid crystal capacitor Clca and the first storage capacitor Csta are grounded, for example.
  • the gate of the second switch T2 is electrically connected to the second gate line GbN
  • the source of the second switch T2 is electrically connected to the data line SM
  • the drain of the second switch T2 is electrically connected to the second liquid crystal capacitor Clcb and the second storage capacitor One end of Cstb, and the other ends of the second liquid crystal capacitor Clcb and the second storage capacitor Cstb are grounded.
  • the first signal Sa can be input to the first driving element 141a, so that the first driving element 141a can output the first gate driving signal Ga to drive the first sub-region a of each pixel P
  • the second signal Sb can be The second driving element 141b is input, so that the second driving element 141b can output the second gate driving signal Gb to drive the second sub-region b of each pixel P.
  • the first signal Sa in this embodiment has two first clocks: CK1a, CK2a
  • the second signal Sb has two second clocks: CK1b, CK2b, two first clocks
  • the pulses CK1a and CK2a turn on the two adjacent first driving elements 141a in sequence
  • the two second clock pulses CK1b and CK2b turn on the two adjacent second driving elements 141b in sequence, so that the first gate driving circuit
  • the plurality of first driving elements 141a of 14a can respectively output the first gate driving signal Ga to drive the plurality of first sub-regions a of the plurality of pixels P
  • the second driving elements 141b of the second gate driving circuit 14b can respectively
  • the second gate driving signal Gb is output to drive the plurality of second sub-regions b of the plurality of pixels P.
  • the duty ratios of the first clock pulses CK1a and CK2a of the first signal Sa are different from the duty ratios of the second clock pulses CK1b and
  • a source driving signal Vs can be respectively applied to the first liquid crystal capacitor through the data line SM Clca and the second liquid crystal capacitor Clcb are used to charge the first liquid crystal capacitor Clca and the second liquid crystal capacitor Clcb, and also charge the first storage capacitor Csta and the second storage capacitor Cstb.
  • the purpose of the first storage capacitor Csta and the second storage capacitor Cstb is to reduce the first liquid crystal capacitor Clca and the second liquid crystal capacitor caused by their parasitic capacitances when the first switch T1 and the second switch T2 are turned off (non-conductive).
  • the voltage change of Clcb maintains the characteristics of the first sub-region a and the second sub-region b.
  • the first clock CK1a is transmitted to the first driving element 141a at time t1
  • the second clock CK1b is transmitted to the second driving element 141b at time t3
  • the first clock CK1a and the second clock CK1b falls simultaneously at time t2 (t3 lies between t1 and t2).
  • the levels of the first clocks CK1a and CK2a and the second clocks CK1b and CK2b in this embodiment are all the same
  • the duty ratios of the first clocks CK1a and CK2a are the same
  • the duty ratios of the second clocks CK1b and CK2b are the same.
  • the duty ratio is also the same, but the duty ratio of the first clock CK1a, CK2a is larger than the duty ratio of the second clock CK1b, CK2b, that is, the first clock CK1a, CK2a and the second clock CK1b, CK1b,
  • the high-level time Da of the first clocks CK1a and CK2a is longer than the high-level time Db of the second clocks CK1b and CK2b (Da>Db).
  • the duty ratios of the first clocks CK1a, CK2a and the second clocks CK1b, CK2b may be, for example, between 10% and 75%, respectively.
  • the duty ratio of the first clocks CK1a and CK2a may be, for example, 50%
  • the duty ratio of the second clocks CK1b, CK2b may be, for example, 25%.
  • FIG. 6A is a schematic diagram of waveforms of the first clock CK1a, the first gate driving signal Ga, and the voltage Va across the first liquid crystal capacitor Clca in an embodiment
  • FIG. 6B is a second clock CK1b, a second A schematic diagram of the waveform of the gate driving signal Gb and the voltage Vb across the second liquid crystal capacitor Clcb.
  • the first driving element 141a receives the first clock CK1a of the first signal Sa, so that the first driving element 141a can output the first gate driving signal Ga through the first gate line GaN to turn on the first clock of the pixel P
  • the second driving element 141b receives the second clock CK1b of the second signal Sb, so that the second driving element 141b can output the second gate through the second gate line GbN
  • the pole driving signal Gb turns on the second switch T2 of the second sub-region b of the pixel P; when the first switch T1 of the first sub-region a is turned on and the second switch T2 of the second sub-region b is turned on, the source
  • the pole driving signal Vs can be respectively applied to the first liquid crystal capacitor Clca of the first sub-region a and the second liquid crystal capacitor Clcb of the second sub-region b through the data line SM, because the first clock pulse CK1a of the first signal Sa
  • the driving method of the display device 1 of this embodiment is as follows: using the first gate driving circuit 14a to output the first gate driving signal Ga according to the first signal Sa and driving the plurality of pixels P through the plurality of first gate lines respectively a plurality of first sub-regions a; the second gate driving circuit 14b is used to output the second gate driving signal Gb according to the second signal Sb, and the plurality of second gate lines of the plurality of pixels P are respectively driven by the plurality of second gate lines. Sub-region b; wherein, the duty ratios of the first signal Sa and the second signal Sb are different.
  • the technical contents of the display device 1 and the driving method thereof have been described in detail above, and will not be repeated here.
  • the first gate driving circuit outputs the first gate driving signal according to the first signal, and the plurality of pixels are respectively driven by the plurality of first gate lines.
  • the second gate driving circuit outputs a first gate driving signal according to a second signal and drives the plurality of second sub-regions of a plurality of pixels through a plurality of second gate lines respectively, and the first A design with different duty cycles of a signal and a second signal can form different gate driving signal waveforms, so that the first sub-region and the second sub-region of each pixel have different charging effects to form bright regions and Therefore, the display device and the driving method thereof of the present application can improve the color shift phenomenon and enhance the optical quality.

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

一种显示装置（1）及其驱动方法。显示装置（1）的开关阵列基板（11）具有一显示区（AA），并包括多条第一栅极线（Ga1-Ga6）、多条第二栅极线（Gb1-Gb6）与多个画素（P），多个画素（P）位于显示区（AA），第一栅极驱动电路（14a）与第二栅极驱动电路（14b）分别位于显示区（AA）外的相对两侧。驱动方法包括：利用第一栅极驱动电路（14a）依据一第一信号（Sa）输出一第一栅极驱动信号（Ga）且分别通过多条第一栅极线（Ga1-Ga6）驱动多个画素（P）的多个第一子区（a）；利用第二栅极驱动电路（14b）依据一第二信号（Sb）输出一第二栅极驱动信号（Gb）且分别通过多条第二栅极线（Gb1-Gb6）驱动多个画素（P）的多个第二子区（b）；第一信号（Sa）与第二信号（Sb）的占空比不相同。

Description

显示装置及其驱动方法 技术领域
本申请关于一种显示装置及其驱动方法，特别关于一种可改善色偏现象的显示装置及其驱动方法。
背景技术
随着科技的进步，平面显示装置已经广泛的被运用在各种领域，以液晶显示装置为例，因具有体型轻薄、低功率消耗及无辐射等优越特性，已经渐渐地取代传统阴极射线管显示装置，而应用至许多种类之电子产品中，例如行动电话、可携式多媒体装置、笔记型计算机、液晶电视及液晶屏幕等等。
液晶显示装置主要是利用电场控制液晶分子的旋转角度，让光线可穿过液晶分子而显示影像。对于VA(vertical alignment)型的液晶显示器，特别是大尺寸的液晶显示器来说，在侧视观看时会出现色偏(color shift)情况，而且侧视观看角度越大，其色偏现象越明显。为了降低色偏现象，提高可视角的范围，VA型的大尺寸液晶显示器通常会做低色偏(low color shift,LCS)的画素设计，一般的做法是将一个画素区分为亮区与暗区，通过两区不同的电压-穿透度曲线(V-T Curve)的光学表现混合，再适当调整亮暗区的面积比例，使大视角时可有效压制灰阶泛白的问题，借此改善色偏现象。
发明内容
有鉴于先前技术的不足，发明人经研发后得本申请。本申请的目的为提 供一种有别于习知技艺的显示装置及其驱动方法，可改善显示装置的色偏现象，提升光学品味。
本申请提出一种显示装置的驱动方法，显示装置包括一开关阵列基板、一第一栅极驱动电路以及一第二栅极驱动电路，开关阵列基板具有一显示区，并包括多条第一栅极线、多条第二栅极线与多个画素，多个画素位于显示区，每一个画素被区分成一第一子区和一第二子区，第一栅极驱动电路与第二栅极驱动电路分别位于显示区外的相对两侧，驱动方法的特征在于，包括：利用第一栅极驱动电路依据一第一信号输出一第一栅极驱动信号且分别通过多条第一栅极线驱动多个画素的多个第一子区；利用第二栅极驱动电路依据一第二信号输出一第二栅极驱动信号且分别通过多条第二栅极线驱动多个画素的多个第二子区；第一信号与第二信号的占空比不相同。
本申请另提出一种显示装置，包括一开关阵列基板以及一第一栅极驱动电路与一第二栅极驱动电路。开关阵列基板具有一显示区，并包括多条第一栅极线、多条第二栅极线与多个画素，多个画素位于显示区，每一个画素被区分成一第一子区和一第二子区。第一栅极驱动电路与第二栅极驱动电路分别位于显示区外的相对两侧，第一栅极驱动电路依据一第一信号输出一第一栅极驱动信号且分别通过多条第一栅极线驱动多个画素的多个第一子区，第二栅极驱动电路依据一第二信号输出一第一栅极驱动信号且分别通过多条第二栅极线驱动多个画素的多个第二子区，第一信号与第二信号的占空比不相同。
在一实施例中，第一栅极驱动电路包括一第一驱动元件，第二栅极驱动电路包括一第二驱动元件，第一驱动元件通过第一栅极线与画素的第一子区电连接，第二驱动元件通过第二栅极线与画素的第二子区电连接。
在一实施例中，第一驱动元件与第二驱动元件分别包括一移位缓存器。
在一实施例中，第一信号输入第一驱动元件，使第一驱动元件输出第一栅极驱动信号驱动画素的第一子区，第二信号输入第二驱动元件，使第二驱动元件输出第二栅极驱动信号驱动画素的第二子区。
在一实施例中，第一信号具有两个第一时脉，第二信号具有两个第二时脉，两个第一时脉依序导通两个相邻的第一驱动元件，两个第二时脉依序导通两个相邻的第二驱动元件。
在一实施例中，第一时脉和第二时脉的准位相同。
在一实施例中，第一子区包括一第一液晶电容，第二子区包括一第二液晶电容，当第一栅极驱动信号与第二栅极驱动信号分别驱动画素的第一子区与第二子区时，一源极驱动信号分别施加于第一液晶电容与第二液晶电容，使第一液晶电容与第二液晶电容的跨压不同。
在一实施例中，第一子区还包括一第一开关，第二子区还包括一第二开关，当第一栅极驱动信号导通第一开关且第二栅极驱动信号导通第二开关时，源极驱动信号使第一液晶电容与第二液晶电容的跨压不同。
在一实施例中，第一信号的占空比大于第二信号的准位，使得第一液晶电容的跨压高于第二液晶电容的跨压。
在一实施例中，显示装置为栅极在阵列(GOA)的液晶显示装置。
本申请又提出一种显示装置，包括一开关阵列基板以及一第一栅极驱动电路与一第二栅极驱动电路。开关阵列基板具有一显示区，并包括多条第一栅极线、多条第二栅极线与多个画素，多个画素位于显示区，每一个画素被区分成一第一子区和一第二子区。第一栅极驱动电路与第二栅极驱动电路分别位于显示区外的相对两侧，第一栅极驱动电路依据一第一信号输出一第一 栅极驱动信号且分别通过多条第一栅极线驱动多个画素的多个第一子区，第二栅极驱动电路依据一第二信号输出一第二栅极驱动信号且分别通过多条第二栅极线驱动多个画素的多个第二子区，第一信号与第二信号的占空比不相同；其中，第一栅极驱动电路包括一第一驱动元件，第二栅极驱动电路包括一第二驱动元件，第一信号输入第一驱动元件，使第一驱动元件输出第一栅极驱动信号驱动画素的第一子区，第二信号输入第二驱动元件，使第二驱动元件输出第二栅极驱动信号驱动画素的第二子区；另外，第一子区包括一第一液晶电容，第二子区包括一第二液晶电容，当第一栅极驱动信号与第二栅极驱动信号分别驱动画素的第一子区与第二子区时，一源极驱动信号分别施加于第一液晶电容与第二液晶电容，使第一液晶电容与第二液晶电容的跨压不同。
承上所述，在本申请的显示装置及其驱动方法中，通过使第一栅极驱动电路依据第一信号输出第一栅极驱动信号且分别通过多条第一栅极线驱动多个画素的多个第一子区，并使第二栅极驱动电路依据第二信号输出第一栅极驱动信号且分别通过多条第二栅极线驱动多个画素的多个第二子区，且第一信号与第二信号的占空比不相同的设计，可形成不同的栅级驱动信号波形，进而使各画素的第一子区与第二子区有不一样的充电效果而形成亮区与暗区，借此，使得本申请的显示装置及其驱动方法可改善色偏现象，提升光学品味。
附图说明
所包括的附图用来提供对本申请实施例的进一步的理解，其构成了说明书的一部分，用于例示本申请的实施方式，并与文字描述一起来阐释本申请 的原理。显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。在附图中：
图1与图2分别为本申请一实施例的一种显示装置的不同示意图。
图3为一实施例之显示装置的开关阵列基板与两个栅极驱动电路的关系示意图。
图4为一实施例之显示装置的一个画素的等效电路示意图。
图5为一实施例之第一信号与第二信号的波形示意图。
图6A为一实施例之第一时脉率、第一栅极驱动信号与第一液晶电容之跨压的波形示意图。
图6B为一实施例之第二时脉、第二栅极驱动信号与第二液晶电容之跨压的波形示意图。
具体实施方式
这里所公开的具体结构和功能细节仅仅是代表性的，并且是用于描述本申请的示例性实施例的目的。但是本申请可以通过许多替换形式来具体实现，并且不应当被解释成仅仅受限于这里所阐述的实施例。
在本申请的描述中，需要理解的是，术语“中心”、“横向”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明 示或者隐含地包括一个或者更多个该特征。在本申请的描述中，除非另有说明，“多个”的含义是两个或两个以上。另外，术语“包括”及其任何变形，意图在于覆盖不排他的包含。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本申请中的具体含义。
这里所使用的术语仅仅是为了描述具体实施例而不意图限制示例性实施例。除非上下文明确地另有所指，否则这里所使用的单数形式“一个”、“一项”还意图包括复数。还应当理解的是，这里所使用的术语“包括”和/或“包含”规定所陈述的特征、整数、步骤、操作、单元和/或组件的存在，而不排除存在或添加一个或更多其他特征、整数、步骤、操作、单元、组件和/或其组合。
以下将参照相关图式，说明依本申请较佳实施例之显示装置及其驱动方法，其中相同的元件将以相同的参照符号加以说明。
图1与图2分别为本申请一实施例的一种显示装置1的不同示意图。其中，图1为显示装置1的侧视示意图，而图2为显示装置1的开关阵列基板11的俯视示意图。
如图1所示，显示装置1可用于显示影像画面，并包括一开关阵列基板11以及一对向基板12，开关阵列基板11与对向基板12相对设置。显示装置1为一平面显示装置，例如可为一液晶显示装置(LCD)或一有机发光二极管 显示装置(OLED)。本实施例的显示装置1是以液晶显示装置为例，因此，一液晶层13可夹置于开关阵列基板11与对向基板12之间，以形成多个阵列排列的画素。本实施例的开关阵列基板11是一个显示基板，且对向基板12是以彩色滤光基板为例。不过，在其它的实施例中，彩色滤光基板上的黑色矩阵层(black matrix)或滤光层也可设置于开关阵列基板11上，使得开关阵列基板11成为一BOA(BM on array)基板，或成为一COA(color filter on array)基板，并不限制。在不同实施例中，若显示装置1为OLED时，则对向基板12可为一保护基板，以保护开关阵列基板11免于异物的入侵。
如图2所示，本实施例的开关阵列基板11具有一显示区(Active Area)AA与一非显示区NAA。显示区AA是开关阵列基板11上用以显示影像画面的区域，光线可穿过显示区AA而到达观看画面的人。另外，非显示区NAA是开关阵列基板11上无法显示影像画面的区域。本实施例的显示装置1为栅极在阵列(Gate on Array,GOA)技术的显示装置，因此，显示装置1还可包括有至少一个栅极驱动电路，栅极驱动电路是位于开关阵列基板11的非显示区NAA，故不会遮蔽住光线的穿透。
本实施例的显示装置1是以包括两个栅极驱动电路：第一栅极驱动电路14a与第二栅极驱动电路14b分别位于显示区AA外的相对两侧为例，使显示装置1成为一可双边驱动的显示器。于此，第一栅极驱动电路14a与第二栅极驱动电路14b是以薄膜制程制作于开关阵列基板11上，故可称为GOA或GOP(Gate on Plane)电路，如此，可节省栅极驱动电路的集成电路(IC)的成本，进而降低显示装置1的成本。
图3为一实施例之显示装置1的开关阵列基板11与两个栅极驱动电路14a、14b的关系示意图。如图3所示，开关阵列基板11包括多条第一栅极 线、多条第二栅极线与多个画素P(图3是以6条第一栅极线Ga1～Ga6、6条第二栅极线Gb1～Gb6和6个画素P为例)，多个画素P位于开关阵列基板11之显示区AA内，且可呈阵列状排列。其中，每一个画素P可被区分成一第一子区a和一第二子区b。另外，第一栅极驱动电路14a可包括多个第一驱动元件141a，第二栅极驱动电路14b可包括多个第二驱动元件141b，第一栅极驱动电路14a的多个第一驱动元件141a可分别通过多条第一栅极线Ga1～Ga6与多个画素P的多个第一子区a电连接，第二栅极驱动电路14b的多个第二驱动元件141b可分别通过多条第二栅极线Gb1～Gb6与多个画素P的多个第二子区b电连接。
第一栅极驱动电路14a的第一驱动元件141a可依据一第一信号Sa输出一第一栅极驱动信号且通过第一栅极线Ga1～Ga6驱动画素P的第一子区a，且第二栅极驱动电路14b的第二驱动元件141b可依据一第二信号Sb输出一第二栅极驱动信号且通过第二栅极线Gb1～Gb6驱动画素P的第二子区b。于此，第一驱动元件141a与第二驱动元件141b可别为一移位缓存器(shift register,SR)，且当第一信号Sa输入第一驱动元件141a，第二信号Sb输入第二驱动元件141b时，可使第一驱动元件141a与第二驱动元件141b分别导通画素P的第一子区a与第二子区b的开关。
此外，显示装置1还可包括一时序控制电路及一源极驱动电路(图未绘示)，源极驱动电路可通过多条数据线(图未绘示)而分别与开关阵列基板11的多个画素P的画素电极(图未显示)电性连接。另外，时序控制电路可分别与源极驱动电路及第一栅极驱动电路14a、第二栅极驱动电路14b电连接，时序控制电路可传送垂直时脉信号及垂直同步信号至第一栅极驱动电路14a与第二栅极驱动电路14b，并将自外部接口所接收的视讯信号转换成源极 驱动电路所用的数据信号，并传送数据信号、水平时脉信号及水平同步信号至源极驱动电路。此外，第一栅极驱动电路14a可依据垂直时脉信号及垂直同步信号通过第一驱动元件141a依序导通第一栅极线Ga1～Ga6，第二栅极驱动电路14b可依据垂直时脉信号及垂直同步信号通过与第二驱动元件141b依序导通第二栅极线Gb1～Gb6。且当第一栅极线Ga1～Ga6与第二栅极线Gb1～Gb6依序导通时，源极驱动电路可将对应每一行画素P的数据信号，藉由数据线传送至各画素P的画素电极，使显示装置1可显示影像。
请参照图3并配合图4与图5所示，其中，图4为一实施例之显示装置1的一个画素P的等效电路示意图，而图5为一实施例之第一信号Sa与第二信号Sb的波形示意图。
如图4所示，本实施例的一个画素P的第一子区a可包括一第一开关T1、一第一液晶电容Clca和第一储存电容Csta，第二子区b可包括一第二开关T2、一第二液晶电容Clcb和一第二储存电容Cstb。其中，第一开关T1的栅极电连接第一栅极线GaN(N为正整数)，而第一开关T1的源极电连接数据线SM(M为正整数)，第一开关T1的漏极电连接第一液晶电容Clca和第一储存电容Csta的一端，且第一液晶电容Clca和第一储存电容Csta的另一端例如接地。另外，第二开关T2的栅极电连接第二栅极线GbN，第二开关T2的源极电连接数据线SM，第二开关T2的漏极电连接第二液晶电容Clcb和第二储存电容Cstb的一端，且第二液晶电容Clcb和第二储存电容Cstb的另一端接地。
如图3所示，第一信号Sa可输入第一驱动元件141a，使第一驱动元件141a可输出第一栅极驱动信号Ga驱动各画素P的第一子区a，而第二信号Sb可输入第二驱动元件141b，使第二驱动元件141b可输出第二栅极驱动信 号Gb驱动各画素P的第二子区b。如图5所示，本实施例的第一信号Sa具有两个第一时脉(clock)：CK1a、CK2a，第二信号Sb具有两个第二时脉：CK1b、CK2b，两个第一时脉CK1a、CK2a依序导通两个相邻的第一驱动元件141a，两个第二时脉CK1b、CK2b依序导通两个相邻的第二驱动元件141b，使第一栅极驱动电路14a的多个第一驱动元件141a可分别输出第一栅极驱动信号Ga驱动多个画素P的多个第一子区a，并使第二栅极驱动电路14b的第二驱动元件141b可分别输出第二栅极驱动信号Gb驱动多个画素P的多个第二子区b。其中，第一信号Sa的第一时脉CK1a、CK2a的占空比(duty ratio)与第二信号Sb的第二时脉CK1b、CK2b的占空比不相同。
因此，当第一栅极驱动信号Ga与第二栅极驱动信号Gb分别导通第一开关T1与第二开关T2时，一源极驱动信号Vs可分别通过数据线SM施加于第一液晶电容Clca与第二液晶电容Clcb，以对第一液晶电容Clca与第二液晶电容Clcb充电，同时也对第一储存电容Csta与第二储存电容Cstb充电。第一储存电容Csta与第二储存电容Cstb的目的是为了降低第一开关T1与第二开关T2关闭(不导通)时，因其寄生电容所引起的第一液晶电容Clca与第二液晶电容Clcb的电压变化，保持第一子区a与第二子区b的特性。
在图5中，第一时脉CK1a于时间t1时传送至第一驱动元件141a，第二时脉CK1b于时间t3时传送至第二驱动元件141b，且第一时脉CK1a与第二时脉CK1b于时间t2时同时下降(t3位于t1与t2之间)。另外，本实施例的第一时脉CK1a、CK2a和第二时脉CK1b、CK2b的准位皆相同，第一时脉CK1a、CK2a的占空比相同，且第二时脉CK1b、CK2b的占空比也相同，但是，第一时脉CK1a、CK2a的占空比大于第二时脉CK1b、CK2b的占空比，也就是说，在第一时脉CK1a、CK2a和第二时脉CK1b、CK2b具有相同周期T的情况下， 第一时脉CK1a、CK2a的高准位时间Da大于第二时脉CK1b、CK2b的高准位时间Db(Da＞Db)。第一时脉CK1a、CK2a与第二时脉CK1b、CK2b的占空比例如可分别介于10％至75％之间。在一些实施例中，第一时脉CK1a、CK2a的占空比例如可为50％，第二时脉CK1b、CK2b的占空比例如可为25％。
图6A为一实施例之第一时脉CK1a、第一栅极驱动信号Ga与第一液晶电容Clca之跨压Va的波形示意图，而图6B为一实施例之第二时脉CK1b、第二栅极驱动信号Gb与第二液晶电容Clcb之跨压Vb的波形示意图。
在时间t1时，第一驱动元件141a接收第一信号Sa的第一时脉CK1a，使第一驱动元件141a可通过第一栅极线GaN输出第一栅极驱动信号Ga导通画素P的第一子区a的第一开关T1，在时间t3时，第二驱动元件141b接收第二信号Sb的第二时脉CK1b，使第二驱动元件141b可通过第二栅极线GbN输出第二栅极驱动信号Gb导通画素P的第二子区b的第二开关T2；当第一子区a的第一开关T1导通、第二子区b的第二开关T2导通时，则源极驱动信号Vs可通过数据线SM分别施加于第一子区a的第一液晶电容Clca与第二子区b的第二液晶电容Clcb，因为第一信号Sa的第一时脉CK1a的占空比大于第二信号Sb的第二时脉CK1b的占空比，使得第一驱动元件141a输出的第一栅极驱动信号Ga导通第一开关T1的时间比较多，而第二驱动元件141b输出的第二栅极驱动信号Gb导通第二开关T2的时间比较短，进而使得第一子区a在比较多时间的第一栅极驱动信号Ga的驱动下，源极驱动信号Vs对第一液晶电容Clca的充电时间比较久，而第二子区b在比较少时间的第二栅极驱动信号Gb的驱动下，源极驱动信号Vs对第二液晶电容Clcb的充电时间比较短，使得第一液晶电容Clca的跨压Va将高于第二液晶电容Clcb的跨压Va，而使第一子区a与第二子区b出现电位差，则第一子区a与第二子区b 的液晶分子的倾斜角将不相同而可形成亮区与暗区，通过两个子区不同的电压-穿透度曲线(V-T Curve)的光学表现混合，可改善显装置1的色偏现象，提升光学品味。
此外，本实施例的显示装置1的驱动方法为：利用第一栅极驱动电路14a依据第一信号Sa输出第一栅极驱动信号Ga且分别通过多条第一栅极线驱动多个画素P的多个第一子区a；利用第二栅极驱动电路14b依据第二信号Sb输出第二栅极驱动信号Gb且分别通过多条第二栅极线驱动多个画素P的多个第二子区b；其中，第一信号Sa与第二信号Sb的占空比不相同。于此，显示装置1与其驱动方法的技术内容已于上述中详述，于此不再赘述。
综上所述，在本申请的显示装置及其驱动方法中，通过第一栅极驱动电路依据第一信号输出第一栅极驱动信号且分别通过多条第一栅极线驱动多个画素的多个第一子区，并通过第二栅极驱动电路依据第二信号输出第一栅极驱动信号且分别通过多条第二栅极线驱动多个画素的多个第二子区，且第一信号与第二信号的占空比不相同的设计，可形成不同的栅级驱动信号波形，进而使各画素的第一子区与第二子区有不一样的充电效果而形成亮区与暗区，借此，使得本申请的显示装置及其驱动方法可改善色偏现象，提升光学品味。
以上所述仅为举例性，而非为限制性者。任何未脱离本申请的精神与范畴，而对其进行的等效修改或变更，均应包括于权利要求书范围中。

Claims (20)

  1. 一种显示装置的驱动方法，所述显示装置包括：一开关阵列基板、一第一栅极驱动电路以及一第二栅极驱动电路，所述开关阵列基板具有一显示区，并包括多条第一栅极线、多条第二栅极线与多个画素，所述多个画素位于所述显示区，每一个所述画素被区分成一第一子区和一第二子区，所述第一栅极驱动电路与所述第二栅极驱动电路分别位于所述显示区外的相对两侧，所述驱动方法包括：
    利用所述第一栅极驱动电路依据一第一信号输出一第一栅极驱动信号且分别通过所述多条第一栅极线驱动多个所述画素的多个所述第一子区；
    利用所述第二栅极驱动电路依据一第二信号输出一第二栅极驱动信号且分别通过所述多条第二栅极线驱动多个所述画素的多个所述第二子区；所述第一信号与所述第二信号的占空比不相同。
  2. 如权利要求1所述的驱动方法，其中，所述第一栅极驱动电路包括一第一驱动元件，所述第二栅极驱动电路包括一第二驱动元件，所述第一驱动元件通过所述第一栅极线与所述画素的所述第一子区电连接，所述第二驱动元件通过所述第二栅极线与所述画素的所述第二子区电连接。
  3. 如权利要求2所述的驱动方法，其中，所述第一驱动元件与所述第二驱动元件分别包括一移位缓存器。
  4. 如权利要求2所述的驱动方法，其中，所述第一信号输入所述第一驱动元件，使所述第一驱动元件输出所述第一栅极驱动信号驱动所述画素的所述第一子区，所述第二信号输入所述第二驱动元件，使所述第二驱动元件输出所述第二栅极驱动信号驱动所述画素的所述第二子区。
  5. 如权利要求4所述的驱动方法，其中，所述第一信号具有两个第一时脉，所述第二信号具有两个第二时脉，所述两个第一时脉依序导通两个相邻的所述第一驱动元件，所述两个第二时脉依序导通两个相邻的所述第二驱动元件。
  6. 如权利要求5所述的驱动方法，其中，所述第一时脉和所述第二时脉的准位相同。
  7. 如权利要求1所述的驱动方法，其中，所述第一子区包括一第一液晶电容，所述第二子区包括一第二液晶电容，当所述第一栅极驱动信号与所述第二栅极驱动信号分别驱动所述画素的所述第一子区与所述第二子区时，一源极驱动信号分别施加于所述第一液晶电容与所述第二液晶电容，使所述第一液晶电容与所述第二液晶电容的跨压不同。
  8. 如权利要求7所述的驱动方法，其中，所述第一子区还包括一第一开关，所述第二子区还包括一第二开关，当所述第一栅极驱动信号导通所述第一开关且所述第二栅极驱动信号导通所述第二开关时，所述源极驱动信号使所述第一液晶电容与所述第二液晶电容的跨压不同。
  9. 如权利要求7所述的驱动方法，其中，所述第一信号的占空比大于所述第二信号的准位，使得所述第一液晶电容的跨压高于所述第二液晶电容的跨压。
  10. 一种显示装置，包括：
    一开关阵列基板，具有一显示区，并包括多条第一栅极线、多条第二栅极线与多个画素，所述多个画素位于所述显示区，每一个所述画素被区分成一第一子区和一第二子区；以及
    一第一栅极驱动电路与一第二栅极驱动电路，分别位于所述显示区外的 相对两侧，所述第一栅极驱动电路依据一第一信号输出一第一栅极驱动信号且分别通过所述多条第一栅极线驱动多个所述画素的多个所述第一子区，所述第二栅极驱动电路依据一第二信号输出一第二栅极驱动信号且分别通过所述多条第二栅极线驱动多个所述画素的多个所述第二子区，所述第一信号与所述第二信号的占空比不相同。
  11. 如权利要求10所述的显示装置，其中，所述第一栅极驱动电路包括一第一驱动元件，所述第二栅极驱动电路包括一第二驱动元件，所述第一驱动元件通过所述第一栅极线与所述画素的所述第一子区电连接，所述第二驱动元件通过所述第二栅极线与所述画素的所述第二子区电连接。
  12. 如权利要求11所述的显示装置，其中，所述第一驱动元件与所述第二驱动元件分别包括一移位缓存器。
  13. 如权利要求11所述的显示装置，其中，所述第一信号输入所述第一驱动元件，使所述第一驱动元件输出所述第一栅极驱动信号驱动所述画素的所述第一子区，所述第二信号输入所述第二驱动元件，使所述第二驱动元件输出所述第二栅极驱动信号驱动所述画素的所述第二子区。
  14. 如权利要求13所述的显示装置，其中，所述第一信号具有两个第一时脉，所述第二信号具有两个第二时脉，所述两个第一时脉依序导通两个相邻的所述第一驱动元件，所述两个第二时脉依序导通两个相邻的所述第二驱动元件。
  15. 如权利要求14所述的显示装置，其中，所述第一时脉和所述第二时脉的准位相同。
  16. 如权利要求10所述的显示装置，其中，所述第一子区包括一第一液晶电容，所述第二子区包括一第二液晶电容，当所述第一栅极驱动信号与所 述第二栅极驱动信号分别驱动所述画素的所述第一子区与所述第二子区时，一源极驱动信号分别施加于所述第一液晶电容与所述第二液晶电容。
  17. 如权利要求16所述的显示装置，其中，所述第一子区还包括一第一开关，所述第二子区还包括一第二开关，当所述第一栅极驱动信号导通所述第一开关且所述第二栅极驱动信号导通所述第二开关时，所述源极驱动信号使所述第一液晶电容与所述第二液晶电容的跨压不同。
  18. 如权利要求16所述的显示装置，其中，所述第一信号的占空比大于所述第二信号的准位，使得所述第一液晶电容的跨压高于所述第二液晶电容的跨压。
  19. 如权利要求10所述的显示装置，其为栅极在阵列(GOA)的液晶显示装置。
  20. 一种显示装置，包括：
    一开关阵列基板，具有一显示区，并包括多条第一栅极线、多条第二栅极线与多个画素，所述多个画素位于所述显示区，每一个所述画素被区分成一第一子区和一第二子区；以及
    一第一栅极驱动电路与一第二栅极驱动电路，分别位于所述显示区外的相对两侧，所述第一栅极驱动电路依据一第一信号输出一第一栅极驱动信号且分别通过所述多条第一栅极线驱动多个所述画素的多个所述第一子区，所述第二栅极驱动电路依据一第二信号输出一第二栅极驱动信号且分别通过所述多条第二栅极线驱动多个所述画素的多个所述第二子区，所述第一信号与所述第二信号的占空比不相同；
    其中，所述第一栅极驱动电路包括一第一驱动元件，所述第二栅极驱动电路包括一第二驱动元件，所述第一信号输入所述第一驱动元件，使所述第 一驱动元件输出所述第一栅极驱动信号驱动所述画素的所述第一子区，所述第二信号输入所述第二驱动元件，使所述第二驱动元件输出所述第二栅极驱动信号驱动所述画素的所述第二子区；
    所述第一子区包括一第一液晶电容，所述第二子区包括一第二液晶电容，当所述第一栅极驱动信号与所述第二栅极驱动信号分别驱动所述画素的所述第一子区与所述第二子区时，一源极驱动信号分别施加于所述第一液晶电容与所述第二液晶电容，使所述第一液晶电容与所述第二液晶电容的跨压不同。
PCT/CN2020/123130 2020-08-19 2020-10-23 显示装置及其驱动方法 WO2022036844A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202010836819.7 2020-08-19
CN202010836819.7A CN111916033A (zh) 2020-08-19 2020-08-19 显示装置及其驱动方法

Publications (1)

Publication Number Publication Date
WO2022036844A1 true WO2022036844A1 (zh) 2022-02-24

Family

ID=73279691

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/123130 WO2022036844A1 (zh) 2020-08-19 2020-10-23 显示装置及其驱动方法

Country Status (2)

Country Link
CN (1) CN111916033A (zh)
WO (1) WO2022036844A1 (zh)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101122697A (zh) * 2007-09-04 2008-02-13 友达光电股份有限公司 双边栅极驱动型的液晶显示器及其驱动方法
CN102074216A (zh) * 2010-12-08 2011-05-25 友达光电股份有限公司 液晶显示器及其面板的驱动方法
US20130235093A1 (en) * 2012-03-09 2013-09-12 Semiconductor Energy Laboratory Co., Ltd. Method for driving display device, display device, and electronic device
CN104808407A (zh) * 2015-05-07 2015-07-29 深圳市华星光电技术有限公司 Tft阵列基板
CN107516494A (zh) * 2017-07-21 2017-12-26 惠科股份有限公司 显示面板驱动装置、显示装置和显示面板的驱动方法
CN107909973A (zh) * 2017-09-21 2018-04-13 友达光电股份有限公司 液晶显示装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI350509B (en) * 2007-01-25 2011-10-11 Au Optronics Corp A driving method for liquid crystal display
CN101963728A (zh) * 2009-07-24 2011-02-02 瀚宇彩晶股份有限公司 液晶显示器
CN104880875B (zh) * 2015-06-02 2019-08-30 深圳市华星光电技术有限公司 一种阵列基板和液晶显示面板

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101122697A (zh) * 2007-09-04 2008-02-13 友达光电股份有限公司 双边栅极驱动型的液晶显示器及其驱动方法
CN102074216A (zh) * 2010-12-08 2011-05-25 友达光电股份有限公司 液晶显示器及其面板的驱动方法
US20130235093A1 (en) * 2012-03-09 2013-09-12 Semiconductor Energy Laboratory Co., Ltd. Method for driving display device, display device, and electronic device
CN104808407A (zh) * 2015-05-07 2015-07-29 深圳市华星光电技术有限公司 Tft阵列基板
CN107516494A (zh) * 2017-07-21 2017-12-26 惠科股份有限公司 显示面板驱动装置、显示装置和显示面板的驱动方法
CN107909973A (zh) * 2017-09-21 2018-04-13 友达光电股份有限公司 液晶显示装置

Also Published As

Publication number Publication date
CN111916033A (zh) 2020-11-10

Similar Documents

Publication Publication Date Title
CN101004520B (zh) 液晶显示器面板及其制造方法
US7602465B2 (en) In-plane switching mode liquid crystal display device
US10338445B2 (en) Pixel driving structure and liquid crystal display panel
US8411232B2 (en) Liquid crystal display with a reduced flexoelectric effect
KR100741894B1 (ko) 횡전계 방식 액정 표시 장치의 구동방법
US20140152938A1 (en) Liquid crystal display and method for manufacturing the same
US10002578B2 (en) Moving impurity ions in a liquid crystal display device
KR102020938B1 (ko) 액정표시장치
KR20050004661A (ko) 횡전계 방식 액정 표시 장치의 구동방법
US20090309867A1 (en) Method of driving pixels and display apparatus for performing the method
US11250799B2 (en) Display panel and display device suitable for low color cast display
US7271789B2 (en) Liquid crystal display panel and driving method therefor
KR101970800B1 (ko) 액정표시장치
TWI405014B (zh) 液晶顯示器及其驅動方法
US20240192534A1 (en) Display Device
US11054682B2 (en) Liquid crystal display device and driving method thereof
US7948595B2 (en) Liquid crystal display panel
US20060145988A1 (en) Active matrix liquid crystal display
KR101615765B1 (ko) 액정표시장치와 그 구동 방법
WO2022036844A1 (zh) 显示装置及其驱动方法
WO2022036845A1 (zh) 显示装置及其驱动方法
US8766888B2 (en) In plane switching mode liquid crystal display device
CN111381408B (zh) 一种像素阵列及其液晶面板
KR102076839B1 (ko) 액정표시장치
KR100710161B1 (ko) 횡전계형 액정 표시 장치

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20950048

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20950048

Country of ref document: EP

Kind code of ref document: A1