WO2022032989A1 - 基于arm架构的cpu降频系统、方法、装置和介质 - Google Patents

基于arm架构的cpu降频系统、方法、装置和介质 Download PDF

Info

Publication number
WO2022032989A1
WO2022032989A1 PCT/CN2021/073357 CN2021073357W WO2022032989A1 WO 2022032989 A1 WO2022032989 A1 WO 2022032989A1 CN 2021073357 W CN2021073357 W CN 2021073357W WO 2022032989 A1 WO2022032989 A1 WO 2022032989A1
Authority
WO
WIPO (PCT)
Prior art keywords
central processing
processing unit
frequency
control
power consumption
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2021/073357
Other languages
English (en)
French (fr)
Inventor
孙秀强
乔英良
孙良勇
班华堂
李勋堂
张炳会
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Wave Intelligent Technology Co Ltd
Original Assignee
Suzhou Wave Intelligent Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Wave Intelligent Technology Co Ltd filed Critical Suzhou Wave Intelligent Technology Co Ltd
Publication of WO2022032989A1 publication Critical patent/WO2022032989A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3243—Power saving in microcontroller unit
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3058—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3058—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations
    • G06F11/3062—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations where the monitored property is the power consumption

Definitions

  • the present invention relates to the technical field of servers, and in particular, to an ARM architecture-based CPU frequency reduction system, method, device and computer-readable storage medium.
  • the frequency of the central processing unit refers to the clock frequency of the CPU, which is simply the abbreviation of the operating frequency of the CPU (the number of synchronization pulses that occur in 1 second), and the unit is Hz (Hertz). Determines how fast the computer runs.
  • the traditional method is based on the frequency reduction processing of the CPU in the X86 architecture server, and does not involve the frequency reduction processing of the CPU under the ARM architecture. Due to different architectures, the CPU frequency reduction processing mechanism based on the X86 architecture server cannot be directly applied to the ARM architecture.
  • the purpose of the embodiments of the present invention is to provide a CPU frequency reduction system, method, device and computer-readable storage medium based on the ARM architecture, which can realize the frequency reduction processing of the CPU under the ARM architecture.
  • the embodiments of the present invention provide a CPU frequency reduction system based on an ARM architecture, including a baseboard management controller, a system control component and a central processing unit;
  • the general input and output ports of the baseboard management controller are connected to the frequency control pins of the central processing unit, and the baseboard management controller is used to transmit corresponding levels to the frequency control pins according to the received control instructions a signal to control the operating frequency of the central processing unit;
  • the control interface of the system control component is connected to the frequency control pin of the central processing unit, and the system control component is used to transmit the corresponding frequency control pin to the frequency control pin according to the acquired state parameters of the central processing unit. level signal to control the operating frequency of the central processing unit.
  • system control component is configured to transmit a corresponding level signal to the frequency control pin according to the temperature parameter transmitted by the temperature sensor, so as to control the operating frequency of the central processing unit.
  • the system control component is specifically used to judge whether the temperature parameter transmitted by the temperature sensor exceeds a preset upper limit value; when the temperature parameter exceeds the preset upper limit value, send the frequency control pin to the frequency control pin. Transmit low level signal.
  • system control component is further configured to count the duration that the temperature parameter transmitted by the temperature sensor is lower than the preset lower limit value; when the duration is greater than or equal to the preset time value, send the The frequency control pin transmits a high level signal.
  • the system control component is configured to calculate the power consumption value of the central processing unit according to the obtained voltage value and current value of the central processing unit;
  • the pins transmit corresponding level signals to control the operating frequency of the central processing unit.
  • the system control component is specifically configured to judge whether the power consumption value exceeds the power consumption limit recorded in the register; when the power consumption value exceeds the power consumption limit, send the The pin transmits a low level signal.
  • system control component is further configured to count the duration that the power consumption value is lower than the power consumption limit; when the duration is greater than or equal to a preset time value, send the The pin transmits a high level signal.
  • the baseboard management controller is specifically configured to display the CPU frequency reduction option through the BMC interface, when receiving the target frequency reduction option input by the user, according to the frequency reduction rule corresponding to the target frequency reduction option, to the The frequency control pin transmits the corresponding level signal.
  • the baseboard management controller is specifically configured to transmit a corresponding level signal to the frequency control pin according to the received IPMI command.
  • the embodiment of the present invention also provides a CPU frequency reduction method based on the ARM architecture, including:
  • a corresponding level signal is transmitted to the frequency control pin to control the operating frequency of the central processing unit.
  • the obtaining the state parameters of the central processing unit includes:
  • transmitting a corresponding level signal to the frequency control pin to control the operating frequency of the central processing unit includes:
  • transmitting a corresponding level signal to the frequency control pin to control the operating frequency of the central processing unit includes:
  • a corresponding level signal is transmitted to the frequency control pin to control the operating frequency of the central processing unit.
  • transmitting a corresponding level signal to the frequency control pin according to the power consumption value to control the operating frequency of the central processing unit includes:
  • the embodiment of the present invention also provides a CPU frequency reduction device based on an ARM architecture, including an acquisition unit and a control unit;
  • the acquisition unit is used to acquire the state parameters of the central processing unit; wherein, the control interface of the system control component is connected with the frequency control pin of the central processing unit;
  • the control unit is configured to transmit a corresponding level signal to the frequency control pin according to the state parameter, so as to control the operating frequency of the central processing unit.
  • the acquiring unit is specifically configured to acquire the temperature parameter transmitted by the temperature sensor.
  • control unit includes a judgment subunit and a transmission subunit
  • the judging subunit is used for judging whether the temperature parameter transmitted by the temperature sensor exceeds a preset upper limit value
  • the transmission subunit is configured to transmit a low-level signal to the frequency control pin when the temperature parameter exceeds a preset upper limit value.
  • it also includes a temperature statistics unit;
  • the temperature statistics unit is used to count the duration that the temperature parameter transmitted by the temperature sensor is lower than the preset lower limit value; when the duration is greater than or equal to the preset time value, trigger the control unit to send the The frequency control pin transmits a high level signal.
  • control unit includes a calculation subunit and a transmission subunit
  • the calculation subunit configured to calculate the power consumption value of the central processing unit according to the acquired voltage value and current value of the central processing unit;
  • the transmission sub-unit is configured to transmit a corresponding level signal to the frequency control pin according to the power consumption value, so as to control the operating frequency of the central processing unit.
  • the transmission subunit is specifically configured to judge whether the power consumption value exceeds the power consumption limit recorded in the register; when the power consumption value exceeds the power consumption limit, send the The pin transmits a low level signal.
  • it also includes a power consumption statistics unit
  • the power consumption statistics unit is configured to count the duration that the power consumption value is lower than the power consumption limit; when the duration is greater than or equal to a preset time value, trigger the control unit to report to the The frequency control pin transmits a high level signal.
  • Embodiments of the present invention further provide a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, implements the ARM architecture-based ARM architecture described in any of the above.
  • the steps of the CPU downclocking method are described in any of the above.
  • the CPU frequency reduction system based on the ARM architecture includes a baseboard management controller, a system control component and a central processing unit; the general input and output ports of the baseboard management controller and the frequency control of the central processing unit.
  • the baseboard management controller is used for transmitting a corresponding level signal to the frequency control pin according to the received control instruction, so as to control the operating frequency of the central processing unit.
  • the user can perform real-time dynamic frequency reduction processing on the central processing unit through the baseboard management controller according to the performance required by each software application in the current server.
  • the CPU frequency reduction system based on the ARM architecture is also provided with a system control component.
  • the control interface of the system control component is connected to the frequency control pin of the central processing unit. state parameters of the controller, and transmit the corresponding level signal to the frequency control pin to control the operating frequency of the central processing unit.
  • FIG. 1 is a schematic structural diagram of a CPU frequency reduction system based on an ARM architecture provided by an embodiment of the present invention
  • FIG. 2 is a schematic diagram of a hardware device connection relationship for multi-CPU frequency reduction processing provided by an embodiment of the present invention
  • FIG. 3 is a flowchart of a CPU frequency reduction method based on an ARM architecture provided by an embodiment of the present invention
  • FIG. 4 is a schematic structural diagram of a CPU frequency reduction device based on an ARM architecture provided by an embodiment of the present invention
  • FIG. 5 is a schematic diagram of a computer-readable storage medium according to an embodiment of the present invention.
  • FIG. 1 is a schematic structural diagram of a CPU frequency reduction system based on an ARM architecture provided by an embodiment of the present invention, and the system includes a baseboard management controller (Baseboard Management Controller, BMC) 11, a system control component (System Control Processor FW, SCP FW) ) 12 and a central processing unit (Central Processing Unit/Processor, CPU) 13.
  • BMC Baseboard Management Controller
  • SCP FW System Control Processor FW
  • CPU Central Processing Unit/Processor
  • the general input and output ports of the baseboard management controller 11 are connected to the frequency control pins of the central processing unit 13.
  • the baseboard management controller 11 is used to transmit corresponding level signals to the frequency control pins according to the received control instructions to control the The operating frequency of the central processing unit 13 .
  • the control interface of the system control unit 12 is connected to the frequency control pin of the central processing unit 13, and the system control unit 12 is used to transmit the corresponding level signal to the frequency control pin according to the acquired state parameters of the central processing unit 13 to control the frequency control pin.
  • the operating frequency of the central processing unit 13 is a predefined range of the central processing unit 13 .
  • the real-time dynamic adjustment of the operating frequency of the central processing unit 13 can be realized by setting the baseboard management controller 11 .
  • the baseboard management controller 11 can control the operating frequency of the central processing unit 13 by means of a CPU frequency reduction option or an IPMI (Intelligent Platform Management Interface, intelligent platform management interface) command.
  • IPMI Intelligent Platform Management Interface, intelligent platform management interface
  • the CPU frequency reduction option can be developed on the BMC web (web page) interface, and the general frequency control pin (HIGHTEMP pin) of the central processing unit 13 can be controlled through a soft link.
  • the high and low state of the input and output ports (General-purpose input/output, GPIO).
  • the options for CPU frequency reduction may include “trigger CPU frequency reduction” and “close CPU frequency reduction”.
  • the user can select the corresponding CPU frequency reduction option according to the performance required by each software application in the current server.
  • the CPU frequency reduction option selected by the user may be referred to as a target frequency reduction option.
  • the baseboard management controller 11 displays the CPU frequency reduction option through the BMC interface, and when receiving the target frequency reduction option input by the user, transmits a corresponding level signal to the frequency control pin according to the frequency reduction rule corresponding to the target frequency reduction option.
  • the user can select the CPU frequency reduction option of "trigger CPU frequency reduction".
  • the baseboard management controller 11 can pull down the general input and output ports. , to realize the frequency reduction processing of the central processing unit 13 .
  • the power consumption of the data center can be saved, and the operation cost of the data center can be reduced.
  • the user can select the CPU frequency reduction option of “close CPU frequency reduction”. Down-frequency processing of the central processing unit 13 . By turning off the frequency reduction processing of the central processing unit 13, the efficient operation of the central processing unit 13 can be ensured, thereby meeting the performance required by the software application.
  • the OEM (Original Equipment Manufacturer) command parameters can be set to set the status of the general input and output ports linked by the baseboard management controller 11 and the frequency control pins to high and low.
  • the user can input the corresponding IPMI command to the baseboard management controller 11 according to the performance required by each software application in the current server, and the baseboard management controller 11 transmits the corresponding level signal to the frequency control pin according to the received IPMI command.
  • the baseboard management controller 11 may implement a frequency reduction operation on the central processing unit 13 by pulling down the input and output ports.
  • the baseboard management controller 11 can turn off the frequency reduction operation of the central processing unit 13 by pulling up the input and output ports.
  • the form of the IPMI command may be as follows:
  • the baseboard management controller 11 may implement real-time dynamic frequency reduction processing on the central processing unit 13 depending on the performance requirements of each software application.
  • the frequency reduction processing of the central processing unit 13 can be implemented by the system control unit 12 according to the state parameters of the central processing unit 13 itself.
  • the state parameters of the central processing unit 13 itself may include a temperature parameter and a power consumption value.
  • the system control unit 12 may transmit a corresponding level signal to the frequency control pin according to the temperature parameter transmitted by the temperature sensor to control the operating frequency of the central processing unit 13 .
  • a corresponding upper limit value may be set for the temperature parameter, and the system control component 12 may determine whether the temperature parameter transmitted by the temperature sensor exceeds a preset upper limit value.
  • the system control component 12 may determine whether the temperature parameter transmitted by the temperature sensor exceeds a preset upper limit value.
  • the temperature parameter exceeds the preset upper limit value it means that the current temperature of the central processing unit 13 is too high, and a frequency reduction operation needs to be performed on the central processing unit 13 to reduce the temperature of the central processing unit 13 . Therefore, when the system control unit 12 determines that the temperature parameter transmitted by the temperature sensor exceeds the preset upper limit value, it transmits a low-level signal to the frequency control pin, thereby controlling the central processing unit 13 to perform frequency reduction.
  • the temperature value of the central processing unit 13 is a variable, and the temperature value of the central processing unit 13 can be lowered by performing frequency reduction of the central processing unit 13 .
  • the frequency reduction operation of the central processing unit 13 can be turned off at this time.
  • the system control component 12 can count the duration of time when the temperature parameter transmitted by the temperature sensor is lower than the preset lower limit value; when the duration is greater than or equal to the preset time value, transmit a high level to the frequency control pin signal, thereby turning off the frequency reduction operation of the central processing unit 13.
  • the system control unit 12 can timely control the central processing unit 13 to perform a frequency reduction operation when the temperature of the central processing unit 13 is too high, so as to avoid the temperature of the central processing unit 13 from being overheated. high cause damage.
  • the system control unit 12 can calculate the power consumption value of the central processing unit 13 according to the obtained voltage value and current value of the central processing unit 13; level signal to control the operating frequency of the central processing unit 13 .
  • a corresponding power consumption limit value can be set for the power consumption value, and the system control unit 12 can determine whether the power consumption value exceeds the power consumption limit value recorded in the register; when the power consumption value exceeds the power consumption limit value, then It means that the current power consumption of the central processing unit 13 is too high, and a frequency reduction operation needs to be performed on the central processing unit 13 to reduce the power consumption of the central processing unit 13 . Therefore, when the system control unit 12 determines that the power consumption value exceeds the power consumption limit, it transmits a low-level signal to the frequency control pin, thereby controlling the central processing unit 13 to reduce the frequency.
  • the power consumption value of the central processing unit 13 is a variable, and the power consumption value of the central processing unit 13 can be reduced by performing frequency reduction of the central processing unit 13 .
  • the frequency reduction operation of the central processing unit 13 can be turned off at this time.
  • the system control unit 12 can count the duration when the power consumption value is lower than the power consumption limit; when the duration is greater than or equal to the preset time value, transmit a high-level signal to the frequency control pin.
  • the system control unit 12 can timely control the central processing unit 13 to perform a frequency reduction operation when the power consumption of the central processing unit 13 is too high, so as to avoid the central processing unit 13 Excessive power consumption results in poor performance.
  • the number of central processing units 13 connected to the baseboard management controller 11 and the system control unit 12 may be multiple.
  • FIG. 2 Schematic diagram of the relationship.
  • n CPUs are taken as an example, which are respectively CPU0-CPUn, CPU0-CPUn are central processing units 13, BMC is baseboard management controller 11, and SCP FW is system control unit 12.
  • the BMC can be connected to one CPU through one GPIO pin, and there can be multiple GPIO pins connected to the frequency control pin of the CPU on the BMC. Therefore, one BMC can be connected to multiple CPUs at the same time, thereby realizing a multi-to-multiple connection.
  • the CPU frequency reduction system based on the ARM architecture includes a baseboard management controller, a system control component and a central processing unit; the general input and output ports of the baseboard management controller and the frequency control of the central processing unit.
  • the baseboard management controller is used for transmitting a corresponding level signal to the frequency control pin according to the received control instruction, so as to control the operating frequency of the central processing unit.
  • the user can perform real-time dynamic frequency reduction processing on the central processing unit through the baseboard management controller according to the performance required by each software application in the current server.
  • the CPU frequency reduction system based on the ARM architecture is also provided with a system control component.
  • the control interface of the system control component is connected to the frequency control pin of the central processing unit. state parameters of the controller, and transmit the corresponding level signal to the frequency control pin to control the operating frequency of the central processing unit.
  • FIG. 3 is a flowchart of a method for reducing the frequency of a CPU based on an ARM architecture provided by an embodiment of the present invention, and the method includes:
  • S301 Acquire state parameters of the central processing unit.
  • the frequency reduction processing of the central processing unit may be implemented by the system control component according to the state parameters of the central processing unit.
  • the control interface of the system control component is connected with the frequency control pin of the central processing unit.
  • the state parameters of the central processing unit itself may include temperature parameters and power consumption values.
  • the system control component can transmit a corresponding level signal to the frequency control pin according to the temperature parameter transmitted by the temperature sensor to control the operating frequency of the central processing unit.
  • a corresponding upper limit value may be set for the temperature parameter, and the system control component may determine whether the temperature parameter transmitted by the temperature sensor exceeds the preset upper limit value.
  • the system control component may determine whether the temperature parameter transmitted by the temperature sensor exceeds the preset upper limit value.
  • the system control unit determines that the temperature parameter transmitted by the temperature sensor exceeds the preset upper limit value, it transmits a low-level signal to the frequency control pin, thereby controlling the central processing unit to reduce the frequency.
  • the temperature value of the central processing unit is a variable, and the temperature value of the central processing unit can be lowered by reducing the frequency of the central processing unit.
  • the frequency reduction operation for the central processing unit can be turned off at this time.
  • the system control component can count the duration that the temperature parameter transmitted by the temperature sensor is lower than the preset lower limit value; when the duration is greater than or equal to the preset time value, a high-level signal is transmitted to the frequency control pin , thereby turning off the underclocking of the CPU.
  • the system control component can timely control the central processing unit to perform a frequency reduction operation when the temperature of the central processing unit is too high, so as to avoid damage caused by the high temperature of the central processing unit.
  • the system control component can calculate the power consumption value of the central processing unit according to the obtained voltage value and current value of the central processing unit; to control the operating frequency of the central processing unit.
  • the corresponding power consumption limit can be set for the power consumption value, and the system control component can determine whether the power consumption value exceeds the power consumption limit recorded in the register; when the power consumption value exceeds the power consumption limit, the The current power consumption of the central processing unit is too high, and it is necessary to perform a frequency reduction operation on the central processing unit to reduce the power consumption of the central processing unit. Therefore, when the system control unit determines that the power consumption value exceeds the power consumption limit, it transmits a low-level signal to the frequency control pin, thereby controlling the central processing unit to reduce the frequency.
  • the power consumption value of the central processing unit is a variable, and the power consumption value of the central processing unit can be reduced by performing frequency reduction of the central processing unit.
  • the frequency reduction operation of the central processing unit can be turned off at this time.
  • the system control component can count the duration when the power consumption value is lower than the power consumption limit; when the duration is greater than or equal to the preset time value, it transmits a high-level signal to the frequency control pin.
  • the system control component can timely control the central processing unit to perform a frequency reduction operation when the power consumption of the central processing unit is too high, so as to avoid the high power consumption of the central processing unit caused by excessive power consumption. Poor performance.
  • control interface of the system control component is connected to the frequency control pin of the central processing unit, and the system control component can obtain the state parameter of the central processing unit, and transmit the corresponding frequency control pin to the frequency control pin according to the state parameter. level signal to control the operating frequency of the central processing unit.
  • the system control component can realize the frequency reduction processing of the central processing unit according to the state parameters of the central processing unit.
  • FIG. 4 is a schematic structural diagram of an ARM architecture-based CPU frequency reduction device provided by an embodiment of the present invention, including an acquisition unit 41 and a control unit 42;
  • the obtaining unit 41 is used to obtain the state parameter of the central processing unit; wherein, the control interface of the system control component is connected with the frequency control pin of the central processing unit;
  • the control unit 42 is used for transmitting a corresponding level signal to the frequency control pin according to the state parameter, so as to control the running frequency of the central processing unit.
  • the acquiring unit is specifically configured to acquire the temperature parameter transmitted by the temperature sensor.
  • control unit includes a judgment subunit and a transmission subunit
  • a judging subunit used for judging whether the temperature parameter transmitted by the temperature sensor exceeds the preset upper limit value
  • the transmission subunit is used to transmit a low-level signal to the frequency control pin when the temperature parameter exceeds the preset upper limit value.
  • it also includes a temperature statistics unit;
  • the temperature statistics unit is used to count the duration that the temperature parameter transmitted by the temperature sensor is lower than the preset lower limit value; when the duration is greater than or equal to the preset time value, the control unit is triggered to transmit a high-level signal to the frequency control pin .
  • control unit includes a calculation subunit and a transmission subunit
  • a calculation sub-unit for calculating the power consumption value of the central processing unit according to the obtained voltage value and current value of the central processing unit;
  • the transmission sub-unit is used for transmitting the corresponding level signal to the frequency control pin according to the power consumption value, so as to control the operating frequency of the central processing unit.
  • the transmission subunit is specifically used to judge whether the power consumption value exceeds the power consumption limit recorded in the register; when the power consumption value exceeds the power consumption limit, transmit a low-level signal to the frequency control pin.
  • it also includes a power consumption statistics unit
  • the power consumption statistics unit is used to count the duration when the power consumption value is lower than the power consumption limit; when the duration is greater than or equal to the preset time value, the control unit is triggered to transmit a high-level signal to the frequency control pin.
  • control interface of the system control component is connected to the frequency control pin of the central processing unit, and the system control component can obtain the state parameter of the central processing unit, and transmit the corresponding frequency control pin to the frequency control pin according to the state parameter. level signal to control the operating frequency of the central processing unit.
  • the system control component can realize the frequency reduction processing of the central processing unit according to the state parameters of the central processing unit.
  • An embodiment of the present invention further provides a computer-readable storage medium 5.
  • a computer program 51 is stored on the computer-readable storage medium 5.
  • the computer program 51 When the computer program 51 is executed by a processor, it can be implemented as in any of the foregoing embodiments.
  • a software module can be placed in random access memory (RAM), internal memory, read only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other in the technical field. in any other known form of storage medium.
  • RAM random access memory
  • ROM read only memory
  • electrically programmable ROM electrically erasable programmable ROM
  • registers hard disk, removable disk, CD-ROM, or any other in the technical field. in any other known form of storage medium.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Quality & Reliability (AREA)
  • Power Sources (AREA)

Abstract

本发明实施例公开了一种基于ARM架构的CPU降频系统、方法、装置和介质，基板管理控制器的通用输入输出口与中央处理器的控频引脚连接，依据接收到的控制指令向控频引脚传输相应的电平信号，以控制中央处理器的运行频率。用户根据当前服务器中各软件应用所需的性能，通过基板管理控制器对中央处理器进行实时动态的降频处理。系统控制部件的控制接口与中央处理器的控频引脚连接，依据获取的中央处理器的状态参数，向控频引脚传输相应的电平信号，以控制中央处理器的运行频率。通过基板管理控制器和系统控制部件，既可以依赖于各软件应用的性能需求实现对中央处理器的降频处理，又可以根据中央处理器自身的状态参数实现对中央处理器的降频处理。

Description

基于ARM架构的CPU降频系统、方法、装置和介质
本申请要求于2020年08月13日提交中国国家知识产权局，申请号为202010813290.7，发明名称为“基于ARM架构的CPU降频系统、方法、装置和介质”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及服务器技术领域，特别是涉及一种基于ARM架构的CPU降频系统、方法、装置和计算机可读存储介质。
背景技术
中央处理器(Central Processing Unit，CPU)的频率指的是CPU的时钟频率，简单说是CPU运算时的工作频率(1秒内发生的同步脉冲数)的简称，单位是Hz(赫兹)，它决定计算机的运行速度。
随着市场发展，存储数据中心、控制中心、计算中心和网络中心等多样终端出现带来了多样的需求，尤其是云需求给新入局者创造了很多机会。无论是提供云服务的厂商还是数据中心的运营方，最关注的还是如何使得自身利益最大化，这是ARM(Advanced RISC  Machines，高级精简指令集机器)架构重新获得进入服务器市场机会的一个重要原因。有用户在评测基于ARM架构搭建的服务器和传统X86架构(微处理器执行的计算机语言指令集)服务器时，已经发现ARM架构的计算性能表现十分逼近X86架构了，这一点让ARM的最大短板得到了弥补。
但是传统方式中，都是基于X86架构服务器中CPU的降频处理，并不涉及ARM架构下CPU的降频处理。由于架构的不同，基于X86架构服务器的CPU降频处理机制并不能直接应用于ARM架构。
可见，如何实现ARM架构下CPU的降频处理，是本领域技术人员需要解决的问题。
发明内容
本发明实施例的目的是提供一种基于ARM架构的CPU降频系统、方法、装置和计算机可读存储介质，可以实现ARM架构下CPU的降频处理。
为解决上述技术问题，本发明实施例提供一种基于ARM架构的CPU降频系统，包括基板管理控制器、系统控制部件和中央处理器；
所述基板管理控制器的通用输入输出口与所述中央处理器的控 频引脚连接，所述基板管理控制器用于依据接收到的控制指令，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率；
所述系统控制部件的控制接口与所述中央处理器的控频引脚连接，所述系统控制部件用于依据获取的所述中央处理器的状态参数，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率。
可选地，所述系统控制部件用于依据温度传感器传输的温度参数，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率。
可选地，所述系统控制部件具体用于判断所述温度传感器传输的温度参数是否超过预设上限值；当所述温度参数超过预设上限值时，则向所述控频引脚传输低电平信号。
可选地，所述系统控制部件还用于统计所述温度传感器传输的温度参数低于预设下限值的持续时间；当所述持续时间大于或等于预设时间值时，则向所述控频引脚传输高电平信号。
可选地，所述系统控制部件用于根据获取的所述中央处理器的电压值和电流值，计算所述中央处理器的功耗值；依据所述功耗值，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频 率。
可选地，所述系统控制部件具体用于判断所述功耗值是否超过寄存器中记录的功耗限值；当所述功耗值超过所述功耗限值时，则向所述控频引脚传输低电平信号。
可选地，所述系统控制部件还用于统计所述功耗值低于所述功耗限值的持续时间；当所述持续时间大于或等于预设时间值时，则向所述控频引脚传输高电平信号。
可选地，所述基板管理控制器具体用于通过BMC界面展示CPU降频选项，当接收到用户输入的目标降频选项时，根据所述目标降频选项对应的降频规则，向所述控频引脚传输相应的电平信号。
可选地，所述基板管理控制器具体用于依据接收到的IPMI命令，向所述控频引脚传输相应的电平信号。
本发明实施例还提供了一种基于ARM架构的CPU降频方法，包括：
获取中央处理器的状态参数；其中，系统控制部件的控制接口与所述中央处理器的控频引脚连接；
依据所述状态参数，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率。
可选地，所述获取中央处理器的状态参数包括：
获取温度传感器传输的温度参数。
可选地，所述依据所述状态参数，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率包括：
判断所述温度传感器传输的温度参数是否超过预设上限值；
当所述温度参数超过预设上限值时，则向所述控频引脚传输低电平信号。
可选地，还包括：
统计所述温度传感器传输的温度参数低于预设下限值的持续时间；
当所述持续时间大于或等于预设时间值时，则向所述控频引脚传输高电平信号。
可选地，所述依据所述状态参数，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率包括：
根据获取的所述中央处理器的电压值和电流值，计算所述中央处理器的功耗值；
依据所述功耗值，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率。
可选地，所述依据所述功耗值，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率包括：
判断所述功耗值是否超过寄存器中记录的功耗限值；
当所述功耗值超过所述功耗限值时，则向所述控频引脚传输低电平信号。
可选地，还包括：
统计所述功耗值低于所述功耗限值的持续时间；
当所述持续时间大于或等于预设时间值时，则向所述控频引脚传输高电平信号。
本发明实施例还提供了一种基于ARM架构的CPU降频装置，包括获取单元和控制单元；
所述获取单元，用于获取中央处理器的状态参数；其中，系统控制部件的控制接口与所述中央处理器的控频引脚连接；
所述控制单元，用于依据所述状态参数，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率。
可选地，所述获取单元具体用于获取温度传感器传输的温度参数。
可选地，所述控制单元包括判断子单元和传输子单元；
所述判断子单元，用于判断所述温度传感器传输的温度参数是否超过预设上限值；
所述传输子单元，用于当所述温度参数超过预设上限值时，则向所述控频引脚传输低电平信号。
可选地，还包括温度统计单元；
所述温度统计单元，用于统计所述温度传感器传输的温度参数低于预设下限值的持续时间；当所述持续时间大于或等于预设时间值时，则触发所述控制单元向所述控频引脚传输高电平信号。
可选地，所述控制单元包括计算子单元和传输子单元；
所述计算子单元，用于根据获取的所述中央处理器的电压值和电流值，计算所述中央处理器的功耗值；
所述传输子单元，用于依据所述功耗值，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率。
可选地，所述传输子单元具体用于判断所述功耗值是否超过寄存器中记录的功耗限值；当所述功耗值超过所述功耗限值时，则向所述控频引脚传输低电平信号。
可选地，还包括功耗统计单元；
所述功耗统计单元，用于统计所述功耗值低于所述功耗限值的持 续时间；当所述持续时间大于或等于预设时间值时，则触发所述控制单元向所述控频引脚传输高电平信号。
本发明实施例还提供了一种计算机可读存储介质，所述计算机可读存储介质上存储有计算机程序，所述计算机程序被处理器执行时实现如上述任一项所述的基于ARM架构的CPU降频方法的步骤。
由上述技术方案可以看出，基于ARM架构的CPU降频系统包括基板管理控制器、系统控制部件和中央处理器；所述基板管理控制器的通用输入输出口与所述中央处理器的控频引脚连接，所述基板管理控制器用于依据接收到的控制指令，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率。通过设置基板管理控制器，使得用户可以根据当前服务器中各软件应用所需的性能，通过基板管理控制器对中央处理器进行实时动态的降频处理。基于ARM架构的CPU降频系统除了设置基板管理控制器外，还设置了系统控制部件，系统控制部件的控制接口与中央处理器的控频引脚连接，系统控制部件用于依据获取的中央处理器的状态参数，向控频引脚传输相应的电平信号，以控制中央处理器的运行频率。在该技术方案中，通过设置基板管理控制器和系统控制部件，既可以依赖于各软件应用的性能需求实现对中央处理器的实时动态的降频处理，又可以根据中央处理器 自身的状态参数，实现对中央处理器的降频处理。
附图说明
为了更清楚地说明本发明实施例，下面将对实施例中所需要使用的附图做简单的介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例提供的一种基于ARM架构的CPU降频系统的结构示意图；
图2为本发明实施例提供的一种多CPU降频处理的硬件设备连接关系的示意图；
图3为本发明实施例提供的一种基于ARM架构的CPU降频方法的流程图；
图4为本发明实施例提供的一种基于ARM架构的CPU降频装置的结构示意图；
图5为本发明实施例提供的一种计算机可读存储介质的示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下，所获得的所有其他实施例，都属于本发明保护范围。
为了使本技术领域的人员更好地理解本发明方案，下面结合附图和具体实施方式对本发明作进一步的详细说明。
接下来，详细介绍本发明实施例所提供的一种基于ARM架构的CPU降频系统。图1为本发明实施例提供的一种基于ARM架构的CPU降频系统的结构示意图，该系统包括基板管理控制器(Baseboard Management Controller，BMC)11、系统控制部件(System Control Processor FW，SCP FW)12和中央处理器(Central Processing Unit/Processor，CPU)13。
基板管理控制器11的通用输入输出口与中央处理器13的控频引脚连接，基板管理控制器11用于依据接收到的控制指令，向控频引脚传输相应的电平信号，以控制中央处理器13的运行频率。
系统控制部件12的控制接口与中央处理器13的控频引脚连接，系统控制部件12用于依据获取的中央处理器13的状态参数，向控频 引脚传输相应的电平信号，以控制中央处理器13的运行频率。
在本发明实施例中，通过设置基板管理控制器11可以实现对中央处理器13运行频率的实时动态调整。
在实际应用中，基板管理控制器11可以通过CPU降频选项或者IPMI(Intelligent Platform Management Interface，智能平台管理接口)命令的方式实现对中央处理器13运行频率的控制。
以CPU降频选项为例，在具体实现中，可以在BMC web(网页)界面开发CPU降频选项，通过软链接的方式控制与中央处理器13的控频引脚(HIGHTEMP pin)链接的通用输入输出口(General-purpose input/output，GPIO)的高低状态。
其中，CPU降频选项可以包括“触发CPU降频”和“关闭CPU降频”。
用户可以根据当前服务器中各软件应用所需的性能，选择相应的CPU降频选项。在本发明实施例中，可以将用户选定的CPU降频选项称作目标降频选项。基板管理控制器11通过BMC界面展示CPU降频选项，当接收到用户输入的目标降频选项时，根据目标降频选项对应的降频规则，向控频引脚传输相应的电平信号。
举例说明，当前服务器中各软件应用所需的性能较低时，用户可 以选择“触发CPU降频”这个CPU降频选项，此时，基板管理控制器11可以对通用输入输出口进行拉低处理，实现中央处理器13的降频处理。通过对中央处理器13进行降频处理，可以节约数据中心的耗电量，降低数据中心的运营成本。
当前服务器中各软件应用所需的性能较高时，用户可以选择“关闭CPU降频”这个CPU降频选项，此时，基板管理控制器11可以对通用输入输出口进行拉高处理，从而关闭对中央处理器13的降频处理。通过关闭对中央处理器13的降频处理，可以保证中央处理器13的高效运行，从而满足软件应用所需的性能。
以IPMI命令为例，在具体实现中，可以设置OEM(Original Equipment Manufacturer，原始设备制造商)命令参数，将基板管理控制器11与控频引脚链接的通用输入输出口状态进行高低设置。用户可以根据当前服务器中各软件应用所需的性能，向基板管理控制器11输入相应的IPMI命令，基板管理控制器11依据接收到的IPMI命令，向控频引脚传输相应的电平信号。
在实际应用中，基板管理控制器11可以通过拉低输入输出口的方式，实现对中央处理器13的降频操作。基板管理控制器11可以通过 拉高输入输出口的方式，关闭对中央处理器13的降频操作。
在本发明实施例中，IPMI命令的形式可以如下：
“ipmitool-I lanplus-H bmcip-U admin-P admin raw 0x3c 0x04 0x05 0x00”：用于触发CPU降频机制；
“ipmitool-I lanplus-H bmcip-U admin-P admin raw 0x3c 0x04 0x05 0x01”：用于指示关闭CPU降频机制。
上述IPMI命令中“0x05”表示的是基板管理控制器11的输入输出口GPIO5；“0x00”表示设置GPIO5为低；“0x01”表示设置GPIO5为高。
在本发明实施例中，可以依赖于各软件应用的性能需求，通过基板管理控制器11实现对中央处理器13的实时动态的降频处理。与此同时，可以根据中央处理器13自身的状态参数，通过系统控制部件12实现对中央处理器13的降频处理。
在本发明实施例中，中央处理器13自身的状态参数可以包括温度参数和功耗值。
以温度参数为例，系统控制部件12可以依据温度传感器传输的温度参数，向控频引脚传输相应的电平信号，以控制中央处理器13 的运行频率。
在具体实现中，可以对温度参数设置对应的上限值，系统控制部件12可以判断温度传感器传输的温度参数是否超过预设上限值。当温度参数超过预设上限值时，则说明中央处理器13的当前温度过高，需要对中央处理器13执行降频操作，来降低中央处理器13的温度。因此，当系统控制部件12判断出温度传感器传输的温度参数超过预设上限值时，则向控频引脚传输低电平信号，从而控制中央处理器13进行降频。
中央处理器13的温度值属于变量，通过对中央处理器13执行降频，可以降低中央处理器13的温度值。当中央处理器13的温度值恢复至正常状态下的温度值时，此时可以关闭对中央处理器13的降频操作。
在具体实现中，系统控制部件12可以统计温度传感器传输的温度参数低于预设下限值的持续时间；当持续时间大于或等于预设时间值时，则向控频引脚传输高电平信号，从而关闭对中央处理器13的降频操作。
在本发明实施例中，系统控制部件12通过检测中央处理器13的温度值，可以在中央处理器13温度过高时，及时控制中央处理器13 执行降频操作，避免中央处理器13温度过高导致损坏。
以功耗值为例，系统控制部件12可以根据获取的中央处理器13的电压值和电流值，计算中央处理器13的功耗值；依据功耗值，向控频引脚传输相应的电平信号，以控制中央处理器13的运行频率。
在具体实现中，可以对功耗值设置对应的功耗限值，系统控制部件12可以判断功耗值是否超过寄存器中记录的功耗限值；当功耗值超过功耗限值时，则说明中央处理器13的当前功耗过高，需要对中央处理器13执行降频操作，来降低中央处理器13的功耗。因此，当系统控制部件12判断出功耗值超过功耗限值时，则向控频引脚传输低电平信号，从而控制中央处理器13进行降频。
中央处理器13的功耗值属于变量，通过对中央处理器13执行降频，可以降低中央处理器13的功耗值。当中央处理器13的功耗值恢复至正常状态下的功耗值时，此时可以关闭对中央处理器13的降频操作。
在具体实现中，系统控制部件12可以统计功耗值低于功耗限值的持续时间；当持续时间大于或等于预设时间值时，则向控频引脚传输高电平信号。
在本发明实施例中，系统控制部件12通过计算中央处理器13的 功耗值，可以在中央处理器13功耗过高时，及时控制中央处理器13执行降频操作，避免中央处理器13功耗过高导致性能低下。
在本发明实施例中，基板管理控制器11和系统控制部件12所连接的中央处理器13的个数可以为多个，可以参见图2所示的一种多CPU降频处理的硬件设备连接关系的示意图。图2中是以n个CPU为例，分别为CPU0-CPUn，CPU0-CPUn均为中央处理器13，BMC为基板管理控制器11，SCP FW为系统控制部件12。BMC可以通过一个GPIO引脚实现与一个CPU的连接，BMC上实现与CPU的控频引脚连接的GPIO引脚可以有多个，因此，一个BMC可以同时与多个CPU连接，从而实现对多个CPU的批量降频处理。同理，SCP FW的控制接口可以有多个，一个SCP FW可以同时与多个CPU连接，从而实现对多个CPU的批量降频处理。通过将一个BMC同时与多个CPU连接，可以通过BMC实现对多个CPU的批量降频处理。同理，通过将一个SCP FW同时与多个CPU连接，可以通过一个SCP FW实现对多个CPU的批量降频处理。
由上述技术方案可以看出，基于ARM架构的CPU降频系统包括基板管理控制器、系统控制部件和中央处理器；所述基板管理控制器的通用输入输出口与所述中央处理器的控频引脚连接，所述基板管理 控制器用于依据接收到的控制指令，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率。通过设置基板管理控制器，使得用户可以根据当前服务器中各软件应用所需的性能，通过基板管理控制器对中央处理器进行实时动态的降频处理。基于ARM架构的CPU降频系统除了设置基板管理控制器外，还设置了系统控制部件，系统控制部件的控制接口与中央处理器的控频引脚连接，系统控制部件用于依据获取的中央处理器的状态参数，向控频引脚传输相应的电平信号，以控制中央处理器的运行频率。在该技术方案中，通过设置基板管理控制器和系统控制部件，既可以依赖于各软件应用的性能需求实现对中央处理器的实时动态的降频处理，又可以根据中央处理器自身的状态参数，实现对中央处理器的降频处理。
图3为本发明实施例提供的一种基于ARM架构的CPU降频方法的流程图，该方法包括：
S301：获取中央处理器的状态参数。
在本发明实施例中，可以根据中央处理器自身的状态参数，通过系统控制部件实现对中央处理器的降频处理。其中，系统控制部件的控制接口与中央处理器的控频引脚连接。
S302：依据状态参数，向控频引脚传输相应的电平信号，以控制 中央处理器的运行频率。
中央处理器自身的状态参数可以包括温度参数和功耗值。
以温度参数为例，系统控制部件可以依据温度传感器传输的温度参数，向控频引脚传输相应的电平信号，以控制中央处理器的运行频率。
在具体实现中，可以对温度参数设置对应的上限值，系统控制部件可以判断温度传感器传输的温度参数是否超过预设上限值。当温度参数超过预设上限值时，则说明中央处理器的当前温度过高，需要对中央处理器执行降频操作，来降低中央处理器的温度。因此，当系统控制部件判断出温度传感器传输的温度参数超过预设上限值时，则向控频引脚传输低电平信号，从而控制中央处理器进行降频。
中央处理器的温度值属于变量，通过对中央处理器执行降频，可以降低中央处理器的温度值。当中央处理器的温度值恢复至正常状态下的温度值时，此时可以关闭对中央处理器的降频操作。
在具体实现中，系统控制部件可以统计温度传感器传输的温度参数低于预设下限值的持续时间；当持续时间大于或等于预设时间值时，则向控频引脚传输高电平信号，从而关闭对中央处理器的降频操作。
在本发明实施例中，系统控制部件通过检测中央处理器的温度 值，可以在中央处理器温度过高时，及时控制中央处理器执行降频操作，避免中央处理器温度过高导致损坏。
以功耗值为例，系统控制部件可以根据获取的中央处理器的电压值和电流值，计算中央处理器的功耗值；依据功耗值，向控频引脚传输相应的电平信号，以控制中央处理器的运行频率。
在具体实现中，可以对功耗值设置对应的功耗限值，系统控制部件可以判断功耗值是否超过寄存器中记录的功耗限值；当功耗值超过功耗限值时，则说明中央处理器的当前功耗过高，需要对中央处理器执行降频操作，来降低中央处理器的功耗。因此，当系统控制部件判断出功耗值超过功耗限值时，则向控频引脚传输低电平信号，从而控制中央处理器进行降频。
中央处理器的功耗值属于变量，通过对中央处理器执行降频，可以降低中央处理器的功耗值。当中央处理器的功耗值恢复至正常状态下的功耗值时，此时可以关闭对中央处理器的降频操作。
在具体实现中，系统控制部件可以统计功耗值低于功耗限值的持续时间；当持续时间大于或等于预设时间值时，则向控频引脚传输高电平信号。
在本发明实施例中，系统控制部件通过计算中央处理器的功耗 值，可以在中央处理器功耗过高时，及时控制中央处理器执行降频操作，避免中央处理器功耗过高导致性能低下。
由上述技术方案可以看出，系统控制部件的控制接口与中央处理器的控频引脚连接，系统控制部件可以获取中央处理器的状态参数，依据该状态参数，向控频引脚传输相应的电平信号，以控制中央处理器的运行频率。在该技术方案中，系统控制部件可以根据中央处理器自身的状态参数，实现对中央处理器的降频处理。
图4为本发明实施例提供的一种基于ARM架构的CPU降频装置的结构示意图，包括获取单元41和控制单元42；
获取单元41，用于获取中央处理器的状态参数；其中，系统控制部件的控制接口与中央处理器的控频引脚连接；
控制单元42，用于依据状态参数，向控频引脚传输相应的电平信号，以控制中央处理器的运行频率。
可选地，获取单元具体用于获取温度传感器传输的温度参数。
可选地，控制单元包括判断子单元和传输子单元；
判断子单元，用于判断温度传感器传输的温度参数是否超过预设上限值；
传输子单元，用于当温度参数超过预设上限值时，则向控频引脚传输低电平信号。
可选地，还包括温度统计单元；
温度统计单元，用于统计温度传感器传输的温度参数低于预设下限值的持续时间；当持续时间大于或等于预设时间值时，则触发控制单元向控频引脚传输高电平信号。
可选地，控制单元包括计算子单元和传输子单元；
计算子单元，用于根据获取的中央处理器的电压值和电流值，计算中央处理器的功耗值；
传输子单元，用于依据功耗值，向控频引脚传输相应的电平信号，以控制中央处理器的运行频率。
可选地，传输子单元具体用于判断功耗值是否超过寄存器中记录的功耗限值；当功耗值超过功耗限值时，则向控频引脚传输低电平信号。
可选地，还包括功耗统计单元；
功耗统计单元，用于统计功耗值低于功耗限值的持续时间；当持续时间大于或等于预设时间值时，则触发控制单元向控频引脚传输高电平信号。
图4所对应实施例中特征的说明可以参见图3所对应实施例的相关说明，这里不再一一赘述。
由上述技术方案可以看出，系统控制部件的控制接口与中央处理器的控频引脚连接，系统控制部件可以获取中央处理器的状态参数，依据该状态参数，向控频引脚传输相应的电平信号，以控制中央处理器的运行频率。在该技术方案中，系统控制部件可以根据中央处理器自身的状态参数，实现对中央处理器的降频处理。
本发明实施例还提供了一种计算机可读存储介质5，如图5所示，计算机可读存储介质5上存储有计算机程序51，计算机程序51被处理器执行时实现如上述任一实施例的基于ARM架构的CPU降频方法的步骤。
以上对本发明实施例所提供的一种基于ARM架构的CPU降频系统、方法、装置和计算机可读存储介质进行了详细介绍。说明书中各个实施例采用递进的方式描述，每个实施例重点说明的都是与其他实施例的不同之处，各个实施例之间相同相似部分互相参见即可。对于实施例公开的装置而言，由于其与实施例公开的方法相对应，所以描述的比较简单，相关之处参见方法部分说明即可。应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明原理的前提下，还可以对本发明进行若干改进和修饰，这些改进和修饰也落入本发明权利 要求的保护范围内。
专业人员还可以进一步意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、计算机软件或者二者的结合来实现，为了清楚地说明硬件和软件的可互换性，在上述说明中已经按照功能一般性地描述了各示例的组成及步骤。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本发明的范围。
结合本文中所公开的实施例描述的方法或算法的步骤可以直接用硬件、处理器执行的软件模块，或者二者的结合来实施。软件模块可以置于随机存储器(RAM)、内存、只读存储器(ROM)、电可编程ROM、电可擦除可编程ROM、寄存器、硬盘、可移动磁盘、CD-ROM、或技术领域内所公知的任意其它形式的存储介质中。

Claims (18)

  1. 一种基于ARM架构的CPU降频系统，其特征在于，包括基板管理控制器、系统控制部件和中央处理器；
    所述基板管理控制器的通用输入输出口与所述中央处理器的控频引脚连接，所述基板管理控制器用于依据接收到的控制指令，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率；
    所述系统控制部件的控制接口与所述中央处理器的控频引脚连接，所述系统控制部件用于依据获取的所述中央处理器的状态参数，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率。
  2. 根据权利要求1所述的基于ARM架构的CPU降频系统，其特征在于，所述系统控制部件用于依据温度传感器传输的温度参数，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率。
  3. 根据权利要求2所述的基于ARM架构的CPU降频系统，其特征在于，所述系统控制部件具体用于判断所述温度传感器传输的温度参数是否超过预设上限值；当所述温度参数超过预设上限值时，则 向所述控频引脚传输低电平信号。
  4. 根据权利要求3所述的基于ARM架构的CPU降频系统，其特征在于，所述系统控制部件还用于统计所述温度传感器传输的温度参数低于预设下限值的持续时间；当所述持续时间大于或等于预设时间值时，则向所述控频引脚传输高电平信号。
  5. 根据权利要求1所述的基于ARM架构的CPU降频系统，其特征在于，所述系统控制部件用于根据获取的所述中央处理器的电压值和电流值，计算所述中央处理器的功耗值；依据所述功耗值，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率。
  6. 根据权利要求5所述的基于ARM架构的CPU降频系统，其特征在于，所述系统控制部件具体用于判断所述功耗值是否超过寄存器中记录的功耗限值；当所述功耗值超过所述功耗限值时，则向所述控频引脚传输低电平信号。
  7. 根据权利要求6所述的基于ARM架构的CPU降频系统，其特征在于，所述系统控制部件还用于统计所述功耗值低于所述功耗限值的持续时间；当所述持续时间大于或等于预设时间值时，则向所述 控频引脚传输高电平信号。
  8. 根据权利要求1-7任意一项所述的基于ARM架构的CPU降频系统，其特征在于，所述基板管理控制器具体用于通过BMC界面展示CPU降频选项，当接收到用户输入的目标降频选项时，根据所述目标降频选项对应的降频规则，向所述控频引脚传输相应的电平信号。
  9. 根据权利要求1-7任意一项所述的基于ARM架构的CPU降频系统，其特征在于，所述基板管理控制器具体用于依据接收到的IPMI命令，向所述控频引脚传输相应的电平信号。
  10. 一种基于ARM架构的CPU降频方法，其特征在于，包括：
    获取中央处理器的状态参数；其中，系统控制部件的控制接口与所述中央处理器的控频引脚连接；
    依据所述状态参数，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率。
  11. 根据权利要求10所述的基于ARM架构的CPU降频方法，其特征在于，所述获取中央处理器的状态参数包括：
    获取温度传感器传输的温度参数。
  12. 根据权利要求11所述的基于ARM架构的CPU降频方法，其特征在于，所述依据所述状态参数，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率包括：
    判断所述温度传感器传输的温度参数是否超过预设上限值；
    当所述温度参数超过预设上限值时，则向所述控频引脚传输低电平信号。
  13. 根据权利要求12所述的基于ARM架构的CPU降频方法，其特征在于，还包括：
    统计所述温度传感器传输的温度参数低于预设下限值的持续时间；
    当所述持续时间大于或等于预设时间值时，则向所述控频引脚传输高电平信号。
  14. 根据权利要求10所述的基于ARM架构的CPU降频方法，其特征在于，所述依据所述状态参数，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率包括：
    根据获取的所述中央处理器的电压值和电流值，计算所述中央处 理器的功耗值；
    依据所述功耗值，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率。
  15. 根据权利要求14所述的基于ARM架构的CPU降频方法，其特征在于，所述依据所述功耗值，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率包括：
    判断所述功耗值是否超过寄存器中记录的功耗限值；
    当所述功耗值超过所述功耗限值时，则向所述控频引脚传输低电平信号。
  16. 根据权利要求15所述的基于ARM架构的CPU降频方法，其特征在于，还包括：
    统计所述功耗值低于所述功耗限值的持续时间；
    当所述持续时间大于或等于预设时间值时，则向所述控频引脚传输高电平信号。
  17. 一种基于ARM架构的CPU降频装置，其特征在于，包括获取单元和控制单元；
    所述获取单元，用于获取中央处理器的状态参数；其中，系统控制部件的控制接口与所述中央处理器的控频引脚连接；
    所述控制单元，用于依据所述状态参数，向所述控频引脚传输相应的电平信号，以控制所述中央处理器的运行频率。
  18. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质上存储有计算机程序，所述计算机程序被处理器执行时实现如权利要求10至16任一项所述的基于ARM架构的CPU降频方法的步骤。
PCT/CN2021/073357 2020-08-13 2021-01-22 基于arm架构的cpu降频系统、方法、装置和介质 Ceased WO2022032989A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202010813290.7A CN111966209A (zh) 2020-08-13 2020-08-13 基于arm架构的cpu降频系统、方法、装置和介质
CN202010813290.7 2020-08-13

Publications (1)

Publication Number Publication Date
WO2022032989A1 true WO2022032989A1 (zh) 2022-02-17

Family

ID=73365494

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2021/073357 Ceased WO2022032989A1 (zh) 2020-08-13 2021-01-22 基于arm架构的cpu降频系统、方法、装置和介质

Country Status (2)

Country Link
CN (1) CN111966209A (zh)
WO (1) WO2022032989A1 (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111966209A (zh) * 2020-08-13 2020-11-20 苏州浪潮智能科技有限公司 基于arm架构的cpu降频系统、方法、装置和介质
CN113407018A (zh) * 2021-06-28 2021-09-17 南京众核电子科技有限公司 一种工业主板外置监控保护方法及其系统
CN115129137A (zh) * 2022-06-27 2022-09-30 苏州浪潮智能科技有限公司 Arm平台服务器功耗控制方法、系统、设备和存储介质
CN120428843B (zh) * 2025-07-07 2025-09-16 苏州元脑智能科技有限公司 一种中央处理器的功耗控制方法、电子设备及介质

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104679213A (zh) * 2013-11-26 2015-06-03 英业达科技有限公司 服务器及服务器的控制方法
CN106598814A (zh) * 2016-12-26 2017-04-26 郑州云海信息技术有限公司 一种实现服务器系统过热保护的设计方法
CN108304295A (zh) * 2018-01-29 2018-07-20 郑州云海信息技术有限公司 一种控制gpu降频的方法、装置和计算机可读存储介质
CN111966209A (zh) * 2020-08-13 2020-11-20 苏州浪潮智能科技有限公司 基于arm架构的cpu降频系统、方法、装置和介质

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104679213A (zh) * 2013-11-26 2015-06-03 英业达科技有限公司 服务器及服务器的控制方法
CN106598814A (zh) * 2016-12-26 2017-04-26 郑州云海信息技术有限公司 一种实现服务器系统过热保护的设计方法
CN108304295A (zh) * 2018-01-29 2018-07-20 郑州云海信息技术有限公司 一种控制gpu降频的方法、装置和计算机可读存储介质
CN111966209A (zh) * 2020-08-13 2020-11-20 苏州浪潮智能科技有限公司 基于arm架构的cpu降频系统、方法、装置和介质

Also Published As

Publication number Publication date
CN111966209A (zh) 2020-11-20

Similar Documents

Publication Publication Date Title
WO2022032989A1 (zh) 基于arm架构的cpu降频系统、方法、装置和介质
CN110554943B (zh) 一种基于i3c的多节点服务器cmc管理系统及方法
US10582021B2 (en) Cloud assisted behavioral automated testing
CN102662818A (zh) 一种基于智能手持设备的服务器远程监控管理方法
US20090279473A1 (en) Link training scheme for displayport source repeaters
CN108846070A (zh) 分布式系统的日志处理方法、系统、电子设备和存储介质
US20230035371A1 (en) Power consumption reduction circuit for gpus in server, and server
CN111901164A (zh) Ocp nic网卡的适配控制方法、装置、设备及系统
CN109697090B (zh) 一种控制终端设备的方法、终端设备及存储介质
CN108965382A (zh) 一种基于bmc的文件传输方法、装置、设备及介质
WO2022267303A1 (zh) 基于复杂可编程逻辑器件cpld的串口控制系统及其通信方法
TWI528161B (zh) 資料傳輸系統以及資料傳輸方法
CN110740169A (zh) 一种Matlab电力仿真模型与物联网设备数据通信系统及方法
CN109491237A (zh) 一种单控存储设备在开机上电期间的风扇稳控方法及装置
CN115695253A (zh) 控制器模块心跳的监控方法、系统、电子设备及存储介质
CN104572402A (zh) 一种服务器及实现服务器功耗管理的方法
CN113868033B (zh) 一种服务器调试方法
CN106372019B (zh) 一种系统总线设备响应超时的处理方法及超时处理装置
CN106650006B (zh) 可编程逻辑器件的调试方法、系统及电子设计自动化终端
CN116909957A (zh) 一种计算设备及计算设备的调试方法
CN111556535B (zh) 通讯方法、通讯装置、电子设备及存储介质
WO2016180082A1 (zh) 通用化设备综合管理器
CN117312100B (zh) 一种功耗调整方法、系统、装置、设备及计算机存储介质
CN121454887A (zh) 一种基于数字孪生驱动的设备信息模型建构方法及系统
CN111770050B (zh) 一种基于区块链技术的传感器接入及数据传输装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 21855046

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 21855046

Country of ref document: EP

Kind code of ref document: A1