WO2022022271A1 - 一种用于数据中心的无缓冲光互连架构及其方法 - Google Patents

一种用于数据中心的无缓冲光互连架构及其方法 Download PDF

Info

Publication number
WO2022022271A1
WO2022022271A1 PCT/CN2021/105804 CN2021105804W WO2022022271A1 WO 2022022271 A1 WO2022022271 A1 WO 2022022271A1 CN 2021105804 W CN2021105804 W CN 2021105804W WO 2022022271 A1 WO2022022271 A1 WO 2022022271A1
Authority
WO
WIPO (PCT)
Prior art keywords
awgr
stage
level
wavelength
line card
Prior art date
Application number
PCT/CN2021/105804
Other languages
English (en)
French (fr)
Inventor
杨晓雪
胡冰
Original Assignee
浙江大学
之江实验室
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 浙江大学, 之江实验室 filed Critical 浙江大学
Publication of WO2022022271A1 publication Critical patent/WO2022022271A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J14/00—Optical multiplex systems
    • H04J14/02—Wavelength-division multiplex systems
    • H04J14/0227—Operation, administration, maintenance or provisioning [OAMP] of WDM networks, e.g. media access, routing or wavelength allocation
    • H04J14/0254—Optical medium access
    • H04J14/0267—Optical signaling or routing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J14/00—Optical multiplex systems
    • H04J14/02—Wavelength-division multiplex systems
    • H04J14/0201—Add-and-drop multiplexing
    • H04J14/0215—Architecture aspects
    • H04J14/022—For interconnection of WDM optical networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J14/00—Optical multiplex systems
    • H04J14/02—Wavelength-division multiplex systems
    • H04J14/0227—Operation, administration, maintenance or provisioning [OAMP] of WDM networks, e.g. media access, routing or wavelength allocation
    • H04J14/0254—Optical medium access
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J14/00—Optical multiplex systems
    • H04J14/02—Wavelength-division multiplex systems
    • H04J14/0227—Operation, administration, maintenance or provisioning [OAMP] of WDM networks, e.g. media access, routing or wavelength allocation
    • H04J14/0254—Optical medium access
    • H04J14/0272—Transmission of OAMP information

Definitions

  • the present application relates to the technical field of optical switching networks in data centers, and in particular, to an unbuffered optical interconnection architecture for data centers and a method thereof.
  • Optical backplanes have been widely used in data center optical networks. In order to cope with the rapid growth of interconnection nodes and traffic, many improvements have been applied to the data center optical backplane architecture. The number of nodes is limited. In order to reduce the number of switches to build a flat data center, the AWGR-based interconnection scheme can utilize both the spatial domain and the wavelength domain.
  • the existing AWGR-based optical network cannot achieve high reliability and high throughput, and optical signals with the same wavelength are often blocked, which increases the packet loss rate and system delay.
  • the embodiments of the present application provide an unbuffered optical interconnection architecture for a data center and a method thereof, which can be applied to an optical switching network of a data center.
  • the technical problems of many devices, long configuration time and high power consumption have achieved the goal of achieving low latency and high reliability under the premise of high throughput.
  • an embodiment of the present application provides an unbuffered optical interconnection architecture.
  • the unbuffered optical interconnection architecture includes: an ingress line card, a three-level switch module, and an egress line card.
  • the switch module consists of a first-level AWGR, a second-level AWGR composed of a stage TWC and a third stage AWGR; each of the M first stage AWGRs and the M third stage AWGRs has M input ports and output ports, and each input port of the first stage AWGR is connected with an inlet line card, each output port of the third-level AWGR is connected with an outlet line card, and an output port of the first-level AWGR and an input port of the third-level AWGR are connected through a second-level TWC.
  • the bufferless optical interconnection architecture for a data center completes the transmission of optical signals by cooperating with the wavelength routing feature of AWGR and the wavelength conversion of TWC. From the control point of view, because of the cyclic routing characteristics of AWGR and the selection of different input ports, complex control architecture and optical buffering are omitted, high capacity is achieved with fewer components, and wavelength conversion of optical signals provides simple wavelength routing. , greatly reducing the complexity; from the perspective of energy consumption, due to the passive characteristics of AWGR, it does not consume any energy, and the required energy consumption is the energy consumption of the second-stage TWC wavelength modulation. Therefore, the new all-optical interconnection backplane structure with large capacity and high reliability of the present invention can effectively flatten the data center, overcome the shortcomings of low port bandwidth and limited port number of traditional space switches, and has high bandwidth, low latency, etc.
  • the interconnection architecture may include:
  • the xth second stage TWC of all second stage TWCs is connected to the xth input port of all third stage AWGR input ports, 0 ⁇ x ⁇ M 2 -1, do the following calculation for x :
  • x 2 x mod M(0 ⁇ x 2 ⁇ M-1)
  • the interconnection architecture may include:
  • the th TWC of all the second-stage TWCs is connected to the th output port on the th first-stage AWGR of all the first-stage AWGRs.
  • an embodiment of the present application provides a routing method for an unbuffered optical interconnection architecture for a data center, including: wavelength modulation of ingress line cards, first-level AWGR wavelength routing of switching modules, and second-level TWC wavelengths of switching modules Modulation, switching module third-level AWGR wavelength routing.
  • a routing method for an unbuffered optical interconnection architecture for a data center including: wavelength modulation of ingress line cards, first-level AWGR wavelength routing of switching modules, and second-level TWC wavelengths of switching modules Modulation, switching module third-level AWGR wavelength routing.
  • the number of optical signals processed by each entry line card may be the same or different, as long as the number of optical signals is greater than or equal to 0 and less than or equal to An integer of M is sufficient.
  • FIG. 1 is a schematic diagram of a system architecture provided by an embodiment of the present application.
  • FIG. 2 is a schematic diagram of a package for optical interconnection using a waveguide provided by an embodiment of the present application
  • FIG. 3 is a schematic diagram of an AWGR wavelength routing provided by an embodiment of the present application.
  • AWGR unbuffered wavelength router that does not need to be configured. It has the characteristic of circular routing and can forward the optical signal to the corresponding output port according to the input port and wavelength.
  • AWGR builds high-throughput, low-latency, and low-power networks on the premise of providing high reliability and all-optical interconnection.
  • wavelength conversion device is a wavelength conversion device
  • a wavelength converter is a device that converts a signal from one wavelength to another. According to the wavelength conversion mechanism, wavelength converters can be divided into optoelectronic wavelength converters and all-optical wavelength converters.
  • FIG. 1 is a schematic diagram of an unbuffered optical interconnection architecture for a data center provided by an embodiment of the present application.
  • the architecture can include but is not limited to the following:
  • the architecture is divided into ingress line cards, three-level switching modules and egress line cards.
  • the switching module consists of the first-level AWGR, the second-level TWC, and the third-level AWGR; each of the M first-level AWGRs and the M third-level AWGRs.
  • Each has M input ports and output ports.
  • Each input port of the first-stage AWGR is connected to an ingress line card, and each output port of the third-stage AWGR is connected to an egress line card.
  • a second-stage TWC is connected between an output port and an input port of the third-stage AWGR.
  • the number of single-ended ports of an AWGR device is M, then there are M 2 ingress line cards and egress line cards, respectively, and they are numbered and sorted from 0 to M 2 -1; the first level in the switching module and the There are M number of third-level AWGRs, the AWGRs are numbered from 0 to M - 1, and the port numbers are numbered from 0 to M2-1; the second-level TWC in the switching module has M2 , also number the second-level TWC from 0 to M 2 -1.
  • the architecture further includes: inside the switching module, the xth second stage TWC among all the second stage TWCs is connected to the xth input port among all the third stage AWGR input ports ,
  • x 2 x mod M(0 ⁇ x 2 ⁇ M-1)
  • x/M in, Indicates that x/M is rounded down, mod represents the remainder, [x 1 and x 2 represent the quotient and remainder of dividing x by M, respectively,] x 1 and x 2 represent all the third-stage AWGR input ports in the first
  • the x input ports are the x2th [local] input ports located on the x1th third stage AWGR [, local input ports refer to only the M ports on a single AWGR itself after sorting from 0 to M-1 serial number].
  • the architecture further includes: the x 1 th output port on the x th TWC among all the second-stage TWCs and the x 2 th first-stage AWGR among all the first-stage AWGRs connected.
  • an unbuffered optical interconnect architecture for data centers is formed.
  • the first stage of the switching module has a (1 ⁇ a ⁇ M) AWGRs with M single-ended ports, and the third stage has b (1 ⁇ b ⁇ M) AWGRs with M single-ended ports. ⁇
  • the bufferless optical interconnection architecture for a data center completes the transmission of optical signals through the cooperation of the wavelength routing characteristics of AWGR and the wavelength conversion of TWC. From the control point of view, because of the cyclic routing characteristics of AWGR and the selection of different input ports, complex control architecture and optical buffering are omitted, high capacity is achieved with fewer components, and wavelength conversion of optical signals provides simple wavelength routing. , greatly reducing the complexity; from the perspective of energy consumption, due to the passive characteristics of AWGR, it does not consume any energy, and the required energy consumption is the energy consumption of the second-stage TWC wavelength modulation. Therefore, the new all-optical interconnection backplane structure with large capacity and high reliability of the present invention can effectively flatten the data center, overcome the shortcomings of low port bandwidth and limited port number of traditional space switches, and has high bandwidth, low latency, etc.
  • the present application also provides a routing method for an unbuffered optical interconnect architecture for a data center.
  • FIG. 2 is a schematic diagram of a package for optical interconnection using a waveguide provided by an embodiment of the present application.
  • the invention utilizes the ingress line card and the egress line card respectively to process the input and output of the optical signal, and utilizes the exchange to perform the routing of the optical signal.
  • the backplane is used to connect the switching module, the ingress line card to the egress line card, and the waveguide on the backplane is used to transmit optical signals.
  • the processed optical signals are transmitted by a VCSEL (Vertical Cavity Surface Emitting Laser) array. Direct modulation and mapping via MLA mirrors to interconnect with waveguides on the backplane.
  • VCSEL Very Cavity Surface Emitting Laser
  • the routing includes the following steps:
  • Step 1 ingress line card wavelength modulation
  • Step 2 the first-level AWGR wavelength routing of the switching module
  • Step 3 the second-level TWC wavelength modulation of the switching module
  • Step 4 the third-level AWGR wavelength routing of the switching module.
  • this architecture only processes optical signals with wavelengths ⁇ 0 , ⁇ 1 . . . ⁇ M-1 .
  • the server architecture generates M optical signals with different wavelengths, performs wavelength division multiplexing on them, transmits them via optical fibers, and enters the ingress line card for wavelength modulation.
  • each ingress line card it can process M optical signals at the same time, and the wavelengths of the M signals are different, respectively ⁇ 0 , ⁇ 1 . . . ⁇ M-1 .
  • each line card simultaneously processes M optical signals with wavelengths ⁇ 0 , ⁇ 1 ...
  • this backplane architecture can Simultaneously process 25 ⁇ M 3 Gbps data.
  • the optical signals of 32 wavelengths are wavelength-division multiplexed and input to each ingress line card, the total throughput of 1024 ingress line cards is 819.2Tbps.
  • more server architectures can be interconnected. , providing higher capacity and realizing large-capacity all-optical interconnection.
  • Each optical signal has its source address i and destination address j, which correspond to the ingress line card i and egress line card j of the signal respectively.
  • S(i,j) represents the optical signal, and the wavelength of the signal is ⁇ k ( i,j) , where 0 ⁇ k(i,j) ⁇ M-1.
  • i 2 i mod M(0 ⁇ i 2 ⁇ M-1)
  • i 1 and i 2 respectively represent the quotient and remainder of dividing i by M, that is, the ingress line card i of S(i,j) and the i 2 local input port on the first i 1 AWGR of the switching module connected.
  • j 1 and j 2 respectively represent the quotient and remainder of dividing j by M, that is, the egress line card j of S(i,j) and the j 2 local output port on the third j 1 AWGR of the switching module connected.
  • the ingress line card modulates the wavelength ⁇ k(i, j) of the optical signal S(i, j), and the modulated wavelength is:
  • This signal will be routed into the first stage AWGR through the waveguide between the ingress line card and the first stage AWGR.
  • the number of optical signals processed by each line card may be the same or different, as long as the number of optical signals is an integer greater than or equal to 0 and less than or equal to M.
  • Optical signals with different wavelengths are input into the ingress line card after wavelength division multiplexing. After the optical signals are demultiplexed by the ingress, wavelength modulation is performed according to their source and destination addresses respectively.
  • the third stage AWGR connected to the M optical signal egress line cards should be different to prevent optical signals with the same wavelength from being blocked inside the AWGR.
  • AWGR is a non-blocking and non-contention switching fabric, and its delay is at the nanosecond and sub-nanosecond level, which realizes low-latency interconnect transmission.
  • Each port of the AWGR can simultaneously process M optical signals with wavelengths ⁇ 0 , ⁇ 1 ... ⁇ M-1 , that is, for an AWGR with M single-ended ports, it can simultaneously process M 2 optical signals .
  • the AWGR has the characteristic of circular routing. According to the local input port and wavelength of the optical signal on the AWGR, it can be forwarded to the corresponding local output port of the AWGR.
  • the formula for wavelength routing is as follows:
  • k'(i,j) represents the wavelength sequence number of the optical signal, that is, its wavelength is ⁇ k'(i,j)
  • M represents The number of single-ended ports of the AWGR
  • out represents the local output port of the optical signal S(i,j) on this AWGR according to the cyclic routing characteristics.
  • FIG. 3 illustrates the wavelength routing mode of AWGR, wherein different labels in the upper right corner of the wavelength indicate that it belongs to different local input ports.
  • the wavelength of the optical signal S(i,j) is ⁇ k'(i,j) , and substituting it into the above formula, the optical signal passes through the local output port number of the i - th AWGR of the first stage for:
  • optical signal S(i,j) is output at the j 1th local output port on the i 1th AWGR of the first stage, and this port is connected to the (M ⁇ j 1 +i 1 )th TWC of the second stage Therefore, the optical signal S(i,j) will be forwarded to the (M ⁇ j 1 +i 1 )th TWC of the second stage.
  • the TWC can adjust any input wavelength to a specified output wavelength, and the rate of wavelength adjustment is 160 Gbps. With the change of the converted wavelength amplitude, the delay increases linearly, and is generally lower than 30 ns.
  • the wavelength ⁇ k'(i,j) is modulated again according to the following formula.
  • the resulting wavelength is ⁇ k”(i,j) :
  • the (M ⁇ j 1 +i 1 ) TWC of the second stage is connected to the i 1 local input port on the j 1 AWGR of the third stage, so the light with wavelength ⁇ k”(i,j) at this time
  • the signal S(i,j) will be sent to the i 1 local input port on the j 1 AWGR of the third stage.
  • the wavelength of the optical signal S(i,j) is ⁇ k"(i,j) , and it is substituted into the wavelength routing formula of AWGR, then the optical signal passes through the
  • the local output port number of the j 1st AWGR in the third stage is:
  • the optical signal S(i,j) will be output from the j2th local output port on the j1th AWGR, and the port number of this port is:
  • the output port of this signal in the third stage is j, and this port is connected to the j-th egress line card, and this is also the destination port of the optical signal S(i,j). So far, this unbuffered optical interconnect backplane architecture for data centers has completed the transmission of optical signals, with a total delay of nanoseconds.
  • the backplane structure can transmit an optical signal at the same time, and the backplane structure is strictly non-blocking, that is, no matter what state it is in, a connection can be established on the switch module at any time. As long as the origin and destination of this connection are idle, it will not affect the established connections in the network. Due to the strict non-blocking nature of the backplane architecture, the packet loss rate of the signal is greatly reduced, thereby improving reliability.
  • the routing method for the bufferless optical interconnection architecture of the data center completes the transmission of optical signals by cooperating with the wavelength routing characteristic of AWGR and the wavelength conversion of TWC. From the control point of view, because of the cyclic routing characteristics of AWGR and the selection of different input ports, complex control architecture and optical buffering are omitted, high capacity is achieved with fewer components, and wavelength conversion of optical signals provides simple wavelength routing. , which greatly reduces the complexity; from the perspective of energy consumption, due to the passive characteristics of AWGR, it does not consume any energy, and the required energy consumption is the energy consumption of the second-stage TWC wavelength modulation. Therefore, the new all-optical interconnection backplane structure with large capacity and high reliability of the present invention can effectively flatten the data center, overcome the shortcomings of low port bandwidth and limited number of ports of traditional space switches, and has high bandwidth, low latency, etc.
  • the above-mentioned embodiments it may be implemented in whole or in part by software, hardware, firmware or any combination thereof.
  • software it can be implemented in whole or in part in the form of a computer program product.
  • the computer program product includes one or more computer programs. When the computer program is loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present application are generated.
  • the computer may be a general purpose computer, special purpose computer, computer network, or other programmable device.
  • the computer program may be stored in or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer program may be downloaded from a website site, computer, server, or data center Transmission to another website site, computer, server, or data center by wire (eg, coaxial cable, optical fiber, digital subscriber line, DSL) or wireless (eg, infrared, wireless, microwave, etc.).
  • the computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that includes an integration of one or more available media.
  • the available media may be magnetic media (eg, floppy disks, hard disks, magnetic tapes), optical media (eg, high-density digital video discs (DVDs)), or semiconductor media (eg, solid state disks, SSD)) etc.
  • At least one in this application may also be described as one or more, and the multiple may be two, three, four or more, which is not limited in this application.
  • the technical feature is distinguished by “first”, “second”, “third”, “A”, “B”, “C” and “D”, etc.
  • the technical features described in the “first”, “second”, “third”, “A”, “B”, “C” and “D” described technical features in no order or order of magnitude.
  • the corresponding relationships shown in each table in this application may be configured or predefined.
  • the values of the information in each table are only examples, and can be configured with other values, which are not limited in this application.
  • the corresponding relationships shown in some rows may not be configured.
  • appropriate deformation adjustments can be made based on the above table, for example, splitting, merging, and so on.
  • the names of the parameters shown in the headings in the above tables may also adopt other names that can be understood by the communication device, and the values or representations of the parameters may also be other values or representations that the communication device can understand.
  • other data structures can also be used, such as arrays, queues, containers, stacks, linear lists, pointers, linked lists, trees, graphs, structures, classes, heaps, hash tables, or hash tables. Wait.
  • Predefined in this application may be understood as defining, predefining, storing, pre-storing, pre-negotiating, pre-configuring, curing, or pre-firing.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Optical Communication System (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

本发明公开了一种用于数据中心的无缓冲光互连架构和方法。分为入口线卡、三级交换模块与出口线卡，交换模块包括第一级AWGR、第三级AWGR与第二级TWC；第一级AWGR输入端口有入口线卡，第三级AWGR输出端口有出口线卡，第一级AWGR输出端口和第三级AWGR输入端口间用第二级TWC连接；服务器的信号经波分复用后，经入口线卡波长调制转发至交换模块，特定波长光信号用TWC波长转换与AWGR循环路由转发至出口线卡，出口线卡对光信号处理后发送服务器。本发明实现大容量、高可靠、低功耗的全光互连，有效使数据中心扁平化，克服传统空间交换机端口带宽低、端口数目受限的不足，且具有高可靠性、低复杂度、低延迟等特性。

Description

一种用于数据中心的无缓冲光互连架构及其方法 技术领域
本申请涉及数据中心光交换网络技术领域，尤其涉及一种用于数据中心的无缓冲光互连架构及其方法。
背景技术
光背板在数据中心光网络中已经有着广泛的应用，为了应对互连节点与流量的快速增长，许多改进被应用于数据中心光背板架构，因为器件的技术限制，所达到的带宽与可互连的节点数是有限的，为了减少交换机数量构建扁平化的数据中心，以AWGR为基础的互连方案可以同时利用空间域与波长域。
但是，目前现有的基于AWGR的光网络，无法达到高可靠性与高吞吐量，具有相同波长的光信号间经常有阻塞的情况，增加了丢包率与系统延迟。
发明内容
本申请实施例提供一种用于数据中心的无缓冲光互连架构及其方法，可以应用于数据中心光交换网络，通过以波分复用后的光信号作为输入，解决了传统数据中心网络器件多且配置时间长，功耗大的技术问题，从而达到了在高吞吐量前提下实现低延迟、高可靠性的目标。
第一方面，本申请实施例提供一种无缓冲光互连架构，该无缓冲光互连架构包括：入口线卡、三级交换模块与出口线卡，交换模块由第一级AWGR、第二级TWC和第三级AWGR组成；M个第一级AWGR和M个第三级AWGR的每个均具有M个输入端口和输出端口，第一级AWGR的每个输入端口均连接有一个入口线卡，第三级AWGR的每个输出端口均连接有一个出口线卡，第一级AWGR的一个输出端口和第三级AWGR的一个输入端口之间均通过一个第二级TWC连接。
本申请实施例的用于数据中心的无缓冲光互连架构，通过AWGR的波长路由特性与TWC的波长转换进行配合，完成光信号的传输。从控制角度看，因为AWGR的循环路由特性和不同输入端口的选择，省去了复杂的控制架构和光缓存，利用较少的器件实现了高容量，利用光信号的波长转换提供了简单的波长路由，大大降低了复杂度；从能耗的角度而言，由于AWGR的无源特性，其不消耗任何能量，所需的能耗为第二级TWC波长调制等的能耗。由此，本发明的具有大容量、高可靠的新型全光互连背板架构，它能够有效地使数据中心扁平化，克服传统空间交换机端口带宽低，端口数目受限的不足，且具有高带宽，低延迟等特性。
在一种可选的实现方式中，该互连架构中可包括：
在交换模块内部，所有第二级TWC中的第x个第二级TWC与所有第三级AWGR输入端口中的第x个输入端口相连，0≤x≤M 2-1，对x进行以下计算：
Figure PCTCN2021105804-appb-000001
x 2＝x mod M(0≤x 2≤M-1)
其中，
Figure PCTCN2021105804-appb-000002
表示对x/M向下取整，mod表示取余数，x 1与x 2表示了所有第三级 AWGR输入端口中的第x个输入端口是位于第x 1个第三级AWGR上的第x 2个输入端口。
在一种可选的实现方式中，该互连架构中可包括：
所有第二级TWC中的第个TWC与所有第一级AWGR中的第个第一级AWGR上的第个输出端口相连。
第二方面，本申请实施例提供一种用于数据中心的无缓冲光互连架构的路由方法，包括：入口线卡波长调制，交换模块第一级AWGR波长路由，交换模块第二级TWC波长调制，交换模块第三级AWGR波长路由。由此完成用于数据中心的无缓冲光互连背板架构的光信号传输，通过AWGR的波长路由特性与TWC的波长转换进行配合，完成光信号的传输。从控制角度看，因为AWGR的循环路由特性和不同输入端口的选择，省去了复杂的控制架构和光缓存，利用较少的器件实现了高容量，利用光信号的波长转换提供了简单的波长路由，大大降低了复杂度；从能耗的角度而言，由于AWGR的无源特性，其不消耗任何能量，所需的能耗为第二级TWC波长调制等的能耗。
在一种可能的实现方式中，对M 2个入口线卡而言，每个入口线卡所处理的光信号个数可以相同，也可以不同，只要光信号个数为大于等于0，小于等于M的整数即可。
附图说明
为了更清楚地说明本申请实施例或背景技术中的技术方案，下面将对本申请实施例或背景技术中所需要使用的附图进行说明。
图1是本申请实施例提供的一种系统架构示意图；
图2是本申请实施例提供的一种利用波导进行光互连的封装示意图；
图3是本申请实施例提供的一种AWGR波长路由原理图。
具体实施方式
为了便于理解，首先介绍本申请涉及的术语。
1、AWGR
是一种无缓冲，不需要认为配置的波长路由器件，它具有循环路由特性，可以根据光信号的输入端口与波长，将其转发至对应的输出端口。此外，AWGR在提供高可靠性和全光互连的前提下构建高吞吐量，低延迟和低功耗的网络。
2、TWC
是波长转换器件，波长转换器是使信号从一个波长转换到另一个波长的器件。波长转换器根据波长转换机理可分为光电型波长转换器和全光型波长转换器。
为了更好的理解本申请实施例公开的一种用于数据中心的无缓冲光互连架构，下面首先对本申请实施例适用的架构系统进行描述。
请参见图1，图1是本申请实施例提供的用于数据中心的无缓冲光互连架构示意图。如图1所示，该架构可以包括但不限于如下：
架构分为入口线卡、三级交换模块与出口线卡，交换模块由第一级AWGR、第二级TWC和第三级AWGR组成；M个第一级AWGR和M个第三级AWGR的每个均具有M个输入端口和输出端口，第一级AWGR的每个输入端口均连接有一个入口线卡，第三级AWGR 的每个输出端口均连接有一个出口线卡，第一级AWGR的一个输出端口和第三级AWGR的一个输入端口之间均通过一个第二级TWC连接。
具体的，【AWGR器件的单端端口数为M，则入口线卡与出口线卡分别为M 2个，分别对其从0到M 2-1进行编号排序；交换模块中的第一级与第三级AWGR分别有M个，分别对AWGR进行从0到M-1的编号排序，对端口号进行从0到M 2-1的编号排序；交换模块中的第二级TWC有M 2个，也对第二级TWC从0到M 2-1进行编号排序。】
进一步的，【在排序完成后，将入口线卡与第一级AWGR的输入端口按序号一一相连，将出口线卡与第三级AWGR的输出端口按序号一一相连。】
在一种可选的实现方式中，该架构还包括：在交换模块内部，所有第二级TWC中的第x个第二级TWC与所有第三级AWGR输入端口中的第x个输入端口相连，
Figure PCTCN2021105804-appb-000003
x 2＝x mod M(0≤x 2≤M-1)
其中，
Figure PCTCN2021105804-appb-000004
表示对x/M向下取整，mod表示取余数，【x 1与x 2分别表示用M除x的商和余数，】x 1与x 2表示了所有第三级AWGR输入端口中的第x个输入端口是位于第x 1个第三级AWGR上的第x 2个【本地】输入端口【，本地输入端口指仅对单个AWGR自身上的M个端口从0到M-1进行排序后的序号】。
在一种可选的实现方式中，该架构还包括：所有第二级TWC中的第x个TWC与所有第一级AWGR中的第x 2个第一级AWGR上的第x 1个输出端口相连。【所有连接完成后，形成了用于数据中心的无缓冲光互连架构。】【交换模块的第一级有a(1≤a≤M)个单端端口数为M的AWGR，第三级有b(1≤b≤M)个单端端口数为M的AWGR。】
本申请实施例的用于数据中心的无缓冲光互连架构，通过AWGR的波长路由特性与TWC的波长转换进行配合，完成光信号的传输。从控制角度看，因为AWGR的循环路由特性和不同输入端口的选择，省去了复杂的控制架构和光缓存，利用较少的器件实现了高容量，利用光信号的波长转换提供了简单的波长路由，大大降低了复杂度；从能耗的角度而言，由于AWGR的无源特性，其不消耗任何能量，所需的能耗为第二级TWC波长调制等的能耗。由此，本发明的具有大容量、高可靠的新型全光互连背板架构，它能够有效地使数据中心扁平化，克服传统空间交换机端口带宽低，端口数目受限的不足，且具有高带宽，低延迟等特性。
本申请还提供一种用于数据中心的无缓冲光互连架构的路由方法。
图2是本申请实施例提供的一种利用波导进行光互连的封装示意图。
本发明分别利用入口线卡与出口线卡对光信号作输入与输出处理，利用交换进行光信号的路由。利用背板将交换模块，入口线卡与出口线卡相连，且利用背板上的波导进行光信号的传输，如图2所示，经过处理的光信号由VCSEL(垂直腔面发射激光器)阵列直接调制，并经由MLA镜进行映射，以与背板上的波导互连。
服务器机架产生具有不同波长的光信号后，将其输入背板架构，由其进行路由，将其 送至目的地址，路由包括以下步骤：
步骤1，入口线卡波长调制；
步骤2，交换模块第一级AWGR波长路由；
步骤3，交换模块第二级TWC波长调制；
步骤4，交换模块第三级AWGR波长路由。
在一种可选的实现方式中，此架构仅处理波长为λ 0,λ 1...λ M-1的光信号。服务器架构产生M个具有不同波长的光信号，并对其进行波分复用后，经由光纤传输，进入入口线卡进行波长调制。对于每个入口线卡而言，其可同时处理M个光信号，且这M个信号的波长不同，分别为λ 0,λ 1...λ M-1。对于M 2个入口线卡，每个线卡均同时处理M个波长为λ 0,λ 1...λ M-1的光信号，单个波长光信号的带宽为25Gbps，即此背板架构可以同时处理25×M 3Gbps的数据。例如将32个波长的光信号进行波分复用，输入每个入口线卡，则1024个入口线卡的总吞吐量为819.2Tbps，相对于传统光空间交换机，可以互连更多的服务器架构，提供更高的容量，实现了大容量的全光互连。
每个光信号均有其源地址i与目的地址j，分别对应此信号的入口线卡i与出口线卡j，用S(i,j)表示此光信号，此信号的波长为λ k(i,j)，其中0≤k(i,j)≤M-1。
Figure PCTCN2021105804-appb-000005
i 2＝i mod M(0≤i 2≤M-1)
其中，i 1与i 2分别表示用M除i的商和余数，即S(i,j)的入口线卡i与交换模块第一级第i 1个AWGR上的第i 2个本地输入端口相连。
Figure PCTCN2021105804-appb-000006
j 2＝j mod M(0≤j 2≤M-1)
其中，j 1与j 2分别表示用M除j的商和余数，即S(i,j)的出口线卡j与交换模块第三级第j 1个AWGR上的第j 2个本地输出端口相连。
根据以上信息，入口线卡对光信号S(i,j)的波长λ k(i,j)进行调制，调制后的波长为：
Figure PCTCN2021105804-appb-000007
此信号将通过入口线卡与第一级AWGR之间的波导，进入第一级AWGR进行路由。
对M 2个入口线卡而言，每个线卡所处理的光信号个数可以相同，也可以不同，只要光信号个数为大于等于0，小于等于M的整数即可。具有不同波长的光信号进行波分复用后输入入口线卡，则入口对光信号进行解复用后，分别按照其源地址与目的地址进行波长调制。其中，对于第一级各输入端口而言，其M个光信号的出口线卡所连接的第三级AWGR应当不同，防止具有相同波长的光信号在AWGR内部产生阻塞。
在一种可选的实现方式中，AWGR为一种无阻塞无竞争的交换结构，其延迟在纳秒和亚纳秒级别，实现了低延迟的互连传输。AWGR的每个端口可以同时处理M个波长为λ 0,λ 1...λ M-1的光信号，即对于具有M个单端端口的AWGR而言，其可同时处理M 2个光信号。AWGR具有循环路由特性，可以根据光信号在此AWGR上的本地输入端口与波长，将其转发至对应的此AWGR的本地输出端口，波长路由的公式如下所示：
out＝(in+k'(i,j))mod M
其中，in表示光信号S(i,j)在此AWGR上的本地输入端口，k'(i,j)表示光信号的波长序号，即其波长为λ k'(i,j)，M表示AWGR的单端端口数，out表示根据循环路由特性，光信号S(i,j)在此AWGR上的本地输出端口。
图3示意了AWGR的波长路由方式，其中，波长右上角的不同标号表示其属于不同的本地输入端口。
经过线卡调制后，光信号S(i,j)的波长为λ k'(i,j)，将其代入上述公式，则此光信号经过第一级第i 1个AWGR的本地输出端口号为：
Figure PCTCN2021105804-appb-000008
这表示，光信号S(i,j)在第一级第i 1个AWGR上的第j 1个本地输出端口输出，而此端口与第二级第(M×j 1+i 1)个TWC相连，故而，光信号S(i,j)将会被转发至第二级第(M×j 1+i 1)个TWC。
在一种可选的实现方式中，TWC可以将任意的输入波长调节成指定的输出波长，其波长调节的速率为160Gbps，随着转换波长幅度的改变，延迟呈线性增加，总体低于30ns。
光信号S(i,j)进入第二级第(M×j 1+i 1)个TWC后，根据其出口线卡，根据以下公式对波长λ k'(i,j)再次进行调制，调制后的波长为λ k”(i,j)：
Figure PCTCN2021105804-appb-000009
第二级第(M×j 1+i 1)个TWC与第三级第j 1个AWGR上的第i 1个本地输入端口相连，故而此时波长为λ k”(i,j)的光信号S(i,j)将被发送至第三级第j 1个AWGR上的第i 1个本地输入端口。
在一种可选的实现方式中，经过TWC调制后，光信号S(i,j)的波长为λ k”(i,j)，将其代入AWGR的波长路由公式，则此光信号经过第三级第j 1个AWGR的本地输出端口号为：
out”(i,j)＝(i 1+k”(i,j))mod M＝(i 1+(i 1-j 2+M)mod M)mod M＝j 2＝j mod M
即此光信号S(i,j)将从第j 1个AWGR上的第j 2个本地输出端口输出，此端口的端口号为：
Figure PCTCN2021105804-appb-000010
即此信号在第三级的输出端口为j,此端口与第j个出口线卡相连，而这也是光信号S(i,j)的目的端口。至此，此用于数据中心的无缓冲光互连背板架构完成了光信号的传输，总的延迟为纳秒级别。
当满足以上步骤的各个条件时，此背板架构可以同时传输个光信号，且此背板架构是严格无阻塞的，即不管其处于何种状态,任何时刻都可以在交换模块建立一个连接,只要这个连接的起点、终点是空闲的,而不会影响网络中已建立起来的连接。由于背板架构的严格无阻塞特性，大大减少了信号的丢包率，从而提高了可靠性。
本申请实施例的用于数据中心的无缓冲光互连架构的路由方法，通过AWGR的波长路由特性与TWC的波长转换进行配合，完成光信号的传输。从控制角度看，因为AWGR的循环路由特性和不同输入端口的选择，省去了复杂的控制架构和光缓存，利用较少的器件实现了高容量，利用光信号的波长转换提供了简单的波长路由，大大降低了复杂度；从能耗的角度而言，由于AWGR的无源特性，其不消耗任何能量，所需的能耗为第二级TWC波长调制等的能耗。由此，本发明的具有大容量、高可靠的新型全光互连背板架构，它能够有效地使数据中心扁平化，克服传统空间交换机端口带宽低，端口数目受限的不足，且具有高带宽，低延迟等特性。
需要说明的是，前述对用于数据中心的无缓冲光互连架构实施例的解释说明也适用于该实施例的用于数据中心的无缓冲光互连架构的路由方法，此处不再赘述。
在上述实施例中，可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机程序。在计算机上加载和执行所述计算机程序时，全部或部分地产生按照本申请实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机程序可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，所述计算机程序可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(digital subscriber line，DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质(例如，软盘、硬盘、磁带)、光介质(例如，高密度数字视频光盘(digital video disc，DVD))、或者半导体介质(例如，固态硬盘(solid state disk，SSD))等。
本领域普通技术人员可以理解：本申请中涉及的第一、第二等各种数字编号仅为描述方便进行的区分，并不用来限制本申请实施例的范围，也表示先后顺序。
本申请中的至少一个还可以描述为一个或多个，多个可以是两个、三个、四个或者更多个，本申请不做限制。在本申请实施例中，对于一种技术特征，通过“第一”、“第二”、“第三”、“A”、“B”、“C”和“D”等区分该种技术特征中的技术特征，该“第一”、“第二”、“第三”、“A”、“B”、“C”和“D”描述的技术特征间无先后顺序或者大小顺序。
本申请中各表所示的对应关系可以被配置，也可以是预定义的。各表中的信息的取值仅仅是举例，可以配置为其他值，本申请并不限定。在配置信息与各参数的对应关系时，并不一定要求必须配置各表中示意出的所有对应关系。例如，本申请中的表格中，某些行示出的对应关系也可以不配置。又例如，可以基于上述表格做适当的变形调整，例如，拆分，合并等等。上述各表中标题示出参数的名称也可以采用通信装置可理解的其他名称，其参数的取值或表示方式也可以通信装置可理解的其他取值或表示方式。上述各表在实现时，也可以采用其他的数据结构，例如可以采用数组、队列、容器、栈、线性表、指针、链表、树、图、结构体、类、堆、散列表或哈希表等。
本申请中的预定义可以理解为定义、预先定义、存储、预存储、预协商、预配置、固化、或预烧制。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖 在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (5)

  1. 一种用于数据中心的无缓冲光互连架构，其特征在于：分为入口线卡、三级交换模块与出口线卡，交换模块由第一级AWGR、第二级TWC和第三级AWGR组成；M个第一级AWGR和M个第三级AWGR的每个均具有M个输入端口和输出端口，第一级AWGR的每个输入端口均连接有一个入口线卡，第三级AWGR的每个输出端口均连接有一个出口线卡，第一级AWGR的一个输出端口和第三级AWGR的一个输入端口之间均通过一个第二级TWC连接。
  2. 根据权利要求1所述的一种用于数据中心的无缓冲光互连架构，其特征在于：在交换模块内部，所有第二级TWC中的第x个第二级TWC与所有第三级AWGR输入端口中的第x个输入端口相连，0≤x≤M 2-1，对x进行以下计算：
    Figure PCTCN2021105804-appb-100001
    x 2＝x mod M(0≤x 2≤M-1)
    其中，
    Figure PCTCN2021105804-appb-100002
    表示对x/M向下取整，mod表示取余数，x 1与x 2表示了所有第三级AWGR输入端口中的第x个输入端口是位于第x 1个第三级AWGR上的第x 2个输入端口。
  3. 根据权利要求1所述的一种用于数据中心的无缓冲光互连架构，其特征在于：所有第二级TWC中的第x个TWC与所有第一级AWGR中的第x 2个第一级AWGR上的第x 1个输出端口相连。
  4. 应用于权利要求1-3任一所述架构的一种用于数据中心的无缓冲光互连架构的路由方法，其特征在于：路由方法包括以下步骤：
    1)入口线卡波长调制
    此架构仅处理波长为λ 0,λ 1...λ M-1的光信号。
    服务器架构产生M个具有不同波长的光信号，并对其进行波分复用后经由光纤传输进入各个入口线卡进行波长调制；
    对于每个入口线卡，进入有M个具有不同波长的光信号，不同波长分别为λ 0,λ 1...λ M-1；
    对于M 2个入口线卡，每个入口线卡均同时处理M个波长为λ 0,λ 1...λ M-1的光信号；
    每个光信号S(i,j)均有自身的源地址的入口线卡序号i与目的地址的出口线卡序号j，分别对应该光信号S(i,j)从所有入口线卡的第i个入口线卡输入并从所有出口线卡的第j个出口线卡输出，光信号S(i,j)的波长为λ k(i,j)，其中0≤k(i,j)≤M-1，k(i,j)表示光信号S(i,j)的波长序号，计算获得：
    Figure PCTCN2021105804-appb-100003
    i 2＝i mod M(0≤i 2≤M-1)
    Figure PCTCN2021105804-appb-100004
    j 2＝j mod M(0≤j 2≤M-1)
    其中，i 1与i 2分别表示用M除i的商和余数，j 1与j 2分别表示用M除j的商和余数；
    将光信号S(i,j)的第i个入口线卡与交换模块中第i 1个第一级AWGR上的第i 2个输入端口相连；将光信号S(i,j)的第j个出口线卡与交换模块中第j 1个第三级AWGR上的第j 2个输出端口相连；根据以上信息，入口线卡对光信号S(i,j)的波长λ k(i,j)进行调制，调制后的波长为：
    Figure PCTCN2021105804-appb-100005
    调制的光信号S(i,j)通过入口线卡进入第一级AWGR进行路由：
    2)交换模块第一级AWGR波长路由
    第一级AWGR和第三级AWGR的每个端口同时处理M个不同波长为λ 0,λ 1...λ M-1的光信号，光信号输入每个第一级AWGR后，第一级AWGR内部根据当前第一级AWGR所输入的输入端口与波长转发至自身的输出端口，第一级AWGR内部的波长路由的公式如下所示：
    out＝(in+k'(i,j))mod M
    其中，in表示光信号S(i,j)在当前第一级AWGR上的输入端口的序数，k'(i,j)表示调制后的光信号S'(i,j)的波长序号，M表示AWGR的单端端口总数，out表示根据循环路由特性光信号S(i,j)在当前第一级AWGR上的输出端口的序数；
    经过入口线卡调制后的光信号S(i,j)的波长为λ k'(i,j)代入上述公式，调制后的光信号S'(i,j)进入第i 1个第一级AWGR的输出端口的序号为：
    Figure PCTCN2021105804-appb-100006
    调制后的光信号S'(i,j)在第i 1个第一级AWGR上的第j 1个输出端口输出，然后被转发至第二级第(M×j 1+i 1)个TWC；
    3)交换模块第二级TWC波长调制
    光信号S'(i,j)进入第(M×j 1+i 1)个第二级TWC后，根据其出口线卡以下公式对光信号S'(i,j)的波长λ k'(i,j)再次进行调制，调制后的波长为λ k”(i,j)，获得波长为λ k”(i,j)的再次调制后光信号S”(i,j)：
    Figure PCTCN2021105804-appb-100007
    第(M×j 1+i 1)个第二级TWC的输出端口与第j 1个第三级AWGR上的第i 1个本地输入端口相连，波长为λ k”(i,j)的光信号S'(i,j)被转发至第j 1个第三级AWGR上的第i 1个输入端口；
    4)交换模块第三级AWGR波长路由
    第三级AWGR的路由处理和第一级AWGR的路由处理相同，将再次调制后光信号S”(i,j)的波长为λ k”(i,j)代入第三级AWGR的波长路由，经过第j 1个第三级AWGR的输出端口序号为：
    out”(i,j)＝(i 1+k”(i,j))mod M＝(i 1+(i 1-j 2+M)mod M)mod M＝j 2＝j mod M
    再次调制后光信号S”(i,j)将从第j 1个第三级AWGR上的第j 2个输出端口输出，该输出端口的总端口序号对应设置为：
    Figure PCTCN2021105804-appb-100008
    再次调制后光信号S”(i,j)在第三级AWGR所有输出端口中的输出端口序号为j，该端 口与第j个出口线卡相连，由此完成用于数据中心的无缓冲光互连背板架构的光信号传输。
  5. 根据权利要求4所述的一种用于数据中心的无缓冲光互连的路由方法，其特征在于：
    对M 2个入口线卡而言，每个入口线卡所处理的光信号个数可以相同，也可以不同，只要光信号个数为大于等于0，小于等于M的整数即可。
PCT/CN2021/105804 2020-07-29 2021-07-12 一种用于数据中心的无缓冲光互连架构及其方法 WO2022022271A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202010744155.1A CN111865472B (zh) 2020-07-29 2020-07-29 一种用于数据中心的无缓冲光互连架构和方法
CN202010744155.1 2020-07-29

Publications (1)

Publication Number Publication Date
WO2022022271A1 true WO2022022271A1 (zh) 2022-02-03

Family

ID=72945990

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2021/105804 WO2022022271A1 (zh) 2020-07-29 2021-07-12 一种用于数据中心的无缓冲光互连架构及其方法

Country Status (2)

Country Link
CN (1) CN111865472B (zh)
WO (1) WO2022022271A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115550281A (zh) * 2022-11-30 2022-12-30 广州地铁设计研究院股份有限公司 一种面向awgr光交换数据中心网络的资源调度方法及架构

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113141546B (zh) * 2020-01-20 2022-07-22 华为技术有限公司 处理器系统、内存访问方法和计算机设备
CN111865472B (zh) * 2020-07-29 2021-07-20 浙江大学 一种用于数据中心的无缓冲光互连架构和方法
CN115166913B (zh) * 2022-06-29 2024-05-10 中国科学院西安光学精密机械研究所 一种基于微环的波分复用共封装光互连架构

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070098319A1 (en) * 2005-09-01 2007-05-03 Lucent Technologies Inc. Non-blocking cyclic AWG-based node architectures
WO2012167572A1 (zh) * 2011-11-25 2012-12-13 华为技术有限公司 多框集群的光网络交换节点、光突发同步方法及线路框
CN103336334A (zh) * 2013-06-28 2013-10-02 华中科技大学 一种基于阵列波导光栅的光交换系统
CN103795654A (zh) * 2014-02-14 2014-05-14 上海交通大学 基于阵列波导光栅的无阻塞Clos交换网络设计方法
CN104297853A (zh) * 2014-10-16 2015-01-21 浙江大学 模块化的波长和空间全光路由器
CN111865472A (zh) * 2020-07-29 2020-10-30 浙江大学 一种用于数据中心的无缓冲光互连架构和方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4228533B2 (ja) * 2000-10-18 2009-02-25 沖電気工業株式会社 光パス交換装置
CN105162721B (zh) * 2015-07-31 2018-02-27 重庆大学 基于软件定义网络的全光互连数据中心网络系统及数据通信方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070098319A1 (en) * 2005-09-01 2007-05-03 Lucent Technologies Inc. Non-blocking cyclic AWG-based node architectures
WO2012167572A1 (zh) * 2011-11-25 2012-12-13 华为技术有限公司 多框集群的光网络交换节点、光突发同步方法及线路框
CN103336334A (zh) * 2013-06-28 2013-10-02 华中科技大学 一种基于阵列波导光栅的光交换系统
CN103795654A (zh) * 2014-02-14 2014-05-14 上海交通大学 基于阵列波导光栅的无阻塞Clos交换网络设计方法
CN104297853A (zh) * 2014-10-16 2015-01-21 浙江大学 模块化的波长和空间全光路由器
CN111865472A (zh) * 2020-07-29 2020-10-30 浙江大学 一种用于数据中心的无缓冲光互连架构和方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115550281A (zh) * 2022-11-30 2022-12-30 广州地铁设计研究院股份有限公司 一种面向awgr光交换数据中心网络的资源调度方法及架构
CN115550281B (zh) * 2022-11-30 2023-04-28 广州地铁设计研究院股份有限公司 一种面向awgr光交换数据中心网络的资源调度方法及架构

Also Published As

Publication number Publication date
CN111865472B (zh) 2021-07-20
CN111865472A (zh) 2020-10-30

Similar Documents

Publication Publication Date Title
WO2022022271A1 (zh) 一种用于数据中心的无缓冲光互连架构及其方法
US11716557B2 (en) Reduced-complexity integrated guaranteed-rate optical packet switch
US9693124B2 (en) Macro-switch with a buffered switching matrix
Tucker The role of optics and electronics in high-capacity routers
Xi et al. A petabit bufferless optical switch for data center networks
Kachris et al. A survey on optical interconnects for data centers
WO2016180067A1 (en) System and method for photonic switching
US20150295756A1 (en) Hybrid Optical/Electrical Interconnect Network Architecture for Direct-connect Data Centers and High Performance Computers
Xia et al. Petabit optical switch for data center networks
CN116530070A (zh) 高效地互连多个计算节点以形成线路交换网络
Parsons et al. Optical switching for data center networks
Ding et al. Scalable, low-power-penalty nanosecond reconfigurable hybrid optical switches for data centre networks
Imran et al. Optical interconnects for cloud computing data centers: Recent advances and future challenges
Fiorani et al. Large data center interconnects employing hybrid optical switching
Calabretta et al. Optical switching in data centers: Architectures based on optical packet/burst switching
WO2013159501A1 (zh) 用于多个服务器间的数据传输系统、数据接口装置及数据传输方法
Terzenidis et al. Optically-enabled bloom filter label forwarding using a silicon photonic switching matrix
Wang et al. Systematic exploration of high-radix integrated silicon photonic switches for datacenters
Yang et al. ABOI: AWGR-Based optical interconnects for single-wavelength and multi-wavelength
Shukla et al. Optical switching in next-generation data centers: Architectures based on optical switching
Miao Flow-controlled and SDN-enabled optical switching system for high-capacity and low-latency flat data center networks
Yang et al. A novel architecture for high capacity optical backplane
Cheng et al. High speed optical flow switch architecture design and IDC application based on SDN technologies
Maniotis et al. Intra-node high-performance computing network architecture with fast optical switch fabrics
CN116528085A (zh) 一种基于波长路由的数据中心网络架构

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 21849490

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 21849490

Country of ref document: EP

Kind code of ref document: A1