WO2022002020A1 - 静态网络中的数据传输系统及其方法 - Google Patents

静态网络中的数据传输系统及其方法 Download PDF

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Publication number
WO2022002020A1
WO2022002020A1 PCT/CN2021/103001 CN2021103001W WO2022002020A1 WO 2022002020 A1 WO2022002020 A1 WO 2022002020A1 CN 2021103001 W CN2021103001 W CN 2021103001W WO 2022002020 A1 WO2022002020 A1 WO 2022002020A1
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Prior art keywords
memory
level
data
capacity
sending
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PCT/CN2021/103001
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English (en)
French (fr)
Inventor
李新奇
成诚
柳俊丞
袁进辉
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北京一流科技有限公司
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Publication of WO2022002020A1 publication Critical patent/WO2022002020A1/zh

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00Network arrangements or protocols for supporting network services or applications
    • H04L67/01Protocols
    • H04L67/10Protocols in which an application is distributed across nodes in the network
    • H04L67/104Peer-to-peer [P2P] networks
    • H04L67/1074Peer-to-peer [P2P] networks for supporting data block transmission mechanisms
    • H04L67/1078Resource delivery mechanisms
    • H04L67/108Resource delivery mechanisms characterised by resources being split in blocks or fragments

Definitions

  • the present disclosure relates to a data transmission technology, and more particularly, to a data transmission system and a method for saving data transmission overhead in a static network.
  • a static distributed data processing architecture data handling or transmission uses a fixed-capacity registered memory.
  • the entire capacity of the entire registered memory is transferred.
  • the data blocks that need to be stored will not exceed the capacity of the registered memory.
  • the entire capacity of the registered memory will be transmitted. In this case, since the size of the data block of the registered memory is usually smaller than the capacity of the registered memory, the actual amount of data transferred is usually larger than the actual size of the data block in the registered memory.
  • the capacity of the registered memory is 64M, while the size of the actual data block is 16M, and during data transmission, it is still transmitted according to the entire capacity of the registered memory of 64M, which causes a lot of extra transmission overhead and reduces the transmission efficiency. . If the transferred memory is dynamically allocated, the registration overhead will increase.
  • the purpose of the present invention is to solve at least one of the above problems.
  • the static network includes at least one data sending device and one data receiving device, wherein the data
  • the sending device includes: a first-stage sending memory with a fixed capacity for storing data blocks to be transmitted; a second-stage sending register memory group, the sum of the capacities of which is an integer multiple of a predetermined capacity modulus and is greater than or equal to the first
  • the fixed capacity of the first-level transmission memory and includes two second-level transmission registration memories whose capacity is a predetermined capacity modulus and a plurality of second-level transmission registration memories whose capacities are increased in equal proportions based on the predetermined capacity modulus; data segmentation;
  • the dumping unit is used to select a dedicated storage margin from the two second-level sending register memories whose capacity is a predetermined capacity modulus when the size of the data block to be transmitted is less than or equal to the capacity of the second-level sending register memory with the smallest capacity.
  • the second-level sending register memory otherwise, select the largest second-level sending register memory whose capacity is less than or equal to the size of the data block to be transmitted from all the second-level sending register memories, and follow the selected second-level sending register memory.
  • the capacity of the memory is transferred from the largest data sub-block divided in sequence from the data block to be transmitted into the selected second-level sending registration memory;
  • the data receiving device includes: a first-level receiving memory, which has the same The same capacity as the first-level sending memory; the second-level receiving register memory group, which includes the second-level receiving register memory corresponding to and having the same capacity as each of the second-level sending register memory groups; and the data merge transfer storage unit, which merges and dumps the data sub-blocks received in the second-level receiving registration memory group into the first-level receiving memory in descending order; and is arranged in each pair of the second-level sending registration memory and the first The data transmission unit between the second-level receiving registration memories, when the selected second-level sending registration memory is dumped to the largest data sub-block
  • a data transmission system in a static network includes at least one data sending device and one data receiving device, wherein the data sending device includes: a first-level sending device The memory has a predetermined capacity and is used to store the data blocks to be transmitted; the second-level sending register memory group, the sum of its capacities is an integer multiple of the predetermined capacity modulus and is greater than or equal to the fixed capacity of the first-level sending memory, and It includes two second-level sending register memories with a predetermined capacity modulus and a plurality of second-level sending register memories whose capacities are proportionally increased based on the predetermined capacity modulus; When the size of the transmission data block is less than or equal to the capacity of the second-level transmission registration memory with the smallest capacity, select the second-level transmission registration memory dedicated to storing the margin from the two second-level transmission registration memories whose capacity is a predetermined capacity modulus, otherwise Select the second-level transmission registration memory whose capacity is larger than the size of the data block to be transmitted and the data sending device includes: a first-level sending device The memory has
  • the largest data sub-blocks divided in order are dumped into the selected second-level sending register memory;
  • the data receiving device includes: a first-level receiving memory, which has the same capacity as the first-level sending memory; a second-level receiving memory;
  • a receiving register memory group which includes a second level receiving register memory corresponding to and having the same capacity as each of the second level sending register memory groups;
  • the data sub-blocks received in the memory group are merged and dumped into the first-level receiving memory in descending order; and the data transmission arranged between each pair of the second-level sending register memory and the second-level receiving register memory
  • the unit when the selected second-level sending registration memory is dumped into the largest data sub-block to be sent, obtains a transmission instruction, and sends the largest data sub-block in the selected second-level sending registration memory to the corresponding second level receive register memory.
  • a data transmission system in a static network includes at least one data sending device and one data receiving device, wherein the data sending device includes: a first-level sending memory , has a predetermined capacity for storing data blocks to be transmitted; the second-level sending register memory group, the sum of its capacities is an integer multiple of the predetermined capacity modulus and is greater than or equal to the fixed capacity of the first-level sending memory, and includes Two second-level sending register memories whose capacity is a predetermined capacity modulus and a plurality of second-level sending register memories whose capacities are increased in equal proportions based on the predetermined capacity modulus; When the size of the data block is less than or equal to the capacity of the second-level sending register memory with the smallest capacity, the second-level sending register memory dedicated to storing the margin is selected from the two second-level sending register memories whose capacity is a predetermined capacity modulus; Select the largest second-level transmission registration memory whose capacity is less than or equal to the size of the data block to
  • a data transmission system in a static network includes at least one data sending device and one data receiving device, wherein the data sending device includes: a first-level sending memory , has a predetermined capacity for storing data blocks to be transmitted; the second-level sending register memory group, the sum of its capacities is an integer multiple of the predetermined capacity modulus and is greater than or equal to the fixed capacity of the first-level sending memory, and includes Two second-level sending register memories whose capacity is a predetermined capacity modulus and a plurality of second-level sending register memories whose capacities are increased in equal proportions based on the predetermined capacity modulus; When the size of the data block is less than or equal to the capacity of the second-level sending register memory with the smallest capacity, the second-level sending register memory dedicated to storing the margin is selected from the two second-level sending register memories whose capacity is a predetermined capacity modulus; Among all the second-level sending register memories, select the second-level sending register memory whose capacity is greater than
  • the capacity of the memory is the largest data sub-block that can be divided in sequence from the data block to be transmitted, and based on the record, all the largest data sub-blocks that can be divided are correspondingly dumped into the selected second-level sending registration memory ;
  • the data receiving device includes: a first-level receiving memory with the same capacity as the first-level sending memory; a second-level receiving and registering memory group, which includes each corresponding to the second-level sending and registering memory groups and a second-level receiving registration memory with the same capacity; and a data merging and dumping unit, which merges and dumps the data sub-blocks received in the second-level receiving and registering memory group in descending order to the first level in the receiving memory; and a data transmission unit arranged between each pair of the second-level sending register memory and the second-level receiving register memory, where the selected second-level sending register memory is dumped into the largest data sub-block to be sent When the transmission instruction is obtained, the largest data sub-block in the selected second-level sending register memory is sent to
  • a data transmission method in a static network including: when the size of the data block to be transmitted is smaller than or equal to the second-level sending registered memory capacity with the smallest capacity, changing from two capacities to a predetermined capacity modulo Select the second-level sending register memory dedicated to storing the remaining amount of the second-level sending register memory, otherwise select the largest second-level sending register memory whose capacity is less than or equal to the size of the data block to be transmitted from all the second-level sending register memories.
  • the second-level transmission registration memory the largest data sub-block divided in sequence from the data block to be transmitted according to the capacity of the selected second-level transmission registration memory, and the divided largest data sub-block is transferred to the selected
  • the selected second-level transmission registration memory is dumped into the data sub-block to be sent
  • the largest data sub-block in the selected second-level transmission registration memory is transferred based on the transmission instruction Sending to the second-level receiving registration memory corresponding to the selected second-level sending registration memory; and combining and dumping each data sub-block in the second-level receiving registration memory to the first-level receiving memory in descending order in memory.
  • a data transmission method in a static network including: when the size of the data block to be transmitted is smaller than or equal to the second-level sending registered memory capacity with the smallest capacity, changing from two capacities to a predetermined capacity modulo Select the second-level transmission registration memory dedicated to storing the margin from the second-level transmission registration memory, otherwise select the second-level transmission registration memory whose capacity is larger than the size of the data block to be transmitted and is the same as that of the to-be-transmitted data block.
  • the difference between the sizes of the data blocks to be transmitted is smaller than the predetermined capacity modulus, and there is no second-level transmission registration memory whose capacity is greater than the size of the data block to be transmitted and is different from the size of the data block to be transmitted in all the second-level transmission registration memories.
  • the largest second-level transmission register memory whose capacity is less than or equal to the size of the data block to be transmitted is selected from all the second-level transmission register memories.
  • the selected second-level transmission registration memory when the selected second-level transmission registration memory is dumped into the data sub-block to be sent, based on the transmission instruction, the largest data sub-block in the selected second-level transmission registration memory is sent to In the second-level receiving register memory corresponding to the selected second-level sending register memory; and combining and dumping each data sub-block in the second-level receiving register memory into the first-level receiving memory in descending order .
  • a data transmission method in a static network including: when the size of the data block to be transmitted is smaller than or equal to the second-level sending registered memory capacity with the smallest capacity, changing from two capacities to a predetermined capacity modulo Select the second-level sending register memory dedicated to storing the remaining amount of the second-level sending register memory, otherwise select the largest second-level sending register memory whose capacity is less than or equal to the size of the data block to be transmitted from all the second-level sending register memories.
  • Second-level sending registration memory record the selected second-level sending registration memory and the largest data sub-block that can be divided in sequence from the data block to be transmitted according to the capacity of the selected second-level sending registration memory; based on the Record, send the maximum data sub-blocks that are sequentially divided from the data block to be transmitted according to the capacity of the selected second-level register memory, and transfer all the divided maximum data sub-blocks to the selected second-level correspondingly In the sending register memory; when the selected second-level sending register memory is dumped into the data sub-block to be sent, based on the transmission instruction, the largest data sub-block in the selected second-level sending register memory is sent to the
  • the selected second-level sending register memory corresponds to the second-level receiving register memory; and each data sub-block in the second-level receiving register memory is merged and dumped into the first-level receiving memory in descending order.
  • a data transmission method in a static network including: when the size of the data block to be transmitted is smaller than or equal to the second-level sending registered memory capacity with the smallest capacity, changing from two capacities to a predetermined capacity modulo Select the second-level transmission registration memory dedicated to storing the margin from the second-level transmission registration memory, otherwise select the second-level transmission registration memory whose capacity is larger than the size of the data block to be transmitted and is the same as that of the to-be-transmitted data block.
  • the difference between the sizes of the data blocks to be transmitted is smaller than the predetermined capacity modulus, and there is no second-level transmission registration memory whose capacity is greater than the size of the data block to be transmitted and is different from the size of the data block to be transmitted in all the second-level transmission registration memories.
  • the difference between the sizes of the data blocks is smaller than the second-level transmission register memory of the predetermined capacity modulus, the largest second-level transmission register memory whose capacity is less than or equal to the size of the data block to be transmitted is selected from all the second-level transmission register memories.
  • Sending registration memory recording the selected second-level sending registration memory and the largest data sub-block that can be divided in order from the data block to be transmitted according to the capacity of the selected second-level sending registration memory; based on the record, The largest data sub-blocks are sequentially divided from the data blocks to be transmitted according to the capacity of the selected second-level transmission register memory, and all the divided largest data sub-blocks are correspondingly transferred to the selected second-level transmission register.
  • the memory when the selected second-level transmission registration memory is dumped into the data sub-block to be sent, based on the transmission instruction, the largest data sub-block in the selected second-level transmission registration memory is sent to the selected data sub-block.
  • the second-level receiving register memory corresponding to the second-level sending register memory; and combining and dumping each data sub-block in the second-level receiving register memory into the first-level receiving memory in descending order.
  • a data transmission multiplexing component in a static network includes multiple pairs of primary sending memory and receiving registration memory
  • the data transmission multiplexing component includes: secondary sending The registered memory group, the sum of its capacity is an integer multiple of the predetermined capacity modulus and is greater than or equal to the fixed capacity of the primary transmission memory, and includes two secondary transmission registration memories whose capacity is the predetermined capacity modulus and a plurality of capacities A secondary sending registration memory that increases in equal proportions based on the predetermined capacity modulus; a data division dumping unit, used for transferring data from two capacities when the size of the data block to be transmitted is less than or equal to the capacity of the secondary sending registration memory with the smallest capacity Select the secondary transmission registration memory dedicated to storing the margin for the secondary transmission registration memory of the predetermined capacity modulus, otherwise select the largest one whose capacity is less than or equal to the size of the data block to be transmitted from all the secondary transmission registration memory
  • the secondary sending registration memory and according to the capacity of the selected secondary sending registration memory,
  • a data transmission multiplexing component in a static network includes multiple pairs of primary sending memory and receiving registration memory
  • the data transmission multiplexing component includes: secondary sending The registered memory group, the sum of its capacity is an integer multiple of the predetermined capacity modulus and is greater than or equal to the fixed capacity of the primary transmission memory, and includes two secondary transmission registration memories whose capacity is the predetermined capacity modulus and a plurality of capacities A secondary sending registration memory that increases in equal proportions based on the predetermined capacity modulus; a data division dumping unit, used for transferring data from two capacities when the size of the data block to be transmitted is less than or equal to the capacity of the secondary sending registration memory with the smallest capacity Select the secondary transmission registration memory dedicated to storing the margin for the secondary transmission registration memory of the predetermined capacity modulus; otherwise, select the secondary transmission registration memory whose capacity is greater than the size of the data block to be transmitted and is the same as the size of the data block to be transmitted.
  • the difference between the sizes of the data blocks to be transmitted is smaller than the predetermined capacity modulus, and there is no secondary transmission registration memory whose capacity is greater than the size of the data blocks to be transmitted and is different from the data to be transmitted in all secondary transmission registration memories.
  • the largest secondary transmission registration memory whose capacity is less than or equal to the size of the data block to be transmitted is selected from all the secondary transmission registration memories, And according to the capacity of the selected secondary sending registration memory, the largest data sub-blocks divided in sequence from the data block to be transmitted are dumped into the selected secondary sending registration memory; the secondary receiving registration memory group, which includes a secondary receiving register memory corresponding to each of the secondary sending register memory groups and having the same capacity; a data transmission unit arranged between each pair of secondary sending register memories and secondary receiving register memories, When the selected secondary sending registered memory is dumped to the largest data sub-block to be sent, a transmission instruction is obtained, and the largest data sub-block in the selected secondary sending registered memory is
  • a data transmission multiplexing component in a static network includes multiple pairs of primary sending memory and receiving registration memory
  • the data transmission multiplexing component includes: secondary sending The registered memory group, the sum of its capacity is an integer multiple of the predetermined capacity modulus and is greater than or equal to the fixed capacity of the primary transmission memory, and includes two secondary transmission registration memories whose capacity is the predetermined capacity modulus and a plurality of capacities A secondary sending registration memory that increases in equal proportions based on the predetermined capacity modulus; a data division dumping unit, used for transferring data from two capacities when the size of the data block to be transmitted is less than or equal to the capacity of the secondary sending registration memory with the smallest capacity Select the secondary transmission registration memory dedicated to storing the margin for the secondary transmission registration memory of the predetermined capacity modulus, otherwise select the largest one whose capacity is less than or equal to the size of the data block to be transmitted from all the secondary transmission registration memory Secondary sending registration memory, and recording the selected secondary sending registration memory and the largest data sub-
  • a data transmission multiplexing component in a static network includes multiple pairs of primary sending memory and receiving registration memory
  • the data transmission multiplexing component includes: secondary sending The registered memory group, the sum of its capacity is an integer multiple of the predetermined capacity modulus and is greater than or equal to the fixed capacity of the primary transmission memory, and includes two secondary transmission registration memories whose capacity is the predetermined capacity modulus and a plurality of capacities A secondary sending registration memory that increases in equal proportions based on the predetermined capacity modulus; a data division dumping unit, used for transferring data from two capacities when the size of the data block to be transmitted is less than or equal to the capacity of the secondary sending registration memory with the smallest capacity Select the secondary transmission registration memory dedicated to storing the margin for the secondary transmission registration memory of the predetermined capacity modulus; otherwise, select the secondary transmission registration memory whose capacity is greater than the size of the data block to be transmitted and is the same as the size of the data block to be transmitted.
  • the difference between the sizes of the data blocks to be transmitted is smaller than the predetermined capacity modulus, and there is no secondary transmission registration memory whose capacity is greater than the size of the data blocks to be transmitted and is different from the data to be transmitted in all secondary transmission registration memories.
  • the largest secondary transmission registration memory whose capacity is less than or equal to the size of the data block to be transmitted is selected from all the secondary transmission registration memories, And record the selected secondary transmission registration memory and the largest data sub-block that can be divided in sequence from the data block to be transmitted according to the capacity of the selected secondary transmission registration memory, and divide all the data that can be divided based on the record.
  • the largest sub-block of data is correspondingly dumped into the selected secondary sending registration memory; the secondary receiving registering Level receiving register memory; the data transmission unit arranged between each pair of secondary sending register memory and secondary receiving register memory, when the selected secondary sending register memory is dumped to the largest data sub-block to be sent, obtains The transmission instruction sends the largest data sub-block in the selected secondary sending registered memory to the corresponding secondary receiving registered memory; and the data merge dump unit, which combines the data sub-blocks received in the secondary receiving registered memory group They are merged and dumped into one of the main-stage receiving memories in descending order.
  • a segmentation system for transmitting data in a static network includes at least one data sending device and one data receiving device, wherein the segmentation system includes: a first-level sending memory , has a predetermined fixed capacity for storing data blocks to be transmitted; the second-level sending registration memory group, the sum of its capacities is an integer multiple of the predetermined capacity modulus and is greater than or equal to the fixed capacity of the first-level sending memory, and It includes two second-level sending register memories with a predetermined capacity modulus and a plurality of second-level sending register memories whose capacities are proportionally increased based on the predetermined capacity modulus; When the size of the data block to be transmitted is less than or equal to the capacity of the second-level transmission registration memory with the smallest capacity, the second-level transmission registration memory dedicated to storing the margin is selected from the two second-level transmission registration memories whose capacity is a predetermined capacity modulus.
  • the largest data sub-blocks divided in sequence from the transmission data block are dumped into the selected second-level sending register memory.
  • a segmentation system for transmitting data in a static network includes at least one data sending device and one data receiving device, wherein the segmentation system includes: a first-level sending memory , has a predetermined fixed capacity for storing data blocks to be transmitted; the second-level sending registration memory group, the sum of its capacities is an integer multiple of the predetermined capacity modulus and is greater than or equal to the fixed capacity of the first-level sending memory, and It includes two second-level sending register memories with a predetermined capacity modulus and a plurality of second-level sending register memories whose capacities are proportionally increased based on the predetermined capacity modulus; When the size of the data block to be transmitted is less than or equal to the capacity of the second-level transmission registration memory with the smallest capacity, the second-level transmission registration memory dedicated to storing the margin is selected from the two second-level transmission registration memories whose capacity is a predetermined capacity modulus.
  • a segmentation system for transmitting data in a static network includes at least one data sending device and one data receiving device, wherein the segmentation system includes: a first-level sending memory , has a predetermined capacity for storing data blocks to be transmitted; the second-level sending register memory group, the sum of its capacities is an integer multiple of the predetermined capacity modulus and is greater than or equal to the fixed capacity of the first-level sending memory, and includes Two second-level sending register memories with a predetermined capacity modulus and a plurality of second-level sending register memories whose capacities are proportionally increased based on the predetermined capacity modulus; When the size of the transmission data block is less than or equal to the capacity of the second-level transmission registration memory with the smallest capacity, select the second-level transmission registration memory dedicated to storing the margin from the two second-level transmission registration memories whose capacity is a predetermined capacity modulus, otherwise Select the largest second-level transmission registration memory whose capacity is less than or equal to the size of the data block to
  • a segmentation system for transmitting data in a static network includes at least one data sending device and one data receiving device, wherein the segmentation system includes: a first-level sending memory , has a predetermined fixed capacity for storing data blocks to be transmitted; the second-level sending registration memory group, the sum of its capacities is an integer multiple of the predetermined capacity modulus and is greater than or equal to the fixed capacity of the first-level sending memory, and It includes two second-level sending register memories with a predetermined capacity modulus and a plurality of second-level sending register memories whose capacities are proportionally increased based on the predetermined capacity modulus; When the size of the data block to be transmitted is less than or equal to the capacity of the second-level transmission registration memory with the smallest capacity, the second-level transmission registration memory dedicated to storing the margin is selected from the two second-level transmission registration memories whose capacity is a predetermined capacity modulus.
  • the second-level transmission registration memory whose capacity is greater than the size of the data block to be transmitted and the difference between the size of the data block to be transmitted and the size of the data block to be transmitted is smaller than the predetermined capacity modulus from all the second-level transmission registration memories, and When there is no second-level transmission registration memory whose capacity is larger than the size of the data block to be transmitted and the difference from the size of the data block to be transmitted is smaller than the predetermined capacity modulus
  • Select the largest second-level transmission registration memory whose capacity is less than or equal to the size of the data block to be transmitted among all the second-level transmission registration memories, and record the selected second-level transmission registration memory and according to the selected second-level transmission registration memory
  • the capacity of the sending register memory is the largest data sub-block that can be divided in sequence from the data block to be transmitted, and based on the record, all the largest data sub-blocks that can be divided are correspondingly dumped to the selected second-level sending register in memory.
  • a large block of data is divided into a plurality of small blocks of data, and the small blocks of data are transferred to the second-level sending registration memory with a smaller registration content capacity, so that , during data transmission, only the data of the size of the second-level transmission register memory in which the data sub-blocks are dumped is sent, so that the actual transmission capacity is completely equal to or very close to the size of the data block to be transmitted, eliminating the need for
  • the invalid transmission of the capacity of the blank part of the first-level transmission memory reduces the overhead of data transmission between registered memories in a static network, improves the efficiency of data transmission, and further improves the speed of data processing in the entire static network.
  • FIG. 1 is a schematic structural diagram of a data transmission system of a static network according to the present disclosure.
  • FIG. 2 is a schematic structural diagram of a data transmission multiplexing component of a static network according to the present disclosure.
  • FIG. 3 is a flowchart of a data transmission method for a static network according to the first embodiment of the present disclosure.
  • FIG. 4 is a flowchart of a data transmission method for a static network according to a second embodiment of the present disclosure.
  • FIG. 5 is a flowchart of a data transmission method for a static network according to a third embodiment of the present disclosure.
  • FIG. 6 shows a flowchart of a data transmission method for a static network according to a fourth embodiment of the present disclosure.
  • first, second, third, etc. may be used in this disclosure to describe various pieces of information, such information should not be limited by these terms. These terms are only used to distinguish the same type of information from each other.
  • first it does not imply the existence of "second”, and sometimes the first or second is only used to simplify the expression.
  • the secondary transmission registration memory 01 or the secondary transmission registration memory 02 one of the two possible devices may be referred to as the secondary transmission registration memory 01 or the secondary transmission registration memory 02, without departing from the scope of the present disclosure, and similarly, the two possible devices One of them may be referred to as the second computing device or may be referred to as the first computing device.
  • the word “if” as used herein can be interpreted as "at the time of” or “when” or “in response to determining.”
  • FIG. 1 is a schematic structural diagram of a data transmission system of a static network according to the present disclosure.
  • the data transmission system of the static network according to the present disclosure is deployed on a first computing device and a second computing device constituting the static network.
  • FIG. 1 only shows the respective data sending devices and data receiving devices on the two computing devices, and other conventional configuration units on the respective computing devices are omitted to simplify the view.
  • the same building blocks are present on every computing device.
  • the cache of the data that needs to be transported between different computing devices adopts the registered memory to cache.
  • the data sending device 100 on the computing device that needs to send data will register a fixed-capacity memory for the data to be sent.
  • On one computing device there will be multiple computing units or computing executors that generate data that will be sent to computing units or computing executors on another computing device, so that when another computing unit or computing executor performs operations use.
  • a fixed address is determined for the data transferred across computers, so it is necessary to register memory for locking.
  • the data transmission device 100 includes a first-level transmission memory.
  • the size of this memory registration application is 128M or 64M. Memory can also be registered for other sizes, such as 127M or 129M.
  • the capacity of the first-level sending memory is usually an integral multiple of the capacity modulus specified by the data transmission system, and may not be an integral multiple of the specified capacity modulus of the data transmission system.
  • This capacity modulus B is, for example, 8M or 4M. As one of the examples of the present disclosure, for simplicity of description, B is set to 8M.
  • a first-level receiving memory is provided on the side of the data receiving device 200, and the capacity is usually 128M or 64M for registration application.
  • a data transmission unit is set between the first-level sending memory and the first-level receiving memory, so that when the data block to be transmitted is obtained in the first-level sending memory, the data transmission unit obtains the message, and based on The message transmits the entire data capacity (for example, 128M) of the first-level sending memory including the data block to be transmitted to the first-level receiving memory by using the RDMA protocol as a whole.
  • the data transfer volume is the capacity of the entire registered memory, which is much larger than the size of the data block (eg 50M) stored in the sending registered memory.
  • the present disclosure sets a plurality of second-level transmission registration memories in the first-level transmission memory in the data transmission device 100 to form a second-level transmission registration memory group.
  • a data dividing and dumping unit is arranged between the first-level sending memory and the second-level sending register memory group.
  • each execution component uses message communication to start execution. For example, when the data executor using the first-level sending memory stores data in the first-level sending memory, it will send a message to the data splitting and dumping unit to inform the data splitting and dumping unit that the first-level sending memory has been cached. data, which can perform operations on data in the first-stage transmit memory.
  • the data split dump unit manages the subordinate second-level send register memory banks. Generally speaking, the data division and dumping unit stores the data generated by its operation into one or more second-level transmission registration memories in the second-level transmission registration memory group in a targeted manner.
  • Each capacity in the second-stage sending register memory group is an integer multiple of a predetermined capacity modulus B.
  • the capacity of the second-level transmission registration memory 01 is 64M
  • the capacity of the second-level transmission registration memory 02 is 32M
  • the capacity of the second-level transmission registration memory 03 is 16M
  • the capacity of the second-level transmission registration memory 04 is 8M
  • the capacity of the second-level sending registration memory 05 is 8M.
  • the two 8M second-level transmit register memories one is designated exclusively for storing split margins.
  • the total capacity of the second-level sending registered memory group is 128M of the first-level sending memory group.
  • the second-level transmission registration memory group includes two second-level transmission registration memories whose capacity is the basic capacity modulus and a plurality of second-level transmission registration memories which are increased in equal proportions based on the basic capacity modulus. If the predetermined capacity modulus is B and the proportional ratio is A, the capacity of each second-level transmission registration memory in the second-level transmission registration memory group is B, B, BA, BA 2 , BA 3 in order from small to large. , BA 4 , .... Typically this scaling factor is 2.
  • the total capacity of the second-level sending registered memory group is equal to the fixed capacity of the first-level sending memory, and may also be greater than the fixed capacity of the first-level sending memory, but the difference between the two is not greater than A basic capacity modulus. Therefore, although it is shown in FIG. 1 that there are six second-level transmission registration memories in the second-level transmission registration memory group, it can be set according to actual conditions, for example, there are only four, five, seven and so on. If the capacity of the first-level sending memory group is 128M, and the modulus B is 4M, there will be six second-level sending register memories in the second-level sending register memory group.
  • the capacities of the six second-level sending register memories are 4M, 4M, 8M, 16M, 32M, and 64M in ascending order.
  • the capacities of the six second-level sending register memories are 4M, 4M, 8M, 16M, 32M, and 64M in ascending order.
  • the two 4M second-level send register memories one of which is designated to store split margins.
  • the data division and dump unit When the data division and dump unit obtains the message sent by the execution unit or execution body (not shown) to which the first-stage sending memory belongs, it starts to divide the data blocks to be transmitted in the first-stage sending memory. Specifically, Comparing the capacity of all second-level sending registration memories in the second-level sending register memory group with the size of the data block to be transmitted stored in the first-level sending memory.
  • the capacity of the registered memory divides the data block to be transmitted from the starting address of the data block to be transmitted stored in the first-level sending memory to obtain the largest data sub-block, thereby transferring the divided largest data sub-block to the selected data sub-block.
  • the second level sends the register memory. This is to maximize the use of the second-level send register memory capacity.
  • the capacity of the second-level sending registered memory 01 is 64M, which is between 57M and 57M of the data block to be transmitted.
  • the difference is 7M
  • the difference with other second-level sending registration memory is 25M, 31M, 49M, and 49M. Therefore, since the capacity of the second-level sending registration memory 01 is 64M, which is greater than 57M of the data block to be transmitted, and the difference is less than The basic capacity modulus is B. Therefore, selecting the second-level sending register memory 01 as the dump destination of the data block can minimize the wasted overhead during data transmission.
  • the second-level sending registration memory 01 can be selected as the dump destination registration memory, so that the entire data block to be transmitted can be directly regarded as a 57M.
  • the data sub-blocks are transferred to the second-level sending register memory 01, so that the total size of the transmitted data blocks is 64M during subsequent data transmission.
  • the amount of data is reduced by half, that is, 64M, and the wasted transmission overhead is also reduced from 71M to 7M. This greatly improves the rate and efficiency of data transmission.
  • this selection method can dump the data block to be transmitted into the selected second-level sending registration cache 01 at one time without the need for subsequent selection, and also reduces the operation overhead of selecting split dumping.
  • the data splitting and dumping unit When the data splitting and dumping unit performs splitting, if the size of the data block is too small, for example, it is smaller than the capacity of the smallest second-level sending registration memory, that is, the predetermined capacity modulus, it will directly select the split margin dedicated to dumping the data block. of.
  • the second-level sending register memory with the largest capacity in the memory. So, for example, if B is 8M and the data block to be transmitted is 57M, the second level send register memory 02 will be selected first. In this way, firstly, the largest data sub-block, namely 32M, is divided according to the order of storage addresses from the second-level sending registration memory 02 with a capacity of 32M compared to a data block to be transmitted of 57M. After that, there is still 25M of the data block to be transmitted.
  • select the second-level transmission registration memory with the largest capacity in the second-level transmission registration memory whose capacity is smaller than the data block to be transmitted select the second-level transmission registration memory of 8M.
  • One of the registered memories for example the second level sends the registered memory 04 or 05.
  • select the last 8M second-level sending register memory for the remaining 1M data blocks to be transmitted for example, the second-level sending register memory 05 or 04.
  • the difference between the amount of data actually transmitted and the size of the initial data block to be transmitted is extremely small, for example, only 7M more in the above example . That is to say, by adopting this method of selecting and dividing, the data that originally needs to be transmitted 128M can be reduced to only 64M in the subsequent transmission process.
  • the initial data block to be transmitted when the initial data block to be transmitted is an integer multiple of the basic capacity modulus, it can be completely divided into the second-level sending register memory group without causing any redundant data transmission overhead.
  • 32M second-level sending registration memory 02 and 16M second-level sending registration memory 03 can be selected as the dump destination register memory. In this way, although two dumps are performed and two separate data transfers are required, no redundant data transfers are generated during the data transfer process, and the total capacity of the actual data transfer register memory is exactly equal to the data blocks to be transferred. size without causing any additional data transfer overhead.
  • the data splitting and dumping unit takes the capacity of all the second-level transmission registration memories in the second-level transmission registration memory group it has as a selection window to compare the first-level transmission registers one by one. For the data blocks to be transmitted stored in the registered memory, which second-level sending registered memory has the largest data sub-block, the second-level sending registered memory is first selected as the destination to be dumped. After selecting and dumping the largest data sub-block at the place of division, if there is still a remaining part of the data block to be transmitted in the first-level sending memory, the data division and dumping unit is used again for the remaining data block to transfer the first data block it has.
  • the capacity of all second-level transmission registration memories in the second-level transmission registration memory group is used as a selection window to compare the data blocks to be transmitted stored in the first-level registration memory, and which second-level transmission registration memory is framed data. If the sub-block is the largest, the second-level sending register memory is first selected as the destination to be dumped. This is repeated until the data blocks to be transmitted stored in the first-level registered memory are divided and transferred. After this split and dump, the difference between the actual used registered memory capacity and the size of the initial data block to be transmitted will not exceed the basic capacity modulus set for the second-level sending registered memory group, so the resulting transmission overhead will not be wasted. will exceed the set B value.
  • the data division dumping unit can record the number of the selected second-level transmission registration memory and the size of the largest data sub-block that can be divided, after each selection of the second-level transmission registration memory is made, And accumulate the offset relative to the starting pointer of the initial data block to be transmitted according to the dividing sequence, so as to record the starting point and the starting point and end.
  • the transmission data block is predicted to be divided, the actual division is performed according to the recorded number of the selected second-level sending register memory and the corresponding division start offset and division end offset, and all the divided data are divided.
  • the sub-blocks are dumped to the corresponding selected second-level sending register memory at one time.
  • the data division and dump unit divides and dumps the data blocks to be transmitted stored in the first-level registration memory into one or more second-level transmission registration memories in the second-level transmission registration memory group, Or after the data division and dump unit divides and dumps a largest data sub-block to one of the second-level sending registration memories, it will send the data transmission connected to the second-level transmission register memory as the destination of data sub-block dumping.
  • the unit for example, the data transmission unit 01 connected to the second-level sending registration memory 01, sends a message, so that the data transmission unit 01 executes data transmission processing based on the message, so that the second-level sending register memory 01 The largest data sub-block in the memory 01 is sent. It is transmitted to the second-level receiving registration memory 01 of the corresponding data receiving device 200 .
  • the data transmission unit 01 When the data transmission unit 01 transmits the largest data sub-block from the second-level sending register memory 01 to the second-level receiving register memory 01, it will send a message to the data merging and dumping unit of the data receiving device 200.
  • the data merging and dumping unit performs dumping processing on the largest data sub-block in the second-level receiving register memory 01 based on the message, so as to sequentially dump into the first-level receiving memory.
  • all the divided data sub-blocks that are divided and dumped to the second-level receiving register memory group are sequentially dumped to the first-level receiving memory, they are reorganized into a whole data block, and the data block is the same as that of the first-level receiving memory.
  • the data blocks to be transmitted in the transmission memory of the stage are the same.
  • the process of data block division, selection dumping, transmission, and merging is described above with the second-level sending register memory 01, the data transmission unit 01, and the second-level receiving register memory 01, the same process is handled in other transmission paths The process is the same. For example, when the second-level sending register memory 03 is selected, the divided largest data sub-block is transferred to it, and then the data transmission unit 03 transfers the largest data sub-block to the second-level receiving register memory 03, and finally transferred The memory is merged into the first-level receive memory.
  • the sending end of the data transmission system in FIG. 1 can directly and independently form a complete dividing system for transmitting data, which is used to divide the data into multiple data and send them separately, thereby reducing the waste of transmission overhead.
  • FIG. 2 is a schematic structural diagram of a data transmission multiplexing component of a static network according to the present disclosure.
  • the input end of the data transmission multiplexing component 300 is connected to multiple main-stage sending memories, such as main-stage sending memory 01, main-stage sending memory 02, main-stage sending memory 03, main-stage sending memory 04, and so on.
  • the output end of the data transmission multiplexing component 300 is connected to a plurality of main stage receiving memories, such as main stage receiving memory 01, main stage receiving memory 02, main stage receiving memory 03, main stage receiving memory 04 and so on.
  • the data transmission multiplexing component 300 includes a data division and dumping unit, a secondary sending register memory group, a data transmission unit group, a secondary receiving register memory group, and a data merging and dumping unit.
  • the secondary transmission registration memory group includes a plurality of secondary transmission registration memories. Usually, the total capacity of the secondary sending register memory group is equal to the fixed capacity of the primary sending memory.
  • the total capacity of the secondary sending register memory group is equal to the fixed capacity of the primary sending memory, and may also be greater than the fixed capacity of the primary sending memory, but the difference between the two is not greater than a basic capacity modulus. Although it is shown as 6 in FIG. 2 , it can be set according to the actual situation, for example, there are only four, five, seven secondary sending register memories, and so on. If the capacity of the first-level sending memory group is 128M, and the modulus B is 4M, there will be six secondary sending register memories in the second-level sending register memory group. As shown in Figure 2, the capacities of the six secondary sending registration memories are 4M, 4M, 8M, 16M, 32M and 64M in descending order.
  • the modulus B is 8M
  • the capacity of the secondary transmission registration memory 01 is 64M
  • the capacity of the secondary transmission registration memory 02 is 32M
  • the capacity of the secondary transmission registration memory 03 is 16M
  • the capacity of the secondary transmission registration memory 04 is The capacity of 8M and the secondary sending register memory 05 is 8M.
  • B is 2M
  • the capacity of the secondary transmission registration memory 05 is 4M
  • the capacity of the secondary transmission registration memory 06 is 2M, so there are seven secondary transmission registration memories.
  • the sum of the capacities of all secondary transmit register memories of the secondary transmit register memory bank is equal to the maximum fixed capacity among all primary transmit registers. Therefore, the sum of the capacities of all the secondary transmit register memories of the secondary transmit register memory group may be greater than the fixed capacity of the primary transmit memory of some of the primary transmit memories.
  • the secondary receive register memory bank is set corresponding to the secondary send register memory bank.
  • the secondary reception registration memory group includes secondary reception registration memories corresponding to each of the secondary transmission registration memory groups and having the same capacity.
  • the sending registration memory select a secondary sending registration memory with the smallest absolute value of the difference between its capacity and the size of the data block to be transmitted stored in the primary sending memory, and based on the selected secondary sending registration memory capacity The largest data sub-blocks divided in sequence from the data blocks to be transmitted stored in the primary sending memory are dumped into the selected secondary sending registration memory.
  • the data block to be transmitted stored in the primary sending memory 03 is 74M
  • the data division dump unit compares the capacity of the secondary sending register memory in the secondary sending register memory group with 74M
  • the size of the data block to be transmitted and the secondary transmission registration memory 01 of 64M, the secondary transmission registration memory 02 of 32M, the secondary transmission registration memory 03 of 16M, the secondary transmission registration memory 04 and 05 of 8M are obtained.
  • the difference in capacity is 10M, 42M, 58M, 66M and 66M.
  • the data division dump unit first selects the secondary sending register memory 01 as the dump destination register memory, because the difference is the smallest, and the largest data sub-block can be stored without wasting storage space.
  • the data dividing and dumping unit divides 64M from the start address of the data block to be transmitted as the largest data sub-block and dumps it to the secondary sending register memory 01 .
  • the main stage sends 10M data remaining in the memory 03.
  • the data division dump unit obtains the size of the data block to be transmitted and the secondary transmission register memory 02 of 32M by comparing the capacity of the secondary transmission registration memory in the secondary transmission registration memory group with the remaining 10M data blocks to be transmitted.
  • 16M secondary sending register memory 03, 8M secondary sending register memory 04 and 05 have a capacity difference of 22M, 6M, 2M and 2M respectively.
  • the data division dump unit selects the secondary sending register memory 04 or 05 again as the dump destination register memory, because the difference is the smallest, and the largest data sub-block can be stored without wasting storage space. Therefore, the data dividing and dumping unit divides 8M from the start address of the remaining data blocks to be transmitted as the largest data sub-block and dumps them into the secondary sending register memory 04 . Finally, the data division dump unit compares the capacity of the secondary transmission registration memory in the secondary transmission registration memory group with the remaining 2M data blocks to be transmitted to obtain the size of the data block to be transmitted and the 32M secondary transmission registration memory 02, The difference between the capacities of the 16M secondary transmission registration memory 03 and the 8M secondary transmission registration memory 04 or 05 is 30M, 14M, and 0M in turn.
  • the data division dump unit selects the secondary sending register memory 04 or 05 again as the dump destination register memory, because the difference is the smallest, and the largest data sub-block can be stored without wasting storage space. Therefore, through the level-by-level division, the memory 01, 04 and 05 are finally registered for the secondary transmission selected for the data block to be transmitted. In this way, in the subsequent data transmission process, only the data volume of 80M needs to be transmitted, which is 48M less than the 128M that is directly transmitted to the main-level sending memory. Although this reduces the data transmission amount of 48M, there is still a transmission overhead that is 6M more than the actual data amount.
  • the 16M secondary transmission registration memory 03 in order to reduce the number of data divisions, when the remaining transmission data is 10M, you can directly select the 16M secondary transmission registration memory 03, and the selection condition is that the selection capacity is larger than the data block to be transmitted or the remaining The transmission data block (for example, 10M) and the difference between the two is 6M less than the predetermined capacity modulus B (8M) of the secondary sending register memory.
  • the selection capacity for example, 10M
  • 8M the predetermined capacity modulus B
  • the secondary sending register memories 01 and 03 are finally selected.
  • the amount of data to be subsequently transmitted in this selection method is still 80M, it reduces the number of times of selection and division operations and improves the operation efficiency.
  • B is 4M or 2M
  • the difference of 6M between the 10M remaining data blocks to be transmitted and the 16M secondary transmission registration memory 03 is greater than the 4M or 2M B, so the secondary transmission registration memory 03 will not be selected, but It will continue to choose from the smaller secondary transmission registration memory, such as 8M secondary transmission registration memory 04 and 4M secondary transmission registration memory 05 or 06 (B is 4M), or 8M secondary transmission registration memory 04 And 2M of secondary send register memory 06 or 07 (B is 2M).
  • B is 2M
  • for the initial data block to be transmitted of 74M there will be no waste of any transmission overhead.
  • the data division and dump unit divides and converts the data blocks to be transmitted stored in the primary registration memory into one or more secondary transmission registration memories in the secondary transmission registration memory group, or after the data division
  • the dump unit divides a largest data sub-block and dumps it to one of the secondary transmission registration memories, it will transfer the data sub-block to the data transmission unit connected to the secondary transmission registration memory, such as the secondary transmission.
  • the data transmission unit 01 connected to the registered memory 01 sends a message, so that the data transmission unit 01 performs data transmission processing based on the message, and transmits the largest data sub-block in the secondary transmission register memory 01 to the corresponding data receiving device 200.
  • the data transmission unit 01 When the data transmission unit 01 transmits the largest data sub-block from the secondary sending register memory 01 to the secondary receiving register memory 01, it will send a message to the data merging and dumping unit.
  • the data merging and dumping unit performs dumping processing on the largest data sub-block in the secondary receiving registration memory 01 based on the message, so as to sequentially dump it into the primary receiving memory 03 .
  • all the divided data sub-blocks that are divided and dumped into the secondary receiving register memory group are sequentially dumped to the primary receiving memory 03, they are reorganized into a whole data block, which is sent to the primary level.
  • the data blocks to be transmitted in the memory 03 are the same.
  • a plurality of primary-level sending memories and a corresponding number of primary-level receiving memories are connected in parallel to the data transmission multiplexing component 300 according to the present disclosure, which can reduce the consumption of registered memory, reduce the requirements for memory resources, and also improve the secondary transmission Utilization of registered memory and secondary receive registered memory.
  • FIG. 3 shows a flowchart of a first embodiment of a data transmission method for a static network according to the present disclosure.
  • the data division and dump unit acquires the size of the data block to be transmitted stored in the first-stage sending memory.
  • the size of the data block to be transmitted stored in the first-level sending memory is compared with the capacity of each second-level sending register memory in the second-level sending register memory group.
  • it is determined whether the size of the data block to be transmitted is less than or equal to the capacity of the second-level sending registration memory with the smallest capacity, that is, whether it is less than or equal to a predetermined capacity modulus B.
  • the data division and dump unit selects the second-level sending register memory with the largest capacity and smaller than the size of the data block to be transmitted. For example, if the data block to be transmitted is 48M and B is 8M, the determination result at step S320 is "No", so the second-level sending register memory 02 of 32M is selected.
  • the data division dumping unit obtains the largest data sub-block that can be divided according to the capacity of the selected second-level sending register memory. Specifically, the largest data sub-block is divided according to the order of storage addresses from the data blocks to be transmitted in the first sending registration memory, that is, the starting address offset and the data to be divided in the first sending registration memory are obtained. End address offset. As described above, when the data block to be transmitted is 48M and B is 8M, a maximum data sub-block of 32M is directly divided from the start address of the data block to be transmitted.
  • step S350 the data division and dumping unit divides the largest data sub-block according to the acquired address and dumps it into the selected second-level sending register memory.
  • step S360 the data division dumping unit judges whether there is still a remaining data portion after the above division of the data block to be transmitted in the first sending register memory based on the division above process. If the judgment result is "No”, the current split dump processing is ended; if the judgment result is "Yes”, the process returns to step S300, and the remaining data part in the first sending register memory is used as the data block to be transmitted and the above is re-executed. step.
  • step S320 If the determination result in step S320 is "Yes", it means that the data block to be transmitted only needs to be transferred to the second-level sending register memory for storing the division margin to complete the division of all the data blocks to be transmitted. Therefore, at step S390, the data division and dump unit selects the second-level registered sending memory with the smallest capacity for storing the remaining amount of the data block to be transmitted. Then the process returns to step S340, at step S340, the data splitting and dumping unit divides the data blocks to be transmitted in the first sending register memory according to the storage address order according to the capacity of the selected second-level sending register memory. data sub-block.
  • the entire data block to be transmitted is taken as the largest data sub-block piece.
  • step S350 when the data division dumping unit dumps the divided largest data sub-block into the selected second-level sending registration memory, it will send a message to the corresponding data transmission unit, informing the data transmission unit that the data transmission unit can The second stage in which the largest data sub-block is dumped sends the data in the registered memory to perform transmission processing.
  • step S370 the data transmission unit transmits the data of the entire capacity of the second-level sending registration memory to the corresponding second-level receiving registration memory.
  • the data merging and dumping unit sequentially dumps the data in the second-level receiving registration memory that has received the largest data sub-block into the first-level receiving memory, so as to finally merge the data with the first-level sending memory.
  • the data block in the memory that is the same as the initial data block to be transferred.
  • X is the size of the data block to be transmitted in the first-level sending memory
  • R is the capacity of the first-level sending memory.
  • B is a predetermined modulus, for example, it can usually be 2M, 4M or 8M.
  • the second stage with the smallest capacity receives the coefficients of the registered memory, , which is usually used to store residual data sub-blocks smaller than a predetermined capacity modulus remaining after the data block to be transmitted is divided, or directly store an initial data block to be transmitted whose size is smaller than the predetermined capacity modulus.
  • Coefficient of register memory for other incremental second stage reception where, , which is 0 or 1.
  • the coefficients of the register memory are also received for the second stage with the smallest capacity.
  • the size X of the data to be transmitted and the capacity of the corresponding second-level receiving registration memory are known quantities, and the solution object is the coefficient corresponding to each second-level receiving registration memory.
  • One of the solution selection constraints is whether the size X of the data to be transmitted is smaller than the capacity of one of the second-level receiving register memories in the second-level receiving register memory group, and whether the difference between the two is less than the predetermined capacity modulus B, or in the opposite case, select The second-level receive register memory with the largest capacity but less than the size X of the data to be transmitted.
  • the value of each second-level receiving registration memory coefficient corresponding to the above formula is solved by a greedy algorithm. When a certain coefficient is not 0, the second-level receiving registration memory corresponding to the coefficient is selected. Therefore, when the second-level receiving register memory is selected in descending order of capacity, the largest data sub-block is always divided according to the selected second-level receiving register memory.
  • FIG. 4 shows a flowchart of a second embodiment of a data transmission method for a static network according to the present disclosure.
  • the data division and dump unit acquires the size of the data block to be transmitted stored in the first-stage sending memory.
  • the size of the data block to be transmitted stored in the first-level sending memory is compared with the capacity of each second-level sending register memory in the second-level sending register memory group, and the difference is calculated.
  • step S415 based on the comparison result, it is determined whether the size of the data block to be transmitted is less than or equal to the capacity of the second-level sending registration memory with the smallest capacity, that is, whether it is less than or equal to a predetermined capacity modulus B. If the determination result is "No”, at step S420, it is determined based on the comparison result whether the difference is smaller than the predetermined capacity modulus B and the capacity of the corresponding second-level sending register memory is larger than the size of the data block to be transmitted. If the determination result is "No”, at step S430, the data division and dump unit selects the second-level sending register memory with the largest capacity and smaller than the size of the data block to be transmitted.
  • the data division dumping unit obtains the largest data sub-block that can be divided according to the capacity of the selected second-level sending register memory. Specifically, the largest data sub-block is divided according to the order of storage addresses from the data blocks to be transmitted in the first sending registration memory, that is, the starting address offset and the data to be divided in the first sending registration memory are obtained. End address offset. As described above, when the data block to be transmitted is 48M and B is 8M, a maximum data sub-block of 32M is directly divided from the start address of the data block to be transmitted.
  • step S450 the data dividing and dumping unit divides the largest data sub-block according to the acquired address and dumps it into the selected second-level sending register memory.
  • step S460 the data division and dumping unit determines whether there is still a remaining data portion after the above division of the data block to be transmitted in the first sending register memory based on the above process of division. If the judgment result is "No”, the current split transfer process is ended; if the judgment result is "Yes”, the process returns to step S400, and the remaining data part in the first sending register memory is used as the data block to be transmitted and the above is re-executed. step.
  • step S415 If the determination result in step S415 is "Yes", it means that the data blocks to be transmitted only need to be transferred to the second-level sending registration memory for storing the division margin to complete the division of all the data blocks to be transmitted. Therefore, at step S490, the data division and dumping unit selects the second-level registered sending memory with the smallest capacity for storing the remainder of the data block to be transmitted. Then the process returns to step S440. At step S440, the data splitting and dumping unit divides the data blocks to be transmitted in the first sending register memory according to the storage address order according to the capacity of the selected second-level sending register memory. data sub-block.
  • step S420 determines whether the capacity of the second-level sending register memory is greater than or equal to the data block to be transmitted in the first sending register memory and the corresponding difference is less than the predetermined capacity modulus B. If the determination result at step S420 is "Yes", that is, the capacity of the second-level sending register memory is greater than or equal to the data block to be transmitted in the first sending register memory and the corresponding difference is less than the predetermined capacity modulus B, then The entire data block to be transmitted is regarded as the largest data sub-block, that is, the process is at step S495, the data division and dump unit selects the difference value smaller than the predetermined capacity modulus B and the capacity corresponding to the difference value is greater than the size of the data block to be transmitted. Secondary register send memory. The process then returns to step S440.
  • step S450 while the data division dumping unit dumps the divided largest data sub-block into the selected second-level sending registration memory, it will send a message to the corresponding data transmission unit, informing the data transmission unit that the data transmission unit can The second stage in which the largest data sub-block is dumped sends the data in the registered memory to perform transmission processing.
  • step S470 the data transmission unit transmits the data of the entire capacity of the second-level sending registration memory to the corresponding second-level receiving registration memory.
  • the data merging and dumping unit sequentially dumps the data in the second-level receiving registration memory that has received the largest data sub-block into the first-level receiving memory, so as to finally merge the data with the first-level sending memory.
  • the data block in the memory that is the same as the initial data block to be transferred.
  • X is the size of the data block to be transmitted in the first-level sending memory
  • R is the capacity of the first-level sending memory.
  • B is a predetermined modulus, for example, it can usually be 2M, 4M or 8M.
  • the second stage with the smallest capacity receives the coefficients of the registered memory, , which is usually used to store residual data sub-blocks smaller than a predetermined capacity modulus remaining after the data block to be transmitted is divided, or directly store an initial data block to be transmitted whose size is smaller than the predetermined capacity modulus.
  • Coefficient of register memory for other incremental second stage reception where, , which is either 0 or 1.
  • the coefficients of the register memory are also received for the second stage with the smallest capacity.
  • the size X of the data to be transmitted and the capacity of the corresponding second-level receiving registration memory are known quantities, and the solution object is the coefficient corresponding to each second-level receiving registration memory.
  • One of the solution selection constraints is whether the size X of the data to be transmitted is smaller than the capacity of one of the second-level receiving register memories in the second-level receiving register memory group, and whether the difference between the two is less than the predetermined capacity modulus B, or in the opposite case, select The second-level receive register memory with the largest capacity but less than the size X of the data to be transmitted.
  • the value of each second-level receiving registration memory coefficient corresponding to the above formula is solved by a greedy algorithm. When a certain coefficient is not 0, the second-level receiving registration memory corresponding to the coefficient is selected. Therefore, when the second-level receiving register memory is selected in descending order of capacity, the largest data sub-block is always divided according to the selected second-level receiving register memory.
  • FIG. 5 is a flowchart of a data transmission method for a static network according to a third embodiment of the present disclosure.
  • the embodiment shown in FIG. 5 is basically the same as the embodiment shown in FIG. 3 , that is, steps S500-S540, S560, S570 and S580 in FIG. 5 are the same as steps S300-S340, S360, S370 and S380 in FIG. 3 , The difference between the two is that in FIG. 3, the selection of the second-level transmission registration memory and the split dumping are performed one by one, while the embodiment shown in FIG.
  • S550 does not directly perform split transfer, but records the number of the selected second-level transmission registration memory, and calculates and records the largest data sub-block that can be divided by the selected second-level transmission registration memory, so that the maximum data sub-block can be divided based on the maximum data sub-block. size, and calculate the offset of the data sub-block that can be divided relative to the starting address in the first-level sending memory of the initial data block to be transmitted.
  • the pre-calculated segmentation of the initial data block to be transmitted ie, the preset segmentation method
  • the The initial data block to be transmitted is divided and transferred to the selected corresponding second-level sending registration memory at one time.
  • FIG. 6 shows a flowchart of a data transmission method for a static network according to a fourth embodiment of the present disclosure.
  • the embodiment shown in FIG. 5 is basically the same as the embodiment shown in FIG. 3 , that is, steps S500-S540, S560, S570 and S580 in FIG. 5 are the same as steps S300-S340, S360, S370 and S380 in FIG. 3 , The difference between the two is that in FIG. 3, the selection of the second-level transmission registration memory and the split dumping are performed one by one, while the embodiment shown in FIG.
  • S550 does not directly perform split transfer, but records the number of the selected second-level transmission registration memory, and calculates and records the largest data sub-block that can be divided by the selected second-level transmission registration memory, so that the maximum data sub-block can be divided based on the maximum data sub-block. size, and calculate the offset of the data sub-block that can be divided relative to the starting address in the first-level sending memory of the initial data block to be transmitted.
  • the pre-calculated segmentation of the initial data block to be transmitted ie, the preset segmentation method
  • the The initial data block to be transmitted is divided and transferred to the selected corresponding second-level sending registration memory at one time. .
  • the objects of the present disclosure can also be achieved by running a program or set of programs on any computing device.
  • the computing device may be a known general purpose device. Therefore, the objects of the present disclosure can also be achieved merely by providing a program product containing program code for implementing the method or apparatus. That is, such a program product also constitutes the present disclosure, and a storage medium in which such a program product is stored also constitutes the present disclosure.
  • the storage medium can be any known storage medium or any storage medium developed in the future.
  • each component or each step can be decomposed and/or recombined. These disaggregations and/or recombinations should be considered equivalents of the present disclosure. Also, the steps of executing the above-described series of processes can naturally be executed in chronological order in the order described, but need not necessarily be executed in chronological order. Certain steps may be performed in parallel or independently of each other.

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  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

本发明公开了一种静态网络中的数据传输系统,所述静态网络至少包括一个数据发送设备和一个数据接收设备。所述数据发送设备的数据分割转存单元用于在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存,并按照所选择的第二级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块转存到所选择的第二级发送注册内存中。所述数据接收设备的数据合并转存单元将其第二级接收注册内存组中接收到的数据子块按照从大到小顺序合并转存到其第一级接收内存中。

Description

静态网络中的数据传输系统及其方法 技术领域
本公开涉及一种数据传输技术,更具体地说,本公开涉及一种用于静态网络中用于节省数据传输开销的数据传输系统及其方法。
背景技术
随着分布式计算的普及,大型的作业会通过分割而将不同部分的数据部署到不同的分布式数据处理系统的各个计算设备上进行处理,这样,在具体作业的处理过程中,部署在一个计算设备上的计算中间参数或结果会成为另一个计算设备上的计算任务的输入数据,这样为了实现中间参数的数据同步,这会引起计算设备之间的数据传输开销。而网络性能通信的性能不好,就会影响多机分布式数据处理架构的加速比和扩展性。
在静态分布式数据处理架构中,数据的搬运或传输都采用容量固定的注册内存。在进行数据传输的时候,通常是对整个注册内存的整个容量进行传输。但是,在实际数据处理过程中,为了保证注册内存不会导致内存溢出,通常所需存储的数据块不会超过注册内存的容量。而在静态网络中,注册内存的数据在被传输时,整个注册内存的容量将被传输。在这种情形下由于注册内存的数据块尺寸通常小于注册内存的容量,因此导致实际传输的数据量通常会大于注册内存内的实际数据块尺寸。例如,注册内存的容量为64M,而实际数据块的尺寸为16M,而在数据传输时,依然按照注册内存的整个容量64M进行传输,这就造成了大量的额外传输开销,也降低了传输效率。如果对所传输的内存采用动态申请方式,则会导致注册开销的上升。
因此,如何提高注册内存之间的数据传输效率,降低数据传输开销,对于静态网络而言是极为重要的,也是本领域急需解决的一个技术问题。
技术解决方案
本发明的目的是解决至少上述问题之一,具体而言,本公开提供一种静态网络中的数据传输系统,所述静态网络至少包括一个数据发送设备和一个数据接收设备,其中,所述数据发送设备包括:第一级发送内存,具有固定容量,用于存储待传输数据块;第二级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述第一级发送内存的固定容量,并包括两个容量为预定容量模量的第二级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的第二级发送注册内存;数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存,并按照所选择的第二级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块转存到所选择的第二级发送注册内存中;所述数据接收设备包括:第一级接收内存,具有与第一级发送内存相同的容量;第二级接收注册内存组,其包括与所述第二级发送注册内存组中的每一个对应并具有的相同的容量的第二级接收注册内存;以及数据合并转存单元,其将第二级接收注册内存组中接收到的数据子块按照从大到小顺序合并转存到第一级接收内存中;以及布置在每一对第二级发送注册内存与第二级接收注册内存之间的数据传输单元,在所选择的第二级发送注册内存被转存待发送的最大数据子块时,获得传输指令,将所选择的第二级发送注册内存内的最大数据子块发送到对应的第二级接收注册内存。
根据本公开的另一个方面,还提供了一种静态网络中的数据传输系统,所述静态网络至少包括一个数据发送设备和一个数据接收设备,其中,所述数据发送设备包括:第一级发送内存,具有预定容量,用于存储待传输数据块;第二级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述第一级发送内存的固定容量,并包括两个容量为预定容量模量的第二级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的第二级发送注册内存;数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存以及在所有第二级发送注册内存中没有其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存时从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存,并按照所选择的第二级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块转存到所选择的第二级发送注册内存中;所述数据接收设备包括:第一级接收内存,具有与第一级发送内存相同的容量;第二级接收注册内存组,其包括与所述第二级发送注册内存组中的每一个对应并具有的相同的容量的第二级接收注册内存;以及数据合并转存单元,其将第二级接收注册内存组中接收到的数据子块按照从大到小顺序合并转存到第一级接收内存中;以及布置在每一对第二级发送注册内存与第二级接收注册内存之间的数据传输单元,在所选择的第二级发送注册内存被转存待发送的最大数据子块时,获得传输指令,将所选择的第二级发送注册内存内的最大数据子块发送到对应的第二级接收注册内存。
根据本公开的又一个方面,提供了一种静态网络中的数据传输系统,所述静态网络至少包括一个数据发送设备和一个数据接收设备,其中,所述数据发送设备包括:第一级发送内存,具有预定容量,用于存储待传输数据块;第二级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述第一级发送内存的固定容量,并包括两个容量为预定容量模量的第二级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的第二级发送注册内存;数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存,并记录所选择的第二级发送注册内存以及按照所选择的第二级发送注册内存的容量从所述待传输数据块能够按序分割出的最大数据子块,以及基于所述记录将所有所能分割的最大数据子块对应转存到所选择的第二级发送注册内存中;所述数据接收设备包括:第一级接收内存,具有与第一级发送内存相同的容量;第二级接收注册内存组,其包括与所述第二级发送注册内存组中的每一个对应并具有的相同的容量的第二级接收注册内存;以及数据合并转存单元,其将第二级接收注册内存组中接收到的数据子块按照从大到小顺序合并转存到第一级接收内存中;以及布置在每一对第二级发送注册内存与第二级接收注册内存之间的数据传输单元,在所选择的第二级发送注册内存被转存待发送的最大数据子块时,获得传输指令,将所选择的第二级发送注册内存内的最大数据子块发送到对应的第二级接收注册内存。
根据本公开的又一个方面,提供了一种静态网络中的数据传输系统,所述静态网络至少包括一个数据发送设备和一个数据接收设备,其中,所述数据发送设备包括:第一级发送内存,具有预定容量,用于存储待传输数据块;第二级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述第一级发送内存的固定容量,并包括两个容量为预定容量模量的第二级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的第二级发送注册内存;数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存以及在所有第二级发送注册内存中没有其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存时从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存,并记录所选择的第二级发送注册内存以及按照所选择的第二级发送注册内存的容量从所述待传输数据块能够按序分割出的最大数据子块,以及基于所述记录将所有所能分割的最大数据子块对应转存到所选择的第二级发送注册内存中;所述数据接收设备包括:第一级接收内存,具有与第一级发送内存相同的容量;第二级接收注册内存组,其包括与所述第二级发送注册内存组中的每一个对应并具有的相同的容量的第二级接收注册内存;以及数据合并转存单元,其将第二级接收注册内存组中接收到的数据子块按照从大到小顺序合并转存到第一级接收内存中;以及布置在每一对第二级发送注册内存与第二级接收注册内存之间的数据传输单元,在所选择的第二级发送注册内存被转存待发送的最大数据子块时,获得传输指令,将所选择的第二级发送注册内存内的最大数据子块发送到对应的第二级接收注册内存。
根据本公开的又一个方面,提供了一种静态网络中的数据传输方法,包括:在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存;比照所选择的第二级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块,并将所分割出的最大数据子块转存到所选择的第二级发送注册内存中;在所选择的第二级发送注册内存被转存待发送的数据子块时,基于传输指令,将所选择的第二级发送注册内存内的最大数据子块发送到与所选择的第二级发送注册内存对应的第二级接收注册内存中;以及将第二级接收注册内存内的各个数据子块按照从大到小顺序合并转存到第一级接收内存中。
根据本公开的又一个方面,提供了一种静态网络中的数据传输方法,包括:在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存以及在所有第二级发送注册内存中没有其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存时从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存;比照所选择的第二级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块,并将所分割出的最大数据子块转存到所选择的第二级发送注册内存中;在所选择的第二级发送注册内存被转存待发送的数据子块时,基于传输指令,将所选择的第二级发送注册内存内的最大数据子块发送到与所选择的第二级发送注册内存对应的第二级接收注册内存中;以及将第二级接收注册内存内的各个数据子块按照从大到小顺序合并转存到第一级接收内存中。
根据本公开的又一个方面,提供了一种静态网络中的数据传输方法,包括:在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存;记录所选择的第二级发送注册内存以及按照所选择的第二级发送注册内存的容量从所述待传输数据块能够按序分割出的最大数据子块;基于所述记录,比照所选择的第二级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块,并将所有分割的最大数据子块对应转存到所选择的第二级发送注册内存中;在所选择的第二级发送注册内存被转存待发送的数据子块时,基于传输指令,将所选择的第二级发送注册内存内的最大数据子块发送到与所选择的第二级发送注册内存对应的第二级接收注册内存中;以及将第二级接收注册内存内的各个数据子块按照从大到小顺序合并转存到第一级接收内存中。
根据本公开的又一个方面,提供了一种静态网络中的数据传输方法,包括:在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存以及在所有第二级发送注册内存中没有其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存时从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存;记录所选择的第二级发送注册内存以及按照所选择的第二级发送注册内存的容量从所述待传输数据块能够按序分割出的最大数据子块;基于所述记录,比照所选择的第二级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块,并将所有分割的最大数据子块对应转存到所选择的第二级发送注册内存中;在所选择的第二级发送注册内存被转存待发送的数据子块时,基于传输指令,将所选择的第二级发送注册内存内的最大数据子块发送到与所选择的第二级发送注册内存对应的第二级接收注册内存中;以及将第二级接收注册内存内的各个数据子块按照从大到小顺序合并转存到第一级接收内存中。
根据本公开的又一个方面,提供了一种静态网络中的数据传输复用组件,所述静态网络包括多对主级发送内存和接收注册内存,所述数据传输复用组件包括:次级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述主级发送内存的固定容量,并包括两个容量为预定容量模量的次级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的次级发送注册内存;数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的次级发送注册内存容量时从两个容量为预定容量模量的次级发送注册内存中选择专用于存储余量的次级发送注册内存,否则从所有次级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大次级发送注册内存,并按照所选择的次级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块转存到所选择的次级发送注册内存中;次级接收注册内存组,其包括与所述次级发送注册内存组中的每一个对应并具有的相同的容量的次级接收注册内存;布置在每一对次级发送注册内存与次级接收注册内存之间的数据传输单元,在所选择的次级发送注册内存被转存待发送的最大数据子块时,获得传输指令,将所选择的次级发送注册内存内的最大数据子块发送到对应的次级接收注册内存;以及数据合并转存单元,其将次级接收注册内存组中接收到的数据子块按照从大到小顺序合并转存到所述主级接收内存之一中。
根据本公开的又一个方面,提供了一种静态网络中的数据传输复用组件,所述静态网络包括多对主级发送内存和接收注册内存,所述数据传输复用组件包括:次级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述主级发送内存的固定容量,并包括两个容量为预定容量模量的次级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的次级发送注册内存;数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的次级发送注册内存容量时从两个容量为预定容量模量的次级发送注册内存中选择专用于存储余量的次级发送注册内存,否则从所有次级发送注册内存中选择其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的次级发送注册内存以及在所有次级发送注册内存中没有其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的次级发送注册内存时从所有次级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大次级发送注册内存,并按照所选择的次级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块转存到所选择的次级发送注册内存中;次级接收注册内存组,其包括与所述次级发送注册内存组中的每一个对应并具有的相同的容量的次级接收注册内存;布置在每一对次级发送注册内存与次级接收注册内存之间的数据传输单元,在所选择的次级发送注册内存被转存待发送的最大数据子块时,获得传输指令,将所选择的次级发送注册内存内的最大数据子块发送到对应的次级接收注册内存;以及数据合并转存单元,其将次级接收注册内存组中接收到的数据子块按照从大到小顺序合并转存到所述主级接收内存之一中。
根据本公开的又一个方面,提供了一种静态网络中的数据传输复用组件,所述静态网络包括多对主级发送内存和接收注册内存,所述数据传输复用组件包括:次级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述主级发送内存的固定容量,并包括两个容量为预定容量模量的次级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的次级发送注册内存;数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的次级发送注册内存容量时从两个容量为预定容量模量的次级发送注册内存中选择专用于存储余量的次级发送注册内存,否则从所有次级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大次级发送注册内存,并记录所选择的次级发送注册内存以及按照所选择的次级发送注册内存的容量从所述待传输数据块能够按序分割出的最大数据子块,以及基于所述记录将所有所能分割的最大数据子块对应转存到所选择的次级发送注册内存中;次级接收注册内存组,其包括与所述次级发送注册内存组中的每一个对应并具有的相同的容量的次级接收注册内存;布置在每一对次级发送注册内存与次级接收注册内存之间的数据传输单元,在所选择的次级发送注册内存被转存待发送的最大数据子块时,获得传输指令,将所选择的次级发送注册内存内的最大数据子块发送到对应的次级接收注册内存;以及数据合并转存单元,其将次级接收注册内存组中接收到的数据子块按照从大到小顺序合并转存到所述主级接收内存之一中。
根据本公开的又一个方面,提供了一种静态网络中的数据传输复用组件,所述静态网络包括多对主级发送内存和接收注册内存,所述数据传输复用组件包括:次级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述主级发送内存的固定容量,并包括两个容量为预定容量模量的次级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的次级发送注册内存;数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的次级发送注册内存容量时从两个容量为预定容量模量的次级发送注册内存中选择专用于存储余量的次级发送注册内存,否则从所有次级发送注册内存中选择其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的次级发送注册内存以及在所有次级发送注册内存中没有其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的次级发送注册内存时从所有次级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大次级发送注册内存,并记录所选择的次级发送注册内存以及按照所选择的次级发送注册内存的容量从所述待传输数据块能够按序分割出的最大数据子块,以及基于所述记录将所有所能分割的最大数据子块对应转存到所选择的次级发送注册内存中;次级接收注册内存组,其包括与所述次级发送注册内存组中的每一个对应并具有的相同的容量的次级接收注册内存;布置在每一对次级发送注册内存与次级接收注册内存之间的数据传输单元,在所选择的次级发送注册内存被转存待发送的最大数据子块时,获得传输指令,将所选择的次级发送注册内存内的最大数据子块发送到对应的次级接收注册内存;以及数据合并转存单元,其将次级接收注册内存组中接收到的数据子块按照从大到小顺序合并转存到所述主级接收内存之一中。
根据本公开的又一个方面,提供了一种静态网络中的传输数据的分割系统,所述静态网络至少包括一个数据发送设备和一个数据接收设备,其中所述分割系统包括:第一级发送内存,具有预定固定容量,用于存储待传输数据块;第二级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述第一级发送内存的固定容量,并包括两个容量为预定容量模量的第二级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的第二级发送注册内存;以及数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存,并按照所选择的第二级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块转存到所选择的第二级发送注册内存中。
根据本公开的又一个方面,提供了一种静态网络中的传输数据的分割系统,所述静态网络至少包括一个数据发送设备和一个数据接收设备,其中所述分割系统包括:第一级发送内存,具有预定固定容量,用于存储待传输数据块;第二级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述第一级发送内存的固定容量,并包括两个容量为预定容量模量的第二级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的第二级发送注册内存;以及数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存以及在所有第二级发送注册内存中没有其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存时从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存,并按照所选择的第二级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块转存到所选择的第二级发送注册内存中。
根据本公开的又一个方面,提供了一种静态网络中的传输数据的分割系统,所述静态网络至少包括一个数据发送设备和一个数据接收设备,其中所述分割系统包括:第一级发送内存,具有预定容量,用于存储待传输数据块;第二级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述第一级发送内存的固定容量,并包括两个容量为预定容量模量的第二级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的第二级发送注册内存;以及数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存,并记录所选择的第二级发送注册内存以及按照所选择的第二级发送注册内存的容量从所述待传输数据块能够按序分割出的最大数据子块,以及基于所述记录将所有所能分割的最大数据子块对应转存到所选择的第二级发送注册内存中。
根据本公开的又一个方面,提供了一种静态网络中的传输数据的分割系统,所述静态网络至少包括一个数据发送设备和一个数据接收设备,其中所述分割系统包括:第一级发送内存,具有预定固定容量,用于存储待传输数据块;第二级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述第一级发送内存的固定容量,并包括两个容量为预定容量模量的第二级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的第二级发送注册内存;以及数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存以及在所有第二级发送注册内存中没有其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存时从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存,并记录所选择的第二级发送注册内存以及按照所选择的第二级发送注册内存的容量从所述待传输数据块能够按序分割出的最大数据子块,以及基于所述记录将所有所能分割的最大数据子块对应转存到所选择的第二级发送注册内存中。
有益效果
通过本公开的静态网络中的数据传输系统和方法,将大块的数据分割成多个小块数据,并将小块数据转存到注册内容容量更小的第二级发送注册内存中,如此,在数据传输时,仅仅发送其中转存了数据子块的第二级发送注册内存的容量大小的数据,从而使得实际传输的容量完全等于或非常接近于所要传输数据块的尺寸,消除了对第一级发送内存中空白部分容量的无效发送,从而降低了在静态网络中,注册内存之间数据传输的开销,提升了数据传输的效率,也进一步提升了整个静态网络数据处理的速度。
而且,采用根据本公开的用于静态网络中的数据传输复用组件,不需要在每对主级发送内存和接收注册内存之间设置各自对应的包含、次级发送注册内存组、数据分割转存单元、次级接收注册内存组、数据合并转存单元以及在每对级发送注册内存与次级接收注册内存之间的数据传输单元的数据传输组件,通过在多对主级发送内存和接收注册内存之间进行分时复用,可以有效减少对设置次级发送注册内存组和次级接收注册内存组的需要,有效降低了资源的需求量,从而能够降低设备成本。
本发明的其它优点、目标和特征将部分通过下面的说明体现,部分还将通过对本发明的研究和实践而为本领域的技术人员所理解。
附图说明
图1所示的是根据本公开的静态网络的数据传输系统的原理结构示意图。
图2所示的是根据本公开的静态网络的数据传输复用组件的原理结构示意图。
图3所示的是根据本公开的第一实施例的用于静态网络的数据传输方法的流程图。
图4所示的是根据本公开的第二实施例的用于静态网络的数据传输方法的流程图。
图5所示的是根据本公开的第三实施例的用于静态网络的数据传输方法的流程图。
图6所示的是根据本公开的第四实施例的用于静态网络的数据传输方法的流程图。
本发明的实施方式
下面结合实施例和附图对本发明做进一步的详细说明,以令本领域技术人员参照说明书文字能够据以实施。
这里将详细地对示例性实施例进行说明,其示例表示在附图中。下面的描述涉及附图时,除非另有表示,不同附图中的相同数字表示相同或相似的要素。以下示例性实施例中所描述的实施方式并不代表与本公开相一致的所有实施方式。相反,它们仅是与如所附权利要求书中所详述的、本公开的一些方面相一致的装置和方法的例子。
在本公开使用的术语是仅仅出于描述特定实施例的目的,而非旨在限制本公开。在本公开和所附权利要求书中所使用的单数形式的“一种”、“所述”和“该”也旨在包括多数形式,除非上下文清楚地表示其他含义。还应当理解,本文中使用的术语“和/或”是指并包含一个或多个相关联的列出项目的任何或所有可能组合。
应当理解,尽管在本公开可能采用术语第一、第二、第三等来描述各种信息,但这些信息不应限于这些术语。这些术语仅用来将同一类型的信息彼此区分开。此外,在提到“第一”时,并不意味存在“第二”,有时候采用第一或第二仅仅是为了简化表述。例如,在不脱离本公开范围的情况下,在下文中,两个可能设备之一可以被称为次级发送注册内存01也可以被称为次级发送注册内存02,类似地,两个可能设备的之一可以被称为第二计算设备也可以被称为第一计算设备。取决于语境,如在此所使用的词语“如果”可以被解释成为“在……时”或“当……时”或“响应于确定”。
为了使本领域技术人员更好地理解本公开,下面结合附图和具体实施方式对本公开作进一步详细说明。
图1所示的是根据本公开的静态网络的数据传输系统的原理结构示意图。如图1所示,根据本公开的静态网络的数据传输系统部署在构成静态网络的第一计算设备和第二计算设备上。为了方便描述,图1中仅仅显示了两个计算设备上的各自的数据发送设备和数据接收设备,各个计算设备上的其他常规配置单元省略,以便简化视图。实际上可以有多个计算设备,例如3、4、5甚至更多,同一个计算设备上也可以有多个数据发送设备和/或多个数据接收设备。每个计算设备上基本上都具有相同的构成组件。
如图1所示,在静态网络系统中,为了实现数据的流式传输,在不同的计算设备之间的需要进行数据搬运的数据的缓存采用注册内存进行缓存。作为一个实例,在需要发送数据的计算设备上的数据发送设备100会为要发送的数据注册一块固定容量的内存。在一个计算设备上,会存在多个计算单元或计算执行体所产生的数据将要被发送到另一个计算设备上的计算单元或计算执行体,以便被另一个计算单元或计算执行体执行运算时使用。为了在静态计算网络中实现流式数据搬运,对这种跨计算机的搬运的数据确定固定的地址,因此需要注册内存进行锁定。如图1所示,数据发送设备100包含了第一级发送内存。通常这种内存注册申请的大小为128M或64M。也可以为其他尺寸注册内存,例如127M或129M。第一级发送内存的容量通常是数据传输系统规定容量模量的整数倍,也可以不是数据传输系统规定容量模量的整数倍。该容量模量B例如为8M或4M。作为本公开的实例之一,为描述简便起见,设置B为8M。对等地,在数据接收设备200一侧设置有第一级接收内存,容量通常注册申请为128M或64M。
在通常情况下,在第一级发送内存和第一级接收内存之间,设置一个数据传输单元,以便在第一级发送内存中获得待传输的数据块时,数据传输单元获得消息,并基于该消息将包含待传输的数据块的第一级发送内存的整个数据容量(例如,128M)整体采用RDMA协议方式传输到第一级接收内存。此时,由于数据的传输采用整体直接内存访问方式,因此,数据的传输量为整个注册内存的容量,这要比该发送注册内存内存储的数据块的尺寸(例如50M)大得多。静态计算网络中的设备间数据传输无法采用动态内存在存储这些数据块(动态内存能够基于数据大小来申请内存容量),这就导致了静态计算网络中的设备间数据传输会浪费大量的传输开销,例如上述实例中会浪费78M的传输开销。
为了减少这种浪费,本公开在数据发送设备100中第一级发送内存设置了多个第二级发送注册内存,形成一个第二级发送注册内存组。在第一级发送内存与第二级发送注册内存组之间布置有数据分割转存单元。在静态计算网络系统中,各个执行组件之间采用消息通讯方式进行执行的启动。例如使用第一级发送内存的数据执行体在将数据存储到第一级发送内存的同时,会向数据分割转存单元发送消息,通过消息告知数据分割转存单元第一级发送内存已经缓存了数据,其可以对第一级发送内存中的数据执行操作。数据分割转存单元管理从属于其的第二级发送注册内存组。通俗而言,数据分割转存单元将其运行产生的数据针对性地存储到第二级发送注册内存组中的一个或多个第二级发送注册内存中。
第二级发送注册内存组中的每一个容量为一预定容量模量B的整数倍。作为一种实例,第二级发送注册内存01的容量为64M、第二级发送注册内存02的容量为32M、第二级发送注册内存03的容量为16M、第二级发送注册内存04的容量为8M,第二级发送注册内存05的容量为8M。在这两个8M的第二级发送注册内存中,其中一个被指定专门用于存储分割余量。第二级发送注册内存组的总容量为第一级发送内存组的容量128M。因此,在第二级发送注册内存组中包括两个容量为基本容量模量的第二级发送注册内存以及多个以基本容量模量为基数的等比例增加的第二级发送注册内存。如果预定容量模量为B,等比比例为A,则第二级发送注册内存组中的每个第二级发送注册内存的容量从小到大依次为B、B、BA、BA 2、BA 3、BA 4、…。通常该比例系数为2。
一般情况下,第二级发送注册内存组的总容量等于所述第一级发送内存的固定容量,也可以大于所述第一级发送内存的固定容量,但是两者之间的差值不大于一个基本容量模量。因此,尽管在图1中显示第二级发送注册内存组中有六个第二级发送注册内存,但是可以根据实际情况设置,例如只有四个、五个、七个等等。如果第一级发送内存组的容量为128M,而模量B为4M,则第二级发送注册内存组中就会有六个第二级发送注册内存。如图1所示,六个第二级发送注册内存的容量从小到大依次为4M、4M、8M、16M、32M以及64M。同样,这两个4M的第二级发送注册内存中,其中一个被指定用于存储分割余量。
数据分割转存单元在获得第一级发送内存所属的执行单元或执行体(未示出)发出的消息时,开始对第一级发送内存中的待传输的数据块进行分割处理,具体而言基于其所具有的第二级发送注册内存组中所有第二级发送注册内存的容量与所述第一级发送内存中存储的待传输数据块的尺寸进行比较。选择所有第二级发送注册内存中容量与所述第一级注册内存中存储的待传输数据块的尺寸之差的绝对值最小的第二级发送注册内存,并基于所选择的第二级发送注册内存的容量从所述第一级发送内存中存储的待传输数据块的起始地址分割所述待传输数据块获得最大数据子块,从而将所分割的最大数据子块转存到所选择的第二级发送注册内存。这样是为了最大利用第二级发送注册内存的容量。举例而言,如果B为8M,待传输数据块为57M,按照上述五个第二级发送注册内存,第二级发送注册内存01的容量为64M,其与待传输数据块为57M之间的差值为7M,与其他第二级发送注册内存之差为25M、31M、49M以及49M,因此,由于第二级发送注册内存01的容量为64M大于待传输数据块57M,并且其差值小于基本的容量模量B,因此,选择第二级发送注册内存01作为数据块的转存目的地能够最大限定减少数据传输时浪费的开销。很显然,为了一次性分割出最大的数据子块并且能够只进行一次数据传输,可以选择第二级发送注册内存01作为转存目的地注册内存,从而直接将待传输数据块整体作为一个57M的数据子块转存到第二级发送注册内存01,这样在后续数据传输时,传输的数据块的总尺寸为64M,这相对于直接传输128M的第一级发送内存的容量的数据,实际传输的数据量则减少了一半,即64M,浪费的传输开销也从71M减少为7M。这就极大地提高的数据传输的速率和效率。而且这种选择方式可以一次将待传输数据块一次性转存到所选择的第二级发送注册缓存01中而不需要进行后续的选择,也减少了选择分割转存的运算开销。数据分割转存单元在进行分割时,如果该数据块大小过小,例如小于最小的第二级发送注册内存的容量,即预定的容量模量,则直接选择专用于转存数据块分割余量的。
尽管上述选择方式虽然可以一次性选择第二级发送注册内存,但是其依然存在后续数据传输过程中存在的开销浪费,因此,可选择地,可以选择容量小于待传输数据块的第二级发送注册内存中容量最大的第二级发送注册内存。因此,举例而言,如果B为8M,待传输数据块为57M,第二级发送注册内存02将首先被选择。这样,首先从待传输数据块为57M的比照容量为32M的第二级发送注册内存02按照存储地址顺序开始分割最大的数据子块,即32M,此后所述待传输数据块还剩下25M。此后针对剩余的待传输数据块,再次按照选择容量小于待传输数据块的第二级发送注册内存中容量最大的第二级发送注册内存的方式进行选择,从而选择16M的第二级发送注册内存03。同样,针对9M剩余的待传输数据块,再次按照选择容量小于待传输数据块的第二级发送注册内存中容量最大的第二级发送注册内存的方式进行选择,从而选择8M的第二级发送注册内存之一,例如第二级发送注册内存04或05。最后为仅剩的1M待传输数据块选择最后一个8M的第二级发送注册内存,例如第二级发送注册内存05或04。通过这种在最后一次选择之前都进行充满所选第二级发送注册内存的方式,使得实际传输的数据量和初始待传输的数据块的尺寸之差极小,例如上述例子中仅仅多了7M。也就是说,采用这种选个分割方式,能够在后续的传输过程中,将原本需要传输128M的数据减少到只需要传输64M。
采用这种方式,当初始待传输的数据块为基本容量模数的整数倍时,将能够完整分割到第二级发送注册内存组中而不会造成任何多余的数据传输开销。例如,对于48M的待传输数据块,可以选择32M的第二级发送注册内存02以及16M的二级发送注册内存03作为转存目的地注册内存。这样,尽管进行了两次转存并需要进行两次单独的数据传输,但是在数据传输过程中并没有产生任何多余的数据传输,实际数据的传输注册内存的容量之和正好等于待传输数据块的尺寸,没有造成任何额外的数据传输开销。
综上所述,通俗而言,数据分割转存单元将其所具有的第二级发送注册内存组中所有第二级发送注册内存的容量当作选择窗口一一去比量所述第一级注册内存中存储的待传输数据块,哪个第二级发送注册内存框定的数据子块最大,则首先选择该第二级发送注册内存作为将被转存的目的地。在选择和分割处最大的数据子块转存之后,如果第一级发送内存的待传输数据块还有剩余部分,则针对该剩余的数据块再次采用数据分割转存单元将其所具有的第二级发送注册内存组中所有第二级发送注册内存的容量当作选择窗口一一去比量所述第一级注册内存中存储的待传输数据块,哪个第二级发送注册内存框定的数据子块最大,则首先选择该第二级发送注册内存作为将被转存的目的地。如此反复,直到所述第一级注册内存中存储的待传输数据块被分割转存完毕为止。这样分割转存之后,实际使用的注册内存容量与初始待传输数据块的尺寸之差不会超过为第二级发送注册内存组设定的基本容量模数,因此导致的传输开销浪费量也不会超过设定的B值。
可选择地,数据分割转存单元可以在每次做出第二级发送注册内存的选择后,记录所选择的第二级发送注册内存的编号,以及其能够分割的最大数据子块的尺寸,并按照分割顺序累计相对于初始待传输数据块的起始指针的偏移量,从而记录所选择的每个第二级发送注册内存将要从初始待传输数据块中所分割的数块的起点和终点。当传输数据块被预计分割完成后,按照所记录的所选择的第二级发送注册内存的编号以及对应的分割起始偏移量和分割终点偏移量进行实际分割并将所有分割出的数据子块一次性转存到对应所选择的第二级发送注册内存。
这样,在数据分割转存单元将所述第一级注册内存中存储的待传输数据块分割并转存到第二级发送注册内存组中的一个或多个第二级发送注册内存中后,或者在数据分割转存单元将一个最大数据子块分割并转存到其中一个第二级发送注册内存之后,会向作为数据子块转存目的地的第二级发送注册内存所连接的数据传输单元,例如第二级发送注册内存01所连接的数据传输单元01,发送消息,从而数据传输单元01基于该消息就执行数据传输处理,从而将第二级发送注册内存01内的最大数据子块传输到对应的数据接收设备200的第二级接收注册内存01中。
数据传输单元01在将最大数据子块从第二级发送注册内存01传输到第二级接收注册内存01中的同时,会向数据接收设备200的数据合并转存单元发送消息。数据合并转存单元基于该消息对第二级接收注册内存01中的最大数据子块执行转存处理,从而按序转存到第一级接收内存中。最后当被分割转存到第二级接收注册内存组中的所有分割数据子块都按序转存到第一级接收内存中时,就重新组成为一个整体数据块,该数据块与第一级发送内存中的待传输数据块相同。
尽管上面以第二级发送注册内存01、数据传输单元01以及第二级接收注册内存01描述了数据块被分割、选择转存、传输以及合并的过程,但是同样的过程在其他传输路径中处理过程一样。例如当第二级发送注册内存03被选择时,被分割的最大数据子块被转存到其中,随后数据传输单元03将最大数据子块传输到第二级接收注册内存03中,最后被转存合并到第一级接收内存中。此外,图1中的数据传输系统的发送端可以直接单独形成一个完整的传输数据的分割系统,用于将数据分割成多个数据进行分别发送,从而减少传输开销的浪费。
图2所示的是根据本公开的静态网络的数据传输复用组件的原理结构示意图。如图2所示数据传输复用组件300输入端连接多个主级发送内存,例如主级发送内存01、主级发送内存02、主级发送内存03、主级发送内存04等等。数据传输复用组件300输出端连接多个主级接收内存,例如主级接收内存01、主级接收内存02、主级接收内存03、主级接收内存04等等。数据传输复用组件300包括数据分割转存单元、次级发送注册内存组、数据传输单元组、次级接收注册内存组以及数据合并转存单元。所述次级发送注册内存组包括多个次级发送注册内存。通常次级发送注册内存组的总容量等于所述主级发送内存的固定容量。
一般情况下,次级发送注册内存组的总容量等于所述主级发送内存的固定容量,也可以大于所述主级发送内存的固定容量,但是两者之间的差值不大于一个基本容量模量。尽管图2中显示为6个,但是可以根据实际情况设置,例如只有四个、五个、七个次级发送注册内存等等。如果第一级发送内存组的容量为128M,而模量B为4M,则第二级发送注册内存组中就会有六个次级发送注册内存。如图2所示,六个次级发送注册内存的容量从小到大依次为4M、4M、8M、16M、32M以及64M。如果模量B为8M,则次级发送注册内存01的容量为64M、次级发送注册内存02的容量为32M、次级发送注册内存03的容量为16M、次级发送注册内存04的容量为8M以及次级发送注册内存05的容量为8M。如果B为2M,则次级发送注册内存05的容量为4M、次级发送注册内存06的容量为2M,因此为七个次级发送注册内存。次级发送注册内存组的所有次级发送注册内存的容量之和等于所有主级发送内存中的最大固定容量。因此,次级发送注册内存组的所有次级发送注册内存的容量之和可大于所有所述主级发送内存中的一些的主级发送内存固定容量。
次级接收注册内存组与次级发送注册内存组对应设置。次级接收注册内存组包括与所述次级发送注册内存组中的每一个对应并具有的相同的容量的次级接收注册内存。当任意一个主级发送内存中存储的待传输数据块时,数据分割转存单元对待传输数据块执行分割转存处理。数据分割转存单元按照时序逐一处理每个主级发送内存中存储的待传输数据块。具体而言,数据分割转存单元比较所述主级发送内存中存储的待传输数据块的尺寸与所述次级发送注册内存组中的每一个次级发送注册内存的容量,从所有次级发送注册内存中选择其容量与所述主级发送内存中存储的待传输数据块的尺寸之差值的绝对值最小的一个次级发送注册内存,并基于所选择的次级发送注册内存的容量从所述主级发送内存中存储的待传输数据块按序分割出的最大数据子块转存到所选择的次级发送注册内存中。
如图2所示,举例而言,主级发送内存03中存储的待传输数据块为74M,则数据分割转存单元通过比较次级发送注册内存组内的次级发送注册内存的容量与74M的待传输数据块,获得待传输数据块尺寸与64M的次级发送注册内存01、32M的次级发送注册内存02、16M的次级发送注册内存03、8M的次级发送注册内存04和05的容量之差依次为10M、42M、58M、66M以及66M。数据分割转存单元首先选择次级发送注册内存01作为转存目的地注册内存,因为其差值最小,能够在不浪费存储空间的情况下存储最大的数据子块。因此,数据分割转存单元从待传输数据块的开始地址分割出64M作为最大的数据子块转存到次级发送注册内存01。此时主级发送内存03中还剩余10M的数据。对此,数据分割转存单元通过比较次级发送注册内存组内的次级发送注册内存的容量与10M的剩余的待传输数据块,获得待传输数据块尺寸与32M的次级发送注册内存02、16M的次级发送注册内存03、8M的次级发送注册内存04和05的容量之差依次为22M、6M、2M以及2M。数据分割转存单元再次选择次级发送注册内存04或05作为转存目的地注册内存,因为其差值最小,能够在不浪费存储空间的情况下存储最大的数据子块。因此,数据分割转存单元从剩余待传输数据块的起始地址分割出8M作为最大的数据子块转存到次级发送注册内存04。最后,数据分割转存单元通过比较次级发送注册内存组内的次级发送注册内存的容量与2M的剩余的待传输数据块,获得待传输数据块尺寸与32M的次级发送注册内存02、16M的次级发送注册内存03、8M的次级发送注册内存04或05的容量之差依次为30M、14M、0M。数据分割转存单元再次选择次级发送注册内存04或05作为转存目的地注册内存,因为其差值最小,能够在不浪费存储空间的情况下存储最大的数据子块。因此,通过逐级分割,最后为待传输数据块选择的次级发送注册内存01、04和05。这样,在后续数据传输过程中,仅仅需要传输80M的数据量,这相对于直接传输主级发送内存的128M减少了48M。尽管这样减少了48M的数据传输量,但是依然存在比实际数据量多6M的传输开销。为此,可选择的,为了减少数据分割的次数,在剩余传输数据为10M时,可以通过直接选择16M的次级发送注册内存03,其选择条件为选择容量大于待传输数据块或剩余的待传输数据块(例如10M)且两者之差值6M小于预定容量模量B(8M)的次级发送注册内存。这样,针对74M的初始待传输数据块,最终选择了次级发送注册内存01以及03。尽管在这种选择方式下最终后续传输的数据量依然是80M,但是其减少了选择分割操作的次数,也提高了运算效率。如果B为4M或2M,则在10M剩余待传输数据块与16M的次级发送注册内存03之间6M差值大于4M或2M的B,因此次级发送注册内存03不会被选择,而是会继续从更小的次级发送注册内存中进行选择,例如选择8M次级发送注册内存04以及4M的次级发送注册内存05或06(B为4M),或者选择8M次级发送注册内存04以及2M的次级发送注册内存06或07(B为2M)。在B为2M的情况下,对于74M的初始待传输数据块,将不会出现任何传输开销的浪费。
这样,在数据分割转存单元将所述主级注册内存中存储的待传输数据块分割并转换到次级发送注册内存组中的一个或多个次级发送注册内存中后,或者在数据分割转存单元将一个最大数据子块分割并转存到其中一个次级发送注册内存之后,会向作为数据子块转存目的地的次级发送注册内存所连接的数据传输单元,例如次级发送注册内存01所连接的数据传输单元01,发送消息,从而数据传输单元01基于该消息就执行数据传输处理,将次级发送注册内存01内的最大数据子块传输到对应的数据接收设备200的次级接收注册内存01中。
数据传输单元01在将最大数据子块从次级发送注册内存01传输到次级接收注册内存01中的同时,会向数据合并转存单元发送消息。数据合并转存单元基于该消息对次级接收注册内存01中的最大数据子块执行转存处理,从而按序转存到主级接收内存03中。最后当被分割转存到次级接收注册内存组中的所有分割数据子块都按序转存到主级接收内存03中时,就重新组成为一个整体数据块,该数据块与主级发送内存03中的待传输数据块相同。
多个主级发送内存和对应数量的主级接收内存并联到根据本公开的数据传输复用组件300,能够减少对注册内存的消耗,降低了对内存资源的要求,同时也提高了次级发送注册内存和次级接收注册内存的利用率。
图3所示的是根据本公开的用于静态网络的数据传输方法的第一实施方式的流程图。如图3所示,在步骤S300处,数据分割转存单元获取第一级发送内存中存储的待传输数据块的尺寸。接着在步骤S310处,比较第一级发送内存中存储的待传输数据块的尺寸与第二级发送注册内存组中的每一个第二级发送注册内存的容量。随后在步骤S320处,基于比较结果确定待传输数据块的尺寸是否小于等于容量最小的第二级发送注册内存的容量,即是否小于或等于预定容量模量B。如果确定结果为“否”,则在步骤S330处,数据分割转存单元选择容量最大且小于待传输数据块尺寸的第二级发送注册内存。例如,在待传输数据块为48M,B为8M,则在步骤S320处确定结果为“否”,因此选择32M的第二级发送注册内存02。接着,在步骤S340处,数据分割转存单元比照所选择的第二级发送注册内存的容量,获取可分割的最大数据子块。具体而言,从第一发送注册内存中的待传输数据块中按照存储地址顺序分割出最大的数据子块,即获取其在第一发送注册内存中将要分割数据的起始地址偏移量和结束地址偏移量。如上所述,在待传输数据块为48M,B为8M时,则直接从在待传输数据块的开始地址开始分割出32M的最大数据子块。
接着,在步骤S350处,数据分割转存单元按照所获取的地址,分割最大数据子块并转存到所选择的第二级发送注册内存中。随后,在步骤S360处,数据分割转存单元基于其分割上述过程判断第一发送注册内存中的待传输数据块经过上述分割之后是否还存在剩余数据部分。如果判断结果为“否”,则结束本次分割转存处理,如果判断结果为“是”,则进程返回到步骤S300,将第一发送注册内存中剩余数据部分作为待传输数据块重新执行上述步骤。
如果在步骤S320确定结果为“是”,这意味着该待传输数据块只需要转存到用于存储分割余量的第二级发送注册内存中就可以将所有待传输数据块分割完成。因此,进程在步骤S390处,数据分割转存单元选择用于存储待传输数据块的余量的容量最小的第二级注册发送内存。随后进程回到步骤S340,在步骤S340处,数据分割转存单元比照所选择的第二级发送注册内存的容量,从第一发送注册内存中的待传输数据块中按照存储地址顺序分割出最大的数据子块。如果所选择的第二级发送注册内存的容量大于或等于第一发送注册内存中的待传输数据块且对应的绝对值小于预定容量模量B,则将待传输数据块整体作为该最大数据子块。
返回步骤S350。在步骤S350处,数据分割转存单元将所分割的最大数据子块转存到所选择的第二级发送注册内存中的同时,会向对应的数据传输单元发送消息,告知数据传输单元可以对其中转存了最大数据子块的第二级发送注册内存中的数据执行传输处理。由此,在步骤S370处,数据传输单元将第二级发送注册内存的整体容量的数据传输到对应的第二级接收注册内存。随后,在步骤S380处,数据合并转存单元将接收到最大数据子块的第二级接收注册内存中的数据按序转存到第一级接收内存中,从而最终合并出与第一级发送内存中初始待传输数据块相同的数据块。
上述数据分割转存单元将第一级发送内存中待传输数据块分割转存到第二级发送注册内存组中的第二级发送注册内存中的过程通过如下公式采用贪心算法来实现:
Figure 564470dest_path_image001
其中,X为第一级发送内存中待传输数据块的尺寸,
Figure 19722dest_path_image002
,R为第一级发送内存的容量。举例而言,当第一级发送内存容量为128M时,
Figure 981862dest_path_image003
,当第一级发送内存容量为64M时,
Figure 829863dest_path_image004
。其中B为一个预定的模量,例如通常可以取值为2M、4M或8M。在第二级接收注册内存组的第二级接收注册内存中,其容量最小的第二级接收注册内存的容量为B。
Figure 928269dest_path_image005
为进行选择时,容量最小的第二级接收注册内存的系数,
Figure 820002dest_path_image006
,其通常用来存储待传输数据块进行分割后剩余的小于预定容量模量的余量数据子块,或直接存储尺寸小于预定容量模量的初始待传输数据块。
Figure 941541dest_path_image007
为其他逐级增大的第二级接收注册内存的系数,其中,
Figure 842501dest_path_image008
,即为0或1。
Figure 782032dest_path_image009
也为容量最小的第二级接收注册内存的系数。
针对本公开,上述公式中,待传输数据尺寸X和对应每个第二级接收注册内存的容量为已知量,求解对象为对应每个第二级接收注册内存的系数。求解选择约束条件之一为待传输数据尺寸X是否小于第二级接收注册内存组中第二级接收注册内存之一的容量且两者差值是否小于预定容量模量B或者在相反情况下选择最大但小于待传输数据尺寸X的容量的第二级接收注册内存。通过贪心算法求解上述公式对应的各个第二级接收注册内存系数的值,当某个系数不为0时,则该系数对应的第二级接收注册内存被选择。由此,当第二级接收注册内存按照容量大小从大到小被选择时,比照所选择的第二级接收注册内存,总是分割出最大的数据子块。
图4所示的是根据本公开的用于静态网络的数据传输方法第二实施方式的流程图。如图4所示,在步骤S400处,数据分割转存单元获取第一级发送内存中存储的待传输数据块的尺寸。接着在步骤S410处,比较第一级发送内存中存储的待传输数据块的尺寸与第二级发送注册内存组中的每一个第二级发送注册内存的容量并计算两者之差值。随后在步骤S415处,基于比较结果确定待传输数据块的尺寸是否小于等于容量最小的第二级发送注册内存的容量,即是否小于或等于预定容量模量B。如果确定结果为“否”,在在步骤S420处,基于比较结果确定是否有差值小于预定容量模量B且对应第二级发送注册内存的容量大于待传输数据块的尺寸的情形。如果确定结果为“否”,则在步骤S430处,数据分割转存单元选择容量最大且小于待传输数据块尺寸的第二级发送注册内存。例如,在待传输数据块为48M,B为8M,则在步骤S415处确定结果为“否”,因此选择32M的第二级发送注册内存02。接着,在步骤S440处,数据分割转存单元比照所选择的第二级发送注册内存的容量,获取可分割的最大数据子块。具体而言,从第一发送注册内存中的待传输数据块中按照存储地址顺序分割出最大的数据子块,即获取其在第一发送注册内存中将要分割数据的起始地址偏移量和结束地址偏移量。如上所述,在待传输数据块为48M,B为8M时,则直接从在待传输数据块的开始地址开始分割出32M的最大数据子块。
接着,在步骤S450处,数据分割转存单元按照所获取的地址,分割最大数据子块并转存到所选择的第二级发送注册内存中。随后,在步骤S460处,数据分割转存单元基于其分割上述过程判断第一发送注册内存中的待传输数据块经过上述分割之后是否还存在剩余数据部分。如果判断结果为“否”,则结束本次分割转存处理,如果判断结果为“是”,则进程返回到步骤S400,将第一发送注册内存中剩余数据部分作为待传输数据块重新执行上述步骤。
如果在步骤S415确定结果为“是”,这意味待传输数据块只需要转存到用于存储分割余量的第二级发送注册内存中就可以将所有待传输数据块分割完成。因此,进程在步骤S490处,数据分割转存单元选择用于存储待传输数据块的余量的容量最小的第二级注册发送内存。随后进程回到步骤S440,在步骤S440处,数据分割转存单元比照所选择的第二级发送注册内存的容量,从第一发送注册内存中的待传输数据块中按照存储地址顺序分割出最大的数据子块。如果在步骤S420处确定结果为“是”,即存在第二级发送注册内存的容量大于或等于第一发送注册内存中的待传输数据块且对应的差值小于预定容量模量B,则将待传输数据块整体作为该最大数据子块,即进程在步骤S495处,数据分割转存单元选择差值小于预定容量模量B且该差值对应的容量大于所述待传输数据块尺寸的第二级注册发送内存。随后进程回到步骤S440。
返回步骤S450。在步骤S450处,数据分割转存单元将所分割的最大数据子块转存到所选择的第二级发送注册内存中的同时,会向对应的数据传输单元发送消息,告知数据传输单元可以对其中转存了最大数据子块的第二级发送注册内存中的数据执行传输处理。由此,在步骤S470处,数据传输单元将第二级发送注册内存的整体容量的数据传输到对应的第二级接收注册内存。随后,在步骤S480处,数据合并转存单元将接收到最大数据子块的第二级接收注册内存中的数据按序转存到第一级接收内存中,从而最终合并出与第一级发送内存中初始待传输数据块相同的数据块。
上述数据分割转存单元将第一级发送内存中待传输数据块分割转存到第二级发送注册内存组中的第二级发送注册内存中的过程通过如下公式采用贪心算法来实现:
Figure 110245dest_path_image001
其中,X为第一级发送内存中待传输数据块的尺寸,
Figure 453502dest_path_image002
,R为第一级发送内存的容量。举例而言,当第一级发送内存容量为128M时,
Figure 423732dest_path_image003
,当第一级发送内存容量为64M时,
Figure 965572dest_path_image004
。其中B为一个预定的模量,例如通常可以取值为2M、4M或8M。在第二级接收注册内存组的第二级接收注册内存中,其容量最小的第二级接收注册内存的容量为B。
Figure 667948dest_path_image005
为进行选择时,容量最小的第二级接收注册内存的系数,
Figure 311550dest_path_image006
,其通常用来存储待传输数据块进行分割后剩余的小于预定容量模量的余量数据子块,或直接存储尺寸小于预定容量模量的初始待传输数据块。
Figure 757575dest_path_image007
为其他逐级增大的第二级接收注册内存的系数,其中,
Figure 216238dest_path_image008
,即为0或1。
Figure 401101dest_path_image009
也为容量最小的第二级接收注册内存的系数。
针对本公开,上述公式中,待传输数据尺寸X和对应每个第二级接收注册内存的容量为已知量,求解对象为对应每个第二级接收注册内存的系数。求解选择约束条件之一为待传输数据尺寸X是否小于第二级接收注册内存组中第二级接收注册内存之一的容量且两者差值是否小于预定容量模量B或者在相反情况下选择最大但小于待传输数据尺寸X的容量的第二级接收注册内存。通过贪心算法求解上述公式对应的各个第二级接收注册内存系数的值,当某个系数不为0时,则该系数对应的第二级接收注册内存被选择。由此,当第二级接收注册内存按照容量大小从大到小被选择时,比照所选择的第二级接收注册内存,总是分割出最大的数据子块。
图5所示的是根据本公开的第三实施例的用于静态网络的数据传输方法的流程图。图5所示的实施例与图3所示的实施例基本相同,即图5中的步骤S500-S540、S560、S570及S580与图3中的步骤S300-S340、S360、S370及S380相同,两者的不同之处在于,图3是逐一进行第二级发送注册内存的选择以及进行分割转存,图5所示的实施例则是在每次选择第二级发送注册内存后,在步骤S550不是直接进行分割转存,而是记录所选择第二级发送注册内存编号,并计算并记录该所选择第二级发送注册内存能够分割的最大数据子块,从而基于该最大数据子块的尺寸,计算所能分割的数据子块相对于所述初始待传输数据块在第一级发送内存中起始地址的偏移量。最后,在对所述初始待传输数据块的预计计算的分割(即,预设分割方式)完成后,在步骤S565处,基于所记录的第二级发送注册内存以及地址偏移量,对所述初始待传输数据块一次性进行分割转存到所选择的对应的第二级发送注册内存。
图6所示的是根据本公开的第四实施例的用于静态网络的数据传输方法的流程图。图5所示的实施例与图3所示的实施例基本相同,即图5中的步骤S500-S540、S560、S570及S580与图3中的步骤S300-S340、S360、S370及S380相同,两者的不同之处在于,图3是逐一进行第二级发送注册内存的选择以及进行分割转存,图5所示的实施例则是在每次选择第二级发送注册内存后,在步骤S550不是直接进行分割转存,而是记录所选择第二级发送注册内存编号,并计算并记录该所选择第二级发送注册内存能够分割的最大数据子块,从而基于该最大数据子块的尺寸,计算所能分割的数据子块相对于所述初始待传输数据块在第一级发送内存中起始地址的偏移量。最后,在对所述初始待传输数据块的预计计算的分割(即,预设分割方式)完成后,在步骤S565处,基于所记录的第二级发送注册内存以及地址偏移量,对所述初始待传输数据块一次性进行分割转存到所选择的对应的第二级发送注册内存。。
以上结合具体实施例描述了本公开的基本原理,但是,需要指出的是,对本领域的普通技术人员而言,能够理解本公开的方法和装置的全部或者任何步骤或者部件,可以在任何计算装置(包括处理器、存储介质等)或者计算装置的网络中,以硬件、固件、软件或者它们的组合加以实现,这是本领域普通技术人员在阅读了本公开的说明的情况下运用他们的基本编程技能就能实现的。
因此,本公开的目的还可以通过在任何计算装置上运行一个程序或者一组程序来实现。所述计算装置可以是公知的通用装置。因此,本公开的目的也可以仅仅通过提供包含实现所述方法或者装置的程序代码的程序产品来实现。也就是说,这样的程序产品也构成本公开,并且存储有这样的程序产品的存储介质也构成本公开。显然,所述存储介质可以是任何公知的存储介质或者将来所开发出来的任何存储介质。
还需要指出的是,在本公开的装置和方法中,显然,各部件或各步骤是可以分解和/或重新组合的。这些分解和/或重新组合应视为本公开的等效方案。并且,执行上述系列处理的步骤可以自然地按照说明的顺序按时间顺序执行,但是并不需要一定按照时间顺序执行。某些步骤可以并行或彼此独立地执行。
上述具体实施方式,并不构成对本公开保护范围的限制。本领域技术人员应该明白的是,取决于设计要求和其他因素,可以发生各种各样的修改、组合、子组合和替代。任何在本公开的精神和原则之内所作的修改、等同替换和改进等,均应包含在本公开保护范围之内。

Claims (10)

  1. 一种静态网络中的数据传输系统,所述静态网络至少包括一个数据发送设备和一个数据接收设备,其中,
    所述数据发送设备包括:
    第一级发送内存,具有固定容量,用于存储待传输数据块;
    第二级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述第一级发送内存的固定容量,并包括两个容量为预定容量模量的第二级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的第二级发送注册内存;
    数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存,并按照所选择的第二级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块转存到所选择的第二级发送注册内存中;
    所述数据接收设备包括:
    第一级接收内存,具有与第一级发送内存相同的容量;
    第二级接收注册内存组,其包括与所述第二级发送注册内存组中的每一个对应并具有的相同的容量的第二级接收注册内存;以及
    数据合并转存单元,其将第二级接收注册内存组中接收到的数据子块按照从大到小顺序合并转存到第一级接收内存中;以及
    布置在每一对第二级发送注册内存与第二级接收注册内存之间的数据传输单元,在所选择的第二级发送注册内存被转存待发送的最大数据子块时,获得传输指令,将所选择的第二级发送注册内存内的最大数据子块发送到对应的第二级接收注册内存。
  2. 一种静态网络中的数据传输系统,所述静态网络至少包括一个数据发送设备和一个数据接收设备,其中,
    所述数据发送设备包括:
    第一级发送内存,具有固定容量,用于存储待传输数据块;
    第二级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述第一级发送内存的固定容量,并包括两个容量为预定容量模量的第二级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的第二级发送注册内存;
    数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存以及在所有第二级发送注册内存中没有其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存时从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存,并按照所选择的第二级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块转存到所选择的第二级发送注册内存中;
    所述数据接收设备包括:
    第一级接收内存,具有与第一级发送内存相同的容量;
    第二级接收注册内存组,其包括与所述第二级发送注册内存组中的每一个对应并具有的相同的容量的第二级接收注册内存;以及
    数据合并转存单元,其将第二级接收注册内存组中接收到的数据子块按照从大到小顺序合并转存到第一级接收内存中;以及
    布置在每一对第二级发送注册内存与第二级接收注册内存之间的数据传输单元,在所选择的第二级发送注册内存被转存待发送的最大数据子块时,获得传输指令,将所选择的第二级发送注册内存内的最大数据子块发送到对应的第二级接收注册内存。
  3. 一种静态网络中的数据传输系统,所述静态网络至少包括一个数据发送设备和一个数据接收设备,其中,
    所述数据发送设备包括:
    第一级发送内存,具有预定容量模量的整数倍的固定容量,用于存储待传输数据块;
    第二级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述第一级发送内存的固定容量,并包括两个容量为预定容量模量的第二级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的第二级发送注册内存;
    数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存,并记录所选择的第二级发送注册内存以及按照所选择的第二级发送注册内存的容量从所述待传输数据块能够按序分割出的最大数据子块,以及基于所述记录将所有所能分割的最大数据子块对应转存到所选择的第二级发送注册内存中;
    所述数据接收设备包括:
    第一级接收内存,具有与第一级发送内存相同的容量;
    第二级接收注册内存组,其包括与所述第二级发送注册内存组中的每一个对应并具有的相同的容量的第二级接收注册内存;以及
    数据合并转存单元,其将第二级接收注册内存组中接收到的数据子块按照从大到小顺序合并转存到第一级接收内存中;以及
    布置在每一对第二级发送注册内存与第二级接收注册内存之间的数据传输单元,在所选择的第二级发送注册内存被转存待发送的最大数据子块时,获得传输指令,将所选择的第二级发送注册内存内的最大数据子块发送到对应的第二级接收注册内存。
  4. 一种静态网络中的数据传输系统,所述静态网络至少包括一个数据发送设备和一个数据接收设备,其中,
    所述数据发送设备包括:
    第一级发送内存,具有固定容量,用于存储待传输数据块;
    第二级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述第一级发送内存的固定容量,并包括两个容量为预定容量模量的第二级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的第二级发送注册内存;
    数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存以及在所有第二级发送注册内存中没有其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存时从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存,并记录所选择的第二级发送注册内存以及按照所选择的第二级发送注册内存的容量从所述待传输数据块能够按序分割出的最大数据子块,以及基于所述记录将所有所能分割的最大数据子块对应转存到所选择的第二级发送注册内存中;
    所述数据接收设备包括:
    第一级接收内存,具有与第一级发送内存相同的容量;
    第二级接收注册内存组,其包括与所述第二级发送注册内存组中的每一个对应并具有的相同的容量的第二级接收注册内存;以及
    数据合并转存单元,其将第二级接收注册内存组中接收到的数据子块按照从大到小顺序合并转存到第一级接收内存中;以及
    布置在每一对第二级发送注册内存与第二级接收注册内存之间的数据传输单元,在所选择的第二级发送注册内存被转存待发送的最大数据子块时,获得传输指令,将所选择的第二级发送注册内存内的最大数据子块发送到对应的第二级接收注册内存。
  5. 一种静态网络中的数据传输方法,包括:
    在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存;
    比照所选择的第二级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块转存到所选择的第二级发送注册内存中;
    在所选择的第二级发送注册内存被转存待发送的数据子块时,基于传输指令,将所选择的第二级发送注册内存内的最大数据子块发送到与所选择的第二级发送注册内存对应的第二级接收注册内存中;以及
    将第二级接收注册内存内的各个数据子块按照从大到小顺序合并转存到第一级接收内存中。
  6. 一种静态网络中的数据传输方法,包括:
    在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存以及在所有第二级发送注册内存中没有其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存时从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存;
    比照所选择的第二级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块,并将所分割出的最大数据子块转存到所选择的第二级发送注册内存中;
    在所选择的第二级发送注册内存被转存待发送的数据子块时,基于传输指令,将所选择的第二级发送注册内存内的最大数据子块发送到与所选择的第二级发送注册内存对应的第二级接收注册内存中;以及
    将第二级接收注册内存内的各个数据子块按照从大到小顺序合并转存到第一级接收内存中。
  7. 一种静态网络中的数据传输方法,包括:
    在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存;
    记录所选择的第二级发送注册内存以及按照所选择的第二级发送注册内存的容量从所述待传输数据块能够按序分割出的最大数据子块;
    基于所述记录,比照所选择的第二级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块,并将所有分割的最大数据子块对应转存到所选择的第二级发送注册内存中;
    在所选择的第二级发送注册内存被转存待发送的数据子块时,基于传输指令,将所选择的第二级发送注册内存内的最大数据子块发送到与所选择的第二级发送注册内存对应的第二级接收注册内存中;以及
    将第二级接收注册内存内的各个数据子块按照从大到小顺序合并转存到第一级接收内存中。
  8. 一种静态网络中的数据传输方法,包括:
    在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存以及在所有第二级发送注册内存中没有其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存时从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存;
    记录所选择的第二级发送注册内存以及按照所选择的第二级发送注册内存的容量从所述待传输数据块能够按序分割出的最大数据子块;
    基于所述记录,比照所选择的第二级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块,并将所有分割的最大数据子块对应转存到所选择的第二级发送注册内存中;
    在所选择的第二级发送注册内存被转存待发送的数据子块时,基于传输指令,将所选择的第二级发送注册内存内的最大数据子块发送到与所选择的第二级发送注册内存对应的第二级接收注册内存中;以及
    将第二级接收注册内存内的各个数据子块按照从大到小顺序合并转存到第一级接收内存中。
  9. 一种静态网络中的数据传输复用组件,所述静态网络包括多对主级发送内存和接收注册内存,所述数据传输复用组件包括:
    次级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述主级发送内存的固定容量,并包括两个容量为预定容量模量的次级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的次级发送注册内存;
    数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的次级发送注册内存容量时从两个容量为预定容量模量的次级发送注册内存中选择专用于存储余量的次级发送注册内存,否则从所有次级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大次级发送注册内存,并按照所选择的次级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块转存到所选择的次级发送注册内存中;
    次级接收注册内存组,其包括与所述次级发送注册内存组中的每一个对应并具有的相同的容量的次级接收注册内存;
    布置在每一对次级发送注册内存与次级接收注册内存之间的数据传输单元,在所选择的次级发送注册内存被转存待发送的最大数据子块时,获得传输指令,将所选择的次级发送注册内存内的最大数据子块发送到对应的次级接收注册内存;以及
    数据合并转存单元,其将次级接收注册内存组中接收到的数据子块按照从大到小顺序合并转存到所述主级接收内存之一中。
  10. 一种静态网络中的数据传输复用组件,所述静态网络包括多对主级发送内存和接收注册内存,所述数据传输复用组件包括:
    次级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述主级发送内存的固定容量,并包括两个容量为预定容量模量的次级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的次级发送注册内存;
    数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的次级发送注册内存容量时从两个容量为预定容量模量的次级发送注册内存中选择专用于存储余量的次级发送注册内存,否则从所有次级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大次级发送注册内存,并按照所选择的次级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块转存到所选择的次级发送注册内存中;
    次级接收注册内存组,其包括与所述次级发送注册内存组中的每一个对应并具有的相同的容量的次级接收注册内存;
    布置在每一对次级发送注册内存与次级接收注册内存之间的数据传输单元,在所选择的次级发送注册内存被转存待发送的最大数据子块时,获得传输指令,将所选择的次级发送注册内存内的最大数据子块发送到对应的次级接收注册内存;以及
    数据合并转存单元,其将次级接收注册内存组中接收到的数据子块按照从大到小顺序合并转存到所述主级接收内存之一中。
    10. 一种静态网络中的数据传输复用组件,所述静态网络包括多对主级发送内存和接收注册内存,所述数据传输复用组件包括:
    次级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述主级发送内存的固定容量,并包括两个容量为预定容量模量的次级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的次级发送注册内存;
    数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的次级发送注册内存容量时从两个容量为预定容量模量的次级发送注册内存中选择专用于存储余量的次级发送注册内存,否则从所有次级发送注册内存中选择其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的次级发送注册内存以及在所有次级发送注册内存中没有其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的次级发送注册内存时从所有次级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大次级发送注册内存,并按照所选择的次级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块转存到所选择的次级发送注册内存中;
    次级接收注册内存组,其包括与所述次级发送注册内存组中的每一个对应并具有的相同的容量的次级接收注册内存;
    布置在每一对次级发送注册内存与次级接收注册内存之间的数据传输单元,在所选择的次级发送注册内存被转存待发送的最大数据子块时,获得传输指令,将所选择的次级发送注册内存内的最大数据子块发送到对应的次级接收注册内存;以及
    数据合并转存单元,其将次级接收注册内存组中接收到的数据子块按照从大到小顺序合并转存到所述主级接收内存之一中。
    11. 一种静态网络中的数据传输复用组件,所述静态网络包括多对主级发送内存和接收注册内存,所述数据传输复用组件包括:
    次级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述主级发送内存的固定容量,并包括两个容量为预定容量模量的次级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的次级发送注册内存;
    数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的次级发送注册内存容量时从两个容量为预定容量模量的次级发送注册内存中选择专用于存储余量的次级发送注册内存,否则从所有次级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大次级发送注册内存,并记录所选择的次级发送注册内存以及按照所选择的次级发送注册内存的容量从所述待传输数据块能够按序分割出的最大数据子块,以及基于所述记录将所有所能分割的最大数据子块对应转存到所选择的次级发送注册内存中;
    次级接收注册内存组,其包括与所述次级发送注册内存组中的每一个对应并具有的相同的容量的次级接收注册内存;
    布置在每一对次级发送注册内存与次级接收注册内存之间的数据传输单元,在所选择的次级发送注册内存被转存待发送的最大数据子块时,获得传输指令,将所选择的次级发送注册内存内的最大数据子块发送到对应的次级接收注册内存;以及
    数据合并转存单元,其将次级接收注册内存组中接收到的数据子块按照从大到小顺序合并转存到所述主级接收内存之一中。
    12. 一种静态网络中的数据传输复用组件,所述静态网络包括多对主级发送内存和接收注册内存,所述数据传输复用组件包括:
    次级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述主级发送内存的固定容量,并包括两个容量为预定容量模量的次级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的次级发送注册内存;
    数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的次级发送注册内存容量时从两个容量为预定容量模量的次级发送注册内存中选择专用于存储余量的次级发送注册内存,否则从所有次级发送注册内存中选择其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的次级发送注册内存以及在所有次级发送注册内存中没有其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的次级发送注册内存时从所有次级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大次级发送注册内存,并记录所选择的次级发送注册内存以及按照所选择的次级发送注册内存的容量从所述待传输数据块能够按序分割出的最大数据子块,以及基于所述记录将所有所能分割的最大数据子块对应转存到所选择的次级发送注册内存中;
    次级接收注册内存组,其包括与所述次级发送注册内存组中的每一个对应并具有的相同的容量的次级接收注册内存;
    布置在每一对次级发送注册内存与次级接收注册内存之间的数据传输单元,在所选择的次级发送注册内存被转存待发送的最大数据子块时,获得传输指令,将所选择的次级发送注册内存内的最大数据子块发送到对应的次级接收注册内存;以及
    数据合并转存单元,其将次级接收注册内存组中接收到的数据子块按照从大到小顺序合并转存到所述主级接收内存之一中。
    13. 一种静态网络中的传输数据的分割系统,所述静态网络至少包括一个数据发送设备和一个数据接收设备,其中所述分割系统包括:
    第一级发送内存,具有固定容量,用于存储待传输数据块;
    第二级发送注册内存组,其容量之和为预定容量模量的整数倍并且大于或等于所述第一级发送内存的固定容量,并包括两个容量为预定容量模量的第二级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的第二级发送注册内存;以及
    数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存,并按照所选择的第二级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块转存到所选择的第二级发送注册内存中。
    14. 一种静态网络中的传输数据的分割系统,所述静态网络至少包括一个数据发送设备和一个数据接收设备,其中所述分割系统包括:
    第一级发送内存,具有预定容量模量的整数倍的固定容量,用于存储待传输数据块;
    第二级发送注册内存组,其容量之和等于所述第一级发送内存的固定容量,并包括两个容量为预定容量模量的第二级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的第二级发送注册内存;以及
    数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存以及在所有第二级发送注册内存中没有其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存时从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存,并按照所选择的第二级发送注册内存的容量从所述待传输数据块按序分割出的最大数据子块转存到所选择的第二级发送注册内存中。
    15. 一种静态网络中的传输数据的分割系统,所述静态网络至少包括一个数据发送设备和一个数据接收设备,其中所述分割系统包括:
    第一级发送内存,具有预定容量模量的整数倍的固定容量,用于存储待传输数据块;
    第二级发送注册内存组,其容量之和等于所述第一级发送内存的固定容量,并包括两个容量为预定容量模量的第二级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的第二级发送注册内存;以及
    数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存,并记录所选择的第二级发送注册内存以及按照所选择的第二级发送注册内存的容量从所述待传输数据块能够按序分割出的最大数据子块,以及基于所述记录将所有所能分割的最大数据子块对应转存到所选择的第二级发送注册内存中。
    16. 一种静态网络中的传输数据的分割系统,所述静态网络至少包括一个数据发送设备和一个数据接收设备,其中所述分割系统包括:
    第一级发送内存,具有预定容量模量的整数倍的固定容量,用于存储待传输数据块;
    第二级发送注册内存组,其容量之和等于所述第一级发送内存的固定容量,并包括两个容量为预定容量模量的第二级发送注册内存以及多个容量以所述预定容量模量为基数等比例增加的第二级发送注册内存;以及
    数据分割转存单元,用于在待传输数据块尺寸小于或等于容量最小的第二级发送注册内存容量时从两个容量为预定容量模量的第二级发送注册内存中选择专用于存储余量的第二级发送注册内存,否则从所有第二级发送注册内存中选择其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存以及在所有第二级发送注册内存中没有其容量大于所述待传输数据块的尺寸并且与所述待传输数据块的尺寸之差值小于所述预定容量模量的第二级发送注册内存时从所有第二级发送注册内存中选择其容量小于或等于所述待传输数据块的尺寸的最大第二级发送注册内存,并记录所选择的第二级发送注册内存以及按照所选择的第二级发送注册内存的容量从所述待传输数据块能够按序分割出的最大数据子块,以及基于所述记录将所有所能分割的最大数据子块对应转存到所选择的第二级发送注册内存中。
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