WO2021255926A1 - 制御方法、情報処理装置、及び制御プログラム - Google Patents

制御方法、情報処理装置、及び制御プログラム Download PDF

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WO2021255926A1
WO2021255926A1 PCT/JP2020/024186 JP2020024186W WO2021255926A1 WO 2021255926 A1 WO2021255926 A1 WO 2021255926A1 JP 2020024186 W JP2020024186 W JP 2020024186W WO 2021255926 A1 WO2021255926 A1 WO 2021255926A1
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instruction
program
execution unit
processes
processing
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English (en)
French (fr)
Japanese (ja)
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充昭 福田
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Fujitsu Ltd
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Fujitsu Ltd
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Priority to CN202080101332.2A priority Critical patent/CN115698943A/zh
Priority to EP20941050.5A priority patent/EP4170487A4/en
Priority to JP2022531226A priority patent/JPWO2021255926A1/ja
Priority to PCT/JP2020/024186 priority patent/WO2021255926A1/ja
Publication of WO2021255926A1 publication Critical patent/WO2021255926A1/ja
Priority to US17/983,153 priority patent/US20230063497A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/48—Indexing scheme relating to G06F9/48
    • G06F2209/483—Multiproc

Definitions

  • the present invention relates to control technology.
  • the CPU Central Processing Unit
  • the CPU installed in many computers has a parallel processing function that executes multiple programs at the same time.
  • a program can be executed at a higher speed by scheduling so that a plurality of programs executed at the same time can use a plurality of instruction execution units built in the CPU.
  • the CPU may be called a processor, and the instruction execution unit in the CPU may be called an arithmetic unit.
  • a multi-thread execution processor capable of minimizing the thread exchange overhead in relation to parallel processing is known (see, for example, Patent Document 1).
  • the computer is between the first process being executed by the execution unit of the arithmetic processing unit and a plurality of processes each generating a predetermined process result in response to a request to generate a predetermined process result.
  • the second process among the plurality of processes is specified based on the relationship of.
  • the second process includes a second instruction different from the first instruction included in the first process.
  • the computer controls the execution unit to execute the second process.
  • FIG. 1 shows an example of a CPU including a plurality of instruction execution units.
  • the CPU 101 of FIG. 1 includes an instruction execution unit 111 to an instruction execution unit 114.
  • the instruction execution unit 111 executes the instruction A
  • the instruction execution unit 112 executes the instruction B
  • the instruction execution unit 113 executes the instruction C
  • the instruction execution unit 114 executes the instruction Z.
  • FIG. 2 shows an example of parallel processing in the CPU 101 of FIG.
  • the CPU 101 activates the thread 211 and the thread 212 in the procedure 201, and executes the thread 211 and the thread 212 in parallel in the parallel processing of the procedure 202.
  • instruction execution units 111 to 114 are assigned to each thread so that the instruction execution units used between threads 211 and 212 do not overlap.
  • the CPU 101 integrates the processing results of the threads 211 and the threads 212 in the procedure 203.
  • FIG. 3 shows an example of parallel processing in which a waiting time occurs.
  • the CPU 101 starts the thread 311 and the thread 312 in the procedure 301, and executes the thread 311 and the thread 312 in parallel in the parallel processing of the procedure 302.
  • both thread 311 and thread 312 execute only instruction A.
  • the instruction execution unit 111 that executes the instruction A is always in the busy state, and while one thread is using the instruction execution unit 111, the other thread is in the standby state, and a waiting time is generated.
  • the CPU 101 integrates the processing results of the threads 311 and the threads 312 in the procedure 303.
  • FIG. 4 shows an example of the processing time when it is assumed that there is no waiting time.
  • the processing time T1 represents the processing time when only the instruction A is executed by one thread 401.
  • the processing time T2 represents the processing time when the same processing as the thread 401 is executed in parallel by the thread 411 and the thread 412. In this case, there is no waiting time for the instruction execution unit 111 to execute the instruction A, and the thread 411 and the thread 412 can execute the instruction A at the same time.
  • the processing time T2 is about half of the processing time T1.
  • FIG. 5 shows an example of the processing time when there is a waiting time.
  • the processing time T3 represents the processing time when the same processing as the thread 401 is executed in parallel by the thread 411 and the thread 412. In this case, there is a waiting time of the instruction execution unit 111 for executing the instruction A, and only one of the thread 411 and the thread 412 can execute the instruction A.
  • the processing time T3 is almost the same as the processing time T1, and the speedup by parallel processing cannot be realized.
  • N biometric authentication An example of an application in which such an event occurs is 1: N biometric authentication.
  • the sensor In the biometric authentication system that performs N biometric authentication, the sensor reads the biometric information such as the fingerprint, iris, and vein pattern of the person to be authenticated, and the coded biometric information is generated from the read biometric information. By encoding biometric information, high-speed comparison (collation) processing can be performed.
  • the biometric information of the person to be authenticated is compared with the biometric information of many registrants registered in the biometric authentication system in advance, and the biometric information of the authentication target and the biometric information of each registrant are compared.
  • the similarity between and is calculated.
  • the similarity is compared with a predetermined threshold value, and if there is a registrant having a similarity larger than the threshold value, it is determined that the authentication target person is the registrant himself / herself.
  • the biometric authentication system may contain biometric information of tens of thousands to millions of registrants. In this case, in order to compare the biological feature information of a large number of registrants with the biological feature information of the authentication target person in a short time, it is effective to execute the comparison process in parallel by a plurality of threads.
  • FIG. 6 shows an example of a functional configuration of the information processing device (computer) of the embodiment.
  • the information processing unit 601 of FIG. 6 includes an arithmetic processing unit 611, and the arithmetic processing unit 611 includes an execution unit 621.
  • FIG. 7 is a flowchart showing an example of the control process performed by the information processing apparatus 601 of FIG.
  • the arithmetic processing unit 611 establishes a relationship between the first process executed by the execution unit 621 and a plurality of processes each generating a predetermined process result in response to a request for generating a predetermined process result. Based on this, the second process is specified among the plurality of processes (step 701). The second process includes a second instruction different from the first instruction included in the first process.
  • the arithmetic processing unit 611 controls the execution unit 621 to execute the second process (step 702).
  • the information processing device 601 of FIG. 6 it is possible to suppress the generation of instructions waiting to be executed in the process executed by the arithmetic processing unit 611.
  • FIG. 8 shows a hardware configuration example of the information processing apparatus 601 of FIG.
  • the information processing device 801 of FIG. 8 includes a CPU 811, a memory 812, an input device 813, an output device 814, an auxiliary storage device 815, a medium drive device 816, and a network connection device 817. These components are hardware and are connected to each other by bus 818.
  • the information processing device 801 may be, for example, a server included in the biometric authentication system.
  • the memory 812 is, for example, a semiconductor memory such as a ROM (Read Only Memory), a RAM (Random Access Memory), or a flash memory, and stores a program and data used for processing.
  • the CPU 811 (processor) corresponds to the arithmetic processing unit 611 of FIG. 6 and executes a program using the memory 812.
  • the input device 813 is, for example, a keyboard, a pointing device, or the like, and is used for inputting instructions or information from an operator or a user.
  • the output device 814 is, for example, a display device, a printer, a speaker, or the like, and is used for making an inquiry to an operator or a user or outputting a processing result.
  • the processing result may be the authentication result of the authentication target person.
  • the auxiliary storage device 815 is, for example, a magnetic disk device, an optical disk device, a magneto-optical disk device, a tape device, or the like.
  • the auxiliary storage device 815 may be a flash memory or a hard disk drive.
  • the information processing device 801 can store programs and data in the auxiliary storage device 815 and load them into the memory 812 for use.
  • the medium drive device 816 drives the portable recording medium 802 and accesses the recorded contents.
  • the portable recording medium 802 is a memory device, a flexible disk, an optical disk, a magneto-optical disk, or the like.
  • the portable recording medium 802 may be a CD-ROM (Compact Disk Read Only Memory), a DVD (Digital Versatile Disk), a USB (Universal Serial Bus) memory, or the like.
  • the operator or the user can store the programs and data in the portable recording medium 802 and load them into the memory 812 for use.
  • the computer-readable recording medium for storing the program and data used for processing is a physical (non-temporary) recording such as a memory 812, an auxiliary storage device 815, or a portable recording medium 802. It is a medium.
  • the network connection device 817 is a communication interface circuit that is connected to a communication network such as LAN (Local Area Network) and WAN (Wide Area Network) and performs data conversion associated with communication.
  • the information processing device 801 can receive programs and data from an external device via the network connection device 817, load them into the memory 812, and use them.
  • FIG. 9 shows a hardware configuration example of the CPU 811 when the information processing device 801 of FIG. 8 performs 1: N biometric authentication.
  • the CPU 811 in FIG. 9 includes an execution unit 901.
  • the execution unit 901 operates as the execution unit 621 of FIG.
  • the execution unit 901 includes an instruction execution unit 911 to an instruction execution unit 913.
  • the instruction execution unit 911 executes the instruction "popct", the instruction execution unit 912 executes a numerical operation instruction, and the instruction execution unit 113 executes a bit operation instruction.
  • the execution unit 901 and the instruction execution unit 911 to the instruction execution unit 913 are hardware circuits.
  • a plurality of programs that perform comparison processing of biological feature information and generate comparison results are prepared.
  • Each program realizes the same comparison process by using different instruction execution units based on different algorithms. Therefore, even when a plurality of programs are executed in parallel, the probability that the waiting time of the instruction execution unit 911 to the instruction execution unit 913 will occur is low.
  • the comparison result of the biological feature information is an example of a predetermined processing result, and the comparison processing realized by each program is an example of the first processing and the second processing.
  • N biometric authentication there is a request to generate a comparison result of biometric information for each biometric information of a plurality of registrants.
  • the CPU 811 is one of a plurality of programs based on the relationship between the program executed by the execution unit 901 and the plurality of programs. Select. If a program different from the running program is selected, the selected program contains instructions that are different from the instructions contained in the running program and is different from the instruction execution unit used by the running program. Use the part.
  • the CPU 811 controls the execution unit 901 so as to execute the selected program.
  • duplication of the instruction execution unit used by each program is suppressed, and the occurrence of waiting time for the instruction execution unit is avoided. Therefore, it is possible to suppress the generation of instructions waiting to be executed and speed up the comparison process for the biometric information of a large number of registrants.
  • FIG. 10 shows an example of a program that performs comparison processing of biological characteristic information.
  • 10 (a) shows the program P1
  • FIG. 10 (b) shows the program P2.
  • the program P1 and the program P2 execute the same comparison process and generate the same comparison result iScore, but the combination of instructions included in the program P2 is different from the combination of instructions included in the program P1.
  • the degree of similarity between the biometric information of the person to be authenticated and the biometric information of the registrant is calculated using iScore.
  • the number of bits of the logic "1" is counted only by executing one instruction "popcnt".
  • the same processing as the instruction "popcnt" is realized by a complicated operation combining a numerical operation (addition and subtraction) and a bit operation (logical product and bit shift).
  • the program P1 uses the instruction execution unit 911 to the instruction execution unit 913 in FIG. 9, and the program P2 uses the instruction execution unit 912 and the instruction execution unit 113. Since the program P2 does not use the instruction execution unit 911 that executes the instruction "popcnt", the comparison process can be continued regardless of whether or not the instruction execution unit 911 is in use.
  • the number of programs for performing comparison processing of biological characteristic information is not limited to two, and three or more programs that generate the same comparison result may be prepared.
  • the combination of instructions included in each program is different from the combination of instructions included in other programs, and each program uses an instruction execution unit having a different combination from other programs.
  • FIG. 11 is a flowchart showing an example of parallel processing performed by the CPU 811 of FIG.
  • the CPU 811 performs the parallel processing of FIG. 11 by executing the control program using the memory 812.
  • parallel processing one of a plurality of programs that generate the same comparison result is input to each of a plurality of threads executed in parallel.
  • the program to be submitted to each thread is appropriately selected.
  • Memory 812 stores a program selection candidate list.
  • the program selection candidate list the average processing time of each of the plurality of programs and the number of threads executing the program are recorded.
  • FIG. 12 shows an example of a program selection candidate list in the initial state.
  • the program represents the program of the selection candidate
  • the average processing time represents the average processing time of the program of the selection candidate
  • the number of threads represents the number of threads executing the program of the selection candidate.
  • the average processing time of each program is calculated in advance and recorded in the program selection candidate list.
  • the average processing time may be the time calculated arithmetically from the processing time of the instruction execution unit used by the program, or may be the time measured by an experiment. In the initial state, the number of threads of all programs is set to 0.
  • the CPU 811 sets 0 in the control variable p indicating the thread to be executed (step 1101).
  • the CPU 811 inputs one of the programs to the p-th thread in order to compare the biometric information of the authentication target person with the biometric information of any of the registrants (step 1102).
  • the execution unit 901 executes the program by using the instruction execution unit according to the combination of the instructions included in the input program.
  • FIG. 13 is a flowchart showing an example of the first program input process in step 1102 of FIG.
  • the CPU 811 selects the program having the smallest number of threads from the programs recorded in the program selection candidate list (step 1301), and checks whether or not a plurality of programs have been selected (step 1302).
  • the CPU 811 selects the program having the shortest average processing time from those programs (step 1303).
  • the CPU 811 randomly selects one of the programs. As a result, any program can be selected even when a plurality of programs having the smallest number of threads exist.
  • the CPU 811 inputs the selected program to the p-th thread (step 1304), and increments the number of threads of the input program by 1 in the program selection candidate list (step 1305).
  • the CPU 811 performs the processes after step 1304.
  • step 1302 If only two programs are registered in the program selection candidate list, the processes of step 1302 and step 1303 may be omitted. In this case, in step 1301, an unexecuted program different from the already executed program is selected from the two programs.
  • the CPU 811 After inputting the program to the p-th thread, the CPU 811 increments p by 1 (step 1103) and compares p with M (step 1104). M represents the maximum value of the number of threads that can be executed simultaneously in the CPU 811. When p is smaller than M (steps 1104, YES), the CPU 811 repeats the processes after step 1102. As a result, the 0th to M-1st threads are executed in parallel.
  • FIG. 14 shows an example of a program selection candidate list when two threads are executed in parallel.
  • the program P11 and the program P13 are input to the two threads, respectively, and the number of threads of the program P11 and the program P13 is set to 1.
  • the CPU 811 checks whether or not the biometric information of all the registrants has been processed (step 1108).
  • the CPU 811 is in the qth thread in order to compare the biometric information of the authentication target person with the biometric information of the unprocessed registrant.
  • the program is input (step 1109).
  • the execution unit 901 executes the program by using the instruction execution unit according to the combination of the instructions included in the input program.
  • the program input process in step 1109 is the same as the program input process of FIG. After inputting the program to the qth thread, the CPU 811 repeats the processes after step 1105.
  • the CPU 811 aggregates the comparison results for the biometric information of all registrants and sorts the registrants in descending order of similarity (step 1108, YES). Step 1110).
  • the program P1 is already executed in the thread 1501
  • the number of threads of the program P1 is 1 in the program selection candidate list
  • the number of threads of the program P2 is 0. Therefore, of the program P1 and the program P2, the program P2 having the smallest number of threads is selected and put into the thread 1502.
  • the number of threads of the program P1 is 0 and the number of threads of the program P2 is 1 in the program selection candidate list. Therefore, of the program P1 and the program P2, the program P1 having the smallest number of threads is selected and put into the thread 1502.
  • the program having the smallest number of threads executing the program is selected and executed from among the plurality of programs that generate the same comparison result.
  • duplication of the instruction execution unit used by each thread is suppressed, and the occurrence of waiting time for the instruction execution unit is avoided, so that the comparison processing for the biometric information of a large number of registrants can be speeded up.
  • a program Q1 that performs a process different from the biometric information comparison process is executed in a thread
  • one of the programs Q2 that performs the biometric information comparison process is selected and put into another thread.
  • the program Q1 and the program Q2 are executed in parallel, the process realized by the program Q1 corresponds to the first process, and the process realized by the program Q2 corresponds to the second process.
  • the memory 812 stores an instruction usage frequency table for each selection candidate program.
  • the instruction usage frequency table records the instructions included in the program, the frequency of instruction usage, and the processing time of the instruction.
  • FIG. 16 shows an example of the instruction usage frequency table of the program P1 and the program P2 shown in FIG.
  • the instruction represents an instruction included in the program
  • the frequency of use represents the number of instructions
  • the processing time represents the processing time when the instruction execution unit executes the instruction.
  • FIG. 16A shows an example of the instruction usage frequency table of the program P1.
  • the program P1 includes an instruction " ⁇ ", two instructions “++", an instruction “+”, and an instruction "popcnt”.
  • the instruction “ ⁇ ” is executed by the instruction execution unit 913
  • the instruction "++” and the instruction "+” are executed by the instruction execution unit 912
  • the instruction "popct” is executed by the instruction execution unit 911.
  • the processing time of the instruction " ⁇ " is "1"
  • the processing time of the two instructions "++” is “2”
  • the processing time of the instruction "+” is "1”
  • the instruction "popcnt” The processing time is "10”. Therefore, the total processing time of the program P1 is "14".
  • FIG. 16B shows an example of the instruction usage frequency table of the program P2.
  • Program P2 includes instruction " ⁇ ", two instructions “++", five instructions “+”, five instructions ">>”, five instructions "&", and an instruction "-”. It has been.
  • the instruction " ⁇ ”, the instruction ">>”, and the instruction "&” are executed by the instruction execution unit 913, and the instruction "++", the instruction "+”, and the instruction "-" are executed by the instruction execution unit 912. To.
  • the processing time of the instruction " ⁇ " is “1"
  • the processing time of the two instructions “++” is “2”
  • the processing time of the five instructions "+” is "5".
  • the processing time of the five instructions ">>” is "5"
  • the processing time of the five instructions "&” is "5"
  • the processing time of the instruction "-" is "1" Therefore, the total processing time of the program P2 is "19".
  • the instruction " ⁇ ”, the instruction "++”, and the instruction “+” are duplicate instructions commonly included in the program P1 and the program P2.
  • FIG. 17 is a flowchart showing an example of the second program input process in step 1102 of FIG.
  • the CPU 811 refers to the instruction usage frequency table of each of the plurality of selection candidate programs, and calculates the duplication rate R (%) of each program by the following equation (step 1701).
  • TA represents the total processing time of duplicate instructions included in the program PX and the program PY that are already being executed in any thread among the instructions included in the selection candidate program PY.
  • TB represents the total processing time of the program PY.
  • the overlap rate R represents the ratio of TA to TB.
  • the duplication rate R is an example of statistical values relating to instructions that overlap with the instructions included in the first process, and indicates the probability that a waiting time will occur due to duplication of the instruction execution unit used by each thread.
  • the duplication rate R of the program P1 is calculated by the following equation.
  • the duplication rate R of the program P1 is calculated by the following equation.
  • the duplication rate R of the program P2 is calculated by the following equation.
  • the CPU 811 may calculate the duplication rate R of each program by the following equation.
  • NA represents the total number of duplicate instructions included in the program PX and the program PY that are already being executed in any thread among the instructions included in the selection candidate program PY.
  • NB represents the total number of instructions contained in the program PY.
  • the overlap rate R represents the ratio of NA to NB.
  • the CPU 811 selects the program having the smallest duplication rate R from the plurality of selection candidate programs (step 1702), and checks whether or not the plurality of programs have been selected (step 1703).
  • the CPU 811 selects the program having the shortest total processing time from those programs (step 1704).
  • the CPU 811 randomly selects one of the programs. Thereby, even if there are a plurality of programs having the smallest duplication rate R, any program can be selected.
  • the CPU 811 inputs the selected program to the p-th thread (step 1705). If only one program is selected (steps 1703, NO), the CPU 811 performs the process of step 1705.
  • the program input process in step 1109 is the same as the program input process of FIG.
  • FIG. 18 shows an example of the second program input processing when the program P1 and the program P2 shown in FIG. 10 are the programs of the selection candidates and the program P1 is the program PX being executed.
  • the program P1 is already executed in the thread 1801, and as shown in the equations (2) and (3), the overlap rate R of the program P1 is 100%, and the overlap rate R of the program P2 is. It is 42%. Therefore, among the programs P1 and the program P2, the program P2 having the smallest overlap ratio R is selected and put into the thread 1802.
  • the duplication rate R of the program P1 is 29% and the duplication rate R of the program P2 is 100, as shown in the equations (4) and (5). %. Therefore, among the programs P1 and the program P2, the program P1 having the smallest overlap ratio R is selected and put into the thread 1802.
  • step 1701 when a plurality of programs have already been executed, the CPU 811 calculates the duplication rate R using each of the running programs as the program PX, and obtains the statistical value of the duplication rate R for each of the plurality of program PXs. You may. As the statistical value of the overlap rate R, an average value, a total value, a median value, or the like can be used. In this case, in step 1702, the CPU 811 selects the program having the smallest statistical value of the duplication rate R from the plurality of selection candidate programs.
  • a program having a smaller number of instructions overlapping with the running program is selected and executed from among multiple programs that generate the same comparison result.
  • duplication of the instruction execution unit used by each thread is suppressed, and the occurrence of waiting time for the instruction execution unit is avoided, so that the comparison processing for the biometric information of a large number of registrants can be speeded up.
  • the configuration of the information processing device 601 of FIG. 6 and the information processing device 801 of FIG. 8 is only an example, and some components may be omitted or changed depending on the use or conditions of the information processing device.
  • the arithmetic processing unit 611 of FIG. 6 may be a processor such as a GPU (Graphics Processing Unit) or a DSP (Digital Signal Processor).
  • the input device 813 and the output device 814 may be omitted.
  • the medium driving device 816 or the network connection device 817 may be omitted.
  • the configurations of the CPU 101 of FIG. 1 and the CPU 811 of FIG. 9 are merely examples, and some components may be omitted or changed depending on the use or conditions of the information processing apparatus.
  • the execution unit 901 of FIG. 9 may include four or more instruction execution units.
  • the flowcharts of FIGS. 7, 11, 13, and 17 are merely examples, and some processes may be omitted or changed depending on the configuration or conditions of the information processing apparatus.
  • the information processing apparatus 801 can also perform parallel processing other than the comparison processing of biometric information in 1: N biometric authentication.
  • the parallel processing shown in FIGS. 2 to 5 is only an example, and the number of threads executed in parallel and the type of instruction change according to the program input to the threads.
  • the program shown in FIG. 10 is only an example, and the program input to the thread changes depending on the use of the information processing apparatus.
  • the program selection candidate list shown in FIGS. 12 and 14 is only an example, and the program selection candidate list changes according to the program input to the thread.
  • the program input processing shown in FIGS. 15 and 18 is only an example, and the number of threads and programs executed in parallel varies depending on the application of the information processing apparatus.
  • the instruction usage frequency table shown in FIG. 16 is only an example, and the instruction usage frequency table changes according to the program put into the thread.
  • the calculation formulas of the formulas (1) to (6) are only examples, and the information processing apparatus 801 may calculate the duplication rate R by using another calculation formula.

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PCT/JP2020/024186 2020-06-19 2020-06-19 制御方法、情報処理装置、及び制御プログラム Ceased WO2021255926A1 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
CN202080101332.2A CN115698943A (zh) 2020-06-19 2020-06-19 控制方法、信息处理装置以及控制程序
EP20941050.5A EP4170487A4 (en) 2020-06-19 2020-06-19 CONTROL METHOD, INFORMATION PROCESSING DEVICE AND CONTROL PROGRAM
JP2022531226A JPWO2021255926A1 (https=) 2020-06-19 2020-06-19
PCT/JP2020/024186 WO2021255926A1 (ja) 2020-06-19 2020-06-19 制御方法、情報処理装置、及び制御プログラム
US17/983,153 US20230063497A1 (en) 2020-06-19 2022-11-08 Control method, information processing device, and storage medium

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