WO2021254503A1 - 信号检测电路、信号检测方法、指纹识别装置及显示设备 - Google Patents
信号检测电路、信号检测方法、指纹识别装置及显示设备 Download PDFInfo
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- 238000005070 sampling Methods 0.000 claims abstract description 229
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- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 3
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- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 2
- 239000002033 PVDF binder Substances 0.000 claims 1
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- 229910017083 AlN Inorganic materials 0.000 description 2
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 2
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- 229920001721 polyimide Polymers 0.000 description 2
- 229920009405 Polyvinylidenefluoride (PVDF) Film Polymers 0.000 description 1
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- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/13—Sensors therefor
- G06V40/1306—Sensors therefor non-optical, e.g. ultrasonic or capacitive sensing
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
Definitions
- the present disclosure relates to the field of display technology, in particular to a signal detection circuit, a signal detection method, a fingerprint identification device and a display device.
- ultrasonic signal detection circuits are usually applied to display devices for fingerprint identification.
- the ultrasonic signal detection circuit in the related art uses a sampling transistor to sample the ultrasonic echo signal.
- the sampling transistor is turned on for a certain period of time during the positive half period or the negative half period of one cycle of the ultrasonic echo signal, and the sampling transistor During the conduction period, the sampling transistor can sample the piezoelectric signal corresponding to part of the ultrasonic echo signal.
- the purpose of the embodiments of the present disclosure is to provide a signal detection circuit, a signal detection method, a fingerprint identification device, and a display device.
- the embodiment of the present disclosure discloses a signal detection circuit, including:
- the detection module is configured to detect an ultrasonic echo signal and generate a plurality of piezoelectric signals according to the ultrasonic echo signal.
- the plurality of piezo electron signals correspond to the plurality of periods of ridge signals, or the plurality of piezo electron signals correspond to the plurality of periods of valley signals;
- sampling module is connected to the detection module, and the sampling module is configured to receive a corresponding sampling signal in each period, and combine the sampling signal corresponding to the period and the plurality of compression
- the electronic signal is stored at the output terminal of the sampling module.
- the embodiment of the present disclosure also discloses a fingerprint identification device, which includes a base substrate and the plurality of signal detection circuits, and the plurality of signal detection circuits are arranged on the base substrate.
- the embodiment of the present disclosure also discloses a display device including a display panel and the fingerprint identification device, and the fingerprint identification device is arranged at the bottom of the display panel.
- the embodiment of the present disclosure also discloses a signal detection method according to the signal detection circuit, including:
- the ultrasonic echo signal is detected, and a plurality of piezo electronic signals are generated according to the ultrasonic echo signal, and the plurality of piezo electronic signals correspond to a plurality of periods of the ultrasonic echo signal one-to-one.
- Each piezo-electronic signal corresponds to the ridge signal of the plurality of ultrasonic echo signals, or the plurality of piezo-electronic signals corresponds to the trough signal of the ultrasonic echo signal; and receiving a corresponding sampling signal in each of the cycles, And the sampling signal and the multiple piezo-electric signals corresponding to the period are stored at the output terminal of the sampling module.
- the detection module detects multiple cycles of ultrasonic echo signals to generate multiple piezoelectric signals
- the sampling module receives corresponding sampling signals in each cycle, and combines the sampling signals corresponding to the cycles with Multiple piezoelectric signals are stored at the output of the sampling module. Since multiple piezo-electron signals correspond to multiple-period ridge signals, or multiple piezo-electronic signals correspond to multiple-period valley signals, the signals stored at the output of the sampling module are multiple piezo-electronic signals corresponding to multiple ridge signals.
- Signal and multiple sampling signals superimposed signal or multiple piezo electronic signals corresponding to multiple trough signals and multiple sampling signals superimposed signal, multiple piezo electronic signals and multiple troughs corresponding to the multiple ridge signals
- the signal difference between multiple piezo electronic signals corresponding to the signal is greater than the signal difference between the piezoelectric signal corresponding to a single ridge signal and the piezoelectric signal corresponding to a single valley signal in the related art, which is convenient for distinguishing multiple ridges
- the multiple piezo electronic signals corresponding to the signal and the multiple piezo electronic signals corresponding to the multiple valley signals are beneficial to improve the accuracy of identifying the ridge signal and the valley signal of the product using the signal detection circuit of the embodiment of the present disclosure.
- FIG. 1 is a schematic structural diagram of an embodiment of a signal detection circuit of the present disclosure
- FIG. 2 is a schematic structural diagram of another embodiment of a signal detection circuit of the present disclosure.
- FIG. 3 is a timing diagram of the embodiment of the signal detection circuit in FIG. 1;
- FIG. 4 is an equivalent circuit diagram of the embodiment of the signal detection circuit in FIG. 1;
- FIG. 5 is a timing diagram of the embodiment of the signal detection circuit in FIG. 2;
- Fig. 6 is a structural block diagram of an embodiment of a fingerprint identification device of the present disclosure.
- FIG. 7 is a schematic structural diagram of an embodiment of a fingerprint identification device of the present disclosure.
- FIG. 8 is a flow chart of steps of an embodiment of a signal detection method of the present disclosure.
- a detection module 10 configured to detect an ultrasonic echo signal Vrx, and according to the ultrasonic echo
- the wave signal Vrx generates multiple piezoelectric signals, and the multiple piezoelectric signals correspond to multiple cycles of the ultrasonic echo signal Vrx one-to-one, and the multiple piezoelectric signals correspond to multiple cycles of ridge signals, or multiple piezoelectric signals correspond to Multiple cycles of trough signals; sampling module 20, sampling module 20 is connected to detection module 10, sampling module 20 is configured to receive the corresponding sampling signal in each cycle, and store the sampling signal corresponding to the cycle and multiple piezoelectric signals At the output of the sampling module 20.
- the ultrasonic echo signal Vrx Since the ultrasonic echo signal Vrx will oscillate, be absorbed by the material (for example, absorbed by each film layer of the display panel), and gradually attenuate to zero. Therefore, the ultrasonic echo signal Vrx has multiple periods and is stored in the output terminal of the sampling module 20.
- the signal is a signal in which multiple piezo-electric signals corresponding to multiple ridge signals and multiple sampling signals are superimposed, or a signal in which multiple piezo-electric signals corresponding to multiple valley signals and multiple sampling signals are superimposed, and the multiple waves
- the signal difference between the multiple piezo-electronic signals corresponding to the ridge signal and the multiple piezo-electronic signals corresponding to the multiple valley signals is larger than the piezoelectric signal corresponding to a single ridge signal and the piezoelectric signal corresponding to a single valley signal in the related art The signal difference between.
- the product of the detection circuit 100 recognizes the accuracy of the ridge signal and the trough signal.
- the sampling module 20 may be configured to receive the corresponding sampling signal within the preset time period of the positive half cycle in each cycle, or may be configured to receive the corresponding sampling signal within the preset time period of the negative half cycle in each cycle Corresponding sampling signal.
- the preset time period may be a time period in which the signal difference between the multiple piezo electronic signals corresponding to the multiple ridge signals and the multiple piezo electronic signals corresponding to the multiple valley signals is maximized.
- the time length range of the preset time period may be 1/8T to 3/8T out of 0 to 1/2T.
- the detection module 10 may include an ultrasonic sensor.
- the ultrasonic sensor may include a transmitting terminal tx, a receiving terminal rx, a piezoelectric material 11, etc., wherein the receiving terminal rx and the output of the sampling module 20 When the potential of the output terminal of the sampling module 20 is low, that is, the potential of the receiving terminal rx is low, the transmitting terminal tx receives the AC signal, and the piezoelectric material 11 in the ultrasonic sensor transmits the ultrasonic signal Vtx; receiving at the transmitting terminal tx When the low-level signal, that is, when the potential of the transmitting terminal tx is low, the receiving terminal rx detects the ultrasonic echo signal Vrx, and the piezoelectric material 11 in the ultrasonic sensor generates a piezoelectric signal according to the ultrasonic echo signal Vrx.
- the AC signal may be a high frequency and high voltage AC signal.
- the piezoelectric material 11 may be a polyvinylidene fluoride (PVDF) film type piezoelectric material, an aluminum nitride film (Aluminium nitride film, AlN) piezoelectric material, or a piezoelectric ceramics (Piezoelectric ceramics, PZT) Piezoelectric materials or zinc oxide (ZnO) piezoelectric materials, etc.
- the piezoelectric material 11 may also be other inorganic piezoelectric materials or organic piezoelectric materials.
- the piezoelectric material 11 may be arranged between the transmitting terminal tx and the receiving terminal rx.
- the sampling module 20 may include: a first transistor T1, the first pole of the first transistor T1 is connected to the detection module 10, and in each cycle, the The second electrode of a transistor T1 receives the sampling signal corresponding to the period, the control electrode of the first transistor T1 receives the first control signal corresponding to the period to turn on, and the first electrode of the first transistor T1 serves as the output terminal of the sampling module 20;
- the level of the sampling signal corresponding to one cycle is lower than the level of the sampling signal corresponding to the following cycle.
- the sampling signal and the piezoelectric signal corresponding to the period are stored in the first electrode of the first transistor T1.
- the level of the sampling signal corresponding to the previous cycle is lower than the level of the sampling signal corresponding to the next cycle, which can ensure that the sampling signal and the piezoelectric signal corresponding to the previous cycle are stored in the first pole of the first transistor T1
- the sampling signal and the piezo-electric signal corresponding to the latter period can continue to be superimposed on the first pole of the first transistor T1. As shown in FIG.
- sampling signals corresponding to multiple cycles may be in the same sampling waveform Vbias, and first control signals corresponding to multiple cycles may be in the same control waveform Vrst.
- the sampling signals corresponding to the multiple cycles are sampling signal 1 and sampling signal 2, respectively, and the first control signals corresponding to the multiple cycles are control signal 3 and control signal 4, respectively.
- the second electrode of the first transistor T1 receives the bias signal corresponding to the cycle, and the bias signal corresponding to the cycle
- the level of is lower than the level of the sampling signal corresponding to the period.
- the bias signal corresponding to the period can reduce the voltage difference between the first pole and the second pole of the first transistor T1, so as to reduce the leakage current of the first transistor T1.
- the bias signals corresponding to multiple cycles can be set in the sampling waveform Vbias. In FIG. 3, there are two multiple cycles, and the bias signals corresponding to the multiple cycles are bias signal 5 and bias signal 6 respectively. Specifically, the time lengths of the bias signals corresponding to the multiple cycles may be the same or at least two different.
- the equivalent circuit corresponding to the signal detection circuit 100 shown in FIG. 1 may be as shown in FIG. 4, where the parasitic capacitance CP at the output end of the sampling module 20 may be the parasitic capacitance of the receiving end rx of the ultrasonic sensor and the first The equivalent capacitance formed by the parasitic capacitance in the transistor T1, and the equivalent capacitance stores the signal at the output terminal of the sampling module 20.
- the AC signal received by the transmitting terminal tx may be provided by an AC power source AC outside the signal detection circuit 100
- the capacitor C0 in FIG. 4 is a parasitic capacitance between the transmitting terminal tx and the receiving terminal rx.
- the sampling module 20 in the signal detection circuit 100 may further include a diode D1.
- the anode of the diode D1 is connected to the second electrode of the first transistor T1, and the cathode of the diode D1 is connected to the receiving terminal rx.
- the diode D1 is turned on, and the sampling signal and piezoelectric signal corresponding to the period are stored at the output of the sampling module 20.
- the sampling signal is at a high level
- the first transistor T1 does not need to be turned on.
- the control waveform Vrst is low level.
- the sampling module 20 may include a plurality of second transistors T2, and the plurality of second transistors T2 correspond to a plurality of periods in a one-to-one manner.
- the first pole of the transistor T2 is connected to the detection module 10, the second pole of each second transistor T2 receives a sampling signal of a corresponding period, and the control pole of each second transistor T2 receives a second control signal of a corresponding period to turn on ,
- the first poles of the plurality of second transistors T2 are used as the output end of the sampling module 20; the level of the sampling signal corresponding to the previous period is lower than the level of the sampling signal corresponding to the next period.
- the sampling signal and the piezoelectric signal of the corresponding period of the second transistor T2 are stored in the first electrode of the second transistor T2.
- the multiple sampling signals and multiple piezo-electric signals of the first poles of the multiple second transistors T2 are superimposed and stored at the output end of the sampling module 20. Specifically, the level of the sampling signal corresponding to the previous cycle is lower than the level of the sampling signal corresponding to the next cycle, which can ensure that the sampling signal and piezoelectric signal corresponding to the previous cycle are stored in the second transistor corresponding to the previous cycle.
- the sampling signal and the piezo electronic signal corresponding to the subsequent period can continue to be superimposed on the output terminal of the sampling module 20.
- the sampling signals corresponding to the multiple cycles can be in multiple different sampling waveforms (the sampling waveform Vbias1 and the sampling waveform Vbias2), and the second control signal corresponding to the multiple cycles can be Respectively in multiple different control waveforms (control waveform Vrst1 and control waveform Vrst2).
- the sampling signals corresponding to the multiple cycles are sampling signal 7 and sampling signal 8, respectively
- the second control signals corresponding to the multiple cycles are control signal 9 and control signal 10, respectively.
- the plurality of second transistors T2 may be at least two same transistors or different transistors
- the second pole of the second transistor T2 corresponding to the cycle receives the bias signal corresponding to the cycle; the bias corresponding to the cycle
- the level of the set signal is lower than the level of the sampling signal corresponding to the period.
- the bias signal corresponding to the period can reduce the voltage difference between the first pole and the second pole of the second transistor T2, so as to reduce the leakage current of the second transistor T2.
- the multiple cycles are two, and the bias signals corresponding to the multiple cycles are the bias signal 11 and the bias signal 12 respectively.
- the bias signal 11 is in the sampling waveform Vbias1
- the bias signal 12 is in the sampling waveform Vbias2.
- the time lengths of the bias signals corresponding to the multiple cycles may be the same or at least two different.
- the signal detection circuit 100 of the embodiment of the present disclosure may further include a signal readout module 30 and a read signal line 40, the signal readout module 30 and the sampling module 20
- the output terminal is connected to the read signal line 40
- the signal readout module 30 is configured to turn on the output terminal of the sampling module 20 after a plurality of piezoelectric signals and sampling signals corresponding to each cycle are stored at the output terminal of the sampling module 20
- the read signal line 40 to output the signal stored at the output terminal of the sampling module 20 from the read signal line 40.
- the ultrasonic echo signal Vrx is a signal formed by reflecting the ultrasonic signal Vtx from a finger
- the plurality of piezo electrons corresponding to the plurality of ridge signals The signal can be identified as multiple piezo-electronic signals generated by reflecting the ultrasonic signal Vtx from the ridge of the finger, and multiple piezo-electronic signals corresponding to the multiple valley signals can be identified as multiple piezo-electronic signals generated by reflecting the ultrasonic signal Vtx at the valley of the finger. Therefore, the signal output from the reading signal line 40 can be used as a fingerprint identification signal to realize fingerprint identification.
- the signal readout module 30 may include a third transistor T3 and a fourth transistor T4.
- the first electrode of the third transistor T3 is connected to the power supply, and the power supply output voltage VDD,
- the control electrode of the third transistor T3 is connected to the output terminal of the sampling module 20;
- the first electrode of the fourth transistor T4 is connected to the second electrode of the third transistor T3, and the control electrode of the fourth transistor T4 is configured to receive the third control signal 13.
- the second pole of the fourth transistor T4 is connected to the read signal line 40. After the control electrode of the fourth transistor T4 receives the third control signal 13, the fourth transistor T4 is turned on, and the third transistor T3 is turned on.
- the third transistor T3 is turned off, that is, the fourth transistor
- the T4 control signal readout module 30 is turned on and off.
- the third transistor T3 converts the voltage signal stored at the output terminal of the sampling module 20 into a current signal, and the current signal is output to the reading signal line 40 through the fourth transistor T4.
- the greater the voltage corresponding to the voltage signal stored at the output terminal of the sampling module 20 the greater the current signal output by the third transistor T3. That is, the current signal output by the third transistor T3 follows the voltage signal stored at the output terminal of the sampling module 20.
- the waveform of the third control signal 13 is Vread
- the waveform of the current signal output by the fourth transistor T4 to the read signal line 40 is Iout
- the third transistor T3 and the fourth transistor T4 may be the same or different transistors.
- FIG. 3 is a timing diagram corresponding to the signal detection circuit 100 shown in FIG. 1, and the timing diagram in FIG. 3 includes four stages:
- the control waveform Vrst is high, the sampling waveform Vbias is low, the first transistor T1 is turned on, the potential of the receiving terminal rx is low, and the transmitting terminal tx receives the AC signal, the piezoelectric The material 11 vibrates and emits an ultrasonic signal Vtx outward, and the control waveform Vrst becomes a low level.
- the control signal 3 in the control waveform Vrst is high, the sampling signal 1 in the sampling waveform Vbias is high, the first transistor T1 is turned on, and the receiving terminal rx and the sampling signal 1 are connected to the sampling module 20.
- the output terminal is charged, the electrical signal is stored on the parasitic capacitance Cp, and the waveform Vrst is controlled to be low, the first transistor T1 is turned off, and the bias signal 5 in the sampling waveform Vbias is applied to the second pole of the first transistor T1.
- the control signal 4 in the control waveform Vrst is at a high level
- the sampling signal 2 in the sampling waveform Vbias is at a high level
- the first transistor T1 is turned on again, and the receiving terminal rx and the sampling signal 2 are sent to the sampling module 20
- the output terminal of Vbias continues to be charged, and the electrical signal is superimposed and stored on the parasitic capacitance Cp.
- the control waveform Vrst is low, the first transistor T1 is turned off, and the bias signal 6 in the sampling waveform Vbias is applied to the second pole of the first transistor T1 .
- control waveform Vrst continues to be at a low level, and the bias signal 6 in the sampling waveform Vbias continues to be applied to the second pole of the first transistor T1.
- the third control signal 13 in the waveform Vread is at a high level
- the third transistor T3 and the fourth transistor T4 are turned on
- the current signal waveform Iout of the read signal line 40 is at a high level.
- FIG. 5 is a timing diagram corresponding to the signal detection circuit 100 shown in FIG. 2, and the timing diagram in FIG. 5 includes four stages:
- At least one of the control waveform Vrst1 and the control waveform Vrst2 is at a high level
- at least one of the corresponding sampling waveform Vbias1 and the sampling waveform Vbias2 is at a low level
- at least one of the plurality of second transistors T2 is conductive
- the potential of the receiving terminal rx is low
- the transmitting terminal tx receives an AC signal
- the piezoelectric material 11 vibrates and sends out an ultrasonic signal Vtx
- the high-level control waveform Vrst1 or Vrst2 becomes a low level.
- the control signal 9 in the control waveform Vrst1 is high
- the sampling signal 7 in the sampling waveform Vbias1 is high
- the second transistor T2 corresponding to the sampling signal 7 is turned on
- the receiving terminal rx and the sampling signal 7 The output terminal of the sampling module 20 is charged, and the electric signal is stored in the equivalent capacitance formed by the parasitic capacitance of the receiving terminal rx of the ultrasonic sensor and the parasitic capacitance in the multiple second transistors T2, and then the control waveform Vrst1 is low, and the sampling signal
- the second transistor T2 corresponding to 7 is turned off, and the bias signal 11 in the sampling waveform Vbias1 is applied to the second pole of the second transistor T2 corresponding to the sampling signal 7.
- the control signal 10 is in the control waveform Vrst2 Is high, the sampling signal 8 in the sampling waveform Vbias2 is high, the second transistor T2 corresponding to the sampling signal 8 is turned on, the receiving terminal rx and the sampling signal 8 continue to charge the output terminal of the sampling module 20, and the electrical signal is superimposed and stored
- the waveform Vrst2 is controlled to be low, the second transistor T2 corresponding to the sampling signal 8 is turned off, and the sampling waveform
- the bias signal 12 in Vbias2 is applied to the second pole of the second transistor T2 corresponding to the sampling signal 8.
- the control waveform Vrst1 and the control waveform Vrst2 continue to be low level, the bias signal 11 in the sampling waveform Vbias1 continues to be applied to the second pole of the second transistor T2 corresponding to the sampling signal 7, and the sampling waveform Vbias2 is biased
- the setting signal 12 continues to be applied to the second pole of the second transistor T2 corresponding to the sampling signal 8.
- the third control signal 13 in the waveform Vread is at a high level
- the third transistor T3 and the fourth transistor T4 are turned on
- the current signal waveform Iout of the read signal line 40 is at a high level.
- the first transistor T1, the second transistor T2, and the fourth transistor T4 may be turned on when the corresponding control signal is low, and when the corresponding control signal is high Usually disconnected.
- the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 in the embodiments of the present disclosure may be thin film transistors (TFT).
- TFT thin film transistors
- the signal detection circuit of the embodiment of the present disclosure includes the following advantages: the detection module detects multiple cycles of ultrasonic echo signals to generate multiple piezoelectric signals, and the sampling module receives corresponding sampling signals in each cycle, and corresponds to the cycle
- the sampling signal and multiple piezoelectric signals are stored at the output end of the sampling module.
- the sampling module may include a first transistor or a plurality of second transistors.
- the second electrode of the first transistor receives the sampling signal corresponding to the period.
- the second pole of the two transistors receives the sampling signal of the corresponding period.
- the signals stored at the output of the sampling module are multiple piezo-electronic signals corresponding to multiple ridge signals.
- Signal and multiple sampling signals superimposed signal or multiple piezo electronic signals corresponding to multiple trough signals and multiple sampling signals superimposed signal, multiple piezo electronic signals and multiple troughs corresponding to the multiple ridge signals
- the signal difference between multiple piezo electronic signals corresponding to the signal is greater than the signal difference between the piezoelectric signal corresponding to a single ridge signal and the piezoelectric signal corresponding to a single valley signal in the related art, which is convenient for distinguishing multiple ridges
- the multiple piezo electronic signals corresponding to the signal and the multiple piezo electronic signals corresponding to the multiple valley signals, even if the ridge signal and the valley signal are distinguished, are beneficial to improve the identification of the ridge signal of the product using the signal detection circuit of the embodiment of the present disclosure. And the accuracy of the trough signal.
- an embodiment of the present disclosure also discloses a fingerprint identification device 200, which includes a base substrate 300 and a plurality of the above-mentioned signal detection circuits 100, and the plurality of signal detection circuits 100 may be provided on the base substrate 300.
- the detection module 10 in part of the signal detection circuit 100 is configured to generate multiple piezo electronic signals corresponding to multiple cycles of ridge signals
- the detection module 10 in the remaining signal detection circuit 100 is configured to generate multiple cycles of ridge signals.
- the signals correspond to multiple piezo electronic signals, so that the fingerprint identification device 200 can realize the fingerprint identification function after acquiring the signals output by the multiple signal detection circuits 100.
- the multiple signal detection circuits 100 can be arranged on the base substrate 300 in any manner, including but not limited to the arrangement shown in FIG. 6.
- the base substrate 300 may be a glass substrate or a polyimide (PI) substrate.
- PI polyimide
- the fingerprint identification device 200 may further include: an indium tin oxide (ITO) layer, a flexible printed circuit board mounted on a glass panel (Flexible Printed Circuit On Glass, FOG), and the like.
- ITO indium tin oxide
- FOG Flexible Printed Circuit On Glass
- the ITO layer and FOG may be arranged on the base substrate 300, the ITO layer is connected to the transmitting terminal tx of the detection module 10, the FOG is connected to the ITO layer, and an AC signal is provided to the transmitting terminal tx through the FOG and ITO layer.
- the fingerprint identification device of the embodiment of the present disclosure includes the following advantages: the detection module in the signal detection circuit detects multiple cycles of ultrasonic echo signals to generate multiple piezoelectric signals, and the sampling module in the signal detection circuit receives the corresponding signals in each cycle.
- the sampling signal corresponding to the period and a plurality of piezoelectric signals are stored at the output terminal of the sampling module.
- the sampling module may include a first transistor or a plurality of second transistors, and the second pole of the first transistor receives the period Corresponding to the sampling signal, the second pole of each second transistor receives the sampling signal of the corresponding period.
- the signals stored at the output of the sampling module are multiple piezo-electronic signals corresponding to multiple ridge signals.
- Signal and multiple sampling signals superimposed signal or multiple piezo electronic signals corresponding to multiple trough signals and multiple sampling signals superimposed signal, multiple piezo electronic signals and multiple troughs corresponding to the multiple ridge signals
- the signal difference between multiple piezo electronic signals corresponding to the signal is greater than the signal difference between the piezoelectric signal corresponding to a single ridge signal and the piezoelectric signal corresponding to a single valley signal in the related art, which is convenient for distinguishing multiple ridges
- the multiple piezo electronic signals corresponding to the signal and the multiple piezo electronic signals corresponding to the multiple valley signals, even if the ridge signal and the valley signal are distinguished, are beneficial to improve the recognition wave of the fingerprint identification device using the signal detection circuit of the embodiment of the present disclosure.
- the accuracy of the ridge signal and the trough signal are beneficial to improve the recognition wave of the fingerprint identification device using the signal detection circuit of the embodiment of the present disclosure.
- the embodiment of the present disclosure also discloses a display device, which includes a display panel and the above-mentioned fingerprint identification device, and the fingerprint identification device can be arranged at the bottom of the display panel.
- a display device with both display function and fingerprint recognition function can be realized.
- the display device of the embodiment of the present disclosure includes the following advantages: the detection module in the signal detection circuit detects multiple cycles of ultrasonic echo signals to generate multiple piezoelectric signals, and the sampling module in the signal detection circuit receives corresponding signals in each cycle. Sample the signal, and store the sampling signal corresponding to the period and a plurality of piezoelectric signals at the output terminal of the sampling module, where the sampling module may include a first transistor or a plurality of second transistors, and the second electrode of the first transistor receives the period corresponding to The second pole of each second transistor receives the sampling signal of the corresponding period.
- the signals stored at the output of the sampling module are multiple piezo-electronic signals corresponding to multiple ridge signals.
- Signal and multiple sampling signals superimposed signal or multiple piezo electronic signals corresponding to multiple trough signals and multiple sampling signals superimposed signal, multiple piezo electronic signals and multiple troughs corresponding to the multiple ridge signals
- the signal difference between multiple piezo electronic signals corresponding to the signal is greater than the signal difference between the piezoelectric signal corresponding to a single ridge signal and the piezoelectric signal corresponding to a single valley signal in the related art, which is convenient for distinguishing multiple ridges
- the multiple piezo electronic signals corresponding to the signal and the multiple piezo electronic signals corresponding to the multiple valley signals can distinguish between the ridge signal and the valley signal, thereby helping to improve the recognition of the ridge of the display device using the signal detection circuit of the embodiment of the present disclosure.
- the accuracy of the signal and the trough signal can be used to distinguish between the ridge signal and the valley signal, thereby helping to improve the recognition of the ridge of the display device using the signal detection circuit of the embodiment of the present disclosure. The accuracy of the signal and the t
- an embodiment of the present disclosure also discloses a signal detection method according to the above-mentioned signal detection circuit, including:
- Step 810 in the sampling phase, detect the ultrasonic echo signal, and generate multiple piezo-electronic signals according to the ultrasonic echo signal, the multiple piezo-electronic signals correspond to multiple cycles of the ultrasonic echo signal one-to-one, and the multiple piezo-electronic signals correspond to each other.
- Multiple cycles of ridge signals, or multiple piezo electronic signals corresponding to multiple cycles of trough signals; and receiving the corresponding sampling signal in each cycle, and storing the sampling signal corresponding to the cycle and multiple piezo signals in the sampling module The output terminal.
- the sampling module may include a first transistor.
- the sampling signal corresponding to the cycle is received through the second electrode of the first transistor, and the first transistor is controlled to be turned on by the first control signal corresponding to the cycle.
- the sampling module may include a plurality of second transistors, and the plurality of second transistors correspond to a plurality of periods in a one-to-one manner.
- a sampling signal of a corresponding period is received through the second pole of each second transistor, and the period corresponds to The control signal controls the period corresponding to the second transistor to be turned on.
- the signal detection method of the signal detection circuit of the embodiment of the present disclosure may further include:
- Step 800 In the signal transmission stage, an ultrasonic signal is transmitted through the detection module.
- the signal detection circuit may further include a signal readout module and a read signal line.
- the signal detection method of the signal detection circuit of the embodiment of the present disclosure may further include:
- Step 820 in the holding phase, store multiple sampling signals and multiple piezo electronic signals corresponding to multiple cycles through the output terminal of the sampling module.
- step 830 in the signal reading phase, the output terminal of the sampling module and the reading signal line are turned on to output the signal stored at the output terminal of the sampling module from the reading signal line.
- the signal detection method of the embodiment of the present disclosure includes the following advantages: the detection module detects multiple cycles of ultrasonic echo signals to generate multiple piezo electronic signals, and the sampling module receives the corresponding sampling signal in each cycle, and corresponds the cycle to The sampling signal and multiple piezoelectric signals are stored at the output terminal of the sampling module, and the output terminal of the sampling module and the reading signal line are turned on to output the signal stored at the output terminal of the sampling module from the reading signal line. Since multiple piezo-electron signals correspond to multiple-period ridge signals, or multiple piezo-electronic signals correspond to multiple-period valley signals, the signals stored at the output of the sampling module are multiple piezo-electronic signals corresponding to multiple ridge signals.
- Signal and multiple sampling signals superimposed signal or multiple piezo electronic signals corresponding to multiple trough signals and multiple sampling signals superimposed signal, multiple piezo electronic signals and multiple troughs corresponding to the multiple ridge signals
- the signal difference between multiple piezo electronic signals corresponding to the signal is greater than the signal difference between the piezoelectric signal corresponding to a single ridge signal and the piezoelectric signal corresponding to a single valley signal in the related art, which is convenient for distinguishing multiple ridges
- the multiple piezo electronic signals corresponding to the signal and the multiple piezo electronic signals corresponding to the multiple valley signals, even if the ridge signal and the valley signal are distinguished, are beneficial to improve the identification of the ridge signal of the product using the signal detection circuit of the embodiment of the present disclosure. And the accuracy of the trough signal.
- the description is relatively simple, and for the relevant parts, please refer to the part of the description of the signal detection circuit embodiment.
- the embodiments of the embodiments of the present disclosure may be provided as methods, devices, or computer program products. Therefore, the embodiments of the present disclosure may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the embodiments of the present disclosure may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.
- computer-usable storage media including but not limited to disk storage, CD-ROM, optical storage, etc.
- These computer program instructions can also be stored in a computer-readable memory that can guide a computer or other programmable data processing terminal equipment to work in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture including the instruction device.
- the instruction device implements the functions specified in one process or multiple processes in the flowchart and/or one block or multiple blocks in the block diagram.
- These computer program instructions can also be loaded on a computer or other programmable data processing terminal equipment, so that a series of operation steps are executed on the computer or other programmable terminal equipment to produce computer-implemented processing, so that the computer or other programmable terminal equipment
- the instructions executed above provide steps for implementing functions specified in a flow or multiple flows in the flowchart and/or a block or multiple blocks in the block diagram.
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Abstract
Description
Claims (23)
- 一种信号检测电路,其中,所述信号检测电路包括:检测模块,所述检测模块被配置为检测超声波回波信号,并根据所述超声波回波信号生成多个压电子信号,所述多个压电子信号与所述超声波回波信号的多个周期一一对应,所述多个压电子信号对应所述多个周期的波脊信号,或所述多个压电子信号对应所述多个周期的波谷信号;以及采样模块,所述采样模块与所述检测模块连接,所述采样模块被配置为在每个所述周期接收对应的采样信号,并将所述周期对应的所述采样信号和所述多个压电子信号存储在所述采样模块的输出端。
- 根据权利要求1所述的电路,其中,所述采样模块包括:第一晶体管,所述第一晶体管的第一极与所述检测模块连接,在每个所述周期,所述第一晶体管的第二极接收所述周期对应的所述采样信号,所述第一晶体管的控制极接收所述周期对应的第一控制信号以导通,所述第一晶体管的第一极作为所述采样模块的所述输出端;其中,前一个所述周期对应的所述采样信号的电平低于后一个所述周期对应的所述采样信号的电平。
- 根据权利要求2所述的电路,其中,在每个所述周期,在所述检测模块生成所述周期对应的压电子信号后,所述第一晶体管的第二极接收周期对应的偏置信号,所述周期对应的偏置信号的电平低于所述周期对应的所述采样信号的电平。
- 根据权利要求2所述的电路,其中,所述检测模块包括超声波传感器;所述超声波传感器包括发射端、接收端和压电材料,所述接收端与所述采样模块的所述输出端连接。
- 根据权利要求4所述的电路,其中,所述采样模块的所述输出端的寄生电容为所述接收端的寄生电容和所述第一晶体管中的寄生电容构成的等效电容,所述等效电容存储所述采样模块的所述输出端的信号。
- 根据权利要求4所述的电路,其中,所述采样模块还包括二极管;所述二极管的阳极与所述第一晶体管的所述第二极连接,所述二极管的的阴极与所述接收端连接。
- 根据权利要求4所述的电路,其中,在所述采样模块的输出端电位为 低电平,所述接收端的电位为低电平的情况下,所述发射端接收交流信号,所述压电材料发射超声波信号;在所述发射端接收低电平信号的情况下,所述接收端检测所述超声波回波信号,所述压电材料根据所述超声波回波信号生成所述压电子信号。
- 根据权利要求4所述的电路,其中,所述压电材料为聚偏氟乙烯膜式压电材料、氮化铝压电材料、压电陶瓷或氧化锌压电材料。
- 根据权利要求4所述的电路,其中,所述压电材料设置在所述发射端和所述接收端之间。
- 根据权利要求1所述的电路,其中,所述采样模块包括多个第二晶体管,所述多个第二晶体管与所述多个周期一一对应,所述多个第二晶体管的第一极均与所述检测模块连接,每个所述第二晶体管的第二极接收对应周期的所述采样信号,每个所述第二晶体管的控制极接收对应周期的第二控制信号以导通,所述多个第二晶体管的第一极作为所述采样模块的输出端;其中,前一个周期对应的所述采样信号的电平低于后一个所述周期对应的所述采样信号的电平。
- 根据权利要求10所述的电路,其中,在每个所述周期,在所述检测模块生成对应的压电子信号后,所述周期对应的所述第二晶体管的第二极接收周期对应的偏置信号;其中,所述周期对应的偏置信号的电平低于所述周期对应的所述采样信号的电平。
- 根据权利要求1所述的电路,其中,所述信号检测电路还包括信号读出模块和读取信号线;所述信号读出模块与所述采样模块的输出端和所述读取信号线连接,所述信号读出模块被配置为在所述多个所述压电子信号和每个所述周期对应的所述采样信号存储在所述采样模块的输出端后,导通所述采样模块的输出端和所述读取信号线,以从所述读取信号线输出所述采样模块的输出端存储的信号。
- 根据权利要求12所述的电路,其中,所述信号读出模块包括第三晶体管和第四晶体管;所述第三晶体管的第一极与电源连接,所述第三晶体管的控制极与所述 采样模块的所述输出端连接;所述第四晶体管的第一极与所述第三晶体管的第二极连接,所述第四晶体管的控制极被配置为接收第三控制信号,所述第四晶体管的第二极与所述读取信号线连接。
- 根据权利要求1所述的电路,其中,所述采样模块被配置为在每个所述周期中正半周期的预设时间段内接收对应的所述采样信号,或者被配置为在每个所述周期中负半周期的预设时间段内接收对应的所述采样信号;其中,所述预设时间段为所述多个波瘠信号对应的所述多个压电子信号和所述多个波谷信号对应的所述多个压电自信和之间的信号差值最大的时间段。
- 根据权利要求14所述的电路,其中,在每个所述周期的时间长度为T的情况下,所述预设时间段的时间长度范围为1/8T至3/8T。
- 一种指纹识别装置,其中,包括衬底基板和多个权利要求1-15中任一项所述的信号检测电路,所述多个信号检测电路设置在所述衬底基板上。
- 根据权利要求16所述的指纹识别装置,其中,一部分所述信号检测电路中的所述检测模块被配置为生成与所述多个周期的波瘠信号对应的所述压电子信号,另一部分所述信号检测电路中的所述检测模块被配置为生成与所述多个周期的波谷信号对应的所述多个压电子信号。
- 一种显示设备,其中,包括显示面板和权利要求16或17所述的指纹识别装置,所述指纹识别装置设置在所述显示面板的底部。
- 一种根据权利要求1-15中任一项所述的信号检测电路的信号检测方法,其中,包括:在采样阶段,检测超声波回波信号,并根据所述超声波回波信号生成多个压电子信号,所述多个压电子信号与所述超声波回波信号的多个周期一一对应,所述多个压电子信号对应所述多个周期的波脊信号,或所述多个压电子信号对应所述多个周期的波谷信号;以及在每个所述周期接收对应的采样信号,并将所述周期对应的所述采样信号和所述多个压电子信号存储在所述采样模块的输出端。
- 根据权利要求19所述的方法,其中,所述采样模块包括第一晶体管,在每个所述周期,通过所述第一晶体管的第二极接收所述周期对应的所述采 样信号,以及通过周期对应的第一控制信号控制所述第一晶体管导通。
- 根据权利要求19所述的方法,其中,所述采样模块包括多个第二晶体管,所述多个第二晶体管与所述多个周期一一对应,通过每个所述第二晶体管的第二极接收对应周期的所述采样信号,以及通过周期对应的控制信号控制所述周期对应的所述第二晶体管导通。
- 根据权利要求19所述的方法,其中,所述方法还包括:在信号发射阶段,通过所述检测模块发射超声波信号。
- 根据权利要求19所述的方法,其中,所述信号检测电路还包括信号读出模块和读取信号线,所述方法还包括:在保持阶段,通过所述采样模块的所述输出端存储所述多个周期对应的多个采样信号和所述多个压电子信号;以及在信号读出阶段,导通所述采样模块的所述输出端存储的所述多个周期对应的所述多个采样信号和所述多个压电子信号。
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20160089816A (ko) * | 2015-01-20 | 2016-07-28 | 인텔렉추얼디스커버리 주식회사 | 광음향 지문 인식 장치 및 방법 |
CN108883435A (zh) * | 2016-04-04 | 2018-11-23 | 高通股份有限公司 | 用于超声换能器像素读出的驱动方案 |
CN111062344A (zh) * | 2019-12-20 | 2020-04-24 | 京东方科技集团股份有限公司 | 超声波指纹识别方法、装置及系统、显示装置、存储介质 |
CN111079719A (zh) * | 2020-01-19 | 2020-04-28 | 成都芯曌科技有限公司 | 一种超声波电路及指纹识别传感器和电子设备 |
CN111274983A (zh) * | 2020-02-05 | 2020-06-12 | 京东方科技集团股份有限公司 | 指纹识别电路、装置和驱动方法 |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
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CN108883435A (zh) * | 2016-04-04 | 2018-11-23 | 高通股份有限公司 | 用于超声换能器像素读出的驱动方案 |
CN111062344A (zh) * | 2019-12-20 | 2020-04-24 | 京东方科技集团股份有限公司 | 超声波指纹识别方法、装置及系统、显示装置、存储介质 |
CN111079719A (zh) * | 2020-01-19 | 2020-04-28 | 成都芯曌科技有限公司 | 一种超声波电路及指纹识别传感器和电子设备 |
CN111274983A (zh) * | 2020-02-05 | 2020-06-12 | 京东方科技集团股份有限公司 | 指纹识别电路、装置和驱动方法 |
CN111680663A (zh) * | 2020-06-19 | 2020-09-18 | 京东方科技集团股份有限公司 | 信号检测电路、信号检测方法、指纹识别装置及显示设备 |
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