WO2021244510A1 - Yield prediction method in integrated circuit wafer manufacturing - Google Patents

Abstract

A yield prediction method in integrated circuit wafer manufacturing, comprising the following steps: acquiring a candidate reference product model; acquiring candidate reference product parameters; acquiring a candidate reference product function; predicting a candidate reference product; selecting a final reference product; acquiring a new product prediction model; and predicting new product yield. The described method is based on the functional relationship between random defect density and yield in wafer manufacturing; by referring to yield data of existing mature products on a production line, and by using data model establishment and regression analysis, a relatively accurate prediction value of new product yield can be attained, thus providing semiconductor integrated circuit wafer manufacturing with a method for predicting the yield of a new product.

Description

Yield rate prediction method in integrated circuit wafer manufacturing Technical field

The invention relates to a method for predicting yield in integrated circuit wafer manufacturing.

Background technique

In the semiconductor integrated circuit wafer manufacturing process, especially in the new product development process, the yield of new products has a key impact on the initial cost budget and output value. The semiconductor integrated circuit wafer manufacturing involves complex manufacturing procedures and manufacturing There are many processes and many types of products. Among them, there is a large degree of uncertainty and subjective empirical factors in the prediction of new product yield. Due to the inability to accurately predict the production yield of new products, the decision-making time in the early stage of production is prolonged. Increasing the time cost of production and other related costs, and leading to the inability to accurately estimate the corresponding output value before the decision to develop new products and put into production.

Summary of the invention

The present invention is carried out in order to solve the above-mentioned problems. It provides a yield prediction method in integrated circuit wafer manufacturing. Based on the functional relationship between random defect density and yield in wafer manufacturing, refer to the mature products on the production line. Through the establishment of data model and regression analysis, the yield data of new products can reach a relatively accurate prediction value of the yield of new products, which provides a method of predicting the yield of new products for semiconductor integrated circuit wafer manufacturing.

In order to achieve the above objective, the present invention proposes a yield prediction method in integrated circuit wafer manufacturing, which has such characteristics and includes the following steps:

Obtaining candidate reference product models: selecting the first number of candidate reference products in the reference product library, and obtaining the full adjustment factor linear regression equation based on each of the candidate reference products according to the first preset rule;

Obtaining the parameters of the candidate reference products: respectively obtaining the yield impact factors of each of the candidate reference products;

Obtaining alternative reference product functions: According to the respective yield influencing factors and the full adjustment factor linear regression equation, the full coordination factor linear function of each candidate reference product is obtained, and based on each candidate reference product Modified prediction yield model;

Candidate reference product prediction: From each of the revised predicted yield models based on the current candidate reference product, the predicted yield of each other candidate reference product is obtained, and the predicted yield of each other candidate reference product is obtained according to the second preset rule. The overall yield error value of the product is obtained according to the third preset rule based on the correlation coefficient of the linear function of the full coordination factor of each candidate reference product;

Final reference product selection: select the candidate reference product with the smallest overall yield error value or the linear function correlation coefficient of the full coordination factor closest to 1 as the final reference product;

New product prediction model acquisition: obtaining a new product prediction model based on the final reference product according to the full adjustment factor linear function based on the final reference product;

New product yield prediction: According to the new product yield prediction model and the yield influence factor of the new product, a new product yield prediction result is obtained.

In addition, the yield prediction method in integrated circuit wafer manufacturing provided by the present invention also has the feature that the first preset rule is:

Wherein, _Ye is the actual yield of the candidate reference product e, and λ _e is the average number of defects of the wafer corresponding to the candidate reference product e.

In addition, the yield prediction method in integrated circuit wafer manufacturing provided by the present invention also has the feature that the yield impact factor includes the number of mask layers, chip area, and minimum line width of the reference product.

In addition, the yield prediction method in integrated circuit wafer manufacturing provided by the present invention also has the feature that the full adjustment factor linear regression equation σ is:

σ=-ln Y/λ _e = f(X ₁ ,X ₂ ,X ₃ ,···)=b+k ₁ X ₁ +k ₂ X ₂ +k ₃ X ₃ +···

Among them, b is a constant term, and X ₁ , X ₂ , and X ₃ are variable terms related to the yield influencing factors, respectively

_E N ratio corresponding to the variable terms reticle mask layers current product and the reference product of the number of layers N,

Is the variable item corresponding to the ratio of the chip area A of the current product to the chip area A _{e of the reference product,}

Than the corresponding minimum line width W of the variable terms refer to product a minimum line width W _E of the current product, k ₁ X ₁ corresponds to a variable linear regression coefficients, k ₂ X ₂ linear regression coefficients corresponding to the variable, k ₃ Is the linear regression coefficient corresponding to the variable X _3.

In addition, the yield prediction method in integrated circuit wafer manufacturing provided by the present invention also has the feature that the linear function of the full coordination factor is:

In addition, the yield prediction method in integrated circuit wafer manufacturing provided by the present invention also has the feature that the modified yield prediction model is:

in,

Is the predicted yield of product i based on the candidate reference product e, σ _i is the full adjustment factor of product i based on the candidate reference product e, and _Ye is the actual production yield of the candidate reference product e.

In addition, the yield prediction method in integrated circuit wafer manufacturing provided by the present invention also has the feature that the second preset rule is: the overall yield error value d based on the current candidate reference product is

Among them, N is the total quantity _{of other candidate reference products, z i} is the predicted yield of other candidate reference products i

The difference between the actual yield Y _{i, μ} is the total average of the differences of all the other alternatives for each prediction refer to product yield and the actual yield.

In addition, the yield prediction method in integrated circuit wafer manufacturing provided by the present invention also has the feature that the third preset rule includes: a linear function correlation coefficient R based on the full coordination factor of each candidate reference product for

Among them, the average value of the actual yields of all the other candidate reference products

In addition, the yield prediction method in integrated circuit wafer manufacturing provided by the present invention also has the feature that the preset evaluation rule is: the overall value of the predicted yield of the other candidate reference products and the actual yield value The error value is the smallest.

In addition, in order to achieve the above-mentioned object, the present invention also provides an electronic device having such characteristics, the electronic device includes: a memory, a processor, the memory stores a yield prediction program in integrated circuit wafer manufacturing, When the yield prediction program in the integrated circuit wafer manufacturing is executed by the processor, the following steps are implemented:

Obtaining candidate reference product models: selecting the first number of candidate reference products in the reference product library, and obtaining the full adjustment factor linear regression equation based on each of the candidate reference products according to the first preset rule;

Obtaining the parameters of the candidate reference products: respectively obtaining the yield impact factors of each of the candidate reference products;

Obtaining alternative reference product functions: According to the respective yield influencing factors and the full adjustment factor linear regression equation, the full coordination factor linear function of each candidate reference product is obtained, and based on each candidate reference product Modified prediction yield model;

Prediction of alternative reference products: According to the revised predicted yield models based on the current alternative reference products, the predicted yields of the alternative reference products are obtained, and the predicted yields and actual yields of each of the alternative reference products are obtained. To obtain the yield error value of each of the candidate reference products;

Final reference product selection: select the candidate reference product with the smallest yield error value as the final reference product;

New product prediction model acquisition: obtaining a new product prediction model based on the final reference product according to the full adjustment factor linear function based on the final reference product;

New product yield prediction: According to the new product yield prediction model and the yield influence factor of the new product, a new product yield prediction result is obtained.

In addition, the present invention also provides a computer-readable storage medium having the feature that the yield prediction program in the integrated circuit wafer manufacturing is stored on the computer-readable storage medium, and the integrated circuit wafer When the yield prediction program in manufacturing is executed by the processor, the steps of the yield prediction method in integrated circuit wafer manufacturing are realized.

Invention effect and effect

The yield prediction method in integrated circuit wafer manufacturing involved in the present invention is based on the functional relationship between random defect density and yield in wafer manufacturing, and refers to the yield data of mature products on the production line, and establishes and Regression analysis, select the appropriate reference product, get the new product prediction model to predict the yield of the new product. The method in the present invention is based on the mature product database on the existing production line of the manufacturing plant as the basis of the yield prediction model. The data is true and reliable, and can reach a relatively accurate yield prediction value for new products, reflecting the actual production of the semiconductor wafer manufacturing plant Ability to establish a corresponding yield prediction model based on the product database of different factories, which is universal for semiconductor wafer manufacturing factories.

The theoretical basis of this method is based on the correlation model function between the yield rate and the defect density in wafer manufacturing, and the modified Poisson model factor is optimized to improve the accuracy of the yield rate prediction model.

Description of the drawings

In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only These are some embodiments of the present invention. For those of ordinary skill in the art, without creative work, other drawings can be obtained based on the structure shown in these drawings.

FIG. 1 is a schematic diagram of an embodiment of an electronic device of the present invention.

Fig. 2 is a program block diagram of an embodiment of a yield prediction program in integrated circuit wafer manufacturing of the present invention.

FIG. 3 is a screenshot of the yield prediction program in the integrated circuit wafer manufacturing of the present invention.

The realization of the objectives, functional characteristics and advantages of the present invention will be further described in conjunction with the embodiments and with reference to the accompanying drawings.

detailed description

Hereinafter, a method, device, and storage device for yield prediction in integrated circuit wafer manufacturing involved in the present invention will be described in detail with reference to the accompanying drawings and embodiments. The principles and features of the present invention will be described below with reference to the accompanying drawings. The examples cited are only used to explain the present invention, and are not used to limit the scope of the present invention.

FIG. 1 is a schematic diagram of an embodiment of an electronic device of the present invention.

The present invention provides an electronic device 1. Referring to FIG. 1, it is a schematic diagram of a preferred embodiment of the electronic device 1 of the present invention.

In this embodiment, the electronic device 1 includes a memory 11, a processor 12, a network interface 13, and a communication bus. Among them, the communication bus is used to realize the connection and communication between these components.

The network interface 13 may include a standard wired interface and a wireless interface (such as a WI-FI interface).

The memory 11 includes at least one type of readable storage medium. The at least one type of readable storage medium may be a non-volatile storage medium such as flash memory, hard disk, multimedia card, card-type memory, and the like. In some embodiments, the readable storage medium may be an internal storage unit of the electronic device 1, for example, a hard disk of the electronic device 1. In other embodiments, the readable storage medium may also be an external storage device of the electronic device 1, such as a plug-in hard disk or a smart memory card (Smart Media Card, SMC) equipped on the electronic device 1. , Secure Digital (SD) card, Flash Card, etc.

In this embodiment, the readable storage medium of the memory 11 is generally used to store the yield prediction program 10 and the like in the manufacture of integrated circuit wafers installed in the electronic device 1. The memory 11 can also be used to temporarily store data that has been output or will be output.

The processor 12 may be a central processing unit (Central Processing Unit, CPU), microprocessor or other data processing chip in some embodiments, for running program codes or processing data stored in the memory 11, for example, executing integrated circuit crystals. Yield rate prediction program in circular manufacturing 10 etc.

FIG. 1 only shows the electronic device 1 with the components 11-13 and the yield prediction program 10 in the manufacture of integrated circuit wafers, but it should be understood that it is not required to implement all the components shown and can be implemented instead. More or fewer components.

Optionally, the electronic device 1 may further include a user interface. The user interface may include a display (Display) and an input unit such as a keyboard (Keyboard). The optional user interface may also include a standard wired interface and a wireless interface.

Optionally, the electronic device 1 may also include a display. In some embodiments, it may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, and an organic light-emitting diode (Organic Light-Emitting Diode, OLED) touch device. The display is used to display the information processed in the electronic device and to display the visualized user interface.

FIG. 2 shows a program module diagram of an embodiment of a yield prediction program in integrated circuit wafer manufacturing of the present invention.

In the device embodiment shown in FIG. 1, the memory 11 as a computer storage medium includes the yield prediction program 10 in integrated circuit wafer manufacturing, and the processor 12 executes the integrated circuit wafer manufacturing process stored in the memory 11. The yield prediction program 10 includes the following modules: alternative reference product model acquisition module 110; alternative reference product parameter acquisition module 120; alternative reference product function acquisition module 130; alternative reference product prediction module 140; final reference product selection Module 150; New product prediction model acquisition module 160; New product yield prediction module 170.

As shown in FIG. 2, in this embodiment, the yield prediction program 10 in the manufacture of integrated circuit wafers may include and execute:

The candidate reference product model obtaining module 110: selects the first number of candidate reference products in the reference product library, and obtains a linear regression equation of the full adjustment factor based on each candidate reference product according to the first preset rule.

In the present invention, the reference product library may be composed of mature products already on a production line. More specifically, in some embodiments, there are 10 mature products with different product specifications (product 1, product 2...product 10) on the production line of a semiconductor integrated circuit wafer manufacturing plant, and these 10 products can be used as a reference Alternative reference products in the product library, among which the most suitable final reference product is selected. Each product has different manufacturing process, product parameters and actual yield, which can be used as the data of the yield model reference library.

More specifically, in the yield prediction program in integrated circuit wafer manufacturing provided by the present invention, a Poisson model of yield and defect density (number of defects) is first established according to a first preset rule.

The first preset rule is:

Wherein, _Ye is the actual yield of the candidate reference product e, and λ _e is the average number of defects of the wafer corresponding to the candidate reference product e.

The average wafer defect number λe is related to the product yield factor.

Therefore, the parameters of the modified Poisson model are the full adjustment factors:

σ=-lnY/λ _e

In addition, the value of the full adjustment factor is affected by the yield influencing factor. In the yield prediction method in integrated circuit wafer manufacturing provided by the present invention, the yield influencing factor includes the photomask layer of the reference product Number, chip area, minimum line width.

Furthermore, according to the Poisson model of yield and defect density (number of defects), regression analysis of the full adjustment factor can obtain the full adjustment factor linear regression equation σ as:

σ=-ln Y/λ _e = f(X ₁ ,X ₂ ,X ₃ ,···)=b+k ₁ X ₁ +k ₂ X ₂ +k ₃ X ₃ +···

Among them, b is a constant term, and X ₁ , X ₂ , and X ₃ are variable terms related to the yield influencing factors, respectively

_E N ratio corresponding to the variable terms reticle mask layers current product and the reference product of the number of layers N,

Is the variable item corresponding to the ratio of the chip area A of the current product to the chip area A _{e of the reference product,}

Than the corresponding minimum line width W of the variable terms refer to product a minimum line width W _E of the current product, k ₁ X ₁ corresponds to a variable linear regression coefficients, k ₂ X ₂ linear regression coefficients corresponding to the variable, k ₃ Is the linear regression coefficient corresponding to the variable X _3.

According to the full adjustment factor linear regression model σ, a full adjustment factor linear regression equation based on each candidate reference product can be obtained respectively.

FIG. 3 is a screenshot of the yield prediction program in the integrated circuit wafer manufacturing of the present invention.

As shown in Figure 3, in some embodiments, linear regression analysis is performed on the product 1, product 2...product 10, respectively, to obtain the full adjustment of each candidate reference product (product 1, product 2...product 10) Factor linear regression equation.

The candidate reference product parameter obtaining module 120: obtains the yield influencing factors of each candidate reference product respectively.

In the yield prediction program in integrated circuit wafer manufacturing of the present invention, the yield impact factor includes the number of mask layers, chip area, and minimum line width of the reference product, as shown in Table 1 below. In the embodiment, each candidate reference product (product 1, product 2...product 10) has a different number of mask layers N, area A of the wafer, and minimum line width W.

Table 1 Statistics on the yield impact factors of each candidate reference product in the reference product library

product	Number of mask layers	Chip area cm2	Minimum line width um	Average yield
1	11	0.1533	1.0	95.6%
2	10	0.1879	0.8	90.2%
3	12	0.2053	0.8	87.4%
4	14	0.0894	0.6	82.5%
5	10	0.1469	0.7	90.8%
6	13	0.1376	1.0	93.5%
7	12	0.1091	0.6	84.2%
8	11	0.1695	0.8	91.4%
9	12	0.1448	0.6	87.4%
10	11	0.1986	0.7	85.9%

Candidate reference product function obtaining module 130: According to the respective yield influencing factors and the full adjustment factor linear regression equation, the full coordination factor linear function of each candidate reference product is obtained, and based on each candidate Refer to the revised predictive yield model of the product.

Since the product yield rate of wafer manufacturing is related to the product process parameters such as the number of mask layers N, the chip area A, and the minimum line width W of the product, the full adjustment factor linear regression equation σ can also be expressed as follows:

Therefore, for each candidate reference product in the reference product library, after entering the yield impact factor of each candidate reference product, the corresponding modified Poisson model full coordination factor linear function can be obtained. For example, in some embodiments, the full coordination factor linear function σ of product 9 is:

In addition, in the yield prediction method in integrated circuit wafer manufacturing provided by the present invention, according to the linear regression equation of the full adjustment factor, the modified yield prediction model of each candidate reference product can be obtained:

in,

Is the predicted yield of product i based on the candidate reference product e, σ _i is the full adjustment factor of product i based on the candidate reference product e, and _Ye is the actual production yield of the candidate reference product e.

The candidate reference product prediction module 140: Obtain the predicted yield of each other candidate reference product from each of the revised predicted yield models based on the current candidate reference product, and obtain the predicted yield based on each of the candidate reference products according to the second preset rule. The overall yield error value of the reference product is selected, and the correlation coefficient of the linear function based on the full coordination factor of each candidate reference product is obtained according to the third preset rule.

As mentioned above, for example, the full adjustment factor linear function σ of product 9 is substituted into the modified yield prediction model of each candidate reference product to obtain the modified prediction yield model corresponding to product 9:

In some embodiments, based on the modified predictive yield model, the corresponding parameters of other products in the product library are substituted into the above-mentioned modified predictive yield model with product 9 as the reference product, so that other products corresponding to product 9 as the reference product can be obtained. The predicted yield of the product. The corresponding predicted yield and actual yield values of products in the reference library of other products are shown in Table 2 below:

Table 2 Yield prediction statistics of other alternative reference products based on the final reference product

product	1	2	3	4	5	6	7	8	10
Average yield	95.6%	90.2%	87.4%	82.5%	90.8%	93.5%	84.2%	91.4%	85.9%
Predicted yield	96.0%	91.2%	87.2%	82.5%	90.0%	93.4%	84.6%	90.5%	86.0%

As shown in the above table, the overall yield error value based on each of the candidate reference products is further obtained according to the second preset rule. The second preset rule includes: the overall yield error value d based on the current candidate reference product is:

Among them, N is the total quantity _{of other candidate reference products, z i} is the predicted yield of other candidate reference products i

The difference between the actual yield Y _{i, μ} is the total average of the differences of all the other alternatives for each prediction refer to product yield and the actual yield.

Obtain the overall yield error value of each candidate reference product in turn. As shown in Table 3 below. Taking product 9 as an example, substituting the average yield and predicted yield of each other candidate reference product into the above formula, the overall yield error value is 0.00587.

Table 3 σ function regression analysis and overall yield error statistics of each candidate reference product

Reference product	σ function correlation	Overall yield error value
1	0.83116	0.01457
2	0.89431	0.38583
3	0.88319	0.01448
4	0.86024	0.01327
5	0.88083	0.01449
6	0.86744	0.01436
7	0.82692	0.01638
8	0.88024	0.01438
9	0.98248	0.00587
10	0.88549	0.01405

In addition, the correlation coefficient of the linear function of the full coordination factor based on each of the candidate reference products can also be obtained according to the third preset rule. ^{The correlation is the value of the correlation coefficient R 2} of the regression analysis model corresponding to this product as the reference product. In statistics, ^{the closer the correlation coefficient R 2 is} to 1, the closer the model is to the real situation.

^{The third preset rule includes: the correlation coefficient R 2} of the linear function based on the full coordination factor of each candidate reference product is

Among them, the average value of the actual yields of all the other candidate reference products

According to the above steps, the correlation coefficient of the linear function of the full coordination factor of each candidate reference product is obtained in turn, as shown in Table 3 above. Taking product 9 as an example, substituting the average yield and predicted yield of each other candidate reference product into the above formula, the correlation coefficient of the linear function of its full coordination factor is 0.98248.

The final reference product selection module 150: select the candidate reference product that minimizes the yield error value of the other candidate reference products as the reference product.

In some embodiments, from Table 3, the overall yield error value corresponding to product 9 in the reference product library is the smallest, which is 0.00587, and the correlation coefficient R ² value is 0.98248, which is close to 1, indicating that the correlation is very good. Use it as the final reference product, which can be used to predict the yield of new products.

New product prediction model acquisition 160: Obtain a new product prediction model based on the final reference product according to the full adjustment factor linear function σ based on the final reference product.

In some embodiments, when the ninth product is selected as the reference product, the corresponding full adjustment factor linear function σ in semiconductor wafer manufacturing is:

Then the new product prediction model is:

New product yield prediction module 170: According to the new product yield prediction model, obtain a new product yield prediction result.

In some embodiments, according to the above-mentioned new product yield prediction model and the yield impact factor of the new product, the yield prediction result of the new product can be obtained, so as to evaluate the yield of the new product on the semiconductor wafer manufacturing line. Rate level.

Specifically, the number of mask layers of the new product is 14, the minimum line width is 0.8um, and the chip area is 0.25cm2, the corresponding full adjustment factor σ of the new product on the wafer manufacturing line can be obtained from the above formula The full adjustment factor σ of the new product is 0.59554. The predicted yield value corresponding to the new product:

In addition, an embodiment of the present invention also provides a computer-readable storage medium, the computer-readable storage medium stores a yield prediction program in integrated circuit wafer manufacturing, and the yield prediction in integrated circuit wafer manufacturing The following operations are implemented when the program is executed by the processor:

Obtaining candidate reference product models: selecting the first number of candidate reference products in the reference product library, and obtaining the full adjustment factor linear regression equation based on each of the candidate reference products according to the first preset rule;

Obtaining the parameters of the candidate reference products: respectively obtaining the yield influencing factors of each of the candidate reference products;

Obtaining alternative reference product functions: According to the respective yield influencing factors and the full adjustment factor linear regression equation, the full coordination factor linear function of each candidate reference product is obtained, and based on each candidate reference product Modified prediction yield model;

Candidate reference product prediction: From each of the revised predicted yield models based on the current candidate reference product, the predicted yield of each other candidate reference product is obtained, and the predicted yield of each other candidate reference product is obtained according to the second preset rule. The overall yield error value of the product is obtained according to the third preset rule based on the correlation coefficient of the linear function of the full coordination factor of each candidate reference product;

Final reference product selection: select the candidate reference product with the smallest overall yield error value or the linear function correlation coefficient of the full coordination factor closest to 1 as the final reference product;

New product prediction model acquisition: obtaining a new product prediction model based on the final reference product according to the full adjustment factor linear function based on the final reference product;

New product yield prediction: According to the new product yield prediction model and the yield influence factor of the new product, a new product yield prediction result is obtained.

The specific implementation of the computer-readable storage medium of the present invention is substantially the same as the specific implementation of the yield prediction method in the fabrication of integrated circuit wafers, and will not be repeated here.

The function and effect of the embodiment

According to the yield prediction method in integrated circuit wafer manufacturing involved in this embodiment, based on the functional relationship between random defect density and yield in wafer manufacturing, refer to the yield data of mature products on the production line, and use the data model Establish and regression analysis, select appropriate reference products, and obtain new product prediction models to predict the yield of new products. The method in the present invention is based on the mature product database on the existing production line of the manufacturing plant as the basis of the yield prediction model. The data is true and reliable, and can reach a relatively accurate yield prediction value for new products, reflecting the actual production of the semiconductor wafer manufacturing plant Ability to establish a corresponding yield prediction model based on the product database of different factories, which is universal for semiconductor wafer manufacturing factories.

The foregoing embodiments are preferred cases of the present invention, and are not used to limit the protection scope of the present invention.

The sequence numbers of the foregoing embodiments of the present invention are only for description, and do not represent the superiority or inferiority of the embodiments.

The above are only the preferred embodiments of the present invention, and do not limit the scope of the present invention. Any equivalent structure or equivalent process transformation made by using the content of the description and drawings of the present invention, or directly or indirectly applied to other related technical fields , The same reason is included in the scope of patent protection of the present invention.

Claims (10)

1. A method for predicting yield in integrated circuit wafer manufacturing, which is characterized in that it comprises the following steps:

   Obtaining candidate reference product models: selecting the first number of candidate reference products in the reference product library, and obtaining the full adjustment factor linear regression equation based on each of the candidate reference products according to the first preset rule;

   Obtaining the parameters of the candidate reference products: respectively obtaining the yield impact factors of each of the candidate reference products;

   Obtaining alternative reference product functions: According to the respective yield influencing factors and the full adjustment factor linear regression equation, the full coordination factor linear function of each candidate reference product is obtained, and based on each candidate reference product Modified prediction yield model;

   Candidate reference product prediction: From each of the revised predicted yield models based on the current candidate reference product, the predicted yield of each other candidate reference product is obtained, and the predicted yield of each other candidate reference product is obtained according to the second preset rule. The overall yield error value of the product is obtained according to the third preset rule based on the correlation coefficient of the linear function of the full coordination factor of each candidate reference product;

   Final reference product selection: select the candidate reference product with the smallest overall yield error value or the linear function correlation coefficient of the full coordination factor closest to 1 as the final reference product;

   New product prediction model acquisition: obtaining a new product prediction model based on the final reference product according to the full adjustment factor linear function based on the final reference product;

   New product yield prediction: According to the new product yield prediction model and the yield influence factor of the new product, a new product yield prediction result is obtained.
2. The method for predicting yield in integrated circuit wafer manufacturing according to claim 1, wherein the first preset rule is:

   

   Where _Ye is the actual yield of the candidate reference product e,

   λ _e is the average number of defects on the wafer corresponding to the candidate reference product e.
3. The method for predicting yield in integrated circuit wafer manufacturing according to claim 2, wherein the yield influencing factor includes the number of mask layers, chip area, and minimum line width of the reference product.
4. The yield prediction method in integrated circuit wafer manufacturing according to claim 3, wherein the linear regression equation σ of the full adjustment factor is:

   σ=-ln Y/λ _e = f(X ₁ ,X ₂ ,X ₃ ,···)=b+k ₁ X ₁ +k ₂ X ₂ +k ₃ X ₃ +···

   Among them, b is a constant term,

   X ₁ , X ₂ , X ₃ are the variable items related to the yield influencing factors, respectively

   

   

   _E N ratio corresponding to the variable terms reticle mask layers current product and the reference product of the number of layers N,

   

   Is the variable item corresponding to the ratio of the chip area A of the current product to the chip area A _{e of the reference product,}

   

   Is the variable item corresponding to the ratio _{of the minimum line width W e} of the reference product to the minimum line width W of the current product,

   k ₁ is the linear regression coefficient corresponding to the variable X _1,

   k ₂ is the linear regression coefficient corresponding to the variable X _2,

   k ₃ is the linear regression coefficient corresponding to the variable X _3.
5. The yield prediction method in integrated circuit wafer manufacturing according to claim 3, wherein the linear function of the full coordination factor is:

   
6. The yield prediction method in integrated circuit wafer manufacturing according to claim 1, wherein the modified yield prediction model is:

   

   in,

   

   Is the predicted yield of product i based on the candidate reference product e,

   σ _i is the full adjustment factor of product i based on the candidate reference product e,

   _Ye is the actual production yield of the candidate reference product e.
7. The yield prediction method in integrated circuit wafer manufacturing according to claim 6, wherein the second preset rule is: the overall yield error value d based on the current candidate reference product is

   

   Wherein, N is the total number of alternatives which he reference product,

   z _i is the predicted yield of other candidate reference products i

   

   And the actual yield Y _i difference,

   μ is the total average value of the difference between the predicted yield and the actual yield of all the other candidate reference products.
8. 8. The yield prediction method in integrated circuit wafer manufacturing according to claim 7, wherein the third preset rule comprises:

   Based on the full coordination factor linear function correlation coefficient R of each candidate reference product is

   

   Among them, the average value of the actual yields of all the other candidate reference products

   
9. An electronic device, characterized in that it includes a memory and a processor, the memory stores a yield prediction program in integrated circuit wafer manufacturing, and the yield prediction program in integrated circuit wafer manufacturing When executed by the processor, the following steps are implemented:

   Obtaining candidate reference product models: selecting the first number of candidate reference products in the reference product library, and obtaining the full adjustment factor linear regression equation based on each of the candidate reference products according to the first preset rule;

   Obtaining the parameters of the candidate reference products: respectively obtaining the yield impact factors of each of the candidate reference products;

   Obtaining alternative reference product functions: According to the respective yield influencing factors and the full adjustment factor linear regression equation, the full coordination factor linear function of each candidate reference product is obtained, and based on each candidate reference product Modified prediction yield model;

   Alternative reference product prediction module: From each of the revised predicted yield models based on the current alternative reference products, the predicted yields of other alternative reference products are obtained, and the predicted yields of other alternative reference products are obtained according to the second preset rule. The overall yield error value of the reference product is obtained, and the correlation coefficient of the linear function based on the full coordination factor of each candidate reference product is obtained according to the third preset rule;

   Final reference product selection module: select the candidate reference product with the smallest overall yield error value as the final reference product;

   Obtaining a new product prediction model: obtaining a new product prediction model based on the final reference product according to the full adjustment factor linear function based on the final reference product;

   New product yield prediction: According to the new product yield prediction model and the yield influence factor of the new product, a new product yield prediction result is obtained.
10. A computer-readable storage medium, wherein the computer-readable storage medium stores the yield prediction program in the integrated circuit wafer manufacturing, and the yield prediction program in the integrated circuit wafer manufacturing is The processor implements the steps of the method for predicting yield in integrated circuit wafer manufacturing according to any one of claims 1 to 9 when executed.

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