WO2021218434A1 - 数据传输方法及设备, 芯片系统, 计算机可读存储介质 - Google Patents

数据传输方法及设备, 芯片系统, 计算机可读存储介质 Download PDF

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Publication number
WO2021218434A1
WO2021218434A1 PCT/CN2021/080305 CN2021080305W WO2021218434A1 WO 2021218434 A1 WO2021218434 A1 WO 2021218434A1 CN 2021080305 W CN2021080305 W CN 2021080305W WO 2021218434 A1 WO2021218434 A1 WO 2021218434A1
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Prior art keywords
data
scrambler
bits
bit sequence
order
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PCT/CN2021/080305
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English (en)
French (fr)
Inventor
刘辰辰
梁丹丹
于健
淦明
张美红
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华为技术有限公司
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Publication of WO2021218434A1 publication Critical patent/WO2021218434A1/zh
Priority to US17/975,884 priority Critical patent/US20230064452A1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/26Systems using multi-frequency codes
    • H04L27/2601Multicarrier modulation systems
    • H04L27/2614Peak power aspects
    • H04L27/2615Reduction thereof using coding
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03828Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties
    • H04L25/03866Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties using scrambling
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/26Systems using multi-frequency codes
    • H04L27/2601Multicarrier modulation systems
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path
    • H04L5/003Arrangements for allocating sub-channels of the transmission path
    • H04L5/0044Arrangements for allocating sub-channels of the transmission path allocation of payload
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/26Systems using multi-frequency codes
    • H04L27/2601Multicarrier modulation systems
    • H04L27/2602Signal structure
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path
    • H04L5/0001Arrangements for dividing the transmission path
    • H04L5/0014Three-dimensional division
    • H04L5/0016Time-frequency-code
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path
    • H04L5/0091Signaling for the administration of the divided path

Definitions

  • This application relates to the field of communication technology, and in particular to a data transmission method and device, a chip system, and a computer-readable storage medium.
  • the sender device transmits information to the receiver device in the form of a bit stream.
  • the bit stream is composed of "0" and "1".
  • the transmitter will always XOR the information bit stream to be sent with another pseudo-random sequence.
  • After the receiving end decodes the received bit stream, it XORs the decoded bit stream with the same pseudo-random sequence to restore the original information bit stream.
  • the original information bit stream is XORed with the pseudo-random sequence, it can also play a role in encrypting the original information stream.
  • the XOR operation of the original information stream and the pseudo-random sequence at the transmitting end is called scrambling.
  • the pseudo-random sequence used is called a scrambling code sequence.
  • the device that generates the scrambling code sequence is called a scrambler.
  • the receiving end recovers from the scrambled sequence.
  • the process of the original information flow is called descrambling.
  • orthogonal frequency division multiplexing (OFDM) symbols are superimposed by multiple independently modulated sub-carrier signals, when the phases of the sub-carriers are the same or close, the superimposed signals will receive the same initial phase.
  • the modulation of the signal produces a larger instantaneous power peak, which results in a higher peak-to-average power ratio (PAPR).
  • PAPR peak-to-average power ratio
  • High PAPR has become a major technical obstacle to OFDM. Therefore, in the OFDM communication system, the use of scrambling code technology plays a role in reducing the PAPR of the system.
  • the generation of scrambling code is generally realized by a circular shift register.
  • the typical structure is shown in Figure 1.
  • the sequence generation method of the circular shift register is as follows:
  • mod(*,2) is the modulo 2.
  • the above process is repeated cyclically, and the generated output bits are assembled together to form a scrambling code sequence.
  • the output sequence will repeat the previous output result, and the length of the longest non-repeated sequence that can be generated by the scrambler is not greater than 2 m -1.
  • a scrambler can also be represented by a generator polynomial.
  • the scrambler in Figure 1 can be described by the following generator polynomial:
  • the Wireless Fidelity (WiFi) standard has been using the scrambler structure shown in Figure 2 since the 802.11a standard.
  • the WiFi device XORs the original information bit stream with the periodic sequence at the transmitting end, and encodes and sends the result of the XOR. .
  • the starting position of the scrambling code sequence also called the phase of the scrambler
  • the receiving end also It is necessary to know the initial state of the scrambler to generate the same scrambling code sequence as the transmitting end, so as to restore the original information bit stream.
  • a 16-bit service field is defined in the WiFi standard, as shown in Table 1:
  • the first 7 bits of the service field are the initialization bits of the scrambler, which are used to synchronize with the descrambler.
  • the scrambler initialization bit can be set to "0" to facilitate the estimation of the initial state of the scrambler of the receiving device.
  • the remaining 9 bits in the service field are reserved for service, and can also be set to "0".
  • the transmission sequence can be from low bit 0 to high bit 15.
  • the sender device and the receiver device use the same generator polynomial scrambler by default, and their working principles are as follows:
  • the scrambling process of the sender device each time a data packet is transmitted, the scrambler randomly selects an initial state that is not 0, which corresponds to the initial bit value of the 7 registers.
  • the scrambler generates 127 bits cyclically, and then XORs the continuously repeated 127-bit sequence with the input data bits, and outputs the scrambled data bits. Finally, the scrambled data bits are sent out.
  • the descrambling process of the receiving end device When the receiving end device receives the scrambled data bits, it obtains the 127 generated by the scrambler cyclically according to the first 7 bits of the scrambled data and the first 7 bits of the data bits input by the scrambler The first 7 bits of the bit sequence. Furthermore, according to the first 7 bits of the 127-bit sequence and the generator polynomial of the scrambler, the initialization state of the scrambler is reversed. After the receiving end obtains the initial state of the scrambler, it can repeatedly generate 127 bits and perform XOR with the scrambled data bits, so that the original data bits before scrambling can be obtained.
  • the premise that the receiving end can descramble correctly is that the receiving end knows the first 7-bit data sequence input by the scrambler.
  • the existing method is to set the first 7-bit data sequence of the sender as a known sequence, and the values are all 0, and are placed in the service field of the data field.
  • the first 7 bits of data input by the scrambler are called scrambler initialization bits.
  • the use of the scrambler makes the transmitted bit stream more randomized, avoiding the occurrence of continuous long 0s or 1s, and at the same time encrypts the original information, avoiding plaintext transmission.
  • the scrambled bit stream due to the randomness of the scrambled bit stream, it is avoided that the subcarriers of an OFDM symbol in the OFDM system all transmit the same information or the appearance of periodic signals, thereby reducing the PAPR of the OFDM system.
  • the channel bandwidth will be upgraded from 160Mhz to 320Mhz, and higher order modulations may be introduced, such as 4096-quadrature amplitude modulation (QAM), the existing length of 127 interference
  • QAM quadrature amplitude modulation
  • the code sequence may not avoid the repetition of periodic signals in an OFDM symbol, which makes the PAPR of the transmitted signal very large.
  • a higher order scrambler can generate a longer non-repetitive sequence, thereby avoiding the repetition of periodic signals in an OFDM symbol.
  • a higher order scrambler requires longer initialization bit information, which will undoubtedly increase system overhead.
  • the embodiments of the application provide a data transmission method, a transmitting end device, a receiving end device, a chip system, and a computer-readable storage medium.
  • a higher order scrambler is designed according to the bandwidth and modulation order, and signaling can be used.
  • the bits in the field replace part of the initialization bits of the scrambler, which can reduce the system overhead caused by long initialization bits, and generate a longer non-repetitive scrambling sequence, thereby avoiding the repetition of periodic signals in an OFDM symbol. Then reduce the PAPR of the system.
  • the first aspect of this application provides a data transmission method, including:
  • the scrambler initialization bit used to scramble the data includes a first bit sequence and a second bit sequence, wherein the first bit sequence is carried in the service field of the data to be transmitted;
  • the second bit sequence multiplexes the bits in the signaling field; the number of initialization bits is equal to the order of the scrambler.
  • a sender device including:
  • the processor is used to scramble the data to be transmitted to obtain the scrambled data
  • a transceiver configured to send the scrambled data to the receiving end device
  • the scrambler initialization bit used to scramble the data includes a first bit sequence and a second bit sequence, wherein the first bit sequence is carried in the service field of the data to be transmitted;
  • the second bit sequence multiplexes the bits in the signaling field; the number of initialization bits is equal to the order of the scrambler.
  • the scrambler initialization bit is based on Existing service fields and multiplexed signaling fields used for data scrambling codes reduce the PAPR without increasing the overhead of the service field, thereby increasing the throughput of the network.
  • the order of the scrambler corresponds to at least one of the size of the resource unit and the modulation and coding strategy .
  • the second bit sequence is multiplexed in the signaling field for indicating channel bandwidth (channel bandwidth). At least one of width), modulation and coding scheme (MCS), association identifier (AID), and basic service set (BSS Identifier, BSS) indicates the bit corresponding to the information.
  • MCS modulation and coding scheme
  • AID association identifier
  • BSS basic service set
  • the first bit sequence may be any one or a combination of the bits used to indicate the channel bandwidth, the bits used to indicate the MCS, the bits used to indicate the AID and the bits used to indicate the BSS, which
  • the order of transmission is not limited, and the order of the first bit sequence is also not limited. It is only necessary for the sending end device and the receiving end device to perform as agreed upon.
  • the first bit sequence is 7 bits, which are carried in the first 7 bits of the service field
  • the first bit sequence is set to 0.
  • 9 bits of the service field except the first 7 bits are set as the signaling Check bit of field B.
  • the third aspect of this application provides a data transmission method, including:
  • the order of the scrambler used to scramble the data corresponds to at least one of the size of the resource unit and the modulation and coding strategy.
  • a sender device including:
  • the processor is used to scramble the data to be transmitted to obtain the scrambled data
  • a transceiver configured to send the scrambled data to the receiving end device
  • the order of the scrambler used to scramble the data corresponds to at least one of the size of the resource unit and the modulation and coding strategy.
  • the scrambler that scrambles the data is a high- and low-order fusion scrambler.
  • the scrambler that scrambles data is a scrambler supporting different orders, and at least one of bandwidth and modulation coding index information is used to select A certain order of scrambler is used for data scrambling, which is compatible with the scrambler structure of the traditional WiFi system, so that equipment manufacturers can design scramblers of different complexity according to different scene requirements.
  • the scrambler initialization bit used to scramble the data includes a first bit sequence and a second bit sequence. Bit sequence, wherein the first bit sequence is carried in the service field of the data to be transmitted; the second bit sequence multiplexes the bits in the signaling field; the bit number of the initialization bit is equal to the scrambling The order of the encoder.
  • the second bit sequence is multiplexed in the signaling field for indicating channel bandwidth and modulation
  • the first bit sequence is 7 bits, which are carried in the first 7 bits of the service field ; Before the data is scrambled, the first bit sequence is set to 0.
  • 9 bits of the service field except the first 7 bits are set as the signaling Check bit of field B.
  • a data transmission method including:
  • the scrambler initialization bit used to descramble the data includes a first bit sequence and a second bit sequence, where the first bit sequence is 7 bits, and the bit sequence carried in the service field of the data Among the first 7 bits; the second bit sequence multiplexes the bits in the signaling field; the number of bits of the initialization bit is equal to the order of the scrambler.
  • a receiving end device which is characterized in that it includes:
  • Transceiver for receiving data after scrambling code
  • a processor configured to descramble the scrambled data to obtain descrambled data
  • the scrambler initialization bit used to descramble the data includes a first bit sequence and a second bit sequence, wherein the first bit sequence is carried in the service field of the data; the second The bit sequence multiplexes the bits in the signaling field; the number of the initialization bits is equal to the order of the scrambler.
  • the first bit sequence may be any one or a combination of the bits used to indicate the channel bandwidth, the bits used to indicate the MCS, the bits used to indicate the AID and the bits used to indicate the BSS, which
  • the order of transmission is not limited, and the order of the first bit sequence is also not limited. It is only necessary for the sending end device and the receiving end device to perform as agreed upon.
  • the scrambler initialization bit is based on the current state of the art.
  • PAPR is reduced, thereby increasing the throughput of the network.
  • the order of the scrambler corresponds to at least one of the resource unit size and the modulation and coding strategy .
  • the second bit sequence is multiplexed in the signaling field for indicating channel bandwidth and modulation
  • the first bit sequence is 7 bits, which are carried in the first 7 bits of the service field
  • the 9 bits of the service field except the first 7 bits are set as the check bits of the signaling field B.
  • a data transmission method including:
  • the order of the scrambler used to descramble the data corresponds to at least one of the size of the resource unit and the modulation and coding strategy.
  • a receiving end device including:
  • Transceiver for receiving data after scrambling code
  • a processor configured to descramble the scrambled data to obtain descrambled data
  • the order of the scrambler used to descramble the data corresponds to at least one of the size of the resource unit and the modulation and coding strategy.
  • the scrambler that descrambles the data is a high- and low-order fusion scrambler.
  • the scrambler initialization bit used to descramble the data includes a first bit sequence and a first bit sequence.
  • a two-bit sequence wherein the first bit sequence is carried in the service field of the data; the second bit sequence multiplexes the bits in the signaling field; the number of bits of the initialization bit is equal to the scrambling code The order of the device.
  • the second bit sequence is multiplexed in the signaling field for indicating channel bandwidth and modulation
  • the first bit sequence is 7 bits, which are carried in the first 7 bits of the service field
  • the 9 bits of the service field except the first 7 bits are set as the check bits of the signaling field B.
  • a chip system including: at least one processor and an interface, and a memory coupled with the processor; when the processor executes the computer program stored in the memory, the first The method described in any one of the aspect, the third aspect, the fourth aspect, the fifth aspect, and the seventh aspect is implemented.
  • the processor can be used to perform, for example, but not limited to, baseband related processing
  • the transceiver can be used to perform, for example, but not limited to, radio frequency transceiving.
  • the above-mentioned devices may be respectively arranged on independent chips, or at least partly or fully arranged on the same chip.
  • the processor can be further divided into an analog baseband processor and a digital baseband processor.
  • the analog baseband processor can be integrated with the transceiver on the same chip, and the digital baseband processor can be set on a separate chip. With the continuous development of integrated circuit technology, more and more devices can be integrated on the same chip.
  • a digital baseband processor can be combined with a variety of application processors (such as but not limited to graphics processors, multimedia processors, etc.) Integrated on the same chip.
  • application processors such as but not limited to graphics processors, multimedia processors, etc.
  • Such a chip can be called a system on chip. Whether each device is independently arranged on different chips or integrated on one or more chips often depends on the specific needs of product design.
  • a tenth aspect of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium is used to store a computer program, and when the computer program is executed, The method described in any one of the aspect, the fourth aspect, the fifth aspect, and the seventh aspect is implemented.
  • a sender device has some or all of the functions of the sender device in the method examples described in the first and third aspects.
  • the function of the sender device can be It has the functions of some or all of the embodiments of the present application, and may also have the functions of independently implementing any of the embodiments of the present application.
  • the function can be realized by hardware, or by hardware executing corresponding software.
  • the hardware or software includes one or more units or modules corresponding to the above-mentioned functions.
  • the structure of the sending end device may include a processing unit and a communication unit, and the processing unit is configured to support the sending end device to perform corresponding functions in the foregoing method.
  • the communication unit is used to support communication between the sending end device and other devices.
  • the sending end device may further include a storage unit, the storage unit is configured to be coupled with the processing unit and the sending unit, and saves necessary program instructions and data for the sending end device.
  • a twelfth aspect of the present application provides a receiving end device that has some or all of the functions of the receiving end device in the method examples described in the fifth and seventh aspects above.
  • the function of the receiving end device can be It has the functions of some or all of the embodiments of the present application, and may also have the functions of independently implementing any of the embodiments of the present application.
  • the function can be realized by hardware, or by hardware executing corresponding software.
  • the hardware or software includes one or more units or modules corresponding to the above-mentioned functions.
  • the structure of the receiving end device may include a processing unit and a communication unit, and the processing unit is configured to support the receiving end device to perform corresponding functions in the foregoing method.
  • the communication unit is used to support communication between the receiving end device and other devices.
  • the receiving end device may further include a storage unit, which is configured to be coupled with the processing unit and the sending unit, and stores necessary program instructions and data for the receiving end device.
  • a thirteenth aspect of the present application provides a processor configured to execute the method of any one of the foregoing first, third, fifth, and seventh aspects.
  • the processes of sending the above information and receiving the above information in the above methods can be understood as the process of outputting the above information by the processor and the process of receiving the input information of the processor.
  • the processor when outputting the above-mentioned information, the processor outputs the above-mentioned information to the transceiver for transmission by the transceiver. Furthermore, after the above-mentioned information is output by the processor, other processing may be required before it reaches the transceiver.
  • the transceiver receives the above-mentioned information and inputs it into the processor. Furthermore, after the transceiver receives the above-mentioned information, the above-mentioned information may need to undergo other processing before being input to the processor.
  • processor output and Operations such as receiving and inputting, rather than transmitting, sending and receiving operations directly performed by radio frequency circuits and antennas.
  • the foregoing processor may be a processor dedicated to executing these methods, or a processor that executes computer instructions in a memory to execute these methods, such as a general-purpose processor.
  • the above-mentioned memory may be a non-transitory memory, such as a read only memory (ROM), which may be integrated with the processor on the same chip, or may be separately arranged on different chips.
  • ROM read only memory
  • the present invention The embodiment does not limit the type of the memory and the setting mode of the memory and the processor.
  • the fourteenth aspect of the present application provides a computer program product including instructions, which when run on a computer, causes the computer to execute any of the above-mentioned first, third, fifth, and seventh aspects Methods.
  • the fifteenth aspect of the present application provides a functional entity, which is used to implement the method described in any one of the foregoing first, third, fifth, and seventh aspects.
  • the sixteenth aspect of the present application provides a high- and low-level fusion scrambler, which includes a 7-level scrambler, an 11-level scrambler, a 15-level scrambler, and other different levels of scramblers. .
  • the seventeenth aspect of the application provides three types of 17-level scramblers, one type of 18-level scrambler, and one type of 20-level scrambler.
  • Figure 1 is a schematic diagram of the structure of a circular shift register
  • Fig. 2 is a schematic diagram of the structure of a 7-stage scrambler
  • FIG. 3 is a schematic diagram of a network structure provided by an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a data transmission device provided by an embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of a sending end device provided by an embodiment of the present application.
  • FIG. 6 is a schematic structural diagram of a receiving end device provided by an embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of a chip system provided by an embodiment of the present application.
  • FIG. 8 is a schematic diagram of a flow of sending data packets based on a trigger frame according to an embodiment of the present application
  • FIG. 9 is a schematic structural diagram of a non-trigger-based data packet provided by an embodiment of the present application.
  • FIG. 10 is a schematic structural diagram of a 17-level scrambler provided by an embodiment of the present application.
  • FIG. 11 is a schematic structural diagram of another 17-level scrambler provided by an embodiment of the present application.
  • FIG. 12 is a schematic structural diagram of another 17-level scrambler provided by an embodiment of the present application.
  • FIG. 13 is a schematic structural diagram of an 18-level scrambler provided by an embodiment of the present application.
  • FIG. 14 is a schematic structural diagram of a 20-order scrambler provided by an embodiment of the present application.
  • 15 is a schematic structural diagram of a high- and low-order fusion scrambler provided by an embodiment of the present application.
  • FIG. 16 is a schematic flowchart of a data transmission method provided by an embodiment of the present application.
  • FIG. 3 is a schematic diagram of a network structure provided by an embodiment of the present application.
  • the network structure may include one or more access point (AP)-type sites and one or more non-access point-type sites ( none access point station, non-AP STA).
  • AP access point
  • non-AP STA non-access point-type sites
  • this article refers to the access point type of station as an access point (AP), and the non-access point type of station as a station (STA).
  • Figure 1 takes the network structure including one AP and six stations (STA 1, STA 2, STA 3, STA 4, STA 5, and STA 6) as an example for illustration.
  • the access point can be the access point for terminal equipment (such as mobile phones) to enter the wired (or wireless) network. It is mainly deployed in homes, buildings and parks. The typical coverage radius is tens of meters to hundreds of meters. Can be deployed outdoors.
  • the access point is equivalent to a bridge connecting the wired network and the wireless network. The main function is to connect each wireless network client together, and then connect the wireless network to the Ethernet.
  • the access point may be a terminal device (such as a mobile phone) or a network device (such as a router) with a wireless fidelity (WiFi) chip.
  • WiFi wireless fidelity
  • the access point can be a device that supports the 802.11be standard.
  • the access point may also be a device supporting multiple wireless local area networks (WLAN) standards of the 802.11 family such as 802.11ax, 802.11ac, 802.11n, 802.11g, 802.11b, and 802.11a.
  • WLAN wireless local area networks
  • the access point in this application may be a high-efficiency (HE) AP or an extremely high throughput (EHT) AP, or may be an access point that is applicable to a future generation of WiFi standards.
  • HE high-efficiency
  • EHT extremely high throughput
  • the site can be a wireless communication chip, a wireless sensor, or a wireless communication terminal, etc., and can also be referred to as a user.
  • the site can be a mobile phone that supports WiFi communication function, a tablet computer that supports WiFi communication function, a set-top box that supports WiFi communication function, a smart TV that supports WiFi communication function, a smart wearable device that supports WiFi communication function, and WiFi communication function is supported.
  • the station can support the 802.11be standard.
  • the site can also support multiple wireless local area networks (WLAN) standards of the 802.11 family such as 802.11be, 802.11ax, 802.11ac, 802.11n, 802.11g, 802.11b, and 802.11a.
  • WLAN wireless local area networks
  • the access point in this application may be a high-efficiency (HE) STA or an extremely high throughput (EHT) STA, or may be an STA applicable to a future generation of WiFi standards.
  • HE high-efficiency
  • EHT extremely high throughput
  • access points and sites can be devices used in the Internet of Vehicles, Internet of Things (IoT) nodes, sensors, etc., smart cameras, smart remote controls, smart water meters, and electricity meters in smart homes. And sensors in smart cities, etc.
  • IoT Internet of Things
  • FIG. 4 is a schematic structural diagram of a data transmission device provided by an embodiment of the application.
  • the data transmission device 200 may include a processor 201, a transceiver 205, and optionally a memory 202.
  • the transceiver 205 may be called a transceiver unit, a transceiver, or a transceiver circuit, etc., for implementing the transceiver function.
  • the transceiver 205 may include a receiver and a transmitter.
  • the receiver may be referred to as a receiver or a receiving circuit, etc., to implement a receiving function;
  • the transmitter may be referred to as a transmitter or a transmitting circuit, etc., to implement a transmitting function.
  • the memory 202 may store a computer program or software code or instruction 204, and the computer program or software code or instruction 204 may also be referred to as firmware.
  • the processor 201 can control the MAC layer and the PHY layer by running the computer program or software code or instruction 203 therein, or by calling the computer program or software code or instruction 204 stored in the memory 202, so as to realize the following aspects of this application. Examples.
  • the processor 201 may be a central processing unit (CPU), and the memory 202 may be, for example, a read-only memory (ROM) or a random access memory (RAM).
  • the processor 201 and the transceiver 205 described in this application can be implemented in an integrated circuit (IC), analog IC, radio frequency integrated circuit RFIC, mixed signal IC, application specific integrated circuit (ASIC), printed circuit Printed circuit board (PCB), electronic equipment, etc.
  • IC integrated circuit
  • analog IC analog IC
  • radio frequency integrated circuit RFIC radio frequency integrated circuit
  • mixed signal IC mixed signal IC
  • ASIC application specific integrated circuit
  • PCB printed circuit Printed circuit board
  • electronic equipment etc.
  • the above-mentioned data transmission device 200 may further include an antenna 206, and each module included in the data transmission device 200 is only an example for illustration, and this application is not limited thereto.
  • Figure 5 is a schematic structural diagram of a sender device provided by an embodiment of the present application.
  • the sender device can be used to implement any method and function related to the sender device in the embodiment of this application.
  • the sender device can Including a processing module 301 and a sending module 302.
  • the sending module 302 corresponds to a baseband circuit and a radio frequency circuit included in the sending end device.
  • the sending end device serves as the sending end of data transmission, and the detailed description of each module is as follows.
  • the sending end device includes:
  • the processing module 301 is used to scramble the data to be transmitted to obtain the scrambled data
  • the sending module 302 is configured to send the scrambled data to the receiving end device
  • the scrambler initialization bit used to scramble the data includes a first bit sequence and a second bit sequence, wherein the first bit sequence is carried in the service field of the data to be transmitted;
  • the second bit sequence multiplexes the bits in the signaling field; the number of initialization bits is equal to the order of the scrambler.
  • the initial bits of the scrambler are based on the existing service field and multiplexed part of the signaling field used for data scrambling, and no service is added. Based on the overhead of the field, PAPR is reduced, thereby increasing the throughput of the network.
  • the first bit sequence is carried in the first 7 bits of the service field; in another implementation manner, the first bit sequence may also be 5, 6 bits, 8, 9, 10 ,11,12,13,14,15,16 bits and so on;
  • the order of the scrambler corresponds to at least one of resource unit size and modulation and coding strategy.
  • the second bit sequence multiplexes bits corresponding to at least one indication information in the signaling field used to indicate channel bandwidth, modulation and coding strategy, association identifier, and basic service set.
  • the second bit sequence may be any one or a combination of the bits used to indicate the channel bandwidth, the bits used to indicate the MCS, the bits used to indicate the AID and the bits used to indicate the BSS, which
  • the order of transmission is not limited, and the order of the first bit sequence is also not limited. It is only necessary for the sending end device and the receiving end device to perform as agreed upon.
  • the first bit sequence is set to 0, and the 9 bits of the service field except the first 7 bits are set as the check bits of the signaling field.
  • the sending end device includes:
  • the processing module 301 is used to scramble the data to be transmitted to obtain the scrambled data; wherein, at least one of the order of the scrambler used to scramble the data, the size of the resource unit, and the modulation and coding strategy Correspondence, and the scrambler is a high- and low-order fusion scrambler.
  • the sending module 302 is configured to send the scrambled data to the receiving end device.
  • the scrambler used in this embodiment combines multiple scramblers of different orders, including the seventh-order scrambler used in the current WiFi standard. At least one type of information in the size of the resource unit allocated by a user determines the order of the scrambler. When the channel bandwidth is large, or the resource unit allocated to a user is large, or the modulation order of the modulation and coding strategy When it is very high, a high-order scrambler is used. If the channel bandwidth is small, or the resource unit allocated to a user is small, or the modulation order of the modulation coding strategy is low, the low-order decoding can be used Device. This increases the flexibility of the system and avoids the problem of high PAPR caused by non-random data under the conditions of large bandwidth and high-order modulation and coding.
  • FIG. 6 is a schematic structural diagram of a receiving end device provided by an embodiment of the present application.
  • the receiving end device can be used to implement any method and function related to the receiving end device in any embodiment of the present application. It may include a receiving module 401 and a processing module 402. Among them, the receiving end device serves as the receiving end of data transmission, and the detailed description of each module is as follows.
  • the receiving end equipment includes:
  • the receiving module 401 is configured to receive data after scrambling
  • the scrambler initialization bit used to descramble the data includes a first bit sequence and a second bit sequence, wherein the first bit sequence is carried in the service field of the data; the second The bit sequence multiplexes the bits in the signaling field; the number of the initialization bits is equal to the order of the scrambler.
  • the first bit sequence is carried in the first 7 bits of the service field; in another implementation manner, the first bit sequence may also be 5, 6 bits, 8, 9, 10 ,11,12,13,14,15,16 bits and so on;
  • the processing module 402 descrambles the scrambled data to obtain descrambled data.
  • the initial bits of the scrambler are based on the existing service field and multiplexed part of the signaling field used for data scrambling, and no service field is added.
  • PAPR is reduced, thereby increasing the throughput of the network.
  • the order of the scrambler corresponds to at least one of resource unit size and modulation and coding strategy.
  • the second bit sequence multiplexes bits corresponding to at least one indication information in the signaling field used to indicate channel bandwidth, modulation and coding strategy, association identifier, and basic service set.
  • the second bit sequence may be any one or a combination of the bits used to indicate the channel bandwidth, the bits used to indicate the MCS, the bits used to indicate the AID and the bits used to indicate the BSS, which
  • the order of transmission is not limited, and the order of the first bit sequence is also not limited. It is only necessary for the sending end device and the receiving end device to perform as agreed upon.
  • the 9 bits of the service field other than the first 7 bits are set as the check bits of the signaling field.
  • the receiving end device includes:
  • the receiving module 401 is configured to receive data after scrambling
  • the processing module 402 is configured to descramble the scrambled data to obtain descrambled data
  • the order of the scrambler used to descramble the data corresponds to at least one of the resource unit size and the modulation and coding strategy, and the scrambler is a high- and low-order fusion scrambler.
  • the scrambler used in this embodiment combines multiple scramblers of different orders, including the 7-order scrambler used in the current WiFi standard.
  • the modulation and coding strategy the At least one piece of information in the size of the allocated resource unit is used to determine the order of the scrambler.
  • a high-order scrambler is used. If the channel bandwidth is small, or the resource unit allocated to a user is small, or the modulation order of the modulation coding strategy is low, the low-order decoder can be used. This increases the flexibility of the system and avoids the problem of high PAPR caused by non-random data under the conditions of large bandwidth and high-order modulation and coding.
  • each module can also correspond to the corresponding description of the method embodiment of the present application, and execute the method and function performed by the receiving end device in the foregoing embodiment.
  • the embodiment of the present application also provides a processor, which is configured to be coupled with a memory and used to execute the method and function involved in any one of the embodiments of the present application.
  • the embodiments of the present application also provide a computer program product containing instructions, which when running on a computer, enable the computer to execute the methods and functions involved in any of the embodiments of the present application.
  • the embodiment of the present application also provides a device for executing any method and function involved in any one of the foregoing embodiments of the present application.
  • An embodiment of the present application also provides a wireless communication system, which includes at least one transmitting end device and at least one receiving end involved in any embodiment of the present application.
  • the data transmission device described in the above embodiment may be an access point or a station, but the scope of the data transmission device described in this application is not limited to this, and the structure of the data transmission device may not be as shown in Figure 4 ⁇ Figure 6 Restrictions.
  • the data transmission device can be a standalone device or can be part of a larger device.
  • the realization form of the data transmission device may be:
  • Independent integrated circuit IC or chip, or, chip system or subsystem
  • the IC collection may also include storage for storing data and instructions Components; (3) Modules that can be embedded in other devices; (4) Receivers, smart terminals, wireless devices, handhelds, mobile units, vehicle-mounted devices, cloud devices, artificial intelligence devices, etc.; (5) Others, etc. .
  • the implementation form of the data transmission device is a chip or a chip system
  • the chip shown in FIG. 7 includes a processor 501 and an interface 502.
  • the number of processors 501 may be one or more, and the number of interfaces 502 may be more than one.
  • the chip or chip system may include a memory 503.
  • the data transmission method described in this application can be adapted to uplink transmission and can also be adapted to downlink transmission.
  • the data transmission method is also suitable for point-to-point single-user transmission, or downlink multi-user transmission, or uplink multi-user transmission.
  • the data transmission method uses an uplink transmission method based on a trigger frame. The following respectively introduces the data grouping based on the trigger frame and the data grouping that is not based on the trigger.
  • the data packet based on the trigger frame can be a very high throughput physical layer protocol data unit based on the trigger frame (Extremely High Throughput trigger based physical layer protocol data unit, EHT TB PPDU), or a trigger frame-based data unit based on a future generation of WiFi standards. Physical layer protocol data unit, etc.
  • FIG. 8 An example of the structure of sending EHT TB PPDU based on the trigger frame is shown in Fig. 8. From EHT-STF to Data, the entire bandwidth is divided into one or more resource units. The functions of each field in the EHT TB PPDU shown in FIG. 8 are shown in Table 2.
  • the data part includes the service field, which is 16 bits.
  • the scrambler initialization bit for scrambling the data includes a first bit sequence and a second bit sequence, wherein the first bit sequence is carried in the service field of the data to be transmitted In the service field of the data part as shown in Figure 8; the second bit sequence multiplexes the bits in the signaling field; in specific implementation, the second bit sequence multiplexes the U- as shown in Figure 8
  • U-SIG is only an example, and it may also be called EHT-SIGA. As the standard develops, there may be other names.
  • the second bit sequence may be any one or a combination of the bits used to indicate the channel bandwidth, the bits used to indicate the MCS, the bits used to indicate the AID and the bits used to indicate the BSS, which
  • the sequence of transmission is not limited, and the sequence with the first bit sequence is not limited. It is only necessary that the total number of bits of the first bit sequence and the second bit sequence is the same as the order of the scrambler.
  • Fig. 9 is a schematic structural diagram of a very high throughput physical layer protocol data unit provided by an embodiment of the present application.
  • the data packet includes the traditional short training sequence (legacy short training field, L-STF), the traditional long training sequence (legacy long training field, L-LTF), and the traditional signaling field (legacy signal field, L-STF).
  • -SIG single legacy signal field
  • RL-SIG repeated legacy signal field
  • U-SIG universal signal field
  • EHT-SIG extremely high throughput-signal field
  • the information carried by U-SIG and EHT-SIG can help parse EHT PPDU, which contains bits used to indicate channel bandwidth, coding and modulation strategy and other information; in addition, EHT-SIG is divided into two parts, the first part of the common field ( common field) contains 1 to N resource unit allocation subfields; the second part of the user specific field (User Specific field), according to the order of resource unit allocation, there are 1 to M user fields (User Field ). Among them, the user field contains bits used to indicate information such as an association identifier (AID), coding, and modulation measurement.
  • AID association identifier
  • the data part includes the service field, which is usually 16 bits.
  • Fig. 9 is only a schematic diagram of an EHT PPDU, which is not limited in this application.
  • the scrambler initialization bit provided by this application for scrambling the data includes a first bit sequence and a second bit sequence, wherein the first bit sequence is carried in the service field of the data to be transmitted In the service field of the data part as shown in Figure 9; the second bit sequence multiplexes the bits in the signaling field; in a specific implementation, the second bit sequence multiplexes the U- as shown in Figure 9
  • U-SIG and EHT-SIG are only examples. As the standard develops, other names may be used.
  • the bit used to indicate the channel bandwidth, the bit used to indicate the MCS, the bit used to indicate the AID, and the bit used to indicate the BSS may be located in U-SIG or EHT-SIG. The embodiment of this application does not Make a limit.
  • the second bit sequence may be any one or a combination of the bits used to indicate the channel bandwidth, the bits used to indicate the MCS, the bits used to indicate the AID and the bits used to indicate the BSS, which
  • the sequence of transmission is not limited, and the sequence with the first bit sequence is not limited. It is only necessary that the total number of bits of the first bit sequence and the second bit sequence is the same as the order of the scrambler.
  • the order of the scrambler must be at least 14 orders.
  • the channel bandwidth will be upgraded from 160Mhz to 320Mhz, and higher order modulations, such as 4096-QAM, may be introduced, so the order of the scrambler is at least 17 orders, so the embodiment of this application
  • the following scramblers are designed:
  • the sending end device combines the original information bit stream with the periodic sequence Perform an XOR operation, and encode the XOR result and send it to the receiving device.
  • the transmitting end device separates the original information bit stream from the periodic sequence. OR operation, and encode the result of the XOR to the receiving device.
  • This application provides a 20-order scrambler, as shown in FIG. 14, which is expressed as a polynomial as follows:
  • the transmitter device separates the original information bit stream from the periodic sequence. OR operation, and encode the result of the XOR to the receiving device.
  • the method provided in this embodiment of the application is to carry part of the initial state of the scrambler in a 16-bit service field (service field) field, for example, 7 Bits (B0 ⁇ B6), used to synchronize with the descrambler.
  • service field for example, 7 Bits (B0 ⁇ B6)
  • the 7 scrambler initialization bits can be set to "0" to facilitate the estimation of the initial state of the scrambler of the receiving end device.
  • the remaining 9 bits of the service field can be reserved or set to "0"; or used to store the check bit of SIG-B, and the transmission sequence can be from low bit 0 to high bit 15.
  • the first bit sequence may also be 5, 6 bits, 8, 9, 10, 11, 12, 13, 14, 15, 16 bits, etc.;
  • the initialization bits of the other part of the scrambler are multiplexed with the bits in the U-SIG signaling field in the uplink EHT TB PPDU described above during uplink transmission; or they are multiplexed in the EHT PPDU described above during downlink transmission.
  • the bits in the signaling field U-SIG and /EHT-SIG); the specific multiplexing method has been described in detail above, and will not be repeated here.
  • the sum of the number of initialization bits in the multiplexing signaling field and the number of initialization bits in the foregoing service field is equal to the order of the scrambler.
  • the sender device and the receiver device use the same generator polynomial scrambler among the 17th, 18th, or 20th-order scramblers mentioned above by default.
  • 17th order scrambler Take the 17th order scrambler as an example, its working principles are as follows:
  • the scrambling process of the sender device each time a data packet is transmitted, the scrambler randomly selects an initial state that is not 0.
  • the initial state is composed of the first 7 bits in the aforementioned service field and 10 bits in the signaling field. , Corresponding to the initial bit value of the 17 registers.
  • the scrambler cyclically generates 131071 bits, and then XORs the continuously repeated 131071 bit sequence with the input data bits, and outputs the scrambled data bits. Finally, the scrambled data bits are sent out.
  • the descrambling process of the receiving end device When the receiving end device receives the scrambled data bits, it analyzes the first bit sequence of the initial state of the scrambler according to the first 7 bits after the scramble code, and then combines the second bit sequence of the signaling field , Get the initial state of the scrambler. After obtaining the initial state of the scrambler, the receiving end can repeatedly generate 131071 bits, and perform XOR with the scrambled data bits, so as to obtain the original data bits before scrambling.
  • the premise that the receiving end device can descrambling correctly is that the receiving end knows that it can infer the initial state of the scrambler.
  • the new scrambler and the scrambler before the reversal will produce the same scrambling code sequence, but the direction of the sequence is just opposite, and the two have the same Performance, so it is not listed here.
  • the generator polynomial is Scrambler
  • the generator polynomial corresponding to the new scrambler after the order of its polynomial coefficients is reversed is If the scrambling code sequence generated by the G(X) a scrambler is ABCD...XYZ, then the scrambling code sequence generated by the scrambler G(X) b is ZYX...DCBA.
  • the scrambler integrates multiple scramblers of different orders, including the 7-order scrambler used in the current WiFi standard.
  • the sending end device is assigned to a user according to the channel bandwidth of the transmitted data, the modulation and coding strategy, and the At least one kind of information in the size of the resource unit determines the order of the scrambler.
  • the channel bandwidth is large, or the resource unit allocated to a user is large, or the modulation order of the modulation and coding strategy is high, then Using a high-order scrambler, if the channel bandwidth is small, or the resource unit allocated to a user is small, or the modulation order of the modulation coding strategy is low, the low-order decoder can be used.
  • bandwidth corresponding to the RU allocated by the user when the bandwidth corresponding to the RU allocated by the user is less than 80Mhz, a traditional 7th-order scrambler can be used; when the bandwidth corresponding to the RU allocated by the user is greater than or equal to 80Mhz but not more than 160M, an 11th-order intermediate scrambler can be used; When the system bandwidth corresponding to the user's unconfigured RU is greater than 160Mhz, a 15th-order high-order scrambler can be used.
  • Fig. 15 is only a schematic diagram of a high- and low-order scrambler, and may also be a combination of other high- and low-order scramblers.
  • the fusion scrambler may also have other implementation forms, and this application does not list them one by one.
  • the high- and low-order fusion scrambler provided in this application allows the transmitting end device to select scramblers of different orders according to at least one of the channel bandwidth, modulation and coding strategy, and the size of the resource unit allocated to a certain user.
  • the flexibility of the system is increased, and the problem of high PAPR caused by non-random data under the conditions of large bandwidth and high-order modulation and coding is avoided.
  • the implementation of the low-order scrambler of this application does not add additional shift registers, so its compatibility with low-order scramblers will not bring too much hardware overhead.
  • the data transmission method includes:
  • Step 100 The sending end device scrambles the data to be transmitted to obtain the scrambled data
  • the scrambler initialization bit used to scramble the data includes a first bit sequence and a second bit sequence, wherein the first bit sequence is carried in the service field of the data to be transmitted;
  • the second bit sequence multiplexes the bits in the signaling field; the number of initialization bits is equal to the order of the scrambler.
  • Step 101 The sending end device sends the scrambled data to the receiving end device;
  • Step 102 The receiving end device receives the scrambled data
  • Step 103 The receiving end device descrambles the scrambled data to obtain descrambled data
  • the scrambler initialization bit used to descramble the data includes a first bit sequence and a second bit sequence, wherein the first bit sequence is carried in the service field of the data; the second The bit sequence multiplexes the bits in the signaling field; the number of the initialization bits is equal to the order of the scrambler.
  • the first bit sequence is carried in the first 7 bits of the service field; in another implementation manner, the first bit sequence may also be 5, 6 bits, 8, 9, 10 ,11,12,13,14,15,16 bits and so on.
  • the scrambler described in this application may be a high-order scrambler, for example, it may be a scrambler as shown in FIGS. 10-14.
  • the above-mentioned scrambler may be a high- and low-order fusion scrambler as shown in FIG. 15. That is, the sending end device determines the order of the scrambler according to at least one of the channel bandwidth of the transmission data, the modulation and coding strategy, and the size of the resource unit allocated to a certain user. When the resource unit allocated by a certain user is very large, or the modulation order of the modulation coding strategy is high, a high-order scrambler is used. If the channel bandwidth is small, or the resource unit allocated to a certain user is small, Or when the modulation order of the modulation coding strategy is low, a low-order decoder can be used.
  • the number of initialization bits input to the scrambler is the same as the order of the scrambler, and specifically includes two parts: the first bit sequence and The second bit sequence.
  • the first bit sequence is as shown in B0 to B6 in the service field in Table 2 above, and the first bit sequence is set to 0 before the data is scrambled.
  • the 9 bits of the service field other than the first 7 bits are set as check bits of the signaling field. Specifically, for uplink transmission, the 9 bits can be set as U-SIG check bits, and for downlink transmission, the 9 bits can be set as SIG-B check bits.
  • the second bit sequence multiplexes bits corresponding to at least one indication information in the signaling field used to indicate channel bandwidth, modulation and coding strategy, association identifier, and basic service set.
  • a part of the initialization bit of the scrambler still occupies the first 7 bits of the service field, which is compatible with the existing 802.11ax standard to the greatest extent; while the other part of the initialization bit is multiplexed for the signaling field that needs to be transmitted during data transmission. Part of the bit, no additional overhead is added.
  • the remaining 9 bits of the service field can also be set as check bits to check the signaling field, which further enhances the transmission performance.
  • the data transmission method includes:
  • Step 100 The sending end device scrambles the data to be transmitted to obtain the scrambled data
  • the order of the scrambler used to scramble the data corresponds to at least one of the size of the resource unit and the modulation and coding strategy.
  • Step 101 The sending end device sends the scrambled data to the receiving end device;
  • Step 102 The receiving end device receives the scrambled data
  • Step 103 The receiving end device descrambles the scrambled data to obtain descrambled data.
  • the scrambler described in this embodiment may be a high-order scrambler, for example, it may be any scrambler as shown in FIGS. 10-14.
  • the above-mentioned scrambler is a high- and low-order fusion scrambler as shown in FIG.
  • the high-order For the scrambler if the channel bandwidth is small, or the resource unit allocated to a user is small, or the modulation order of the modulation and coding strategy is low, a low-order decoder can be used.
  • step 100 performed by the sending end device can be performed by the processor 201 shown in FIG. 4, and the processor 201 can implement the function of a scrambler.
  • the processing module 301 shown is executed; it can also be executed by the processor 501 shown in FIG. 7; the step 101 executed by the sending end device can be executed by the transceiver 205 shown in FIG.
  • the sending module 302 shown is executed; it can also be executed through the interface shown in FIG. 7.
  • the scrambling sequence and data and other information can be stored in the memory 202 shown in FIG. 4, or executed by the memory of the sending end device (not shown) shown in FIG. 5, or the memory 503 shown in FIG. 7 implement.
  • Step 102 performed by the receiving end device described above may be performed by the transceiver 205 shown in FIG. 4, and may also be performed by the receiving module 401 shown in FIG. 6; it may also be performed by the interface shown in FIG.
  • Step 103 performed by the receiving end device can be performed by the processor 201 shown in FIG. 4, which can implement the function of a scrambler, and can also be performed by the processing module 402 shown in FIG. 6; It is executed by the processor 501 shown in FIG. 7; the scrambling sequence and data and other information can be stored in the memory 202 shown in FIG. 4, or the memory of the sending end device shown in FIG. 6 (not shown in the figure ) Is executed, or executed by the memory 503 as shown in FIG. 7.
  • the computer program product includes one or more computer instructions.
  • the computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.
  • the computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium.
  • the computer instructions may be transmitted from a website, computer, server, or data center.
  • the computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or a data center integrated with one or more available media.
  • the usable medium may be a magnetic medium (for example, a floppy disk, a hard disk, and a magnetic tape), an optical medium (for example, a high-density digital video disc (digital video disc, DVD)), or a semiconductor medium (for example, a solid state disk, SSD)) etc.
  • the corresponding relationships shown in the tables in this application can be configured or pre-defined.
  • the value of the information in each table is only an example, and can be configured to other values, which is not limited in this application.
  • the corresponding relationship shown in some rows may not be configured.
  • appropriate deformation adjustments can be made based on the above table, such as splitting, merging, and so on.
  • the names of the parameters shown in the titles in the above tables may also be other names that can be understood by the communication device, and the values or expressions of the parameters may also be other values or expressions that can be understood by the communication device.
  • other data structures can also be used, such as arrays, queues, containers, stacks, linear tables, pointers, linked lists, trees, graphs, structures, classes, heaps, hash tables, or hash tables. Wait.
  • the pre-definition in this application can be understood as definition, pre-definition, storage, pre-storage, pre-negotiation, pre-configuration, curing, or pre-fired.

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Abstract

本申请公开了一种数据传输的方法, 发送端设备和接收端设备。该方法包括: 对待传输数据进行扰码, 得到扰码后的数据; 向接收端设备发送扰码后的数据; 其中, 用于对所述数据进行加扰的扰码器初始化比特包括第一比特序列和第二比特序列, 其中, 所述第一比特序列承载于待传输数据的服务字段中; 所述第二比特序列复用信令字段中的比特; 所述初始化比特的比特个数等于所述扰码器的阶数。本申请实施例中, 发送端和接收端采用比现有技术更高阶的扰码器时, 该扰码器初始化比特基于现有用于数据扰码的服务字段和复用部分信令字段, 未增加服务字段的开销的基础上, 降低了PAPR, 进而提高网络的吞吐量。本申请可应用于802.11be或极高吞吐量EHT以及未来的WiFi系统中。

Description

数据传输方法及设备、芯片系统、计算机可读存储介质 技术领域
本申请涉及通信技术领域,尤其涉及一种数据传输方法及设备、芯片系统、计算机可读存储介质。
背景技术
在通信系统中,发送端设备以比特流的形式向接收端设备传输的信息,比特流由“0”和“1”组成。为了便于从线路信号中提取时钟信号,需要避免出现长连的“0”和长连的“1”的出现,发射端往往会把要发送的信息比特流与另一个伪随机序列进行异或操作,把异或后的结果进行编码发送。接收端在解码接收到的比特流后,把解码出的比特流与同一个伪随机序列进行异或,从而恢复出原始的信息比特流。同时原始的信息比特流与伪随机序列异或后,也可以起到对原始的信息流加密的作用。发射端对原始信息流和伪随机序列异或的操作叫做加扰,所用的伪随机序列叫做扰码序列,生成该扰码序列的设备叫做扰码器,接收端从加扰后的序列恢复出原始信息流的过程叫做解扰。
由于正交频分复用(orthogonal frequency division multiplexing,OFDM)符号是由多个独立经过调制的子载波信号叠加而成的,当各个子载波相位相同或者相近时,叠加信号便会受到相同初始相位信号的调制,从而产生较大的瞬时功率峰值,由此带来较高的峰均功率比(peak to average power ratio,PAPR)。由于一般的功率放大器的动态范围都是有限的,所以峰均比较大的信号极易进入功率放大器的非线性区域,导致信号产生非线性失真,造成明显的频谱扩展干扰以及带内信号畸变,导致整个系统性能严重下降。高PAPR已成为OFDM的一个主要技术阻碍。所以在OFDM通信系统中,使用扰码技术起到降低系统PAPR的作用。
扰码的产生是一般是通过循环移位寄存器来实现的,典型的结构如图1所示
其中g i(i=0,1,…,m)为加权系数,其值为1或0,而通常g 0和g m固定为1,m为循环移位寄存器的阶数,阶数越高,能产生的不重复的序列越长。循环移位寄存器的序列生成方法如下:
1、初始化m个寄存器的值x(1),x(2),…,x(m).
2、按照如下公式计算输出比特:
Figure PCTCN2021080305-appb-000001
其中mod(*,2)为对2取模。
3、按照如下方式更新m个移位寄存器的值:
x(m)=x(m-1),x(m-1)=x(m-2),…,x(2)=x(1),x(1)=out
循环重复上述过程,将生成的输出比特汇集一起就构成了扰码序列。当上述更新过程重复到一定次数后,输出序列将会重复之前的输出结果,而扰码器所能产生的最长不重复序列的长度不大于2 m-1。
一个扰码器也可以用一个生成多项式来表示,对于图1中的扰码器可以用如下的生成多项式描述:
Figure PCTCN2021080305-appb-000002
无线保真(Wireless Fidelity,WiFi)标准自从802.11a标准开始一直采用如图2所示的扰 码器结构,该扰码器包括7个寄存器分别对应X1、X2……X7,即该扰码器的阶数m=7,故其可以生成最长不重复序列的长度是127,WiFi设备在发射端将原始的信息比特流与该周期序列进行异或操作,并将异或的结果进行编码发送。
虽然该周期为127扰码序列可以由图2决定,但扰码序列的起始位置(也叫做扰码器的相位)还需要由扰码器中移位寄存器的初始状态决定,同时接收端也需要知道扰码器的初始状态才能产生与发射端相同的扰码序列,从而恢复出原始信息比特流。
为了能够使接收端知道扰码器的初始状态,WiFi标准里定义了一个16比特的服务字段(service field)字段,如表1所示:
表1:Service Field字段
Bits Field 描述Description
B0-B6 扰码器初始化 加扰之前设置为0
B7-B15 预留 预留
服务字段的前7位比特为扰码器初始化比特,用来与解扰码器进行同步。扰码器初始化比特可以设为“0”,以便于估计接收端设备扰码器的初始状态。服务字段中的剩余9位比特为服务保留位,也可以设为“0”。传输顺序可以为从低比特位0开始至高比特位15。
现有的标准中,可以使用一个生成多项式为G(X)=X 7+X 4+1的127位帧同步加扰码器。如果扰码器初始化状态全为1,扰码器反复生成的127比特序列可以为:00001110 11110010 11001001 00000010 00100110 00101110 10110110 00001100 11010100 11100111 10110100 00101010 11111010 01010001 10111000 1111111。在发送时,每一个分组的扰码器的初始状态实际上被随机设为非0状态。
发送端设备和接收端设备默认使用同一个生成多项式的扰码器,其工作原理分别为:
发送端设备加扰过程:每次数据包传输时,扰码器随机选择一个非0的初始状态,即对应7个寄存器的初始比特值。扰码器循环生成127比特,然后将不断重复的127比特序列与输入数据比特进行异或,输出扰码后的数据比特。最终将扰码后的数据比特发送出去。
接收端设备解扰过程:接收端设备接收到扰码后的数据比特时,根据扰码后的前7位比特数据和扰码器输入的数据比特的前7位得到扰码器循环生成的127比特序列的前7位。进而根据该127比特序列的前7位和扰码器的生成多项式,反推扰码器初始化状态。接收端在获取扰码器初始状态后,可以反复生成127位比特,将其与扰码后的数据比特进行异或,从而可以得到加扰前的原始数据比特。
接收端能够正确解扰的前提是接收端已知扰码器输入的前7位比特数据序列。现有的方法是将发送端的前7位数据序列设为已知序列,并取值都为0,放在数据字段的服务字段中。也就是说,扰码器输入的前7位比特数据被称为扰码器初始化比特。
扰码器的使用使得发送的比特流更加随机化,避免连续长的0或1出现,同时又对原始信息进行了加密,避免了明文传输。此外,由于扰码后的比特流的随机性,避免了OFDM系统中一个OFDM符号的子载波都传输相同信息或周期性信号的出现,从而降低了OFDM系统的PAPR。
在下一代的WiFi标准中,信道带宽会从160Mhz升级到320Mhz,且可能会引入更高阶 数的调制,如4096-正交幅度调制(quadrature amplitude modulation,QAM),现有的长度127的扰码序列可能无法避免在一个OFDM符号内周期信号的重复出现,从而使得发射信号的PAPR很大。
更高阶数的扰码器可以产生更长的不重复序列,从而避免一个OFDM符号内周期信号的重复出现。但是更高阶数的扰码器需要更长的初始化比特信息,这无疑会增加系统开销。
因此,提供一种可以产出更长的不重复序列但不会增加系统开销的扰码器,是亟待解决的技术问题。
发明内容
本申请实施例提供了一种数据传输方法、发送端设备、接收端设备、芯片系统以及计算机可读存储介质,根据带宽和调制阶数设计了更高阶数的扰码器,可以用信令字段中的比特代替部分扰码器的初始化比特,能够减小长初始化比特带来的系统开销的基础上,产生更长的不重复扰码序列,从而避免一个OFDM符号内周期信号的重复出现,进而降低系统的PAPR。
本申请第一方面,提供一种数据传输方法,包括:
对待传输数据进行扰码,得到扰码后的数据;
向接收端设备发送所述扰码后的数据;
其中,用于对所述数据进行加扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列承载于所述待传输数据的服务字段中;所述第二比特序列复用信令字段中的比特;所述初始化比特的比特个数等于所述扰码器的阶数。
本申请第二方面,提供一种发送端设备,包括:
处理器,用于对待传输数据进行扰码,得到扰码后的数据;
收发器,用于向接收端设备发送所述扰码后的数据;
其中,用于对所述数据进行加扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列,承载于所述待传输数据的服务字段中;所述第二比特序列复用信令字段中的比特;所述初始化比特的比特个数等于所述扰码器的阶数。
本申请第一方面提供的数据传输方法,或第二方面提供的发送端设备中,发送端设备和接收端设备采用比现有技术更高阶的扰码器时,该扰码器初始化比特基于现有用于数据扰码的服务字段和复用部分信令字段,未增加服务字段的开销的基础上,降低了PAPR,进而提高网络的吞吐量。
本申请第一方面提供的数据传输方法,或第二方面提供的发送端设备,第一种实现方式中,所述扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应。
本申请第一方面提供的数据传输方法,或第二方面提供的发送端设备,第二种实现方式中,所述第二比特序列复用所述信令字段中的用于指示信道带宽(channel width)、调制编码策略(modulation and coding scheme,MCS)、关联标识符(association identifier,AID)、基本服务集(BSS Identifier,BSS)中的至少一种指示信息对应的比特。
所述第一比特序列,可以是所述用于指示信道带宽的比特,用于指示MCS的比特,用于指示AID的比特和用于指示BSS的比特的任一种或多种的组合,其发送的先后顺序不做限定,其与第一比特序列的先后顺序也不做限定,只需要发送端设备和接收端设备按照约定执行即可。
本申请第一方面提供的数据传输方法,或第二方面提供的发送端设备,第三种实现方式 中,所述第一比特序列为7个比特,承载于所述服务字段的前7个比特;可选的,在对所述数据进行加扰之前,将所述第一比特序列置为0。
本申请第一方面提供的数据传输方法,或第二方面提供的发送端设备,第四种实现方式中,所述服务字段除前7个比特之外的9个比特,设置为所述信令字段B的校验比特。
本申请第三方面,提供一种数据传输方法,包括:
对待传输数据进行扰码,得到扰码后的数据;
向接收端设备发送所述扰码后的数据;
其中,用于对所述数据进行加扰的扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应。
本申请第四方面,提供一种发送端设备,包括:
处理器,用于对待传输数据进行扰码,得到扰码后的数据;
收发器,用于向接收端设备发送所述扰码后的数据;
其中,用于对所述数据进行加扰的扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应。
本申请第三方面提供的数据传输方法,或第四方面提供的发送端设备,第一种实现方式中,对所述数据进行加扰的扰码器为高低阶融合的扰码器。
本申请第三方面提供的方法和第四方面提供的发送端设备,对数据加扰的扰码器为支持不同阶数的扰码器,通过带宽和调制编码索引信息中的至少一种,选择对数据加扰采用某一阶的扰码器,兼容了传统WiFi系统的扰码器结构,使得设备厂商可以根据不同的场景需求设计不同复杂度的扰码器。
本申请第三方面提供的数据传输方法,或第四方面提供的发送端设备,第二种实现中,用于对所述数据进行加扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列承载于所述待传输数据的服务字段中;所述第二比特序列复用信令字段中的比特;所述初始化比特的比特个数等于所述扰码器的阶数。
本申请第三方面提供的数据传输方法,或第四方面提供的发送端设备,第三种实现方式中,所述第二比特序列复用所述信令字段中的用于指示信道带宽、调制编码策略、关联标识符、基本服务集中的至少一种指示信息对应的比特。
本申请第三方面提供的数据传输方法,或第四方面提供的发送端设备,第四种实现方式中,所述第一比特序列为7个比特,承载于所述服务字段的前7个比特;在对所述数据进行加扰之前,将所述第一比特序列置为0。
本申请第三方面提供的数据传输方法,或第四方面提供的发送端设备,第五种实现方式中,所述服务字段除前7个比特之外的9个比特,设置为所述信令字段B的校验比特。
本申请第五方面,提供一种数据传输方法,包括:
接收扰码之后的数据;
对所述扰码后的数据进行解扰,得到解扰的数据;
其中,用于对所述数据进行解扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列为7个比特,承载于所述数据的服务字段的前7个比特中;所述第二比特序列复用信令字段中的比特;所述初始化比特的比特个数等于所述扰码器的阶数。
本申请第六方面,提供一种接收端设备,其特征在于,包括:
收发器,用于接收扰码之后的数据;
处理器,用于对所述扰码后的数据进行解扰,得到解扰的数据;
其中,用于对所述数据进行解扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列承载于所述数据的服务字段中;所述第二比特序列复用信令字段中的比特;所述初始化比特的比特个数等于所述扰码器的阶数。
所述第一比特序列,可以是所述用于指示信道带宽的比特,用于指示MCS的比特,用于指示AID的比特和用于指示BSS的比特的任一种或多种的组合,其发送的先后顺序不做限定,其与第一比特序列的先后顺序也不做限定,只需要发送端设备和接收端设备按照约定执行即可。
本申请第五方面提供的数据传输方法,或第六方面提供的接收端设备,发送端设备和接收端设备采用比现有技术更高阶的扰码器时,该扰码器初始化比特基于现有用于数据扰码的服务字段和复用部分信令字段,未增加服务字段的开销的基础上,降低了PAPR,进而提高网络的吞吐量。
本申请第五方面提供的数据传输方法,或第六方面提供的接收端设备,第一种实现方式中,所述扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应。
本申请第五方面提供的数据传输方法,或第六方面提供的接收端设备,第二种实现方式中,所述第二比特序列复用所述信令字段中的用于指示信道带宽、调制编码策略、关联标识符、基本服务集中的至少一种指示信息对应的比特。
本申请第五方面提供的数据传输方法,或第六方面提供的接收端设备,第三种实现方式中,所述第一比特序列为7个比特,承载于所述服务字段的前7个比特;所述服务字段除前7个比特之外的9个比特,设置为所述信令字段B的校验比特。
本申请第七方面,提供一种数据传输方法,包括:
接收扰码之后的数据;
对所述扰码后的数据进行解扰,得到解扰的数据;
其中,用于对所述数据进行解扰的扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应。
本申请第八方面,提供一种接收端设备,包括:
收发器,用于接收扰码之后的数据;
处理器,用于对所述扰码后的数据进行解扰,得到解扰的数据;
其中,用于对所述数据进行解扰的扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应。
本申请第七方面提供的数据传输方法,或第八方面提供的接收端设备,第一种实现方式中,对所述数据进行解扰的扰码器为高低阶融合的扰码器。
本申请第七方面提供的数据传输方法,或第八方面提供的接收端设备,第二种实现方式中,用于对所述数据进行解扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列承载于所述数据的服务字段中;所述第二比特序列复用信令字段中的比特;所述初始化比特的比特个数等于所述扰码器的阶数。
本申请第七方面提供的数据传输方法,或第八方面提供的接收端设备,第三种实现方式中,所述第二比特序列复用所述信令字段中的用于指示信道带宽、调制编码策略、关联标识符、基本服务集中的至少一种指示信息对应的比特。
本申请第七方面提供的数据传输方法,或第八方面提供的接收端设备,第四种实现方式 中,所述第一比特序列为7个比特,承载于所述服务字段的前7个比特;所述服务字段除前7个比特之外的9个比特,设置为所述信令字段B的校验比特。
本申请第九方面,提供一种芯片系统,包括:至少一个处理器和接口,与所述处理器耦合的存储器;所述处理器执行所述存储器中存储的计算机程序时,使得如前述第一方面、第三方面、第四方面、第五方面、第七方面任一方面所述的方法被实现。
在具体实现过程中,处理器可用于进行,例如但不限于,基带相关处理,收发器可用于进行,例如但不限于,射频收发。上述器件可以分别设置在彼此独立的芯片上,也可以至少部分的或者全部的设置在同一块芯片上。例如,处理器可以进一步划分为模拟基带处理器和数字基带处理器。其中,模拟基带处理器可以与收发器集成在同一块芯片上,数字基带处理器可以设置在独立的芯片上。随着集成电路技术的不断发展,可以在同一块芯片上集成的器件越来越多,例如,数字基带处理器可以与多种应用处理器(例如但不限于图形处理器,多媒体处理器等)集成在同一块芯片之上。这样的芯片可以称为系统芯片(system on chip)。将各个器件独立设置在不同的芯片上,还是整合设置在一个或者多个芯片上,往往取决于产品设计的具体需要。
本申请第十方面,提供一种计算机可读存储介质,其特征在于,所述计算机可读存储介质用于存储计算机程序,当所述计算机程序被执行时,使得如前述第一方面、第三方面、第四方面、第五方面、第七方面任一方面所述的方法被实现。
本申请第十一方面,提供一种发送端设备,该发送端设备具有实现上述第一方面、第三方面所述的方法示例中发送端设备的部分或全部功能,比如发送端设备的功能可具备本申请中的部分或全部实施例中的功能,也可以具备单独实施本申请中的任一个实施例的功能。所述功能可以通过硬件实现,也可以通过硬件执行相应的软件实现。所述硬件或软件包括一个或多个与上述功能相对应的单元或模块。
在一种可能的设计中,该发送端设备的结构中可包括处理单元和通信单元,所述处理单元被配置为支持发送端设备执行上述方法中相应的功能。所述通信单元用于支持发送端设备与其他设备之间的通信。所述发送端设备还可以包括存储单元,所述存储单元用于与处理单元和发送单元耦合,其保存发送端设备必要的程序指令和数据。
本申请第十二方面,提供一种接收端设备,该接收端设备具有实现上述第五方面、第七方面所述的方法示例中接收端设备的部分或全部功能,比如接收端设备的功能可具备本申请中的部分或全部实施例中的功能,也可以具备单独实施本申请中的任一个实施例的功能。所述功能可以通过硬件实现,也可以通过硬件执行相应的软件实现。所述硬件或软件包括一个或多个与上述功能相对应的单元或模块。
在一种可能的设计中,该接收端设备的结构中可包括处理单元和通信单元,所述处理单元被配置为支持接收端设备执行上述方法中相应的功能。所述通信单元用于支持接收端设备与其他设备之间的通信。所述接收端设备还可以包括存储单元,所述存储单元用于与处理单元和发送单元耦合,其保存接收端设备必要的程序指令和数据。
本申请第十三方面,提供一种处理器,用于执行上述第一方面、第三方面、第五方面、第七方面中任一方面的方法。在执行这些方法的过程中,上述方法中有关发送上述信息和接收上述信息的过程,可以理解为由处理器输出上述信息的过程,以及处理器接收输入的上述信息过程。具体来说,在输出上述信息时,处理器将该上述信息输出给收发器,以便由收发器进行发射。更进一步的,该上述信息在由处理器输出之后,还可能需要进行其他的处理, 然后才到达收发器。类似的,处理器接收输入的上述信息时,收发器接收该上述信息,并将其输入处理器。更进一步的,在收发器收到该上述信息之后,该上述信息可能需要进行其他的处理,然后才输入处理器。
对于处理器所涉及的发射、发送和接收等操作,如果没有特殊说明,或者,如果未与其在相关描述中的实际作用或者内在逻辑相抵触,则均可以更加一般性的理解为处理器输出和接收、输入等操作,而不是直接由射频电路和天线所进行的发射、发送和接收操作。
在具体实现过程中,上述处理器可以是专门用于执行这些方法的处理器,也可以是执行存储器中的计算机指令来执行这些方法的处理器,例如通用处理器。上述存储器可以为非瞬时性(non-transitory)存储器,例如只读存储器(read only memory,ROM),其可以与处理器集成在同一块芯片上,也可以分别设置在不同的芯片上,本发明实施例对存储器的类型以及存储器与处理器的设置方式不做限定。
本申请第十四方面,提供了一种包括指令的计算机程序产品,当其在计算机上运行时,使得计算机执行上述第一方面、第三方面、第五方面、第七方面任一方面所述的方法。
本申请第十五方面,提供了一种功能实体,该功能实体用于实现上述第一方面、第三方面、第五方面、第七方面任一方面所述的方法。
本申请第十六方面,提供了一种高低阶融合扰码器,该高低阶融合扰码器包括7阶扰码器,11阶扰码器,15阶扰码器等不同阶的扰码器。
本申请第十七方面,提供了三种17阶扰码器,一种18阶扰码器,一种20阶扰码器。
附图说明
图1是一种循环移位寄存器的结构示意图;
图2是7阶的扰码器的结构示意图;
图3是本申请实施例提供的一种网络结构的示意图;
图4是本申请实施例提供的数据传输设备的结构示意图;
图5是本申请实施例提供的发送端设备的结构示意图;
图6是本申请实施例提供的接收端设备的结构示意图;
图7是本申请实施例提供的芯片系统的结构示意图;
图8是本申请实施例提供的一种基于触发帧发送数据分组的流程示意图;
图9是本申请实施例提供的一种非基于触发的数据分组的结构示意图;
图10是本申请实施例提供的一种17阶扰码器的结构示意图;
图11是本申请实施例提供的又一17阶扰码器的结构示意图;
图12是本申请实施例提供的又一17阶扰码器的结构示意图;
图13是本申请实施例提供的一种18阶扰码器的结构示意图;
图14是本申请实施例提供的一种20阶扰码器的结构示意图;
图15是本申请实施例提供的一种高低阶融合扰码器的结构示意图;
图16是本申请实施例提供的数据传输方法流程示意图。
具体实施方式
下面结合附图对本申请具体实施例作进一步的详细描述。
以图3为例阐述本申请所述的数据传输方法可适用的网络结构。图3是本申请实施例提 供的一种网络结构的示意图,该网络结构可包括一个或多个接入点(access point,AP)类的站点和一个或多个非接入点类的站点(none access point station,non-AP STA)。为便于描述,本文将接入点类型的站点称为接入点(AP),非接入点类的站点称为站点(STA)。图1以该网络结构包括一个AP和六个站点(STA 1、STA 2、STA 3、STA 4、STA 5、STA 6)为例进行说明。
其中,接入点可以为终端设备(如手机)进入有线(或无线)网络的接入点,主要部署于家庭、大楼内部以及园区内部,典型覆盖半径为几十米至上百米,当然,也可以部署于户外。接入点相当于一个连接有线网和无线网的桥梁,主要作用是将各个无线网络客户端连接到一起,然后将无线网络接入以太网。具体的,接入点可以是带有无线保真(wreless-fidelity,WiFi)芯片的终端设备(如手机)或者网络设备(如路由器)。接入点可以为支持802.11be制式的设备。接入点也可以为支持802.11ax、802.11ac、802.11n、802.11g、802.11b及802.11a等802.11家族的多种无线局域网(wireless local area networks,WLAN)制式的设备。本申请中的接入点可以是高效(high efficient,HE)AP或极高吞吐量(extramely high throughput,EHT)AP,还可以是适用未来某代WiFi标准的接入点。
站点可以为无线通讯芯片、无线传感器或无线通信终端等,也可称为用户。例如,站点可以为支持WiFi通讯功能的移动电话、支持WiFi通讯功能的平板电脑、支持WiFi通讯功能的机顶盒、支持WiFi通讯功能的智能电视、支持WiFi通讯功能的智能可穿戴设备、支持WiFi通讯功能的车载通信设备和支持WiFi通讯功能的计算机等等。可选地,站点可以支持802.11be制式。站点也可以支持802.11be、802.11ax、802.11ac、802.11n、802.11g、802.11b及802.11a等802.11家族的多种无线局域网(wireless local area networks,WLAN)制式。
本申请中的接入点可以是高效(high efficient,HE)STA或极高吞吐量(extramely high throughput,EHT)STA,还可以是适用未来某代WiFi标准的STA。
例如,接入点和站点可以是应用于车联网中的设备,物联网(IoT,internet of things)中的物联网节点、传感器等,智慧家居中的智能摄像头,智能遥控器,智能水表电表,以及智慧城市中的传感器等。
虽然本申请实施例主要以部署IEEE 802.11的网络为例进行说明,本领域技术人员容易理解,本申请涉及的各个方面可以扩展到采用各种标准或协议的其它网络,例如,BLUETOOTH(蓝牙),高性能无线LAN(high performance radio LAN,HIPERLAN)(一种与IEEE 802.1 1标准类似的无线标准,主要在欧洲使用)以及广域网(WAN)、无线局域网(wireless local area network,WLAN)、个人区域网(personal area network,PAN)或其它现在已知或以后发展起来的网络。因此,无论使用的覆盖范围和无线接入协议如何,本申请提供的各种方面可以适用于任何合适的无线网络。
图4为本申请实施例提供的一种数据传输设备的结构示意图。如图4所示,该数据传输设备200可包括:处理器201、收发器205,可选的还包括存储器202。
所述收发器205可以称为收发单元、收发机、或收发电路等,用于实现收发功能。收发器205可以包括接收器和发送器,接收器可以称为接收机或接收电路等,用于实现接收功能;发送器可以称为发送机或发送电路等,用于实现发送功能。
存储器202中可存储计算机程序或软件代码或指令204,该计算机程序或软件代码或指令204还可称为固件。处理器201可通过运行其中的计算机程序或软件代码或指令203,或通过调用存储器202中存储的计算机程序或软件代码或指令204,对MAC层和PHY层进行 控制,以实现本申请下述各实施例。其中,处理器201可以为中央处理器(central processing unit,CPU),存储器202例如可以为只读存储器(read-only memory,ROM),或为随机存取存储器(random access memory,RAM)。
本申请中描述的处理器201和收发器205可实现在集成电路(integrated circuit,IC)、模拟IC、射频集成电路RFIC、混合信号IC、专用集成电路(application specific integrated circuit,ASIC)、印刷电路板(printed circuit board,PCB)、电子设备等上。
上述数据传输设备200还可以包括天线206,该数据传输设备200所包括的各模块仅为示例说明,本申请不对此进行限制。
请参见图5,图5是本申请实施例提供的一种发送端设备的结构示意图,该发送端设备可以用于实现本申请实施例中涉及发送端设备的任意方法和功能,发送端设备可以包括处理模块301、发送模块302。可选的,发送模块302对应发送端设备包括的一个基带电路和一个射频电路。该发送端设备作为数据传输的发送端,其中,各个模块的详细描述如下。
在一个实施例中,发送端设备包括:
处理模块301,用于对待传输数据进行扰码,得到扰码后的数据;
发送模块302,用于向接收端设备发送所述扰码后的数据;
其中,用于对所述数据进行加扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列承载于所述待传输数据的服务字段中;所述第二比特序列复用信令字段中的比特;所述初始化比特的比特个数等于所述扰码器的阶数。本申请提供的发送端设备中,采用比现有技术更高阶的扰码器时,该扰码器初始化比特基于现有用于数据扰码的服务字段和复用部分信令字段,未增加服务字段的开销的基础上,降低了PAPR,进而提高网络的吞吐量。
一种实现中,所述第一比特序列,承载于所述服务字段的前7个比特;另一种实现方式中,所述第一比特序列也可以为5,6比特,8,9,10,11,12,13,14,15,16比特等等;
其中,所述扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应。
所述第二比特序列复用所述信令字段中的用于指示信道带宽、调制编码策略、关联标识符、基本服务集中的至少一种指示信息对应的比特。
所述第二比特序列,可以是所述用于指示信道带宽的比特,用于指示MCS的比特,用于指示AID的比特和用于指示BSS的比特的任一种或多种的组合,其发送的先后顺序不做限定,其与第一比特序列的先后顺序也不做限定,只需要发送端设备和接收端设备按照约定执行即可。
在对所述数据进行加扰之前,将所述第一比特序列置为0,所述服务字段除前7个比特之外的9个比特,设置为信令字段的校验比特。
在另一个实施例中,发送端设备包括:
处理模块301,用于对待传输数据进行扰码,得到扰码后的数据;其中,用于对所述数据进行加扰的扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应,且所述扰码器为高低阶融合的扰码器。
发送模块302,用于向接收端设备发送所述扰码后的数据。
本实施例中采用的扰码器融合了多个不同阶数的扰码器,包括现在WiFi标准中所采用的7阶扰码器,发送端设备根据传输数据的信道带宽、调制编码策略、给某个用户分配的资源单元的大小中的至少一种信息来确定扰码器的阶数,当信道带宽很大,或者给某个用户分配的 资源单元很大,或调制编码策略的调制阶数很高时,则采用高阶数的扰码器,若信道带宽很小,或者给某个用户分配的资源单元很小,或调制编码策略的调制阶数低时,就可以沿用低阶的解码器。这增加了系统的灵活性,避免了在大带宽和高阶的调制编码条件下非随机数据引起的高PAPR问题。
请参见图6,图6是本申请实施例提供的一种接收端设备的结构示意图,该接收端设备可以用于实现本申请任意实施例中涉及接收端设备的任意方法和功能,接收端设备可以包括接收模块401以及处理模块402。其中,接收端设备作为数据传输的接收端,各个模块的详细描述如下。
一种实现方式中,
接收端设备包括:
接收模块401,用于接收扰码之后的数据;
其中,用于对所述数据进行解扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列承载于所述数据的服务字段中;所述第二比特序列复用信令字段中的比特;所述初始化比特的比特个数等于所述扰码器的阶数。
一种实现中,所述第一比特序列,承载于所述服务字段的前7个比特;另一种实现方式中,所述第一比特序列也可以为5,6比特,8,9,10,11,12,13,14,15,16比特等等;
处理模块402,对所述扰码后的数据进行解扰,得到解扰的数据。
本申请提供的接收端设备,采用比现有技术更高阶的扰码器时,该扰码器初始化比特基于现有用于数据扰码的服务字段和复用部分信令字段,未增加服务字段的开销的基础上,降低了PAPR,进而提高网络的吞吐量。
其中,所述扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应。
所述第二比特序列复用所述信令字段中的用于指示信道带宽、调制编码策略、关联标识符、基本服务集中的至少一种指示信息对应的比特。
所述第二比特序列,可以是所述用于指示信道带宽的比特,用于指示MCS的比特,用于指示AID的比特和用于指示BSS的比特的任一种或多种的组合,其发送的先后顺序不做限定,其与第一比特序列的先后顺序也不做限定,只需要发送端设备和接收端设备按照约定执行即可。
所述服务字段除前7个比特之外的9个比特,设置为信令字段的校验比特。
另一种实现中,接收端设备包括:
接收模块401,用于接收扰码之后的数据;
处理模块402,用于对所述扰码后的数据进行解扰,得到解扰的数据;
其中,用于对所述数据进行解扰的扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应且所述扰码器为高低阶融合的扰码器。
本实施例中采用的扰码器融合了多个不同阶数的扰码器,包括现在WiFi标准中所采用的7阶扰码器,根据传输数据的信道带宽、调制编码策略、给某个用户分配的资源单元的大小中的至少一种信息来确定扰码器的阶数,当信道带宽很大,或者给某个用户分配的资源单元很大,或调制编码策略的调制阶数很高时,则采用高阶数的扰码器,若信道带宽很小,或者给某个用户分配的资源单元很小,或调制编码策略的调制阶数低时,就可以沿用低阶的解码器。这增加了系统的灵活性,避免了在大带宽和高阶的调制编码条件下非随机数据引起的高PAPR 问题。
需要说明的是,各个模块的实现还可以对应本申请方法实施例的相应描述,执行上述实施例中接收端设备所执行的方法和功能。
本申请实施例还提供了一种处理器,用于与存储器耦合,用于执行本申请实施例中任一实施例中涉及方法和功能。
本申请实施例还提供了一种包含指令的计算机程序产品,其在计算机上运行时,使得计算机执行本申请各实施例中任一实施例中涉及方法和功能。
本申请实施例还提供了一种装置,用于执行上述本申请实施例中任一实施例中涉及的任意方法和功能。
本申请实施例还提供一种无线通信系统,该系统包括本申请任一实施例中涉及的至少一个发送端设备和至少一个接收端涉笔。
如前所述,以上实施例描述中的数据传输设备可以是接入点或者站点,但本申请中描述的数据传输设备的范围并不限于此,而且数据传输设备的结构可以不受图4~图6的限制。数据传输设备可以是独立的设备或者可以是较大设备的一部分。例如所述数据传输设备的实现形式可以是:
(1)独立的集成电路IC,或芯片,或,芯片系统或子系统;(2)具有一个或多个IC的集合,可选的,该IC集合也可以包括用于存储数据,指令的存储部件;(3)可嵌入在其他设备内的模块;(4)接收机、智能终端、无线设备、手持机、移动单元、车载设备、云设备、人工智能设备等等;(5)其他等等。
对于数据传输设备的实现形式是芯片或芯片系统的情况,可参见图7所示的芯片的结构示意图。图7所示的芯片包括处理器501和接口502。其中,处理器501的数量可以是一个或多个,接口502的数量可以是多个。可选的,该芯片或芯片系统可以包括存储器503。
本申请实施例并且不限制权利要求书的保护范围和适用性。本领域技术人员可以在不脱离本申请实施例范围的情况下对本申请涉及的元件的功能和部署进行适应性更改,或酌情省略、替代或添加各种过程或组件。
为便于理解本申请实施例的相关内容,对本申请实施例涉及的一些概念进行阐述。
1、数据传输
本申请所述的数据传输方法可适应于上行传输,也可适应于下行传输。另外,该数据传输方法还适用于点对点的单用户传输,或下行多用户传输,或上行多用户传输。其中,针对上行多用户传输,该数据传输方法采用的是基于触发帧的上行传输方法。以下分别介绍基于触发帧的数据分组,和非基于触发的数据分组。
2、EHT TB PPDU
基于触发帧的数据分组可为极高吞吐量基于触发帧的物理层协议数据单元(Extremely High Throughput trigger based physical layer protocol data unit,EHT TB PPDU),或为未来某代WiFi标准的基于触发帧的物理层协议数据单元等。
基于触发帧发送EHT TB PPDU的结构的一种示例如图8所示,从EHT-STF到Data,整个带宽被划分为1个或多个资源单元。图8所示的EHT TB PPDU中各个字段的作用如表2所示。
其中,data部分包括服务字段,其为16bits。
表2
Figure PCTCN2021080305-appb-000003
针对上行PPDU,本申请提供的对所述数据进行加扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列承载于所述待传输数据的服务字段中;如图8所示的data部分的服务字段中;所述第二比特序列复用信令字段中的比特;具体实现中,所述第二比特序列复用如图8所示的U-SIG的用于指示信道带宽的比特,或复用U-SIG中用于指示调制编码策略的比特、或复用U-SIG中用于指示关联标识符的比特、或复用U-SIG中用于指示基本服务集的比特。
本实施例中,U-SIG仅为举例,其还可能被称为EHT-SIGA随着标准的发展,可能会有其他的命名。
所述第二比特序列,可以是所述用于指示信道带宽的比特,用于指示MCS的比特,用于指示AID的比特和用于指示BSS的比特的任一种或多种的组合,其发送的先后顺序不做限定,其与第一比特序列的先后顺序也不做限定,只需要第一比特序列和第二比特序列的总的比特个数与扰码器的阶数相同即可。
3、EHT PPDU
图9是本申请实施例提供的一种极高吞吐量物理层协议数据单元的结构示意图。如图9所示,该数据分组包括传统短训练序列(legacy short training field,L-STF)、传统长训练序列(legacy long training field,L-LTF)、传统信令字段(legacy signal field,L-SIG)、重复的传统信令 字段(repeated legacy signal field,RL-SIG)、通用信令字段(universal signal field,U-SIG)、极高吞吐率信令字段(extremely high throughput-signal field,EHT-SIG),数据等。其中U-SIG和EHT-SIG携带的信息可以帮助解析EHT PPDU,其包含了用于指示信道带宽,编码调制策略等信息的比特;另外,EHT-SIG中分为两部分,第一部分公共字段(common field)包含1~N个资源单元分配子字段(resource unit allocation subfield);第二部分用户特定字段(User Specific field),按照资源单元分配的顺序,存在着1~M个用户字段(User Field)。其中,用户字段中包含用于指示关联标识符(AID),编码与调制测量等信息的比特。
其中,数据部分包括服务字段,其通常为16个比特。
图9仅为一种EHT PPDU的示意,本申请不对此进行限定。
针对下行PPDU,本申请提供的对所述数据进行加扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列承载于所述待传输数据的服务字段中;如图9所示的data部分的服务字段中;所述第二比特序列复用信令字段中的比特;具体实现中,所述第二比特序列复用如图9所示的U-SIG的用于指示信道带宽的比特,或复用EHT-SIG中用于指示调制编码策略的比特、或复用EHT-SIG中用于指示关联标识符的比特、或复用EHT-SIG用于指示基本服务集的比特。
本实施例中,U-SIG和EHT-SIG仅为举例,随着标准的发展,可能会有其他的命名。另外,用于指示信道带宽的比特,用于指示MCS的比特,用于指示AID的比特和用于指示BSS的比特可以位于U-SIG中,也可以位于EHT-SIG中,本申请实施例不做限定。
所述第二比特序列,可以是所述用于指示信道带宽的比特,用于指示MCS的比特,用于指示AID的比特和用于指示BSS的比特的任一种或多种的组合,其发送的先后顺序不做限定,其与第一比特序列的先后顺序也不做限定,只需要第一比特序列和第二比特序列的总的比特个数与扰码器的阶数相同即可。
以下结合附图和上述相关概念的阐述对本申请相关内容进行进一步的阐述。
上一代802.11ax WiFi标准中,一个OFDM符号内可以携带的信息流长度为16333,故为使一个OFDM符号内尽量不出现重复的信号,扰码器的阶数至少要到14阶。在下一代的WiFi标准中,信道带宽会从160Mhz升级到320Mhz,且可能会引入更高阶数的调制,如4096-QAM,故扰码器的阶数至少到17阶,所以本申请实施例设计了以下几种扰码器:
(1)17阶扰码器
本申请提供的三种17阶扰码器17a,17b,17c分别如图10,图11,图12所示,用多项式表达如下:
G(x) 17,a=X 17+X 11+1
G(x) 17,b=X 17+X 12+1
G(x) 17,c=X 17+X 14+1
以上三种扰码器包括17个寄存器,即该扰码器的阶数m=17,故其可以生成最长不重复序列的长度是131071,发送端设备将原始的信息比特流与该周期序列进行异或操作,并将异或的结果进行编码发送至接收端设备。
(2)18阶扰码器
本申请提供的一种18阶扰码器,如图13所示,用多项式表达如下:
G(x) 18=X 18+X 11+1
以上扰码器包括18个寄存器,即该扰码器的阶数m=18,故其可以生成最长不重复序列的长度是262144,发送端设备将原始的信息比特流与该周期序列进行异或操作,并将异或的结果进行编码发送至接收端设备。
(3)20阶扰码器
本申请提供一种20阶扰码器,如图14所示,用多项式表达如下:
G(x) 20=X 20+X 17+1
以上扰码器包括20个寄存器,即该扰码器的阶数m=20,故其可以生成最长不重复序列的长度是1048575,发送端设备将原始的信息比特流与该周期序列进行异或操作,并将异或的结果进行编码发送至接收端设备。
应理解,以上17阶,18阶,20阶扰码器仅为示意,针对更高阶的调制方式和更大的信道带宽,根据以上高阶扰码器,还可以提供多种高阶扰码器的变形方式。
为了能够使接收端设备知道扰码器的初始状态,本申请实施例提供的方式是在一个16比特的服务字段(service field)字段中,携带部分的扰码器的初始化比特,例如为7个比特(B0~B6),用来与解扰码器进行同步。该7个扰码器初始化比特可以设为“0”,以便于估计接收端设备扰码器的初始状态。而服务字段剩余的9个比特,可以继续预留,也可以设为“0”;或者用来存储SIG-B的校验位比特,传输顺序可以为从低比特位0开始至高比特位15。
另一种实现方式中,所述第一比特序列也可以为5,6比特,8,9,10,11,12,13,14,15,16比特等等;
服务字段如表3所示:
表3 Service Field字段
Figure PCTCN2021080305-appb-000004
另一部分的扰码器的初始化比特,在上行传输时,复用前述介绍的上行EHT TB PPDU中的信令字段U-SIG中的比特;或者在下行传输时,复用前述介绍的EHT PPDU中的信令字段(U-SIG和/EHT-SIG)中的比特;具体的复用的方式前述已经详细描述,在此不再赘述。
复用信令字段的初始化比特的个数和前述服务字段中的初始化比特的比特个数的总和,等于扰码器的阶数。
发送端设备和接收端设备默认使用上述17阶,18阶或20阶扰码器中的同一个生成多项式的扰码器。以17阶扰码器为例,其工作原理分别为:
发送端设备加扰过程:每次数据包传输时,扰码器随机选择一个非0的初始状态,该初始状态由前述的服务字段中的前7个比特和信令字段中的10个比特组成,对应17个寄存器的初始比特值。扰码器循环生成131071比特,然后将不断重复的131071比特序列与输入数据比特进行异或,输出扰码后的数据比特。最终将扰码后的数据比特发送出去。
接收端设备解扰过程:接收端设备接收到扰码后的数据比特时,根据扰码后的前7位解析扰码器初始状态的第一比特序列,再结合信令字段的第二比特序列,得到扰码器初始化状态。接收端在获取扰码器初始状态后,可以反复生成131071位比特,将其与扰码后的数据比特进行异或,从而可以得到加扰前的原始数据比特。
接收端设备能够正确解扰的前提是接收端已知可以推断出扰码器初始状态。
应用18阶和20阶的扰码器进行扰码和解扰的过程与之类似,不再赘述。
应理解,如果把扰码器的生成多项式的系数顺序翻转,则新的扰码器和翻转前的扰码器产生的是相同的扰码序列,只不过序列的方向刚好相反,两者具有同样的性能,故不在此处列出。具体地,对于生成多项式为
Figure PCTCN2021080305-appb-000005
的扰码器,将其多项式系数顺序翻转后的新扰码器对应的生成多项式为
Figure PCTCN2021080305-appb-000006
若G(X) a扰码器生成的扰码序列是ABCD…XYZ,则扰码器G(X) b生成的扰码序列为ZYX…DCBA。
本申请还提供一种高低阶融合的扰码器,如图15所示:该高低阶融合的扰码器包括7阶,11阶,15阶等多个不同阶数的扰码器;不同阶数的扰码器之间为并联关系;其中7阶扰码器用多项式表示为G(X)=X 7+X 4+1;11阶扰码器用多项式表示为:G(X)=X 11+X 9+1;15阶扰码器用多项式表示为G(X)=X 15+X 14+1。该扰码器融合了多个不同阶数的扰码器,包括现在WiFi标准中所采用的7阶扰码器,发送端设备根据传输数据的信道带宽、调制编码策略、给某个用户分配的资源单元的大小中的至少一种信息来确定扰码器的阶数,当信道带宽很大,或者给某个用户分配的资源单元很大,或调制编码策略的调制阶数很高时,则采用高阶数的扰码器,若信道带宽很小,或者给某个用户分配的资源单元很小,或调制编码策略的调制阶数低时,就可以沿用低阶的解码器。
例如,当用户分配的RU对应的带宽不足80Mhz时,可以使用传统的7阶扰码器;当用户分配的RU对应的带宽大于等于80Mhz但不超过160M时可以使用11阶中等的扰码器;当用户非配的RU对应的系统带宽大于160Mhz时,可以使用15阶的高阶扰码器。
图15仅为高低阶扰码器的示意,还可以是其他高低阶扰码器的组合,融合扰码器还可以有其他的实现形式,本申请不一一例举。
本申请提供的高低阶融合扰码器,使得发送端设备可以根据信道带宽、调制编码策略、给某个用户分配的资源单元的大小中的至少一种信息来选取不同阶数的扰码器,增加了系统的灵活性,避免了在大带宽和高阶的调制编码条件下非随机数据引起的高PAPR问题。
对于低成本设备,比如物联网(Internet of Things,IoT)设备或只支持20M带宽的设备,其在产品实现时,不需要实现高阶扰码器,可以依然采用传统的低阶扰码器即可,从而可以降低硬件成本和设备复杂度。
对于支持高阶数扰码的设备,本申请低阶扰码器的实现并没有增加额外的移位寄存器,故其兼容低阶扰码器不会带来太大的硬件开销。
下面将详细介绍,利用上述提供的扰码器,实现数据传输的过程。
参见图16,为本申请提供的数据传输方法的示意图;一种实现方式中,所述数据传输方法,包括:
步骤100,发送端设备对待传输数据进行扰码,得到扰码后的数据;
其中,用于对所述数据进行加扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列承载于所述待传输数据的服务字段中;所述第二比特序列复用信令字段中的比特;所述初始化比特的比特个数等于所述扰码器的阶数。
步骤101,发送端设备向接收端设备发送所述扰码后的数据;
步骤102,接收端设备接收扰码之后的数据;
步骤103,接收端设备对所述扰码后的数据进行解扰,得到解扰的数据;
其中,用于对所述数据进行解扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列承载于所述数据的服务字段中;所述第二比特序列复用信令字段中的比特;所述初始化比特的比特个数等于所述扰码器的阶数。
一种实现中,所述第一比特序列,承载于所述服务字段的前7个比特;另一种实现方式中,所述第一比特序列也可以为5,6比特,8,9,10,11,12,13,14,15,16比特等等。
应理解,本申请所述的扰码器,可以是高阶扰码器,举例来说,可以是如图10~14所示的扰码器。
另一种实现方式中,上述扰码器可以是如图15所示高低阶融合扰码器。也即,发送端设备根据传输数据的信道带宽、调制编码策略、给某个用户分配的资源单元的大小中的至少一种信息来确定扰码器的阶数,当信道带宽很大,或者给某个用户分配的资源单元很大,或调制编码策略的调制阶数很高时,则采用高阶数的扰码器,若信道带宽很小,或者给某个用户分配的资源单元很小,或调制编码策略的调制阶数低时,就可以沿用低阶的解码器。
无论是独立的高阶扰码器,还是高低阶融合扰码器,输入所述扰码器的初始化比特的比特个数与扰码器的阶数相同,具体包括两部分:第一比特序列和第二比特序列。
其中,第一比特序列如前述的表2中的服务字段中的B0~B6所示,在对所述数据进行加扰之前,将所述第一比特序列置为0。所述服务字段除前7个比特之外的9个比特,设置为所述信令字段的校验比特。具体的,针对上行传输,该9个比特可以设置为U-SIG的校验比特,针对下行传输,该9个比特可以设置为SIG-B的校验比特。
所述第二比特序列复用所述信令字段中的用于指示信道带宽、调制编码策略、关联标识符、基本服务集中的至少一种指示信息对应的比特。
所述第二比特序列复用信令字段中的比特的方式在前述已经详细描述,在此不再赘述。
扰码器的初始化比特的一部分仍然占用服务字段的前7个比特,最大程度的兼容了现有的802.11ax标准;而初始化比特的另一部分,复用进行数据传输时需要传输的信令字段的部分比特,没有增加额外的开销。可选的,还可以将服务字段的剩余9个比特设置为校验比特,用来校验信令字段,进一步增强了传输性能。
又一种实现方式中,所述数据传输方法,包括:
步骤100,发送端设备对待传输数据进行扰码,得到扰码后的数据;
其中,用于对所述数据进行加扰的扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应。
步骤101,发送端设备向接收端设备发送所述扰码后的数据;
步骤102,接收端设备接收扰码之后的数据;
步骤103,接收端设备对所述扰码后的数据进行解扰,得到解扰的数据。
一种实现方式中,本实施例所述的扰码器,可以是高阶扰码器,举例来说,可以是如图10~14所示的任一种扰码器。
另一种实现方式中,上述扰码器为如图15所示的高低阶融合扰码器,发送端设备根据传输数据的信道带宽、调制编码策略、给某个用户分配的资源单元的大小中的至少一种信息来确定扰码器的阶数,当信道带宽很大,或者给某个用户分配的资源单元很大,或调制编码策略的调制阶数很高时,则采用高阶数的扰码器,若信道带宽很小,或者给某个用户分配的资源单元很小,或调制编码策略的调制阶数低时,就可以沿用低阶的解码器。
应理解,上述两种数据传输方法中,发送端设备执行的步骤100,可以通过如图4所示的处理器201执行,该处理器201可以实现扰码器的功能,还可以通过如图5所示的处理模块301执行;还可以通过如图7所示的处理器501执行;发送端设备执行的步骤101,可以通过如图4所示的收发器205执行,还可以通过如图5所示的发送模块302执行;还可以通过如图7所示的接口执行。其中的加扰序列和数据等信息,可以通过如图4所示的存储器202存储,或如图5所示的发送端设备的存储器(图未示意)执行,或如图7所示的存储器503执行。
上述接收端设备执行的步骤102,可以通过如图4所示的收发器205执行,还可以通过如图6所示的接收模块401执行;还可以通过如图7所示的接口执行。上述接收端设备执行的步骤103,可以通过如图4所示的处理器201执行,该处理器201可以实现扰码器的功能,还可以通过如图6所示的处理模块402执行;还可以通过如图7所示的处理器501执行;其中的加扰序列和数据等信息,可以通过如图4所示的存储器202存储,或如图6所示的发送端设备的存储器(图未示意)执行,或如图7所示的存储器503执行。
本领域技术人员还可以了解到本申请实施例列出的各种说明性逻辑块(illustrative logical block)和步骤(step)可以通过电子硬件、电脑软件,或两者的结合进行实现。这样的功能是通过硬件还是软件来实现取决于特定的应用和整个系统的设计要求。本领域技术人员可以对于每种特定的应用,可以使用各种方法实现所述的功能,但这种实现不应被理解为超出本申请实施例保护的范围。
在上述实施例中,可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时,可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机指令时,全部或部分地产生按照本申请实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中,或者从一个计算机可读存储介质向另一个计算机可读存储介质传输,例如,所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(digital subscriber line,DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质(例如,软盘、硬盘、磁带)、光介质(例如,高密度数字视频光盘(digital video disc,DVD))、或者半导体介质(例如,固态硬盘(solid state disk,SSD))等。
本领域普通技术人员可以理解:本申请中涉及的第一、第二等各种数字编号仅为描述方 便进行的区分,并不用来限制本申请实施例的范围,也表示先后顺序。
本申请中各表所示的对应关系可以被配置,也可以是预定义的。各表中的信息的取值仅仅是举例,可以配置为其他值,本申请并不限定。在配置信息与各参数的对应关系时,并不一定要求必须配置各表中示意出的所有对应关系。例如,本申请中的表格中,某些行示出的对应关系也可以不配置。又例如,可以基于上述表格做适当的变形调整,例如,拆分,合并等等。上述各表中标题示出参数的名称也可以采用通信装置可理解的其他名称,其参数的取值或表示方式也可以通信装置可理解的其他取值或表示方式。上述各表在实现时,也可以采用其他的数据结构,例如可以采用数组、队列、容器、栈、线性表、指针、链表、树、图、结构体、类、堆、散列表或哈希表等。
本申请中的预定义可以理解为定义、预先定义、存储、预存储、预协商、预配置、固化、或预烧制。
本领域普通技术人员可以意识到,结合本文中所公开的实施例描述的各示例的单元及算法步骤,能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行,取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能,但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到,为描述的方便和简洁,上述描述的系统、装置和单元的具体工作过程,可以参考前述方法实施例中的对应过程,在此不再赘述。
以上所述,仅为本申请的具体实施方式,但本申请的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本申请的保护范围之内。因此,本申请的保护范围应以所述权利要求的保护范围为准。

Claims (35)

  1. 一种数据传输方法,其特征在于,包括:
    对待传输数据进行扰码,得到扰码后的数据;
    向接收端设备发送所述扰码后的数据;
    其中,用于对所述数据进行加扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列承载于所述待传输数据的服务字段中;所述第二比特序列复用信令字段中的比特;所述初始化比特的比特个数等于所述扰码器的阶数。
  2. 如权利要求1所述的方法,其特征在于,所述扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应。
  3. 如权利要求1所述的方法,所述第二比特序列复用所述信令字段中的用于指示信道带宽、调制编码策略、关联标识符、基本服务集中的至少一种指示信息对应的比特。
  4. 如权利要求3所述的方法,其特征在于,所述第一比特序列为7个比特,承载于所述服务字段的前7个比特;在对所述数据进行加扰之前,将所述第一比特序列置为0。
  5. 如权利要求4所述的方法,其特征在于,所述服务字段除前7个比特之外的9个比特,设置为信令字段的校验比特。
  6. 一种发送端设备,其特征在于,包括:
    处理器,用于对待传输数据进行扰码,得到扰码后的数据;
    收发器,用于向接收端设备发送所述扰码后的数据;
    其中,用于对所述数据进行加扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列承载于所述待传输数据的服务字段中;所述第二比特序列复用信令字段中的比特;所述初始化比特的比特个数等于所述扰码器的阶数。
  7. 如权利要求6所述的发送端设备,其特征在于,所述扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应。
  8. 如权利要求6所述的发送端设备,所述第二比特序列复用所述信令字段中的用于指示信道带宽、调制编码策略、关联标识符、基本服务集中的至少一种指示信息对应的比特。
  9. 如权利要求8所述的发送端设备,其特征在于,所述第一比特序列为7个比特,承载于所述服务字段的前7个比特;在对所述数据进行加扰之前,将所述第一比特序列置为0。
  10. 如权利要求9所述的发送端设备,其特征在于,所述服务字段除前7个比特之 外的9个比特,设置为信令字段的校验比特。
  11. 一种数据传输方法,其特征在于,包括:
    对待传输数据进行扰码,得到扰码后的数据;
    向接收端设备发送所述扰码后的数据;
    其中,用于对所述数据进行加扰的扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应。
  12. 如权利要求11所述的方法,其特征在于,用于对所述数据进行加扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列承载于所述待传输数据的服务字段中;所述第二比特序列复用信令字段中的比特;所述初始化比特的比特个数等于所述扰码器的阶数。
  13. 如权利要求11所述的方法,其特征在于,对所述数据进行加扰的扰码器为高低阶融合的扰码器。
  14. 一种发送端设备,其特征在于,包括:
    处理器,用于对待传输数据进行扰码,得到扰码后的数据;
    收发器,用于向接收端设备发送所述扰码后的数据;
    其中,用于对所述数据进行加扰的扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应。
  15. 如权利要求14所述的发送端设备,其特征在于,用于对所述数据进行加扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列承载于所述待传输数据的服务字段中;所述第二比特序列复用信令字段中的比特;所述初始化比特的比特个数等于所述扰码器的阶数。
  16. 如权利要求15所述的发送端设备,其特征在于,对所述数据进行加扰的扰码器为高低阶融合的扰码器。
  17. 一种数据传输方法,其特征在于,包括:
    接收扰码之后的数据;
    对所述扰码后的数据进行解扰,得到解扰的数据;
    其中,用于对所述数据进行解扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列承载于所述数据的服务字段中;所述第二比特序列复用信令字段中的比特;所述初始化比特的比特个数等于所述扰码器的阶数。
  18. 如权利要求17所述的方法,其特征在于,所述扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应。
  19. 如权利要求17所述的方法,所述第二比特序列复用所述信令字段中的用于指示信道带宽、调制编码策略、关联标识符、基本服务集中的至少一种指示信息对应的比特。
  20. 如权利要求18或19所述的方法,其特征在于,所述服务字段除前7个比特之外的9个比特,设置为所述信令字段的校验比特。
  21. 一种接收端设备,其特征在于,包括:
    收发器,用于接收扰码之后的数据;
    处理器,用于对所述扰码后的数据进行解扰,得到解扰的数据;
    其中,用于对所述数据进行解扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列承载于所述数据的服务字段中;所述第二比特序列复用信令字段中的比特;所述初始化比特的比特个数等于所述扰码器的阶数。
  22. 如权利要求21所述的接收端设备,其特征在于,所述扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应。
  23. 如权利要求21所述的接收端设备,所述第二比特序列复用所述信令字段中的用于指示信道带宽、调制编码策略、关联标识符、基本服务集中的至少一种指示信息对应的比特。
  24. 如权利要求22或23所述的接收端设备,其特征在于,所述服务字段除前7个比特之外的9个比特,设置为所述信令字段的校验比特。
  25. 一种数据传输方法,其特征在于,包括:
    接收扰码之后的数据;
    对所述扰码后的数据进行解扰,得到解扰的数据;
    其中,用于对所述数据进行解扰的扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应。
  26. 如权利要求25所述的方法,其特征在于,用于对所述数据进行解扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列承载于所述数据的服务字段中;所述第二比特序列复用信令字段中的比特;所述初始化比特的比特个数等于所述扰码器的阶数。
  27. 如权利要求25所述的方法,其特征在于,对所述数据进行解扰的扰码器为高低阶融合的扰码器。
  28. 一种接收端设备,其特征在于,包括:
    收发器,用于接收扰码之后的数据;
    处理器,用于对所述扰码后的数据进行解扰,得到解扰的数据;
    其中,用于对所述数据进行解扰的扰码器的阶数与资源单元大小和调制编码策略中的至少一种对应。
  29. 如权利要求28所述的接收端设备,其特征在于,用于对所述数据进行解扰的扰码器初始化比特包括第一比特序列和第二比特序列,其中,所述第一比特序列承载于所述数据的服务字段中;所述第二比特序列复用信令字段中的比特;所述初始化比特的比特个数等于所述扰码器的阶数。
  30. 如权利要求29所述的接收端设备,其特征在于,对所述数据进行解扰的扰码器为高低阶融合的扰码器。
  31. 一种芯片系统,其特征在于,包括:至少一个处理器和接口,与所述处理器耦合的存储器;所述处理器执行所述存储器中存储的计算机程序时,使得如权利要求1~5,11~13,17~20,25~27,任一项所述的方法被实现。
  32. 一种计算机可读存储介质,其特征在于,所述计算机可读存储介质用于存储计算机程序,当所述计算机程序被执行时,使得如权利要求1~5,11~13,17~20,25~27任一项所述的方法被实现。
  33. 一种计算机程序产品,其特征在于,所述计算机程序产品用于存储计算机程序,当所述计算机程序被执行时,使得如权利要求1~5,11~13,17~20,25~27任一项所述的方法被实现。
  34. 一种程序,其特征在于,所述程序在计算机上运行时,使得如权利要求1~5,11~13,17~20,25~27任一项所述的方法被实现。
  35. 一种装置,其特征在于,所述装置用于实现如权利要求1~5,11~13,17~20,25~27任一项所述的方法。
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