WO2021200033A1 - Voltage detection device - Google Patents

Voltage detection device Download PDF

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Publication number
WO2021200033A1
WO2021200033A1 PCT/JP2021/010037 JP2021010037W WO2021200033A1 WO 2021200033 A1 WO2021200033 A1 WO 2021200033A1 JP 2021010037 W JP2021010037 W JP 2021010037W WO 2021200033 A1 WO2021200033 A1 WO 2021200033A1
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Prior art keywords
voltage
input
voltage dividing
dividing
circuit
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PCT/JP2021/010037
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French (fr)
Japanese (ja)
Inventor
溝口 朝道
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株式会社デンソー
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Publication of WO2021200033A1 publication Critical patent/WO2021200033A1/en

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B60VEHICLES IN GENERAL
    • B60LPROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
    • B60L3/00Electric devices on electrically-propelled vehicles for safety purposes; Monitoring operating variables, e.g. speed, deceleration or energy consumption
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B60VEHICLES IN GENERAL
    • B60LPROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
    • B60L58/00Methods or circuit arrangements for monitoring or controlling batteries or fuel cells, specially adapted for electric vehicles
    • B60L58/10Methods or circuit arrangements for monitoring or controlling batteries or fuel cells, specially adapted for electric vehicles for monitoring or controlling batteries
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01MPROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00Secondary cells; Manufacture thereof
    • H01M10/42Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/48Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J1/00Circuit arrangements for dc mains or dc distribution networks
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10Energy storage using batteries
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02TCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
    • Y02T10/00Road transport of goods or passengers
    • Y02T10/60Other road transportation technologies with climate change mitigation effect
    • Y02T10/70Energy storage systems for electromobility, e.g. batteries

Definitions

  • the present disclosure relates to a voltage detection device that detects the voltage of a battery.
  • a power supply system in which a function group is divided into a plurality of systems (systems) and the total voltage (voltage between terminals) of an in-vehicle assembled battery is selectively applied to each system by a system relay. ing.
  • the total voltage applied to the selected system (hereinafter referred to as applied voltage) is detected.
  • applied voltage the total voltage applied to the selected system
  • the monitoring IC that detects each voltage of the battery cells constituting the assembled battery integrates the differential amplifier circuit and the AD conversion device in the monitoring IC, and calibrates or corrects the total error. It is known that the detection accuracy is good because it is suppressed. Therefore, next, it has been considered to divert this monitoring IC to detect each applied voltage.
  • this monitoring IC has been developed specifically for measuring the voltage of each battery cell connected in series. Specifically, it is assumed that the voltage is applied to each input channel of the monitoring IC in the order of the magnitude of the potential, and it is not assumed that the voltage of the same potential is input. Therefore, when the monitoring IC detects a plurality of applied voltages having the same potential, the current wraps around through the protection diodes provided inside and outside the monitoring IC, the value fluctuates, and the detection accuracy deteriorates. occured.
  • the present disclosure has been made in view of the above circumstances, and its main purpose is to provide a voltage detection device capable of accurately detecting a plurality of applied voltages.
  • the means for solving the above problems is applied to a power supply system including a storage battery and a plurality of systems connected in parallel to the storage battery and to which a voltage between terminals of the storage battery is applied.
  • the first voltage dividing circuit that divides the applied voltage of each system by two different voltage dividing ratios and the input channel for each system are provided. It is provided with a detection circuit that detects the applied voltage of each system based on the difference between the two voltage dividers input from the first voltage divider circuit via the input channel.
  • Each of the input channels has a pair of input terminals, and the first voltage dividing circuit divides the applied voltage at a stepwise different voltage dividing ratio for each of the input terminals and outputs the voltage.
  • the voltage dividing voltage input to each input terminal of the detection circuit can be gradually increased by the first voltage dividing circuit. Therefore, it is possible to prevent the generation of wraparound current and detect the voltage with high accuracy.
  • FIG. 1 is a circuit diagram showing an outline of a power supply system.
  • FIG. 2 is a circuit diagram showing an outline of the monitoring IC.
  • FIG. 3 is a circuit diagram showing an outline of a conventional monitoring IC.
  • FIG. 4 is a circuit diagram showing a wraparound current.
  • FIG. 5 is a circuit diagram showing a current flow.
  • FIG. 6 is a circuit diagram showing a current flow.
  • FIG. 7 is a circuit diagram showing a current flow.
  • FIG. 8 is a circuit diagram showing a current flow.
  • FIG. 9 is a circuit diagram showing a current flow.
  • FIG. 10 is a diagram showing a voltage dividing voltage.
  • FIG. 10 is a diagram showing a voltage dividing voltage.
  • FIG. 11 is a diagram showing a voltage dividing voltage.
  • FIG. 12 is a circuit diagram showing an outline of the monitoring IC according to the second embodiment.
  • FIG. 13 is a circuit diagram showing an outline of the monitoring IC according to the third embodiment.
  • FIG. 14 is a circuit diagram showing an outline of the monitoring IC in another example.
  • the power supply system applied to a vehicle such as an electric vehicle includes an assembled battery 10 as a storage battery, a plurality of systems 21 and 22 configured by grouping functional groups, an assembled battery 10 and each system.
  • the device 30 is provided.
  • the assembled battery 10 is a series connection of a plurality of battery cells, and the voltage between the terminals between the positive electrode side terminal 10a and the negative electrode side terminal 10b of the assembled battery 10 is, for example, a high voltage of 100 V or more.
  • the assembled battery 10 serves as a power source for an electric load such as a rotating machine (motor generator), and stores electric power generated by regenerative control of the motor generator.
  • a lithium ion secondary battery is used as the battery cell.
  • the systems 21 and 22 are connected in parallel to the assembled battery 10, and the voltage between the terminals of the assembled battery 10 is applied to each of them.
  • Examples of the systems 21 and 22 include a drive system including an inverter and a motor, a charging system including a power generation device, and the like.
  • Power supply paths 23 and 24 are provided for each of the systems 21 and 22.
  • the power supply paths 23 and 24 include positive electrode side power supply paths 23a and 24a connected to the positive electrode side terminal 10a of the assembled battery 10 and negative electrode side power supply paths 23b and 24b connected to the negative electrode side terminal 10b of the assembled battery 10. Is included.
  • the positive electrode side power supply path 11a is connected to the positive electrode side terminal 10a of the assembled battery 10
  • the negative electrode side power supply path 11b is connected to the negative electrode side terminal 10b of the assembled battery 10.
  • Each power supply path 11, 23, 24 is composed of, for example, a bus bar or the like.
  • Relay switches SN1, SP1, SN2, SP2 are provided for each of the systems 21 and 22.
  • the relay switches SN1, SP1, SN2, SP2 switch between the positive electrode side relay switches SP1 and SP2 for switching the energization and energization cutoff of the positive electrode side power supply paths 23a and 24a and the negative electrode side power supply paths 23b and 24b for energization and energization cutoff.
  • the relay switches SN1 and SN2 on the negative electrode side are included.
  • the relay switches SN1 and SP1 When the relay switches SN1 and SP1 are turned off, the power supply between the system 21 and the assembled battery 10 is cut off, and when the relay switches SN1 and SP1 are turned on, the space between the system 21 and the assembled battery 10 is turned on. Is energized. Similarly, when the relay switches SN2 and SP2 are turned off, the energization between the system 22 and the assembled battery 10 is cut off, and when the relay switches SN2 and SP2 are turned on, the system 22 and the assembled battery 10 are turned on. The space between and is energized.
  • resistors R61 and R62 of about several M ⁇ are connected in parallel to the relay switches SN1 and SN2 on the negative electrode side, respectively. These resistors R61 and R62 correspond to the connection circuit 70.
  • the voltage detection device 30 inputs the applied voltage of each system 21 and 22 from the first voltage dividing circuit 40 and the first voltage dividing circuit 40 via the input channels CH1, CH3 and CH5.
  • a monitoring IC 50 as a detection circuit for detecting each applied voltage based on the difference between the two divided voltages, and a second voltage dividing circuit 60 for dividing the voltage between the terminals of the assembled battery 10 are provided.
  • the first voltage divider circuit 40 includes a first series connector composed of a switch SW0 and resistors R10, R20, R30, a second series connector composed of a switch SW1 and resistors R11, R21, R31, and a switch SW2. And a third series connector composed of resistors R12, R22, R32.
  • the first series connection body is provided between the positive electrode side power supply path 11a and the negative electrode side power supply path 11b, and is connected in series from the positive electrode side power supply path 11a in the order of switch SW0, resistor R10, resistor R20, and resistor R30. It is connected.
  • the connection point P11 between the resistor R20 and the resistor R30 is connected to the low potential side input terminal S1 of the monitoring IC50, and the connection point P12 between the resistor R10 and the resistor R20 is the high potential side input of the monitoring IC50. It is connected to the terminal V1.
  • the voltage between the terminals is divided by the first voltage division ratio (R30 / (R10 + R20 + R30)) and input to the input terminal S1.
  • the voltage between the terminals is divided by the second voltage division ratio ((R30 + R20) / (R10 + R20 + R30)) and input to the input terminal V1.
  • the voltage dividing voltage in which the terminal voltage is divided by the first voltage dividing ratio is indicated as the voltage dividing voltage DS1
  • the voltage dividing voltage in which the terminal voltage is divided by the second voltage dividing ratio is referred to as the voltage dividing voltage. It may be indicated as DV1.
  • a diode D11 is provided that allows the flow of current from the low potential side input terminal S1 side to the high potential side input terminal V1 side.
  • the second series connection is provided between the positive electrode side power supply path 23a and the negative electrode side power supply path 23b of the system 21, and the switch SW1, the resistor R11, the resistor R21, and the resistor R31 are in this order from the positive electrode side power supply path 23a. Are connected in series with.
  • the connection point P13 between the resistor R21 and the resistor R31 is connected to the low potential side input terminal S3 of the monitoring IC50, and the connection point P14 between the resistor R11 and the resistor R21 is the high potential side input of the monitoring IC50. It is connected to the terminal V3.
  • the voltage applied to the system 21 is divided by the third voltage division ratio (R31 / (R11 + R21 + R31)) and input to the input terminal S3.
  • the voltage applied to the system 21 is divided by the fourth voltage division ratio ((R31 + R21) / (R11 + R21 + R31)) and input to the input terminal V3. ..
  • the voltage applied to the system 21 is the potential difference (voltage) actually generated between the positive electrode side power supply path 23a and the negative electrode side power supply path 23b due to the application of the voltage between the terminals of the assembled battery 10. That is. Further, the voltage dividing voltage in which the voltage applied to the system 21 is divided by the third voltage dividing ratio is indicated as the voltage dividing voltage DS3, and the voltage applied to the system 21 is divided by the fourth voltage dividing ratio.
  • the voltage may be referred to as a voltage divider voltage DV3.
  • the third series connection is provided between the positive electrode side power supply path 24a and the negative electrode side power supply path 24b of the system 22, and the switch SW2, the resistor R12, the resistor R22, and the resistor R32 are in this order from the positive electrode side power supply path 24a. Are connected in series with.
  • the connection point P15 between the resistor R22 and the resistor R32 is connected to the low potential side input terminal S5 of the monitoring IC50, and the connection point P16 between the resistor R12 and the resistor R22 is the high potential side input of the monitoring IC50. It is connected to terminal V5.
  • the voltage applied to the system 22 is divided by the fifth voltage division ratio (R32 / (R12 + R22 + R32)) and input to the input terminal S5.
  • the voltage applied to the system 22 is divided by the sixth voltage division ratio ((R32 + R22) / (R12 + R22 + R32)) and input to the input terminal V5. ..
  • the voltage applied to the system 22 is the potential difference (voltage) actually generated between the positive electrode side power supply path 24a and the negative electrode side power supply path 24b due to the application of the voltage between the terminals of the assembled battery 10. That is. Further, the voltage dividing voltage in which the voltage applied to the system 22 is divided by the fifth voltage dividing ratio is indicated as the voltage dividing voltage DS5, and the voltage applied to the system 22 is divided by the sixth voltage dividing ratio.
  • the voltage may be referred to as a voltage divider voltage DV5.
  • a diode D15 that allows the flow of current from the low potential side input terminal S5 side to the high potential side input terminal V5 side is provided.
  • the monitoring IC50 uses one having at least six input channels CH1 to CH6, but more input channel CHs including the input channel CH6 are input in the same manner as the input channel CH6. Since the terminals are short-circuited and are not used for the voltage detection this time, they will be described in the range of input channels CH1 to CH6 in the following description.
  • Each input channel CH1 to CH6 has a pair of input terminals (pin terminals) S1 to S6 and V1 to V6, respectively.
  • the pair of input terminals S1 to S6 and V1 to V6 have high potential side input terminals V1 to V6 and low potential side input terminals S1 to S6.
  • the input channels CH1 to CH6 are arranged in order from the one with the smallest number, that is, in the order of CH1 ⁇ CH2 ⁇ ... ⁇ CH6. Further, in each of the input channels CH1 to CH6, the low potential side input terminals S1 to S6 ⁇ the high potential side input terminals V1 to V6 are arranged in this order. Therefore, the input terminals S1 to S6 and V1 to V6 are arranged in the order of S1 ⁇ V1 ⁇ S2 ⁇ V2 ⁇ ... ⁇ S6 ⁇ V6.
  • the monitoring IC 50 includes a multiplexer 51, a differential amplifier circuit 52, an AD converter 53, and semiconductor switches SW51 to SW56 such as MOSFETs.
  • the input terminals S1 to S6 and V1 to V6 are connected to the differential amplifier circuit 52 via a multiplexer 51.
  • the high potential side input terminals V1 to V6 are connected to the non-inverting input terminal side of the differential amplifier circuit 52 via the multiplexer 51, and the low potential side input terminals S1 to S6 are connected via the multiplexer 51.
  • the inverting input terminal side of the differential amplifier circuit 52 is connected.
  • the multiplexer 51 outputs the voltage input to the input terminals S1 to S6 and V1 to V6 of the input channels CH1 to CH6 selected from the input channels CH1 to CH6 to the differential amplifier circuit 52.
  • the differential amplifier circuit 52 detects the voltage (potential difference) between the non-inverting input terminal and the inverting input terminal and outputs it as an analog signal to the AD converter 53.
  • the AD converter 53 converts the analog signal into a digital signal and outputs it to the arithmetic unit 54 included in the monitoring IC 50.
  • the arithmetic unit 54 calculates the voltage between the terminals of the assembled battery 10 and the voltage applied to each of the systems 21 and 22 based on the input potential difference (digital signal).
  • the arithmetic unit 54 has a first voltage dividing ratio (R30 / (R10 + R20 + R30)), a second voltage dividing ratio ((R30 + R20) / (R10 + R20 + R30)), and a voltage dividing circuit 40 of the first voltage dividing circuit 40 with respect to the voltage between terminals.
  • the voltage between terminals is calculated based on the potential difference between the voltage dividing voltage DS1 and the voltage dividing voltage DV1.
  • the differential amplifier circuit 52 and the AD converter 53 are integrated in the monitoring IC 50, and the total error is suppressed by calibration or correction. Therefore, the voltage between terminals can be calculated accurately.
  • the arithmetic unit 54 has a third voltage dividing ratio (R31 / (R11 + R21 + R31)), a fourth voltage dividing ratio ((R31 + R21) / (R11 + R21 + R31)) of the first voltage dividing circuit 40 with respect to the voltage applied to the system 21.
  • the voltage applied to the system 21 is calculated based on the potential difference between the voltage dividing voltage DS3 and the voltage dividing voltage DV3.
  • the calculation of the voltage applied to the system 22 is the same. It is not necessary to provide the arithmetic unit 54 in the monitoring IC 50, and the arithmetic unit 54 may be provided in the external device.
  • the semiconductor switches SW51 to SW56 are provided so as to be able to switch between energization and energization cutoff between the adjacent low potential side input terminals S1 to S6, respectively.
  • the semiconductor switch SW51 is provided between the input terminal S1 and the input terminal S2, and is configured to be able to switch between energization and energization cutoff between the terminals.
  • diodes D51 to D56 are connected in parallel to the semiconductor switches SW51 to SW56, respectively.
  • the diodes D51 to D56 may be parasitic diodes of the semiconductor switches SW51 to SW56.
  • Each diode D51 is arranged so as to allow current to flow from the low-potential side input terminal S1 having a small number to the low-potential side input terminal S2 having a large number. The same applies to the diodes D52 to D56.
  • the arithmetic unit 54 is configured to be able to control the switching of the semiconductor switches SW51 to SW56 and the selection of the input channels CH1 to CH6 by the multiplexer 51 in addition to the above-described arithmetic.
  • the switch SW3, the resistor R42, and the resistor R52 are connected in series in this order between the positive electrode side power supply path 11a and the negative electrode side power supply path 11b. Further, one end of the series connector of the resistor R41 and the resistor R51 is connected between the switch SW3 and the resistor R42 so as to be parallel to the resistor R42 and the resistor R52, and the other end is connected to the negative electrode side power supply path 11b. Has been done.
  • connection point P21 between the resistor R41 and the resistor R51 is connected to the connection point P13 between the resistor R21 and the resistor R31 of the first voltage dividing circuit 40 via the diode D1.
  • the diode D1 is connected so as to allow the flow of current from the side of the second voltage divider circuit 60 to the side of the first voltage divider circuit 40. That is, when the switch SW3 is turned on, the voltage between the terminals of the assembled battery 10 is divided by the seventh voltage dividing ratio (R51 / (R41 + R51)) based on the resistors R41 and R51, and the connection point P13 is divided via the diode D1. It is configured to be applicable to.
  • the voltage divider voltage obtained by dividing the voltage between terminals by the seventh voltage divider ratio may be referred to as the voltage divider voltage DSmin3.
  • connection point P22 between the resistor R42 and the resistor R52 is connected to the connection point P15 between the resistor R22 and the resistor R32 of the first voltage dividing circuit 40 via the diode D2.
  • the diode D2 is connected so as to allow the flow of current from the side of the second voltage divider circuit 60 to the side of the first voltage divider circuit 40. That is, when the switch SW3 is turned on, the voltage between the terminals of the assembled battery 10 is divided by the eighth voltage dividing ratio (R52 / (R42 + R52)) based on the resistors R42 and R52, and the connection point P15 is divided via the diode D2. It is configured to be applicable to.
  • the voltage divider voltage obtained by dividing the voltage between terminals by the eighth voltage divider ratio may be referred to as the voltage divider voltage DSmin5.
  • the monitoring IC50 is originally used to detect the voltage of each battery cell C11 to C15 constituting the assembled battery.
  • the semiconductor switches SW51 to SW55 are provided for equalization discharge of the battery cells C11 to C15. That is, the monitoring IC50 has been developed on the premise of detecting the voltage of the battery cells C11 to C15 connected in series. Therefore, for example, the circuit configuration is set on the premise that the potential increases stepwise for each of the input channels CH1 to CH5. Specifically, the potential input in the order of input terminal S1 ⁇ input terminal V1, S2 ⁇ input terminal V2, S3 ⁇ input terminal V3, S4 ⁇ input terminal V4, S5 ⁇ input terminal V5 gradually increases. Is assumed.
  • the voltage between the terminals of the assembled battery 10 and the applied voltage of the systems 21 and 22 are set to each input channel CH11, via a voltage dividing circuit.
  • CH13 and CH15 there are the following problems. That is, when the voltages input to the input channels CH11, CH13, and CH15 are substantially the same, the diodes D11, D13, D15, or the diodes D11, D13, D15, or the diodes D11, D13, D15, provided outside the monitoring IC50, are provided as shown by the broken line arrows shown in FIG.
  • a wraparound current may be generated via the diodes D51 to D56 of the semiconductor switches SW51 to SW56 inside the monitoring IC50.
  • a wraparound current may occur.
  • the relay switches SN1, SP1, SN2, and SP2 are turned off and the applied voltage of any of the systems 21 and 22 becomes zero, a wraparound current may be generated in the same manner. This causes a problem that a voltage detection error occurs.
  • the first voltage dividing circuit 40 and the second voltage dividing circuit 60 are provided, and each voltage dividing ratio is set as described below. The details will be described below.
  • each voltage dividing ratio of the first voltage dividing circuit 40 is set so that the input potential increases stepwise in the order of input terminal S1 ⁇ V1 ⁇ S3 ⁇ V3 ⁇ S5 ⁇ V5.
  • the second voltage dividing ratio of the voltage dividing voltage DV1 that can be input to the high potential side input terminal V1 of the input channel CH1 is the low potential side input terminal of the input channel CH1. It is set one step larger than the first voltage dividing ratio of the voltage dividing voltage DS1 that can be input to S1.
  • the fourth voltage division ratio is set one step larger than the third voltage division ratio
  • the sixth voltage division ratio is set one step larger than the fifth voltage division ratio. ing.
  • the voltage division ratio is set stepwise so that a potential difference of a predetermined value or more occurs in the input potential. That is, in the first voltage dividing circuit 40, the third voltage dividing ratio of the voltage dividing voltage DS3 that can be input to the low potential side input terminal S3 of the input channel CH3 can be input to the high potential side input terminal V1 of the input channel CH1.
  • the voltage dividing voltage is set one step larger than the second voltage dividing ratio of the DV1.
  • the fifth voltage division ratio is set one step larger than the fourth voltage division ratio.
  • the first pressure dividing ratio (R30 / (R10 + R20 + R30)) ⁇ second pressure dividing ratio (R (30 + R20) / (R10 + R20 + R30)) ⁇ third pressure dividing ratio (R31 / (R11 + R21 + R31)) ⁇ fourth pressure dividing ratio (
  • Each voltage division ratio is set stepwise so that (R31 + R21) / (R11 + R21 + R31)) ⁇ fifth voltage division ratio (R32 / (R12 + R22 + R32)) ⁇ sixth voltage division ratio ((R32 + R22) / (R12 + R22 + R32)).
  • the values of the resistors R10, R20, R30, R11, R21, R31, R12, R22, and R32 are set so that the voltage division ratios are set stepwise.
  • the first voltage dividing ratio, the third voltage dividing ratio, and the fifth voltage dividing ratio in the first voltage dividing circuit 40 are voltage drops calculated based on the current amount and impedance of the negative electrode side power supply paths 11b, 23b, and 24b. It is set in consideration of the amount.
  • the maximum drop amounts N0max, N1max, and N2max from the circuit reference (N0) of the monitoring IC50 are calculated from the impedance with the current amounts of the negative electrode side power supply paths 11b, 23b, and 24b, respectively.
  • the first voltage dividing ratio is set so that the maximum drop amount N0max ⁇ voltage dividing voltage DS1.
  • the third voltage dividing ratio is set so that the maximum drop amount N1max ⁇ voltage dividing voltage DS3.
  • the fifth voltage dividing ratio is set so that the maximum drop amount N2max ⁇ voltage dividing voltage DS5.
  • the second voltage dividing circuit 60 is configured to divide the voltage between terminals at stepwise different voltage dividing ratios for each of the systems 21 and 22. Specifically, the seventh voltage dividing ratio (R51 / (R41 + R51)) of the voltage dividing voltage DSmin3 is smaller than the third voltage dividing ratio (R31 / (R11 + R21 + R31)) of the voltage dividing voltage DS3, and the first voltage dividing circuit. At 40, it is set larger than the second voltage dividing ratio ((R30 + R20) / (R10 + R20 + R30)) which is one step smaller than the third voltage dividing ratio.
  • the eighth voltage dividing ratio (R52 / (R42 + R52)) of the voltage dividing voltage DSmin5 is smaller than the fifth voltage dividing ratio (R32 / (R12 + R22 + R32)) of the voltage dividing voltage DS5, and the first voltage dividing circuit 40 Is set larger than the fourth voltage dividing ratio ((R31 + R21) / (R11 + R21 + R31)), which is one step smaller than the fifth voltage dividing ratio.
  • the second voltage dividing circuit 60 is set for the systems 21 and 22 when there is a system 21 or 22 in which the energization with the assembled battery 10 is cut off by the relay switches SN1, SP1, SN2, SP2. It is configured to output the voltage dividing voltages DSmin3 and DSmin5 to the low potential side input terminals S3 and S5 of the input channels CH3 and CH5.
  • connection point P21 between the resistor R41 and the resistor R51 is connected to the connection point P13 between the resistor R21 and the resistor R31 of the first voltage dividing circuit 40 via the diode D1. Therefore, in the second voltage dividing circuit 60, when the applied voltage of the system 21 becomes zero, the voltage dividing voltage DS3 also becomes zero, so that the voltage dividing voltage DSmin3 is input to the low potential side input terminal S3 via the diode D1. Will be output to.
  • the connection point P22 between the resistor R42 and the resistor R52 is connected to the connection point P15 between the resistor R22 and the resistor R32 of the first voltage dividing circuit 40 via the diode D2. Therefore, when the applied voltage of the system 22 becomes zero, the second voltage dividing circuit 60 outputs the voltage dividing voltage DSmin5 to the low potential side input terminal S5 via the diode D2.
  • FIG. 5 is a diagram showing the operation of the voltage detection device 30 and the current flow when the relay switches SN1, SP1, SN2, and SP2 are turned on.
  • the broken line shows the current flow.
  • a voltage dividing voltage DS1 in which the voltage between the terminals is divided by the first voltage dividing ratio is input to the input terminal S1.
  • the voltage dividing voltage DV1 in which the voltage between the terminals is divided by the second voltage dividing ratio is input to the input terminal V1.
  • the voltage divider voltage DS3 in which the voltage applied to the system 21 is divided by the third voltage divider ratio is input to the input terminal S3.
  • the voltage dividing voltage DV3 in which the voltage applied to the system 21 is divided by the fourth voltage dividing ratio is input to the input terminal V3.
  • the voltage divider voltage DS5 in which the voltage applied to the system 22 is divided by the fifth voltage divider ratio is input to the input terminal S5.
  • the voltage dividing voltage DV5 in which the voltage applied to the system 22 is divided by the sixth voltage dividing ratio is input to the input terminal V5.
  • the magnitude relationship of each voltage dividing voltage is DS1 ⁇ DV1 ⁇ DS3 ⁇ DV3 ⁇ DS5 ⁇ DV5.
  • the monitoring IC50 can accurately detect the voltage between terminals based on the two voltage dividing voltages DS1 and DV1 input to the input terminals S1 and V1. Similarly, the monitoring IC 50 can accurately detect the voltage applied to the system 21 based on the two voltage dividing voltages DS3 and DV3 input to the input terminals S3 and V3. The voltage applied to the system 22 can be detected with high accuracy as well.
  • the seventh voltage dividing ratio in the second voltage dividing circuit 60 is smaller than the third voltage dividing ratio in the first voltage dividing circuit 40, and the voltage between terminals and the voltage applied to the system 21 are almost the same. Therefore, the voltage dividing voltage DSmin3 obtained by dividing the voltage between terminals by the seventh voltage dividing ratio is smaller than the voltage dividing voltage DS3 obtained by dividing the voltage applied to the system 21 by the third voltage dividing ratio. Therefore, the voltage dividing voltage DSmin3 from the second voltage dividing circuit 60 is not input to the input terminal S3, and the voltage dividing voltage DS3 from the first voltage dividing circuit 40 is input to the input terminal S3.
  • the eighth voltage dividing ratio in the second voltage dividing circuit 60 is smaller than the fifth voltage dividing ratio in the first voltage dividing circuit 40, and the voltage between terminals and the voltage applied to the system 22 are almost the same. Therefore, the voltage dividing voltage DSmin5 obtained by dividing the voltage between terminals by the eighth voltage dividing ratio is smaller than the voltage dividing voltage DS5 obtained by dividing the voltage applied to the system 22 by the fifth voltage dividing ratio. Therefore, the voltage dividing voltage DSmin5 from the second voltage dividing circuit 60 is not input to the input terminal S5, and the voltage dividing voltage DS3 from the first voltage dividing circuit 40 is input to the input terminal S5.
  • FIG. 6 is a diagram showing the operation of the voltage detection device 30 and the current flow when the relay switches SN1 and SP1 are turned off and the relay switches SN2 and SP2 are turned on.
  • the broken line indicates the current in the first voltage dividing circuit 40.
  • the alternate long and short dash line indicates the current in the second voltage dividing circuit 60.
  • a voltage dividing voltage DS1 in which the voltage between the terminals is divided by the first voltage dividing ratio is input to the input terminal S1.
  • the voltage dividing voltage DV1 in which the voltage between the terminals is divided by the second voltage dividing ratio is input to the input terminal V1.
  • the voltage divider voltage DS5 in which the voltage applied to the system 22 is divided by the fifth voltage divider ratio is input to the input terminal S5.
  • the voltage dividing voltage DV5 in which the voltage applied to the system 22 is divided by the sixth voltage dividing ratio is input to the input terminal V5.
  • the voltage applied to the system 21 is 0V. Therefore, the voltage dividing voltage by the first voltage dividing circuit 40 is also 0V. Therefore, since the voltage dividing voltage DSmin3 by the second voltage dividing circuit 60 is higher than 0V, as shown by the one-point chain line, the positive electrode side terminal 10a of the assembled battery 10 ⁇ switch SW3 ⁇ resistor R41 ⁇ diode D1 ⁇ resistor R31 ⁇ Resistance R61 ⁇ Current flows through the path of the negative electrode side terminal 10b of the assembled battery 10.
  • the voltage dividing voltage DSmin3 in which the voltage between the terminals is divided by the seventh voltage dividing ratio is input to the input terminal S3.
  • the voltage dividing voltage DSmin3 is input to the input terminal V3 via the diode D13.
  • the magnitude relationship of each voltage dividing voltage is DS1 ⁇ DV1 ⁇ DSmin3 ⁇ DS5 ⁇ DV5.
  • the voltage dividing voltage that is input stepwise in the order of input terminal S1 ⁇ input terminal V1 ⁇ input terminal S3, V3 ⁇ input terminal S5 ⁇ input terminal V5 increases. Therefore, it is possible to prevent the current from wrapping around through the diodes D11, D13, D15, D51, D53, and D55. Therefore, the monitoring IC 50 can accurately detect the voltage between terminals and the voltage applied to the system 22.
  • FIG. 7 is a diagram showing the operation of the voltage detection device 30 and the current flow when the relay switches SN2 and SP2 are turned off and the relay switches SN1 and SP1 are turned on.
  • the broken line indicates the current in the first voltage dividing circuit 40.
  • the alternate long and short dash line indicates the current in the second voltage dividing circuit 60.
  • a voltage dividing voltage DS1 in which the voltage between the terminals is divided by the first voltage dividing ratio is input to the input terminal S1.
  • the voltage dividing voltage DV1 in which the voltage between the terminals is divided by the second voltage dividing ratio is input to the input terminal V1.
  • the voltage divider voltage DS3 in which the voltage applied to the system 21 is divided by the third voltage divider ratio is input to the input terminal S3.
  • the voltage dividing voltage DV3 in which the voltage applied to the system 21 is divided by the fourth voltage dividing ratio is input to the input terminal V3.
  • each voltage dividing voltage is DS1 ⁇ DV1 ⁇ DS3 ⁇ DV3 ⁇ DSmin5.
  • the voltage dividing voltage that is input stepwise in the order of input terminal S1 ⁇ input terminal V1 ⁇ input terminal S3 ⁇ input terminal V3 ⁇ input terminals S5 and V5 increases. Therefore, it is possible to prevent the current from wrapping around through the diodes D11, D13, D15, D51, D53, and D55. Therefore, the monitoring IC 50 can accurately detect the voltage between terminals and the voltage applied to the system 22.
  • FIG. 8 is a diagram showing the operation of the voltage detection device 30 and the current flow when the relay switches SN1, SP1, SN2, and SP2 are turned on and the switch SW0 is stuck off (cannot be turned on).
  • the broken line shows the current flow.
  • the voltage divider voltage DS3 in which the voltage applied to the system 21 is divided by the third voltage divider ratio is input to the input terminal S3.
  • the voltage dividing voltage DV3 in which the voltage applied to the system 21 is divided by the fourth voltage dividing ratio is input to the input terminal V3.
  • the voltage divider voltage DS5 in which the voltage applied to the system 22 is divided by the fifth voltage divider ratio is input to the input terminal S5.
  • the voltage dividing voltage DV5 in which the voltage applied to the system 22 is divided by the sixth voltage dividing ratio is input to the input terminal V5.
  • the switch SW0 cannot be turned on, the input terminals S1 and V1 have the same potential as the negative electrode side power supply path 11b, that is, 0V.
  • FIG. 9 is a diagram showing the operation of the voltage detection device 30 and the current flow when the relay switches SN1, SP1, SN2, and SP2 are turned off.
  • the current in the second voltage dividing circuit 60 is shown by the alternate long and short dash line.
  • the voltage dividing voltage DS1 in which the voltage between the terminals is divided by the first voltage dividing ratio is input to the input terminal S1.
  • the voltage dividing voltage DV1 in which the voltage between the terminals is divided by the second voltage dividing ratio is input to the input terminal V1.
  • the voltage between the terminals S3 and V3 is divided by the seventh voltage dividing ratio for the same reason as described above.
  • the compressed voltage divider voltage DSmin3 is input.
  • the voltage dividing voltage DSmin5 in which the voltage between the terminals is divided by the eighth voltage dividing ratio is input to the input terminals S5 and V5.
  • the magnitude relationship of each voltage dividing voltage is DS1 ⁇ DV1 ⁇ DSmin3 ⁇ DSmin5.
  • the voltage dividing voltage that is input stepwise in the order of input terminal S1 ⁇ input terminal V1 ⁇ input terminal S3, V3 ⁇ input terminal S5, V5 increases. Therefore, it is possible to prevent the current from wrapping around through the diodes D11, D13, D15, D51, D53, and D55. Therefore, the monitoring IC 50 can accurately detect the voltage between terminals.
  • the voltage between terminals or the system 21 has a voltage dividing ratio (first voltage dividing ratio to sixth voltage dividing ratio) that is stepwise different for each input terminal S1, V1, S3, V3, S5, V6. , 22
  • the applied voltage is divided and output.
  • the pressure voltage can be increased stepwise. Therefore, as shown in FIG. 5, it is possible to prevent the generation of wraparound current and detect the voltage with high accuracy.
  • the second voltage divider circuit 60 divides the voltage between terminals at stepwise different voltage divider ratios (seventh voltage divider ratio and eighth voltage divider ratio) for each of the systems 21 and 22. Then, in the second voltage dividing circuit 60, when there are systems 21 and 22 in which the energization with the assembled battery 10 is cut off, the voltage dividing voltage is applied to the input channels CH3 and CH5 set for the systems 21 and 22. Outputs DSmin3 and DSmin5.
  • the seventh voltage dividing ratio by the second voltage dividing circuit 60 is smaller than the third voltage dividing ratio by the first voltage dividing circuit 40, and the second voltage dividing ratio is one step smaller than the third voltage dividing ratio. It is set larger than the pressure ratio. As a result, the magnitude relationship of the voltage dividing voltage becomes DV1 ⁇ DSmin3 ⁇ DS3. Therefore, as shown in FIG. 6, the voltage dividing voltage DSmin3 is input to the input terminals S3 and V3 only when the relay switches SN1 and SP1 are turned off.
  • the wraparound current can be prevented even when the relay switches SN2 and SP2 are turned off. Further, since DSmin3 ⁇ DSmin5, as shown in FIG. 9, even when all the relay switches SN1, SP1, SN2, and SP2 are off, the current wraps around from the input channel CH1 to the input channels CH3 and SH5. Can be prevented.
  • the third voltage dividing ratio and the fifth voltage dividing ratio in the first voltage dividing circuit 40 are set in consideration of the amount of voltage drop. Specifically, the third voltage dividing ratio is set so that the maximum drop amount N1max ⁇ voltage dividing voltage DS3, and the fifth voltage dividing ratio is set so that the maximum dropping amount N2max ⁇ voltage dividing voltage DS5. ing. As a result, even if a voltage drop occurs, no negative voltage is generated, and the voltage dividing voltage input to each input terminal S1, V1, S3, V3, S5, V6 can be gradually increased, resulting in wraparound. The current can be prevented.
  • the first voltage dividing circuit 40 divides the voltage between terminals by two different voltage dividing ratios
  • the monitoring IC 50 has two voltage dividing voltages DS1 via the input channel CH1 set for the assembled battery 10.
  • DV1 is input, and the voltage between terminals is detected based on the difference between the divided voltages DS1 and DV1. Therefore, the applied voltage and the circuit for detecting the voltage between terminals can be shared. Further, as shown in FIG. 8, it is possible to detect the off sticking of the switch SW0.
  • the withstand voltage can be reduced and the size can be reduced. Further, since the differential amplifier circuit 52 and the AD converter 53 are integrated inside the monitoring IC 50 and the arithmetic unit 54 corrects the error, the detection accuracy can be improved. Further, since the monitoring IC50 used for voltage detection of the battery cell of the assembled battery can be adopted as it is, the development cost can be suppressed.
  • the first to sixth voltage division ratios are set in stages. Further, the seventh pressure division ratio is set between the second pressure division ratio and the third pressure division ratio, and the eighth pressure division ratio is between the fourth pressure division ratio and the fifth pressure division ratio. Is set to.
  • each voltage dividing voltage gradually increases in potential. That is, DS1 ⁇ DV1 ⁇ DSimn3 ⁇ DS3 ⁇ DV3 ⁇ DSimn5 ⁇ DS5 ⁇ DV5.
  • the voltage dividing voltage input to the input terminals S1, V1, S3, V3, S5, and V5 can be gradually increased in this order regardless of the on / off state of the relay switches SN1, SP1, SN2, and SP2. can.
  • each voltage dividing voltage is shown on the assumption that the applied voltage and the voltage between terminals are the same.
  • every other input channel into which the voltage dividing voltage is input is set. That is, between the voltage dividing voltage DS5 and the voltage dividing voltage DSmin5, between the voltage dividing voltage DSmin5 and the voltage dividing voltage DV3, between the voltage dividing voltage DS3 and the voltage dividing voltage DSmin3, and between the voltage dividing voltage DSmin3 and the voltage dividing voltage DV1.
  • input channels CH2 and CH4 are assigned as read-through channels.
  • the second voltage dividing circuit 60 is configured to input the divided voltage DSmin3 and DSmin5 to the input terminals S3 and S5 via the diodes D1 and D2 when the applied voltage becomes 0V.
  • the voltage actually input from the second voltage divider circuit 60 to the input terminals S3 and S5 is a predetermined value Vf (Vf) rather than the voltage divider voltages DSmin3 and DSmin5 due to the characteristics of the diodes D1 and D2 (forward voltage drop). Is known to drop by a certain value). Therefore, as shown in FIG. 11A, when the voltage between terminals becomes a predetermined value or less, DV1> DSmin3-Vf may occur. In this case, a wraparound current is generated and the detection accuracy deteriorates. There is a problem of doing.
  • the connection point P21 between the resistor R41 and the resistor R51 is connected to the connection point P13 between the resistor R21 and the resistor R31 of the first voltage dividing circuit 40 via the switch SD1 as a switching unit. It is connected. At the same time, the connection point P21 is connected to the non-inverting input terminal side of the comparator CP1 as a comparison unit.
  • the second voltage dividing circuit 160 includes a series connection body of the resistor R71 and the resistance R72, and one end of the series connection body is closer to the system 21 than the relay switch SP1 in the positive electrode side power supply path 23a of the system 21. The other end is connected to the negative electrode side power supply path 11b of the assembled battery 10.
  • the inverting input terminal side of the comparator CP1 is connected to the connection point P31 between the resistor R71 and the resistor R72. That is, on the inverting input terminal side of the comparator CP1, the voltage dividing voltage DP1 obtained by dividing the applied voltage between the positive electrode side power supply path 23a and the negative electrode side power supply path 11b by the ninth voltage dividing ratio (R72 / (R71 + R72)). Is to be entered.
  • the ninth voltage division ratio is set to be slightly larger than the seventh voltage division ratio.
  • the comparator CP1 is configured to turn on the switch SD1 when the input voltage dividing voltage DSmin3 and the voltage dividing voltage DP1 are compared and it is determined that the voltage dividing voltage DSmin3 is larger than the voltage dividing voltage DP1. ing.
  • the ninth voltage dividing ratio is set to be slightly larger than the seventh voltage dividing ratio, the relay switches SN1 and SP1 are turned on, and an applied voltage equivalent to the voltage between terminals is applied to the system 21. If so, the voltage dividing voltage DSmin3 ⁇ the voltage dividing voltage DP1.
  • the comparator CP1 has a voltage dividing voltage DSmin3 that is higher than the voltage dividing voltage DP1. Is also large, and the switch SD1 is turned on. Then, when the switch SD1 is turned on, the voltage dividing voltage DSmin3 is input to the input terminal S3.
  • connection point P22 between the resistor R42 and the resistor R52 is a connection point between the resistor R22 and the resistor R32 of the first voltage dividing circuit 40 via the switch SD2 as a switching unit. It is connected to P15. At the same time, the connection point P22 is connected to the non-inverting input terminal side of the comparator CP2 as a comparison unit.
  • the second voltage dividing circuit 160 includes a series connection body of the resistor R73 and the resistor R74, and one end of the series connection body is closer to the system 22 than the relay switch SP2 in the positive electrode side power supply path 24a of the system 22. The other end is connected to the negative electrode side power supply path 11b of the assembled battery 10.
  • the inverting input terminal side of the comparator CP2 is connected to the connection point P32 between the resistor R73 and the resistor R74.
  • the voltage dividing voltage DP2 obtained by dividing the applied voltage between the positive electrode side power supply path 24a and the negative electrode side power supply path 11b by the tenth voltage dividing ratio (R74 / (R73 + R74)). Is to be entered.
  • the tenth voltage division ratio is set to be slightly larger than the eighth voltage division ratio.
  • the comparator CP2 is configured to turn on the switch SD2 when the input voltage dividing voltage DSmin5 and the voltage dividing voltage DP2 are compared and it is determined that the voltage dividing voltage DSmin5 is larger than the voltage dividing voltage DP2. ing.
  • the comparator CP1 compares the voltage dividing voltage DSmin3 with the voltage dividing voltage DP1, and when it is determined that the voltage dividing voltage DSmin3 is larger than the voltage dividing voltage DP1, the switch SD1 is turned on.
  • the voltage dividing voltage DP1 is obtained by dividing the voltage between the positive electrode side power supply path 23a of the system 21 and the negative electrode side terminal 10b of the assembled battery 10 by the ninth voltage dividing ratio. Therefore, if the relay switches SN1 and SP1 are turned off, the voltage dividing voltage DP1 also becomes zero, so that the comparator CP1 turns on the switch SD1 and inputs the voltage dividing voltage DSmin3 to the input terminal S3.
  • the voltage dividing voltage DS3 by the first voltage dividing circuit 40 is input to the input terminal S3 and is always input terminal. It becomes higher than the voltage dividing voltage DV1 input to V1.
  • the relay switches SN1 and SP1 are turned off, the voltage dividing voltage DSmin3 is input to the input terminal S3.
  • the voltage dividing voltage DSmin3 is input to the input terminal S3 as it is without passing through the diode, the voltage dividing voltage DSmin3 input to the input terminal S3 is always from the voltage dividing voltage DV1 input to the input terminal V1. Will also be higher. As described above, the wraparound current can be prevented.
  • the voltage dividing voltage DSmin5 can be input to the input terminal S5 without a voltage drop, and a wraparound current can be prevented.
  • the configuration of the second embodiment may be changed as in the following third embodiment.
  • the second embodiment differences from the configurations described in each of the above embodiments will be mainly described.
  • the configuration of the second embodiment will be described as a basic configuration.
  • the comparators CP1 and CP2 input the divided voltage of each voltage between the positive electrode side power supply paths 23a and 24a and the negative electrode side terminal 10b of the assembled battery 10, and input the voltage dividing voltage to the systems 21 and 22. It was determined whether or not the energization was cut off. However, each voltage between the positive electrode side power supply paths 23a and 24a and the negative electrode side terminal 10b of the assembled battery 10 is about the same as the voltage between the terminals, and it is necessary to secure the withstand voltage of the resistors R71 to R74. Therefore, there is a risk that the resistors R71 to R74 will become large.
  • the connection point P13 between the resistor R21 and the resistor R31 in the first voltage dividing circuit 40 is set to the non-inverting input terminal side of the comparator CP1. It is connected so that the voltage dividing voltage DS3 is input.
  • the comparator CP1 compares the voltage dividing voltage DS3 with the voltage dividing voltage DSmin3, and if the voltage dividing voltage DSmin3 is larger, the switch SD1 is turned on and the voltage dividing voltage DSmin3 is input to the input terminal S3. It becomes.
  • the third voltage dividing ratio of the first voltage dividing circuit 40 is larger than the seventh voltage dividing ratio of the second voltage dividing circuit 260. Therefore, when the relay switches SN1 and SP1 are turned on and a voltage similar to the voltage between terminals is applied to the system 21, it is determined that the voltage dividing voltage DSmin3 is smaller. On the other hand, when the relay switches SN1 and SP1 are turned off and the energization to the system 21 is cut off, it is determined that the voltage dividing voltage DSmin3 is larger, and the switch SD1 is turned on.
  • the voltage dividing voltage DSmin3 is input to the input terminal S3.
  • the voltage dividing voltage DSmin3 is input to the input terminal S3 as it is without passing through the diode, the voltage dividing voltage DSmin3 input to the input terminal S3 is always from the voltage dividing voltage DV1 input to the input terminal V1. Will also be higher. Therefore, the wraparound current can be prevented.
  • connection point P15 between the resistor R22 and the resistor R32 in the first voltage divider circuit 40 is connected to the non-inverting input terminal side of the comparator CP2 so that the voltage divider voltage DS5 is input.
  • the relay switches SN2 and SP2 are turned off, the voltage dividing voltage DSmin5 is input to the input terminal S5.
  • the voltage dividing voltage DSmin5 is input to the input terminal S3 as it is without passing through the diode, the voltage dividing voltage DSmin5 input to the input terminal S5 is always larger than the voltage dividing voltage input to the input terminal V3. It gets higher. Therefore, the wraparound current can be prevented.
  • the comparator CP1 turns on the switch SD1 when the voltage dividing voltage DSmin3 is larger.
  • the comparator CP1 may turn on the switch SD1 when the voltage dividing voltage DSmin3 is larger than a predetermined threshold value with respect to the voltage dividing voltage DS3. That is, the comparator CP1 may be provided with a dead zone or hysteresis. As a result, even if the applied voltage of the system 21 is about the same as the voltage between terminals and the difference between the third voltage division ratio and the seventh voltage division ratio is small, the switch SD1 is frequently turned on and off (chattering). ) Can be prevented and noise can be suppressed. Further, the comparator CP2 may be configured in the same manner.
  • the monitoring IC 50 does not have to detect the voltage between the terminals of the assembled battery 10.
  • every other input channel for inputting the voltage dividing voltage (that is, detecting the voltage) is set. That is, the input channels CH1, CH3, and CH5 are set as input channels for voltage detection. As another example of this, the input channel for inputting the voltage dividing voltage (that is, detecting the voltage) may be continuously set. For example, as shown in FIG. 14, a voltage dividing voltage may be input to the input channels CH1 to CH3. This makes it possible to reduce the number of unused input channels.
  • the number of systems that detect the applied voltage may be arbitrarily changed.
  • the voltage between the terminals of the assembled battery 10 is detected in the input channel CH1, but the input channel for detecting the voltage between the terminals may be changed.

Abstract

A voltage detection device (30) is applied to a power source system comprising a storage battery (10) and a plurality of systems (21, 22), the systems being connected in parallel to the storage battery and having inter-terminal voltage of the storage battery respectively applied thereto, and detects the respective applied voltages applied to the systems. The voltage detection device (30) comprises: a first voltage divider circuit which divides the applied voltages of each system by two different voltage dividing ratios; and a detection circuit (50) in which input channels (CH3, CH5) are configured for each system and which detects the applied voltages of each system on the basis of the difference in the two divided voltages input into each input channel. The first voltage divider circuit divides the applied voltages for each input terminal by using voltage dividing ratios that differ in a stepwise manner, and outputs the applied voltages.

Description

電圧検出装置Voltage detector 関連出願の相互参照Cross-reference of related applications
 本出願は、2020年3月30日に出願された日本出願番号2020-061375号に基づくもので、ここにその記載内容を援用する。 This application is based on Japanese Application No. 2020-061375, which was filed on March 30, 2020, and the contents of the description are incorporated herein by reference.
 本開示は、電池の電圧検出を行う電圧検出装置に関するものである。 The present disclosure relates to a voltage detection device that detects the voltage of a battery.
 近年、電動車両では、機能群を複数の系統(システム)に分け、車載組電池の総電圧(端子間電圧)をシステムリレーにて、システムごとに選択的に印加するような電源システムが構成されている。このような電源システムでは、選択先のシステムにおいて適切に電圧が印加されているか否か等を検知するため、選択先のシステムに印加された総電圧(以下、印加電圧と示す)をそれぞれ検出する必要がある。その際、コスト面から共通回路にて検出可能にすることが望ましく、また、車載組電池の総電圧は、数100Vという高電圧となることが一般的であるので、印加電圧を分圧して検出することが望ましい。 In recent years, in electric vehicles, a power supply system has been configured in which a function group is divided into a plurality of systems (systems) and the total voltage (voltage between terminals) of an in-vehicle assembled battery is selectively applied to each system by a system relay. ing. In such a power supply system, in order to detect whether or not a voltage is appropriately applied in the selected system, the total voltage applied to the selected system (hereinafter referred to as applied voltage) is detected. There is a need. At that time, it is desirable to enable detection by a common circuit from the viewpoint of cost, and since the total voltage of the in-vehicle assembled battery is generally as high as several hundreds of volts, the applied voltage is divided and detected. It is desirable to do.
 そこで、特許文献1に示すような、分圧回路に印加電圧を分圧して検出する方法や、特許文献2に示すような、差動増幅回路を介して分圧電圧を測定する方法を採用することが想定されていた。 Therefore, a method of dividing and detecting the voltage applied to the voltage dividing circuit as shown in Patent Document 1 and a method of measuring the divided voltage via a differential amplifier circuit as shown in Patent Document 2 are adopted. Was supposed to be.
 しかしながら、特許文献1の方法では、選択先の回路ごとに印加電圧の検出基準となるバスバーに流れる電流量が異なり、各バスバーにおける電位が異なる。そして、共通回路で分圧電圧を検出する場合、いずれかのバスバーを基準とすることとなるため、検出精度が悪化するという問題が生じた。また、特許文献2の方法では、各バスバーにおける電位が異なるという問題は解消されるが、分圧回路の抵抗誤差に加え、差動増幅回路のゲイン誤差が重複し、検出精度が悪いという問題が生じた。このため、特許文献1,2に示す方法をそのまま採用することはできなかった。 However, in the method of Patent Document 1, the amount of current flowing through the bus bar, which is the detection reference of the applied voltage, is different for each selected circuit, and the potential in each bus bar is different. Then, when the voltage divider voltage is detected by the common circuit, one of the bus bars is used as a reference, which causes a problem that the detection accuracy deteriorates. Further, the method of Patent Document 2 solves the problem that the potentials in each bus bar are different, but in addition to the resistance error of the voltage dividing circuit, the gain error of the differential amplifier circuit overlaps, and the detection accuracy is poor. occured. Therefore, the methods shown in Patent Documents 1 and 2 could not be adopted as they are.
 ところで、特許文献3に示すような、組電池を構成する電池セルの各電圧を検出する監視ICは、差動増幅回路とAD変換機器を監視IC内で一体化し、トータル誤差を校正や補正により抑制しているため、検出精度が良いことが知られている。そこで、次に、この監視ICを流用して、各印加電圧を検出することが考えられていた。 By the way, as shown in Patent Document 3, the monitoring IC that detects each voltage of the battery cells constituting the assembled battery integrates the differential amplifier circuit and the AD conversion device in the monitoring IC, and calibrates or corrects the total error. It is known that the detection accuracy is good because it is suppressed. Therefore, next, it has been considered to divert this monitoring IC to detect each applied voltage.
[規則91に基づく訂正 24.03.2021] 
特開2013-162639号公報 特開2009-236711号公報 特許第5783197号公報
[Correction under Rule 91 24.03.2021]
Japanese Unexamined Patent Publication No. 2013-162639 Japanese Unexamined Patent Publication No. 2009-236711 Japanese Patent No. 5783197
 ところが、この監視ICは、直列接続された各電池セルの電圧を測定することに特化して開発されている。具体的には、監視ICの各入力チャネルには、電位の大小が順番となって電圧が印加されることを想定しており、同電位の電圧が入力されることを想定していない。このため、監視ICに、同電位となる複数の印加電圧を検出させると、監視ICの内外に設けられた保護ダイオードを介して電流が回り込み、値が変動し、検出精度が悪化するという問題が生じた。 However, this monitoring IC has been developed specifically for measuring the voltage of each battery cell connected in series. Specifically, it is assumed that the voltage is applied to each input channel of the monitoring IC in the order of the magnitude of the potential, and it is not assumed that the voltage of the same potential is input. Therefore, when the monitoring IC detects a plurality of applied voltages having the same potential, the current wraps around through the protection diodes provided inside and outside the monitoring IC, the value fluctuates, and the detection accuracy deteriorates. occured.
 本開示は、上記事情に鑑みてなされたものであり、その主たる目的は、複数の印加電圧を精度よく検出することができる電圧検出装置を提供することにある。 The present disclosure has been made in view of the above circumstances, and its main purpose is to provide a voltage detection device capable of accurately detecting a plurality of applied voltages.
 上記課題を解決するための手段は、蓄電池と、前記蓄電池に対して並列に接続され、前記蓄電池の端子間電圧がそれぞれ印加される複数のシステムと、を備えた電源システムに対して適用され、前記各システムに印加された印加電圧をそれぞれ検出する電圧検出装置において、前記各システムの前記印加電圧をそれぞれ2つの異なる分圧比で分圧する第1分圧回路と、前記各システムごとに入力チャネルが設定されており、前記第1分圧回路から前記入力チャネルを介して入力された2つの分圧電圧の差分に基づいて、前記各システムの前記印加電圧をそれぞれ検出する検出回路と、を備え、前記入力チャネルは、それぞれ1対の入力端子を有しており、前記第1分圧回路は、前記入力端子ごとに、段階的に異なる分圧比で前記印加電圧を分圧して、出力する。 The means for solving the above problems is applied to a power supply system including a storage battery and a plurality of systems connected in parallel to the storage battery and to which a voltage between terminals of the storage battery is applied. In the voltage detection device that detects the applied voltage applied to each system, the first voltage dividing circuit that divides the applied voltage of each system by two different voltage dividing ratios and the input channel for each system are provided. It is provided with a detection circuit that detects the applied voltage of each system based on the difference between the two voltage dividers input from the first voltage divider circuit via the input channel. Each of the input channels has a pair of input terminals, and the first voltage dividing circuit divides the applied voltage at a stepwise different voltage dividing ratio for each of the input terminals and outputs the voltage.
 これにより、各システムの印加電圧がほぼ同じであっても第1分圧回路によって、検出回路の各入力端子に入力される分圧電圧を段階的に高くすることが可能となる。このため、回り込み電流の発生を防止し、精度よく電圧を検出することができる。 As a result, even if the applied voltage of each system is almost the same, the voltage dividing voltage input to each input terminal of the detection circuit can be gradually increased by the first voltage dividing circuit. Therefore, it is possible to prevent the generation of wraparound current and detect the voltage with high accuracy.
 本開示についての上記目的およびその他の目的、特徴や利点は、添付の図面を参照しながら下記の詳細な記述により、より明確になる。その図面は、
図1は、電源システムの概略を示す回路図であり、 図2は、監視ICの概略を示す回路図であり、 図3は、従来の監視ICの概略を示す回路図であり、 図4は、回り込み電流を示す回路図であり、 図5は、電流の流れを示す回路図であり、 図6は、電流の流れを示す回路図であり、 図7は、電流の流れを示す回路図であり、 図8は、電流の流れを示す回路図であり、 図9は、電流の流れを示す回路図であり、 図10は、分圧電圧を示す図であり、 図11は、分圧電圧を示す図であり、 図12は、第2実施形態における監視ICの概略を示す回路図であり、 図13は、第3実施形態における監視ICの概略を示す回路図であり、 図14は、別例における監視ICの概略を示す回路図である。
The above objectives and other objectives, features and advantages of the present disclosure will be clarified by the following detailed description with reference to the accompanying drawings. The drawing is
FIG. 1 is a circuit diagram showing an outline of a power supply system. FIG. 2 is a circuit diagram showing an outline of the monitoring IC. FIG. 3 is a circuit diagram showing an outline of a conventional monitoring IC. FIG. 4 is a circuit diagram showing a wraparound current. FIG. 5 is a circuit diagram showing a current flow. FIG. 6 is a circuit diagram showing a current flow. FIG. 7 is a circuit diagram showing a current flow. FIG. 8 is a circuit diagram showing a current flow. FIG. 9 is a circuit diagram showing a current flow. FIG. 10 is a diagram showing a voltage dividing voltage. FIG. 11 is a diagram showing a voltage dividing voltage. FIG. 12 is a circuit diagram showing an outline of the monitoring IC according to the second embodiment. FIG. 13 is a circuit diagram showing an outline of the monitoring IC according to the third embodiment. FIG. 14 is a circuit diagram showing an outline of the monitoring IC in another example.
 以下、本開示にかかる「電圧検出装置」を具体化した各実施形態について、図面を参照しつつ説明する。なお、以下の各実施形態相互において、互いに同一もしくは均等である部分には、図中、同一符号を付しており、同一符号の部分についてはその説明を援用する。また、各実施形態及び変形例の説明において、明示している構成の組み合わせだけでなく、特に組み合わせに支障が生じなければ、各実施形態及び変形例を組み合わせることも可能である。 Hereinafter, each embodiment that embodies the "voltage detection device" according to the present disclosure will be described with reference to the drawings. In each of the following embodiments, parts that are the same or equal to each other are designated by the same reference numerals in the drawings, and the description thereof will be incorporated for the parts having the same reference numerals. Further, in the description of each embodiment and the modified example, not only the combination of the configurations specified clearly, but also each embodiment and the modified example can be combined as long as the combination does not cause any trouble.
 (第1実施形態)
 図1に示すように、電気自動車等の車両に適用される電源システムは、蓄電池としての組電池10と、機能群をまとめて構成された複数のシステム21,22と、組電池10と各システム21,22との間における電源経路23,24の通電及び通電遮断をそれぞれ切り替えるシステムスイッチ部としてのリレースイッチSN1,SP1,SN2,SP2と、各システム21,22への印加電圧を検出する電圧検出装置30と、を備える。
(First Embodiment)
As shown in FIG. 1, the power supply system applied to a vehicle such as an electric vehicle includes an assembled battery 10 as a storage battery, a plurality of systems 21 and 22 configured by grouping functional groups, an assembled battery 10 and each system. Relay switches SN1, SP1, SN2, SP2 as system switch units that switch between energization and de-energization of the power supply paths 23 and 24 between 21 and 22, and voltage detection that detects the voltage applied to each system 21 and 22 The device 30 is provided.
 組電池10は、複数の電池セルの直列接続体であり、組電池10の正極側端子10aと負極側端子10bとの間における端子間電圧が例えば100V以上の高電圧となる。組電池10は、回転機(モータジェネレータ)などの電気負荷の電源となったり、モータジェネレータの回生制御によって生成される電力を貯蔵したりする。なお、本実施形態では、電池セルとして、リチウムイオン2次電池を用いている。 The assembled battery 10 is a series connection of a plurality of battery cells, and the voltage between the terminals between the positive electrode side terminal 10a and the negative electrode side terminal 10b of the assembled battery 10 is, for example, a high voltage of 100 V or more. The assembled battery 10 serves as a power source for an electric load such as a rotating machine (motor generator), and stores electric power generated by regenerative control of the motor generator. In this embodiment, a lithium ion secondary battery is used as the battery cell.
 各システム21,22は、組電池10に対して並列に接続され、組電池10の端子間電圧がそれぞれ印加される。各システム21,22としては、例えば、インバータやモータからなる駆動系のシステムや、発電装置などからなる充電系のシステムなどがある。 The systems 21 and 22 are connected in parallel to the assembled battery 10, and the voltage between the terminals of the assembled battery 10 is applied to each of them. Examples of the systems 21 and 22 include a drive system including an inverter and a motor, a charging system including a power generation device, and the like.
 電源経路23,24は、各システム21,22ごとに設けられている。電源経路23,24には、組電池10の正極側端子10aに接続される正極側電源経路23a,24aと、組電池10の負極側端子10bに接続される負極側電源経路23b,24bと、が含まれる。 Power supply paths 23 and 24 are provided for each of the systems 21 and 22. The power supply paths 23 and 24 include positive electrode side power supply paths 23a and 24a connected to the positive electrode side terminal 10a of the assembled battery 10 and negative electrode side power supply paths 23b and 24b connected to the negative electrode side terminal 10b of the assembled battery 10. Is included.
 また、組電池10の正極側端子10aには、正極側電源経路11aが接続されており、組電池10の負極側端子10bには、負極側電源経路11bが接続されている。各電源経路11,23,24は、例えば、バスバーなどにより構成される。 Further, the positive electrode side power supply path 11a is connected to the positive electrode side terminal 10a of the assembled battery 10, and the negative electrode side power supply path 11b is connected to the negative electrode side terminal 10b of the assembled battery 10. Each power supply path 11, 23, 24 is composed of, for example, a bus bar or the like.
 リレースイッチSN1,SP1,SN2,SP2は、各システム21,22ごとに設けられている。リレースイッチSN1,SP1,SN2,SP2には、正極側電源経路23a,24aの通電及び通電遮断を切り替える正極側のリレースイッチSP1,SP2と、負極側電源経路23b,24bの通電及び通電遮断を切り替える負極側のリレースイッチSN1,SN2と、が含まれる。 Relay switches SN1, SP1, SN2, SP2 are provided for each of the systems 21 and 22. The relay switches SN1, SP1, SN2, SP2 switch between the positive electrode side relay switches SP1 and SP2 for switching the energization and energization cutoff of the positive electrode side power supply paths 23a and 24a and the negative electrode side power supply paths 23b and 24b for energization and energization cutoff. The relay switches SN1 and SN2 on the negative electrode side are included.
 リレースイッチSN1,SP1がオフ状態となることにより、システム21と組電池10との間が通電遮断状態となり、リレースイッチSN1,SP1がオン状態となることにより、システム21と組電池10との間が通電状態となる。同様に、リレースイッチSN2,SP2がオフ状態となることにより、システム22と組電池10との間が通電遮断状態となり、リレースイッチSN2,SP2がオン状態となることにより、システム22と組電池10との間が通電状態となる。 When the relay switches SN1 and SP1 are turned off, the power supply between the system 21 and the assembled battery 10 is cut off, and when the relay switches SN1 and SP1 are turned on, the space between the system 21 and the assembled battery 10 is turned on. Is energized. Similarly, when the relay switches SN2 and SP2 are turned off, the energization between the system 22 and the assembled battery 10 is cut off, and when the relay switches SN2 and SP2 are turned on, the system 22 and the assembled battery 10 are turned on. The space between and is energized.
 また、負極側のリレースイッチSN1,SN2には、それぞれ数MΩ程度の抵抗R61,R62が並列接続されている。これらの抵抗R61,R62が接続回路70に相当する。 Further, resistors R61 and R62 of about several MΩ are connected in parallel to the relay switches SN1 and SN2 on the negative electrode side, respectively. These resistors R61 and R62 correspond to the connection circuit 70.
 電圧検出装置30は、各システム21,22の印加電圧をそれぞれ2つの異なる分圧比で分圧する第1分圧回路40と、第1分圧回路40から入力チャネルCH1,CH3,CH5を介して入力された2つの分圧電圧の差分に基づいて、印加電圧をそれぞれ検出する検出回路としての監視IC50と、組電池10の端子間電圧を分圧する第2分圧回路60と、を備える。 The voltage detection device 30 inputs the applied voltage of each system 21 and 22 from the first voltage dividing circuit 40 and the first voltage dividing circuit 40 via the input channels CH1, CH3 and CH5. A monitoring IC 50 as a detection circuit for detecting each applied voltage based on the difference between the two divided voltages, and a second voltage dividing circuit 60 for dividing the voltage between the terminals of the assembled battery 10 are provided.
 第1分圧回路40は、スイッチSW0と抵抗R10,R20,R30から構成される第1直列接続体と、スイッチSW1と抵抗R11,R21,R31から構成される第2直列接続体と、スイッチSW2と抵抗R12,R22,R32から構成される第3直列接続体と、を有する。 The first voltage divider circuit 40 includes a first series connector composed of a switch SW0 and resistors R10, R20, R30, a second series connector composed of a switch SW1 and resistors R11, R21, R31, and a switch SW2. And a third series connector composed of resistors R12, R22, R32.
 第1直列接続体は、正極側電源経路11aと負極側電源経路11bとの間に設けられており、正極側電源経路11aから、スイッチSW0、抵抗R10、抵抗R20、抵抗R30の順番で直列に接続されている。そして、抵抗R20と抵抗R30との間の接続点P11は、監視IC50の低電位側入力端子S1と接続され、抵抗R10と抵抗R20との間の接続点P12は、監視IC50の高電位側入力端子V1と接続されている。 The first series connection body is provided between the positive electrode side power supply path 11a and the negative electrode side power supply path 11b, and is connected in series from the positive electrode side power supply path 11a in the order of switch SW0, resistor R10, resistor R20, and resistor R30. It is connected. The connection point P11 between the resistor R20 and the resistor R30 is connected to the low potential side input terminal S1 of the monitoring IC50, and the connection point P12 between the resistor R10 and the resistor R20 is the high potential side input of the monitoring IC50. It is connected to the terminal V1.
 これにより、スイッチSW0がオンされた場合、端子間電圧が第1の分圧比(R30/(R10+R20+R30))で分圧されて、入力端子S1に入力される。また、スイッチSW0がオンされた場合、端子間電圧が第2の分圧比((R30+R20)/(R10+R20+R30))で分圧されて、入力端子V1に入力される。なお、端子間電圧が第1の分圧比により分圧された分圧電圧を、分圧電圧DS1と示し、端子間電圧が第2の分圧比により分圧された分圧電圧を、分圧電圧DV1と示す場合がある。 As a result, when the switch SW0 is turned on, the voltage between the terminals is divided by the first voltage division ratio (R30 / (R10 + R20 + R30)) and input to the input terminal S1. When the switch SW0 is turned on, the voltage between the terminals is divided by the second voltage division ratio ((R30 + R20) / (R10 + R20 + R30)) and input to the input terminal V1. The voltage dividing voltage in which the terminal voltage is divided by the first voltage dividing ratio is indicated as the voltage dividing voltage DS1, and the voltage dividing voltage in which the terminal voltage is divided by the second voltage dividing ratio is referred to as the voltage dividing voltage. It may be indicated as DV1.
 また、接続点P11と低電位側入力端子S1との間の電気経路と、接続点P12と高電位側入力端子V1との間の電気経路との間には、図2等に示すように、保護素子やフィルタが設けられている。例えば、低電位側入力端子S1の側から高電位側入力端子V1の側への電流の流れを許可するダイオードD11が設けられている。 Further, as shown in FIG. 2, between the electric path between the connection point P11 and the low potential side input terminal S1 and the electric path between the connection point P12 and the high potential side input terminal V1, as shown in FIG. Protective elements and filters are provided. For example, a diode D11 is provided that allows the flow of current from the low potential side input terminal S1 side to the high potential side input terminal V1 side.
 第2直列接続体は、システム21の正極側電源経路23aと負極側電源経路23bとの間に設けられており、正極側電源経路23aから、スイッチSW1、抵抗R11、抵抗R21、抵抗R31の順番で直列に接続されている。そして、抵抗R21と抵抗R31との間の接続点P13は、監視IC50の低電位側入力端子S3と接続され、抵抗R11と抵抗R21との間の接続点P14は、監視IC50の高電位側入力端子V3と接続されている。 The second series connection is provided between the positive electrode side power supply path 23a and the negative electrode side power supply path 23b of the system 21, and the switch SW1, the resistor R11, the resistor R21, and the resistor R31 are in this order from the positive electrode side power supply path 23a. Are connected in series with. The connection point P13 between the resistor R21 and the resistor R31 is connected to the low potential side input terminal S3 of the monitoring IC50, and the connection point P14 between the resistor R11 and the resistor R21 is the high potential side input of the monitoring IC50. It is connected to the terminal V3.
 これにより、リレースイッチSN1,SP1及びスイッチSW1がオンされた場合、システム21への印加電圧が第3の分圧比(R31/(R11+R21+R31))で分圧されて、入力端子S3に入力される。また、リレースイッチSN1,SP1及びスイッチSW1がオンされた場合、システム21への印加電圧が第4の分圧比((R31+R21)/(R11+R21+R31))で分圧されて、入力端子V3に入力される。 As a result, when the relay switches SN1 and SP1 and the switch SW1 are turned on, the voltage applied to the system 21 is divided by the third voltage division ratio (R31 / (R11 + R21 + R31)) and input to the input terminal S3. When the relay switches SN1, SP1 and the switch SW1 are turned on, the voltage applied to the system 21 is divided by the fourth voltage division ratio ((R31 + R21) / (R11 + R21 + R31)) and input to the input terminal V3. ..
 なお、システム21への印加電圧とは、組電池10の端子間電圧が印加されることにより、正極側電源経路23aと負極側電源経路23bとの間において実際に生じている電位差(電圧)のことである。また、システム21への印加電圧が第3の分圧比により分圧された分圧電圧を、分圧電圧DS3と示し、システム21への印加電圧が第4の分圧比により分圧された分圧電圧を、分圧電圧DV3と示す場合がある。 The voltage applied to the system 21 is the potential difference (voltage) actually generated between the positive electrode side power supply path 23a and the negative electrode side power supply path 23b due to the application of the voltage between the terminals of the assembled battery 10. That is. Further, the voltage dividing voltage in which the voltage applied to the system 21 is divided by the third voltage dividing ratio is indicated as the voltage dividing voltage DS3, and the voltage applied to the system 21 is divided by the fourth voltage dividing ratio. The voltage may be referred to as a voltage divider voltage DV3.
 また、接続点P13と低電位側入力端子S3との間の電気経路と、接続点P14と高電位側入力端子V3との間の電気経路との間には、図2等に示すように、保護素子やフィルタが設けられている。例えば、低電位側入力端子S3の側から高電位側入力端子V3の側への電流の流れを許可するダイオードD13が設けられている。 Further, as shown in FIG. 2, between the electric path between the connection point P13 and the low potential side input terminal S3 and the electric path between the connection point P14 and the high potential side input terminal V3, as shown in FIG. Protective elements and filters are provided. For example, a diode D13 that allows the flow of current from the side of the low potential side input terminal S3 to the side of the high potential side input terminal V3 is provided.
 第3直列接続体は、システム22の正極側電源経路24aと負極側電源経路24bとの間に設けられており、正極側電源経路24aから、スイッチSW2、抵抗R12、抵抗R22、抵抗R32の順番で直列に接続されている。そして、抵抗R22と抵抗R32との間の接続点P15は、監視IC50の低電位側入力端子S5と接続され、抵抗R12と抵抗R22との間の接続点P16は、監視IC50の高電位側入力端子V5と接続されている。 The third series connection is provided between the positive electrode side power supply path 24a and the negative electrode side power supply path 24b of the system 22, and the switch SW2, the resistor R12, the resistor R22, and the resistor R32 are in this order from the positive electrode side power supply path 24a. Are connected in series with. The connection point P15 between the resistor R22 and the resistor R32 is connected to the low potential side input terminal S5 of the monitoring IC50, and the connection point P16 between the resistor R12 and the resistor R22 is the high potential side input of the monitoring IC50. It is connected to terminal V5.
 これにより、リレースイッチSN2,SP2及びスイッチSW2がオンされた場合、システム22への印加電圧が第5の分圧比(R32/(R12+R22+R32))で分圧されて、入力端子S5に入力される。また、リレースイッチSN2,SP2及びスイッチSW2がオンされた場合、システム22への印加電圧が第6の分圧比((R32+R22)/(R12+R22+R32))で分圧されて、入力端子V5に入力される。 As a result, when the relay switches SN2 and SP2 and the switch SW2 are turned on, the voltage applied to the system 22 is divided by the fifth voltage division ratio (R32 / (R12 + R22 + R32)) and input to the input terminal S5. When the relay switches SN2 and SP2 and the switch SW2 are turned on, the voltage applied to the system 22 is divided by the sixth voltage division ratio ((R32 + R22) / (R12 + R22 + R32)) and input to the input terminal V5. ..
 なお、システム22への印加電圧とは、組電池10の端子間電圧が印加されることにより、正極側電源経路24aと負極側電源経路24bとの間において実際に生じている電位差(電圧)のことである。また、システム22への印加電圧が第5の分圧比により分圧された分圧電圧を、分圧電圧DS5と示し、システム22への印加電圧が第6の分圧比により分圧された分圧電圧を、分圧電圧DV5と示す場合がある。 The voltage applied to the system 22 is the potential difference (voltage) actually generated between the positive electrode side power supply path 24a and the negative electrode side power supply path 24b due to the application of the voltage between the terminals of the assembled battery 10. That is. Further, the voltage dividing voltage in which the voltage applied to the system 22 is divided by the fifth voltage dividing ratio is indicated as the voltage dividing voltage DS5, and the voltage applied to the system 22 is divided by the sixth voltage dividing ratio. The voltage may be referred to as a voltage divider voltage DV5.
 また、接続点P15と低電位側入力端子S5との間の電気経路と、接続点P16と高電位側入力端子V5との間の電気経路との間には、図2等に示すように、保護素子やフィルタが設けられている。例えば、低電位側入力端子S5の側から高電位側入力端子V5の側への電流の流れを許可するダイオードD15が設けられている。 Further, as shown in FIG. 2, between the electric path between the connection point P15 and the low potential side input terminal S5 and the electric path between the connection point P16 and the high potential side input terminal V5, as shown in FIG. Protective elements and filters are provided. For example, a diode D15 that allows the flow of current from the low potential side input terminal S5 side to the high potential side input terminal V5 side is provided.
 監視IC50は、図2に示すように、少なくとも6つの入力チャネルCH1~CH6を備えるものを使用しているが、入力チャネルCH6を含んだそれ以上の入力チャネルCHは、入力チャネルCH6と同様に入力端子を短絡処理しており、今回の電圧検出には利用していないため、以下の説明では入力チャネルCH1~CH6の範囲で記載する。各入力チャネルCH1~CH6は、それぞれ1対の入力端子(ピン端子)S1~S6,V1~V6を有する。1対の入力端子S1~S6,V1~V6には、高電位側入力端子V1~V6と、低電位側入力端子S1~S6が存在する。入力チャネルCH1~CH6は、番号の小さいものから順番に、すなわち、CH1→CH2→・・・→CH6の順番で整列して配置されている。また、各入力チャネルCH1~CH6において、低電位側入力端子S1~S6→高電位側入力端子V1~V6の順番で配列されている。したがって、入力端子S1~S6,V1~V6は、S1→V1→S2→V2→・・・→S6→V6の順番で整列して配置されている。 As shown in FIG. 2, the monitoring IC50 uses one having at least six input channels CH1 to CH6, but more input channel CHs including the input channel CH6 are input in the same manner as the input channel CH6. Since the terminals are short-circuited and are not used for the voltage detection this time, they will be described in the range of input channels CH1 to CH6 in the following description. Each input channel CH1 to CH6 has a pair of input terminals (pin terminals) S1 to S6 and V1 to V6, respectively. The pair of input terminals S1 to S6 and V1 to V6 have high potential side input terminals V1 to V6 and low potential side input terminals S1 to S6. The input channels CH1 to CH6 are arranged in order from the one with the smallest number, that is, in the order of CH1 → CH2 → ... → CH6. Further, in each of the input channels CH1 to CH6, the low potential side input terminals S1 to S6 → the high potential side input terminals V1 to V6 are arranged in this order. Therefore, the input terminals S1 to S6 and V1 to V6 are arranged in the order of S1 → V1 → S2 → V2 → ... → S6 → V6.
 そして、監視IC50は、マルチプレクサ51と、差動増幅回路52と、AD変換器53と、MOSFET等の半導体スイッチSW51~SW56と、を備えている。各入力端子S1~S6,V1~V6は、マルチプレクサ51を介して差動増幅回路52に接続されている。具体的には、各高電位側入力端子V1~V6は、マルチプレクサ51を介して差動増幅回路52の非反転入力端子側が接続され、各低電位側入力端子S1~S6は、マルチプレクサ51を介して差動増幅回路52の反転入力端子側が接続されている。 The monitoring IC 50 includes a multiplexer 51, a differential amplifier circuit 52, an AD converter 53, and semiconductor switches SW51 to SW56 such as MOSFETs. The input terminals S1 to S6 and V1 to V6 are connected to the differential amplifier circuit 52 via a multiplexer 51. Specifically, the high potential side input terminals V1 to V6 are connected to the non-inverting input terminal side of the differential amplifier circuit 52 via the multiplexer 51, and the low potential side input terminals S1 to S6 are connected via the multiplexer 51. The inverting input terminal side of the differential amplifier circuit 52 is connected.
 マルチプレクサ51は、各入力チャネルCH1~CH6の中から選択した入力チャネルCH1~CH6の入力端子S1~S6,V1~V6に入力されている電圧を、差動増幅回路52に出力する。 The multiplexer 51 outputs the voltage input to the input terminals S1 to S6 and V1 to V6 of the input channels CH1 to CH6 selected from the input channels CH1 to CH6 to the differential amplifier circuit 52.
 差動増幅回路52は、非反転入力端子と反転入力端子との間の電圧(電位差)を検出してアナログ信号としてAD変換器53に出力する。AD変換器53は、アナログ信号をデジタル信号に変換し、監視IC50が備える演算装置54に出力する。演算装置54は、入力した電位差(デジタル信号)に基づいて、組電池10の端子間電圧や、各システム21,22への印加電圧を算出する。 The differential amplifier circuit 52 detects the voltage (potential difference) between the non-inverting input terminal and the inverting input terminal and outputs it as an analog signal to the AD converter 53. The AD converter 53 converts the analog signal into a digital signal and outputs it to the arithmetic unit 54 included in the monitoring IC 50. The arithmetic unit 54 calculates the voltage between the terminals of the assembled battery 10 and the voltage applied to each of the systems 21 and 22 based on the input potential difference (digital signal).
 具体的には、演算装置54は、端子間電圧に対する第1分圧回路40の第1の分圧比(R30/(R10+R20+R30))、第2の分圧比((R30+R20)/(R10+R20+R30))、及び分圧電圧DS1と分圧電圧DV1との電位差に基づいて、端子間電圧を算出する。なお、本実施形態の監視IC50は、差動増幅回路52とAD変換器53を監視IC50内で一体化し、トータル誤差を校正や補正により抑制する。このため、端子間電圧を精度よく算出することができる。 Specifically, the arithmetic unit 54 has a first voltage dividing ratio (R30 / (R10 + R20 + R30)), a second voltage dividing ratio ((R30 + R20) / (R10 + R20 + R30)), and a voltage dividing circuit 40 of the first voltage dividing circuit 40 with respect to the voltage between terminals. The voltage between terminals is calculated based on the potential difference between the voltage dividing voltage DS1 and the voltage dividing voltage DV1. In the monitoring IC 50 of the present embodiment, the differential amplifier circuit 52 and the AD converter 53 are integrated in the monitoring IC 50, and the total error is suppressed by calibration or correction. Therefore, the voltage between terminals can be calculated accurately.
 同様に、演算装置54は、システム21への印加電圧に対する第1分圧回路40の第3の分圧比(R31/(R11+R21+R31))、第4の分圧比((R31+R21)/(R11+R21+R31))、及び分圧電圧DS3と分圧電圧DV3との電位差に基づいて、システム21への印加電圧を算出する。システム22への印加電圧の算出も同様である。なお、監視IC50に演算装置54を設ける必要はなく、外部装置に演算装置54を設けてもよい。 Similarly, the arithmetic unit 54 has a third voltage dividing ratio (R31 / (R11 + R21 + R31)), a fourth voltage dividing ratio ((R31 + R21) / (R11 + R21 + R31)) of the first voltage dividing circuit 40 with respect to the voltage applied to the system 21. And the voltage applied to the system 21 is calculated based on the potential difference between the voltage dividing voltage DS3 and the voltage dividing voltage DV3. The calculation of the voltage applied to the system 22 is the same. It is not necessary to provide the arithmetic unit 54 in the monitoring IC 50, and the arithmetic unit 54 may be provided in the external device.
 半導体スイッチSW51~SW56は、それぞれ隣り合う低電位側入力端子S1~S6との間で通電及び通電遮断を切り替える可能に設けられている。例えば、半導体スイッチSW51は、入力端子S1と入力端子S2との間に設けられ、それらの端子間を通電及び通電遮断を切り替え可能に構成されている。半導体スイッチSW52~SW56も同様である。 The semiconductor switches SW51 to SW56 are provided so as to be able to switch between energization and energization cutoff between the adjacent low potential side input terminals S1 to S6, respectively. For example, the semiconductor switch SW51 is provided between the input terminal S1 and the input terminal S2, and is configured to be able to switch between energization and energization cutoff between the terminals. The same applies to the semiconductor switches SW52 to SW56.
 また、半導体スイッチSW51~SW56には、それぞれダイオードD51~D56が並列に接続されている。ダイオードD51~D56は、半導体スイッチSW51~SW56の寄生ダイオードであってもよい。各ダイオードD51は、番号が小さい低電位側入力端子S1から番号の大きい低電位側入力端子S2の側への電流の流れを許可するように配置されている。ダイオードD52~D56も同様である。 Also, diodes D51 to D56 are connected in parallel to the semiconductor switches SW51 to SW56, respectively. The diodes D51 to D56 may be parasitic diodes of the semiconductor switches SW51 to SW56. Each diode D51 is arranged so as to allow current to flow from the low-potential side input terminal S1 having a small number to the low-potential side input terminal S2 having a large number. The same applies to the diodes D52 to D56.
 演算装置54は、上述した演算以外に、半導体スイッチSW51~SW56の切り替えや、マルチプレクサ51による入力チャネルCH1~CH6の選択を制御可能に構成されている。 The arithmetic unit 54 is configured to be able to control the switching of the semiconductor switches SW51 to SW56 and the selection of the input channels CH1 to CH6 by the multiplexer 51 in addition to the above-described arithmetic.
 第2分圧回路60は、正極側電源経路11aと負極側電源経路11bとの間で、スイッチSW3、抵抗R42及び抵抗R52が、この順番で直列接続されている。また、抵抗R41及び抵抗R51の直列接続体が、抵抗R42及び抵抗R52と平行となるように、その一端がスイッチSW3と抵抗R42との間に接続され、他端が負極側電源経路11bに接続されている。 In the second voltage dividing circuit 60, the switch SW3, the resistor R42, and the resistor R52 are connected in series in this order between the positive electrode side power supply path 11a and the negative electrode side power supply path 11b. Further, one end of the series connector of the resistor R41 and the resistor R51 is connected between the switch SW3 and the resistor R42 so as to be parallel to the resistor R42 and the resistor R52, and the other end is connected to the negative electrode side power supply path 11b. Has been done.
 抵抗R41と抵抗R51との間の接続点P21は、ダイオードD1を介して第1分圧回路40の抵抗R21と抵抗R31との間の接続点P13に接続されている。ダイオードD1は、第2分圧回路60の側から第1分圧回路40の側への電流の流れを許可するように接続されている。すなわち、スイッチSW3がオンされている場合、組電池10の端子間電圧が抵抗R41,R51に基づく第7の分圧比(R51/(R41+R51))により分圧され、ダイオードD1を介して接続点P13に印加可能に構成されている。なお、端子間電圧が第7の分圧比により分圧された分圧電圧を、分圧電圧DSmin3と示す場合がある。 The connection point P21 between the resistor R41 and the resistor R51 is connected to the connection point P13 between the resistor R21 and the resistor R31 of the first voltage dividing circuit 40 via the diode D1. The diode D1 is connected so as to allow the flow of current from the side of the second voltage divider circuit 60 to the side of the first voltage divider circuit 40. That is, when the switch SW3 is turned on, the voltage between the terminals of the assembled battery 10 is divided by the seventh voltage dividing ratio (R51 / (R41 + R51)) based on the resistors R41 and R51, and the connection point P13 is divided via the diode D1. It is configured to be applicable to. The voltage divider voltage obtained by dividing the voltage between terminals by the seventh voltage divider ratio may be referred to as the voltage divider voltage DSmin3.
 抵抗R42と抵抗R52との間の接続点P22は、ダイオードD2を介して第1分圧回路40の抵抗R22と抵抗R32との間の接続点P15に接続されている。ダイオードD2は、第2分圧回路60の側から第1分圧回路40の側への電流の流れを許可するように接続されている。すなわち、スイッチSW3がオンされている場合、組電池10の端子間電圧が抵抗R42,R52に基づく第8の分圧比(R52/(R42+R52))により分圧され、ダイオードD2を介して接続点P15に印加可能に構成されている。なお、端子間電圧が第8の分圧比により分圧された分圧電圧を、分圧電圧DSmin5と示す場合がある。 The connection point P22 between the resistor R42 and the resistor R52 is connected to the connection point P15 between the resistor R22 and the resistor R32 of the first voltage dividing circuit 40 via the diode D2. The diode D2 is connected so as to allow the flow of current from the side of the second voltage divider circuit 60 to the side of the first voltage divider circuit 40. That is, when the switch SW3 is turned on, the voltage between the terminals of the assembled battery 10 is divided by the eighth voltage dividing ratio (R52 / (R42 + R52)) based on the resistors R42 and R52, and the connection point P15 is divided via the diode D2. It is configured to be applicable to. The voltage divider voltage obtained by dividing the voltage between terminals by the eighth voltage divider ratio may be referred to as the voltage divider voltage DSmin5.
 ところで、監視IC50は、本来、図3に示すように、組電池を構成する各電池セルC11~C15の電圧を検出するために利用されるものである。なお、半導体スイッチSW51~SW55は、各電池セルC11~C15の均等化放電のために設けられているものである。つまり、監視IC50は、直列接続された電池セルC11~C15の電圧検出を前提に開発されている。このため、例えば、入力チャネルCH1~CH5ごとに電位が段階的に高くなることを前提に回路構成が設定されている。具体的には、入力端子S1→入力端子V1,S2→入力端子V2,S3→入力端子V3,S4→入力端子V4,S5→入力端子V5の順番で入力される電位が段階的に大きくなることを前提としている。 By the way, as shown in FIG. 3, the monitoring IC50 is originally used to detect the voltage of each battery cell C11 to C15 constituting the assembled battery. The semiconductor switches SW51 to SW55 are provided for equalization discharge of the battery cells C11 to C15. That is, the monitoring IC50 has been developed on the premise of detecting the voltage of the battery cells C11 to C15 connected in series. Therefore, for example, the circuit configuration is set on the premise that the potential increases stepwise for each of the input channels CH1 to CH5. Specifically, the potential input in the order of input terminal S1 → input terminal V1, S2 → input terminal V2, S3 → input terminal V3, S4 → input terminal V4, S5 → input terminal V5 gradually increases. Is assumed.
 したがって、同電位の電圧を検出させようとする場合、図4に示すように、組電池10の端子間電圧及びシステム21,22の印加電圧を、分圧回路を介して、各入力チャネルCH11,CH13,CH15に入力した場合、次のような問題がある。すなわち、各入力チャネルCH11,CH13,CH15に入力される電圧がほぼ同じである場合、図4に示す破線の矢印に示すように、監視IC50の外部に設けられたダイオードD11,D13、D15、又は監視IC50の内部の半導体スイッチSW51~SW56のダイオードD51~D56を介して、回り込み電流が発生する可能性がある。 Therefore, when trying to detect the voltage of the same potential, as shown in FIG. 4, the voltage between the terminals of the assembled battery 10 and the applied voltage of the systems 21 and 22 are set to each input channel CH11, via a voltage dividing circuit. When inputting to CH13 and CH15, there are the following problems. That is, when the voltages input to the input channels CH11, CH13, and CH15 are substantially the same, the diodes D11, D13, D15, or the diodes D11, D13, D15, or the diodes D11, D13, D15, provided outside the monitoring IC50, are provided as shown by the broken line arrows shown in FIG. A wraparound current may be generated via the diodes D51 to D56 of the semiconductor switches SW51 to SW56 inside the monitoring IC50.
 また、入力チャネルCH11への入力電圧が、入力チャネルCH13,CH15への入力電圧よりも大きい場合、回り込み電流が発生する可能性がある。また、リレースイッチSN1,SP1,SN2,SP2がオフされることにより、各システム21,22のいずれかの印加電圧がゼロとなった場合も、同様に回り込み電流が発生する可能性がある。これにより、電圧の検出誤差が生じるという問題がある。 Further, when the input voltage to the input channel CH11 is larger than the input voltage to the input channels CH13 and CH15, a wraparound current may occur. Further, when the relay switches SN1, SP1, SN2, and SP2 are turned off and the applied voltage of any of the systems 21 and 22 becomes zero, a wraparound current may be generated in the same manner. This causes a problem that a voltage detection error occurs.
 そこで、第1分圧回路40及び第2分圧回路60を設け、各分圧比を次に説明するように設定している。以下、詳しく説明する。 Therefore, the first voltage dividing circuit 40 and the second voltage dividing circuit 60 are provided, and each voltage dividing ratio is set as described below. The details will be described below.
 図1、図2に示すように、組電池10、システム21、22に対して、それぞれ入力チャネルCH1,CH3,CH5が設定されている。そして、第1分圧回路40は、前記入力チャネルCH1,CH3,CH5の各入力端子S1,V1,S3,V3,S5,V5ごとに、段階的に異なる分圧比で電圧を分圧して、出力するようにしている。より詳しくは、入力端子S1→V1→S3→V3→S5→V5の順番で、入力される電位が段階的に高くなるように、第1分圧回路40の各分圧比が設定されている。 As shown in FIGS. 1 and 2, input channels CH1, CH3, and CH5 are set for the assembled battery 10, the systems 21, and 22, respectively. Then, the first voltage dividing circuit 40 divides the voltage for each input terminal S1, V1, S3, V3, S5, V5 of the input channels CH1, CH3, CH5 in a stepwise different voltage dividing ratio, and outputs the voltage. I try to do it. More specifically, each voltage dividing ratio of the first voltage dividing circuit 40 is set so that the input potential increases stepwise in the order of input terminal S1 → V1 → S3 → V3 → S5 → V5.
 具体的に説明すると、第1分圧回路40において、入力チャネルCH1の高電位側入力端子V1に入力されうる分圧電圧DV1の第2の分圧比は、当該入力チャネルCH1の低電位側入力端子S1に入力されうる分圧電圧DS1の第1の分圧比よりも1段階大きく設定されている。入力チャネルCH3,CH5も同様に、第4の分圧比は、第3の分圧比よりも1段階大きく設定されており、第6の分圧比は、第5の分圧比よりも1段階大きく設定されている。 Specifically, in the first voltage dividing circuit 40, the second voltage dividing ratio of the voltage dividing voltage DV1 that can be input to the high potential side input terminal V1 of the input channel CH1 is the low potential side input terminal of the input channel CH1. It is set one step larger than the first voltage dividing ratio of the voltage dividing voltage DS1 that can be input to S1. Similarly, in the input channels CH3 and CH5, the fourth voltage division ratio is set one step larger than the third voltage division ratio, and the sixth voltage division ratio is set one step larger than the fifth voltage division ratio. ing.
 また、電圧検出に利用される入力チャネルCH1,CH3,CH5のうち、隣に設定されることとなる入力チャネルCH1と入力チャネルCH3との間、及び入力チャネルCH3と入力チャネルCH5との間で、入力される電位に予め決められた値以上の電位差が生じるように、段階的に分圧比が設定されている。すなわち、第1分圧回路40において、入力チャネルCH3の低電位側入力端子S3に入力されうる分圧電圧DS3の第3の分圧比は、入力チャネルCH1の高電位側入力端子V1に入力されうる分圧電圧DV1の第2の分圧比よりも1段階大きく設定されている。第5の分圧比も同様に、第4の分圧比よりも1段階大きく設定されている。 Further, among the input channels CH1, CH3, and CH5 used for voltage detection, between the input channel CH1 and the input channel CH3 to be set next to each other, and between the input channel CH3 and the input channel CH5, The voltage division ratio is set stepwise so that a potential difference of a predetermined value or more occurs in the input potential. That is, in the first voltage dividing circuit 40, the third voltage dividing ratio of the voltage dividing voltage DS3 that can be input to the low potential side input terminal S3 of the input channel CH3 can be input to the high potential side input terminal V1 of the input channel CH1. The voltage dividing voltage is set one step larger than the second voltage dividing ratio of the DV1. Similarly, the fifth voltage division ratio is set one step larger than the fourth voltage division ratio.
 すなわち、第1の分圧比(R30/(R10+R20+R30))<第2の分圧比(R(30+R20)/(R10+R20+R30))<第3の分圧比(R31/(R11+R21+R31))<第4の分圧比((R31+R21)/(R11+R21+R31))<第5の分圧比(R32/(R12+R22+R32))<第6の分圧比((R32+R22)/(R12+R22+R32))となるように各分圧比が段階的に設定されている。そして、各分圧比が段階的に設定されるように、各抵抗R10,R20,R30,R11,R21,R31,R12,R22,R32の値が設定されている。 That is, the first pressure dividing ratio (R30 / (R10 + R20 + R30)) <second pressure dividing ratio (R (30 + R20) / (R10 + R20 + R30)) <third pressure dividing ratio (R31 / (R11 + R21 + R31)) <fourth pressure dividing ratio ( Each voltage division ratio is set stepwise so that (R31 + R21) / (R11 + R21 + R31)) <fifth voltage division ratio (R32 / (R12 + R22 + R32)) <sixth voltage division ratio ((R32 + R22) / (R12 + R22 + R32)). There is. Then, the values of the resistors R10, R20, R30, R11, R21, R31, R12, R22, and R32 are set so that the voltage division ratios are set stepwise.
 また、各負極側電源経路11b,23b,24bに流れる電流によっては、電圧降下が生じる。例えば、組電池10を充電する場合、充電電流により、電圧降下が生じる。そこで、第1分圧回路40における第1の分圧比、第3の分圧比及び第5の分圧比は、負極側電源経路11b,23b,24bの電流量及びインピーダンスに基づいて算出される電圧降下量を考慮して設定されている。 Further, a voltage drop occurs depending on the current flowing in each of the negative electrode side power supply paths 11b, 23b, 24b. For example, when charging the assembled battery 10, a voltage drop occurs due to the charging current. Therefore, the first voltage dividing ratio, the third voltage dividing ratio, and the fifth voltage dividing ratio in the first voltage dividing circuit 40 are voltage drops calculated based on the current amount and impedance of the negative electrode side power supply paths 11b, 23b, and 24b. It is set in consideration of the amount.
 具体的には、負極側電源経路11b,23b,24bの電流量とのインピーダンスから、監視IC50の回路基準(N0)からの最大降下量N0max、N1max、N2maxをそれぞれ算出する。そして、最大降下量N0max<分圧電圧DS1、となるように第1の分圧比が設定されている。同様に、最大降下量N1max<分圧電圧DS3、となるように第3の分圧比が設定されている。同様に、最大降下量N2max<分圧電圧DS5、となるように第5の分圧比が設定されている。 Specifically, the maximum drop amounts N0max, N1max, and N2max from the circuit reference (N0) of the monitoring IC50 are calculated from the impedance with the current amounts of the negative electrode side power supply paths 11b, 23b, and 24b, respectively. Then, the first voltage dividing ratio is set so that the maximum drop amount N0max <voltage dividing voltage DS1. Similarly, the third voltage dividing ratio is set so that the maximum drop amount N1max <voltage dividing voltage DS3. Similarly, the fifth voltage dividing ratio is set so that the maximum drop amount N2max <voltage dividing voltage DS5.
 また、第2分圧回路60は、各システム21,22ごとに、段階的に異なる分圧比で端子間電圧を分圧するように構成されている。詳しくは、分圧電圧DSmin3の第7の分圧比(R51/(R41+R51))は、分圧電圧DS3の第3の分圧比(R31/(R11+R21+R31))よりも小さく、かつ、第1分圧回路40において当該第3の分圧比よりも1段階小さい第2の分圧比((R30+R20)/(R10+R20+R30))に比較して大きく設定されている。 Further, the second voltage dividing circuit 60 is configured to divide the voltage between terminals at stepwise different voltage dividing ratios for each of the systems 21 and 22. Specifically, the seventh voltage dividing ratio (R51 / (R41 + R51)) of the voltage dividing voltage DSmin3 is smaller than the third voltage dividing ratio (R31 / (R11 + R21 + R31)) of the voltage dividing voltage DS3, and the first voltage dividing circuit. At 40, it is set larger than the second voltage dividing ratio ((R30 + R20) / (R10 + R20 + R30)) which is one step smaller than the third voltage dividing ratio.
 また、分圧電圧DSmin5の第8の分圧比(R52/(R42+R52))は、分圧電圧DS5の第5の分圧比(R32/(R12+R22+R32))よりも小さく、かつ、第1分圧回路40において当該第5の分圧比よりも1段階小さい第4の分圧比((R31+R21)/(R11+R21+R31))に比較して大きく設定されている。 Further, the eighth voltage dividing ratio (R52 / (R42 + R52)) of the voltage dividing voltage DSmin5 is smaller than the fifth voltage dividing ratio (R32 / (R12 + R22 + R32)) of the voltage dividing voltage DS5, and the first voltage dividing circuit 40 Is set larger than the fourth voltage dividing ratio ((R31 + R21) / (R11 + R21 + R31)), which is one step smaller than the fifth voltage dividing ratio.
 そして、第2分圧回路60は、リレースイッチSN1,SP1,SN2,SP2により組電池10との通電が遮断されたシステム21,22が存在する場合、当該システム21,22に対して設定されている入力チャネルCH3,CH5の低電位側入力端子S3,S5に分圧電圧DSmin3,DSmin5を出力するように構成されている。 Then, the second voltage dividing circuit 60 is set for the systems 21 and 22 when there is a system 21 or 22 in which the energization with the assembled battery 10 is cut off by the relay switches SN1, SP1, SN2, SP2. It is configured to output the voltage dividing voltages DSmin3 and DSmin5 to the low potential side input terminals S3 and S5 of the input channels CH3 and CH5.
 具体的には、抵抗R41と抵抗R51との間の接続点P21を、ダイオードD1を介して第1分圧回路40の抵抗R21と抵抗R31との間の接続点P13に接続している。このため、第2分圧回路60は、システム21の印加電圧がゼロとなった場合、分圧電圧DS3もゼロとなるため、ダイオードD1を介して、分圧電圧DSmin3を低電位側入力端子S3に出力することとなる。同様に、抵抗R42と抵抗R52との間の接続点P22を、ダイオードD2を介して第1分圧回路40の抵抗R22と抵抗R32との間の接続点P15に接続している。このため、第2分圧回路60は、システム22の印加電圧がゼロとなった場合、ダイオードD2を介して、分圧電圧DSmin5を低電位側入力端子S5に出力することとなる。 Specifically, the connection point P21 between the resistor R41 and the resistor R51 is connected to the connection point P13 between the resistor R21 and the resistor R31 of the first voltage dividing circuit 40 via the diode D1. Therefore, in the second voltage dividing circuit 60, when the applied voltage of the system 21 becomes zero, the voltage dividing voltage DS3 also becomes zero, so that the voltage dividing voltage DSmin3 is input to the low potential side input terminal S3 via the diode D1. Will be output to. Similarly, the connection point P22 between the resistor R42 and the resistor R52 is connected to the connection point P15 between the resistor R22 and the resistor R32 of the first voltage dividing circuit 40 via the diode D2. Therefore, when the applied voltage of the system 22 becomes zero, the second voltage dividing circuit 60 outputs the voltage dividing voltage DSmin5 to the low potential side input terminal S5 via the diode D2.
 次に、図5~図9に基づいて電圧検出装置30の動作について説明する。 Next, the operation of the voltage detection device 30 will be described with reference to FIGS. 5 to 9.
 図5は、リレースイッチSN1,SP1,SN2,SP2がオンされた場合における電圧検出装置30の動作、及び電流の流れを示す図である。図5では、破線により、電流の流れを示す。 FIG. 5 is a diagram showing the operation of the voltage detection device 30 and the current flow when the relay switches SN1, SP1, SN2, and SP2 are turned on. In FIG. 5, the broken line shows the current flow.
 図5に示すように、入力端子S1には、端子間電圧が第1の分圧比により分圧された分圧電圧DS1が入力される。入力端子V1には、端子間電圧が第2の分圧比により分圧された分圧電圧DV1が入力される。入力端子S3には、システム21への印加電圧が第3の分圧比により分圧された分圧電圧DS3が入力される。入力端子V3には、システム21への印加電圧が第4の分圧比により分圧された分圧電圧DV3が入力される。入力端子S5には、システム22への印加電圧が第5の分圧比により分圧された分圧電圧DS5が入力される。入力端子V5には、システム22への印加電圧が第6の分圧比により分圧された分圧電圧DV5が入力される。そして、各分圧電圧の大小関係は、DS1<DV1<DS3<DV3<DS5<DV5となっている。 As shown in FIG. 5, a voltage dividing voltage DS1 in which the voltage between the terminals is divided by the first voltage dividing ratio is input to the input terminal S1. The voltage dividing voltage DV1 in which the voltage between the terminals is divided by the second voltage dividing ratio is input to the input terminal V1. The voltage divider voltage DS3 in which the voltage applied to the system 21 is divided by the third voltage divider ratio is input to the input terminal S3. The voltage dividing voltage DV3 in which the voltage applied to the system 21 is divided by the fourth voltage dividing ratio is input to the input terminal V3. The voltage divider voltage DS5 in which the voltage applied to the system 22 is divided by the fifth voltage divider ratio is input to the input terminal S5. The voltage dividing voltage DV5 in which the voltage applied to the system 22 is divided by the sixth voltage dividing ratio is input to the input terminal V5. The magnitude relationship of each voltage dividing voltage is DS1 <DV1 <DS3 <DV3 <DS5 <DV5.
 これにより、入力端子S1→入力端子V1→入力端子S3→入力端子V3→入力端子S5→入力端子V5の順番で段階的に入力される分圧電圧が高くなる。このため、ダイオードD11,D13,D15,D51,D53,D55を介して電流が回り込むことを防止できる。 As a result, the voltage dividing voltage that is input stepwise in the order of input terminal S1 → input terminal V1 → input terminal S3 → input terminal V3 → input terminal S5 → input terminal V5 increases. Therefore, it is possible to prevent the current from wrapping around through the diodes D11, D13, D15, D51, D53, and D55.
 したがって、監視IC50は、入力端子S1,V1に入力された2つの分圧電圧DS1,DV1に基づいて、端子間電圧を精度よく検出することができる。同様に、監視IC50は、入力端子S3,V3に入力された2つの分圧電圧DS3,DV3に基づいて、システム21への印加電圧を精度よく検出することができる。システム22への印加電圧も同様に精度よく検出できる。 Therefore, the monitoring IC50 can accurately detect the voltage between terminals based on the two voltage dividing voltages DS1 and DV1 input to the input terminals S1 and V1. Similarly, the monitoring IC 50 can accurately detect the voltage applied to the system 21 based on the two voltage dividing voltages DS3 and DV3 input to the input terminals S3 and V3. The voltage applied to the system 22 can be detected with high accuracy as well.
 なお、第2分圧回路60における第7の分圧比は、第1分圧回路40の第3の分圧比よりも小さく、端子間電圧とシステム21への印加電圧は、ほぼ同等である。このため、端子間電圧を第7の分圧比で分圧した分圧電圧DSmin3は、システム21への印加電圧を第3の分圧比で分圧した分圧電圧DS3よりも小さくなる。このため、第2分圧回路60からの分圧電圧DSmin3は、入力端子S3に入力されず、第1分圧回路40からの分圧電圧DS3が、入力端子S3に入力される。 The seventh voltage dividing ratio in the second voltage dividing circuit 60 is smaller than the third voltage dividing ratio in the first voltage dividing circuit 40, and the voltage between terminals and the voltage applied to the system 21 are almost the same. Therefore, the voltage dividing voltage DSmin3 obtained by dividing the voltage between terminals by the seventh voltage dividing ratio is smaller than the voltage dividing voltage DS3 obtained by dividing the voltage applied to the system 21 by the third voltage dividing ratio. Therefore, the voltage dividing voltage DSmin3 from the second voltage dividing circuit 60 is not input to the input terminal S3, and the voltage dividing voltage DS3 from the first voltage dividing circuit 40 is input to the input terminal S3.
 同様に、第2分圧回路60における第8の分圧比は、第1分圧回路40の第5の分圧比よりも小さく、端子間電圧とシステム22への印加電圧は、ほぼ同等である。このため、端子間電圧を第8の分圧比で分圧した分圧電圧DSmin5は、システム22への印加電圧を第5の分圧比で分圧した分圧電圧DS5よりも小さくなる。このため、第2分圧回路60からの分圧電圧DSmin5は、入力端子S5に入力されず、第1分圧回路40からの分圧電圧DS3が、入力端子S5に入力される。 Similarly, the eighth voltage dividing ratio in the second voltage dividing circuit 60 is smaller than the fifth voltage dividing ratio in the first voltage dividing circuit 40, and the voltage between terminals and the voltage applied to the system 22 are almost the same. Therefore, the voltage dividing voltage DSmin5 obtained by dividing the voltage between terminals by the eighth voltage dividing ratio is smaller than the voltage dividing voltage DS5 obtained by dividing the voltage applied to the system 22 by the fifth voltage dividing ratio. Therefore, the voltage dividing voltage DSmin5 from the second voltage dividing circuit 60 is not input to the input terminal S5, and the voltage dividing voltage DS3 from the first voltage dividing circuit 40 is input to the input terminal S5.
 図6は、リレースイッチSN1,SP1がオフされ、リレースイッチSN2,SP2がオンされた場合における電圧検出装置30の動作、及び電流の流れを示す図である。図5では、破線により、第1分圧回路40における電流を示す。また、一点鎖線により、第2分圧回路60における電流を示す。 FIG. 6 is a diagram showing the operation of the voltage detection device 30 and the current flow when the relay switches SN1 and SP1 are turned off and the relay switches SN2 and SP2 are turned on. In FIG. 5, the broken line indicates the current in the first voltage dividing circuit 40. Further, the alternate long and short dash line indicates the current in the second voltage dividing circuit 60.
 図6に示すように、入力端子S1には、端子間電圧が第1の分圧比により分圧された分圧電圧DS1が入力される。入力端子V1には、端子間電圧が第2の分圧比により分圧された分圧電圧DV1が入力される。入力端子S5には、システム22への印加電圧が第5の分圧比により分圧された分圧電圧DS5が入力される。入力端子V5には、システム22への印加電圧が第6の分圧比により分圧された分圧電圧DV5が入力される。 As shown in FIG. 6, a voltage dividing voltage DS1 in which the voltage between the terminals is divided by the first voltage dividing ratio is input to the input terminal S1. The voltage dividing voltage DV1 in which the voltage between the terminals is divided by the second voltage dividing ratio is input to the input terminal V1. The voltage divider voltage DS5 in which the voltage applied to the system 22 is divided by the fifth voltage divider ratio is input to the input terminal S5. The voltage dividing voltage DV5 in which the voltage applied to the system 22 is divided by the sixth voltage dividing ratio is input to the input terminal V5.
 一方、前提により組電池10からシステム21への通電は遮断されているため、システム21への印加電圧は0Vである。よって、第1分圧回路40による分圧電圧も0Vである。このため、第2分圧回路60による分圧電圧DSmin3は、0Vよりも高いので、一点鎖線に示すように、組電池10の正極側端子10a→スイッチSW3→抵抗R41→ダイオードD1→抵抗R31→抵抗R61→組電池10の負極側端子10bの経路に電流が流れる。 On the other hand, since the energization from the assembled battery 10 to the system 21 is cut off by the premise, the voltage applied to the system 21 is 0V. Therefore, the voltage dividing voltage by the first voltage dividing circuit 40 is also 0V. Therefore, since the voltage dividing voltage DSmin3 by the second voltage dividing circuit 60 is higher than 0V, as shown by the one-point chain line, the positive electrode side terminal 10a of the assembled battery 10 → switch SW3 → resistor R41 → diode D1 → resistor R31 → Resistance R61 → Current flows through the path of the negative electrode side terminal 10b of the assembled battery 10.
 これにより入力端子S3には、端子間電圧が第7の分圧比により分圧された分圧電圧DSmin3が入力される。入力端子V3には、ダイオードD13を介して、分圧電圧DSmin3が入力される。そして、各分圧電圧の大小関係は、DS1<DV1<DSmin3<DS5<DV5となっている。 As a result, the voltage dividing voltage DSmin3 in which the voltage between the terminals is divided by the seventh voltage dividing ratio is input to the input terminal S3. The voltage dividing voltage DSmin3 is input to the input terminal V3 via the diode D13. The magnitude relationship of each voltage dividing voltage is DS1 <DV1 <DSmin3 <DS5 <DV5.
 これにより、入力端子S1→入力端子V1→入力端子S3,V3→入力端子S5→入力端子V5の順番で段階的に入力される分圧電圧が高くなる。このため、ダイオードD11,D13,D15,D51,D53,D55を介して電流が回り込むことを防止できる。したがって、監視IC50は、端子間電圧及びシステム22への印加電圧を精度よく検出することができる。 As a result, the voltage dividing voltage that is input stepwise in the order of input terminal S1 → input terminal V1 → input terminal S3, V3 → input terminal S5 → input terminal V5 increases. Therefore, it is possible to prevent the current from wrapping around through the diodes D11, D13, D15, D51, D53, and D55. Therefore, the monitoring IC 50 can accurately detect the voltage between terminals and the voltage applied to the system 22.
 図7は、リレースイッチSN2,SP2がオフされ、リレースイッチSN1,SP1がオンされた場合における電圧検出装置30の動作、及び電流の流れを示す図である。図7では、破線により、第1分圧回路40における電流を示す。また、一点鎖線により、第2分圧回路60における電流を示す。 FIG. 7 is a diagram showing the operation of the voltage detection device 30 and the current flow when the relay switches SN2 and SP2 are turned off and the relay switches SN1 and SP1 are turned on. In FIG. 7, the broken line indicates the current in the first voltage dividing circuit 40. Further, the alternate long and short dash line indicates the current in the second voltage dividing circuit 60.
 図7に示すように、入力端子S1には、端子間電圧が第1の分圧比により分圧された分圧電圧DS1が入力される。入力端子V1には、端子間電圧が第2の分圧比により分圧された分圧電圧DV1が入力される。入力端子S3には、システム21への印加電圧が第3の分圧比により分圧された分圧電圧DS3が入力される。入力端子V3には、システム21への印加電圧が第4の分圧比により分圧された分圧電圧DV3が入力される。 As shown in FIG. 7, a voltage dividing voltage DS1 in which the voltage between the terminals is divided by the first voltage dividing ratio is input to the input terminal S1. The voltage dividing voltage DV1 in which the voltage between the terminals is divided by the second voltage dividing ratio is input to the input terminal V1. The voltage divider voltage DS3 in which the voltage applied to the system 21 is divided by the third voltage divider ratio is input to the input terminal S3. The voltage dividing voltage DV3 in which the voltage applied to the system 21 is divided by the fourth voltage dividing ratio is input to the input terminal V3.
 一方、前提により組電池10からシステム22への通電は遮断されているため、図6において説明した理由と同様の理由で、入力端子S5,V5には、端子間電圧が第8の分圧比により分圧された分圧電圧DSmin5が入力される。そして、各分圧電圧の大小関係は、DS1<DV1<DS3<DV3<DSmin5となっている。 On the other hand, since the energization from the assembled battery 10 to the system 22 is cut off by the premise, the voltage between the terminals S5 and V5 is divided by the eighth voltage division ratio for the same reason as described in FIG. The divided voltage divider voltage DSmin5 is input. The magnitude relationship of each voltage dividing voltage is DS1 <DV1 <DS3 <DV3 <DSmin5.
 これにより、入力端子S1→入力端子V1→入力端子S3→入力端子V3→入力端子S5,V5の順番で段階的に入力される分圧電圧が高くなる。このため、ダイオードD11,D13,D15,D51,D53,D55を介して電流が回り込むことを防止できる。したがって、監視IC50は、端子間電圧及びシステム22への印加電圧を精度よく検出することができる。 As a result, the voltage dividing voltage that is input stepwise in the order of input terminal S1 → input terminal V1 → input terminal S3 → input terminal V3 → input terminals S5 and V5 increases. Therefore, it is possible to prevent the current from wrapping around through the diodes D11, D13, D15, D51, D53, and D55. Therefore, the monitoring IC 50 can accurately detect the voltage between terminals and the voltage applied to the system 22.
 図8は、リレースイッチSN1,SP1,SN2,SP2がオンされ、スイッチSW0がオフ固着(オンできない)した場合における電圧検出装置30の動作、及び電流の流れを示す図である。図8では、破線により、電流の流れを示す。 FIG. 8 is a diagram showing the operation of the voltage detection device 30 and the current flow when the relay switches SN1, SP1, SN2, and SP2 are turned on and the switch SW0 is stuck off (cannot be turned on). In FIG. 8, the broken line shows the current flow.
 図8に示すように、入力端子S3には、システム21への印加電圧が第3の分圧比により分圧された分圧電圧DS3が入力される。入力端子V3には、システム21への印加電圧が第4の分圧比により分圧された分圧電圧DV3が入力される。入力端子S5には、システム22への印加電圧が第5の分圧比により分圧された分圧電圧DS5が入力される。入力端子V5には、システム22への印加電圧が第6の分圧比により分圧された分圧電圧DV5が入力される。一方、スイッチSW0は、オンできないため、入力端子S1、V1は、負極側電源経路11bと同電位、すなわち、0Vとなる。 As shown in FIG. 8, the voltage divider voltage DS3 in which the voltage applied to the system 21 is divided by the third voltage divider ratio is input to the input terminal S3. The voltage dividing voltage DV3 in which the voltage applied to the system 21 is divided by the fourth voltage dividing ratio is input to the input terminal V3. The voltage divider voltage DS5 in which the voltage applied to the system 22 is divided by the fifth voltage divider ratio is input to the input terminal S5. The voltage dividing voltage DV5 in which the voltage applied to the system 22 is divided by the sixth voltage dividing ratio is input to the input terminal V5. On the other hand, since the switch SW0 cannot be turned on, the input terminals S1 and V1 have the same potential as the negative electrode side power supply path 11b, that is, 0V.
 これにより、入力端子S1,V1(=0V)→入力端子S3→入力端子V3→入力端子S5→入力端子V5の順番で段階的に入力される分圧電圧が高くなる。このため、ダイオードD11,D13,D15,D51,D53,D55を介して電流が回り込むことを防止できる。したがって、監視IC50は、システム21,22への印加電圧を精度よく検出することができる。また、監視IC50は、スイッチSW0の故障を検知することができる。 As a result, the voltage dividing voltage that is input stepwise in the order of input terminal S1, V1 (= 0V) → input terminal S3 → input terminal V3 → input terminal S5 → input terminal V5 increases. Therefore, it is possible to prevent the current from wrapping around through the diodes D11, D13, D15, D51, D53, and D55. Therefore, the monitoring IC 50 can accurately detect the voltage applied to the systems 21 and 22. Further, the monitoring IC50 can detect a failure of the switch SW0.
 図9は、リレースイッチSN1,SP1,SN2,SP2がオフされた場合における電圧検出装置30の動作、及び電流の流れを示す図である。図9では、一点鎖線により、第2分圧回路60における電流を示す。 FIG. 9 is a diagram showing the operation of the voltage detection device 30 and the current flow when the relay switches SN1, SP1, SN2, and SP2 are turned off. In FIG. 9, the current in the second voltage dividing circuit 60 is shown by the alternate long and short dash line.
 図9に示すように、入力端子S1には、端子間電圧が第1の分圧比により分圧された分圧電圧DS1が入力される。入力端子V1には、端子間電圧が第2の分圧比により分圧された分圧電圧DV1が入力される。 As shown in FIG. 9, the voltage dividing voltage DS1 in which the voltage between the terminals is divided by the first voltage dividing ratio is input to the input terminal S1. The voltage dividing voltage DV1 in which the voltage between the terminals is divided by the second voltage dividing ratio is input to the input terminal V1.
 一方、前提により組電池10からシステム21,22への通電は遮断されているため、上述した理由と同様の理由で、入力端子S3,V3には、端子間電圧が第7の分圧比により分圧された分圧電圧DSmin3が入力される。また、入力端子S5,V5には、端子間電圧が第8の分圧比により分圧された分圧電圧DSmin5が入力される。そして、各分圧電圧の大小関係は、DS1<DV1<DSmin3<DSmin5となっている。 On the other hand, since the energization from the assembled battery 10 to the systems 21 and 22 is cut off by the premise, the voltage between the terminals S3 and V3 is divided by the seventh voltage dividing ratio for the same reason as described above. The compressed voltage divider voltage DSmin3 is input. Further, the voltage dividing voltage DSmin5 in which the voltage between the terminals is divided by the eighth voltage dividing ratio is input to the input terminals S5 and V5. The magnitude relationship of each voltage dividing voltage is DS1 <DV1 <DSmin3 <DSmin5.
 これにより、入力端子S1→入力端子V1→入力端子S3,V3→入力端子S5,V5の順番で段階的に入力される分圧電圧が高くなる。このため、ダイオードD11,D13,D15,D51,D53,D55を介して電流が回り込むことを防止できる。したがって、監視IC50は、端子間電圧を精度よく検出することができる。 As a result, the voltage dividing voltage that is input stepwise in the order of input terminal S1 → input terminal V1 → input terminal S3, V3 → input terminal S5, V5 increases. Therefore, it is possible to prevent the current from wrapping around through the diodes D11, D13, D15, D51, D53, and D55. Therefore, the monitoring IC 50 can accurately detect the voltage between terminals.
 第1実施形態の構成によれば、次のような効果を得ることができる。 According to the configuration of the first embodiment, the following effects can be obtained.
 第1分圧回路40は、入力端子S1,V1,S3,V3,S5,V6ごとに、段階的に異なる分圧比(第1の分圧比~第6の分圧比)で端子間電圧又はシステム21,22の印加電圧を分圧して、出力する。これにより、端子間電圧、及び各システム21,22の印加電圧がほぼ同じであっても第1分圧回路40によって、各入力端子S1,V1,S3,V3,S5,V6に入力される分圧電圧を段階的に高くすることが可能となる。したがって、図5に示すように、回り込み電流の発生を防止し、精度よく電圧を検出することができる。 In the first voltage dividing circuit 40, the voltage between terminals or the system 21 has a voltage dividing ratio (first voltage dividing ratio to sixth voltage dividing ratio) that is stepwise different for each input terminal S1, V1, S3, V3, S5, V6. , 22 The applied voltage is divided and output. As a result, even if the voltage between the terminals and the applied voltage of each system 21 and 22 are almost the same, the amount input to each input terminal S1, V1, S3, V3, S5, V6 by the first voltage dividing circuit 40. The pressure voltage can be increased stepwise. Therefore, as shown in FIG. 5, it is possible to prevent the generation of wraparound current and detect the voltage with high accuracy.
 第2分圧回路60は、システム21,22ごとに、段階的に異なる分圧比(第7の分圧比及び第8の分圧比)で端子間電圧を分圧する。そして、第2分圧回路60は、組電池10との通電が遮断されたシステム21,22が存在する場合、当該システム21,22に対して設定されている入力チャネルCH3,CH5に分圧電圧DSmin3,DSmin5を出力する。 The second voltage divider circuit 60 divides the voltage between terminals at stepwise different voltage divider ratios (seventh voltage divider ratio and eighth voltage divider ratio) for each of the systems 21 and 22. Then, in the second voltage dividing circuit 60, when there are systems 21 and 22 in which the energization with the assembled battery 10 is cut off, the voltage dividing voltage is applied to the input channels CH3 and CH5 set for the systems 21 and 22. Outputs DSmin3 and DSmin5.
 また、第2分圧回路60による第7の分圧比は、第1分圧回路40による第3の分圧比に比較して小さく、かつ、第3の分圧比よりも1段階小さい第2の分圧比に比較して大きく設定されている。これにより、分圧電圧の大小関係は、DV1<DSmin3<DS3となる。このため、図6に示すように、リレースイッチSN1,SP1がオフとなったときのみ、入力端子S3,V3に分圧電圧DSmin3が入力される。また、この場合に、入力端子V1に入力される分圧電圧DV1よりも、入力端子S3に入力される分圧電圧DSmin3のほうが大きくなるため、入力端子V1から入力端子S3への回り込み電流が発生することを防止できる。また、DSmin3<DS5となり、入力端子S3,V3に入力される分圧電圧DSmin3よりも、入力端子S5に入力される分圧電圧DS5のほうが大きくなるため、入力端子S3,V3から入力端子S5への回り込み電流が発生することを防止できる。 Further, the seventh voltage dividing ratio by the second voltage dividing circuit 60 is smaller than the third voltage dividing ratio by the first voltage dividing circuit 40, and the second voltage dividing ratio is one step smaller than the third voltage dividing ratio. It is set larger than the pressure ratio. As a result, the magnitude relationship of the voltage dividing voltage becomes DV1 <DSmin3 <DS3. Therefore, as shown in FIG. 6, the voltage dividing voltage DSmin3 is input to the input terminals S3 and V3 only when the relay switches SN1 and SP1 are turned off. Further, in this case, since the voltage dividing voltage DSmin3 input to the input terminal S3 is larger than the voltage dividing voltage DV1 input to the input terminal V1, a wraparound current from the input terminal V1 to the input terminal S3 is generated. Can be prevented. Further, DSmin3 <DS5, and the voltage dividing voltage DS5 input to the input terminal S5 is larger than the voltage dividing voltage DSmin3 input to the input terminals S3 and V3. Therefore, from the input terminals S3 and V3 to the input terminal S5. It is possible to prevent the wraparound current from being generated.
 同様に、図7に示すように、リレースイッチSN2,SP2がオフとなった場合にも、回り込み電流を防止できる。また、DSmin3<DSmin5であるため、図9に示すように、リレースイッチSN1,SP1,SN2,SP2が全てオフの場合であっても、入力チャネルCH1から入力チャネルCH3,SH5へ電流が回り込むことを防止することができる。 Similarly, as shown in FIG. 7, the wraparound current can be prevented even when the relay switches SN2 and SP2 are turned off. Further, since DSmin3 <DSmin5, as shown in FIG. 9, even when all the relay switches SN1, SP1, SN2, and SP2 are off, the current wraps around from the input channel CH1 to the input channels CH3 and SH5. Can be prevented.
 第1分圧回路40における第3の分圧比及び第5の分圧比は、電圧降下量を考慮して設定されている。具体的には、最大降下量N1max<分圧電圧DS3となるように第3の分圧比が設定されており、最大降下量N2max<分圧電圧DS5となるように第5の分圧比が設定されている。これにより、電圧降下が生じたとしても、負電圧が生じず、各入力端子S1,V1,S3,V3,S5,V6に入力される分圧電圧を段階的に高くすることが可能となり、回り込み電流を防止できる。 The third voltage dividing ratio and the fifth voltage dividing ratio in the first voltage dividing circuit 40 are set in consideration of the amount of voltage drop. Specifically, the third voltage dividing ratio is set so that the maximum drop amount N1max <voltage dividing voltage DS3, and the fifth voltage dividing ratio is set so that the maximum dropping amount N2max <voltage dividing voltage DS5. ing. As a result, even if a voltage drop occurs, no negative voltage is generated, and the voltage dividing voltage input to each input terminal S1, V1, S3, V3, S5, V6 can be gradually increased, resulting in wraparound. The current can be prevented.
 また、第1分圧回路40は、端子間電圧を2つの異なる分圧比で分圧し、監視IC50は、組電池10に対して設定された入力チャネルCH1を介して、2つの分圧電圧DS1,DV1を入力し、それらの分圧電圧DS1,DV1の差分に基づいて、端子間電圧を検出する。このため、印加電圧と、端子間電圧を検出する回路を共通化することができる。また、図8に示すように、スイッチSW0のオフ固着を検出することができる。 Further, the first voltage dividing circuit 40 divides the voltage between terminals by two different voltage dividing ratios, and the monitoring IC 50 has two voltage dividing voltages DS1 via the input channel CH1 set for the assembled battery 10. DV1 is input, and the voltage between terminals is detected based on the difference between the divided voltages DS1 and DV1. Therefore, the applied voltage and the circuit for detecting the voltage between terminals can be shared. Further, as shown in FIG. 8, it is possible to detect the off sticking of the switch SW0.
 監視IC50には、分圧電圧が入力されるため、耐圧を小さくすることができ、小型化できる。また、監視IC50の内部において、差動増幅回路52及びAD変換器53を一体化し、演算装置54は、誤差を補正しているため、検出精度を向上させることができる。また、組電池の電池セルの電圧検出に利用される監視IC50をそのまま採用することができるため、開発コストを抑えることができる。 Since the voltage dividing voltage is input to the monitoring IC50, the withstand voltage can be reduced and the size can be reduced. Further, since the differential amplifier circuit 52 and the AD converter 53 are integrated inside the monitoring IC 50 and the arithmetic unit 54 corrects the error, the detection accuracy can be improved. Further, since the monitoring IC50 used for voltage detection of the battery cell of the assembled battery can be adopted as it is, the development cost can be suppressed.
 第1の分圧比~第6の分圧比は、段階的に設定されている。また、第7の分圧比は、第2の分圧比と第3の分圧比との間に設定されており、第8の分圧比は、第4の分圧比と第5の分圧比との間に設定されている。これにより、図10に示すように、各分圧電圧は段階的に電位が高くなる。つまり、DS1<DV1<DSimn3<DS3<DV3<DSimn5<DS5<DV5となっている。これにより、リレースイッチSN1,SP1,SN2,SP2のオンオフ状態にかかわらず、入力端子S1,V1,S3,V3,S5,V5に入力される分圧電圧をこの順番で段階的に高くすることができる。なお、図10では、印加電圧及び端子間電圧は、同じであることを前提としたときにおける各分圧電圧を図示したものである。 The first to sixth voltage division ratios are set in stages. Further, the seventh pressure division ratio is set between the second pressure division ratio and the third pressure division ratio, and the eighth pressure division ratio is between the fourth pressure division ratio and the fifth pressure division ratio. Is set to. As a result, as shown in FIG. 10, each voltage dividing voltage gradually increases in potential. That is, DS1 <DV1 <DSimn3 <DS3 <DV3 <DSimn5 <DS5 <DV5. As a result, the voltage dividing voltage input to the input terminals S1, V1, S3, V3, S5, and V5 can be gradually increased in this order regardless of the on / off state of the relay switches SN1, SP1, SN2, and SP2. can. In addition, in FIG. 10, each voltage dividing voltage is shown on the assumption that the applied voltage and the voltage between terminals are the same.
 しかしながら、回路公差や電流量によっては、各分圧電圧にずれが生じる可能性がある。そして、このずれが大きくなる場合、入力される分圧電圧の大小関係を維持することが難しくなる。そこで、第1実施形態の監視IC50では、図2に示すように、分圧電圧が入力される入力チャネルを、1つおきに設定した。つまり、分圧電圧DS5と分圧電圧DSmin5との間、分圧電圧DSmin5と分圧電圧DV3の間、分圧電圧DS3と分圧電圧DSmin3との間、及び分圧電圧DSmin3と分圧電圧DV1の間にマージンを設けるため、入力チャネルCH2,CH4を読み捨てチャネルとして割り当てることとした。これにより、回路公差などにより、各分圧電圧にずれが生じたとしても、入力される分圧電圧の大小関係を維持することができ、回り込み電流を確実に防止できる。 However, depending on the circuit tolerance and the amount of current, there is a possibility that each voltage dividing voltage will deviate. When this deviation becomes large, it becomes difficult to maintain the magnitude relationship of the input voltage dividing voltage. Therefore, in the monitoring IC50 of the first embodiment, as shown in FIG. 2, every other input channel into which the voltage dividing voltage is input is set. That is, between the voltage dividing voltage DS5 and the voltage dividing voltage DSmin5, between the voltage dividing voltage DSmin5 and the voltage dividing voltage DV3, between the voltage dividing voltage DS3 and the voltage dividing voltage DSmin3, and between the voltage dividing voltage DSmin3 and the voltage dividing voltage DV1. In order to provide a margin between the two, input channels CH2 and CH4 are assigned as read-through channels. As a result, even if each voltage dividing voltage deviates due to a circuit tolerance or the like, the magnitude relationship of the input voltage dividing voltage can be maintained, and the wraparound current can be reliably prevented.
 (第2実施形態)
 上記第1実施形態の構成を、次の第2実施形態のように変更してもよい。以下、第2実施形態では、主に、上記各実施形態で説明した構成に対する相違部分について説明する。
(Second Embodiment)
The configuration of the first embodiment may be changed as in the following second embodiment. Hereinafter, in the second embodiment, differences from the configurations described in each of the above embodiments will be mainly described.
 第1実施形態において、第2分圧回路60は、印加電圧が0Vとなった場合、分圧電圧DSmin3,DSmin5をダイオードD1,D2を介して、入力端子S3,S5に入力するように構成されていた。しかしながら、実際に第2分圧回路60から入力端子S3,S5に入力される電圧は、ダイオードD1,D2の特性(順方向電圧降下)により、分圧電圧DSmin3,DSmin5よりも所定値Vf(Vfは一定値)だけ降下することがわかっている。このため、図11(a)に示すように、端子間電圧が所定値以下となった場合、DV1>DSmin3-Vfとなる可能性があり、この場合、回り込み電流が発生し、検出精度が悪化するという問題がある。 In the first embodiment, the second voltage dividing circuit 60 is configured to input the divided voltage DSmin3 and DSmin5 to the input terminals S3 and S5 via the diodes D1 and D2 when the applied voltage becomes 0V. Was there. However, the voltage actually input from the second voltage divider circuit 60 to the input terminals S3 and S5 is a predetermined value Vf (Vf) rather than the voltage divider voltages DSmin3 and DSmin5 due to the characteristics of the diodes D1 and D2 (forward voltage drop). Is known to drop by a certain value). Therefore, as shown in FIG. 11A, when the voltage between terminals becomes a predetermined value or less, DV1> DSmin3-Vf may occur. In this case, a wraparound current is generated and the detection accuracy deteriorates. There is a problem of doing.
 そこで、第2実施形態では、第2分圧回路の構成を変更している。以下、第2実施形態の第2分圧回路160について説明する。図12に示すように、抵抗R41と抵抗R51との間の接続点P21は、切替部としてのスイッチSD1を介して第1分圧回路40の抵抗R21と抵抗R31との間の接続点P13に接続されている。それとともに、接続点P21は、比較部としてのコンパレータCP1の非反転入力端子側が接続されている。 Therefore, in the second embodiment, the configuration of the second voltage divider circuit is changed. Hereinafter, the second voltage dividing circuit 160 of the second embodiment will be described. As shown in FIG. 12, the connection point P21 between the resistor R41 and the resistor R51 is connected to the connection point P13 between the resistor R21 and the resistor R31 of the first voltage dividing circuit 40 via the switch SD1 as a switching unit. It is connected. At the same time, the connection point P21 is connected to the non-inverting input terminal side of the comparator CP1 as a comparison unit.
 また、第2分圧回路160は、抵抗R71と抵抗R72との直列接続体を備え、当該直列接続体の一端は、システム21の正極側電源経路23aにおいてリレースイッチSP1よりもシステム21の側に接続され、他端は、組電池10の負極側電源経路11bに接続されている。そして、抵抗R71と抵抗R72との間の接続点P31は、コンパレータCP1の反転入力端子側が接続されている。つまり、コンパレータCP1の反転入力端子側には、正極側電源経路23aと負極側電源経路11bとの間における印加電圧を第9の分圧比(R72/(R71+R72))で分圧した分圧電圧DP1が入力されるようになっている。なお、第9の分圧比は、第7の分圧比よりも若干大きく設定されている。 Further, the second voltage dividing circuit 160 includes a series connection body of the resistor R71 and the resistance R72, and one end of the series connection body is closer to the system 21 than the relay switch SP1 in the positive electrode side power supply path 23a of the system 21. The other end is connected to the negative electrode side power supply path 11b of the assembled battery 10. The inverting input terminal side of the comparator CP1 is connected to the connection point P31 between the resistor R71 and the resistor R72. That is, on the inverting input terminal side of the comparator CP1, the voltage dividing voltage DP1 obtained by dividing the applied voltage between the positive electrode side power supply path 23a and the negative electrode side power supply path 11b by the ninth voltage dividing ratio (R72 / (R71 + R72)). Is to be entered. The ninth voltage division ratio is set to be slightly larger than the seventh voltage division ratio.
 そして、コンパレータCP1は、入力した分圧電圧DSmin3と分圧電圧DP1とを比較し、分圧電圧DSmin3のほうが、分圧電圧DP1よりも大きいと判定した場合、スイッチSD1をオンするように構成されている。前述したように、第9の分圧比は、第7の分圧比よりも若干大きく設定されているため、リレースイッチSN1,SP1がオンされ、システム21に端子間電圧と同程度の印加電圧が印加されている場合、分圧電圧DSmin3<分圧電圧DP1となる。 Then, the comparator CP1 is configured to turn on the switch SD1 when the input voltage dividing voltage DSmin3 and the voltage dividing voltage DP1 are compared and it is determined that the voltage dividing voltage DSmin3 is larger than the voltage dividing voltage DP1. ing. As described above, since the ninth voltage dividing ratio is set to be slightly larger than the seventh voltage dividing ratio, the relay switches SN1 and SP1 are turned on, and an applied voltage equivalent to the voltage between terminals is applied to the system 21. If so, the voltage dividing voltage DSmin3 <the voltage dividing voltage DP1.
 一方で、リレースイッチSN1,SP1がオフされ、システム21への通電が遮断された場合、分圧電圧DSmin3>分圧電圧DP1となり、コンパレータCP1は、分圧電圧DSmin3のほうが、分圧電圧DP1よりも大きいと判定し、スイッチSD1をオンする。そして、スイッチSD1がオンされると、分圧電圧DSmin3が、入力端子S3に入力されることとなる。 On the other hand, when the relay switches SN1 and SP1 are turned off and the energization to the system 21 is cut off, the voltage dividing voltage DSmin3> the voltage dividing voltage DP1, and the comparator CP1 has a voltage dividing voltage DSmin3 that is higher than the voltage dividing voltage DP1. Is also large, and the switch SD1 is turned on. Then, when the switch SD1 is turned on, the voltage dividing voltage DSmin3 is input to the input terminal S3.
 また、図12に示すように、抵抗R42と抵抗R52との間の接続点P22は、切替部としてのスイッチSD2を介して第1分圧回路40の抵抗R22と抵抗R32との間の接続点P15に接続されている。それとともに、接続点P22は、比較部としてのコンパレータCP2の非反転入力端子側が接続されている。 Further, as shown in FIG. 12, the connection point P22 between the resistor R42 and the resistor R52 is a connection point between the resistor R22 and the resistor R32 of the first voltage dividing circuit 40 via the switch SD2 as a switching unit. It is connected to P15. At the same time, the connection point P22 is connected to the non-inverting input terminal side of the comparator CP2 as a comparison unit.
 また、第2分圧回路160は、抵抗R73と抵抗R74との直列接続体を備え、当該直列接続体の一端は、システム22の正極側電源経路24aにおいてリレースイッチSP2よりもシステム22の側に接続され、他端は、組電池10の負極側電源経路11bに接続されている。そして、抵抗R73と抵抗R74との間の接続点P32は、コンパレータCP2の反転入力端子側が接続されている。つまり、コンパレータCP2の反転入力端子側には、正極側電源経路24aと負極側電源経路11bとの間における印加電圧を第10の分圧比(R74/(R73+R74))で分圧した分圧電圧DP2が入力されるようになっている。なお、第10の分圧比は、第8の分圧比よりも若干大きく設定されている。 Further, the second voltage dividing circuit 160 includes a series connection body of the resistor R73 and the resistor R74, and one end of the series connection body is closer to the system 22 than the relay switch SP2 in the positive electrode side power supply path 24a of the system 22. The other end is connected to the negative electrode side power supply path 11b of the assembled battery 10. The inverting input terminal side of the comparator CP2 is connected to the connection point P32 between the resistor R73 and the resistor R74. That is, on the inverting input terminal side of the comparator CP2, the voltage dividing voltage DP2 obtained by dividing the applied voltage between the positive electrode side power supply path 24a and the negative electrode side power supply path 11b by the tenth voltage dividing ratio (R74 / (R73 + R74)). Is to be entered. The tenth voltage division ratio is set to be slightly larger than the eighth voltage division ratio.
 そして、コンパレータCP2は、入力した分圧電圧DSmin5と分圧電圧DP2とを比較し、分圧電圧DSmin5のほうが、分圧電圧DP2よりも大きいと判定した場合、スイッチSD2をオンするように構成されている。 Then, the comparator CP2 is configured to turn on the switch SD2 when the input voltage dividing voltage DSmin5 and the voltage dividing voltage DP2 are compared and it is determined that the voltage dividing voltage DSmin5 is larger than the voltage dividing voltage DP2. ing.
 前述同様、リレースイッチSN2,SP2がオフされ、システム22への通電が遮断された場合、分圧電圧DSmin5>分圧電圧DP2となり、コンパレータCP2は、スイッチSD2をオンする。そして、スイッチSD2がオンされると、分圧電圧DSmin5が、入力端子S5に入力されることとなる。 Similar to the above, when the relay switches SN2 and SP2 are turned off and the energization to the system 22 is cut off, the voltage dividing voltage DSmin5> the voltage dividing voltage DP2, and the comparator CP2 turns on the switch SD2. Then, when the switch SD2 is turned on, the voltage dividing voltage DSmin5 is input to the input terminal S5.
 上記第2実施形態の構成によれば、以下の効果を得ることができる。 According to the configuration of the second embodiment, the following effects can be obtained.
 第2分圧回路160は、各システム21,22への印加電圧と、組電池10の端子間電圧との比較に基づいて、組電池10との通電が遮断されたシステム21,22が存在するか否かを判定する。具体的には、コンパレータCP1は、分圧電圧DSmin3と分圧電圧DP1とを比較し、分圧電圧DSmin3のほうが、分圧電圧DP1よりも大きいと判定した場合、スイッチSD1をオンする。そして、分圧電圧DP1は、システム21の正極側電源経路23aと組電池10の負極側端子10bとの間の電圧を、第9の分圧比で分圧したものである。このため、リレースイッチSN1,SP1がオフされれば、分圧電圧DP1もゼロとなるので、コンパレータCP1は、スイッチSD1をオンして、分圧電圧DSmin3を入力端子S3に入力することとなる。 In the second voltage dividing circuit 160, there are systems 21 and 22 in which the energization with the assembled battery 10 is cut off based on the comparison between the voltage applied to each system 21 and 22 and the voltage between the terminals of the assembled battery 10. Judge whether or not. Specifically, the comparator CP1 compares the voltage dividing voltage DSmin3 with the voltage dividing voltage DP1, and when it is determined that the voltage dividing voltage DSmin3 is larger than the voltage dividing voltage DP1, the switch SD1 is turned on. The voltage dividing voltage DP1 is obtained by dividing the voltage between the positive electrode side power supply path 23a of the system 21 and the negative electrode side terminal 10b of the assembled battery 10 by the ninth voltage dividing ratio. Therefore, if the relay switches SN1 and SP1 are turned off, the voltage dividing voltage DP1 also becomes zero, so that the comparator CP1 turns on the switch SD1 and inputs the voltage dividing voltage DSmin3 to the input terminal S3.
 以上により、図11(b)に示すように、リレースイッチSN1,SP1がオンされている場合には、第1分圧回路40による分圧電圧DS3が入力端子S3に入力され、常に、入力端子V1に入力される分圧電圧DV1よりも高くなる。一方、リレースイッチSN1,SP1がオフされている場合には、分圧電圧DSmin3が入力端子S3に入力される。このとき、ダイオードを介さずに入力端子S3に分圧電圧DSmin3がそのまま入力されるので、入力端子S3に入力される分圧電圧DSmin3は、常に、入力端子V1に入力される分圧電圧DV1よりも高くなる。以上により、回り込み電流を防止することができる。 As described above, as shown in FIG. 11B, when the relay switches SN1 and SP1 are turned on, the voltage dividing voltage DS3 by the first voltage dividing circuit 40 is input to the input terminal S3 and is always input terminal. It becomes higher than the voltage dividing voltage DV1 input to V1. On the other hand, when the relay switches SN1 and SP1 are turned off, the voltage dividing voltage DSmin3 is input to the input terminal S3. At this time, since the voltage dividing voltage DSmin3 is input to the input terminal S3 as it is without passing through the diode, the voltage dividing voltage DSmin3 input to the input terminal S3 is always from the voltage dividing voltage DV1 input to the input terminal V1. Will also be higher. As described above, the wraparound current can be prevented.
 なお、分圧電圧DSmin5も同様に、電圧降下することなく、入力端子S5に入力することができ、回り込み電流を防止できる。 Similarly, the voltage dividing voltage DSmin5 can be input to the input terminal S5 without a voltage drop, and a wraparound current can be prevented.
 (第3実施形態)
 上記第2実施形態の構成を、次の第3実施形態のように変更してもよい。以下、第2実施形態では、主に、上記各実施形態で説明した構成に対する相違部分について説明する。この第3実施形態では、第2実施形態の構成を基本構成として説明する。
(Third Embodiment)
The configuration of the second embodiment may be changed as in the following third embodiment. Hereinafter, in the second embodiment, differences from the configurations described in each of the above embodiments will be mainly described. In this third embodiment, the configuration of the second embodiment will be described as a basic configuration.
 上記第2実施形態において、コンパレータCP1,CP2は、各正極側電源経路23a,24aと組電池10の負極側端子10bとの間における各電圧の分圧電圧を入力し、システム21,22への通電が遮断されたか否かを判定していた。しかしながら、各正極側電源経路23a,24aと組電池10の負極側端子10bとの間における各電圧は、端子間電圧と同程度であり、抵抗R71~R74の耐圧を確保する必要がある。このため、抵抗R71~R74が大型化する虞があった。 In the second embodiment, the comparators CP1 and CP2 input the divided voltage of each voltage between the positive electrode side power supply paths 23a and 24a and the negative electrode side terminal 10b of the assembled battery 10, and input the voltage dividing voltage to the systems 21 and 22. It was determined whether or not the energization was cut off. However, each voltage between the positive electrode side power supply paths 23a and 24a and the negative electrode side terminal 10b of the assembled battery 10 is about the same as the voltage between the terminals, and it is necessary to secure the withstand voltage of the resistors R71 to R74. Therefore, there is a risk that the resistors R71 to R74 will become large.
 そこで、図13に示すように、第3実施形態の第2分圧回路260では、第1分圧回路40における抵抗R21と抵抗R31との接続点P13を、コンパレータCP1の非反転入力端子側に接続し、分圧電圧DS3が入力されるように構成している。これにより、コンパレータCP1は、分圧電圧DS3と、分圧電圧DSmin3とを比較し、分圧電圧DSmin3のほうが大きい場合、スイッチSD1をオンして、分圧電圧DSmin3を入力端子S3に入力することとなる。 Therefore, as shown in FIG. 13, in the second voltage dividing circuit 260 of the third embodiment, the connection point P13 between the resistor R21 and the resistor R31 in the first voltage dividing circuit 40 is set to the non-inverting input terminal side of the comparator CP1. It is connected so that the voltage dividing voltage DS3 is input. As a result, the comparator CP1 compares the voltage dividing voltage DS3 with the voltage dividing voltage DSmin3, and if the voltage dividing voltage DSmin3 is larger, the switch SD1 is turned on and the voltage dividing voltage DSmin3 is input to the input terminal S3. It becomes.
 そして、前述したように、第1分圧回路40の第3の分圧比は、第2分圧回路260の第7の分圧比よりも大きい。このため、リレースイッチSN1,SP1がオンされ、システム21に端子間電圧と同程度の電圧が印加されている場合、分圧電圧DSmin3のほうが小さいと判定される。一方、リレースイッチSN1,SP1がオフされ、システム21への通電が遮断されている場合、分圧電圧DSmin3のほうが大きいと判定され、スイッチSD1がオンされる。 Then, as described above, the third voltage dividing ratio of the first voltage dividing circuit 40 is larger than the seventh voltage dividing ratio of the second voltage dividing circuit 260. Therefore, when the relay switches SN1 and SP1 are turned on and a voltage similar to the voltage between terminals is applied to the system 21, it is determined that the voltage dividing voltage DSmin3 is smaller. On the other hand, when the relay switches SN1 and SP1 are turned off and the energization to the system 21 is cut off, it is determined that the voltage dividing voltage DSmin3 is larger, and the switch SD1 is turned on.
 以上により、リレースイッチSN1,SP1がオフされている場合には、分圧電圧DSmin3が入力端子S3に入力される。このとき、ダイオードを介さずに入力端子S3に分圧電圧DSmin3がそのまま入力されるので、入力端子S3に入力される分圧電圧DSmin3は、常に、入力端子V1に入力される分圧電圧DV1よりも高くなる。よって、回り込み電流を防止することができる。 As described above, when the relay switches SN1 and SP1 are turned off, the voltage dividing voltage DSmin3 is input to the input terminal S3. At this time, since the voltage dividing voltage DSmin3 is input to the input terminal S3 as it is without passing through the diode, the voltage dividing voltage DSmin3 input to the input terminal S3 is always from the voltage dividing voltage DV1 input to the input terminal V1. Will also be higher. Therefore, the wraparound current can be prevented.
 同様に、第1分圧回路40における抵抗R22と抵抗R32との接続点P15を、コンパレータCP2の非反転入力端子側に接続し、分圧電圧DS5が入力されるように構成している。これにより、リレースイッチSN2,SP2がオフされている場合には、分圧電圧DSmin5が入力端子S5に入力される。このとき、ダイオードを介さずに入力端子S3に分圧電圧DSmin5がそのまま入力されるので、入力端子S5に入力される分圧電圧DSmin5は、常に、入力端子V3に入力される分圧電圧よりも高くなる。よって、回り込み電流を防止することができる。 Similarly, the connection point P15 between the resistor R22 and the resistor R32 in the first voltage divider circuit 40 is connected to the non-inverting input terminal side of the comparator CP2 so that the voltage divider voltage DS5 is input. As a result, when the relay switches SN2 and SP2 are turned off, the voltage dividing voltage DSmin5 is input to the input terminal S5. At this time, since the voltage dividing voltage DSmin5 is input to the input terminal S3 as it is without passing through the diode, the voltage dividing voltage DSmin5 input to the input terminal S5 is always larger than the voltage dividing voltage input to the input terminal V3. It gets higher. Therefore, the wraparound current can be prevented.
 (変形例)
 ・上記第3実施形態において、コンパレータCP1は、分圧電圧DSmin3のほうが大きい場合、スイッチSD1をオンしている。この別例として、コンパレータCP1は、分圧電圧DSmin3のほうが、分圧電圧DS3に対して所定の閾値以上大きい場合、スイッチSD1をオンしてもよい。つまり、コンパレータCP1に不感帯やヒステリシスを設けてもよい。これにより、システム21の印加電圧が端子間電圧と同程度であり、かつ、第3の分圧比と第7の分圧比との差が小さくても、スイッチSD1が頻繁にオンオフされること(チャタリング)を防止し、ノイズを抑制することができる。また、コンパレータCP2も同様に構成してもよい。
(Modification example)
-In the third embodiment, the comparator CP1 turns on the switch SD1 when the voltage dividing voltage DSmin3 is larger. As another example of this, the comparator CP1 may turn on the switch SD1 when the voltage dividing voltage DSmin3 is larger than a predetermined threshold value with respect to the voltage dividing voltage DS3. That is, the comparator CP1 may be provided with a dead zone or hysteresis. As a result, even if the applied voltage of the system 21 is about the same as the voltage between terminals and the difference between the third voltage division ratio and the seventh voltage division ratio is small, the switch SD1 is frequently turned on and off (chattering). ) Can be prevented and noise can be suppressed. Further, the comparator CP2 may be configured in the same manner.
 ・上記実施形態において、監視IC50は、組電池10の端子間電圧を検出しなくてもよい。 -In the above embodiment, the monitoring IC 50 does not have to detect the voltage between the terminals of the assembled battery 10.
 ・上記実施形態では、分圧電圧を入力する(すなわち、電圧を検出させる)入力チャネルを1つおきに設定した。つまり、入力チャネルCH1,CH3,CH5を電圧検出用の入力チャネルとして設定した。この別例として、分圧電圧を入力する(すなわち、電圧を検出させる)入力チャネルを連続して設定してもよい。例えば、図14に示すように、入力チャネルCH1~CH3に分圧電圧を入力してもよい。これによれば、利用されない入力チャネルの数を減らすことができる。 -In the above embodiment, every other input channel for inputting the voltage dividing voltage (that is, detecting the voltage) is set. That is, the input channels CH1, CH3, and CH5 are set as input channels for voltage detection. As another example of this, the input channel for inputting the voltage dividing voltage (that is, detecting the voltage) may be continuously set. For example, as shown in FIG. 14, a voltage dividing voltage may be input to the input channels CH1 to CH3. This makes it possible to reduce the number of unused input channels.
 ・上記実施形態において、印加電圧を検出するシステムの数を任意に変更してもよい。 -In the above embodiment, the number of systems that detect the applied voltage may be arbitrarily changed.
 ・上記実施形態において、入力チャネルCH1において、組電池10の端子間電圧を検出したが、端子間電圧を検出させる入力チャネルを変更してもよい。 -In the above embodiment, the voltage between the terminals of the assembled battery 10 is detected in the input channel CH1, but the input channel for detecting the voltage between the terminals may be changed.
 本開示は、実施例に準拠して記述されたが、本開示は当該実施例や構造に限定されるものではないと理解される。本開示は、様々な変形例や均等範囲内の変形をも包含する。加えて、様々な組み合わせや形態、さらには、それらに一要素のみ、それ以上、あるいはそれ以下、を含む他の組み合わせや形態をも、本開示の範疇や思想範囲に入るものである。 Although this disclosure has been described in accordance with the examples, it is understood that the disclosure is not limited to the examples and structures. The present disclosure also includes various modifications and modifications within a uniform range. In addition, various combinations and forms, as well as other combinations and forms that include only one element, more, or less, are also within the scope of the present disclosure.

Claims (8)

  1.  蓄電池(10)と、前記蓄電池に対して並列に接続され、前記蓄電池の端子間電圧がそれぞれ印加される複数のシステム(21,22)と、を備えた電源システムに対して適用され、前記各システムに印加された印加電圧をそれぞれ検出する電圧検出装置(30)において、
     前記各システムの前記印加電圧をそれぞれ2つの異なる分圧比で分圧する第1分圧回路(40)と、
     前記各システムごとに入力チャネル(CH3,CH5)が設定されており、前記第1分圧回路から前記入力チャネルを介して入力された2つの分圧電圧の差分に基づいて、前記各システムの前記印加電圧をそれぞれ検出する検出回路(50)と、を備え、
     前記入力チャネルは、それぞれ1対の入力端子(S3,V3,S5,V5)を有しており、
     前記第1分圧回路は、前記入力端子ごとに、段階的に異なる分圧比で前記印加電圧を分圧して、出力する電圧検出装置。
    It is applied to a power supply system including a storage battery (10) and a plurality of systems (21, 22) connected in parallel to the storage battery and to which a voltage between terminals of the storage battery is applied, respectively. In the voltage detection device (30) that detects each applied voltage applied to the system,
    A first voltage divider circuit (40) that divides the applied voltage of each system at two different voltage divider ratios, and
    Input channels (CH3, CH5) are set for each of the systems, and based on the difference between the two voltage dividers input from the first voltage divider circuit via the input channel, the voltage dividers of the systems are said to be the same. A detection circuit (50) for detecting each applied voltage is provided.
    Each of the input channels has a pair of input terminals (S3, V3, S5, V5).
    The first voltage dividing circuit is a voltage detecting device that divides and outputs the applied voltage at a voltage dividing ratio that is stepwise different for each input terminal.
  2.  前記蓄電池の前記端子間電圧を分圧する第2分圧回路(60)を備え、
     前記第2分圧回路は、前記各システムごとに、段階的に異なる分圧比で前記端子間電圧を分圧するとともに、システムスイッチ部(SN1,SP1、SN2,SP2)により前記蓄電池との通電が遮断された前記システムが存在する場合、当該システムに対して設定されている前記入力チャネルに前記分圧電圧を出力する請求項1に記載の電圧検出装置。
    A second voltage dividing circuit (60) for dividing the voltage between the terminals of the storage battery is provided.
    The second voltage divider circuit divides the voltage between the terminals at stepwise different voltage divider ratios for each system, and the system switch units (SN1, SP1, SN2, SP2) cut off the energization with the storage battery. The voltage detection device according to claim 1, wherein when the system is present, the voltage dividing voltage is output to the input channel set for the system.
  3.  前記1対の入力端子には、高電位側入力端子(V3,V5)と、低電位側入力端子(S3,S5)と、があり、
     前記第2分圧回路によって前記入力チャネルに出力される分圧電圧の分圧比は、前記第1分圧回路によって当該入力チャネルの高電位側入力端子に入力される分圧電圧の分圧比よりも1段階大きい分圧比に比較して小さく、かつ、前記第1分圧回路において当該入力チャネルの低電位側入力端子に入力される分圧電圧の分圧比よりも1段階小さい分圧比に比較して大きく設定されている請求項2に記載の電圧検出装置。
    The pair of input terminals includes a high potential side input terminal (V3, V5) and a low potential side input terminal (S3, S5).
    The voltage dividing ratio of the voltage dividing voltage output to the input channel by the second voltage dividing circuit is larger than the voltage dividing ratio of the voltage dividing voltage input to the high potential side input terminal of the input channel by the first voltage dividing circuit. Compared to the voltage divider ratio that is one step larger than the voltage divider ratio and that is one step smaller than the voltage divider ratio of the voltage divider voltage input to the low potential side input terminal of the input channel in the first voltage divider circuit. The voltage detection device according to claim 2, which is largely set.
  4.  前記第2分圧回路は、前記各システムへの印加電圧と、前記端子間電圧との比較に基づいて、前記システムスイッチ部により前記蓄電池との通電が遮断された前記システムが存在するか否かを判定する請求項2又は3に記載の電圧検出装置。 In the second voltage dividing circuit, based on the comparison between the voltage applied to each system and the voltage between the terminals, whether or not the system exists in which the energization with the storage battery is cut off by the system switch unit. The voltage detection device according to claim 2 or 3.
  5.  前記第2分圧回路は、
     前記第1分圧回路によって分圧された分圧電圧と、前記第2分圧回路によって分圧された分圧電圧との比較に基づいて、通電が遮断された前記システムが存在するか否かを判定する比較部(CP1,CP2)と、
     前記比較部によって通電が遮断された前記システムが存在すると判定された場合、前記第1分圧回路の代わりに前記第2分圧回路によって分圧された前記分圧電圧を前記入力チャネルに出力させる切替部(SD1,SD2)と、を有する請求項2又は3に記載の電圧検出装置。
    The second voltage divider circuit
    Whether or not the system in which the energization is cut off exists based on the comparison between the voltage divided voltage divided by the first voltage dividing circuit and the voltage divided voltage divided by the second voltage dividing circuit. Comparison units (CP1, CP2) that determine
    When it is determined by the comparison unit that the system whose energization is cut off exists, the voltage dividing voltage divided by the second voltage dividing circuit is output to the input channel instead of the first voltage dividing circuit. The voltage detection device according to claim 2 or 3, further comprising switching units (SD1, SD2).
  6.  前記比較部は、前記第2分圧回路から入力される分圧電圧のほうが、前記第1分圧回路から入力される分圧電圧よりも所定の閾値以上大きい場合に、通電が遮断された前記システムが存在すると判定する請求項5に記載の電圧検出装置。 In the comparison unit, when the voltage dividing voltage input from the second voltage dividing circuit is larger than the voltage dividing voltage input from the first voltage dividing circuit by a predetermined threshold value or more, the energization is cut off. The voltage detector according to claim 5, wherein the system is determined to exist.
  7.  前記第1分圧回路における分圧比は、電圧降下量を考慮して設定されている請求項1~6のうちいずれか1項に記載の電圧検出装置。 The voltage detection device according to any one of claims 1 to 6, wherein the voltage division ratio in the first voltage dividing circuit is set in consideration of a voltage drop amount.
  8.  前記第1分圧回路は、前記端子間電圧を2つの異なる分圧比で分圧し、
     前記検出回路は、前記蓄電池に対して設定された前記入力チャネル(CH1)を介して、前記第1分圧回路から2つの分圧電圧を入力し、それらの分圧電圧の差分に基づいて、前記端子間電圧を検出する請求項1~7のうちいずれか1項に記載の電圧検出装置。
    The first voltage divider circuit divides the voltage between the terminals by two different voltage dividing ratios.
    The detection circuit inputs two voltage dividing voltages from the first voltage dividing circuit via the input channel (CH1) set for the storage battery, and is based on the difference between the voltage dividing voltages. The voltage detection device according to any one of claims 1 to 7, which detects the voltage between terminals.
PCT/JP2021/010037 2020-03-30 2021-03-12 Voltage detection device WO2021200033A1 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0847251A (en) * 1994-07-29 1996-02-16 Internatl Business Mach Corp <Ibm> Switching regulator,information processor and its control method
JPH09200902A (en) * 1996-01-18 1997-07-31 Isuzu Motors Ltd Power supply unit for electric automobile
WO2007023849A1 (en) * 2005-08-25 2007-03-01 Matsushita Electric Industrial Co., Ltd. Voltage monitor and electric power storage using same

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5451504B2 (en) 2009-10-02 2014-03-26 パナソニック株式会社 Power distribution system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0847251A (en) * 1994-07-29 1996-02-16 Internatl Business Mach Corp <Ibm> Switching regulator,information processor and its control method
JPH09200902A (en) * 1996-01-18 1997-07-31 Isuzu Motors Ltd Power supply unit for electric automobile
WO2007023849A1 (en) * 2005-08-25 2007-03-01 Matsushita Electric Industrial Co., Ltd. Voltage monitor and electric power storage using same

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