WO2021180167A1

WO2021180167A1 - Compensation circuit, display module, and driving method therefor

Info

Publication number: WO2021180167A1
Application number: PCT/CN2021/080188
Authority: WO
Inventors: 李洪革; 巩鹏; 李新国; 吴晓
Original assignee: 京东方科技集团股份有限公司
Priority date: 2020-03-12
Filing date: 2021-03-11
Publication date: 2021-09-16
Also published as: CN111179842A; CN111179842B

Abstract

Provided in the present disclosure are a compensation circuit, a display module, and a driving method therefor, belonging to the technical field of display. The compensation circuit provided in the embodiments of the present disclosure comprises: a standard current module for acquiring display signals of multiple pixels, and outputting, at an output end, standard current corresponding to the display signals, wherein each of the multiple pixels comprises an organic light-emitting diode for emitting light; multiple sampling channels, wherein each sampling channel comprises multiple input ends and one output end, each of the input ends is used to acquire a sampling current of a pixel, and the sampling channels are used to independently control the connection and disconnection of the input ends and the output end thereof; and multiple comparison channels in one-to-one correspondence with the sampling channels, wherein each of the comparison channels is connected to an output end of the standard current module and an output end of the corresponding sampling channel, and the comparison channel is used to output a compensation signal at an output end thereof according to the difference between the received standard current and the sampling current.

Description

Compensation circuit, display module and driving method thereof

Technical field

The present disclosure belongs to the field of display technology, and specifically relates to a compensation circuit, a display module and a driving method thereof.

Background technique

Organic Light Emitting Diode (OLED) is a device that performs carrier injection and recombination of organic semiconductors and organic light-emitting materials under the action of an electric field to cause them to emit light. Correspondingly, OLED display technology has the characteristics of self-luminescence, wide viewing angle, short response time, high luminous efficiency, low operating voltage, thinness, large size, flexibility, etc., so it has been widely used, especially It is used in high-resolution displays.

In the pixels of the OLED display, the driving transistor needs to control the current to adjust the display brightness. But even under the same process, the threshold voltage, mobility and other electrical parameters of different driving transistors also have certain non-uniformities; moreover, in long-term use, the threshold voltage of the driving transistor will drift, resulting in different pixels. The brightness changes differently. Therefore, eliminating the change in brightness caused by the change in the threshold voltage of the driving transistor is very important for improving the display quality.

Summary of the invention

The present disclosure provides a compensation circuit, a display module and a driving method thereof that do not affect pixels and have a simple structure.

An aspect of the present disclosure provides a compensation circuit including:

The standard current module is used to obtain the display signals of a plurality of pixels, and output a standard current corresponding to the display signals at the output end; each of the plurality of pixels includes an organic light emitting diode for emitting light;

Multiple sampling channels, each sampling channel includes multiple input terminals and an output terminal, each input terminal is used to obtain the sampling current of a pixel, and the sampling channel is used to independently control the on-off of each input terminal and its output terminal ；

There are multiple comparison channels one-to-one corresponding to the sampling channels, each of the comparison channels is connected to the output terminal of the standard current module and the output terminal of the corresponding sampling channel, and the comparison channel is used for receiving the standard current and the sampling current according to the The compensation signal is output at its output terminal.

In some embodiments, each of the sampling channels includes multiple branches and one main path:

The first end of each branch is connected to an input end of the sampling channel, the second end is connected to the first end of the main circuit, and each branch is provided for controlling the on or off of the branch Branch switch; and

The second end of the main circuit is connected to the output end of the sampling channel, and the main circuit is provided with a main circuit switch for controlling the on or off of the main circuit.

In some embodiments, each of the multiple sampling channels has the same number of input terminals.

In some embodiments, the n-th branch switches in the multiple sampling channels are all connected to the same control signal terminal, where n is greater than or equal to 1 and less than or equal to N, and N is the multiple branches in each sampling channel. The number of switches.

In some embodiments, the standard current module includes a digital-to-analog conversion circuit, and the display signal is a digital signal.

In some embodiments, each of the comparison channels includes:

The current-voltage conversion unit is used to convert the sampling current into a sampling voltage, and convert the standard current into a standard voltage;

The voltage comparison unit is used to generate a compensation signal according to the difference between the sampled voltage and the standard voltage.

Optionally, the current-voltage conversion unit includes a comparison capacitor, the first pole of which is connected to the output terminal of the standard current module to be charged by the standard current for a predetermined time to generate a standard voltage, and the second pole is connected to the output of the corresponding sampling channel The terminal is charged with the sampled current for a predetermined time to generate a sampled voltage;

The voltage comparison unit includes a comparator connected to the first pole and the second pole of the comparison capacitor for outputting an effective comparison signal whose duration is proportional to the difference between the standard voltage and the sampled voltage.

In some embodiments, the voltage comparison unit further includes:

The counting circuit is used to count the duration of the effective comparison signal, and output a count value corresponding to the duration as a compensation signal.

Another aspect of the present disclosure provides a display module, which includes:

A plurality of pixels, each of the pixels includes an organic light emitting diode for emitting light;

A plurality of sampling lines, each sampling line is connected to at least one pixel for obtaining the sampling current of the pixel; and

Compensation circuit, the compensation circuit is any one of the above compensation circuits, and each input terminal of each sampling channel is connected to a sampling line.

In some embodiments, the display module further includes a driving chip, wherein:

The display module is a display module in which the above compensation circuit is connected to a driving chip, and the driving chip is used to generate a driving voltage for driving the pixel according to the display signal and the compensation signal of the pixel.

In some embodiments, a plurality of the pixels are arranged in an array; wherein each column of pixels is connected to the same sampling line, a sampling switch is arranged between each pixel and the sampling line, and the sampling switch of each row of pixels is controlled by the same control line .

In some embodiments, the display signal and the compensation signal are both digital signals, and the driving voltage output by the driving chip represents a gray scale value corresponding to the sum of the display signal and the compensation signal.

Another aspect of the present disclosure provides a method for driving a display module, wherein the display module is any of the above-mentioned display modules, and the driving method includes:

The compensation circuit obtains the display signal and the sampling current of the pixel, and generates the compensation signal of the pixel to compensate the display of the pixel.

In some embodiments, the display module is the above-mentioned display module with a driving chip;

For each frame of picture, the driving chip generates a driving voltage for driving the pixel according to the display signal of the pixel in the current frame and the compensation signal of the pixel in the previous frame.

In some embodiments, the compensation circuit acquiring the display signal and the sampling current of the pixel, and generating the compensation signal of the pixel includes:

At the same moment, one input terminal and output terminal of each sampling channel are turned on, so that the compensation circuit can obtain the display signal and sampling current of multiple pixels at the same time, and generate multiple compensation signals corresponding to multiple pixels.

At the same time, one input terminal and output terminal of only one sampling channel are turned on, so that the compensation circuit obtains the display signal and sampling current of the pixel, and generates a compensation signal corresponding to the pixel.

Description of the drawings

FIG. 1 is a schematic block diagram of the composition of a compensation circuit according to an embodiment of the disclosure;

2 is a schematic diagram of the circuit structure of a standard current module in a compensation circuit according to an embodiment of the disclosure;

3 is a schematic diagram of the circuit structure of multiple sampling channels in a compensation circuit according to an embodiment of the disclosure;

4 is a schematic diagram of the circuit structure of switches in multiple sampling channels in a compensation circuit according to an embodiment of the disclosure;

5 is a schematic block diagram of the composition of a sampling channel and a comparison channel in a compensation circuit according to an embodiment of the disclosure;

6 is a schematic structural diagram of a current-voltage conversion unit and a comparator in a compensation circuit according to an embodiment of the disclosure;

FIG. 7 is a timing diagram of an effective comparison signal generated by a comparator in a compensation circuit according to an embodiment of the disclosure; FIG.

FIG. 8 is a schematic diagram of a pixel distribution structure in a display module according to an embodiment of the disclosure;

9 is a schematic diagram of a circuit structure of a pixel circuit in a display module according to an embodiment of the disclosure;

10 is a schematic diagram of a sequence of input terminals that function in a Sense parallel mode in a display module driving method according to an embodiment of the disclosure;

FIG. 11 is a partial timing diagram of a Sense parallel mode in a display module driving method according to an embodiment of the disclosure; FIG.

FIG. 12 is a schematic diagram of a simulation time sequence of a Sense parallel mode in a display module driving method according to an embodiment of the disclosure; FIG.

FIG. 13 is a schematic diagram of the sequence of input terminals that function in the Caliber serial mode in a display module driving method according to an embodiment of the disclosure; FIG.

14 is a partial timing diagram of the Caliber serial mode in a display module driving method according to an embodiment of the disclosure;

FIG. 15 is a schematic diagram of a simulation timing sequence of the Caliber serial mode in a display module driving method according to an embodiment of the disclosure.

Detailed ways

In order to enable those skilled in the art to better understand the technical solutions of the present disclosure, the present disclosure will be further described in detail below with reference to the accompanying drawings and specific embodiments.

It can be understood that the specific embodiments and drawings described herein are only used to explain the present disclosure, but not to limit the present disclosure.

It can be understood that the embodiments in the present disclosure and the features in the embodiments can be combined with each other if there is no conflict.

It can be understood that, for ease of description, only the parts related to the present disclosure are shown in the drawings of the present disclosure, and the parts not related to the present disclosure are not shown in the drawings.

It is understandable that each unit and module involved in the embodiments of the present disclosure may correspond to only one physical structure, or may be composed of multiple physical structures, or multiple units and modules may also be integrated into one physical structure.

On the one hand, referring to FIGS. 1 to 7, embodiments of the present disclosure provide a compensation circuit for compensating pixels of an organic light emitting diode (OLED) display module.

Among them, each pixel (or sub-pixel) is the smallest unit that can be independently controlled for display (such as displaying monochrome content). In an organic light-emitting diode display module, each pixel includes a light-emitting (display ) Organic light-emitting diode, and the current in the organic light-emitting diode is controlled by the driving transistor in the pixel, that is, the driving transistor can control the light emission (or display) of the pixel, but when some of the electrical parameters of the driving transistor change due to threshold voltage drift, etc. , Will affect the display effect.

Among them, the specific form of the pixel circuit in each pixel will be described later.

The compensation circuit provided by the embodiments of the present disclosure determines the deviation of the electrical parameters such as the threshold voltage of the driving transistor according to the actual current in the pixel operation, and obtains the compensation signal for adjusting the display of the pixel.

1, the compensation circuit of the embodiment of the present disclosure includes a standard current module, multiple sampling channels, and multiple comparison channels.

Among them, the standard current module is used to obtain the display signal of the pixel, and output a standard current corresponding to the display signal at the output terminal.

The display signal is the original signal used to reflect the standard display brightness of the pixel (or the content that should be displayed), which can be provided by an external bus such as a graphics card; after the display signal enters the driver IC, it can be generated and used to actually provide the pixel The driving voltage (data voltage). In an example embodiment, the display signal may be a digital signal, for example, a digital signal representing a gray scale value.

The standard current module generates a corresponding standard current according to the display signal provided to each pixel; the standard current corresponds to the display signal, and the sampling current should be in the pixel without any deviation. That is to say, if the pixel does not need compensation, the sampling current should be equal to the standard current; and when the sampling current deviates from the standard current, the value of the deviation represents the degree of compensation that needs to be performed.

The compensation circuit has multiple sampling channels, each sampling channel corresponding to multiple pixels, used to obtain the sampling current collected from these pixels, and can independently control whether each sampling current can be output to the subsequent comparison channel.

Among them, each sampling channel includes a plurality of input terminals and an output terminal, each input terminal is used to obtain the sampling current of a pixel, and the sampling channel is used to independently control whether each input terminal is connected to its output terminal. Thus, it is possible to independently control whether each sampled current can be output to the subsequent comparison channel.

The comparison channel corresponds to the sampling channel one by one. Each comparison channel is connected to the output terminal of the standard current module and the output terminal of the corresponding sampling channel. The comparison channel is used to input the difference between the standard current and the sampling current at its output terminal. Output compensation signal.

The number of sampling channels and comparison channels is the same, and the sampling current output by each sampling channel is input to one comparison channel; at the same time, the standard current module can also output the standard current to the sampling channel; it should be understood that the standard input to the same sampling channel at the same time The current and sampling current should correspond to the same display signal of the same pixel.

Therefore, the comparison channel can compare the above sampled current with the standard current, determine the deviation (such as the deviation caused by the threshold voltage drift of the driving transistor) in the corresponding pixel, and generate the corresponding compensation signal. By applying the compensation signal, the sampling current in the pixel can be adjusted to the standard current corresponding to the display signal.

It can be seen that, in the embodiments of the present disclosure, the compensation circuit is a different structure independent of the pixel, that is, the compensation circuit can be located outside the pixel, so it does not affect the structure of the pixel, does not occupy the layout area of the display area, and does not cause resolution. Decrease of opening rate and opening rate.

At the same time, in the compensation circuit of the embodiment of the present disclosure, each channel used for actual detection (including the sampling channel and the comparison channel) is actually connected to multiple pixels (such as multiple pixels in a row). That is, by adopting the "channel multiplexing" method, one channel can obtain compensation signals corresponding to multiple pixels at different times, so that the number of channels (even the number of pixels in a row) can be much smaller than the number of pixels, which greatly simplifies The overall structure of the compensation circuit reduces its layout area.

Among them, the display signal is usually a digital signal (for example, a digital signal representing a gray scale value), so the corresponding standard current module can be a digital-to-analog conversion circuit (for example, a CDAC circuit) for converting the digital signal into a corresponding current signal.

Figure 2 shows the structure of an exemplary CDAC circuit. Referring to Figure 2, the CDAC circuit includes 8-level current shunts (first-level shunts to eighth-level shunts), each level of shunts has shunt transistors (such as MOS tubes), and the shunt transistors in each level of shunts The number is equal to the "number of stages" of this stage shunt. At the same time, all shunt transistors in each stage of shunt are applied with the same bias voltage, that is, one of VB1 to VB8 in FIG. 2. For example, apply bias voltage VB1 to all shunt transistors (1 shunt transistor) in the first-stage shunt, apply bias voltage VB2 to all shunt transistors (2 shunt transistors) in the second-stage shunt, and apply bias voltage VB2 to all shunt transistors (2 shunt transistors) in the second-stage shunt. All the shunt transistors (3 shunt transistors) in the three-stage shunt apply the bias voltage VB3, and so on.

Among them, the display signal DATA itself is a 10-bit (maximum 1024) digital signal, and the effective standard value is 8 bits (corresponding to 256 gray levels). The 10-bit display signal DATA can be converted into an 8-bit standard value in the converter first, and each bit of the above 8-bit standard value is a control signal in the figure, that is, in D(1) to D(8) one of. These control signals correspond to different shunt transistors. For example, D(8) corresponds to each shunt transistor of each level of shunt, D(7) starts from the second level of shunt and corresponds to each of the shunt transistors of each level of shunt, and so on . By presetting the width-to-length ratio of each shunt transistor, the input current can be divided into two different parts according to needs (ie, control signals). Therefore, the CDAC circuit as a whole can divide the input reference current I _REF to generate a binary weighted current, that is, generate a corresponding standard current I _DATA according to the 8-bit standard value of the display signal.

Of course, the standard current module can also adopt other known circuit forms, which will not be described in detail here.

In some embodiments, the number of input terminals in all sampling channels is the same.

For ease of implementation, usually the number of input terminals in all sampling channels can be the same. Hereinafter, description will be made by taking as an example that each compensation circuit is provided with 15 sampling channels, and each sampling channel has 16 input terminals. As shown in Figure 3, each compensation circuit is provided with 15 sampling channels, and each sampling channel corresponds to 16 pixels (such as 16 pixels in a row), so that each compensation circuit corresponds to 15*16=240 pixels ( Such as 240 pixels in a row).

In some embodiments, each sampling channel may include multiple branches and one main path. The first end of each branch is connected to an input end of the sampling channel, the second end is connected to the first end of the main circuit, and each branch is provided with a branch switch for controlling the on or off of the branch. The second end of the main circuit is connected to the output end of the sampling channel, and the main circuit is provided with a main circuit switch for controlling the on or off of the main circuit. It is understandable that the input end of each sampling channel corresponds to one of the multiple branches.

As an implementation of the sampling channel, refer to FIG. 3, each sampling channel includes 16 branches (the 16 branches correspond to the 16 input terminals of the sampling channel in a one-to-one correspondence) and a main channel. In each sampling channel, each input terminal is connected to the same main circuit through a corresponding branch, and the main circuit is then connected to the output terminal of the sampling channel. Referring to FIG. 3, I ₁ to I ₂₄₀ therein represent the sampling currents from the first to 240th pixels, respectively.

At the same time, each branch has a branch switch, and the main circuit has a main switch. By controlling these switches, you can independently control whether each input terminal is connected to the output terminal, or control all sampling channels. Output.

Among them, in order to simplify the structure, each main circuit switch (ie each of SW1[1] to SW1[15] in Figure 3) can be controlled by a corresponding main circuit control signal (ie, the main circuit in Figure 3). Switches SW1[1] to SW1[15] are connected to different control signal terminals); meanwhile, in different sampling channels, branch switches with the same number (for example, SW2[1] to SW2[16] in Figure 3) can be The same branch control signal control, in other words, branch switches with the same number (for example, SW2[1] to SW2[16] in FIG. 3) can be connected to the same control signal terminal. In this way, through the number of control signals (15+16=31) far less than the total number of input terminals (240), independent control of whether each output terminal can output can be realized, thereby simplifying the product structure.

Among them, each switch may be a simple switching device such as a transistor; or, the switch may also have other structures.

It can be understood that the above-mentioned each compensation circuit is provided with 15 sampling channels, and each sampling channel has 16 input terminals as an example for description, which is only exemplary, and does not constitute a limitation of the present disclosure. In actual applications, the number of sampling channels and the number of input terminals in each sampling channel can be flexibly set according to the number of pixels in each row, or multiple compensation circuits can be set.

Figure 4 shows an exemplary switch structure. As shown in Figure 4, each switch (main switch and branch switch) consists of two transistors, and is controlled by a control control signal D and its inverted signal; when the control signal D is high, the switch is turned on , When the control signal D is low, the switch is turned off.

In some embodiments, each comparison channel includes:

Referring to Figure 5, since it is more difficult to directly compare currents, the comparison channel can first convert the sampling current and standard current to the corresponding sampling voltage and standard voltage through the current-voltage conversion unit, and then use the voltage comparison unit to sample the converted The voltage is compared with the standard voltage.

In some embodiments, the current-voltage conversion unit includes a comparison capacitor C, the first pole of which is connected to the output terminal of the standard current module to be charged by the standard current for a predetermined time to generate a standard voltage, and the second pole is connected to the output terminal of the corresponding sampling channel to be The sampling current is charged for a predetermined time to generate a sampling voltage.

The voltage comparison unit includes a comparator connected to the first pole and the second pole of the comparison capacitor C for outputting an effective comparison signal whose duration is proportional to the difference between the standard voltage and the sampled voltage.

In order to realize the current-voltage conversion, referring to Figure 6, the two poles of a comparison capacitor C can be charged with the standard current and the sampling current respectively. Obviously, during the charging process, the voltage value obtained by comparing the two poles of the capacitor C is the same as the standard current and sampling current. The value of is related (of course also related to charging time).

Correspondingly, the voltage comparison unit may include a comparator, which can compare the voltages of the first pole and the second pole of the comparison capacitor C and generate a comparison signal OUT, and the effective part of the comparison signal OUT (for example, at a high voltage) The duration of the flat) is proportional to the voltage difference between the two poles (that is, the difference between the standard voltage and the sampling voltage), that is, the greater the deviation, the greater the duration of the effective comparison signal (ie, the effective part of the output signal OUT).

In some embodiments, the specific structure of the comparator can refer to FIG. 6, where V1, V2, V3, and VDD are the input reference voltages. The comparator includes a differential input pair composed of multiple transistors, specifically including an N-type differential input pair N1-N2 and a P-type differential input pair P1-P2 connected in parallel. The N-type differential input pair is used to process large input signals. When the input signal is small, the P-type differential input pair is used to deal with the situation where the input signal is small, and the N and P-type differential input pair are turned on at the same time when the input signal is moderate. The comparator also includes a plurality of current mirror structures, which are used to make the total bias current of the differential input pair constant to reduce the change in transconductance. In order to output a full-swing voltage signal, the output stage adopts a class-AB control biased output stage MOS tube (in order to drive a larger capacitive load, a larger aspect ratio is required), and a floating current source is used. Stabilize the bias current of the output stage MOS tube. Finally, some transistors form a current summation structure, which sums the current output from the input stage. P9-N11 constitute the output stage. The bias voltage of the comparator is generated by a bias circuit that has nothing to do with the power supply voltage. The resistor in the figure is used to determine the bias current of the circuit.

From a simple point of view, the charging coefficient of the standard current and the sampling current can be the same. For example, during the charging process, _{the relationship between the standard voltage V DATA} and the standard current I _DATA , and the possible relationship between the sampling voltage V _TFT and the sampling current I _TFT are as follows:

Among them, C1 is the capacitance value of the comparison capacitor C, and T is the charging time, that is, the above predetermined time (for example, 1024 clock cycles). That is to say, since the comparison capacitor C and the charging time are the same, _{the difference between the standard voltage V DATA} and the sampling voltage V _TFT obtained by the final charging should be proportional to the difference between the standard current I _DATA and the sampling current I _TFT.

After the charging is completed, the comparison capacitor C begins to discharge, and the discharge time is also the predetermined time T (for example, 1024 clock cycles, that is, the detection of each pixel requires 2T, that is, 2048 clock cycles), and the comparator can start to compare (for example, in Under the control of the START signal), that is, the comparator will first start to output an invalid comparison signal (such as low level), and when one electrode in the comparison capacitor C is discharged, the comparator will start to output a valid comparison signal (such as high level). ).

Specifically, the duration t2 of the effective comparison signal should satisfy the following formula:

For example, referring to FIG. 7, when the standard voltage V _DATA and the sampling current V _TFT are respectively located at the positions shown by the dotted lines in the figure, then in the predetermined time T, the demarcation position between the duration t2 of the valid comparison signal and the duration t1 of the invalid comparison signal The dashed line is shown in the figure.

It can be seen that the time length t2 of the above effective comparison signal represents the _{deviation of the sampling current I TFT} relative to the standard current I _DATA , and the two are in a proportional relationship; specifically, when I _TFT = I _DATA , then t2 = 0, which means sampling There is no difference between the current and the standard current, and no compensation is required; and when I _TFT =0, it means that there is no sampling current (of course this will not happen), the deviation between the sampling current and the standard current is the largest, t2=T, and the time is the longest. Long, the greatest compensation is required.

Therefore, the duration of the effective comparison signal above represents the difference between the sampled current and the standard current.

In some embodiments, the voltage comparison unit further includes a counting circuit for counting the duration of the valid comparison signal, and outputting a count value corresponding to the duration as a compensation signal.

In order to facilitate compensation, the compensation signal output by the compensation circuit is preferably a digital signal, but the comparison signal output above is only a pulse signal with a specific duration. For this reason, you can refer to Figure 5 and use a counting circuit to determine the valid duration t2 of the comparison signal above. For timing, for example, the number of clock cycles elapsed by the effective duration t2 of the comparison signal can be counted, and the number of clock cycles can be used as the count value output, that is, the compensation signal of the digital signal can be directly obtained.

For example, in the 1024 clock cycles of the predetermined time T of the above discharge process, there may be a part of the effective comparison signal duration t2. Therefore, the final compensation signal is the same as the display signal, which is a 10-bit (maximum 1024). Digital signal, the digital signal can also be converted into a "gray scale value" that needs to be adjusted.

Furthermore, since the display signal and the compensation signal are both digital signals, the driving voltage for driving the pixel can be obtained simply by using the two. For example, the display signal and the corresponding compensation signal can be directly added to correspond to the sum of the two. The grayscale value of the output drive voltage.

Of course, the forms of the above counting circuits are also diverse. For example, since clock signals and corresponding counting need to be implemented therein, they can be more complex logic circuits. For example, all counting circuits can be integrated into one chip.

On the other hand, referring to FIG. 1 to FIG. 9, an embodiment of the present disclosure provides a display module that can realize a display function and includes the above compensation circuit.

The display module can be any product or component with display function such as organic light emitting diode (OLED) display panel, electronic paper, mobile phone, tablet computer, TV, monitor, notebook computer, digital photo frame, navigator, etc. A detailed description.

The display module of the embodiment of the present disclosure includes:

A plurality of pixels, each pixel includes an organic light emitting diode for emitting light;

A plurality of sampling lines S, each sampling line S is connected to at least one pixel, and is used to obtain the sampling current of the pixel;

In the above compensation circuit, each input terminal of each sampling channel is connected to a sampling line S.

The display module includes a large number of pixels, and the above compensation circuit is an "external compensation" located outside the pixel, so it is necessary to output the sampling current of the pixel to the above compensation circuit through the sampling line S. In some embodiments, the multiple sampling lines S may correspond to all input terminals of the sampling channels of the compensation circuit included in the display module in a one-to-one correspondence. For example, the display module includes a compensation circuit, the compensation circuit is provided with 15 sampling channels, and each sampling channel has 16 input terminals, 240 sampling lines S are needed at this time.

In some embodiments, the display module further includes a driving chip, wherein the output terminal of the comparison channel of the compensation circuit is connected to the driving chip, and the driving chip is used to generate a driving voltage for driving the pixel according to the display signal and the compensation signal of the pixel.

1, the above display module also includes a driver IC (Driver IC) for generating a corresponding driving voltage according to the display signal. At this time, the compensation signal (such as a digital signal) output by the above compensation circuit can also be directly output to the drive chip. That is, the drive chip can no longer only obtain the drive voltage based on the display signal, but also generate the drive voltage based on the display signal and the corresponding compensation signal, so that the drive voltage it generates is already "compensated". Use this The driving voltage directly drives the pixels for display, and the compensated display effect can be achieved.

For example, since the display signal and the compensation signal are both digital signals (such as a 10-bit digital signal), the driver chip can directly base the sum of the display signal and the compensation signal (or the sum of the original gray scale value and the compensated gray scale value). Total gray scale), determine the corresponding driving voltage (for example, the driving voltage corresponding to the total gray scale).

Of course, it should be understood that if the standard current and the sampling current are equal, it means that there is no deviation and no compensation is required. The compensation signal is 0, so the display signal is equal to the sum of the display signal and the compensation signal. The voltage is equal to the driving voltage originally generated according to the display signal.

Of course, it should be understood that since the compensation signal needs to be generated based on the sampling current, and the sampling current is the current that is only generated when the pixel is actually displayed, after receiving the compensation signal, the driver chip can only perform the "after" compensation signal based on the compensation signal. Display for compensation.

For example, the driver chip can receive the compensation signal of a certain pixel during the display of one frame of picture, and store the compensation signal, so that in the display of the next frame of picture, it can be obtained according to the display signal of the next frame and the stored compensation signal. The driving voltage corresponding to the pixel is output. Among them, because the display screen usually does not change suddenly, the compensation signal obtained in one frame is usually also applicable to the next frame, which is equivalent to achieving "real-time compensation" through the above method.

Or, after receiving the compensation signal of a certain pixel in the display of one frame of picture, the driving chip stores the corresponding relationship between the compensation signal and the display signal, so that in a longer period of time, if the pixel's compensation signal is encountered If the corresponding relationship of the display signal has been stored before, the corresponding compensation signal can be found according to the stored corresponding relationship, and the driving voltage corresponding to the pixel can be obtained according to the display signal and the corresponding compensation signal for display.

Of course, it should be understood that if the compensation signal is an analog signal, it can also be in other forms such as a compensation voltage, and it can also be compensated in other ways such as directly outputting to the corresponding pixel, which will not be described in detail here.

In some embodiments, a plurality of pixels are arranged in an array; wherein each column of pixels is connected to the same sampling line S, pixels located in different columns are connected to different sampling lines S, and a sampling switch T1 is provided between each pixel and the sampling line S , The sampling switch T1 of each row of pixels is controlled by the same control line.

In the embodiments of the present disclosure, each compensation circuit can correspond to multiple pixels (such as 240*M; M is the number of rows of pixels), but the number of pixels in each display module is usually millions of pixels. The number of compensation circuits required may still be large. To this end, referring to Figure 8, a similar "scanning" method is adopted, so that the pixels in the same column of multiple pixels are connected to the same sampling line S through the sampling switch T1, and the sampling switches T1 of the pixels located in the same row ( For example, the transistor) is connected to the same control line (for example, the gate of the transistor is connected to the control line), so that the sampling current of each row of pixels can be output in turn through the control line, that is, the compensation circuit can be set to correspond to all pixels in a row. , Thereby greatly reducing the number of compensation circuits required.

Among them, the specific form of the pixel circuit used in each pixel and the specific form of obtaining the sampling current from the pixel can be arbitrary, as long as it includes an organic light emitting diode and a driving transistor.

For example, referring to Figure 9, the pixel circuit is the most basic 2T1C pixel circuit; and, at the connection point between the storage capacitor and the organic light emitting diode in each pixel, the corresponding sampling line S is connected through a sampling switch T1 to output Sampling current.

Of course, the pixel circuit and the specific form of acquiring the sampling current are not limited to this, and will not be described in detail here.

In yet another aspect, referring to FIGS. 1 to 15, an embodiment of the present disclosure provides a driving method of the above-mentioned display module for controlling the above-mentioned display module to perform display.

The driving method of the embodiment of the present disclosure includes: the compensation circuit obtains the display signal and the sampling current of the pixel of the display module, and generates the compensation signal of the pixel to compensate the display of the pixel.

As before, when there is a compensation circuit, the display signal and sampling current of the pixel can be obtained during the display process, and the corresponding compensation signal can be generated to compensate the display of the pixel and improve the display effect.

In some embodiments, when the display module is the display module of the driving chip connected to the above compensation circuit, for each frame of the picture, the driving chip generates a pair according to the display signal of the pixel in the current frame and the compensation signal of the pixel in the previous frame. The driving voltage at which the pixel is driven.

As before, since the display picture (display signal) usually does not change suddenly, the compensation signal obtained in each frame of the display picture can be used for the compensation of the "next frame". That is, in the next frame, according to the combination of the display signal of each pixel in the next frame (such as the original grayscale value) and the compensation signal (such as the compensated grayscale value) obtained in the previous frame (such as the original grayscale value and the compensated grayscale value) The sum of the values), the driving voltage corresponding to the pixel is obtained to drive the pixel for display.

In some embodiments, as a way of the embodiments of the present disclosure, the compensation circuit acquiring the display signal and the sampling current of the pixel, and generating the compensation signal of the pixel includes:

At the same moment, each sampling channel has an input terminal and an output terminal connected, so that the compensation circuit can obtain the display signal and sampling current of multiple pixels at the same time, and generate multiple compensation signals corresponding to multiple pixels (ie Sense parallel mode).

The number of compensation signals that each compensation circuit can obtain at the same time is actually limited by the number of comparison channels. Therefore, in order to improve efficiency, refer to Figure 10. When the compensation circuit is working, each input terminal and output terminal of each sampling channel are controlled to be turned on each time, that is, all compensation channels can output samples corresponding to different pixels at the same time. Current, for each comparison channel to work at the same time for comparison. For example, it can be:

The first input terminal of all sampling channels is connected to the corresponding output terminal;

The second input terminal of all sampling channels is connected to the corresponding output terminal;

…And so on

The 16th input terminal of all sampling channels is connected to the corresponding output terminal.

The above conduction mode can be realized by applying a specific control signal to the sampling channel. For example, when the sampling channel is in the form shown in Figure 3, that is, each sampling channel has the above branches, main circuits, main circuit switches, and branch switches, and the number of branches of all sampling channels is the same, multiple main circuits can be passed through. The channel control signals respectively control the conduction of each main switch; at the same time, in each sampling channel, the branch switches of the same number are controlled by the same branch control signal.

Referring to Figures 11 and 12, SW1[n] represents the main control signal of the main switch in the nth sampling channel; and SW2[n] represents the control signal of the branch switch of the nth branch in each sampling channel. Branch control signal, n represents the number of the branch control signal; OUT[n] represents the comparison signal output by the comparator in the nth comparison channel.

Referring to Figure 11, corresponding to the Sense parallel mode, all SW1[n] can be made high at the same time, and each SW2[n] can be made high in turn.

By simulating the parallel operation of Sense, the timing diagram of part of the time period is shown in Fig. 12.

It can be seen that in the Sense parallel mode, compensation signals of multiple pixels can be obtained at the same time, so that the speed of determining the compensation signal is fast, and it can be used to realize real-time compensation in the display process.

11 and 12, the compensation circuit may also include some other control signal terminals to receive other control signals. for example,

The RST signal terminal is used to receive the system reset signal RST, and RST is used to implement system reset.

The SMP signal terminal is used to receive the sampling start control signal SMP, and the SMP is used to start sampling (that is, start to collect the display signal DATA).

The CLK signal terminal is used to receive a periodic clock signal CLK, and CLK is used to control time and realize counting.

The SEN_EN signal terminal is used to receive the sampling mode selection signal SEN_EN. When SEN_EN is high, the compensation circuit uses the above Sense parallel mode to work. When it is low, the compensation circuit uses the subsequent caliber serial mode to work.

The TX_STB signal terminal is used to receive the data output control signal TX_STB, and TX_STB is used to trigger the work of the compensation circuit. For example, when TX_STB is at a high level, the compensation circuit starts to acquire the display signal DATA.

The START signal is used to control the counting of the valid duration t2 of the above comparison signal. For example, the above counting can be performed only when START is low, so that the counting part of the valid duration t2 of the comparison signal corresponds to the rising edge of the OUT signal to the falling edge of the START signal (see FIG. 14).

Among them, the above control signals may be generated inside the compensation circuit. For example, the counting circuit of the compensation circuit may be a chip with ports for outputting these signals. Alternatively, the above control signals can also be input through other external chips (such as through a driver chip). Alternatively, the above control signals can also be generated in other ways; for example, the TX_STB corresponding to the first compensation circuit can be input from the outside, and each compensation circuit can also generate a trigger signal after the work is completed, which can be used as the next compensation TX_STB signal of the circuit.

In some embodiments, as another way of the embodiments of the present disclosure, the compensation circuit acquiring the display signal and the sampling current of the pixel, and generating the compensation signal of the pixel includes:

At the same time, one input terminal and output terminal of a sampling channel are turned on, so that the compensation circuit obtains the display signal and sampling current of the pixel, and generates a compensation signal corresponding to the pixel (ie, Caliber serial mode). Referring to FIG. 13, that is to say, at any time, only one input terminal of one sampling channel is connected to the corresponding output terminal, so that only one comparison channel has input and works. Therefore, for the entire compensation circuit, the working process can be:

Each input terminal in the first sampling channel is connected to the corresponding output terminal in turn;

Each input terminal in the second sampling channel is connected to the corresponding output terminal in turn;

…And so on

Each input terminal in the 15th sampling channel is connected to the corresponding output terminal in turn.

Referring to FIG. 14, the above Caliber serial mode can be realized by making each SW1[n] high level in turn, and when each SW1[n] is high level, then making each SW2[n] high level in turn.

Through the simulation operation of Caliber serial mode, the timing diagram of part of the time period is shown in Fig. 15.

In the above Caliber serial mode, only the sampling current of one pixel is obtained at each time, and its detection is more accurate. Therefore, the Caliber serial mode can be used to test the compensation circuit on the one hand to determine whether there is a problem with the components in the compensation circuit and to locate the problem. On the other hand, before the display module leaves the factory, the same driving voltage can be provided to all pixels, and the sampling current of each pixel can be collected in Caliber serial mode to compare it with the fixed current value stored in the memory, etc. This process is equivalent to an initial evaluation of the deviation conditions of all pixels, and the corresponding settings can be adjusted according to the results of the evaluation (such as directly modifying the corresponding relationship between the display signal and the driving current in the driving chip).

It can be understood that the above implementations are merely exemplary implementations used to illustrate the principle of the present disclosure, but the present disclosure is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and essence of the present disclosure, and these modifications and improvements are also deemed to be within the protection scope of the present disclosure.

Claims

A compensation circuit includes:

The standard current module is used to obtain the display signals of a plurality of pixels, and output a standard current corresponding to the display signals at the output end; each of the plurality of pixels includes an organic light emitting diode for emitting light;

Multiple sampling channels, each sampling channel includes multiple input terminals and an output terminal, each input terminal is used to obtain the sampling current of one pixel, and the sampling channel is used to independently control each of the multiple input terminals One is connected to the output terminal;

There are multiple comparison channels one-to-one corresponding to the multiple sampling channels, and each comparison channel is connected to the output terminal of the standard current module and the output terminal of the corresponding sampling channel. The difference between the standard current and the sampling current outputs a compensation signal at its output terminal.
The compensation circuit according to claim 1, wherein each of the sampling channels includes a plurality of branches and a main circuit:

The first end of each of the plurality of branches is connected to an input end of the sampling channel, the second end is connected to the first end of the main circuit, and each of the plurality of branches is provided for controlling the A branch switch that makes or breaks the branch; and

The second end of the main circuit is connected to the output end of the sampling channel, and the main circuit is provided with a main circuit switch for controlling the on/off of the main circuit.
The compensation circuit according to claim 1 or 2, wherein:

The number of input terminals of each of the multiple sampling channels is the same.
4. The compensation circuit according to claim 3, wherein the n-th branch switches in the multiple sampling channels are all connected to the same control signal terminal, wherein n is greater than or equal to 1 and less than or equal to N, and N is each sampling channel The number of branch switches in the
The compensation circuit according to any one of claims 1 to 4, wherein:

The standard current module includes a digital-to-analog conversion circuit, and the display signal is a digital signal.
The compensation circuit according to any one of claims 1 to 5, wherein each of the comparison channels comprises:

A current-voltage conversion unit for converting the sampling current into a sampling voltage, and converting the standard current into a standard voltage; and

The voltage comparison unit is configured to generate a compensation signal according to the difference between the sampled voltage and the standard voltage.
The compensation circuit according to claim 6, wherein:

The current-voltage conversion unit includes a comparison capacitor, a first pole of the comparison capacitor is connected to the output terminal of the standard current module to be charged by a standard current for a predetermined time to generate the standard voltage, and a second pole is connected to the corresponding sampling channel The output terminal is charged with the sampled current for a predetermined time to generate the sampled voltage; and

The voltage comparison unit includes a comparator connected to the first pole and the second pole of the comparison capacitor for outputting an effective comparison signal whose duration is proportional to the difference between the standard voltage and the sampled voltage.
The compensation circuit according to claim 7, wherein the voltage comparison unit further comprises:

A counting circuit is used to count the duration of the effective comparison signal, and output a count value corresponding to the duration as the compensation signal.
A display module, which includes:

A plurality of pixels, each of the plurality of pixels includes an organic light emitting diode for emitting light;

A plurality of sampling lines, each of the plurality of sampling lines is connected to at least one pixel, and is used to obtain a sampling current of the at least one pixel;

Compensation circuit, the compensation circuit is the compensation circuit according to any one of claims 1 to 8, and each input terminal of each sampling channel in the compensation circuit is connected to one of the multiple sampling lines.
The display module of claim 9, further comprising a driving chip, wherein:

The output terminal of the comparison channel of the compensation circuit is connected to the driving chip, and the driving chip is configured to generate a driving voltage for driving the pixel according to the display signal of each pixel and the compensation signal.
The display module according to claim 9 or 10, wherein:

The plurality of pixels are arranged in an array; wherein each column of pixels is connected to the same sampling line, a sampling switch is arranged between each pixel and the sampling line, and the sampling switch of each row of pixels is controlled by the same control line.
The display module according to claim 11, wherein the display signal and the compensation signal are both digital signals, and the driving voltage output by the driving chip represents the gray scale corresponding to the sum of the display signal and the compensation signal. Order value.
A method for driving a display module, wherein the display module is the display module according to any one of claims 9 to 12, and the driving method comprises:

The compensation circuit obtains the display signal and the sampling current of the pixel, and generates a compensation signal for the pixel to compensate the display of the pixel.
The driving method according to claim 13, wherein:

The display module is the display module of claim 10;

For each frame of picture, the driving chip generates a driving voltage for driving the pixel according to the display signal of the pixel in this frame and the compensation signal of the pixel in the previous frame.
The driving method according to claim 13 or 14, wherein the compensation circuit acquiring the display signal and the sampling current of the pixel, and generating the compensation signal for the pixel comprises:

At the same time, one input terminal and output terminal of each of the multiple sampling channels are turned on, so that the compensation circuit can obtain the display signals and sampling currents of multiple pixels at the same time, and generate the corresponding multiple pixels. Multiple compensation signals.
The driving method according to claim 13 or 14, wherein the compensation circuit acquiring the display signal and the sampling current of the pixel, and generating the compensation signal for the pixel comprises:

At the same moment, one input terminal and output terminal of only one of the multiple sampling channels are turned on, so that the compensation circuit obtains the display signal and sampling current of the pixel, and generates a compensation signal corresponding to the pixel.