WO2021174543A1

WO2021174543A1 - Capacitive detection circuit, touch device, and terminal apparatus

Info

Publication number: WO2021174543A1
Application number: PCT/CN2020/078259
Authority: WO
Inventors: 汪正锋
Original assignee: 深圳市汇顶科技股份有限公司
Priority date: 2020-03-06
Filing date: 2020-03-06
Publication date: 2021-09-10
Also published as: CN111801584B; CN111801584A

Abstract

A capacitive detection circuit, a touch device, and a terminal apparatus. The capacitive detection circuit (100) is connected to a detection capacitor (110), and comprises: a calibration capacitor (120); a shield electrode (170) forming a first capacitor with a detection electrode of the detection capacitor (110) and forming a shield capacitor with a system ground; a charging discharging module (140) comprising a first current source (141) and a second current source (142), the first current source (141) being used to charge or discharge the detection capacitor (110), the first capacitor, and the shield capacitor, and the second current source (142) being used to charge or discharge the calibration capacitor (120); a shield electrode drive module (180) used to charge or discharge the shield capacitor and the first capacitor; an integrator (150) used to convert a capacitance of the detection capacitor (110) into a voltage signal; and a control module (130) used to control operation states of the charging discharging module (140), the integrator (150), and the shield electrode drive module (180).

Description

Capacitance detection circuit, touch device and terminal equipment

Technical field

The embodiments of the present application relate to the field of capacitance detection, and more specifically, to a capacitance detection circuit, a touch device, and a terminal device.

Background technique

Capacitive sensors are widely used in electronic devices. For example, they can be used as input devices to provide input information, such as position, movement, force, and duration. The core part of the capacitive sensor is the capacitance detection circuit. The capacitance detection circuit includes the sensor capacitance, integrator, and analog-to-digital converter (Analog to Digital Converter, ADC). When the user operates the capacitance sensor, the charge of the sensor capacitance will change. The device is used to convert the capacitance effect generated when the user operates the capacitance sensor into a voltage signal, which is sampled by the ADC and converted into a digital signal, and then the capacitance can be detected according to the digital signal.

But in the application, if there is a water drop on the sensor's sensing area, a large capacitance will be formed between the water drop and the system ground, which will affect the sensor capacitance. The equivalent circuit is basically the same as when the user's finger touches the sensor. , Resulting in false detection, so how to perform waterproof capacitance detection is a problem that needs to be solved urgently.

Summary of the invention

The embodiments of the present application provide a capacitance detection circuit, a touch device, and a terminal device, which can realize waterproof capacitance detection.

In a first aspect, a capacitance detection circuit is provided, which is connected to a detection capacitor, and the capacitance detection circuit includes: a calibration capacitor;

A shield electrode, the shield electrode and the detection electrode of the detection capacitor form a first capacitor, and the shield electrode and the system ground form a shield capacitor;

The charging and discharging module includes a first current source and a second current source. The first current source is used to charge or discharge the detection capacitor, the first capacitor, and the shielding capacitor, and the second current source For charging or discharging the calibration capacitor;

A shielding electrode driving module for charging or discharging the shielding capacitor and the first capacitor;

The integrator is used to convert the capacitance of the detection capacitor into a voltage signal;

The control module is used to control the working state of the charge and discharge module, the integrator and the shield electrode drive module;

Wherein, in the first charging and discharging stage, the shielding electrode driving module charges or discharges the shielding capacitor and the first capacitor so that the voltage on the shielding capacitor is a reference voltage;

In the second charging and discharging phase after the first charging and discharging phase, the first current source charges or discharges the detection capacitor, the first capacitor, and the shielding capacitor, and the second current source uses In charging or discharging the calibration capacitor, in the second charging and discharging stage, the voltage on the detection capacitor is charged to the reference voltage or discharged to the reference voltage.

In some possible implementation manners, the capacitance detection circuit further includes a charging and discharging switch group, a clearing switch group, and an integrating switch group, the integrator includes an integrating capacitor and an amplifier, and the shield electrode driving module includes a voltage buffer;

The control module is specifically used for:

In the charge clearing stage, the charge stored on the integrating capacitor is cleared by the clearing switch group;

In the first charging and discharging stage, controlling the voltage buffer to charge or discharge the detection capacitor, the first capacitor and the shielding capacitor through the charging and discharging switch group;

In the second charging and discharging stage, the first current source and the second current source are controlled by the charging and discharging switch group to charge or discharge the detection capacitor and the calibration capacitor, respectively, wherein the The charging duration of the calibration capacitor is equal to the charging duration of the detection capacitor, or the discharge duration of the calibration capacitor is the same as the discharge duration of the detection capacitor;

In the charge transfer phase, part of the charge stored on the calibration capacitor is controlled by the integration switch group to be transferred to the integration capacitor.

In some possible implementation manners, the charging and discharging switch group includes a first switch, a second switch, a third switch, a fourth switch, a seventh switch, and an eighth switch, and the integrating switch group includes a fifth switch, so The reset switch group includes a sixth switch;

One end of the first switch is connected to one end of the first current source, the other end of the first current source is connected to the power supply voltage, and the other end of the first switch is connected to one end of the detection capacitor and the third One end of the switch and one end of the first capacitor, the other end of the detection capacitor and the other end of the third switch are all grounded;

One end of the second switch is connected to one end of the second current source, the other end of the second current source is connected to the power supply voltage, and the other end of the second switch is connected to one end of the calibration capacitor and the fourth One end of the switch, the other end of the calibration capacitor and the other end of the fourth switch are all grounded;

One end of the fifth switch is connected to one end of the calibration capacitor, the other end of the fifth switch is connected to the first input terminal of the amplifier, and the second input terminal of the amplifier is used to input the reference voltage;

The sixth switch is connected in parallel with the integration capacitor, and the integration capacitor is connected in parallel with the amplifier;

One end of the seventh switch is grounded, and the other end of the seventh switch is connected to one end of the eighth switch and one end of the shielding capacitor;

The other end of the eighth switch is connected to the output end of the capacitor buffer, and the output voltage of the capacitor buffer is the reference voltage.

In some possible implementations, a complete discharge phase is further included between the charge zero phase and the first charge and discharge phase. In the complete discharge phase, the detection capacitor, the calibration capacitor, and the The charges on the first capacitor and the shielding capacitor are cleared.

In some possible implementation manners, during the charge clearing phase, the sixth switch is closed, and the first switch, the second switch, the third switch, the fourth switch, and the first switch are closed. Five switches, the seventh switch and the eighth switch are both turned off, and the charge stored on the integrating capacitor is cleared;

In the complete discharge phase, the third switch, the fourth switch, and the seventh switch are closed, and the first switch, the second switch, the fifth switch, the sixth switch, and the eighth switch are closed. The switches are all turned off, and the charges stored on the detection capacitor, the calibration capacitor, the first capacitor and the shielding capacitor are cleared;

In the first charging and discharging stage, the eighth switch is closed, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the All the seventh switches are turned off, and the capacitance buffer charges the detection capacitor and the first capacitor;

In the second charging and discharging stage, the first switch, the second switch, and the eighth switch are closed, and the third switch, the fourth switch, the fifth switch, the sixth switch, and the seventh switch are closed. The switches are all turned off, the voltage on the detection capacitor is charged to the reference voltage, and after the voltage on the detection capacitor is charged to the reference voltage, the first switch and the second switch are turned off ；

In the charge transfer phase, the fifth switch is closed, and the first switch, the second switch, the third switch, the fourth switch, the sixth switch, the seventh switch, and the eighth switch are closed. The switches are all turned off, and part of the charge on the calibration capacitor is transferred to the integrating capacitor.

In some possible implementations, a first buffer stage is further included between the second charge and discharge stage and the charge transfer stage, and a second buffer stage is further included after the charge transfer stage. The first buffer The stage and the second buffer stage are used to keep the charge on the detection capacitor, the calibration capacitor and the integration capacitor unchanged;

Wherein, in the first buffer stage and the second buffer stage, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, and the first switch The sixth switch, the seventh switch, and the eighth switch are all turned off.

In some possible implementation manners, the control module is also used to:

The charge and discharge switch group, the integral switch group, and the clear switch group are controlled to repeatedly perform operations from the full discharge stage to the second buffer stage for multiple times.

In some possible implementation manners, the output voltage V _out of the integrator is:

Wherein the said reference voltage V _R, the change amount ΔC _x with respect to the base capacitance of the detecting capacitor detecting capacitor C _S is the capacitance value of the integrating capacitor, the I ₁ is the current value of the first current source, the I ₂ is the current value of the second current source, and the N is the number of executions from the charge-discharge stage to the second buffer stage.

In some possible implementations, the charging and discharging switch group includes a first switch, a second switch, a third switch, a fourth switch, a seventh switch, and an eighth switch, and the integrating switch group includes a fifth switch, so The reset switch group includes a sixth switch;

One end of the first switch is connected to one end of the first current source, the other end of the first current source is grounded, and the other end of the first switch is connected to one end of the detection capacitor and the third switch. One end and one end of the first capacitor, the other end of the detection capacitor is grounded, and the other end of the third switch is connected to a power supply voltage;

One end of the second switch is connected to one end of the second current source, the other end of the second current source is grounded, and the other end of the second switch is connected to one end of the calibration capacitor and the fourth switch. One end, the other end of the calibration capacitor is grounded, and the other end of the fourth switch is connected to the power supply voltage;

One end of the fifth switch is connected to one end of the calibration capacitor, the other end of the fifth switch is connected to the first input terminal of the amplifier, and the second input terminal of the amplifier is used to input the reference voltage; The sixth switch is connected in parallel with the integrating capacitor, and the integrating capacitor is connected in parallel with the amplifier;

One end of the seventh switch is connected to the power supply voltage, and the other end of the seventh switch is connected to one end of the shielding capacitor and one end of the eighth switch;

The other end of the eighth switch is connected to the output end of the voltage buffer, and the output voltage of the capacitor buffer is the reference voltage.

In some possible implementation manners, a full charge phase is further included between the charge zero phase and the first charge and discharge phase. In the full charge phase, the detection capacitor, the calibration capacitor, and the The shield capacitor and one end of the first capacitor are charged to the power supply voltage.

In some possible implementation manners, during the charge clearing phase, the sixth switch is closed, and the first switch, the second switch, the third switch, the fourth switch, and the first switch are closed. The fifth switch, the seventh switch and the eighth switch are all turned off, and the charge stored on the integrating capacitor is cleared;

In the full charging phase, the third switch, the fourth switch, and the seventh switch are closed, and the first switch, the second switch, the fifth switch, the sixth switch, and the eighth switch are all closed. When disconnected, the voltages on the detection capacitor, the calibration capacitor, the shielding capacitor, and the first capacitor are all charged to the power supply voltage;

In the first charging and discharging stage, the eighth switch is closed, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the The seventh switches are all turned off, and the capacitance buffer discharges the detection capacitor, the shielding capacitor, and the first capacitor;

In the second charging and discharging stage, the first switch, the second switch, and the eighth switch are closed, and the third switch, the fourth switch, the fifth switch, and the sixth switch are closed. The seventh switch is all turned off, the voltage on the detection capacitor is discharged from the power supply voltage to the reference voltage, and after the voltage on the detection capacitor is discharged to the reference voltage, the first switch and The second switch is off;

In some possible implementation manners, a first buffer stage is further included between the second discharge stage and the charge transfer stage, and a second buffer stage is further included after the charge transfer stage. The first buffer stage And the second buffer stage is used to keep the charge on the detection capacitor, the calibration capacitor, the first capacitor, the second capacitor, and the integration capacitor unchanged;

Wherein, in the first buffer stage and the second buffer stage, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, and the first switch The sixth switch, the seventh switch and the eighth switch are all off.

In some possible implementation manners, the control module is also used to:

The charge and discharge switch group, the integral switch group, and the clear switch group are controlled to repeatedly perform operations from the charge and discharge stage to the second buffer stage for multiple times.

Wherein, V _R is the reference voltage, the detecting capacitor ΔC _x is the amount of change to the reference capacitance, the C _S is the capacitance value of the integration capacitor, said I ₁ is the first The current value of the current source, the I ₂ is the current value of the second current source, the V _DD is the power supply voltage, and the N is the number of executions from the charge-discharge stage to the second buffer stage .

In some possible implementation manners, the capacitance detection circuit further includes a comparator, a first input terminal of the comparator is connected to the detection capacitor, and a second input terminal of the comparator is used to input the reference voltage, The output terminal of the comparator is connected to the control module;

When the voltage of the detection capacitor reaches the reference voltage, the output signal of the comparator is inverted, and the control module controls the charging and discharging module to stop charging or discharging the detection capacitor and the calibration capacitor.

In some possible implementation manners, the capacitance detection circuit further includes a processing module configured to determine the amount of change of the capacitance value of the detection capacitor relative to the basic capacitance of the detection capacitor according to the output voltage of the integrator.

In some possible implementations, the calibration capacitor is used to make the output voltage of the integrator a reference voltage when the capacitance value of the detection capacitor is a reference capacitance value, where the reference capacitance value and the calibration The ratio of the capacitance value of the capacitor is equal to the ratio of the current value of the first current source to the current value of the second current source.

In some possible implementations, the current value of the first current source is greater than the current value of the second current source.

In some possible implementations, the capacitance detection circuit is applied to a capacitance sensor, the detection capacitor is the sensor capacitance of the capacitance sensor, and the capacitance value of the sensor capacitance is the reference capacitance value when the capacitance sensor is not operated. .

In a second aspect, a touch device is provided, including the first aspect and the capacitance detection circuit in any one of the possible implementation manners of the first aspect.

In a third aspect, a terminal device is provided, including the first aspect and the capacitance detection circuit in any one of the possible implementation manners of the first aspect.

Therefore, in the embodiment of the present application, the shield electrode and the detection electrode are driven in a time-sharing manner, so that the output voltage of the integrator is independent of the first capacitor formed by the shield electrode and the detection electrode. Changes in the capacitance of the capacitor will not affect the output of the integrator, that is, a good waterproof function can be achieved, and there will be no delay problems caused by simultaneous driving. In addition, since the charging of the shielding electrode and the charging of the detection electrode are performed in a time-sharing manner, the requirement on the driving capability of the shielding electrode can be greatly reduced, and the design difficulty and power consumption can be reduced.

Description of the drawings

Figure 1 is a schematic diagram of the waveforms of the sensing electrode and the shielding electrode.

Fig. 2 is a schematic structural diagram of a capacitance detection circuit according to an embodiment of the present application.

Fig. 3 is a schematic diagram of a capacitance detection circuit according to an embodiment of the present application.

Fig. 4 is a logic timing diagram of a capacitance detection circuit according to an embodiment of the present application.

Fig. 5 is a schematic diagram of a capacitance detection circuit according to another embodiment of the present application.

Fig. 6 is a logic timing diagram of a capacitance detection circuit according to another embodiment of the present application.

FIG. 7 is a schematic structural diagram of a touch device according to an embodiment of the present application.

Fig. 8 is a schematic structural diagram of a terminal device according to an embodiment of the present application.

Detailed ways

The embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

In the related technology of capacitance detection, a waterproof realization method is to set a shielding electrode around the sensing electrode of the capacitance sensor to shield the capacitance of the water drop to the system ground, and make the level of the sensing electrode and the shielding electrode in the process of capacitance detection. Keep the same, so that the capacitance formed between the sensing electrode and the shielding electrode will not absorb or release charge, and the capacitance will be invisible.

And in order to more effectively detect the charge change of the sensor capacitance caused by the user's operation, a calibration capacitor can be added to the capacitance detection circuit. Usually set the capacitance value of the calibration capacitor and the capacitance value of the sensor capacitance when the capacitance sensor is not operated (or the basic Capacitance) is approximately equal.

However, in the process of capacitance detection, the detection capacitor Cx and the calibration capacitor are charged and discharged so that the calibration capacitor offsets the contribution of the basic capacitance of the detection capacitor Cx, and the charging and discharging speed is relatively fast. If you want to ensure that the capacitance detection process The voltages of the sensing electrode and the shielding electrode are always the same, and the driving circuit of the shielding electrode is required to have a relatively fast response speed and a strong driving capability, and therefore, a higher power consumption is required. Moreover, in practical applications, due to the delay in the driving circuit of the shielding circuit, there will be a voltage difference between the shielding electrode voltage and the sensing electrode voltage at the end of charging and discharging, as shown in Figure 1, thereby weakening the waterproofing function of the shielding electrode.

In view of this, the embodiments of the present application provide a capacitance detection circuit, which can achieve good waterproof performance, and can reduce the requirements on the response speed and/or driving capability of the driving circuit of the shield electrode, thereby reducing the design difficulty and System functions.

2 is a schematic structural diagram of a capacitance detection circuit 100 according to an embodiment of the present application. As shown in FIG. 2, the capacitance detection circuit 100 is connected to a detection capacitor 110, and the capacitance detection circuit 100 includes a calibration capacitor 120;

A shield electrode 170, the shield electrode 170 and the detection electrode of the detection capacitor 110 form a first capacitor, and the shield electrode 170 and the system ground form a shield capacitor;

The charging and discharging module 140 includes a first current source 141 and a second current source 142. The first current source 141 is used to charge or discharge the detection capacitor, the first capacitor, and the shielding capacitor. The second current source 142 is used to charge or discharge the calibration capacitor;

The shielding electrode driving module 180 is used to charge or discharge the shielding capacitor and the first capacitor;

The integrator 150 is used to detect the capacitance effect of the capacitor 110, such as the amount of charge or the amount of charge change on the capacitor, into a voltage signal;

The control module 130 is used to control the working state of the charge and discharge module 140, the integrator 150, and the shield electrode driving module 180;

Wherein, in the first charging and discharging stage, the shielding electrode driving module 180 charges or discharges the shielding capacitor and the first capacitor so that the voltage on the shielding capacitor is a reference voltage;

In the second charging and discharging phase after the first charging and discharging phase, the first current source 141 charges or discharges the detection capacitor, the first capacitor, and the shielding capacitor, and the second current source 142 is used for charging or discharging the calibration capacitor, wherein, in the second charging and discharging stage, the voltage on the detection capacitor is charged to the reference voltage or discharged to the reference voltage.

It should be understood that, in the embodiment of the present application, the first capacitor and the shielding capacitor are equivalent capacitors, that is, the shielding electrode and the detecting electrode can be used as two plates of the capacitor to form the first capacitor, But it does not mean that the shielding electrode and the detection electrode are used in the circuit to form the first capacitor. It is understandable that the shielding electrode is used to shield the influence of water droplets and other interference objects on the capacitance detection, and the detection electrode is used to receive the user's finger. Touch, and further detect the change in capacitance value caused by the touch of the user's finger through the subsequent detection circuit. The same is true for the shielding capacitor, which will not be repeated here.

Optionally, in some embodiments, the detection capacitor is a measurement capacitor formed by a driving electrode and a sensing electrode (ie, a detection electrode) on a touch panel, wherein the driving electrode is grounded, Or the detection capacitor may be a detection capacitor formed by the sensing electrode and the ground.

Optionally, in the embodiment of the present application, the calibration capacitor 120 is used to make the output voltage of the integrator 150 a reference voltage when the capacitance value of the detection capacitor 110 is a reference capacitance value, where the reference The ratio of the capacitance value to the capacitance value of the calibration capacitor is equal to the ratio of the current value of the first current source 141 to the current value of the second current source 142.

It should be noted that, for ease of description, the embodiment of the present application introduces the concept of detecting the capacitance value of the capacitor, and judging whether there is a touch by detecting the change in the capacitance value of the capacitor. It should be noted that whether the user touches the detection capacitor, the detection capacitor The capacitance value of the detection capacitor can be regarded as a constant. The change in the capacitance value of the detection capacitor described in this application refers to the change in the equivalent capacitance of the integrator connected to the subsequent sequence. Specifically, when the user's finger touches the electrode of the detection capacitor When the board is installed, the finger and the ground form a capacitor. At this time, the capacitance connected to the integrator is the equivalent capacitance of the capacitance and the detection capacitor. That is to say, the embodiment of the present application introduces the basic capacitance of the detection capacitor and the user touches the detection capacitor into The equivalent capacitance of the new capacitance is regarded as the capacitance value of the detection capacitor. In other words, the detection capacitor in this application can be considered as the result of the superposition of the detection capacitor itself connected to the integrator and the new capacitance generated when the user touches the detection capacitor. An equivalent capacitor.

It should be understood that the capacitance detection circuit of the embodiment of the present application can be applied to various circuits or systems that require capacitance detection. In particular, the capacitance detection circuit can be applied to a capacitance sensor. In this case, the detection capacitor may be a capacitance. The sensor capacitance of the sensor. When the user does not operate the capacitance sensor, the capacitance value of the detected capacitor is the reference capacitance value. The reference capacitance value can also be called the basic capacitance, or self-capacitance, nominal capacitance value, etc. When the user operates the capacitance When a sensor is used, it is equivalent to forming a new capacitance between the user's finger and the ground. The capacitance value of the detection capacitor will change relative to the basic capacitance. The integrator can convert the capacitance signal (or capacitance effect) of the detection capacitor into a voltage The signal, further, the capacitance value of the detection capacitor can be determined according to the voltage signal.

The capacitance detection circuit of the embodiment of the present application may include a first current source and a second current source, and the first current source and the second current source are respectively used to charge or discharge the detection capacitor and the calibration capacitor . Wherein, the calibration capacitor is used to make the output voltage of the integrator a reference voltage when the capacitance value of the detection capacitor is a reference capacitance value, or in other words, the calibration capacitor is used to offset the detection capacitor as a reference capacitance The amount of contribution to the output voltage of the integrator. Therefore, in the embodiment of the present application, the purpose of adjusting the capacitance value of the calibration capacitor can be achieved by adjusting the proportional relationship between the current value of the first current source and the current value of the second current source, for example, Setting the current value of the first current source to be greater than the current value of the second current source can make the capacitance value of the calibration capacitor smaller than the reference capacitance value of the detection capacitor. The calibration capacitor with the reference capacitance value of the capacitor equal or approximately equal helps to reduce the area of the capacitance detection circuit and reduce the cost of the chip.

Optionally, in the embodiment of the present application, the calibration capacitor may be a capacitor or a capacitor array with a variable capacitance value, or may also be a capacitor or a capacitor array with a fixed capacitance value, which is not limited in the embodiment of the present application. The first current source and the second current source may be current sources having a proportional relationship. For example, the first current source and the second current source may be obtained by mirroring the current source, and the first current source The proportional relationship between the current value of the current source and the current value of the second current source may be fixed or adjustable, which is not limited in the embodiment of the present application.

Optionally, in the embodiment of the present application, the capacitance detection circuit 100 further includes a charge and discharge switch group, a clear switch group, and an integration switch group. The integrator includes an integration capacitor and an amplifier. The shield electrode driving module includes a voltage buffer;

The control module 130 can control the working status of the charging and discharging module, the shield electrode driving module and the integrator through the charging and discharging switch group, the clearing switch group, and the integrating switch group, for example, controlling all When the shield electrode drive module charges or discharges the detection capacitor and the shield capacitor, controls when the charge and discharge module charges the detection capacitor and the calibration capacitor, and when to discharge the detection capacitor and the calibration capacitor , And control when the integrator performs integration, etc.

In a specific embodiment of the present application, the control module is used to:

Therefore, in the embodiments of the present application, a good waterproof function can be achieved by time-sharing charging and discharging of the shielding electrode and the sensing electrode, which can greatly reduce the driving capability requirements of the shielding electrode, thereby reducing design difficulty and system power consumption.

Optionally, in the embodiment of the present application, a first buffer stage may be further included between the second charge-discharge stage and the charge transfer stage, and a second buffer stage may be further included after the charge transfer stage, The first buffering stage and the second buffering stage are used to avoid the problem of charge leakage caused by frequent switching of switches, wherein, in the first buffering stage and the second buffering stage, the detection capacitor, the The charges on the shielding capacitor, the first capacitor, the calibration capacitor, and the integrating capacitor remain unchanged.

Optionally, in some embodiments, the shield electrode driving circuit may include a voltage buffer capable of outputting a stable voltage, or, in other embodiments, the voltage buffer may also be implemented by other equivalent circuits, Only it can output a stable voltage.

Optionally, in some embodiments, the capacitance detection circuit 100 may further include a comparator, the first input terminal of the comparator is connected to the detection capacitor, and the second input terminal of the comparator is used to input the The reference voltage, the output terminal of the comparator is connected to the control module;

Specifically, when the voltage of the detection capacitor reaches the reference voltage, the output signal of the comparator is inverted (for example, from a low level to a high level, or from a high level to a low level) When the output signal of the comparator is inverted, the control module controls the charging and discharging module to stop charging or discharging the detection capacitor and the calibration capacitor.

That is, when the voltage on the detection capacitor reaches the reference voltage (for example, the voltage of the detection capacitor is charged to the reference voltage, or the voltage of the detection capacitor is discharged to the reference voltage) , The output signal of the comparator is inverted, and the output signal can be used as the input signal of the control module, and the control module can control the charging and discharging module to stop the charging and discharging module when the output signal of the comparator is inverted. The detection capacitor and the calibration capacitor are charged or discharged, that is, the first current source is controlled to stop charging or discharging the detection capacitor, and the second current source is controlled to stop charging or discharging the calibration capacitor . Specifically, the control module may control the charging and discharging module to stop charging or discharging the detection capacitor and the calibration capacitor through the charging and discharging switch set.

It should be understood that, in the embodiments of the present application, the equivalent circuit of a comparator can also be used to achieve the above functions, as long as the charge and discharge module is controlled to stop the detection capacitor and the detection capacitor when the voltage of the detection capacitor reaches the reference voltage. The calibration capacitor can be charged or discharged, which is not specifically limited in the embodiment of the present application.

Optionally, in some embodiments, the capacitance detection circuit 100 further includes a processing module configured to determine the amount of change of the capacitance value of the detection capacitor relative to the reference capacitance value according to the output voltage of the integrator.

For example, the processing module may be an ADC, or may also be other circuits or modules with processing functions, which is not limited in the embodiment of the present application. The processing module may determine the capacitance value of the detection capacitor according to the output voltage of the integrator. Specifically, the processing module may convert the voltage signal output by the integrator into a digital signal, and determine the capacitance value of the detection capacitor according to the digital signal. For example, if the capacitance detection circuit is applied to a capacitance sensor, the processing module may When the user does not operate the capacitance sensor, a digital signal is determined, and when the user operates the capacitance sensor, another digital signal is determined, and then the change in the capacitance value of the sensor capacitance can be determined according to the difference between the two digital signals.

Hereinafter, the implementation of the capacitance detection circuit of the embodiment of the present application will be described in detail with reference to the specific examples in FIG. 3 to FIG. 6.

It should be understood that the examples shown in FIGS. 3 to 6 are intended to help those skilled in the art to better understand the embodiments of the present application, and are not intended to limit the scope of the embodiments of the present application. Those skilled in the art can obviously make various equivalent modifications or changes based on the given figures 3 to 6, and such modifications or changes also fall within the scope of the embodiments of the present application.

FIG. 3 is a circuit structure diagram of a capacitance detection circuit 200 according to an embodiment of the present application. As shown in FIG. 3, the capacitance detection circuit 200 is connected to the detection capacitor Cx, and includes:

The shield electrode, the shield electrode and the detection electrode of the detection capacitor Cx form a first capacitor Cm, the shield electrode and the system ground form a shield capacitor Cshd, the lower electrode of the first capacitor and the upper electrode of the shield capacitor in FIG. 3 can be Seen as a schematic diagram of the equivalent circuit structure of the shield electrode;

The shield electrode driving circuit includes a voltage buffer 270;

The calibration capacitor Cc, the control module 230, the charge and discharge module 240, the integrator 250, the processing module 260, and the comparator 290.

Wherein, the charging and discharging module 240 includes a first current source 241 and a second current source 242, and the integrator 250 includes an integrating capacitor Cs and an amplifier 252.

The capacitance detection circuit further includes a charge and discharge switch group, a clear switch group, and an integration switch group, wherein the charge and discharge switch group includes a first switch S1, a second switch S2, a third switch S3, a fourth switch S4, The seventh switch S7 and the eighth switch S8, the integral switch group includes a fifth switch S5, and the clear switch group includes a sixth switch S6.

The charging and discharging switch group is used to control the charging and discharging module 240 to charge or discharge the detection capacitor Cx, the calibration capacitor Cc, the first capacitor or the shielding capacitor. Specifically, the first switch S1 is used for The first current source 241 is controlled to charge the detection capacitor Cx, the second switch S2 is used to control the second current source 242 to charge the calibration capacitor Cc, and the third switch is used to control The detection capacitor Cx and the first capacitor Cm are discharged, the fourth switch is used to control the discharge of the calibration capacitor Cc, the seventh switch S7 is used to control the discharge of the shielding capacitor, the The eighth switch is used to control the voltage buffer 270 to charge the first capacitor Cm.

The integration switch group is used to integrate the integration capacitor, specifically, the fifth switch S5 is used to control the integration of the integration capacitor Cs. The clearing switch group is used for clearing the charge stored on the integrating capacitor, specifically, the sixth switch is used for controlling the clearing of the charge stored on the integrating capacitor Cs.

Specifically, one end of the first switch S1 is connected to one end of the first current source 241, the other end of the first current source 241 is connected to a power supply voltage (that is, V _DD ), and the other end of the first switch S1 One end of the detection capacitor Cx, one end of the third switch S3 and one end of the first capacitor Cm are connected, the other end of the detection capacitor Cx and the other end of the third switch S3 are both grounded, the The other end of the first capacitor Cm is connected to one end of the shielding capacitor Cshd;

One end of the second switch S2 is connected to one end of the second current source 242, the other end of the second current source is connected to the power supply voltage (that is, V _DD ), and the other end of the second switch S2 is connected to the calibration One end of the capacitor Cc and one end of the fourth switch S4, the other end of the calibration capacitor Cc and the other end of the fourth switch S4 are grounded, that is, one end of the calibration capacitor Cc (for example, the upper plate) _{It is connected to the power supply voltage V DD} through the second switch S2 and the second current source 242, and the same end (such as the upper plate) of the calibration capacitor Cc is grounded through the fourth switch S4, and the other end of the calibration capacitor Cc is grounded. One end (for example, the lower plate) is grounded. It can be clearly seen from this that the calibration capacitor Cc and the detection capacitor Cx are independent capacitors, and there is no common electrode plate between them;

One end of the fifth switch S5 is connected to one end of the calibration capacitor Cc, and the other end of the fifth switch S5 is connected to the first input end (ie, the negative input end) of the amplifier 252, and the second end of the amplifier 252 is The input terminal (that is, the positive input terminal) is used to input the reference voltage (denoted as V _R );

The sixth switch S6 is connected in parallel with the integrating capacitor Cs, and the integrating capacitor Cs is connected in parallel with the amplifier 252, that is, the integrating capacitor Cs is connected across the negative input terminal and the output terminal of the amplifier 252;

One end of the seventh switch S7 is grounded, the other end of the seventh switch S7 is connected to one end of the eighth switch S8 and one end of the shielding capacitor Cshd, and the other end of the shielding capacitor Cshd is grounded;

The other end of the eighth switch S8 is connected to the output terminal of the buffer capacitor 270, the output voltage of the buffer capacitor 270 to the reference voltage V _R;

The first input terminal (for example, the positive input terminal) of the comparator 290 is connected to one end of the detection capacitor Cx, and the second input terminal (for example, the negative input terminal) of the comparator 290 is used to input the reference voltage V _R , the output terminal of the comparator 290 is connected to the control module 230, and the control module 230 is used to control the opening and closing of the switches S1 to S8. Of course, the connection mode of the positive and negative input terminals of the comparator 290 can also be reversed, which is not limited herein.

Further, the output terminal of the integrator 250 can also be connected to a processing module 260, and the processing module 260 can be used to process the output voltage V _out of the integrator 250 to determine the capacitance value of the detection capacitor Cx, or the detection capacitor The amount of charge on Cx further determines whether there is a touch.

Hereinafter, in conjunction with the logic timing diagram shown in FIG. 4, the working process of the capacitance detection circuit shown in FIG. 3 will be described in detail.

It should be noted that in Figure 4, the curves corresponding to S1 to S8 are the waveform diagrams of the control signals of the first switch S1 to the eighth switch S8, when the control signal is high, the corresponding switch is closed, and when the control signal When it is at a low level, the corresponding switch is off. V _x , V _n and V _shd are the voltage curves on the detection capacitor Cx, the calibration capacitor Cc, and the shielding capacitor C _shd _{, respectively, and V out} is the output voltage of the integrator 250.

In the charge zero phase (corresponding to the time period t ₀ ～t _{1 in} Figure 4), the sixth switch S6 is closed, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, and the fifth switch S5 , The seventh switch S7 and the eighth switch S8 are both turned off, and the charge stored on the integrating capacitor Cs is cleared, that is, at the _{time t 1} , the charge on the integrating capacitor Cs is zero. According to the virtual short characteristic of the amplifier, The output voltage of the integrator 250 is V _out =V _R.

In this embodiment, before the first charging and discharging phase, it also includes a complete discharge phase (corresponding to the time period t ₁ to t ₂ in FIG. 4 ). In the complete discharge phase, the third switch S3 and the fourth switch S4 and the seventh switch S7 are closed, and the first switch S1, the second switch S2, the fifth switch S5, the sixth switch S6, and the eighth switch S8 are all open, and the detection capacitor Cx , The calibration capacitor Cc, the shielding capacitor Cshd, the first capacitor Cm formed by the shielding electrode and the sensing electrode are completely discharged. At _{time t 2} , the amount of charge stored on the detection capacitor Cx, the calibration capacitor Cc, the first capacitor Cm and the shield capacitor Cshd are all zero, and the output voltage of the integrator 250 is V _out =V _R.

In the first charging and discharging stage (corresponding to the time period t ₂ to t _{3 in} FIG. 4 ), the eighth switch S8 is closed, the first switch S1, the second switch S2, the third switch S3, The fourth switch S4, the fifth switch S5, the sixth switch S6, and the seventh switch S7 are all off, and the capacitance buffer 270 charges the detection capacitor Cx and the first capacitor Cm . At _{time t 3} , the amount of charge stored on the detection capacitor Cx and the first capacitor Cm are:

Among them, Q _{Cx, t3} are the amount of charge on the detection capacitor Cx at time _{t 3} _{, and Q Cm, t3} are the amount of charge on the first capacitor Cm at time _{t 3.}

In the second charging and discharging stage (corresponding to the time period t ₃ to t _{4 in} FIG. 4 ), the first switch S1, the second switch S2 and the eighth switch S8 are closed, and the third switch S3, the third switch S3 and the eighth switch S8 are closed. The fourth switch S4, the fifth switch S5, the sixth switch S6, and the seventh switch S7 are all off, and the first current source 241 and the second current source 242 charge the detection capacitor Cx and the calibration capacitor Cc, respectively. When the voltage V _x on the detecting capacitor Cx reaches the reference voltage V _R, the output state of the comparator 290 of the overturn, this time, the control module 230 controls the first switch S1 and the second switch S2 is turned off, that is, the first current source 241 and the second current source 242 are controlled to stop charging the detection capacitor Cx and the calibration capacitor Cc.

At _{time t 4} , the amount of charge stored on the detection capacitor Cx and the first capacitor Cm are:

Q _Cx,t4 =V _R C _x formula (3)

Q _Cm,t4 =(V _R -V _R )C _m =0 Formula (4)

Then, detecting a voltage on the capacitor Cx is charged to the reference voltage V _R to the desired length t _ch is:

Wherein, the C _x represents the reference capacitance value (that is, the basic capacitance) of the detection capacitor Cx, and the I ₁ is the current value of the first current source 241.

Since the appearance and the like when the calibration capacitor Cc charge detecting capacitor Cx, then at time t _4, the charge amount Q calibration stored on capacitor Cc _{Cc, T4} is:

Wherein, the I ₂ is the current value of the second current source.

Since the detection of the capacitor Cx is charged to the reference voltage when the length t _CH V _R need, therefore, the length of time period t ₃ ~ t ₄ equal to or greater than the required length of time t _CH, i.e. t _ch ≤t ₄ -t _3.

Optionally, in order to avoid charge leakage caused by frequent switching of switches, a first buffer stage (corresponding to the time period t ₄ to t ₅ in FIG. 4) may be included after the second charge and discharge stage. In the buffering phase, the charge on the detection capacitor Cx, the calibration capacitor Cc, the shielding capacitor Cshd, the first capacitor Cm, and the integrating capacitor Cs remain unchanged. Specifically, in the first buffering phase, the first switch S1 to the eighth switch S8 Are all disconnected.

Afterwards, in the charge transfer phase (corresponding to the time period t ₅ to t _{6 in} Figure 4), the fifth switch S5 is closed, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, and the sixth switch S6, a seventh switch S7 and the eighth switch S8 are turned off, since the virtual short characteristics of the amplifier, the voltage of the positive input terminal of amplifier 252 and the negative input terminal of the amplifier 252 are equal, i.e., both to the reference voltage V _R, and therefore, The voltages of the upper plate of the calibration capacitor Cc and the left plate of the integrating capacitor Cs are clamped to the reference voltage V _R , due to the virtual off characteristic of the amplifier, during the time period t ₅ to t ₆ , the calibration capacitor Cc is stored The charge of is redistributed on the calibration capacitor Cc and the integrating capacitor Cs. The charge balance equation is shown in formula (7):

Wherein the amount of charge, the C _c is the capacitance of the calibration capacitor Cc, the C _s is the capacitance of the integrating capacitor Cs, V _R C _c is the charge transfer after the storage of the calibration capacitor Cc , the amount of charge _{_{(V R -V OUT) · C}} S is after said integrating stored charge transfer on capacitor Cs.

According to formula (7), the output voltage V _{out of the} integrator 250 can be obtained as shown in the following formula:

It can be seen from formula (8) that by controlling the capacitance value C _{c of the} calibration capacitor Cc and the current value I ₁ of the first current source, the current value I _{2 of} the second current source satisfies C _C -C _X I ₂ /I ₁ = 0, that is, C _C = C _X I ₂ /I ₁ , so that when the capacitance value of the detection capacitor Cx is the reference capacitance value, the output voltage V _out of the integrator 250 is the reference voltage V _R , that is , when the user does not operate the capacitive sensor, the output voltage of the integrator to the reference voltage V _R.

It can be seen from the formula C _C =C _X I ₂ /I ₁ that, as long as I ₂ /I ₁ <1 is set, C _C <C _X can be made, so that the purpose of reducing the capacitance value of the calibration capacitor can be achieved, and because The capacitance value of the capacitor is proportional to the size. By setting the current value of the first current source to be smaller than the current value of the second current source, a smaller calibration capacitor can be used to offset the reference capacitance value of the detection capacitor Cx.

Optionally, in order to avoid charge leakage caused by frequent switching of switches, a second buffer stage (corresponding to the time period t ₆ to t ₇ in FIG. 4) may be included after the charge transfer stage. , The charge on the detection capacitor Cx, the calibration capacitor Cc, the first capacitor Cm, the shielding capacitor Cshd, and the integrating capacitor Cs remain unchanged. Specifically, in the second buffering stage, the first switch S1 to the eighth switch S8 are all off open.

Optionally, in the embodiment of the present application, the actions from the charge-discharge stage to the second buffer stage may be repeated multiple times. For example, in _{the time period t 7} to t ₈ _{after the time t 7} , the time period t may be executed. _For the related operations in 1 to t ₂ , in the time period t ₈ to t ₉ , the related operations in the time period t ₂ to t ₃ can be performed _{, and in the time period t 10} to t ₁₁ , the time period t ₃ to can be performed For _{the related operations in t 4} _{, in the time period t 12} to t ₁₃ , the related operations in the time period t ₄ to t ₅ can be performed, and in the time period t ₁₃ to t ₁₄ , the time period t ₅ to t _{6 can be performed} The related operations in the next iteration are similar, so I won’t repeat them here.

Then, when the above _{process t 1} to t ₇ is repeatedly executed N times, the output voltage V _out of the integrator is:

In the case that C _C = C _X I ₂ /I ₁ is satisfied, when the capacitance value of the detection capacitor Cx changes (for example, when touched by a finger), for example, when the capacitance value of the detection capacitor Cx changes from the reference capacitance value C _x When C _x + ΔC _x (C _x + ΔC _x is the capacitance value of the equivalent capacitance generated by a touch object such as a finger touching the capacitance of the sensor), the output voltage V _out of the integrator 250 is:

In one embodiment, the capacitance change amount of the detection capacitor can be calculated according to Vout and N, so as to determine whether it has been touched. It can be seen from formula (10) that repeating the above process multiple times is beneficial to improve the sensitivity of capacitance detection. For example, when N is 1, for a small ΔCx, V _{out is} almost equal to V _R , which may be misjudged as no object touch. When N is large, even a small ΔCx can be multiplied by N. It becomes a larger value, thus obtained V _R V _out and there may be a large difference, whereby to determine whether the touch can enhance the sensitivity of detection.

Therefore, the capacitance detection circuit of the embodiment of the present application charges the detection capacitor and the calibration capacitor through the first current source and the second current source, respectively, so as to achieve the proportional relationship between the current values passing through the first current source and the second current source. The purpose of controlling the proportional relationship between the reference capacitance value and the capacitance value of the calibration capacitor, therefore, as long as the current value of the first current source is set to be greater than the current value of the second current source, the reduction of the calibration capacitor can be achieved. The purpose of the capacitance value, in turn, can reduce the area of the capacitance detection circuit and reduce the cost of the chip.

Furthermore, through the time-sharing drive of the shield electrode and the sensing electrode, it can be seen from formula (10) that the output voltage of the integrator has nothing to do with the first capacitor Cm formed by the shield electrode and the sensing electrode. In this way, even if there are water droplets If the Cm changes, it will not affect the output of the integrator, that is, it can achieve a good waterproof function, and there will be no delay caused by simultaneous driving. In addition, since the charging of the shielding electrode and the charging of the sensing electrode are performed in a time-sharing manner, the requirement on the driving capability of the shielding electrode can be greatly reduced, and the design difficulty and power consumption can be reduced.

FIG. 5 is a schematic structural diagram of a capacitance detection circuit 400 according to another embodiment of the present application. As shown in FIG. 5, the capacitance detection circuit 400 is connected to a detection capacitor Cx, and the capacitance detection circuit 400 includes:

A shield electrode, a first capacitor Cm is formed between the shield electrode and the detection electrode of the detection capacitor Cx, and a shield capacitor Cshd is formed between the shield electrode and the system ground. The lower electrode of the first capacitor and the shield capacitor in FIG. 5 The upper electrode can be regarded as a schematic diagram of the equivalent circuit structure of the shielding electrode;

The shield electrode driving circuit includes a voltage buffer 470;

The calibration capacitor Cc, the control module 430, the charge and discharge module 440, the integrator 450, the processing module 460, and the comparator 490.

Wherein, the charging and discharging module 440 includes a first current source 441 and a second current source 442, and the integrator 450 includes an integrating capacitor Cs and an amplifier 452.

The capacitance detection circuit further includes a charge and discharge switch group, a clear switch group, and an integration switch group, wherein the charge and discharge switch group includes a first switch S1, a second switch S2, a third switch S3, and a fourth switch S4, The seventh switch S7 and the eighth switch S8, the integral switch group includes a fifth switch S5, and the clear switch group includes a sixth switch S6.

The charge and discharge switch group is used to control the charge and discharge module 440 to charge or discharge the detection capacitor Cx, the calibration capacitor Cc, the first capacitor or the shielding capacitor. Specifically, the first switch S1 is used for The first current source 441 is controlled to discharge the detection capacitor Cx, the second switch S2 is used to control the second current source 442 to discharge the calibration capacitor Cc, and the third switch is used to control The detection capacitor Cx and the first capacitor Cm are charged, the fourth switch is used to control the charging of the calibration capacitor Cc, the seventh switch S7 is used to control the charging of the shielding capacitor, and the The eighth switch is used to control the voltage buffer 270 to discharge the first capacitor Cm.

It should be noted that the circuit structure of the embodiment shown in FIG. 5 and FIG. 3 is similar, the difference is: in the embodiment shown in FIG. 3, one end of the first current source and the second current source is connected to the power supply voltage, One end of the switch, the fourth switch and the seventh switch is grounded. In the embodiment shown in FIG. 5, one end of the first current source and the second current source are grounded, and one end of the third switch, the fourth switch and the seventh switch are connected. The power supply voltage, for example, one end of the calibration capacitor Cc (for example, the upper plate) is grounded through the second switch S2 and the second current source 442, and the same end of the calibration capacitor Cc (for example, the upper plate) The fourth switch S4 is connected to the power supply voltage V _DD , the other end of the calibration capacitor Cc (for example, the lower plate) is grounded, one end of the first capacitor Cm is connected to one end of the third switch, and the other end of the shielding capacitor Grounding, one end of the seventh switch is connected to one end of the shielding capacitor and one end of the eighth switch, the other end of the seventh switch is connected to the power supply voltage, and the other end of the eighth switch is connected to the capacitor buffer. The connection relationship of other components in FIG. 5 will not be repeated here.

Hereinafter, in conjunction with the logic timing diagram shown in FIG. 6, the working process of the capacitance detection circuit shown in FIG. 5 will be described in detail.

It should be noted that in Figure 6, the curves corresponding to S1 to S8 are the waveform diagrams of the control signals of the first switch S1 to the eighth switch S8. When the control signal is high, the corresponding switch is closed. When the control signal When it is low level, the corresponding switch is off. Of course, the switch can be closed or opened to correspond to low level and high level respectively. V _x , V _n and V _shd are the voltage curves on the detection capacitor Cx, the calibration capacitor Cc and the shielding capacitor C _shd _{respectively, and V out} is the output voltage of the integrator 250.

Similar to the previous embodiment, in the charge clearing phase (corresponding to the time period t ₀ to t _{1 in} FIG. 6 ), the sixth switch S6 is closed, the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 and the fifth switch S5, the seventh switch S7 and the eighth switch S8 are all turned off, and the charge stored on the integrating capacitor Cs is cleared, that is, at the _{time t 1} , the amount of charge on the integrating capacitor Cs is zero, according to the amplifier The output voltage of the integrator 450 is V _out =V _R.

In this embodiment, before the first charging and discharging phase, a full charging phase (corresponding to the time period t ₁ to t ₂ in FIG. 6) is also included. In the full charging phase, the third switch S3 and the fourth switch S4 and the seventh switch S7 are closed, and the first switch S1, the second switch S2, the fifth switch S5, the sixth switch S6, and the eighth switch S8 are all open, and the detection capacitor Cx , The calibration capacitor Cc, the shielding capacitor Cshd, the first capacitor Cm formed by the shielding electrode and the sensing electrode are fully charged. At _{time t 2} , the amount of charge stored on the detection capacitor Cx, the calibration capacitor Cc, and the first capacitor Cm are:

Q _Cx,t2 = C _x V _DD formula (11)

Q _Cc,t2 = C _c V _DD formula (12)

Q _Cm,t2 = 0 Formula (13)

The output voltage V _out of the _{integrator 450 is V R.}

In the first charging and discharging stage (corresponding to the time period t ₂ to t _{3 in} FIG. 6 ), the first switch S1 to the seventh switch S7 are opened, the eighth switch S8 is closed, and the voltage buffer 470 simultaneously shields the detection capacitor Cx and The capacitor Cshd and the first capacitor Cm are charged. At time t3, the amount of charge stored on the detection capacitor Cx, the shielding capacitor Cshd, and the first capacitor Cm are:

In the second charging and discharging stage (corresponding to the time period t ₃ to t _{4 in} FIG. 6 ), the first switch S1, the second switch S2 and the eighth switch S8 are closed, and the third switch S3, the third switch S3 and the eighth switch S8 are closed. The fourth switch S4, the fifth switch S5, the sixth switch S6, and the seventh switch S7 are all turned off, and the detection capacitor Cx and the calibration capacitor Cc are discharged through the first current source 441 and the second current source 442, respectively. When the voltage V _x on the detected discharging the capacitor Cx to the reference voltage V _R, the output state of the comparator 490 is inverted occur, this time, the control module 430 controls the first switch S1 and the second The switch S2 is turned off, that is, the first current source 441 and the second current source 442 are controlled to stop discharging the detection capacitor Cx and the calibration capacitor Cc.

Q _Cx,t4 =V _R C _x formula (16)

Q _Cm,t4 =(V _R -V _R )C _m =0 Formula (17)

Then, the time period t _dis required for the voltage on the detection capacitor Cx to _{discharge from the power supply voltage V DD} to the reference voltage V _R is:

Wherein, the C _x is the reference capacitance value of the detection capacitor Cx, and the I ₁ is the current value of the first current source 441.

Since the discharge time of the calibration capacitor Cc and the detection capacitor Cx are equal, then at _{time t 4} _{, the charge Q Cc, t4} stored on the calibration capacitor Cc is:

Wherein, the C _c is the capacitance value of the calibration capacitor, and the I ₂ is the current value of the second current source 442.

Detecting capacitor 420 due to the discharge from the supply voltage to the reference voltage when the length t V _R _DIS need, therefore, the length of time period t ₃ ~ t ₄ equal to or greater than the required length _DIS t, i.e., t _dis ≤t ₄ -t _3.

Similar to the foregoing embodiment, in order to avoid charge leakage caused by frequent switching of switches, a first buffer stage (corresponding to the time period t ₄ to t ₅ in FIG. 6) may be included after the charge and discharge stage. In the buffer phase, the charge on the detection capacitor Cx, the calibration capacitor Cc, the shielding capacitor Cshd, the first capacitor Cm, and the integrating capacitor 451 remain unchanged. Specifically, in the first buffer phase, the first switch S1 to the eighth switch S8 Are all disconnected.

After that, in the charge transfer phase (corresponding to the time period t ₅ to t _{6 in} FIG. 6 ), the fifth switch S5 is closed, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, and the sixth switch S6, the seventh switch S7, and the eighth switch S8 are all off. Due to the virtual short characteristic of the amplifier, the voltages of the negative input terminal of the amplifier 452 and the positive input terminal of the amplifier are equal, that is, both are the reference voltage V _R. Therefore, the calibration The voltages of the upper plate of the capacitor Cc and the left plate of the integrating capacitor 451 are clamped to the reference voltage V _R , due to the false interruption characteristic of the amplifier, during the time period t ₅ to t ₆ , the calibration capacitor 420 is stored The charge will be redistributed on the calibration capacitor Cc and the integrating capacitor 451. The charge balance equation is shown in formula (20):

Wherein, the C _s is the capacitance value of the integrating capacitor 451, the V _R C _c is the amount of charge stored on the calibration capacitor 420 after the charge transfer, and the (V _R -V _OUT )·C _S is The amount of charge stored on the integrating capacitor 451 after the charge transfer.

According to formula (9), the output voltage V _{out of the} integrator 450 can be obtained as shown in the following formula:

It can be seen from formula (21) that by controlling the capacitance value C _{c of the} calibration capacitor and the current value I ₁ of the first current source, the current value I _{2 of} the second current source satisfies C _C -C _X I ₂ /I ₁ = 0, thereby detecting that the capacitance value of the capacitor when the reference capacitance value, the output voltage of the integrator 450 as the reference voltage V _R, that is, when the user does not operate the capacitive sensor, the output voltage of the integrator to a reference voltage V _R .

It can be seen from the formula C _C =C _X I ₂ /I ₁ that, as long as I ₂ /I ₁ <1 is set, C _C <C _X can be made, so that the purpose of reducing the capacitance value of the calibration capacitor can be achieved.

Similar to the foregoing embodiment, after the charge transfer phase, a second buffer phase (corresponding to the time period t ₆ to t ₇ in FIG. 6) may be included. In the second buffer phase, the detection capacitor 410 and the calibration capacitor 420 are , The charges on the shielding capacitor Cshd, the first capacitor Cm and the integrating capacitor 451 remain unchanged. Specifically, during the second buffer stage, the first switch S1 to the eighth switch S8 are all turned off.

Optionally, in this embodiment, the actions from the charging and discharging phase to the second buffering phase can also be repeated multiple times, which will not be repeated here. Then, when the above operation process is repeated N times, the output voltage of the integrator 450 is:

When C _C = C _X I ₂ /I ₁ is satisfied, when the capacitance value of the detection capacitor changes, for example, when the capacitance value of the detection capacitor changes from the reference capacitance value C _x to C _x +ΔC _x , the integral The output voltage of the converter 450 is:

It can be seen from formula (23) that repeating the above operation process several times is beneficial to improve the sensitivity of capacitance detection.

Therefore, the capacitance detection circuit of the embodiment of the present application first charges the detection capacitor and the calibration capacitor, and then discharges the detection capacitor and the calibration capacitor through the first current source and the second current source, respectively, so as to pass the first current. The proportional relationship between the current values of the power source and the second current source is the purpose of controlling the proportional relationship between the reference capacitance value and the capacitance value of the calibration capacitor. Therefore, it is only necessary to set the current value of the first current source to be greater than that of the second current source. The current value of, can achieve the purpose of reducing the capacitance value of the calibration capacitor, thereby reducing the area of the capacitance detection circuit and reducing the cost of the chip.

By time-sharing the shielding electrode and the sensing electrode, it can be seen from formula (10) that the output voltage of the integrator has nothing to do with the first capacitor Cm formed between the shielding electrode and the sensing electrode. In this way, even the presence of water droplets causes Cm Changes will not affect the output of the integrator, that is, a good waterproof function can be achieved, and there will be no delay problems caused by simultaneous driving. In addition, since the charging of the shielding electrode and the charging of the sensing electrode are performed in a time-sharing manner, the requirement on the driving capability of the shielding electrode can be greatly reduced, and the design difficulty and power consumption can be reduced.

In other embodiments, the circuits shown in Figures 3 and 5 can also be used to form a differential circuit, and the difference between the output voltages of the two integrators can be further used to determine whether there is a touch, which is conducive to suppressing common mode noise and improving the accuracy of touch detection. Spend.

The embodiment of the present application also provides a touch control device. FIG. 7 shows a schematic structural diagram of the touch control 600 of the embodiment of the present application. As shown in FIG. 7, the touch control device 600 may include a capacitance detection circuit 601. The capacitance detection circuit 601 may be the capacitance detection circuit described in the foregoing embodiment. Optionally, the touch device may be a capacitive sensor, and the user may operate the sensing area of the capacitive sensor. In this way, a capacitance effect can be generated between the user and the sensing area. Further, the capacitance detection circuit may The effect is converted into a voltage signal, and then the voltage signal can be converted into a digital signal. Further, the information of the user operating the capacitive sensor can be determined based on the digital signal, for example, information such as touch position.

An embodiment of the present application also provides a terminal device. FIG. 8 shows a schematic structural diagram of a terminal device 700 of an embodiment of the present application. As shown in FIG. 8, the terminal device may include a capacitance detection circuit 701. The detection circuit 701 may be the capacitance detection circuit described in the foregoing embodiment, and the capacitance detection circuit may be used to detect information about a user operating the capacitance detection circuit, such as information such as a touch position.

As an example and not a limitation, the terminal device 700 may be a mobile phone, a tablet computer, a notebook computer, a desktop computer, an in-vehicle electronic device, or a wearable smart device.

The above are only specific implementations of this application, but the protection scope of this application is not limited to this. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed in this application. Should be covered within the scope of protection of this application. Therefore, the protection scope of this application should be subject to the protection scope of the claims.

Claims

A capacitance detection circuit, connected to a detection capacitor, is characterized in that it comprises:

Calibration capacitor;

A shield electrode, the shield electrode and the detection electrode of the detection capacitor form a first capacitor, and the shield electrode and the system ground form a shield capacitor;

The charging and discharging module includes a first current source and a second current source. The first current source is used to charge or discharge the detection capacitor, the first capacitor, and the shielding capacitor, and the second current source For charging or discharging the calibration capacitor;

A shielding electrode driving module for charging or discharging the shielding capacitor and the first capacitor;

The integrator is used to convert the capacitance of the detection capacitor into a voltage signal;

The control module is used to control the working state of the charge and discharge module, the integrator and the shield electrode drive module;

Wherein, in the first charging and discharging stage, the shielding electrode driving module charges or discharges the shielding capacitor and the first capacitor so that the voltage on the shielding capacitor is a reference voltage;

In the second charging and discharging phase after the first charging and discharging phase, the first current source charges or discharges the detection capacitor, the first capacitor, and the shielding capacitor, and the second current source uses In charging or discharging the calibration capacitor, in the second charging and discharging stage, the voltage on the detection capacitor is charged to the reference voltage or discharged to the reference voltage.
The capacitance detection circuit according to claim 1, wherein the capacitance detection circuit further comprises a charge and discharge switch group, a clear switch group, and an integration switch group, the integrator comprises an integration capacitor and an amplifier, and the shield electrode The drive module includes a voltage buffer;

The control module is specifically used for:

In the charge clearing stage, the charge stored on the integrating capacitor is cleared by the clearing switch group;

In the first charging and discharging stage, controlling the voltage buffer to charge or discharge the detection capacitor, the first capacitor and the shielding capacitor through the charging and discharging switch group;

In the second charging and discharging stage, the first current source and the second current source are controlled by the charging and discharging switch group to charge or discharge the detection capacitor and the calibration capacitor, respectively, wherein the The charging duration of the calibration capacitor is equal to the charging duration of the detection capacitor, or the discharge duration of the calibration capacitor is the same as the discharge duration of the detection capacitor;

In the charge transfer phase, part of the charge stored on the calibration capacitor is controlled by the integration switch group to be transferred to the integration capacitor.
The capacitance detection circuit according to claim 2, wherein the charging and discharging switch group includes a first switch, a second switch, a third switch, a fourth switch, a seventh switch, and an eighth switch, and the integrating switch group includes a fifth switch. A switch, the clearing switch group includes a sixth switch;

One end of the first switch is connected to one end of the first current source, the other end of the first current source is connected to the power supply voltage, and the other end of the first switch is connected to one end of the detection capacitor and the third One end of the switch and one end of the first capacitor, the other end of the detection capacitor and the other end of the third switch are all grounded;

One end of the second switch is connected to one end of the second current source, the other end of the second current source is connected to the power supply voltage, and the other end of the second switch is connected to one end of the calibration capacitor and the fourth One end of the switch, the other end of the calibration capacitor and the other end of the fourth switch are all grounded;

One end of the fifth switch is connected to one end of the calibration capacitor, the other end of the fifth switch is connected to the first input terminal of the amplifier, and the second input terminal of the amplifier is used to input the reference voltage;

The sixth switch is connected in parallel with the integration capacitor, and the integration capacitor is connected in parallel with the amplifier;

One end of the seventh switch is grounded, and the other end of the seventh switch is connected to one end of the eighth switch and one end of the shielding capacitor;

The other end of the eighth switch is connected to the output end of the capacitor buffer, and the output voltage of the capacitor buffer is the reference voltage.
The capacitance detection circuit according to claim 3, characterized in that, between the charge zeroing phase and the first charging and discharging phase, it further comprises a complete discharge phase, and in the complete discharge phase, the detection capacitor, The charges on the calibration capacitor, the first capacitor and the shielding capacitor are cleared.
The capacitance detection circuit according to claim 4, wherein:

In the charge clearing phase, the sixth switch is closed, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, and the seventh switch And the eighth switch are both disconnected, and the charge stored on the integrating capacitor is cleared;

In the complete discharge phase, the third switch, the fourth switch, and the seventh switch are closed, and the first switch, the second switch, the fifth switch, the sixth switch, and the eighth switch are closed. The switches are all turned off, and the charges stored on the detection capacitor, the calibration capacitor, the first capacitor and the shielding capacitor are cleared;

In the first charging and discharging stage, the eighth switch is closed, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the All the seventh switches are turned off, and the capacitance buffer charges the detection capacitor and the first capacitor;

In the second charging and discharging stage, the first switch, the second switch, and the eighth switch are closed, and the third switch, the fourth switch, the fifth switch, the sixth switch, and the seventh switch are closed. The switches are all turned off, the voltage on the detection capacitor is charged to the reference voltage, and after the voltage on the detection capacitor is charged to the reference voltage, the first switch and the second switch are turned off ；

In the charge transfer phase, the fifth switch is closed, and the first switch, the second switch, the third switch, the fourth switch, the sixth switch, the seventh switch, and the eighth switch are closed. The switches are all turned off, and part of the charge on the calibration capacitor is transferred to the integrating capacitor.
The capacitance detection circuit according to claim 4 or 5, wherein a first buffer stage is further included between the second charge and discharge stage and the charge transfer stage, and a first buffer stage is further included after the charge transfer stage. A second buffering stage, where the first buffering stage and the second buffering stage are used to keep the charges on the detection capacitor, the calibration capacitor, and the integration capacitor unchanged;

Wherein, in the first buffer stage and the second buffer stage, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, and the first switch The sixth switch, the seventh switch, and the eighth switch are all turned off.
The capacitance detection circuit according to claim 6, wherein the control module is further used for:

The charge and discharge switch group, the integral switch group, and the clear switch group are controlled to repeatedly perform operations from the full discharge stage to the second buffer stage for multiple times.
The capacitance detection circuit according to claim 7, wherein the output voltage V out of the integrator is:

Wherein the said reference voltage V R, the change amount ΔC x with respect to the base capacitance of the detecting capacitor detecting capacitor C S is the capacitance value of the integrating capacitor, the I 1 is the current value of the first current source, the I 2 is the current value of the second current source, and the N is the number of executions from the charge-discharge stage to the second buffer stage.
The capacitance detection circuit according to claim 2, wherein the charging and discharging switch group includes a first switch, a second switch, a third switch and a fourth switch, a seventh switch and an eighth switch, and the integrating switch group includes a fifth switch. A switch, the clearing switch group includes a sixth switch;

One end of the first switch is connected to one end of the first current source, the other end of the first current source is grounded, and the other end of the first switch is connected to one end of the detection capacitor and the third switch. One end and one end of the first capacitor, the other end of the detection capacitor is grounded, and the other end of the third switch is connected to a power supply voltage;

One end of the second switch is connected to one end of the second current source, the other end of the second current source is grounded, and the other end of the second switch is connected to one end of the calibration capacitor and the fourth switch. One end, the other end of the calibration capacitor is grounded, and the other end of the fourth switch is connected to the power supply voltage;

One end of the fifth switch is connected to one end of the calibration capacitor, the other end of the fifth switch is connected to the first input terminal of the amplifier, and the second input terminal of the amplifier is used to input the reference voltage; The sixth switch is connected in parallel with the integrating capacitor, and the integrating capacitor is connected in parallel with the amplifier;

One end of the seventh switch is connected to the power supply voltage, and the other end of the seventh switch is connected to one end of the shielding capacitor and one end of the eighth switch;

The other end of the eighth switch is connected to the output end of the voltage buffer, and the output voltage of the capacitor buffer is the reference voltage.
The capacitance detection circuit according to claim 9, characterized in that, between the charge zero phase and the first charging and discharging phase, it further comprises a full charging phase, and in the full charging phase, the detection capacitor, One end of the calibration capacitor, the shielding capacitor, and the first capacitor is charged to a power supply voltage.
The capacitance detection circuit according to claim 10, wherein in the charge zero phase, the sixth switch is closed, and the first switch, the second switch, the third switch, and the The fourth switch, the fifth switch, the seventh switch, and the eighth switch are all turned off, and the charge stored on the integrating capacitor is cleared;

In the full charging phase, the third switch, the fourth switch, and the seventh switch are closed, and the first switch, the second switch, the fifth switch, the sixth switch, and the eighth switch are all closed. When disconnected, the voltages on the detection capacitor, the calibration capacitor, the shielding capacitor, and the first capacitor are all charged to the power supply voltage;

In the first charging and discharging stage, the eighth switch is closed, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the The seventh switches are all turned off, and the capacitance buffer discharges the detection capacitor, the shielding capacitor, and the first capacitor;

In the second charging and discharging stage, the first switch, the second switch, and the eighth switch are closed, and the third switch, the fourth switch, the fifth switch, and the sixth switch are closed. The seventh switch is all turned off, the voltage on the detection capacitor is discharged from the power supply voltage to the reference voltage, and after the voltage on the detection capacitor is discharged to the reference voltage, the first switch and The second switch is off;

In the charge transfer phase, the fifth switch is closed, and the first switch, the second switch, the third switch, the fourth switch, the sixth switch, the seventh switch, and the eighth switch are closed. The switches are all turned off, and part of the charge on the calibration capacitor is transferred to the integrating capacitor.
The capacitance detection circuit according to claim 11, wherein a first buffer stage is further included between the second discharge stage and the charge transfer stage, and a second buffer stage is further included after the charge transfer stage. , The first buffer stage and the second buffer stage are used to keep the charge on the detection capacitor, the calibration capacitor, the first capacitor, the second capacitor, and the integration capacitor unchanged;

Wherein, in the first buffer stage and the second buffer stage, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, and the first switch The sixth switch, the seventh switch and the eighth switch are all off.
The capacitance detection circuit according to claim 12, wherein the control module is further configured to:

The charge and discharge switch group, the integral switch group, and the clear switch group are controlled to repeatedly perform operations from the charge and discharge stage to the second buffer stage for multiple times.
The capacitance detection circuit according to claim 13, wherein the output voltage V out of the integrator is:

Wherein, V R is the reference voltage, the detecting capacitor ΔC x is the amount of change to the reference capacitance, the C S is the capacitance value of the integration capacitor, said I 1 is the first The current value of the current source, the I 2 is the current value of the second current source, the V DD is the power supply voltage, and the N is the number of executions from the charge-discharge stage to the second buffer stage .
The capacitance detection circuit according to any one of claims 1 to 14, wherein the capacitance detection circuit further comprises a comparator, the first input terminal of the comparator is connected to the detection capacitor, and the comparator The second input terminal is used to input the reference voltage, and the output terminal of the comparator is connected to the control module;

When the voltage of the detection capacitor reaches the reference voltage, the output signal of the comparator is inverted, and the control module controls the charging and discharging module to stop charging or discharging the detection capacitor and the calibration capacitor.
The capacitance detection circuit according to any one of claims 1 to 15, wherein the capacitance detection circuit further comprises a processing module for determining the relative capacitance of the detection capacitor according to the output voltage of the integrator The amount of change in the basic capacitance of the detection capacitor.
The capacitance detection circuit according to any one of claims 1 to 16, wherein the calibration capacitor is used to make the output voltage of the integrator a reference when the capacitance value of the detection capacitor is a reference capacitance value Voltage, wherein the ratio of the reference capacitance value to the capacitance value of the calibration capacitor is equal to the ratio of the current value of the first current source to the current value of the second current source.
The capacitance detection circuit according to any one of claims 1 to 17, wherein the current value of the first current source is greater than the current value of the second current source.
The capacitance detection circuit according to any one of claims 1 to 18, wherein the capacitance detection circuit is applied to a capacitance sensor, the detection capacitor is the sensor capacitance of the capacitance sensor, and the capacitance is not operated. The capacitance value of the sensor capacitance in the sensor is the reference capacitance value.
A touch device is characterized in that it comprises:

The capacitance detection circuit according to any one of claims 1 to 19.
A terminal device, characterized in that it comprises:

The capacitance detection circuit according to any one of claims 1 to 19.