WO2021166347A1 - Information processing device, information processing method, and program - Google Patents

Information processing device, information processing method, and program Download PDF

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Publication number
WO2021166347A1
WO2021166347A1 PCT/JP2020/042909 JP2020042909W WO2021166347A1 WO 2021166347 A1 WO2021166347 A1 WO 2021166347A1 JP 2020042909 W JP2020042909 W JP 2020042909W WO 2021166347 A1 WO2021166347 A1 WO 2021166347A1
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cost
information processing
calculation
sequences
data
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French (fr)
Japanese (ja)
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亮志 池谷
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ソニーグループ株式会社
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means

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  • This technology is related to information processing equipment. More specifically, the present invention relates to an information processing apparatus that performs processing related to a neural network, an information processing method, and a program that causes a computer to execute the information processing method.
  • design support is provided when implementing a neural network in hardware by displaying the amount of memory and the amount of calculation.
  • the design efficiency may decrease. For example, if the setting related to the calculation order of the functions in the neural network is changed, the amount of memory and the amount of calculation may fluctuate. In this case, in order to optimize the amount of memory and the like, it is necessary to repeat the operation of changing the setting, which may reduce the design efficiency due to the complicated operation.
  • This technology was created in view of this situation, and aims to improve design efficiency in information processing devices that support hardware design related to neural networks.
  • the present technology has been made to solve the above-mentioned problems, and the first aspect thereof is used in each of the plurality of nodes based on the mutual connection relationship of the plurality of nodes forming the neural network.
  • An analysis unit that obtains a plurality of operation sequences for calculating a function to be performed, a cost acquisition unit that obtains a cost required for the operation of the function for each of the plurality of operation orders, and each of the plurality of operation orders and the above cost.
  • This is an information processing device including a display control unit that displays the information in association with the display unit, an information processing method, and a program that causes a computer to execute the method. This has the effect of improving the design efficiency of hardware related to neural networks.
  • the display control unit selects one of the plurality of operation sequences according to the operation of the user, and the selected operation order, the cost corresponding to the operation order, and the connection relationship. May be displayed. This has the effect of displaying the selected arithmetic order, cost, and coupling relationship.
  • the display control unit may display a table in which each of the plurality of calculation sequences and the cost are associated with each other on the display unit. This has the effect of displaying a table in which each of the plurality of operation sequences is associated with the cost.
  • the cost may include at least one of memory capacity, number of memory accesses and memory bandwidth. This has the effect of displaying at least one of the memory capacity, the number of memory accesses, and the memory bandwidth for each calculation order.
  • the above cost may include the processing time. This has the effect of displaying the processing time for each calculation order.
  • the cost may include at least one of the usage efficiency of the arithmetic unit and the degree of parallelism of the arithmetic. This brings about the effect that at least one of the usage efficiency of the arithmetic unit and the degree of parallelism of the above arithmetic is displayed for each arithmetic order.
  • FIG. 1 is a block diagram showing a configuration example of a design support system according to the first embodiment of the present technology.
  • This design support system is a system for supporting the design when implementing the neural network in hardware.
  • the design support system includes a learning framework 110, an information processing device 200, a conversion unit 120, and a hardware design tool 130.
  • the learning framework 110 generates an inference model based on the input data set.
  • Data sets such as image data and audio data are input to the learning framework 110.
  • the learning framework 110 performs machine learning based on the dataset and generates an inference model for predicting which class the input data belongs to.
  • This inference model includes, for example, a program for reproducing a neural network on a computer and a coefficient file.
  • the coefficient file sets the weighting coefficient for the data input / output to the nodes in the neural network.
  • the neural network for example, a convolutional neural network (CNN) is used as the neural network.
  • CNN convolutional neural network
  • the learning framework 110 supplies the inference model (program and coefficient file) to the information processing device 200.
  • the information processing device 200 obtains the calculation order of the functions in the neural network based on the inference model.
  • the information processing device 200 analyzes the inference model and obtains all the plurality of calculation sequences for calculating the function. Then, the information processing apparatus 200 obtains and displays the cost required for the calculation for each calculation order. The user examines the display contents, determines the optimum calculation order, operates the information processing apparatus 200, and causes the conversion unit 120 to output the calculation order sequence that defines the calculation order together with the program.
  • the conversion unit 120 converts the code into machine language.
  • a compiler is used as the conversion unit 120.
  • the conversion unit 120 generates a code for performing an operation in the operation order defined in the operation order sequence based on the program and the operation order sequence, and converts the code into a machine language. Then, the conversion unit 120 supplies the machine language to the hardware design tool 130.
  • the hardware design tool 130 generates a circuit in which a neural network is hardware-mounted based on a machine language.
  • the learning framework 110 and the conversion unit 120 are also provided outside the information processing device 200, these can also be arranged inside the information processing device 200.
  • FIG. 2 is a block diagram showing a configuration example of the information processing apparatus 200 according to the first embodiment of the present technology.
  • the information processing device 200 includes an analysis unit 210, a cost acquisition unit 220, a display control unit 230, a storage unit 240, a calculation order determination unit 250, and a display unit 260.
  • the storage unit 240 stores data used in the information processing device 200.
  • a memory or the like is used as the storage unit 240.
  • the learning framework 110 outputs the neural network program 241 and the coefficient file 242, which are stored in the storage unit 240.
  • the analysis unit 210 analyzes the neural network program 241 and obtains all the calculation orders of the functions.
  • the analysis unit 210 obtains a plurality of calculation sequences for calculating the function used in each of the nodes based on the mutual connection relationship of the plurality of nodes forming the neural network. Then, the analysis unit 210 supplies the data indicating the calculation order to the cost acquisition unit 220.
  • the cost acquisition unit 220 obtains the cost required for the operation of the function for each operation order.
  • the cost includes, for example, at least one of a memory capacity, a number of memory accesses, a memory bandwidth, a processing time, an arithmetic unit usage efficiency, and a degree of parallelism of arithmetic operations.
  • the cost acquisition unit 220 reads out the neural network program 241 and the coefficient file 242 from the storage unit 240, and obtains the cost when each of the calculation orders is calculated by the predetermined hardware in that order. Then, the cost acquisition unit 220 supplies each of the calculation sequences to the display control unit 230 together with the corresponding cost.
  • the display control unit 230 causes the display unit 260 to display each of the calculation sequences and the corresponding costs.
  • the display unit 260 displays the screen according to the control of the display control unit 230.
  • a liquid crystal monitor or the like is used as the display unit 260.
  • the calculation order determination unit 250 determines the calculation order according to the operation of the user.
  • the user refers to and examines the cost for each calculation order displayed on the display unit 260, operates the information processing apparatus 200, and specifies the optimum calculation order.
  • the operation order determination unit 250 generates an operation order sequence definition file 243 indicating a specified operation order according to a user operation, and stores the operation order sequence definition file 243 in the storage unit 240.
  • the neural network program 241 and the arithmetic sequence sequence definition file 243 are output to the conversion unit 120.
  • the storage unit 240 and the display unit 260 are arranged in the information processing device 200, at least one of these can be provided outside the information processing device 200.
  • the storage unit 240 may be arranged in the server via a network.
  • FIG. 3 is a diagram showing an example of the structure of the neural network according to the first embodiment of the present technology.
  • the figure shows an example of a neural network reproduced on a computer by the neural network program 241.
  • This neural network is formed by a plurality of layers such as layers 1 to 6.
  • a plurality of nodes such as node 301 are provided in each layer.
  • each of the layers is combined with at least one other layer.
  • layer 1 is combined with layers 2 and 4.
  • Layer 2 is combined with layers 1 and 3.
  • Layer 3 is combined with layers 2 and 5.
  • Layer 4 is combined with layers 1 and 5.
  • Layer 5 is combined with layers 3 and 6.
  • the connection relationship between the layers is not limited to that illustrated in the figure.
  • FIG. 4 is a diagram showing an example of the connection relationship of layers in the neural network in the first embodiment of the present technology.
  • the nodes in the layer of the neural network illustrated in FIG. 3 are omitted, and the functions in the layer are shown.
  • “Input Dataset” indicates that the data set is input to layer 1.
  • Convolution Kernels hepe: 5,5" indicates a convolution operation using a kernel.
  • the kernel is also called a filter.
  • 5,5" indicates the size of the kernel (filter).
  • a neural network that performs a convolutional operation in this way is called a CNN.
  • Batch Normalization indicates a batch normalization process that forcibly optimizes the output of the layer so that the distribution of the parameters of the intermediate layer becomes appropriate.
  • ReLU Rectified Linear Unit
  • 64,14,14 indicates that the number of maps is 64 and the individual sizes of the feature maps are 14 ⁇ 14.
  • Average Pooling indicates an average pooling process in which the input feature map is divided into a plurality of pooling areas and the average value of each area is calculated.
  • each layer is not limited to the one illustrated in the figure.
  • an activation function other than the normalized linear function such as a step function or a linear combination
  • a pooling process other than the average pooling process such as a max pooling process, can be performed.
  • a function is used in each layer.
  • a function representing the kernel or a rectified linear function is used.
  • the order of operations of these functions can be changed based on the connection relationships between the layers.
  • the layer 2 of the subsequent stage is combined with the layer 3 of the subsequent stage, and the layer 5 of the subsequent stage is combined with the layers 3 and 4. Therefore, if the operation of the function of the layer 2 is executed before the layer 3 and the operation of the functions of the layers 3 and 4 is performed before the layer 5, the operation order of the layers 2 to 4 is arbitrary.
  • the cost required for the operation of the operation order may change.
  • FIG. 5 is a diagram for explaining the number of data held when the layer 1 function in the first embodiment of the present technology is calculated.
  • Conv indicates a convolution operation.
  • Act indicates batch normalization processing and normalization linear function operations. It is assumed that 200 pieces of data are output by the calculation of layer 1. Since these data are used in layers 2 and 4, they are stored in the storage unit 240.
  • FIG. 6 is a diagram for explaining the number of data held when the second layer 2 function is calculated in the first embodiment of the present technology. It is assumed that, for example, 150 pieces of data are output by the calculation of the function of the layer 2. Since these data are used in layer 3, they are stored in the storage unit 240. By adding 150 pieces of data, the number of data in the storage unit 240 becomes 350 pieces.
  • FIG. 7 is a diagram for explaining the number of data held when the third layer 3 function is calculated in the first embodiment of the present technology. It is assumed that 75 pieces of data are output by the calculation of the function of the layer 3. Since these data are used in layer 5, they are stored in the storage unit 240. By adding 75 data, the number of data in the storage unit 240 becomes 425. Then, the 150 data output in the layer 2 are deleted from the storage unit 240 because they are no longer needed. By deleting 150 data, the number of data in the storage unit 240 becomes 275.
  • FIG. 8 is a diagram for explaining the number of data held when the fourth layer 4 function is calculated in the first embodiment of the present technology. It is assumed that 50 pieces of data are output by the calculation of the function of the layer 4. Since these data are used in layer 5, they are stored in the storage unit 240. By adding 50 data, the number of data in the storage unit 240 becomes 325. Then, since the 200 data output in layer 1 are no longer needed, they are deleted from the storage unit 240. By deleting 200 pieces of data, the number of data in the storage unit 240 becomes 125 pieces.
  • FIG. 9 is a diagram for explaining the number of data held when the fifth layer 5 function is calculated in the first embodiment of the present technology. It is assumed that 75 pieces of data are output by the calculation of the function of the layer 5. These data are stored in the storage unit 240 for later calculation. By adding 75 data, the number of data in the storage unit 240 becomes 200. Then, the 125 data output in the layers 3 and 5 are deleted from the storage unit 240 because they are no longer needed. By deleting 125 data, the number of data in the storage unit 240 becomes 75.
  • the maximum number of data in the storage unit 240 is 425 when the data of layer 3 is added in FIG. Is.
  • FIG. 10 is a diagram for explaining the number of data held when the second layer 4 function is calculated in the first embodiment of the present technology. It is assumed that, for example, 50 pieces of data are output by the calculation of the function of the layer 4. Since these data are used in layer 5, they are stored in the storage unit 240. By adding 50 data, the number of data in the storage unit 240 becomes 250.
  • FIG. 11 is a diagram for explaining the number of data held when the third layer 2 function is calculated in the first embodiment of the present technology. It is assumed that 150 pieces of data are output by the calculation of the function of the layer 2. Since these data are used in layer 3, they are stored in the storage unit 240. By adding 150 pieces of data, the number of data in the storage unit 240 becomes 400 pieces. Then, since the 200 data output in layer 1 are no longer needed, they are deleted from the storage unit 240. By deleting 200 pieces of data, the number of data in the storage unit 240 becomes 200 pieces.
  • FIG. 12 is a diagram for explaining the number of data held when the fourth layer 3 function is calculated in the first embodiment of the present technology. It is assumed that 75 pieces of data are output by the calculation of the function of the layer 3. Since these data are used in layer 5, they are stored in the storage unit 240. By adding 75 data, the number of data in the storage unit 240 becomes 275. Then, the 150 data output in the layer 2 are deleted from the storage unit 240 because they are no longer needed. By deleting 150 pieces of data, the number of data pieces in the storage unit 240 becomes 125 pieces.
  • the maximum number of data in the storage unit 240 is 400 when the data of layer 2 is added in FIG. Is.
  • the storage unit 240 (memory or the like) is used.
  • the maximum number of data to be retained is different. If the maximum value of the number of data is different, the memory capacity required for the calculation will also be different. For example, the memory capacity can be obtained by multiplying the maximum value of the number of data by the individual data sizes. In this way, the required memory capacity may change due to the change in the calculation order. The same applies to costs other than memory capacity (processing time, operating efficiency of arithmetic units, etc.).
  • the information processing apparatus 200 obtains all the plurality of calculation orders for calculating the function used in the node based on the connection relationship between the layers (in other words, the connection relationship between the nodes). Then, as illustrated in FIGS. 5 to 12, the information processing apparatus 200 obtains the cost for each calculation order and displays it in association with the calculation order.
  • FIG. 13 is a diagram showing an example of a screen before displaying the calculation result in the first embodiment of the present technology.
  • a box 400 including the layer name and the function in the layer is displayed for each layer.
  • a line 401 indicating a connection relationship is wired between the corresponding boxes 400.
  • the operation button 421 for switching the calculation order and the operation button 422 for displaying the calculation result are displayed at predetermined positions.
  • the information processing device 200 can also edit the structure of the neural network according to the operation of the user. In editing, layers are added or deleted, the connection relationship between layers is changed, and functions in the layers are set. In addition, the information processing device 200 can also perform machine learning in the displayed neural network according to the user's operation. The GUI (Graphical User Interface) for these operations is omitted in the figure.
  • FIG. 14 is a diagram showing an example of a display screen of a calculation result according to the first embodiment of the present technology.
  • FIG. 13 is a screen when the operation button 422 is operated in FIG. After the operation, a numerical mark 410 indicating the operation order of the corresponding function is displayed in the vicinity of each of the boxes 400. Further, a table 430 showing a cost name and a cost value is displayed at a predetermined position for each cost.
  • FIG. 15 is a diagram showing an example of another calculation result display screen according to the first embodiment of the present technology.
  • FIG. 6 is a screen that can be switched when the user operates the operation button 421 on the display screen of FIG.
  • the numerical marks in the thick frame in FIG. 15 indicate the places where the numerical values are switched.
  • Numerical marks 410 of 1, 3, 4, 2, 5 and 6, respectively, are displayed in the vicinity of the boxes 400 of layers 1, 2, 3, 4, 5 and 6. This means that the operations were performed in the order of layers 1, 4, 2, 3, 5 and 6.
  • the cost value in the table 430 is switched to the value (X2, etc.) when the calculation is performed in this calculation order.
  • the information processing apparatus 200 selects one of a plurality of calculation sequences according to the user's operation, and the calculation sequence and the corresponding cost, and the connection relationship between the layers (nodes). Is displayed.
  • the user compares the display screens of FIGS. 14 and 15 and determines the optimum calculation order. For example, when the memory capacity of the hardware to be mounted is relatively small, the operation order with the smaller required memory capacity is preferentially selected. Then, the user operates the information processing apparatus 200 to output an operation order sequence that defines the operation order.
  • the information processing device 200 covers all of the calculation order and displays the cost for each calculation order, the user can determine the optimum calculation order by referring to the display screen. Thereby, the design efficiency can be improved.
  • FIG. 16 is a flowchart showing an example of the operation of the information processing apparatus 200 according to the first embodiment of the present technology. This operation is started, for example, when a predetermined application for displaying the cost is executed.
  • the information processing device 200 analyzes the program and obtains the entire calculation order of the functions (step S901). Then, the information processing apparatus 200 obtains the cost for each calculation order (step S902). Subsequently, the information processing apparatus 200 displays the cost together with the calculation order and the connection relationship (step S903). The information processing device 200 outputs a sequence of calculation sequences according to a user operation (step S904). After step S904, the information processing apparatus 200 ends the operation for display.
  • the information processing apparatus 200 seeks and displays the cost for each of the plurality of calculation sequences, the user refers to the display screen and displays the optimum calculation sequence. Can be determined. As a result, the design efficiency at the time of hardware mounting can be improved.
  • the information processing apparatus 200 displays the calculation order selected according to the operation of the user and the corresponding cost, but in this configuration, when comparing a plurality of calculation orders, the calculation order is displayed. It is necessary to perform an operation to switch the screen.
  • the information processing apparatus 200 of the second embodiment is different from the first embodiment in that the information processing device 200 of the second embodiment displays a table in which each of the plurality of calculation sequences is associated with the cost to improve convenience.
  • FIG. 17 is a diagram showing an example of a display screen of a calculation result in the second embodiment of the present technology. As illustrated in the figure, a table in which each of the plurality of calculation sequences and the cost are associated with each other is displayed on the display screen. If run on the command line, this table will be displayed with standard output.
  • layers 1 to 6 are arranged in the calculation order.
  • the cost values of the memory capacity, the processing time, and the usage efficiency of the arithmetic unit are displayed for each arithmetic order.
  • the memory capacity, processing time, and usage efficiency of the calculator are X1, Y1, and Z1, respectively.
  • the memory capacity, the processing time, and the usage efficiency of the calculator are X2, Y2, and Z2, respectively.
  • the memory capacity, processing time, and usage efficiency of the calculator are X3, Y3, and Z3, respectively.
  • the information processing device 200 can also sort a plurality of calculation orders in ascending or descending order of costs specified by the user according to the user's operation. For example, when the user specifies the memory capacity among the memory capacity, the processing time, and the usage efficiency of the arithmetic unit, the information processing apparatus 200 sorts the arithmetic order in ascending order of the memory capacity.
  • the information processing device 200 can also save the execution result in a file.
  • the information processing apparatus 200 displays a table in which each of the plurality of calculation sequences is associated with the cost, so that the user switches the screen when comparing the plurality of calculation sequences. It is not necessary and convenience can be improved.
  • the information processing device 200 adds an operation button for switching to the table display of the second embodiment on the display screens of FIGS. 13 to 16 of the first embodiment, and displays the information according to the user's operation. You can also switch.
  • the information processing apparatus 200 displays a table in which each of the plurality of calculation sequences is associated with the cost, so that the convenience of the user can be improved. can.
  • the processing procedure described in the above-described embodiment may be regarded as a method having these series of procedures, or as a program for causing a computer to execute these series of procedures or as a recording medium for storing the program. You may catch it.
  • this recording medium for example, a CD (Compact Disc), MD (MiniDisc), DVD (Digital Versatile Disc), memory card, Blu-ray Disc (Blu-ray (registered trademark) Disc) and the like can be used.
  • the present technology can have the following configurations.
  • An analysis unit that obtains a plurality of calculation sequences for calculating a function used in each of the plurality of nodes based on the mutual connection relationship of a plurality of nodes forming a neural network.
  • a cost acquisition unit for obtaining the cost required for the operation of the function for each of the plurality of operation sequences,
  • An information processing device including a display control unit that displays each of the plurality of calculation sequences and the cost in association with each other on the display unit.
  • the display control unit selects one of the plurality of operation sequences according to the operation of the user and displays the selected operation order, the cost corresponding to the operation order, and the connection relationship (1).
  • a cost acquisition procedure for obtaining the cost required for the operation of the function for each of the plurality of operation sequences
  • a program for causing a computer to execute a display control procedure for displaying each of the plurality of calculation sequences and the cost in association with each other on the display unit.

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Abstract

The present invention improves design efficiency in an information processing device that aids neural network-related hardware design.　In the present invention, an analysis unit obtains, on the basis of connection relations of a plurality of nodes that constitute a neural network, a plurality of calculation orders for calculating functions which are used respectively at the plurality of nodes. A cost acquisition unit obtains, for each of the plurality of calculation orders, the cost necessary for calculating the functions. A display control unit displays on a display unit the plurality of calculation orders and the costs in a manner associated with each other.

Description

情報処理装置、情報処理方法、および、プログラムInformation processing equipment, information processing methods, and programs
　本技術は、情報処理装置に関する。詳しくは、ニューラルネットワークに関する処理を行う情報処理装置、および、情報処理方法ならびに当該方法をコンピュータに実行させるプログラムに関する。 This technology is related to information processing equipment. More specifically, the present invention relates to an information processing apparatus that performs processing related to a neural network, an information processing method, and a program that causes a computer to execute the information processing method.
　近年、画像認識や音声認識などの分野において、人間の脳神経系の仕組みをコンピュータ上に再現したニューラルネットワークに関する開発や研究が進められてる。例えば、ニューラルネットワークの処理に必要なメモリ量や演算量を求め、画面に表示する情報処理装置が提案されている（例えば、特許文献１参照。）。 In recent years, in fields such as image recognition and voice recognition, development and research on neural networks that reproduce the mechanism of the human cranial nerve system on a computer are underway. For example, an information processing device has been proposed in which the amount of memory and the amount of calculation required for processing a neural network are obtained and displayed on a screen (see, for example, Patent Document 1).
国際公開第２０１７／１３８２２０号International Publication No. 2017/138220
　上述の従来技術では、メモリ量や演算量の表示により、ニューラルネットワークをハードウェア実装する際の設計支援を図っている。しかしながら、上述の従来技術では、設計効率が低下することがある。例えば、ニューラルネットワーク内の関数の演算順序に関する設定を変更すると、メモリ量や演算量が変動することがある。この場合、メモリ量などを最適化するために、設定変更の操作を繰り返す必要があり、煩雑な操作により設計効率が低下するおそれがある。 In the above-mentioned conventional technology, design support is provided when implementing a neural network in hardware by displaying the amount of memory and the amount of calculation. However, in the above-mentioned conventional technique, the design efficiency may decrease. For example, if the setting related to the calculation order of the functions in the neural network is changed, the amount of memory and the amount of calculation may fluctuate. In this case, in order to optimize the amount of memory and the like, it is necessary to repeat the operation of changing the setting, which may reduce the design efficiency due to the complicated operation.
　本技術はこのような状況に鑑みて生み出されたものであり、ニューラルネットワークに関するハードウェア設計を支援する情報処理装置において、設計効率を向上させることを目的とする。 This technology was created in view of this situation, and aims to improve design efficiency in information processing devices that support hardware design related to neural networks.
　本技術は、上述の問題点を解消するためになされたものであり、その第１の側面は、ニューラルネットワークを形成する複数のノードの互いの結合関係に基づいて上記複数のノードのそれぞれで用いられる関数を演算するための複数の演算順序を求める解析部と、上記複数の演算順序のそれぞれについて上記関数の演算に要するコストを求めるコスト取得部と、上記複数の演算順序のそれぞれと上記コストとを対応付けて表示部に表示させる表示制御部とを具備する情報処理装置、および、情報処理方法ならびに当該方法をコンピュータに実行させるプログラムである。これにより、ニューラルネットワークに関するハードウェアの設計効率が向上するという作用をもたらす。 The present technology has been made to solve the above-mentioned problems, and the first aspect thereof is used in each of the plurality of nodes based on the mutual connection relationship of the plurality of nodes forming the neural network. An analysis unit that obtains a plurality of operation sequences for calculating a function to be performed, a cost acquisition unit that obtains a cost required for the operation of the function for each of the plurality of operation orders, and each of the plurality of operation orders and the above cost. This is an information processing device including a display control unit that displays the information in association with the display unit, an information processing method, and a program that causes a computer to execute the method. This has the effect of improving the design efficiency of hardware related to neural networks.
　また、この第１の側面において、上記表示制御部は、ユーザの操作に従って上記複数の演算順序のいずれかを選択して上記選択した演算順序と当該演算順序に対応する上記コストと上記結合関係とを表示させてもよい。これにより、選択された演算順序と、コストと、結合関係とが表示されるという作用をもたらす。 Further, in the first aspect, the display control unit selects one of the plurality of operation sequences according to the operation of the user, and the selected operation order, the cost corresponding to the operation order, and the connection relationship. May be displayed. This has the effect of displaying the selected arithmetic order, cost, and coupling relationship.
　また、この第１の側面において、上記表示制御部は、上記複数の演算順序のそれぞれと上記コストとを対応付けたテーブルを表示部に表示させてもよい。これにより、複数の演算順序のそれぞれとコストとを対応付けたテーブルが表示されるという作用をもたらす。 Further, in the first aspect, the display control unit may display a table in which each of the plurality of calculation sequences and the cost are associated with each other on the display unit. This has the effect of displaying a table in which each of the plurality of operation sequences is associated with the cost.
　また、この第１の側面において、上記コストは、メモリ容量、メモリアクセス数およびメモリバンド幅の少なくとも１つを含むものであってもよい。これにより、演算順序ごとに、メモリ容量、メモリアクセス数およびメモリバンド幅の少なくとも１つが表示されるという作用をもたらす。 Also, in this first aspect, the cost may include at least one of memory capacity, number of memory accesses and memory bandwidth. This has the effect of displaying at least one of the memory capacity, the number of memory accesses, and the memory bandwidth for each calculation order.
　また、この第１の側面において、上記コストは、処理時間を含むものであってもよい。これにより、演算順序ごとに、処理時間が表示されるという作用をもたらす。 Further, in this first aspect, the above cost may include the processing time. This has the effect of displaying the processing time for each calculation order.
　また、この第１の側面において、上記コストは、演算器の使用効率と上記演算の並列度との少なくとも１つを含むものであってもよい。これにより、演算順序ごとに、演算器の使用効率と上記演算の並列度との少なくとも１つが表示されるという作用をもたらす。 Further, in this first aspect, the cost may include at least one of the usage efficiency of the arithmetic unit and the degree of parallelism of the arithmetic. This brings about the effect that at least one of the usage efficiency of the arithmetic unit and the degree of parallelism of the above arithmetic is displayed for each arithmetic order.
本技術の第１の実施の形態における設計支援システムの一構成例を示すブロック図である。It is a block diagram which shows one configuration example of the design support system in the 1st Embodiment of this technique. 本技術の第１の実施の形態における情報処理装置の一構成例を示すブロック図である。It is a block diagram which shows one configuration example of the information processing apparatus in the 1st Embodiment of this technique. 本技術の第１の実施の形態におけるニューラルネットワークの構造の一例を示す図である。It is a figure which shows an example of the structure of the neural network in the 1st Embodiment of this technique. 本技術の第１の実施の形態におけるニューラルネットワーク内のレイヤーの結合関係の一例を示す図である。It is a figure which shows an example of the connection relation of layers in a neural network in 1st Embodiment of this technique. 本技術の第１の実施の形態におけるレイヤー１の関数を演算した際に保持されるデータ数を説明するための図である。It is a figure for demonstrating the number of data held at the time of calculating the function of layer 1 in the 1st Embodiment of this technique. 本技術の第１の実施の形態における２番目にレイヤー２の関数を演算した際に保持されるデータ数を説明するための図である。It is a figure for demonstrating the number of data held when the function of layer 2 is calculated second in the 1st Embodiment of this technique. 本技術の第１の実施の形態における３番目にレイヤー３の関数を演算した際に保持されるデータ数を説明するための図である。It is a figure for demonstrating the number of data held when the function of layer 3 is calculated third in the 1st Embodiment of this technique. 本技術の第１の実施の形態における４番目にレイヤー４の関数を演算した際に保持されるデータ数を説明するための図である。It is a figure for demonstrating the number of data held when the function of layer 4 is calculated fourth in the 1st Embodiment of this technique. 本技術の第１の実施の形態における５番目にレイヤー５の関数を演算した際に保持されるデータ数を説明するための図である。It is a figure for demonstrating the number of data held when the function of layer 5 is calculated fifth in the 1st Embodiment of this technique. 本技術の第１の実施の形態における２番目にレイヤー４の関数を演算した際に保持されるデータ数を説明するための図である。It is a figure for demonstrating the number of data held when the function of layer 4 is calculated secondly in the 1st Embodiment of this technique. 本技術の第１の実施の形態における３番目にレイヤー２の関数を演算した際に保持されるデータ数を説明するための図である。It is a figure for demonstrating the number of data held when the function of layer 2 is calculated third in the 1st Embodiment of this technique. 本技術の第１の実施の形態における４番目にレイヤー３の関数を演算した際に保持されるデータ数を説明するための図である。It is a figure for demonstrating the number of data held when the function of layer 3 is calculated fourth in the 1st Embodiment of this technique. 本技術の第１の実施の形態における演算結果の表示前の画面の一例を示す図である。It is a figure which shows an example of the screen before the display of the calculation result in the 1st Embodiment of this technique. 本技術の第１の実施の形態における演算結果の表示画面の一例を示す図である。It is a figure which shows an example of the display screen of the calculation result in the 1st Embodiment of this technique. 本技術の第１の実施の形態における別の演算結果の表示画面の一例を示す図である。It is a figure which shows an example of the display screen of another calculation result in the 1st Embodiment of this technique. 本技術の第１の実施の形態における情報処理装置の動作の一例を示すフローチャートである。It is a flowchart which shows an example of the operation of the information processing apparatus in the 1st Embodiment of this technique. 本技術の第２の実施の形態における演算結果の表示画面の一例を示す図である。It is a figure which shows an example of the display screen of the calculation result in the 2nd Embodiment of this technique.
　以下、本技術を実施するための形態（以下、実施の形態と称する）について説明する。説明は以下の順序により行う。
　１．第１の実施の形態（演算順序ごとにコストを表示する例）
　２．第２の実施の形態（演算順序ごとのコストをテーブル表示する例） Hereinafter, embodiments for carrying out the present technology (hereinafter referred to as embodiments) will be described. The explanation will be given in the following order.
1. 1. First Embodiment (Example of displaying the cost for each calculation order)
2. Second embodiment (example of displaying the cost for each calculation order in a table)
　＜１．第１の実施の形態＞
　［設計支援システムの構成例］
　図１は、本技術の第１の実施の形態における設計支援システムの一構成例を示すブロック図である。この設計支援システムは、ニューラルネットワークをハードウェアに実装する際の設計を支援するためのシステムである。設計支援システムは、学習フレームワーク１１０、情報処理装置２００、変換部１２０およびハードウェア設計ツール１３０を備える。 <1. First Embodiment>
[Configuration example of design support system]
FIG. 1 is a block diagram showing a configuration example of a design support system according to the first embodiment of the present technology. This design support system is a system for supporting the design when implementing the neural network in hardware. The design support system includes a learning framework 110, an information processing device 200, a conversion unit 120, and a hardware design tool 130.
　学習フレームワーク１１０は、入力されたデータセットに基づいて、推論モデルを生成するものである。この学習フレームワーク１１０には、画像データや音声データなどのデータセットが入力される。学習フレームワーク１１０は、データセットに基づいて機械学習を行い、入力データが、どのクラスであるかを予測するための推論モデルを生成する。この推論モデルは、例えば、ニューラルネットワークをコンピュータ上に再現するためのプログラムと、係数ファイルとを含む。係数ファイルは、ニューラルネットワーク内のノードに入出力されるデータに対する重み係数を設定したものである。また、ニューラルネットワークとして、例えば、畳み込みニューラルネットワーク（ＣＮＮ：Convolutional Neural Network）が用いられる。 The learning framework 110 generates an inference model based on the input data set. Data sets such as image data and audio data are input to the learning framework 110. The learning framework 110 performs machine learning based on the dataset and generates an inference model for predicting which class the input data belongs to. This inference model includes, for example, a program for reproducing a neural network on a computer and a coefficient file. The coefficient file sets the weighting coefficient for the data input / output to the nodes in the neural network. Further, as the neural network, for example, a convolutional neural network (CNN) is used.
　そして、学習フレームワーク１１０は、推論モデル（プログラムおよび係数ファイル）を情報処理装置２００に供給する。 Then, the learning framework 110 supplies the inference model (program and coefficient file) to the information processing device 200.
　情報処理装置２００は、推論モデルに基づいて、ニューラルネットワーク内の関数の演算順序を求めるものである。この情報処理装置２００は、推論モデルを解析し、関数を演算するための複数の演算順序を全て求める。そして、情報処理装置２００は、演算順序ごとに、演算に要するコストを求めて表示する。ユーザは、表示内容を検討して最適な演算順序を決定し、情報処理装置２００を操作して、その演算順序を定義する演算順序シーケンスをプログラムとともに変換部１２０へ出力させる。 The information processing device 200 obtains the calculation order of the functions in the neural network based on the inference model. The information processing device 200 analyzes the inference model and obtains all the plurality of calculation sequences for calculating the function. Then, the information processing apparatus 200 obtains and displays the cost required for the calculation for each calculation order. The user examines the display contents, determines the optimum calculation order, operates the information processing apparatus 200, and causes the conversion unit 120 to output the calculation order sequence that defines the calculation order together with the program.
　変換部１２０は、コードを機械語に変換するものである。変換部１２０として、例えば、コンパイラが用いられる。この変換部１２０は、プログラムおよび演算順序シーケンスに基づいて、演算順序シーケンスで定義された演算順序で演算を行うためのコードを生成し、そのコードを機械語に変換する。そして、変換部１２０は、機械語をハードウェア設計ツール１３０へ供給する。 The conversion unit 120 converts the code into machine language. As the conversion unit 120, for example, a compiler is used. The conversion unit 120 generates a code for performing an operation in the operation order defined in the operation order sequence based on the program and the operation order sequence, and converts the code into a machine language. Then, the conversion unit 120 supplies the machine language to the hardware design tool 130.
　ハードウェア設計ツール１３０は、機械語に基づいて、ニューラルネットワークをハードウェア実装した回路を生成するものである。 The hardware design tool 130 generates a circuit in which a neural network is hardware-mounted based on a machine language.
　なお、学習フレームワーク１１０や変換部１２０を情報処理装置２００の外部にも設けているが、これらを情報処理装置２００内に配置することもできる。 Although the learning framework 110 and the conversion unit 120 are also provided outside the information processing device 200, these can also be arranged inside the information processing device 200.
　［情報処理装置の構成例］
　図２は、本技術の第１の実施の形態における情報処理装置２００の一構成例を示すブロック図である。この情報処理装置２００は、解析部２１０、コスト取得部２２０、表示制御部２３０、記憶部２４０、演算順序決定部２５０および表示部２６０を備える。 [Configuration example of information processing device]
FIG. 2 is a block diagram showing a configuration example of the information processing apparatus 200 according to the first embodiment of the present technology. The information processing device 200 includes an analysis unit 210, a cost acquisition unit 220, a display control unit 230, a storage unit 240, a calculation order determination unit 250, and a display unit 260.
　記憶部２４０は、情報処理装置２００内で用いられるデータを記憶するものである。記憶部２４０として、メモリなどが用いられる。 The storage unit 240 stores data used in the information processing device 200. A memory or the like is used as the storage unit 240.
　学習フレームワーク１１０は、ニューラルネットワークプログラム２４１および係数ファイル２４２を出力し、これらは、記憶部２４０内に保持される。 The learning framework 110 outputs the neural network program 241 and the coefficient file 242, which are stored in the storage unit 240.
　解析部２１０は、ニューラルネットワークプログラム２４１を解析し、関数の演算順序を全て求めるものである。この解析部２１０は、ニューラルネットワークを形成する複数のノードの互いの結合関係に基づいて、ノードのそれぞれで用いられる関数を演算するための複数の演算順序を求める。そして、解析部２１０は、それらの演算順序を示すデータをコスト取得部２２０に供給する。 The analysis unit 210 analyzes the neural network program 241 and obtains all the calculation orders of the functions. The analysis unit 210 obtains a plurality of calculation sequences for calculating the function used in each of the nodes based on the mutual connection relationship of the plurality of nodes forming the neural network. Then, the analysis unit 210 supplies the data indicating the calculation order to the cost acquisition unit 220.
　コスト取得部２２０は、演算順序ごとに、関数の演算に要するコストを求めるものである。ここで、コストは、例えば、メモリ容量、メモリアクセス数、メモリバンド幅、処理時間、演算器の使用効率、演算の並列度のうち少なくとも１つを含む。コスト取得部２２０は、ニューラルネットワークプログラム２４１および係数ファイル２４２を記憶部２４０から読み出し、演算順序のそれぞれについて、その順序で所定のハードウェアにより演算した際のコストを求める。そして、コスト取得部２２０は、演算順序のそれぞれを、対応するコストとともに表示制御部２３０に供給する。 The cost acquisition unit 220 obtains the cost required for the operation of the function for each operation order. Here, the cost includes, for example, at least one of a memory capacity, a number of memory accesses, a memory bandwidth, a processing time, an arithmetic unit usage efficiency, and a degree of parallelism of arithmetic operations. The cost acquisition unit 220 reads out the neural network program 241 and the coefficient file 242 from the storage unit 240, and obtains the cost when each of the calculation orders is calculated by the predetermined hardware in that order. Then, the cost acquisition unit 220 supplies each of the calculation sequences to the display control unit 230 together with the corresponding cost.
　表示制御部２３０は、演算順序のそれぞれと、対応するコストとを表示部２６０に表示させるものである。 The display control unit 230 causes the display unit 260 to display each of the calculation sequences and the corresponding costs.
　表示部２６０は、表示制御部２３０の制御に従って、画面を表示するものである。表示部２６０として、液晶モニタなどが用いられる。 The display unit 260 displays the screen according to the control of the display control unit 230. A liquid crystal monitor or the like is used as the display unit 260.
　演算順序決定部２５０は、ユーザの操作に従って、演算順序を決定するものである。ユーザは、表示部２６０に表示された演算順序ごとのコストを参照して検討し、情報処理装置２００を操作して、最適の演算順序を指定する。演算順序決定部２５０は、ユーザの操作に従って、指定された演算順序を示す演算順序シーケンス定義ファイル２４３を生成し、記憶部２４０に保持させる。ニューラルネットワークプログラム２４１および演算順序シーケンス定義ファイル２４３は、変換部１２０へ出力される。 The calculation order determination unit 250 determines the calculation order according to the operation of the user. The user refers to and examines the cost for each calculation order displayed on the display unit 260, operates the information processing apparatus 200, and specifies the optimum calculation order. The operation order determination unit 250 generates an operation order sequence definition file 243 indicating a specified operation order according to a user operation, and stores the operation order sequence definition file 243 in the storage unit 240. The neural network program 241 and the arithmetic sequence sequence definition file 243 are output to the conversion unit 120.
　なお、情報処理装置２００内に記憶部２４０および表示部２６０を配置しているが、これらの少なくとも一方を情報処理装置２００の外部に設けることもできる。記憶部２４０を外部に設ける場合、例えば、ネットワークを介してサーバ内に記憶部２４０を配置することもできる。 Although the storage unit 240 and the display unit 260 are arranged in the information processing device 200, at least one of these can be provided outside the information processing device 200. When the storage unit 240 is provided externally, for example, the storage unit 240 may be arranged in the server via a network.
　［ニューラルネットワークの構成例］
　図３は、本技術の第１の実施の形態におけるニューラルネットワークの構造の一例を示す図である。同図は、ニューラルネットワークプログラム２４１により、コンピュータ上に再現されるニューラルネットワークの一例を示す。このニューラルネットワークは、レイヤー１乃至６などの複数のレイヤーにより形成される。また、個々のレイヤー内には、ノード３０１などの複数のノードが設けられる。 [Neural network configuration example]
FIG. 3 is a diagram showing an example of the structure of the neural network according to the first embodiment of the present technology. The figure shows an example of a neural network reproduced on a computer by the neural network program 241. This neural network is formed by a plurality of layers such as layers 1 to 6. In addition, a plurality of nodes such as node 301 are provided in each layer.
　また、レイヤーのそれぞれは、少なくとも１つの他のレイヤーに結合されている。例えば、レイヤー１は、レイヤー２および４に結合される。レイヤー２は、レイヤー１および３に結合される。レイヤー３は、レイヤー２および５に結合される。レイヤー４は、レイヤー１および５に結合される。レイヤー５は、レイヤー３および６に結合される。なお、レイヤー間の結合関係は、同図に例示したものに限定されない。 Also, each of the layers is combined with at least one other layer. For example, layer 1 is combined with layers 2 and 4. Layer 2 is combined with layers 1 and 3. Layer 3 is combined with layers 2 and 5. Layer 4 is combined with layers 1 and 5. Layer 5 is combined with layers 3 and 6. The connection relationship between the layers is not limited to that illustrated in the figure.
　また、例えば、レイヤー１にデータセットが入力され、レイヤー６から結果が出力されるものとする。 Also, for example, it is assumed that the data set is input to layer 1 and the result is output from layer 6.
　図４は、本技術の第１の実施の形態におけるニューラルネットワーク内のレイヤーの結合関係の一例を示す図である。同図は、図３に例示したニューラルネットワークのレイヤー内のノードを省略し、レイヤー内の関数を表記したものである。 FIG. 4 is a diagram showing an example of the connection relationship of layers in the neural network in the first embodiment of the present technology. In this figure, the nodes in the layer of the neural network illustrated in FIG. 3 are omitted, and the functions in the layer are shown.
　「Input Dataset」は、レイヤー１にデータセットが入力されることを示す。レイヤー１において「Convolution Kernelshepe:5,5」は、カーネルを用いる畳み込み演算を示す。カーネルは、フィルタとも呼ばれる。「5,5」は、カーネル（フィルタ）のサイズを示す。「Stride=2」は、カーネルを適用する間隔を示す。このように畳み込み演算を行うニューラルネットワークは、ＣＮＮと呼ばれる。 "Input Dataset" indicates that the data set is input to layer 1. In layer 1, "Convolution Kernels hepe: 5,5" indicates a convolution operation using a kernel. The kernel is also called a filter. "5,5" indicates the size of the kernel (filter). "Stride = 2" indicates the interval at which the kernel is applied. A neural network that performs a convolutional operation in this way is called a CNN.
　また、「BatchNormalization」は、中間層のパラメータの分布が適切になるように、層の出力を強制的に適切化するバッチ正規化処理を示す。「ReLU(Rectified Linear Unit)」は、正規化線形関数を利用したユニットを示す。また、「64,14,14」は、マップ数が６４で、特徴マップの個々のサイズが１４×１４であることを示す。 In addition, "Batch Normalization" indicates a batch normalization process that forcibly optimizes the output of the layer so that the distribution of the parameters of the intermediate layer becomes appropriate. "ReLU (Rectified Linear Unit)" indicates a unit that uses a rectified linear function. Further, "64,14,14" indicates that the number of maps is 64 and the individual sizes of the feature maps are 14 × 14.
　レイヤー４において、「AveragePooling」は、入力された特徴マップを複数のプーリング領域に分割し、各領域の平均値を計算する平均プーリング処理を示す。 In layer 4, "Average Pooling" indicates an average pooling process in which the input feature map is divided into a plurality of pooling areas and the average value of each area is calculated.
　レイヤー５において、「Add」は、加算処理を示す。レイヤー６において、「Affine」は、順伝播で行ってきた行列の内積を求めるアフィン変換処理を示す。 In layer 5, "Add" indicates addition processing. In layer 6, "Affine" indicates an affine transformation process for obtaining the inner product of a matrix performed by forward propagation.
　なお、レイヤーのそれぞれで実行する処理は、同図に例示したものに限定されない。例えば、レイヤー１では、ステップ関数や線形結合など、正規化線形関数以外の活性化関数を用いることができる。また、レイヤー３では、マックスプーリング処理など、平均プーリング処理以外のプーリング処理を行うことができる。 Note that the processing executed in each layer is not limited to the one illustrated in the figure. For example, in layer 1, an activation function other than the normalized linear function, such as a step function or a linear combination, can be used. Further, in layer 3, a pooling process other than the average pooling process, such as a max pooling process, can be performed.
　同図に例示したように、レイヤーのそれぞれにおいては、関数が用いられる。例えば、カーネルを表す関数や正規化線形関数が用いられる。これらの関数の演算順序は、レイヤー間の結合関係に基づいて変更することができる。前述したように同図では、レイヤー２に、その後段のレイヤー３が結合され、レイヤー３および４に、その後段のレイヤー５が結合される。このため、レイヤー３の前にレイヤー２の関数の演算を実行し、レイヤー５の前にレイヤー３および４の関数の演算を行うのであれば、レイヤー２乃至４の演算順序は、任意である。演算順序を変更すると、その演算順序の演算に要するコストが変わることがある。 As illustrated in the figure, a function is used in each layer. For example, a function representing the kernel or a rectified linear function is used. The order of operations of these functions can be changed based on the connection relationships between the layers. As described above, in the figure, the layer 2 of the subsequent stage is combined with the layer 3 of the subsequent stage, and the layer 5 of the subsequent stage is combined with the layers 3 and 4. Therefore, if the operation of the function of the layer 2 is executed before the layer 3 and the operation of the functions of the layers 3 and 4 is performed before the layer 5, the operation order of the layers 2 to 4 is arbitrary. When the operation order is changed, the cost required for the operation of the operation order may change.
　まず、レイヤー１の後にレイヤー２、３、４の順で演算を行う場合について考える。 First, consider the case where the calculation is performed in the order of layers 2, 3 and 4 after layer 1.
　図５は、本技術の第１の実施の形態におけるレイヤー１の関数を演算した際に保持されるデータ数を説明するための図である。同図において、「Conv」は、畳み込み演算を示す。「Act」は、バッチ正規化処理や正規化線形関数の演算を示す。レイヤー１の演算により、２００個のデータが出力されたものとする。これらのデータは、レイヤー２および４で用いられるため、記憶部２４０に格納される。 FIG. 5 is a diagram for explaining the number of data held when the layer 1 function in the first embodiment of the present technology is calculated. In the figure, "Conv" indicates a convolution operation. "Act" indicates batch normalization processing and normalization linear function operations. It is assumed that 200 pieces of data are output by the calculation of layer 1. Since these data are used in layers 2 and 4, they are stored in the storage unit 240.
　図６は、本技術の第１の実施の形態における２番目にレイヤー２の関数を演算した際に保持されるデータ数を説明するための図である。このレイヤー２の関数の演算により、例えば、１５０個のデータが出力されたものとする。これらのデータは、レイヤー３で用いられるため、記憶部２４０に格納される。１５０個のデータの追加により、記憶部２４０内のデータ数は、３５０個となる。 FIG. 6 is a diagram for explaining the number of data held when the second layer 2 function is calculated in the first embodiment of the present technology. It is assumed that, for example, 150 pieces of data are output by the calculation of the function of the layer 2. Since these data are used in layer 3, they are stored in the storage unit 240. By adding 150 pieces of data, the number of data in the storage unit 240 becomes 350 pieces.
　図７は、本技術の第１の実施の形態における３番目にレイヤー３の関数を演算した際に保持されるデータ数を説明するための図である。このレイヤー３の関数の演算により、７５個のデータが出力されたものとする。これらのデータは、レイヤー５で用いられるため、記憶部２４０に格納される。７５個のデータの追加により、記憶部２４０内のデータ数は、４２５個となる。そして、レイヤー２で出力された１５０個のデータは、不要となったため、記憶部２４０から削除される。１５０個のデータの削除により、記憶部２４０内のデータ数は、２７５個となる。 FIG. 7 is a diagram for explaining the number of data held when the third layer 3 function is calculated in the first embodiment of the present technology. It is assumed that 75 pieces of data are output by the calculation of the function of the layer 3. Since these data are used in layer 5, they are stored in the storage unit 240. By adding 75 data, the number of data in the storage unit 240 becomes 425. Then, the 150 data output in the layer 2 are deleted from the storage unit 240 because they are no longer needed. By deleting 150 data, the number of data in the storage unit 240 becomes 275.
　図８は、本技術の第１の実施の形態における４番目にレイヤー４の関数を演算した際に保持されるデータ数を説明するための図である。このレイヤー４の関数の演算により、５０個のデータが出力されたものとする。これらのデータは、レイヤー５で用いられるため、記憶部２４０に格納される。５０個のデータの追加により、記憶部２４０内のデータ数は、３２５個となる。そして、レイヤー１で出力された２００個のデータは、不要となったため、記憶部２４０から削除される。２００個のデータの削除により、記憶部２４０内のデータ数は、１２５個となる。 FIG. 8 is a diagram for explaining the number of data held when the fourth layer 4 function is calculated in the first embodiment of the present technology. It is assumed that 50 pieces of data are output by the calculation of the function of the layer 4. Since these data are used in layer 5, they are stored in the storage unit 240. By adding 50 data, the number of data in the storage unit 240 becomes 325. Then, since the 200 data output in layer 1 are no longer needed, they are deleted from the storage unit 240. By deleting 200 pieces of data, the number of data in the storage unit 240 becomes 125 pieces.
　図９は、本技術の第１の実施の形態における５番目にレイヤー５の関数を演算した際に保持されるデータ数を説明するための図である。このレイヤー５の関数の演算により、７５個のデータが出力されたものとする。これらのデータは、後の演算で用いられるため、記憶部２４０に格納される。７５個のデータの追加により、記憶部２４０内のデータ数は、２００個となる。そして、レイヤー３および５で出力された１２５個のデータは、不要となったため、記憶部２４０から削除される。１２５個のデータの削除により、記憶部２４０内のデータ数は、７５個となる。 FIG. 9 is a diagram for explaining the number of data held when the fifth layer 5 function is calculated in the first embodiment of the present technology. It is assumed that 75 pieces of data are output by the calculation of the function of the layer 5. These data are stored in the storage unit 240 for later calculation. By adding 75 data, the number of data in the storage unit 240 becomes 200. Then, the 125 data output in the layers 3 and 5 are deleted from the storage unit 240 because they are no longer needed. By deleting 125 data, the number of data in the storage unit 240 becomes 75.
　図５乃至９に例示したように、レイヤー２、３、４の順で演算を行う場合、記憶部２４０内のデータ数の最大値は、図７でレイヤー３のデータを追加した際の４２５個である。 As illustrated in FIGS. 5 to 9, when the operations are performed in the order of layers 2, 3 and 4, the maximum number of data in the storage unit 240 is 425 when the data of layer 3 is added in FIG. Is.
　次に、レイヤー１の後に、レイヤー４、２、３の順で演算を行う場合について考える。 Next, consider the case where the calculation is performed in the order of layers 4, 2, and 3 after layer 1.
　図１０は、本技術の第１の実施の形態における２番目にレイヤー４の関数を演算した際に保持されるデータ数を説明するための図である。このレイヤー４の関数の演算により、例えば、５０個のデータが出力されたものとする。これらのデータは、レイヤー５で用いられるため、記憶部２４０に格納される。５０個のデータの追加により、記憶部２４０内のデータ数は、２５０個となる。 FIG. 10 is a diagram for explaining the number of data held when the second layer 4 function is calculated in the first embodiment of the present technology. It is assumed that, for example, 50 pieces of data are output by the calculation of the function of the layer 4. Since these data are used in layer 5, they are stored in the storage unit 240. By adding 50 data, the number of data in the storage unit 240 becomes 250.
　図１１は、本技術の第１の実施の形態における３番目にレイヤー２の関数を演算した際に保持されるデータ数を説明するための図である。このレイヤー２の関数の演算により、１５０個のデータが出力されたものとする。これらのデータは、レイヤー３で用いられるため、記憶部２４０に格納される。１５０個のデータの追加により、記憶部２４０内のデータ数は、４００個となる。そして、レイヤー１で出力された２００個のデータは、不要となったため、記憶部２４０から削除される。２００個のデータの削除により、記憶部２４０内のデータ数は、２００個となる。 FIG. 11 is a diagram for explaining the number of data held when the third layer 2 function is calculated in the first embodiment of the present technology. It is assumed that 150 pieces of data are output by the calculation of the function of the layer 2. Since these data are used in layer 3, they are stored in the storage unit 240. By adding 150 pieces of data, the number of data in the storage unit 240 becomes 400 pieces. Then, since the 200 data output in layer 1 are no longer needed, they are deleted from the storage unit 240. By deleting 200 pieces of data, the number of data in the storage unit 240 becomes 200 pieces.
　図１２は、本技術の第１の実施の形態における４番目にレイヤー３の関数を演算した際に保持されるデータ数を説明するための図である。このレイヤー３の関数の演算により、７５個のデータが出力されたものとする。これらのデータは、レイヤー５で用いられるため、記憶部２４０に格納される。７５個のデータの追加により、記憶部２４０内のデータ数は、２７５個となる。そして、レイヤー２で出力された１５０個のデータは、不要となったため、記憶部２４０から削除される。１５０個のデータの削除により、記憶部２４０内のデータ数は、１２５個となる。 FIG. 12 is a diagram for explaining the number of data held when the fourth layer 3 function is calculated in the first embodiment of the present technology. It is assumed that 75 pieces of data are output by the calculation of the function of the layer 3. Since these data are used in layer 5, they are stored in the storage unit 240. By adding 75 data, the number of data in the storage unit 240 becomes 275. Then, the 150 data output in the layer 2 are deleted from the storage unit 240 because they are no longer needed. By deleting 150 pieces of data, the number of data pieces in the storage unit 240 becomes 125 pieces.
　図１０乃至１２に例示したように、レイヤー４、２、３の順で演算を行う場合、記憶部２４０内のデータ数の最大値は、図１１でレイヤー２のデータを追加した際の４００個である。 As illustrated in FIGS. 10 to 12, when the operations are performed in the order of layers 4, 2, and 3, the maximum number of data in the storage unit 240 is 400 when the data of layer 2 is added in FIG. Is.
　図５乃至図１２に例示したように、レイヤー２、３、４の順で演算を行う場合と、レイヤー４、２、３の順で演算を行う場合とでは、記憶部２４０（メモリなど）に保持するデータ数の最大値が異なる。データ数の最大値が異なると、演算に必要なメモリ容量も異なる値となる。例えば、データ数の最大値に、個々のデータサイズを乗算することにより、メモリ容量が求められる。このように、演算順序の変更により、必要なメモリ容量が変わることがある。メモリ容量以外のコスト（処理時間や演算器の使用効率など）についても同様である。 As illustrated in FIGS. 5 to 12, in the case where the calculation is performed in the order of layers 2, 3 and 4, and the case where the calculation is performed in the order of layers 4, 2 and 3, the storage unit 240 (memory or the like) is used. The maximum number of data to be retained is different. If the maximum value of the number of data is different, the memory capacity required for the calculation will also be different. For example, the memory capacity can be obtained by multiplying the maximum value of the number of data by the individual data sizes. In this way, the required memory capacity may change due to the change in the calculation order. The same applies to costs other than memory capacity (processing time, operating efficiency of arithmetic units, etc.).
　そこで、情報処理装置２００は、レイヤーの結合関係（言い換えれば、ノード間の結合関係）に基づいて、ノードで用いられる関数を演算するための複数の演算順序を全て求める。そして、情報処理装置２００は、図５乃至図１２に例示したように、演算順序ごとにコストを求め、演算順序と対応付けて表示する。 Therefore, the information processing apparatus 200 obtains all the plurality of calculation orders for calculating the function used in the node based on the connection relationship between the layers (in other words, the connection relationship between the nodes). Then, as illustrated in FIGS. 5 to 12, the information processing apparatus 200 obtains the cost for each calculation order and displays it in association with the calculation order.
　［情報処理装置の表示例］
　図１３は、本技術の第１の実施の形態における演算結果の表示前の画面の一例を示す図である。表示画面内には、レイヤーごとに、そのレイヤー名と、レイヤー内の関数とを含むボックス４００が表示される。また、レイヤー同士が結合される場合、対応するボックス４００の間に結合関係を示すライン４０１が配線される。また、演算順序を切り替えるための操作ボタン４２１と、演算結果を表示させるための操作ボタン４２２とが所定の位置に表示される。 [Display example of information processing device]
FIG. 13 is a diagram showing an example of a screen before displaying the calculation result in the first embodiment of the present technology. In the display screen, a box 400 including the layer name and the function in the layer is displayed for each layer. When the layers are connected to each other, a line 401 indicating a connection relationship is wired between the corresponding boxes 400. Further, the operation button 421 for switching the calculation order and the operation button 422 for displaying the calculation result are displayed at predetermined positions.
　なお、情報処理装置２００は、ユーザの操作に従って、ニューラルネットワークの構造を編集することもできる。編集においては、レイヤーの追加や削除、レイヤー間の結合関係の変更、レイヤー内の関数の設定などが行われる。また、情報処理装置２００は、表示されたニューラルネットワークにおいて、ユーザの操作に従って、機械学習を行うこともできる。これらの操作のためのＧＵＩ（Graphical User Interface）は、同図において省略されている。 The information processing device 200 can also edit the structure of the neural network according to the operation of the user. In editing, layers are added or deleted, the connection relationship between layers is changed, and functions in the layers are set. In addition, the information processing device 200 can also perform machine learning in the displayed neural network according to the user's operation. The GUI (Graphical User Interface) for these operations is omitted in the figure.
　図１４は、本技術の第１の実施の形態における演算結果の表示画面の一例を示す図である。同図は、図１３で、操作ボタン４２２を操作したときの画面である。操作後において、ボックス４００のそれぞれの近傍に、対応する関数の演算順序を示す数値マーク４１０が表示される。また、所定の位置に、コスト毎に、コスト名とコスト値を示すテーブル４３０が表示される。 FIG. 14 is a diagram showing an example of a display screen of a calculation result according to the first embodiment of the present technology. FIG. 13 is a screen when the operation button 422 is operated in FIG. After the operation, a numerical mark 410 indicating the operation order of the corresponding function is displayed in the vicinity of each of the boxes 400. Further, a table 430 showing a cost name and a cost value is displayed at a predetermined position for each cost.
　同図において、レイヤー１、２、３、４、５および６のボックス４００の近傍に、それぞれ１、２、３、４、５および６の数値マーク４１０が表示される。これは、レイヤー１、２、３、４、５および６の順序で演算が実行されたことを表す。テーブル４３０内のコスト値（Ｘ１など）は、この演算順序で演算が行われた際の値を示す。 In the figure, numerical marks 410 of 1, 2, 3, 4, 5 and 6, respectively, are displayed in the vicinity of the boxes 400 of layers 1, 2, 3, 4, 5 and 6. This means that the operations were performed in the order of layers 1, 2, 3, 4, 5 and 6. The cost value (X1, etc.) in the table 430 indicates the value when the calculation is performed in this calculation order.
　図１５は、本技術の第１の実施の形態における別の演算結果の表示画面の一例を示す図である。同図は、ユーザが、図１４の表示画面において、操作ボタン４２１を操作した際に切り替えらえる画面である。図１５の太枠の数値マークは、数値が切り替わった箇所を示す。レイヤー１、２、３、４、５および６のボックス４００の近傍に、それぞれ１、３、４、２、５および６の数値マーク４１０が表示される。これは、レイヤー１、４、２、３、５および６の順序で演算が実行されたことを表す。テーブル４３０内のコスト値は、この演算順序で演算が行われた際の値（Ｘ２など）に切り替えられる。 FIG. 15 is a diagram showing an example of another calculation result display screen according to the first embodiment of the present technology. FIG. 6 is a screen that can be switched when the user operates the operation button 421 on the display screen of FIG. The numerical marks in the thick frame in FIG. 15 indicate the places where the numerical values are switched. Numerical marks 410 of 1, 3, 4, 2, 5 and 6, respectively, are displayed in the vicinity of the boxes 400 of layers 1, 2, 3, 4, 5 and 6. This means that the operations were performed in the order of layers 1, 4, 2, 3, 5 and 6. The cost value in the table 430 is switched to the value (X2, etc.) when the calculation is performed in this calculation order.
　図１４や図１５に例示したように、情報処理装置２００は、ユーザの操作に従って複数の演算順序のいずれかを選択し、その演算順序と対応するコストと、レイヤー（ノード）間の結合関係とを表示させる。 As illustrated in FIGS. 14 and 15, the information processing apparatus 200 selects one of a plurality of calculation sequences according to the user's operation, and the calculation sequence and the corresponding cost, and the connection relationship between the layers (nodes). Is displayed.
　そして、ユーザは、図１４や図１５の表示画面を比較して、最適な演算順序を決定する。例えば、実装するハードウェアのメモリ容量が比較的少ない場合には、必要なメモリ容量の小さい演算順序が優先的に選択される。そして、ユーザは、情報処理装置２００を操作して、その演算順序を定義する演算順序シーケンスを出力させる。 Then, the user compares the display screens of FIGS. 14 and 15 and determines the optimum calculation order. For example, when the memory capacity of the hardware to be mounted is relatively small, the operation order with the smaller required memory capacity is preferentially selected. Then, the user operates the information processing apparatus 200 to output an operation order sequence that defines the operation order.
　情報処理装置２００が、演算順序の全てを網羅して、演算順序ごとにコストを求めて表示させるため、ユーザは、その表示画面を参照して最適な演算順序を決定することができる。これにより、設計効率を向上させることができる。 Since the information processing device 200 covers all of the calculation order and displays the cost for each calculation order, the user can determine the optimum calculation order by referring to the display screen. Thereby, the design efficiency can be improved.
　［情報処理装置の動作例］
　図１６は、本技術の第１の実施の形態における情報処理装置２００の動作の一例を示すフローチャートである。この動作は、例えば、コストを表示させるための所定のアプリケーションが実行されたときに開始される。 [Operation example of information processing device]
FIG. 16 is a flowchart showing an example of the operation of the information processing apparatus 200 according to the first embodiment of the present technology. This operation is started, for example, when a predetermined application for displaying the cost is executed.
　情報処理装置２００は、プログラムを解析して、関数の演算順序の全てを求める（ステップＳ９０１）。そして、情報処理装置２００は、演算順序ごとに、コストを求める（ステップＳ９０２）。続いて、情報処理装置２００は、演算順序や結合関係とともに、コストを表示する（ステップＳ９０３）。情報処理装置２００は、ユーザの操作に従って、演算順序のシーケンスを出力する（ステップＳ９０４）。ステップＳ９０４の後に、情報処理装置２００は、表示のための動作を終了する。 The information processing device 200 analyzes the program and obtains the entire calculation order of the functions (step S901). Then, the information processing apparatus 200 obtains the cost for each calculation order (step S902). Subsequently, the information processing apparatus 200 displays the cost together with the calculation order and the connection relationship (step S903). The information processing device 200 outputs a sequence of calculation sequences according to a user operation (step S904). After step S904, the information processing apparatus 200 ends the operation for display.
　このように、本技術の第１の実施の形態によれば、情報処理装置２００が複数の演算順序のそれぞれについてコストを求めて表示するため、ユーザはその表示画面を参照して最適な演算順序を決定することができる。これにより、ハードウェア実装の際の設計効率を向上させることができる。 As described above, according to the first embodiment of the present technology, since the information processing apparatus 200 seeks and displays the cost for each of the plurality of calculation sequences, the user refers to the display screen and displays the optimum calculation sequence. Can be determined. As a result, the design efficiency at the time of hardware mounting can be improved.
　＜２．第２の実施の形態＞
　上述の第１の実施の形態では、情報処理装置２００が、ユーザの操作に従って選択した演算順序と対応するコストとを表示していたが、この構成では、複数の演算順序を比較する際に、画面を切り替えるための操作を行う必要がある。この第２の実施の形態の情報処理装置２００は、複数の演算順序のそれぞれとコストとを対応付けたテーブルを表示させて、利便性を向上させた点において第１の実施の形態と異なる。 <2. Second Embodiment>
In the first embodiment described above, the information processing apparatus 200 displays the calculation order selected according to the operation of the user and the corresponding cost, but in this configuration, when comparing a plurality of calculation orders, the calculation order is displayed. It is necessary to perform an operation to switch the screen. The information processing apparatus 200 of the second embodiment is different from the first embodiment in that the information processing device 200 of the second embodiment displays a table in which each of the plurality of calculation sequences is associated with the cost to improve convenience.
　図１７は、本技術の第２の実施の形態における演算結果の表示画面の一例を示す図である。同図に例示するように、複数の演算順序のそれぞれと、コストとを対応付けたテーブルが表示画面に表示される。コマンドライン上での実行であれば、このテーブルは、標準出力で表示される。 FIG. 17 is a diagram showing an example of a display screen of a calculation result in the second embodiment of the present technology. As illustrated in the figure, a table in which each of the plurality of calculation sequences and the cost are associated with each other is displayed on the display screen. If run on the command line, this table will be displayed with standard output.
　演算順序の欄において、レイヤー１乃至６が演算の順序で配列される。また、演算順序ごとに、メモリ容量、処理時間や演算器の使用効率のそれぞれのコスト値が表示される。例えば、レイヤー１、２、３、４、５、６の順で演算する場合、メモリ容量、処理時間、演算器の使用効率は、それぞれ、Ｘ１、Ｙ１、Ｚ１となる。また、レイヤー１、４、２、３、５、６の順で演算する場合、メモリ容量、処理時間、演算器の使用効率は、それぞれ、Ｘ２、Ｙ２、Ｚ２となる。レイヤー１、２、４、３、５、６の順で演算する場合、メモリ容量、処理時間、演算器の使用効率は、それぞれ、Ｘ３、Ｙ３、Ｚ３となる。 In the calculation order column, layers 1 to 6 are arranged in the calculation order. In addition, the cost values of the memory capacity, the processing time, and the usage efficiency of the arithmetic unit are displayed for each arithmetic order. For example, when performing calculations in the order of layers 1, 2, 3, 4, 5, and 6, the memory capacity, processing time, and usage efficiency of the calculator are X1, Y1, and Z1, respectively. Further, when the calculation is performed in the order of layers 1, 4, 2, 3, 5, and 6, the memory capacity, the processing time, and the usage efficiency of the calculator are X2, Y2, and Z2, respectively. When performing calculations in the order of layers 1, 2, 4, 3, 5, and 6, the memory capacity, processing time, and usage efficiency of the calculator are X3, Y3, and Z3, respectively.
　また、情報処理装置２００は、ユーザの操作に従って、ユーザの指定したコストの昇順や降順で複数の演算順序をソートすることもできる。例えば、メモリ容量、処理時間、演算器の使用効率のうちユーザがメモリ容量を指定すると、情報処理装置２００は、メモリ容量が低い順に、演算順序をソートする。 The information processing device 200 can also sort a plurality of calculation orders in ascending or descending order of costs specified by the user according to the user's operation. For example, when the user specifies the memory capacity among the memory capacity, the processing time, and the usage efficiency of the arithmetic unit, the information processing apparatus 200 sorts the arithmetic order in ascending order of the memory capacity.
　また、テーブルの内容は、テキストで表示することもできる。また、情報処理装置２００は、実行結果をファイルに保存することもできる。 Also, the contents of the table can be displayed as text. The information processing device 200 can also save the execution result in a file.
　同図に例示するように、情報処理装置２００が、複数の演算順序のそれぞれとコストとを対応付けたテーブルを表示することにより、ユーザは、複数の演算順序を比較する際に、画面を切り替える必要がなくなり、利便性を向上させることができる。 As illustrated in the figure, the information processing apparatus 200 displays a table in which each of the plurality of calculation sequences is associated with the cost, so that the user switches the screen when comparing the plurality of calculation sequences. It is not necessary and convenience can be improved.
　なお、情報処理装置２００は、第１の実施の形態の図１３乃至図１６の表示画面上に、第２の実施の形態のテーブル表示に切り替えるための操作ボタンを追加し、ユーザの操作に従って表示を切り替えることもできる。 The information processing device 200 adds an operation button for switching to the table display of the second embodiment on the display screens of FIGS. 13 to 16 of the first embodiment, and displays the information according to the user's operation. You can also switch.
　このように、本技術の第２の実施の形態によれば、情報処理装置２００が複数の演算順序のそれぞれとコストとを対応付けたテーブルを表示するため、ユーザの利便性を向上させることができる。 As described above, according to the second embodiment of the present technology, the information processing apparatus 200 displays a table in which each of the plurality of calculation sequences is associated with the cost, so that the convenience of the user can be improved. can.
　なお、上述の実施の形態は本技術を具現化するための一例を示したものであり、実施の形態における事項と、特許請求の範囲における発明特定事項とはそれぞれ対応関係を有する。同様に、特許請求の範囲における発明特定事項と、これと同一名称を付した本技術の実施の形態における事項とはそれぞれ対応関係を有する。ただし、本技術は実施の形態に限定されるものではなく、その要旨を逸脱しない範囲において実施の形態に種々の変形を施すことにより具現化することができる。 Note that the above-described embodiment shows an example for embodying the present technology, and the matters in the embodiment and the matters specifying the invention in the claims have a corresponding relationship with each other. Similarly, the matters specifying the invention within the scope of claims and the matters in the embodiment of the present technology having the same name have a corresponding relationship with each other. However, the present technology is not limited to the embodiment, and can be embodied by applying various modifications to the embodiment without departing from the gist thereof.
　また、上述の実施の形態において説明した処理手順は、これら一連の手順を有する方法として捉えてもよく、また、これら一連の手順をコンピュータに実行させるためのプログラム乃至そのプログラムを記憶する記録媒体として捉えてもよい。この記録媒体として、例えば、ＣＤ（Compact Disc）、ＭＤ（MiniDisc）、ＤＶＤ（Digital Versatile Disc）、メモリカード、ブルーレイディスク（Blu-ray（登録商標）Disc）等を用いることができる。 Further, the processing procedure described in the above-described embodiment may be regarded as a method having these series of procedures, or as a program for causing a computer to execute these series of procedures or as a recording medium for storing the program. You may catch it. As this recording medium, for example, a CD (Compact Disc), MD (MiniDisc), DVD (Digital Versatile Disc), memory card, Blu-ray Disc (Blu-ray (registered trademark) Disc) and the like can be used.
　なお、本明細書に記載された効果はあくまで例示であって、限定されるものではなく、また、他の効果があってもよい。 It should be noted that the effects described in the present specification are merely examples and are not limited, and other effects may be obtained.
　なお、本技術は以下のような構成もとることができる。
（１）ニューラルネットワークを形成する複数のノードの互いの結合関係に基づいて前記複数のノードのそれぞれで用いられる関数を演算するための複数の演算順序を求める解析部と、
　前記複数の演算順序のそれぞれについて前記関数の演算に要するコストを求めるコスト取得部と、
　前記複数の演算順序のそれぞれと前記コストとを対応付けて表示部に表示させる表示制御部と
を具備する情報処理装置。
（２）前記表示制御部は、ユーザの操作に従って前記複数の演算順序のいずれかを選択して前記選択した演算順序と当該演算順序に対応する前記コストと前記結合関係とを表示させる前記（１）記載の情報処理装置。
（３）前記表示制御部は、前記複数の演算順序のそれぞれと前記コストとを対応付けたテーブルを表示部に表示させる前記（１）または（２）に記載の情報処理装置。
（４）前記コストは、メモリ容量、メモリアクセス数およびメモリバンド幅の少なくとも１つを含む前記（１）から（３）のいずれかに記載の情報処理装置。
（５）前記コストは、処理時間を含む（１）から（４）のいずれかに記載の情報処理装置。
（６）前記コストは、演算器の使用効率と前記演算の並列度との少なくとも１つを含む（１）から（５）のいずれかに記載の情報処理装置。
（７）ニューラルネットワークを形成する複数のノードの互いの結合関係に基づいて前記複数のノードのそれぞれで用いられる関数を演算するための複数の演算順序を求める解析手順と、
　前記複数の演算順序のそれぞれについて前記関数の演算に要するコストを求めるコスト取得手順と、
　前記複数の演算順序のそれぞれと前記コストとを対応付けて表示部に表示させる表示制御手順と
を具備する情報処理方法。
（８）ニューラルネットワークを形成する複数のノードの互いの結合関係に基づいて前記複数のノードのそれぞれで用いられる関数を演算するための複数の演算順序を求める解析手順と、
　前記複数の演算順序のそれぞれについて前記関数の演算に要するコストを求めるコスト取得手順と、
　前記複数の演算順序のそれぞれと前記コストとを対応付けて表示部に表示させる表示制御手順と
をコンピュータに実行させるためのプログラム。 The present technology can have the following configurations.
(1) An analysis unit that obtains a plurality of calculation sequences for calculating a function used in each of the plurality of nodes based on the mutual connection relationship of a plurality of nodes forming a neural network.
A cost acquisition unit for obtaining the cost required for the operation of the function for each of the plurality of operation sequences,
An information processing device including a display control unit that displays each of the plurality of calculation sequences and the cost in association with each other on the display unit.
(2) The display control unit selects one of the plurality of operation sequences according to the operation of the user and displays the selected operation order, the cost corresponding to the operation order, and the connection relationship (1). ) The information processing device described.
(3) The information processing device according to (1) or (2), wherein the display control unit displays a table in which each of the plurality of calculation sequences and the cost are associated with each other on the display unit.
(4) The information processing apparatus according to any one of (1) to (3) above, wherein the cost includes at least one of a memory capacity, a number of memory accesses, and a memory bandwidth.
(5) The information processing apparatus according to any one of (1) to (4), wherein the cost includes a processing time.
(6) The information processing apparatus according to any one of (1) to (5), wherein the cost includes at least one of the usage efficiency of the arithmetic unit and the degree of parallelism of the arithmetic operation.
(7) An analysis procedure for obtaining a plurality of operation sequences for calculating a function used in each of the plurality of nodes based on the mutual connection relationship of a plurality of nodes forming a neural network, and an analysis procedure.
A cost acquisition procedure for obtaining the cost required for the operation of the function for each of the plurality of operation sequences, and
An information processing method including a display control procedure for displaying each of the plurality of calculation sequences and the cost in association with each other on the display unit.
(8) An analysis procedure for obtaining a plurality of operation sequences for calculating a function used in each of the plurality of nodes based on the mutual connection relationship of a plurality of nodes forming a neural network, and an analysis procedure.
A cost acquisition procedure for obtaining the cost required for the operation of the function for each of the plurality of operation sequences, and
A program for causing a computer to execute a display control procedure for displaying each of the plurality of calculation sequences and the cost in association with each other on the display unit.
　１１０　学習フレームワーク
　１２０　変換部
　１３０　ハードウェア設計ツール
　２００　情報処理装置
　２１０　解析部
　２２０　コスト取得部
　２３０　表示制御部
　２４０　記憶部
　２４１　ニューラルネットワークプログラム
　２４２　係数ファイル
　２４３　演算順序シーケンス定義ファイル
　２５０　演算順序決定部
　２６０　表示部 110 Learning framework 120 Conversion unit 130 Hardware design tool 200 Information processing device 210 Analysis unit 220 Cost acquisition unit 230 Display control unit 240 Storage unit 241 Neural network program 242 Coefficient file 243 Operation order sequence definition file 250 Operation order determination unit 260 Display Department

Claims (8)

  1. 　ニューラルネットワークを形成する複数のノードの互いの結合関係に基づいて前記複数のノードのそれぞれで用いられる関数を演算するための複数の演算順序を求める解析部と、
    　前記複数の演算順序のそれぞれについて前記関数の演算に要するコストを求めるコスト取得部と、
    　前記複数の演算順序のそれぞれと前記コストとを対応付けて表示部に表示させる表示制御部と
    を具備する情報処理装置。     An analysis unit that obtains a plurality of operation orders for calculating a function used in each of the plurality of nodes based on the mutual connection relationship of a plurality of nodes forming a neural network.
    A cost acquisition unit for obtaining the cost required for the operation of the function for each of the plurality of operation sequences,
    An information processing device including a display control unit that displays each of the plurality of calculation sequences and the cost in association with each other on the display unit.
  2. 　前記表示制御部は、ユーザの操作に従って前記複数の演算順序のいずれかを選択して前記選択した演算順序と当該演算順序に対応する前記コストと前記結合関係とを表示させる請求項１記載の情報処理装置。 The information according to claim 1, wherein the display control unit selects one of the plurality of operation sequences according to a user operation and displays the selected operation order, the cost corresponding to the operation order, and the connection relationship. Processing equipment.
  3. 　前記表示制御部は、前記複数の演算順序のそれぞれと前記コストとを対応付けたテーブルを表示部に表示させる請求項１記載の情報処理装置。 The information processing device according to claim 1, wherein the display control unit displays a table in which each of the plurality of calculation sequences and the cost are associated with each other on the display unit.
  4. 　前記コストは、メモリ容量、メモリアクセス数およびメモリバンド幅の少なくとも１つを含む請求項１記載の情報処理装置。 The information processing device according to claim 1, wherein the cost includes at least one of a memory capacity, a number of memory accesses, and a memory bandwidth.
  5. 　前記コストは、処理時間を含む請求項１記載の情報処理装置。 The information processing device according to claim 1, wherein the cost includes processing time.
  6. 　前記コストは、演算器の使用効率と前記演算の並列度との少なくとも１つを含む請求項１記載の情報処理装置。 The information processing device according to claim 1, wherein the cost includes at least one of the usage efficiency of the arithmetic unit and the degree of parallelism of the arithmetic.
  7. 　ニューラルネットワークを形成する複数のノードの互いの結合関係に基づいて前記複数のノードのそれぞれで用いられる関数を演算するための複数の演算順序を求める解析手順と、
    　前記複数の演算順序のそれぞれについて前記関数の演算に要するコストを求めるコスト取得手順と、
    　前記複数の演算順序のそれぞれと前記コストとを対応付けて表示部に表示させる表示制御手順と
    を具備する情報処理方法。     An analysis procedure for obtaining a plurality of operation sequences for operating a function used in each of the plurality of nodes based on the mutual connection relationship of a plurality of nodes forming a neural network, and an analysis procedure.
    A cost acquisition procedure for obtaining the cost required for the operation of the function for each of the plurality of operation sequences, and
    An information processing method including a display control procedure for displaying each of the plurality of calculation sequences and the cost in association with each other on the display unit.
  8. 　ニューラルネットワークを形成する複数のノードの互いの結合関係に基づいて前記複数のノードのそれぞれで用いられる関数を演算するための複数の演算順序を求める解析手順と、
    　前記複数の演算順序のそれぞれについて前記関数の演算に要するコストを求めるコスト取得手順と、
    　前記複数の演算順序のそれぞれと前記コストとを対応付けて表示部に表示させる表示制御手順と
    をコンピュータに実行させるためのプログラム。     An analysis procedure for obtaining a plurality of operation sequences for operating a function used in each of the plurality of nodes based on the mutual connection relationship of a plurality of nodes forming a neural network, and an analysis procedure.
    A cost acquisition procedure for obtaining the cost required for the operation of the function for each of the plurality of operation sequences, and
    A program for causing a computer to execute a display control procedure for displaying each of the plurality of calculation sequences and the cost in association with each other on the display unit.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0695862A (en) * 1992-09-14 1994-04-08 Hitachi Ltd Instruction string optimization supporting device
JP2005505851A (en) * 2001-10-17 2005-02-24 ベプテック インコーポレイテッド How to communicate across operating systems
JP2019501451A (en) * 2015-12-02 2019-01-17 グーグル エルエルシー Neural network execution order determination
JP2019128831A (en) * 2018-01-25 2019-08-01 株式会社モルフォ Calculation technique determining system, calculation technique determining device, processing device, calculation technique determining method, processing method, calculation technique determining program, and processing program

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10664752B2 (en) 2016-02-17 2020-05-26 Sony Corporation Information processing method and information processing apparatus

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0695862A (en) * 1992-09-14 1994-04-08 Hitachi Ltd Instruction string optimization supporting device
JP2005505851A (en) * 2001-10-17 2005-02-24 ベプテック インコーポレイテッド How to communicate across operating systems
JP2019501451A (en) * 2015-12-02 2019-01-17 グーグル エルエルシー Neural network execution order determination
JP2019128831A (en) * 2018-01-25 2019-08-01 株式会社モルフォ Calculation technique determining system, calculation technique determining device, processing device, calculation technique determining method, processing method, calculation technique determining program, and processing program

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