WO2021164014A1

WO2021164014A1 - Video encoding method and device

Info

Publication number: WO2021164014A1
Application number: PCT/CN2020/076243
Authority: WO
Inventors: 高林; 韩云锋; 郭湛
Original assignee: 华为技术有限公司
Priority date: 2020-02-21
Filing date: 2020-02-21
Publication date: 2021-08-26

Abstract

The present solution relates to the field of video encoding and decoding. Specifically, provided in the present solution are a video encoding method and device. The video encoding method provided in the embodiments of the present application comprises: acquiring a coefficient sequence and a first parameter of at least one image block, wherein the coefficient sequence is a sequence of the at least one image block which is subjected to quantization processing; performing layering on the coefficient sequence of the at least one image block according to bits to acquire multiple layer sequences of each image block, wherein each of the multiple layer sequences comprises information of the same bit of multiple alternating-current coefficients in the coefficient sequence of the image block; respectively performing entropy encoding on the multiple layer sequences of each image block to acquire multiple layer codeword sequences of each image block; according to the first parameter of the at least one image block and the multiple layer codeword sequences of each image block, acquiring a code stream corresponding to the at least one image block; and sending the code stream corresponding to the at least one image block. According to the encoding method in the embodiments of the present application, a decoding end can still reconstruct an image block when the channel capacity is too low to transmit a complete code stream, thereby avoiding phenomena, such as mosaics and freezing, that affect the viewing experience.

Description

Video coding method and device

Technical field

The embodiments of the present application relate to the field of multimedia technology, and in particular, to a video coding method and device.

Background technique

With the development of Internet technology, the popularity of video services continues to increase, and users can obtain information through videos. With the continuous development of mobile terminals and wireless network technologies, it has become possible to use wireless networks to carry high-definition video, and new requirements for video coding and decoding technologies have also been put forward. Due to the short-time and time-varying characteristics of the wireless channel, the channel capacity will change drastically. Video codec technology needs to be able to quickly track and adapt to this change, so that the delay and image quality of the decoder can be maintained at an acceptable level.

The Joint Photographic Experts Group (JPEG) is a common still image encoding method, which is basically the same as the I-frame compression method in the Moving Picture Experts Group (MPEG)4. The original RGB image is converted into YUV space after color space change, and then after segmentation, DCT change, quantization, and entropy coding, the compressed image is obtained. Among them, the DCT change as a spectrum analysis tool can separate high frequency and low frequency components; quantify the use of the human eye's physiological characteristics that are sensitive to low frequencies and relatively insensitive to high frequencies, and filter DC and AC coefficients with different accuracy.

Use the JPEG or MPEG4 I frame compression method, the basic unit is the macro block, and the code stream is the quantized value of the AC coefficient in the macro block. Once lost, the entire macro block cannot be reconstructed, so the channel capacity is reduced to below the signal source rate , There will be different degrees of mosaic, stuck and other phenomena.

Summary of the invention

The present application provides a video encoding method and device to avoid mosaic, freeze and other phenomena caused by image blocks that cannot be reconstructed.

In a first aspect, an embodiment of the present application provides a video encoding method. The method may include: acquiring a coefficient sequence and a first parameter of at least one image block, where the coefficient sequence is a sequence after the at least one image block is quantized, and the The first parameter includes at least one of resolution, synchronization word, motion vector or DC component. The coefficient sequence of the at least one image block is layered according to the bit position, and multiple layer sequences of each image block are obtained, and each layer sequence of the multiple layer sequences includes multiple exchanges in the coefficient sequence of the image block The same bit information of the coefficient. Entropy coding is performed on the multiple layer sequences of each image block to obtain multiple layer codeword sequences of each image block. According to the first parameter of the at least one image block and the multiple layer code word sequence of each image block, a code stream corresponding to the at least one image block is obtained, and the code stream is used for the decoder to reconstruct the at least one image block.

In the encoding method of the prior art, when the code stream is lost due to poor channel capacity, the decoder cannot reconstruct the image block, that is, the phenomenon of mosaic and stutter occurs. Compared with the encoding method of the prior art, this implementation method uses a bit-layered encoding method to enable the decoding end to restore the AC coefficients based on the received partial code stream when the bit stream is lost due to poor channel capacity. The nearsightedness value is used to obtain a reconstructed image of relatively low quality, and to avoid the phenomenon of mosaics and freezes caused by the inability of the image block to be reconstructed.

In a possible design, each layer sequence in the plurality of layer sequences includes one or more bits of information of the binary representation of each AC coefficient in the coefficient sequence of the image block.

In this implementation, the video bit rate can be dynamically adjusted through each layer sequence including one or more bits of information of the binary representation of each AC coefficient in the coefficient sequence of the image block. For example, a layer sequence includes each The binary representation of the AC coefficient of multiple bits of information can reduce the video bit rate, thereby reducing the occupation of channel capacity during the bit stream transmission process.

In a possible design, the multiple layer sequences of each image block include the symbol layer sequence of the image block, the first layer sequence to the k+1th layer sequence of the image block. Wherein, the symbol layer sequence of the image block includes the symbol bits in the binary representation of all the AC coefficients of the image block, and the first layer sequence of the image block includes the high n bits in the binary representation of all the AC coefficients of the image block, The high n bits include the Nth to N-n+1 bits in the binary representation of each AC coefficient. The Nth bit is the highest bit in the binary representation of all AC coefficients except for the sign bit. The image The second layer sequence to the k+1th layer sequence of the block respectively include one of the low-k bits in the binary representation of all the AC coefficients of the image block, and the low-k bit includes the first bit in the binary representation of each AC coefficient. 1 bit to kth bit. N is an integer greater than 2, n is any positive integer less than N, k is any positive integer less than N, and N=n+k.

In this implementation, since the high n bits of most of the AC coefficients are 0, by dividing the high n bits into a layer sequence, the video bit rate can be reduced while ensuring the correct transmission of high bit information, thereby reducing bit stream transmission The occupation of channel capacity in the process.

In a possible design, performing entropy coding on multiple layer sequences of each image block to obtain multiple layer codeword sequences of each image block may include: performing the first layer sequence of each image block Sequence, and the second layer sequence to the k+1th layer sequence, run-length coding and Huffman coding are respectively performed to obtain the first layer codeword sequence and the second layer codeword sequence to the kth layer of each image block +1 layer codeword sequence.

In a possible design, obtaining the code stream corresponding to the at least one image block according to the first parameter of the at least one image block and the multiple layer code word sequence of each image block may include: The first parameter of the block is serially spliced to obtain the code stream of the first parameter of the at least one image block. Perform serial splicing on the symbol layer sequence of the at least one image block to obtain the code stream of the symbol layer of the at least one image block. The first layer codeword sequence and the second layer codeword sequence to the k+1 layer codeword sequence of the at least one image block are respectively serially spliced to obtain the first layer to the k+th layer codeword sequence of the at least one image block. Layer 1 code stream.

In a possible design, the code stream of the first parameter of the at least one image block, the code stream of the symbol layer of the at least one image block, the code stream of the first layer to the k+1th layer of the at least one image block The flow corresponds to multiple quality of service QoS levels.

In this implementation mode, different QoS levels correspond to different layer code streams to ensure the transmission of the more important layer code streams.

In a possible design, the method may further include: sequentially sending the code stream of the first parameter of the at least one image block, the code stream of the symbol layer of the at least one image block, and the first parameter of the at least one image block. The code stream from layer to layer k+1.

In a possible design, performing entropy encoding on multiple layer sequences of each image block to obtain multiple layer codeword sequences of each image block may include: according to the symbol layer sequence of each image block, Run-length coding and Huffman coding are performed on the first layer sequence of each image block, and the second layer sequence to the k+1 layer sequence, respectively, to obtain the first layer codeword sequence and the first layer sequence of each image block. The second-layer codeword sequence to the k+1-th layer codeword sequence, the first-layer codeword sequence, and the second-layer codeword sequence to the k+1-th layer codeword sequence carry sign bit information of non-zero AC coefficients , The sign bit information of the non-zero AC coefficient is located in the i-th layer codeword sequence corresponding to the highest bit of the non-zero AC coefficient, and i is from 1 to k+1.

In a possible design, obtaining the code stream corresponding to the at least one image block according to the first parameter of the at least one image block and the multiple layer code word sequence of each image block may include: The first parameter of the block is serially spliced to obtain the code stream of the first parameter of the at least one image block. The first layer codeword sequence and the second layer codeword sequence to the k+1 layer codeword sequence of the at least one image block are respectively serially spliced to obtain the first layer to the k+th layer codeword sequence of the at least one image block. Layer 1 code stream.

In a possible design, the code stream of the first parameter of the at least one image block and the code stream of the first layer to the k+1 layer of the at least one image block correspond to multiple QoS levels.

In a possible design, the method may further include: sending the code stream corresponding to the at least one image block within the sending time window of the slice to which the at least one image block belongs.

In a possible design, the method may further include: when the sending time window of the segment is exceeded, discarding the code stream corresponding to the unsent image block of the segment.

In a possible design, the method may further include: receiving link information sent by the decoding end, where the link information is used to feed back changes in channel capacity for transmitting the code stream. Adjust at least one of a sending parameter or an encoding parameter according to the link information, the sending parameter is used to send a code stream corresponding to the image block, and the encoding parameter includes an encoding type and a quantization processing parameter.

In a possible design, the method may further include: acquiring the transform coefficient of the at least one image block. Perform quantization processing on the transform coefficient of each image block, and obtain the quantized transform coefficient of each image block. The quantized transform coefficient of each image block is shifted and sequentially scanned according to the shift matrix to obtain the coefficient sequence of each image block.

In a second aspect, an embodiment of the present application provides a video encoding device. The device may include: an acquisition module configured to acquire a coefficient sequence and a first parameter of at least one image block, where the coefficient sequence is quantized for the at least one image block In the subsequent sequence, the first parameter includes at least one of resolution, synchronization word, motion vector, or DC component. The bit layering module is used to layer the coefficient sequence of the at least one image block according to the bit position to obtain multiple layer sequences of each image block, and each layer sequence of the multiple layer sequences includes the image block The same bit information of multiple AC coefficients in the coefficient sequence. The entropy coding module is used to perform entropy coding on multiple layer sequences of each image block to obtain multiple layer codeword sequences of each image block. The code stream obtaining module is further configured to obtain the code stream corresponding to the at least one image block according to the first parameter of the at least one image block and the multiple layer code word sequence of each image block, and the code stream is used for decoder reconstruction The at least one image block.

In a possible design, the entropy coding module is used to: perform run-length coding and Huffman respectively on the first layer sequence and the second layer sequence to the k+1 layer sequence of each image block Encoding, obtaining the first layer codeword sequence and the second layer codeword sequence to the k+1th layer codeword sequence of each image block.

In a possible design, the code stream acquisition module is configured to: perform serial splicing on the first parameter of the at least one image block to obtain the code stream of the first parameter of the at least one image block. Perform serial splicing on the symbol layer sequence of the at least one image block to obtain the code stream of the symbol layer of the at least one image block. The first layer codeword sequence and the second layer codeword sequence to the k+1 layer codeword sequence of the at least one image block are respectively serially spliced to obtain the first layer to the k+th layer codeword sequence of the at least one image block. Layer 1 code stream.

In a possible design, the device may further include: a transceiver module, configured to sequentially send the code stream of the first parameter of the at least one image block, the code stream of the symbol layer of the at least one image block, and the code stream of the at least one image block. The code stream from the first layer to the k+1th layer of the image block.

In a possible design, the entropy coding module is used to: according to the symbol layer sequence of each image block, the first layer sequence, and the second layer sequence to the k+1th layer sequence of each image block, respectively Perform run-length coding and Huffman coding to obtain the first layer codeword sequence and the second layer codeword sequence to the k+1th layer codeword sequence of each image block, the first layer codeword sequence, and the first layer codeword sequence The second-layer codeword sequence to the k+1-th layer codeword sequence carry the sign bit information of the non-zero AC coefficient, and the sign bit information of the non-zero AC coefficient is located at the i-th corresponding to the highest bit of the non-zero AC coefficient. In the layer code word sequence, i takes 1 to k+1.

In a possible design, the code stream acquisition module is configured to: perform serial splicing on the first parameter of the at least one image block to obtain the code stream of the first parameter of the at least one image block. The first layer codeword sequence and the second layer codeword sequence to the k+1 layer codeword sequence of the at least one image block are respectively serially spliced to obtain the first layer to the k+th layer codeword sequence of the at least one image block. Layer 1 code stream.

In a possible design, the device further includes: a transceiver module, configured to send the code stream corresponding to the at least one image block within the sending time window of the slice to which the at least one image block belongs.

In a possible design, the transceiver module is further configured to: when the sending time window of the segment is exceeded, discard the code stream corresponding to the unsent image block of the segment.

In a possible design, the device further includes: a transceiver module. The transceiver module is used to receive link information sent by the decoding end, and the link information is used to feed back changes in the channel capacity for transmitting the code stream. The entropy encoding module is further configured to adjust at least one of a sending parameter or an encoding parameter according to the link information, the sending parameter is used to send a code stream corresponding to the image block, and the encoding parameter includes an encoding type and a quantization processing parameter.

In a possible design, the acquisition module is further configured to: acquire the transform coefficient of the at least one image block; perform quantization processing on the transform coefficient of each image block to obtain the quantized transform coefficient of each image block; The quantized transform coefficient of each image block is shifted and sequentially scanned according to the shift matrix to obtain the coefficient sequence of each image block.

In a third aspect, an embodiment of the present application provides an encoding device. The encoding device may be an encoder or an encoder chip or a system on a chip. The encoding device may implement the function of the first aspect or any possible design method of the first aspect, and the function may be executed by hardware and/or software. In an implementable manner, the encoding device may include: a non-volatile memory and a processor coupled with each other, the processor calls the program code stored in the memory to execute any one of the first aspect or the first aspect Possible design methods.

In a fourth aspect, an embodiment of the present application provides a video encoding and decoding device, including an encoder, which is configured to execute any possible design method as in the first aspect or the first aspect. Optionally, the video encoding and decoding device may further include a decoder for decoding the received code stream.

In a fifth aspect, the present application provides a computer-readable storage medium that stores program code, where the program code includes some or all of the steps used to execute any method of the first aspect Instructions.

In a sixth aspect, this application provides a computer program product, which when the computer program product runs on a computer, causes the computer to execute part or all of the steps of any one of the methods in the first aspect.

In the video encoding method and device of the embodiments of the present application, the coefficient sequence of at least one image block and the first parameter are obtained, and the coefficient sequence of the at least one image block is layered according to the bits, and multiple layers of each image block are obtained. Sequence, entropy coding the multiple layer sequences of each image block, obtain multiple layer codeword sequences of each image block, according to the first parameter of at least one image block and multiple layer codewords of each image block Sequence, obtain the code stream corresponding to the at least one image block, and send the code stream corresponding to the at least one image block to the decoder, so that the decoder reconstructs the at least one image block based on the received code stream corresponding to the at least one image block . Since each layer sequence in the multiple layer sequences of each image block includes the same bit information of multiple AC coefficients in the coefficient sequence of the image block, the encoder sends the code stream by layer, so the decoder can be based on layer Sequence decoding restores multiple AC coefficients or approximate values of AC coefficients in the coefficient sequence of the image block, thereby reconstructing the image block. When the channel capacity is too low to transmit a complete bit stream, the decoding end can still reconstruct image blocks to avoid phenomena such as mosaics and freezes that affect the viewing experience.

Description of the drawings

FIG. 1A is a schematic diagram of an example of a video encoding and decoding system in an embodiment of the application;

FIG. 1B is a schematic diagram of an example of a video decoding system in an embodiment of this application;

2 is a schematic diagram of an example structure of an encoder in an embodiment of the application;

FIG. 3 is a schematic diagram of an example structure of a decoder in an embodiment of the application;

4 is a schematic diagram of an example of a video decoding device in an embodiment of the application;

FIG. 5 is a schematic diagram of an example of an encoding device or a decoding device in an embodiment of the application;

FIG. 6 is a flowchart of a video encoding method according to an embodiment of the application;

FIG. 7 is a schematic diagram of an encoding process of a video encoding method according to an embodiment of the application;

FIG. 8 is a schematic diagram of the results of various processing in the encoding process of an embodiment of the application; FIG.

FIG. 9 is a flowchart of a video encoding method according to an embodiment of the application;

FIG. 10 is a schematic diagram of a video encoding device according to an embodiment of the application.

Detailed ways

The embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. In the following description, reference is made to the accompanying drawings that form a part of the present disclosure and illustrate specific aspects of the embodiments of the present application or specific aspects that can be used in the embodiments of the present application. It should be understood that the embodiments of the present application may be used in other aspects, and may include structural or logical changes not depicted in the drawings. Therefore, the following detailed description should not be understood in a restrictive sense, and the scope of the present application is defined by the appended claims. For example, it should be understood that the content disclosed in conjunction with the described method may be equally applicable to the corresponding device or system for executing the method, and vice versa. For example, if one or more specific method steps are described, the corresponding device may include one or more units such as functional units to perform the described one or more method steps (for example, one unit performs one or more steps). , Or multiple units, each of which performs one or more of multiple steps), even if such one or more units are not explicitly described or illustrated in the drawings. On the other hand, for example, if a specific device is described based on one or more units such as functional units, the corresponding method may include one step to perform the functionality of one or more units (for example, one step performs one or more units). The functionality, or multiple steps, each of which performs the functionality of one or more of the multiple units), even if such one or more steps are not explicitly described or illustrated in the drawings. Further, it should be understood that, unless expressly stated otherwise, the features of the exemplary embodiments and/or aspects described herein can be combined with each other.

The technical solutions involved in the embodiments of the present application may not only be applied to existing video coding standards (such as H.264, HEVC, etc.), but may also be applied to future video coding standards (such as H.266). The terms used in the implementation mode part of this application are only used to explain specific embodiments of this application, and are not intended to limit this application. The following briefly introduces some concepts that may be involved in the embodiments of the present application.

Video coding generally refers to processing a sequence of pictures that form a video or video sequence. In the field of video coding, the terms "picture", "frame" or "image" can be used as synonyms. Video encoding used in this article means video encoding or video decoding. Video encoding is performed on the source side, and usually includes processing (for example, by compressing) the original video picture to reduce the amount of data required to represent the video picture, so as to store and/or transmit more efficiently. Video decoding is performed on the destination side and usually involves inverse processing relative to the encoder to reconstruct the video picture. The “encoding” of video pictures involved in the embodiments should be understood as involving the “encoding” or “decoding” of the video sequence. The combination of the encoding part and the decoding part is also called codec (encoding and decoding).

A video sequence includes a series of pictures, the pictures are further divided into slices, and the slices are further divided into blocks. Video coding is performed in units of blocks. In some new video coding standards, the concept of blocks is further expanded. For example, there are macroblocks (MB) in the H.264 standard, and the macroblocks can be further divided into multiple prediction blocks (partitions) that can be used for predictive coding. In the high-efficiency video coding (HEVC) standard, basic concepts such as coding unit (CU), prediction unit (PU), and transform unit (TU) are adopted, which are functionally Divide a variety of block units, and use a new tree-based description. For example, the CU can be divided into smaller CUs according to the quadtree, and the smaller CUs can be further divided to form a quadtree structure. The CU is the basic unit for dividing and encoding the coded image. The PU and TU also have a similar tree structure. The PU can correspond to the prediction block and is the basic unit of prediction coding. The CU is further divided into multiple PUs according to the division mode. TU can correspond to the transform block and is the basic unit for transforming the prediction residual. However, no matter CU, PU or TU, they all belong to the concept of block (or image block) in nature.

For example, in HEVC, a CTU is split into multiple CUs by using a quad-tree structure represented as a coding tree. A decision is made at the CU level whether to use inter-picture (temporal) or intra-picture (spatial) prediction to encode picture regions. Each CU can be further split into one, two, or four PUs according to the PU split type. The same prediction process is applied in a PU, and relevant information is transmitted to the decoder on the basis of the PU. After the residual block is obtained by applying a prediction process based on the PU split type, the CU may be divided into transform units (TU) according to other quadtree structures similar to the coding tree used for the CU. In the latest development of video compression technology, quad-tree and binary tree (Quad-tree and Binary Tree, QTBT) are used to divide frames to divide coding blocks. In the QTBT block structure, the CU can have a square or rectangular shape.

Herein, for ease of description and understanding, the image block to be encoded in the currently encoded image may be referred to as the current block. For example, in encoding, it refers to the block currently being encoded; in decoding, it refers to the block currently being decoded. The decoded image block used for predicting the current block in the reference image is called a reference block, that is, a reference block is a block that provides a reference signal for the current block, where the reference signal represents the pixel value in the image block. The block in the reference image that provides the prediction signal for the current block may be a prediction block, where the prediction signal represents a pixel value or a sample value or a sample signal in the prediction block. For example, after traversing multiple reference blocks, the best reference block is found. This best reference block will provide prediction for the current block, and this block is called a prediction block.

In the case of lossless video coding, the original video picture can be reconstructed, that is, the reconstructed video picture has the same quality as the original video picture (assuming that there is no transmission loss or other data loss during storage or transmission). In the case of lossy video coding, for example, quantization is performed to perform further compression to reduce the amount of data required to represent the video picture, and the decoder side cannot completely reconstruct the video picture, that is, the quality of the reconstructed video picture is compared with the original video picture. The quality is low or poor.

Several video coding standards of H.261 belong to "lossy hybrid video coding and decoding" (that is, combining spatial and temporal prediction in the sample domain with 2D transform coding for applying quantization in the transform domain). Each picture of a video sequence is usually divided into a set of non-overlapping blocks, and is usually coded at the block level. In other words, the encoder side usually processes the video at the block (video block) level, that is, encodes the video. For example, the prediction block is generated through spatial (intra-picture) prediction and temporal (inter-picture) prediction. The processed block) subtracts the prediction block to obtain the residual block, transforms the residual block in the transform domain and quantizes the residual block to reduce the amount of data to be transmitted (compressed), and the decoder side will process the inverse of the encoder Partially applied to the coded or compressed block to reconstruct the current block for representation. In addition, the encoder duplicates the decoder processing loop, so that the encoder and the decoder generate the same prediction (for example, intra prediction and inter prediction) and/or reconstruction for processing, that is, encoding subsequent blocks.

The following describes the system architecture applied by the embodiments of the present application. Referring to FIG. 1A, FIG. 1A exemplarily shows a schematic block diagram of a video encoding and decoding system 10 applied in an embodiment of the present application. As shown in FIG. 1A, the video encoding and decoding system 10 may include a source device 12 and a destination device 14. The source device 12 generates encoded video data. Therefore, the source device 12 may be referred to as a video encoding device. The destination device 14 can decode the encoded video data generated by the source device 12, and therefore, the destination device 14 can be referred to as a video decoding device. Various implementations of source device 12, destination device 14, or both may include one or more processors and memory coupled to the one or more processors. The memory may include, but is not limited to, RAM, ROM, EEPROM, flash memory, or any other medium that can be used to store the desired program code in the form of instructions or data structures that can be accessed by a computer, as described herein. The source device 12 and the destination device 14 may include various devices, including desktop computers, mobile computing devices, notebook (for example, laptop) computers, tablet computers, set-top boxes, telephone handsets such as so-called "smart" phones. Computers, televisions, cameras, display devices, digital media players, video game consoles, on-board computers, wireless communication equipment, or the like.

Although FIG. 1A shows the source device 12 and the destination device 14 as separate devices, the device embodiment may also include the source device 12 and the destination device 14 or the functionality of both, that is, the source device 12 or the corresponding The functionality of the destination device 14 or the corresponding functionality. In such embodiments, the same hardware and/or software may be used, or separate hardware and/or software, or any combination thereof may be used to implement the source device 12 or the corresponding functionality and the destination device 14 or the corresponding functionality .

The source device 12 and the destination device 14 may communicate with each other through a link 13, and the destination device 14 may receive encoded video data from the source device 12 via the link 13. Link 13 may include one or more media or devices capable of moving encoded video data from source device 12 to destination device 14. In one example, link 13 may include one or more communication media that enable source device 12 to transmit encoded video data directly to destination device 14 in real time. In this example, the source device 12 may modulate the encoded video data according to a communication standard, such as a wireless communication protocol, and may transmit the modulated video data to the destination device 14. The one or more communication media may include wireless and/or wired communication media, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The one or more communication media may form part of a packet-based network, such as a local area network, a wide area network, or a global network (e.g., the Internet). The one or more communication media may include routers, switches, base stations, or other devices that facilitate communication from source device 12 to destination device 14.

The source device 12 includes an encoder 20, and optionally, the source device 12 may also include a picture source 16, a picture preprocessor 18, and a communication interface 22. In a specific implementation form, the encoder 20, the picture source 16, the picture preprocessor 18, and the communication interface 22 may be hardware components in the source device 12, or may be software programs in the source device 12. They are described as follows:

The picture source 16, which can include or can be any type of picture capture device, for example to capture real-world pictures, and/or any type of pictures or comments (for screen content encoding, some text on the screen is also considered to be encoded Picture or part of an image) generating equipment, for example, a computer graphics processor for generating computer animation pictures, or for acquiring and/or providing real world pictures, computer animation pictures (for example, screen content, virtual reality, VR) pictures), and/or any combination thereof (for example, augmented reality (AR) pictures). The picture source 16 may be a camera for capturing pictures or a memory for storing pictures. The picture source 16 may also include any type (internal or external) interface for storing previously captured or generated pictures and/or acquiring or receiving pictures. When the picture source 16 is a camera, the picture source 16 may be, for example, a local or an integrated camera integrated in the source device; when the picture source 16 is a memory, the picture source 16 may be local or, for example, an integrated camera integrated in the source device. Memory. When the picture source 16 includes an interface, the interface may be, for example, an external interface for receiving pictures from an external video source. The external video source is, for example, an external picture capture device, such as a camera, an external memory, or an external picture generation device, such as It is an external computer graphics processor, computer or server. The interface can be any type of interface according to any proprietary or standardized interface protocol, such as a wired or wireless interface, and an optical interface.

Among them, the picture can be regarded as a two-dimensional array or matrix of picture elements. The pixel points in the array can also be called sampling points. The number of sampling points of the array or picture in the horizontal and vertical directions (or axis) defines the size and/or resolution of the picture. In order to represent colors, three color components are usually used, that is, pictures can be represented as or contain three sample arrays. For example, in the RBG format or color space, a picture includes corresponding red, green, and blue sample arrays. However, in video coding, each pixel is usually expressed in a luminance/chrominance format or color space. For example, for a picture in the YUV format, it includes the luminance component indicated by Y (which may also be indicated by L) and the two indicated by U and V. Chrominance components. The luma component Y represents brightness or gray level intensity (for example, the two are the same in a gray level picture), and the two chroma components U and V represent chroma or color information components. Correspondingly, a picture in the YUV format includes a luminance sample array of luminance sample values (Y), and two chrominance sample arrays of chrominance values (U and V). Pictures in RGB format can be converted or converted to YUV format, and vice versa. This process is also called color conversion or conversion. If the picture is black and white, the picture may only include the luminance sample array. In the embodiment of the present application, the picture transmitted from the picture source 16 to the picture processor may also be referred to as original picture data 17.

The picture preprocessor 18 is configured to receive the original picture data 17 and perform preprocessing on the original picture data 17 to obtain the preprocessed picture 19 or the preprocessed picture data 19. For example, the pre-processing performed by the picture pre-processor 18 may include trimming, color format conversion (for example, conversion from RGB format to YUV format), toning, or denoising.

The encoder 20 (or video encoder 20) is configured to receive the pre-processed picture data 19, and process the pre-processed picture data 19 using a relevant prediction mode (such as the prediction mode in the various embodiments herein), thereby The encoded picture data 21 is provided (the structure details of the encoder 20 will be further described below based on FIG. 2 or FIG. 4 or FIG. 5). In some embodiments, the encoder 20 may be used to implement the various embodiments described below to implement the application of the video coding method described in this application on the coding side.

The communication interface 22 can be used to receive the encoded picture data 21, and can transmit the encoded picture data 21 to the destination device 14 or any other device (such as a memory) through the link 13 for storage or direct reconstruction, so The other device can be any device used for decoding or storage. The communication interface 22 may be used, for example, to encapsulate the encoded picture data 21 into a suitable format, such as a data packet, for transmission on the link 13.

The destination device 14 includes a decoder 30, and optionally, the destination device 14 may also include a communication interface 28, a picture post-processor 32, and a display device 34. They are described as follows:

The communication interface 28 may be used to receive the encoded picture data 21 from the source device 12 or any other source, for example, a storage device, and the storage device is, for example, an encoded picture data storage device. The communication interface 28 can be used to transmit or receive the encoded picture data 21 via the link 13 between the source device 12 and the destination device 14 or via any type of network. The link 13 is, for example, a direct wired or wireless connection. The type of network is, for example, a wired or wireless network or any combination thereof, or any type of private network and public network, or any combination thereof. The communication interface 28 may be used, for example, to decapsulate the data packet transmitted by the communication interface 22 to obtain the encoded picture data 21.

Both the communication interface 28 and the communication interface 22 can be configured as a one-way communication interface or a two-way communication interface, and can be used, for example, to send and receive messages to establish connections, confirm and exchange any other communication links and/or, for example, encoded picture data Information about the transmission of data transmission.

The decoder 30 (or called the decoder 30) is used to receive the encoded picture data 21 and provide the decoded picture data 31 or the decoded picture 31 (the following will further describe the decoder 30 based on FIG. 3 or FIG. 4 or FIG. 5 Structural details). In some embodiments, the decoder 30 may be used to implement the various embodiments described below to implement the application of the video encoding method described in this application on the decoding side.

The picture post processor 32 is configured to perform post-processing on the decoded picture data 31 (also referred to as reconstructed picture data) to obtain post-processed picture data 33. The post-processing performed by the picture post-processor 32 may include: color format conversion (for example, conversion from YUV format to RGB format), toning, trimming or resampling, or any other processing, and can also be used to convert the post-processed picture data 33 is transmitted to the display device 34.

The display device 34 is used to receive the post-processed picture data 33 to display the picture to, for example, a user or a viewer. The display device 34 may be or may include any type of display for presenting reconstructed pictures, for example, an integrated or external display or monitor. For example, the display may include a liquid crystal display (LCD), an organic light emitting diode (OLED) display, a plasma display, a projector, a micro LED display, a liquid crystal on silicon (LCoS), Digital light processor (digital light processor, DLP) or any other type of display.

Although FIG. 1A shows the source device 12 and the destination device 14 as separate devices, the device embodiment may also include the source device 12 and the destination device 14 or the functionality of both, that is, the source device 12 or Corresponding functionality and destination device 14 or corresponding functionality. In such embodiments, the same hardware and/or software may be used, or separate hardware and/or software, or any combination thereof may be used to implement the source device 12 or the corresponding functionality and the destination device 14 or the corresponding functionality .

It is obvious to those skilled in the art based on the description that the functionality of different units or the existence and (accurate) division of the functionality of the source device 12 and/or the destination device 14 shown in FIG. 1A may vary according to actual devices and applications. The source device 12 and the destination device 14 may include any of a variety of devices, including any type of handheld or stationary device, for example, a notebook or laptop computer, mobile phone, smart phone, tablet or tablet computer, video camera, desktop Computers, set-top boxes, televisions, cameras, in-vehicle devices, display devices, digital media players, video game consoles, video streaming devices (such as content service servers or content distribution servers), broadcast receiver devices, broadcast transmitter devices And so on, and can not use or use any type of operating system.

Both the encoder 20 and the decoder 30 can be implemented as any of various suitable circuits, for example, one or more microprocessors, digital signal processors (digital signal processors, DSP), and application-specific integrated circuits (application-specific integrated circuits). circuit, ASIC), field-programmable gate array (FPGA), discrete logic, hardware, or any combination thereof. If the technology is partially implemented in software, the device can store the instructions of the software in a suitable non-transitory computer-readable storage medium, and can use one or more processors to execute the instructions in hardware to execute the technology of the present disclosure. . Any of the foregoing (including hardware, software, a combination of hardware and software, etc.) can be regarded as one or more processors.

In some cases, the video encoding and decoding system 10 shown in FIG. 1A is only an example, and the technology of the present application can be applied to video encoding settings that do not necessarily include any data communication between encoding and decoding devices (for example, video encoding or video encoding). decoding). In other instances, the data can be retrieved from local storage, streamed on the network, etc. The video encoding device can encode data and store the data to the memory, and/or the video decoding device can retrieve the data from the memory and decode the data. In some instances, encoding and decoding are performed by devices that do not communicate with each other but only encode data to and/or retrieve data from the memory and decode the data.

Referring to FIG. 1B, FIG. 1B is an explanatory diagram of an example of a video coding system 40 including the encoder 20 of FIG. 2 and/or the decoder 30 of FIG. 3 according to an exemplary embodiment. The video decoding system 40 can implement a combination of various technologies in the embodiments of the present application. In the illustrated embodiment, the video coding system 40 may include an imaging device 41, an encoder 20, a decoder 30 (and/or a video encoder/decoder implemented by the logic circuit 47 of the processing unit 46), and an antenna 42 , One or more processors 43, one or more memories 44, and/or display devices 45.

As shown in FIG. 1B, the imaging device 41, the antenna 42, the processing unit 46, the logic circuit 47, the encoder 20, the decoder 30, the processor 43, the memory 44, and/or the display device 45 can communicate with each other. As discussed, although the encoder 20 and the decoder 30 are used to illustrate the video coding system 40, in different examples, the video coding system 40 may include only the encoder 20 or only the decoder 30.

In some examples, antenna 42 may be used to transmit or receive an encoded bitstream of video data. In addition, in some examples, the display device 45 may be used to present video data. In some examples, the logic circuit 47 may be implemented by the processing unit 46. The processing unit 46 may include application-specific integrated circuit (ASIC) logic, a graphics processor, a general-purpose processor, and the like. The video decoding system 40 may also include an optional processor 43, and the optional processor 43 may similarly include application-specific integrated circuit (ASIC) logic, a graphics processor, a general-purpose processor, and the like. In some examples, the logic circuit 47 may be implemented by hardware, such as dedicated hardware for video encoding, and the processor 43 may be implemented by general-purpose software, an operating system, and the like. In addition, the memory 44 may be any type of memory, such as volatile memory (for example, static random access memory (Static Random Access Memory, SRAM), dynamic random access memory (Dynamic Random Access Memory, DRAM), etc.) or non-volatile memory. Memory (for example, flash memory, etc.), etc. In a non-limiting example, the memory 44 may be implemented by cache memory. In some examples, the logic circuit 47 may access the memory 44 (e.g., to implement an image buffer). In other examples, the logic circuit 47 and/or the processing unit 46 may include a memory (for example, a cache, etc.) for implementing an image buffer and the like.

In some examples, the encoder 20 implemented by logic circuits may include an image buffer (e.g., implemented by the processing unit 46 or the memory 44) and a graphics processing unit (e.g., implemented by the processing unit 46). The graphics processing unit may be communicatively coupled to the image buffer. The graphics processing unit may include an encoder 20 implemented by a logic circuit 47 to implement the various modules discussed with reference to FIG. 2 and/or any other encoder system or subsystem described herein. Logic circuits can be used to perform the various operations discussed herein.

In some examples, decoder 30 may be implemented by logic circuit 47 in a similar manner to implement the various modules discussed with reference to decoder 30 of FIG. 3 and/or any other decoder system or subsystem described herein. In some examples, the decoder 30 implemented by logic circuits may include an image buffer (implemented by the processing unit 2820 or the memory 44) and a graphics processing unit (implemented by the processing unit 46, for example). The graphics processing unit may be communicatively coupled to the image buffer. The graphics processing unit may include a decoder 30 implemented by a logic circuit 47 to implement the various modules discussed with reference to FIG. 3 and/or any other decoder system or subsystem described herein.

In some examples, antenna 42 may be used to receive an encoded bitstream of video data. As discussed, the encoded bitstream may include data, indicators, index values, mode selection data, etc., related to encoded video frames discussed herein, such as data related to encoded partitions (e.g., transform coefficients or quantized transform coefficients). , (As discussed) optional indicators, and/or data defining coded partitions). The video coding system 40 may also include a decoder 30 coupled to the antenna 42 and used to decode the encoded bitstream. The display device 45 is used to present video frames.

It should be understood that for the example described with reference to the encoder 20 in the embodiments of the present application, the decoder 30 may be used to perform the reverse process. Regarding signaling syntax elements, the decoder 30 can be used to receive and parse such syntax elements, and decode related video data accordingly. In some examples, the encoder 20 may entropy encode the syntax elements into an encoded video bitstream. In such instances, the decoder 30 may parse such syntax elements and decode the related video data accordingly.

It should be noted that the video encoding method described in the embodiment of the present application is mainly used for the encoding and decoding process. This process exists in both the encoder 20 and the decoder 30. The encoder 20 and the decoder 30 in the embodiment of the present application may be, for example, Codecs corresponding to video standard protocols such as H.263, H.264, HEVV, MPEG-2, MPEG-4, VP8, VP9, or next-generation video standard protocols (such as H.266, etc.).

Referring to FIG. 2, FIG. 2 shows a schematic/conceptual block diagram of an example of an encoder 20 for implementing an embodiment of the present application. In the example of FIG. 2, the encoder 20 includes a residual calculation unit 204, a transformation processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transformation processing unit 212, a reconstruction unit 214, a buffer 216, and a loop filter. Unit 220, a decoded picture buffer (DPB) 230, a prediction processing unit 260, and an entropy coding unit 270. The prediction processing unit 260 may include an inter prediction unit 244, an intra prediction unit 254, and a mode selection unit 262. The inter prediction unit 244 may include a motion estimation unit and a motion compensation unit (not shown). The encoder 20 shown in FIG. 2 may also be referred to as a hybrid video encoder or a video encoder based on a hybrid video codec.

For example, the residual calculation unit 204, the transform processing unit 206, the quantization unit 208, the prediction processing unit 260, and the entropy encoding unit 270 form the forward signal path of the encoder 20, and for example, the inverse quantization unit 210, the inverse transform processing unit 212, and the The structure unit 214, the buffer 216, the loop filter 220, the decoded picture buffer (DPB) 230, and the prediction processing unit 260 form the backward signal path of the encoder, wherein the backward signal path of the encoder corresponds to The signal path of the decoder (see decoder 30 in FIG. 3).

The encoder 20 receives the picture 201 or the image block 203 of the picture 201 through, for example, the input 202, for example, a picture in a picture sequence forming a video or a video sequence. The image block 203 may also be called the current picture block or the picture block to be coded, and the picture 201 may be called the current picture or the picture to be coded (especially when the current picture is distinguished from other pictures in video coding, the other pictures are for example the same video sequence). That is, the previous coded and/or decoded picture in the video sequence that also includes the current picture).

The embodiment of the encoder 20 may include a segmentation unit (not shown in FIG. 2) for segmenting the picture 201 into a plurality of blocks such as the image block 203, usually into a plurality of non-overlapping blocks. The segmentation unit can be used to use the same block size and the corresponding grid that defines the block size for all pictures in the video sequence, or to change the block size between pictures or subsets or groups of pictures, and divide each picture into Corresponding block.

In one example, the prediction processing unit 260 of the encoder 20 may be used to perform any combination of the aforementioned segmentation techniques.

Like the picture 201, the image block 203 is also or can be regarded as a two-dimensional array or matrix of sampling points with sample values, although its size is smaller than that of the picture 201. In other words, the image block 203 may include, for example, one sampling array (for example, a luminance array in the case of a black-and-white picture 201) or three sampling arrays (for example, one luminance array and two chrominance arrays in the case of a color picture) or Any other number and/or type of array depending on the color format applied. The number of sampling points in the horizontal and vertical directions (or axes) of the image block 203 defines the size of the image block 203.

The encoder 20 shown in FIG. 2 is used to encode the picture 201 block by block, for example, to perform encoding and prediction on each image block 203.

The residual calculation unit 204 is used to calculate the residual block 205 based on the picture image block 203 and the prediction block 265 (other details of the prediction block 265 are provided below), for example, by subtracting the sample value of the picture image block 203 sample by sample (pixel by pixel). The sample values of the block 265 are de-predicted to obtain the residual block 205 in the sample domain.

The transform processing unit 206 is configured to apply a transform such as discrete cosine transform (DCT) or discrete sine transform (DST) to the sample values of the residual block 205 to obtain transform coefficients 207 in the transform domain. . The transform coefficient 207 may also be referred to as a transform residual coefficient, and represents the residual block 205 in the transform domain.

The transform processing unit 206 may be used to apply an integer approximation of DCT/DST, such as the transform specified for HEVC/H.265. Compared with the orthogonal DCT transform, this integer approximation is usually scaled by a factor. In order to maintain the norm of the residual block processed by the forward and inverse transformation, an additional scaling factor is applied as part of the transformation process. The scaling factor is usually selected based on certain constraints. For example, the scaling factor is a trade-off between the power of 2 used for the shift operation, the bit depth of the transform coefficient, accuracy, and implementation cost. For example, on the decoder 30 side, for example, the inverse transform processing unit 212 for the inverse transform (and on the encoder 20 side, for example, the inverse transform processing unit 212 for the corresponding inverse transform) designate a specific scaling factor, and accordingly, the encoder The 20 side uses the transformation processing unit 206 to specify a corresponding scaling factor for the positive transformation.

The quantization unit 208 is used to quantize the transform coefficient 207 by applying scalar quantization or vector quantization, for example, to obtain a quantized transform coefficient 209 (also referred to as a quantized coefficient 209). The quantized transform coefficient 209 may also be referred to as a quantized residual coefficient 209. The quantization process can reduce the bit depth associated with some or all of the transform coefficients 207. For example, n-bit transform coefficients can be rounded down to m-bit transform coefficients during quantization, where n is greater than m. The degree of quantization can be modified by adjusting the quantization parameter (QP). For example, for scalar quantization, different scales can be applied to achieve finer or coarser quantization. A smaller quantization step size corresponds to a finer quantization, and a larger quantization step size corresponds to a coarser quantization. The appropriate quantization step size can be indicated by a quantization parameter (QP). For example, the quantization parameter may be an index of a predefined set of suitable quantization steps. For example, a smaller quantization parameter can correspond to fine quantization (smaller quantization step size), and a larger quantization parameter can correspond to coarse quantization (larger quantization step size), and vice versa. Quantization may include division by a quantization step size and corresponding quantization or inverse quantization performed by, for example, inverse quantization 210, or may include multiplication by a quantization step size. Embodiments according to some standards such as HEVC may use quantization parameters to determine the quantization step size. In general, the quantization step size can be calculated based on the quantization parameter using a fixed-point approximation of an equation including division. Additional scaling factors can be introduced for quantization and inverse quantization to restore the norm of the residual block that may be modified due to the scale used in the fixed-point approximation of the equations for the quantization step size and the quantization parameter. In an example embodiment, the scales of inverse transform and inverse quantization may be combined. Alternatively, a custom quantization table can be used and signaled from the encoder to the decoder in, for example, a bitstream. Quantization is a lossy operation, where the larger the quantization step, the greater the loss.

The inverse quantization unit 210 is configured to apply the inverse quantization of the quantization unit 208 on the quantized coefficients to obtain the inverse quantized coefficients 211, for example, based on or use the same quantization step size as the quantization unit 208, and apply the quantization scheme applied by the quantization unit 208 The inverse quantification scheme. The inversely quantized coefficient 211 may also be referred to as the inversely quantized residual coefficient 211, which corresponds to the transform coefficient 207, although the loss due to quantization is usually different from the transform coefficient.

The inverse transform processing unit 212 is configured to apply the inverse transform of the transform applied by the transform processing unit 206, for example, an inverse discrete cosine transform (DCT) or an inverse discrete sine transform (DST), so as to be in the sample domain. Obtain the inverse transform block 213. The inverse transformation block 213 may also be referred to as an inverse transformation and inverse quantization block 213 or an inverse transformation residual block 213.

The reconstruction unit 214 (for example, the summer 214) is used to add the inverse transform block 213 (that is, the reconstructed residual block 213) to the prediction block 265 to obtain the reconstructed block 215 in the sample domain, for example, The sample value of the reconstructed residual block 213 and the sample value of the prediction block 265 are added.

Optionally, the buffer unit 216 (or "buffer" 216 for short) such as the line buffer 216 is used to buffer or store the reconstructed block 215 and the corresponding sample value for, for example, intra prediction. In other embodiments, the encoder can be used to use the unfiltered reconstructed block and/or the corresponding sample value stored in the buffer unit 216 to perform any type of estimation and/or prediction, such as intra-frame predict.

For example, an embodiment of the encoder 20 may be configured such that the buffer unit 216 is used not only for storing the reconstructed block 215 for intra prediction 254, but also for the loop filter unit 220 (not shown in FIG. 2 Out), and/or, for example, make the buffer unit 216 and the decoded picture buffer unit 230 form one buffer. Other embodiments may be used to use the filtered block 221 and/or blocks or samples from the decoded picture buffer 230 (neither shown in Figure 2) as the input or basis for the intra prediction 254.

The loop filter unit 220 (or “loop filter” 220 for short) is used to filter the reconstructed block 215 to obtain the filtered block 221, thereby smoothly performing pixel conversion or improving video quality. The loop filter unit 220 is intended to represent one or more loop filters, such as deblocking filters, sample-adaptive offset (SAO) filters, or other filters, such as bilateral filters, auto Adaptive loop filter (ALF), or sharpening or smoothing filter, or collaborative filter. Although the loop filter unit 220 is shown as an in-loop filter in FIG. 2, in other configurations, the loop filter unit 220 may be implemented as a post-loop filter. The filtered block 221 may also be referred to as a filtered reconstructed block 221. The decoded picture buffer 230 may store the reconstructed coded block after the loop filter unit 220 performs a filtering operation on the reconstructed coded block.

The embodiment of the encoder 20 (correspondingly, the loop filter unit 220) can be used to output loop filter parameters (e.g., sample adaptive offset information), for example, directly output or by the entropy encoding unit 270 or any other The entropy coding unit is output after entropy coding, for example, so that the decoder 30 can receive and apply the same loop filter parameters for decoding.

The decoded picture buffer (DPB) 230 may be a reference picture memory that stores reference picture data for the encoder 20 to encode video data. DPB 230 can be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM) (including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM)), resistive RAM (resistive RAM, RRAM)) or other types of memory devices. The DPB 230 and the buffer 216 may be provided by the same memory device or a separate memory device. In a certain example, a decoded picture buffer (DPB) 230 is used to store the filtered block 221. The decoded picture buffer 230 may be further used to store other previous filtered blocks of the same current picture or different pictures such as the previously reconstructed picture, such as the previously reconstructed and filtered block 221, and may provide a complete previous Reconstruction is a decoded picture (and corresponding reference blocks and samples) and/or a partially reconstructed current picture (and corresponding reference blocks and samples), for example, for inter prediction. In an example, if the reconstructed block 215 is reconstructed without in-loop filtering, a decoded picture buffer (DPB) 230 is used to store the reconstructed block 215.

The prediction processing unit 260, also referred to as the block prediction processing unit 260, is used to receive or obtain the image block 203 (the current image block 203 of the current picture 201) and reconstructed picture data, such as the same (current) picture from the buffer 216 The reference samples and/or the reference picture data 231 of one or more previously decoded pictures from the decoded picture buffer 230, and used to process such data for prediction, that is, the provision can be an inter-predicted block 245 or a The prediction block 265 of the intra prediction block 255.

The mode selection unit 262 may be used to select a prediction mode (for example, intra or inter prediction mode) and/or the corresponding prediction block 245 or 255 used as the prediction block 265 to calculate the residual block 205 and reconstruct the reconstructed block 215.

The embodiment of the mode selection unit 262 may be used to select a prediction mode (for example, from those supported by the prediction processing unit 260) that provides the best match or minimum residual (the minimum residual means Better compression in transmission or storage), or provide minimal signaling overhead (minimum signaling overhead means better compression in transmission or storage), or consider or balance the two at the same time. The mode selection unit 262 may be configured to determine a prediction mode based on rate distortion optimization (RDO), that is, select a prediction mode that provides the smallest rate-distortion optimization, or select a prediction mode whose related rate-distortion at least meets the prediction mode selection criteria .

The prediction processing performed by an example of the encoder 20 (for example, by the prediction processing unit 260) and the mode selection performed (for example, by the mode selection unit 262) will be explained in detail below.

As described above, the encoder 20 is used to determine or select the best or optimal prediction mode from a set of (predetermined) prediction modes. The prediction mode set may include, for example, an intra prediction mode and/or an inter prediction mode.

The set of intra prediction modes may include 35 different intra prediction modes, for example, non-directional modes such as DC (or mean) mode and planar mode, or directional modes as defined in H.265, or may include 67 Different intra-frame prediction modes, for example, non-directional modes such as DC (or mean) mode and planar mode, or directional modes as defined in H.266 under development.

In a possible implementation, the set of inter-frame prediction modes depends on the available reference pictures (ie, for example, the aforementioned at least part of the decoded pictures stored in the DBP230) and other inter-frame prediction parameters, such as whether the entire reference picture is used or only A part of the reference picture, such as the search window area surrounding the area of the current block, to search for the best matching reference block, and/or for example depending on whether pixel interpolation such as half-pixel and/or quarter-pixel interpolation is applied, The set of inter prediction modes may include, for example, an advanced motion vector (Advanced Motion Vector Prediction, AMVP) mode and a merge mode. In a specific implementation, the set of inter prediction modes may include an improved AMVP mode based on control points, and an improved merge mode based on control points. In one example, the intra prediction unit 254 may be used to perform any combination of inter prediction techniques.

In addition to the above prediction modes, the embodiments of the present application may also apply skip mode and/or direct mode.

The prediction processing unit 260 may be further used to divide the image block 203 into smaller block partitions or sub-blocks, for example, by iteratively using quad-tree (QT) segmentation and binary-tree (BT) segmentation. Or triple-tree (TT) segmentation, or any combination thereof, and used to perform prediction, for example, for each of the block partitions or sub-blocks, where the mode selection includes selecting the tree structure of the segmented image block 203 and selecting the application The prediction mode for each of the block partitions or sub-blocks.

The inter prediction unit 244 may include a motion estimation (ME) unit (not shown in FIG. 2) and a motion compensation (MC) unit (not shown in FIG. 2). The motion estimation unit is used to receive or obtain the picture image block 203 (the current picture image block 203 of the current picture 201) and the decoded picture 231, or at least one or more previously reconstructed blocks, for example, one or more other/different The reconstructed block of the previously decoded picture 231 is used for motion estimation. For example, the video sequence may include the current picture and the previously decoded picture 31, or in other words, the current picture and the previously decoded picture 31 may be part of the picture sequence forming the video sequence, or form the picture sequence.

For example, the encoder 20 may be used to select a reference block from multiple reference blocks of the same or different pictures in multiple other pictures, and provide the reference picture and/or provide a reference to the motion estimation unit (not shown in FIG. 2) The offset (spatial offset) between the position of the block (X, Y coordinates) and the position of the current block is used as an inter prediction parameter. This offset is also called a motion vector (MV).

The motion compensation unit is used to obtain inter-frame prediction parameters, and perform inter-frame prediction based on or using the inter-frame prediction parameters to obtain the inter-frame prediction block 245. The motion compensation performed by the motion compensation unit (not shown in FIG. 2) may include fetching or generating a prediction block based on a motion/block vector determined by motion estimation (interpolation of sub-pixel accuracy may be performed). Interpolation filtering can generate additional pixel samples from known pixel samples, thereby potentially increasing the number of candidate prediction blocks that can be used to encode picture blocks. Once the motion vector for the PU of the current picture block is received, the motion compensation unit 246 may locate the prediction block pointed to by the motion vector in a reference picture list. The motion compensation unit 246 may also generate syntax elements associated with the block and the video slice for use by the decoder 30 when decoding the picture block of the video slice.

Specifically, the aforementioned inter-prediction unit 244 may transmit syntax elements to the entropy encoding unit 270, and the syntax elements include inter-prediction parameters (for example, after traversing multiple inter-prediction modes and selecting the inter-prediction mode used for prediction of the current block) Instructions). In a possible application scenario, if there is only one inter-frame prediction mode, the inter-frame prediction parameter may not be carried in the syntax element. In this case, the decoder 30 can directly use the default prediction mode for decoding. It can be understood that the inter prediction unit 244 may be used to perform any combination of inter prediction techniques.

The intra prediction unit 254 is used to obtain, for example, receive the picture block 203 (current picture block) of the same picture and one or more previously reconstructed blocks, for example reconstructed adjacent blocks, for intra estimation. For example, the encoder 20 may be used to select an intra prediction mode from a plurality of (predetermined) intra prediction modes.

The embodiment of the encoder 20 may be used to select an intra prediction mode based on optimization criteria, for example, based on a minimum residual (for example, an intra prediction mode that provides a prediction block 255 most similar to the current picture block 203) or a minimum rate distortion.

The intra prediction unit 254 is further configured to determine the intra prediction block 255 based on the intra prediction parameters of the selected intra prediction mode. In any case, after selecting the intra prediction mode for the block, the intra prediction unit 254 is also used to provide intra prediction parameters to the entropy encoding unit 270, that is, to provide an indication of the selected intra prediction mode for the block Information. In one example, the intra prediction unit 254 may be used to perform any combination of intra prediction techniques.

Specifically, the aforementioned intra prediction unit 254 may transmit syntax elements to the entropy encoding unit 270, where the syntax elements include intra prediction parameters (for example, the intra prediction mode selected for the current block prediction after traversing multiple intra prediction modes). Instructions). In a possible application scenario, if there is only one intra prediction mode, the intra prediction parameter may not be carried in the syntax element. In this case, the decoder 30 can directly use the default prediction mode for decoding.

The entropy coding unit 270 is configured to use entropy coding algorithms or schemes (for example, variable length coding (VLC) scheme, context adaptive VLC (context adaptive VLC, CAVLC) scheme, arithmetic coding scheme, context adaptive binary arithmetic) Coding (context adaptive binary arithmetic coding, CABAC), syntax-based context-adaptive binary arithmetic coding (SBAC), probability interval partitioning entropy (PIPE) coding or other entropy Coding method or technique) applied to quantized residual coefficients 209, inter-frame prediction parameters, intra-frame prediction parameters, and/or loop filter parameters, or all of them (or not applied), to obtain data that can be output by output 272 For example, the encoded picture data 21 is output in the form of an encoded bit stream 21. The encoded bitstream can be transmitted to the video decoder 30, or archived for later transmission or retrieval by the video decoder 30. The entropy encoding unit 270 may also be used to entropy encode other syntax elements of the current video slice being encoded.

Other structural variants of the video encoder 20 can be used to encode video streams. For example, the non-transform-based encoder 20 can directly quantize the residual signal without the transform processing unit 206 for certain blocks or frames. In another embodiment, the encoder 20 may have a quantization unit 208 and an inverse quantization unit 210 combined into a single unit.

Specifically, in the embodiment of the present application, the encoder 20 may be used to implement the video encoding method described in the following embodiments.

It should be understood that other structural changes of the video encoder 20 can be used to encode the video stream. For example, for some image blocks or image frames, the video encoder 20 can directly quantize the residual signal without being processed by the transform processing unit 206, and accordingly does not need to be processed by the inverse transform processing unit 212; or, for some For image blocks or image frames, the video encoder 20 does not generate residual data, and accordingly does not need to be processed by the transform processing unit 206, quantization unit 208, inverse quantization unit 210, and inverse transform processing unit 212; or, the video encoder 20 may The reconstructed image block is directly stored as a reference block without being processed by the filter 220; alternatively, the quantization unit 208 and the inverse quantization unit 210 in the video encoder 20 may be merged together. The loop filter 220 is optional, and in the case of lossless compression coding, the transform processing unit 206, the quantization unit 208, the inverse quantization unit 210, and the inverse transform processing unit 212 are optional. It should be understood that, according to different application scenarios, the inter prediction unit 244 and the intra prediction unit 254 may be selectively activated.

Referring to FIG. 3, FIG. 3 shows a schematic/conceptual block diagram of an example of a decoder 30 for implementing an embodiment of the present application. The video decoder 30 is used to receive, for example, encoded picture data (for example, an encoded bit stream) 21 encoded by the encoder 20 to obtain a decoded picture 231. During the decoding process, video decoder 30 receives video data from video encoder 20, such as an encoded video bitstream and associated syntax elements that represent picture blocks of an encoded video slice.

In the example of FIG. 3, the decoder 30 includes an entropy decoding unit 304, an inverse quantization unit 310, an inverse transform processing unit 312, a reconstruction unit 314 (such as a summer 314), a buffer 316, a loop filter 320, and The decoded picture buffer 330 and the prediction processing unit 360. The prediction processing unit 360 may include an inter prediction unit 344, an intra prediction unit 354, and a mode selection unit 362. In some examples, video decoder 30 may perform decoding passes that are substantially reciprocal of the encoding passes described with video encoder 20 of FIG. 2.

The entropy decoding unit 304 is configured to perform entropy decoding on the encoded picture data 21 to obtain, for example, quantized coefficients 309 and/or decoded encoding parameters (not shown in FIG. 3), for example, inter prediction, intra prediction parameters , Loop filter parameters and/or any one or all of other syntax elements (decoded). The entropy decoding unit 304 is further configured to forward the inter prediction parameters, intra prediction parameters, and/or other syntax elements to the prediction processing unit 360. The video decoder 30 may receive syntax elements at the video slice level and/or the video block level.

The inverse quantization unit 310 can be functionally the same as the inverse quantization unit 110, the inverse transformation processing unit 312 can be functionally the same as the inverse transformation processing unit 212, the reconstruction unit 314 can be functionally the same as the reconstruction unit 214, and the buffer 316 can be functionally identical. Like the buffer 216, the loop filter 320 may be functionally the same as the loop filter 220, and the decoded picture buffer 330 may be functionally the same as the decoded picture buffer 230.

The prediction processing unit 360 may include an inter prediction unit 344 and an intra prediction unit 354. The inter prediction unit 344 may be functionally similar to the inter prediction unit 244, and the intra prediction unit 354 may be functionally similar to the intra prediction unit 254. . The prediction processing unit 360 is generally used to perform block prediction and/or obtain a prediction block 365 from the encoded data 21, and to receive or obtain (explicitly or implicitly) prediction-related parameters and/or related parameters from, for example, the entropy decoding unit 304. Information about the selected prediction mode.

When a video slice is encoded as an intra-coded (I) slice, the intra-prediction unit 354 of the prediction processing unit 360 is used to predict the intra-prediction mode based on the signal and the information from the previous decoded block of the current frame or picture. Data to generate a prediction block 365 for the picture block of the current video slice. When a video frame is coded as inter-coded (ie, B or P) slices, the inter-prediction unit 344 (e.g., motion compensation unit) of the prediction processing unit 360 is used to based on the motion vector and received from the entropy decoding unit 304 The other syntax elements generate a prediction block 365 for the video block of the current video slice. For inter prediction, a prediction block can be generated from a reference picture in a reference picture list. The video decoder 30 may use the default construction technique to construct a list of reference frames based on the reference pictures stored in the DPB 330: list 0 and list 1.

The prediction processing unit 360 is configured to determine prediction information for the video block of the current video slice by parsing the motion vector and other syntax elements, and use the prediction information to generate the prediction block for the current video block being decoded. In an example of the present application, the prediction processing unit 360 uses some received syntax elements to determine the prediction mode (for example, intra or inter prediction) and the inter prediction slice type ( For example, B slice, P slice or GPB slice), construction information for one or more of the reference picture list for the slice, motion vector for each inter-coded video block of the slice, The inter prediction status and other information of each inter-coded video block of the slice to decode the video block of the current video slice. In another example of the present disclosure, the syntax elements received by the video decoder 30 from the bitstream include receiving adaptive parameter set (APS), sequence parameter set (sequence parameter set, SPS), and picture parameter set (picture parameter set). parameter set, PPS) or a syntax element in one or more of the slice headers.

The inverse quantization unit 310 may be used to inverse quantize (ie, inverse quantize) the quantized transform coefficients provided in the bitstream and decoded by the entropy decoding unit 304. The inverse quantization process may include using the quantization parameter calculated by the video encoder 20 for each video block in the video slice to determine the degree of quantization that should be applied and also determine the degree of inverse quantization that should be applied.

The inverse transform processing unit 312 is used to apply an inverse transform (for example, an inverse DCT, an inverse integer transform, or a conceptually similar inverse transform process) to transform coefficients in order to generate a residual block in the pixel domain.

The reconstruction unit 314 (for example, the summer 314) is used to add the inverse transform block 313 (that is, the reconstructed residual block 313) to the prediction block 365 to obtain the reconstructed block 315 in the sample domain, for example by adding The sample value of the reconstructed residual block 313 and the sample value of the prediction block 365 are added.

The loop filter unit 320 (during the encoding cycle or after the encoding cycle) is used to filter the reconstructed block 315 to obtain the filtered block 321, thereby smoothly performing pixel transformation or improving video quality. In one example, the loop filter unit 320 may be used to perform any combination of the filtering techniques described below. The loop filter unit 320 is intended to represent one or more loop filters, such as deblocking filters, sample-adaptive offset (SAO) filters or other filters, such as bilateral filters, auto Adaptive loop filter (ALF), or sharpening or smoothing filter, or collaborative filter. Although the loop filter unit 320 is shown as an in-loop filter in FIG. 3, in other configurations, the loop filter unit 320 may be implemented as a post-loop filter.

The decoded video block 321 in a given frame or picture is then stored in a decoded picture buffer 330 that stores reference pictures for subsequent motion compensation.

The decoder 30 is used, for example, to output the decoded picture 31 through the output 332 for presentation to the user or for the user to view.

Other variants of the video decoder 30 can be used to decode the compressed bitstream. For example, the decoder 30 may generate an output video stream without the loop filter unit 320. For example, the non-transform-based decoder 30 may directly inversely quantize the residual signal without the inverse transform processing unit 312 for certain blocks or frames. In another embodiment, the video decoder 30 may have an inverse quantization unit 310 and an inverse transform processing unit 312 combined into a single unit.

Specifically, in the embodiment of the present application, the decoder 30 is used to implement the video decoding method described in the following embodiments.

It should be understood that other structural changes of the video decoder 30 can be used to decode the encoded video bitstream. For example, the video decoder 30 may generate an output video stream without processing by the filter 320; or, for some image blocks or image frames, the entropy decoding unit 304 of the video decoder 30 does not decode the quantized coefficients, and accordingly does not It needs to be processed by the inverse quantization unit 310 and the inverse transform processing unit 312. The loop filter 320 is optional; and in the case of lossless compression, the inverse quantization unit 310 and the inverse transform processing unit 312 are optional. It should be understood that, according to different application scenarios, the inter prediction unit and the intra prediction unit may be selectively activated.

It should be understood that in the encoder 20 and decoder 30 of the present application, the processing result for a certain link can be further processed and output to the next link, for example, in interpolation filtering, motion vector derivation or loop filtering, etc. After the link, operations such as Clip or shift are further performed on the processing results of the corresponding link.

For example, the motion vector of the control point of the current image block derived from the motion vector of the adjacent affine coding block, or the motion vector of the sub-block of the current image block derived from the motion vector, may undergo further processing, and this application will not do this. limited. For example, restrict the value range of the motion vector so that it is within a certain bit width. Assuming that the bit width of the allowed motion vector is bitDepth, the range of the motion vector is -2 ^bitDepth-1 to 2 ^bitDepth-1 -1. If bitDepth is 16, the value range is -32768～32767. If bitDepth is 18, the value range is -131072～131071. For another example, the value of the motion vector (for example, the motion vector MV of the four 4×4 sub-blocks in an 8×8 image block) is restricted so that the integer part of the four 4×4 sub-blocks MV is the largest The difference does not exceed N pixels, for example, does not exceed one pixel.

The following two methods can be used to constrain to make it within a certain bit width:

Method 1, remove the high bits of the motion vector overflow:

ux=(vx+2 ^bitDepth )%2 ^bitDepth

vx=(ux≥2 ^bitDepth-1 )? (ux-2 ^bitDepth ):ux

uy=(vy+2 ^bitDepth )%2 ^bitDepth

vy=(uy≥2 ^bitDepth-1 )? (uy-2 ^bitDepth ):uy

Where vx is the horizontal component of the motion vector of the image block or the sub-block of the image block, vy is the vertical component of the motion vector of the image block or the sub-block of the image block, and ux and uy are intermediate values; bitDepth represents bit width.

For example, the value of vx is -32769, and the value obtained by the above formula is 32767. Because in the computer, the value is stored in the form of two's complement, the two's complement of -32769 is 1,0111,1111,1111,1111 (17 bits), and the computer handles the overflow by discarding the high bits, then the value of vx If it is 0111,1111,1111,1111, it is 32767, which is consistent with the result obtained by formula processing.

Method 2, Clipping the motion vector, as shown in the following formula:

vx=Clip3(-2 ^bitDepth-1 ,2 ^bitDepth-1 -1,vx)

vy=Clip3(-2 ^bitDepth-1 ,2 ^bitDepth-1 -1,vy)

Where vx is the horizontal component of the motion vector of the image block or the sub-block of the image block, and vy is the vertical component of the motion vector of the image block or the sub-block of the image block; where x, y, and z correspond to MV clamps, respectively The three input values of the bit process Clip3. The definition of Clip3 is to clamp the value of z to the interval [x, y]:

Referring to FIG. 4, FIG. 4 is a schematic structural diagram of a video decoding device 400 (for example, a video encoding device 400 or a video decoding device 400) provided by an embodiment of the present application. The video coding device 400 is suitable for implementing the embodiments described herein. In one embodiment, the video coding device 400 may be a video decoder (for example, the decoder 30 of FIG. 1A) or a video encoder (for example, the encoder 20 of FIG. 1A). In another embodiment, the video coding device 400 may be one or more components of the decoder 30 of FIG. 1A or the encoder 20 of FIG. 1A described above.

The video decoding device 400 includes: an entrance port 410 for receiving data and a receiving unit (Rx) 420, a processor, logic unit or central processing unit (CPU) 430 for processing data, and a transmitter unit for transmitting data (Tx) 440 and outlet port 450, and a memory 460 for storing data. The video decoding device 400 may further include photoelectric conversion components and electro-optical (EO) components coupled with the inlet port 410, the receiver unit 420, the transmitter unit 440, and the outlet port 450 for the outlet or inlet of optical or electrical signals.

The processor 430 is implemented by hardware and software. The processor 430 may be implemented as one or more CPU chips, cores (for example, multi-core processors), FPGAs, ASICs, and DSPs. The processor 430 communicates with the ingress port 410, the receiver unit 420, the transmitter unit 440, the egress port 450, and the memory 460. The processor 430 includes a decoding module 470 (for example, an encoding module 470 or a decoding module 470). The encoding/decoding module 470 implements the embodiments disclosed herein to implement the video encoding method provided in the embodiments of the present application. For example, the encoding/decoding module 470 implements, processes, or provides various encoding operations. Therefore, the encoding/decoding module 470 provides a substantial improvement to the function of the video decoding device 400, and affects the conversion of the video decoding device 400 to different states. Alternatively, the encoding/decoding module 470 is implemented by instructions stored in the memory 460 and executed by the processor 430.

The memory 460 includes one or more magnetic disks, tape drives, and solid-state hard disks, and can be used as an overflow data storage device for storing programs when these programs are selectively executed, and storing instructions and data read during program execution. The memory 460 may be volatile and/or non-volatile, and may be read-only memory (ROM), random access memory (RAM), random access memory (ternary content-addressable memory, TCAM) and/or static Random Access Memory (SRAM).

Referring to FIG. 5, FIG. 5 is a simplified block diagram of an apparatus 500 that can be used as either or both of the source device 12 and the destination device 14 in FIG. 1A according to an exemplary embodiment. The device 500 can implement the technology of the present application. In other words, FIG. 5 is a schematic block diagram of an implementation manner of an encoding device or a decoding device (referred to as a decoding device 500 for short) according to an embodiment of the application. The decoding device 500 may include a processor 510, a memory 530, and a bus system 550. The processor and the memory are connected by a bus system, the memory is used to store instructions, and the processor is used to execute instructions stored in the memory. The memory of the decoding device stores program codes, and the processor can call the program codes stored in the memory to execute various video encoding or decoding methods described in this application, especially various new video encoding or decoding methods. To avoid repetition, it will not be described in detail here.

In the embodiment of the present application, the processor 510 may be a central processing unit (Central Processing Unit, referred to as "CPU" for short), and the processor 510 may also be other general-purpose processors, digital signal processors (DSP), and dedicated integration Circuit (ASIC), off-the-shelf programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor or the like.

The memory 530 may include a read only memory (ROM) device or a random access memory (RAM) device. Any other suitable type of storage device can also be used as the memory 530. The memory 530 may include code and data 531 that are accessed by the processor 510 using the bus 550. The memory 530 may further include an operating system 533 and an application program 535. The application program 535 includes at least one program that allows the processor 510 to execute the video encoding or decoding method described in this application. For example, the application program 535 may include applications 1 to N, which further include a video encoding or decoding application (referred to as a video coding application) that executes the video encoding or decoding method described in this application.

In addition to the data bus, the bus system 550 may also include a power bus, a control bus, and a status signal bus. However, for clear description, various buses are marked as the bus system 550 in the figure.

Optionally, the decoding device 500 may further include one or more output devices, such as a display 570. In one example, the display 570 may be a touch-sensitive display that merges the display with a touch-sensitive unit operable to sense touch input. The display 570 may be connected to the processor 510 via the bus 550.

The following describes the solution of the embodiment of the application in detail:

First, explain and explain several terms involved in the following embodiments of the present application.

Image block: The video sequence as described above includes a series of pictures, the images are further divided into slices, and the slices are further divided into blocks, which can also be called image blocks. The image block may be a macroblock (MB) in the H.264 standard.

Quantization processing: used to quantize transform coefficients by applying scalar quantization or vector quantization, for example, to obtain quantized coefficients. The quantization process can reduce the bit depth related to some or all of the transform coefficients.

The coefficient sequence of the image block: the sequence of the image block after the quantization process, for example, after the image block is transformed, quantized, and sequentially scanned (for example, zigzag scan), the coefficient sequence of the image block is obtained. In the coefficient sequence Multiple AC coefficients can be included. The AC coefficient represents the amplitude of the AC component.

Bit layering: According to the bit position, layer multiple AC coefficients in the coefficient sequence of the image block to obtain multiple layer sequences of the image block, where each layer sequence includes the same bit of the multiple AC coefficients. information. Take two AC coefficients 8 and -8 as an example. The binary representation of 8 is 01000, and the binary representation of -8 is 11000. Among them, the first bit from left to right in the binary representation is the sign bit, 0 Represents a positive number, 1 represents a negative number, the two AC coefficients are bit layered, and the multiple layer sequences obtained are 01, 11, 00, 00, 00. 01 is a layer sequence, 11 is a layer sequence, and three 00 is a layer sequence respectively. The multiple layer sequences are only an example for illustration, and the embodiments of the present application are not limited thereto.

Bit p: the bit numbered p, p can be any integer such as 0, 1, 2, 3.

The kth bit or the kth bit: the kth bit in order from right to left, k can be any natural number such as 1, 2, 3, etc.

Directly perform quantization processing on the image block, or perform transformation processing (for example, DCT or DST) and quantization processing on the image block, obtain quantized coefficients, and perform entropy coding on the quantized coefficients to obtain the output bitstream. The video encoding method of the embodiment of the present application adopts an image layered encoding algorithm in the entropy encoding process, performs bit layering on the AC coefficients that need to be encoded, and obtains multiple layer sequences, and each layer sequence (that is, each layer) independently executes entropy Encoding to obtain the output code stream can realize that when the link capacity is reduced to below the code rate, the decoding end can still obtain the reconstructed image, avoiding mosaics, freezes and other phenomena that affect the viewing experience. For specific explanations of the video encoding method in the embodiments of the present application, reference may be made to the following embodiments.

FIG. 6 is a flowchart of a video encoding method according to an embodiment of the application. This embodiment relates to a source device and a destination device. The source device includes an encoder, and the destination device includes a decoder. As shown in FIG. The method of the embodiment may include:

Step 101: The encoder obtains a coefficient sequence and a first parameter of at least one image block.

The at least one image block may be a block that is divided into slices as described above, and the size of each image block may be 8*8, 16*16, etc., which can be flexibly set according to requirements. The coefficient sequence is a sequence after the at least one image block is quantized. The first parameter is the basic information required by the decoder to reconstruct the image block. The first parameter may include at least one of resolution, synchronization word, motion vector (MV) or direct current (DC) coefficients . The DC coefficient represents the amplitude of the DC component.

For example, the encoder may perform transformation processing (for example, DCT or DST), quantization processing, and sequential scanning (for example, zigzag scanning) on at least one image block of the slice, and then obtain the coefficient sequence of the at least one image block. The coefficient sequence may include multiple AC coefficients.

Step 102: The encoder layered the coefficient sequence of the at least one image block according to the bit position, and obtained multiple layer sequences of each image block.

Each layer sequence of the multiple layer sequences of each image block includes the same bit information of multiple AC coefficients in the coefficient sequence of the image block. That is, the multiple layer sequences respectively correspond to one or more bits. In other words, each layer sequence in the multiple layer sequences corresponds to one bit; or, some layer sequences in the multiple layer sequences correspond to one bit, and some layer sequences correspond to multiple bits; or, the multiple layers Each layer sequence in the sequence corresponds to multiple bits.

Wherein, the coefficient sequence of the at least one image block is layered according to the bit position, which can also be understood as the bit layering of the coefficient sequence of the at least one image block, that is, the AC coefficients in the coefficient sequence are divided according to the bit position. Divided into multiple layers.

Take the above two AC coefficients 8 and -8 as an example. The binary representation of 8 is 01000, its sign bit is bit 4 (bit4), the value is 0, bit 3 (bit3) (except for the sign bit) The highest bit) has a value of 1, bit 2 (bit2) has a value of 0, bit 1 (bit1) has a value of 0, and bit 0 (bit0) has a value of 0. The binary representation of -8 is 11000, its sign bit is bit 4 (bit4), the value is 1, bit 3 (bit3) (the most significant bit except the sign bit) is 1, and bit 2 (bit2) is The value is 0, the value of bit 1 (bit1) is 0, and the value of bit 0 (bit0) is 0. The encoder of the embodiment of the present application performs bit layering on the two AC coefficients to obtain multiple layer sequences. For example, taking the acquisition of 5 layer sequences as an example, the 5 layer sequences correspond to bit 4 (bit 4), bit 3 (bit 3), bit 2 (bit 2), bit 1 (bit 1), and bit 0 (bit 0), respectively. For another example, take obtaining 4 layer sequences as an example, one of the 4 layer sequences corresponds to bit 4 (bit4), the other layer sequence corresponds to bit 3 (bit3) and bit 2 (bit2), and another layer sequence Corresponding to bit 1 (bit1), another layer sequence corresponds to bit 0 (bit0).

In some embodiments, each layer sequence of the plurality of layer sequences includes one or more bits of information of the binary representation of each AC coefficient in the coefficient sequence of the at least one image block. That is, each layer sequence includes information on corresponding bits of multiple AC coefficients. Taking the above four layer sequences as an example for further illustration, one of the four layer sequences corresponds to bit 4 (bit4), the layer sequence includes 01, and the other layer sequence corresponds to bit 3 (bit3) and bit 2. (bit2), the layer sequence includes 10 (the corresponding binary is 2) 10 (the corresponding binary is 2), another layer sequence corresponds to bit 1 (bit1), the layer sequence includes 00, and another layer sequence corresponds to bit 0 ( bit0), the layer sequence includes 00.

Step 103: The encoder performs entropy encoding on the multiple layer sequences of each image block respectively, and obtains the multiple layer codeword sequences of each image block.

After the bit layering in step 102, the encoder performs entropy coding on each layer independently to obtain multiple layer code word sequences, for example, entropy coding each of the above 4 layer sequences to obtain 4 layers Codeword sequence, the four layer codeword sequences are respectively, the layer codeword sequence corresponding to bit 4 (bit4), the layer codeword sequence corresponding to bit 3 (bit3) and bit 2 (bit2), and bit 1 (bit1) corresponds to The layer code word sequence of bit 0 (bit0) corresponds to the layer code word sequence. Wherein, the entropy coding can be any entropy coding method, for example, run-length coding and Huffman coding.

Step 104: The encoder obtains a code stream corresponding to the at least one image block according to the first parameter of the at least one image block and the multiple layer code word sequence of each image block.

For example, the encoder may serially splice the first parameter of at least one image block of the slice and the multiple layer code word sequence of the at least one image block to obtain the code stream of the slice, and the code stream of the slice includes the A code stream of the first parameter of at least one image block and a code stream of multiple layer codeword sequences of the at least one image block. Wherein, the code stream of the multiple layer code word sequences of the at least one image block may be obtained by serially splicing the multiple layer code word sequences of the at least one image block. The same layer in the multiple layer code word sequence of each image block is serially spliced. Take two image blocks as an example. Each image block has 4 layer code word sequences. The serial splicing method is to splice the layer code word sequences corresponding to bit 4 (bit4) of the two together, and The layer codeword sequence corresponding to bit 3 (bit3) and bit 2 (bit2) of the two are spliced together, and the layer code word sequence corresponding to bit 1 (bit1) of the two is spliced together, and the bit 0 ( bit0) the corresponding layer code word sequence is spliced together.

Step 105: The encoder sends a code stream corresponding to at least one image block to the decoder.

Correspondingly, the decoder receives the code stream corresponding to at least one image block sent by the encoder. In some embodiments, the encoder may send the code stream corresponding to the at least one image block to the destination device through the communication interface of the source device. The communication interface of the destination device receives the code stream corresponding to the at least one image block, and transmits it to the decoder of the destination device.

Exemplarily, after acquiring the code stream corresponding to the at least one image block, the encoder may output the code stream corresponding to the at least one image block to the communication interface of the source device, and the communication interface may correspond to the at least one image block. For example, RTP packaging is used to obtain multiple RTP packets, and then multiple RTP packets are encapsulated at the Media Access Control (MAC) layer and the physical (PHY) layer, and then sent to the decoder side.

After receiving the code stream corresponding to the at least one image block, the decoder can adopt a processing method corresponding to the encoder (that is, the reverse process) to decode and reconstruct the at least one image block.

In an implementation manner, the first parameter of at least one image block of the slice is carried at the front end of the code stream of the slice, that is, before the code stream corresponding to the multi-layer code word sequence of the at least one image block. Through the following step 105, the code stream of the first parameter of the at least one image block is sent first, and then the code stream of the multiple layer code word sequences of the at least one image block is sent.

In another achievable manner, for the first parameter of at least one image block of the slice, it is mapped to a high-level quality of service (Quality of Service, QoS), and for the multiple layer codeword sequence corresponding to the at least one image block The code stream is mapped to the low-level QoS. That is, the QoS levels of the RTP packet carrying the first parameter and the RTP packet carrying multiple layer codeword sequences are different. It should be noted that the QoS level of the RTP packet of each layer codeword sequence may also be different. For example, the QoS level of the layer codeword sequence corresponding to the high bit is higher than the layer codeword sequence corresponding to the low bit. In other words, different QoS guarantee mechanisms are used to send the first parameter and multiple layer codeword sequences to ensure that the decoder can accurately receive more important information, for example, the first parameter, high-bit information.

In this embodiment, by obtaining the coefficient sequence and the first parameter of at least one image block, the coefficient sequence of the at least one image block is layered according to the bit position, and multiple layer sequences of each image block are obtained. Entropy coding is performed on the multiple layer sequences of each image block to obtain multiple layer code word sequences of each image block, and the at least one image is obtained according to the first parameter of at least one image block and the multiple layer code word sequences of each image block The code stream corresponding to the block sends the code stream corresponding to at least one image block to the decoder, so that the decoder reconstructs the at least one image block based on the received code stream corresponding to the at least one image block. Since each layer sequence in the multiple layer sequences of each image block includes the same bit information of multiple AC coefficients in the coefficient sequence of the image block, the encoder sends the code stream by layer, so the decoder can be based on layer Sequence decoding restores multiple AC coefficients or approximate values of AC coefficients in the coefficient sequence of the image block, thereby reconstructing the image block. When the channel capacity is too low to transmit a complete bit stream, the decoding end can still reconstruct image blocks to avoid phenomena such as mosaics and freezes that affect the viewing experience.

In the encoding method of the prior art, when the code stream is lost due to poor channel capacity, the decoder cannot reconstruct the image block, that is, the phenomenon of mosaic and stutter occurs. Compared with the encoding method of the prior art, the encoding method of the embodiment of the present application can restore the myopia value of the AC coefficient based on the received part of the code stream when the bit stream is lost due to the poor channel capacity, so as to obtain the relative quality. Lower the reconstructed image to avoid the phenomenon of mosaic and freeze caused by the inability to reconstruct the image block.

Each layer sequence in the above multiple layer sequences corresponds to one bit; or, some layer sequences in the multiple layer sequences correspond to one bit, and some layer sequences correspond to multiple bits, and specific explanations are given.

The embodiment of the present application may adopt the following achievable way for layering: taking the symbol bit in the binary representation of all the AC coefficients of each image block as the symbol layer sequence of the image block. The high n bits in the binary representation of all the AC coefficients of the image block are taken as the first layer sequence of the image block, and the high n bits include the Nth to N-n+1 in the binary representation of each AC coefficient. Bit, the Nth bit is the highest bit in the binary representation of all AC coefficients except for the sign bit. Each of the low-k bits in the binary representation of all the AC coefficients of the image block is used as the second-layer sequence to the k+1-th layer sequence of the image block, and the low-k bits include the binary value of each AC coefficient. Represents the 1st bit to the kth bit in the display. Wherein, N is an integer greater than 2, n is any positive integer less than N, k is any positive integer less than N, and N=n+k.

That is, the multiple layer sequences of each image block in the embodiment of the present application may be divided into the symbol layer sequence of the image block, the first layer sequence to the k+1th layer sequence of the image block. Wherein, the symbol layer sequence of the image block includes the symbol bits in the binary representation of all the AC coefficients of the image block, and the first layer sequence of the image block includes the high n bits in the binary representation of all the AC coefficients of the image block, The high n bits include the Nth bit to the N-n+1th bit in the binary representation of each AC coefficient, and the Nth bit is the highest bit in the binary representation of all AC coefficients except for the sign bit. The second layer sequence to the k+1 layer sequence of the image block respectively include one of the low-k bits in the binary representation of all the AC coefficients of the image block, and the low-k bit includes the binary representation of each AC coefficient. From the 1st bit to the kth bit in.

For example, the above-mentioned AC coefficients -8 and 8 are layered according to bits to obtain 4 layer sequences, and the layer sequence corresponding to bit 4 (bit4) is the symbol layer sequence. N is 4, n is 2, k is 2, and the layer sequence corresponding to bit 3 (bit3) (the 4th bit in 11000) and bit 2 (bit2) (the 3rd bit in 11000) is the first layer Sequence, the layer sequence corresponding to bit 1 (bit1) (the second bit in 11000) is the second layer sequence, and the layer sequence corresponding to bit 0 (bit0) (the first bit in 11000) is the third layer sequence.

The m-th bit involved in the embodiment of the present application refers to the m-th bit counted from right to left in the binary representation.

In some embodiments, the above-mentioned step 103 can be implemented in the following two ways: way one, except for the symbol layer, other layers are independently coded; way two, the symbol layer and other layers are jointly coded.

The specific implementation of the first method can be as follows: run-length coding and Huffman coding are performed on the first layer sequence and the second layer sequence to the k+1 layer sequence of each image block, respectively, to obtain the information of each image block. The first layer codeword sequence, and the second layer codeword sequence to the k+1th layer codeword sequence.

Correspondingly, the above-mentioned step 104 may be implemented in a manner of serially splicing the first parameter of at least one image block to obtain the code stream of the first parameter of the at least one image block. Perform serial splicing on the symbol layer sequence of at least one image block to obtain the code stream of the symbol layer of at least one image block. Perform serial splicing on the first layer codeword sequence of at least one image block, and the second layer codeword sequence to the k+1 layer codeword sequence, respectively, to obtain the first layer to the k+1 layer of at least one image block Stream.

Correspondingly, the above-mentioned step 105 may be implemented in the following steps: sequentially sending the code stream of the first parameter of the at least one image block, the code stream of the symbol layer of the at least one image block, and the first layer of the at least one image block. The code stream to the k+1th layer. Or, another achievable manner may be: the code stream of the first parameter of at least one image block, the code stream of the symbol layer of at least one image block, the code stream of the first layer to the k+1th layer of at least one image block The flow corresponds to multiple QoS levels. That is, each layer of code stream is sent with different QoS levels. For example, the QoS levels corresponding to the code stream of the first parameter, the code stream of the symbol layer, and the code stream of the first layer to the k+1th layer are sequentially reduced to ensure the accuracy of the high-bit information of the first parameter and the exchange coefficient. For transmission, when the channel capacity is low and the bit stream of the low-bit information of the AC coefficient is lost, the decoding end can still reconstruct the at least one image block based on the first parameter and the high-bit information of the AC coefficient.

The specific implementation manner of the second method may be: according to the symbol layer sequence of each image block, the first layer sequence and the second layer sequence to the k+1 layer sequence of each image block are respectively subjected to run-length coding and Huo Fuman coding to obtain the first layer code word sequence and the second layer code word sequence to the k+1 layer code word sequence of each image block, the first layer code word sequence and the second layer code word sequence to The code word sequence of the k+1 layer carries the sign bit information of the non-zero AC coefficient, and the sign bit information of the non-zero AC coefficient is located in the i-th layer code word sequence corresponding to the highest bit of the non-zero AC coefficient, i takes 1 to k+1. For an example, please refer to the explanation of Fig. 8 below.

Correspondingly, the above-mentioned step 104 may be implemented in a manner of serially splicing the first parameter of at least one image block to obtain the code stream of the first parameter of the at least one image block. Perform serial splicing on the first layer codeword sequence of at least one image block, and the second layer codeword sequence to the k+1 layer codeword sequence, respectively, to obtain the first layer to the k+1 layer of at least one image block Stream.

Correspondingly, the above-mentioned step 105 may be implemented in a manner of sequentially sending the code stream of the first parameter of the at least one image block, and the code stream of the first layer to the k+1 th layer of the at least one image block. Or, another achievable manner may be: the code stream of the first parameter of at least one image block, and the code stream of the first layer to the k+1th layer of at least one image block correspond to multiple QoS levels. That is, each layer of code stream is sent with different QoS levels. For example, the QoS levels corresponding to the code stream of the first parameter and the code streams of the first layer to the k+1 layer are sequentially decreased. Accurate transmission of the high-bit information of the first parameter and the AC coefficient. Of course, it is understandable that the QoS levels corresponding to different layers of code streams may also have other relationships. The embodiment of the present application does not limit the order of lowering. For example, the code stream of the first parameter may correspond to the code stream of high-bit information. The QoS level of is higher than the QoS level corresponding to the bit stream of low-bit information, and the embodiment of the present application does not give examples one by one.

FIG. 7 is a schematic diagram of the encoding process of a video encoding method according to an embodiment of the application. On the basis of the foregoing embodiment, this embodiment exemplarily explains the processing process of the encoding method of the embodiment of the application on the encoder side. For example, an image block is used as a macro block for illustration. As shown in FIG. 7, the method in this embodiment may include:

The input image (raw data as shown in FIG. 7) is segmented, and the segmentation can be based on brightness and color difference. A segmentation method. The size of each segment after segmentation is the width of the original data multiplied by a quarter of the original height. The size of the segment determines the minimum delay D that can be achieved in image transmission (the value of D depends on the video Frame rate). The following uses a pipeline method for the encoding and sending process of the fragments.

Each slice is divided (including brightness and color difference) to obtain multiple macro blocks, and the size of each macro block can be 8x8, 16x16, and so on.

For each macroblock in a slice, the compression type decision is performed, such as I frame, P frame, B frame, etc.

For each macroblock in a slice, perform transform processing, for example, DCT, to obtain the transform coefficient of each macroblock of the slice. The transform coefficient of each macroblock usually includes multiple transform coefficients, that is, the transform coefficient matrix.

Perform quantization processing on the transform coefficient matrix of each macro block of the slice, and obtain the quantized transform coefficient matrix of each macro block.

Perform shift processing on the quantized transform coefficient matrix according to the shift matrix to obtain the shifted transform coefficient matrix, which is illustrated by the following shift matrix.

For example, if the first row and second column of the shift matrix is 4, the corresponding quantized transform coefficient is shifted to the left by 4 bits to obtain the shifted transform coefficient.

Shifting the quantized transform coefficients, such as bit shifting (bit shfit), can smooth the loss rate of low-bit information, smooth the distribution of uniform bit rates in each layer, and smooth the peak signal-to-noise ratio (Peak Signal-to-Noise Ratio). Noise Ratio, PSNR) changes with the amount of layer loss.

With reference to Fig. 8, Fig. 8 is taken as an example for illustration. Fig. 8 is a schematic diagram of the results of each processing of a macroblock encoding process in an embodiment of the application. The shifted coefficient matrix may be shown in Fig. 8 A matrix (1) is shown, where the ellipsis represents 0.

Scan the shifted transform coefficient matrix in Zigzag order to obtain the coefficient sequence. The coefficient sequence may be as shown in (2) of FIG. 8, each column of which is an AC coefficient, and each row is the same bit row of the AC coefficient. For example, from top to bottom, the first row is a symbol row, the second row is a high 2 bit row, and the third row to the eighth row are each bit row. The first column is -150, the second column is 14, the third column is 8, the fourth column is 0, the fifth column is -8, the sixth column is 2, the seventh column is 1, and the eighth column is 1. The rest is 0. As shown in Figure 8 (2), except for the AC coefficient -150, the high 2 bits of the other AC coefficients are all 0, so the high 2 bits can be processed as a layer, which can reduce the video bit rate, thereby reducing the bit stream transmission process Occupation of channel capacity in the medium.

Perform bit-layered coding on the coefficient sequence, for example, using run-length coding and Huffman coding. Among them, the high n bits of the AC coefficient can be coded as a layer (called the topn layer), and the other layers are coded independently, for example, n=5, and each layer can use a different code table or the same code. Stopwatch.

After bit layering, each layer is obtained. As shown in Figure 7, each layer is the most significant bit (Most Significant Bit, MSB)_topn, MSB-n-1 (bitx), ..., MSB-n (bit1), and the lowest Least Significant Bit (LSB) (bit0). The sign of each layer (Sign) is the sign of the non-zero AC coefficient of the layer. Entropy coding is performed on each layer after contrast layering, that is, each bit layer entropy coding as shown in Fig.7. The method of entropy coding may adopt the method one or the method two described above.

In combination with Figure 8, the coefficient sequence is layered first. The layering result can be as shown in Figure 8 (3). The first line is the sign layer. Only non-zero AC coefficients have sign bits, and 0 coefficients have no sign bits, and the topn layer (The second row above, that is, the first layer sequence in the above embodiment) is 20000000...0, and the bit 5 layer (the third row above, that is, the second layer sequence in the above embodiment) is 00000000...0, bit Layer 4 (the fourth row above, that is, the third layer sequence in the above embodiment) is 10000000...0, and the bit 3 layer (the fifth row above, that is, the fourth layer sequence in the above embodiment) is 01101000...0, The bit 2 layer (the sixth row above, that is, the fifth layer sequence in the above embodiment) is 11010000...0, and the bit 1 layer (the seventh row above, that is, the sixth layer sequence in the above embodiment) is 11010100... 0, bit 0 layer (the eighth row above, that is, the seventh layer sequence in the above embodiment) is 00010011...0.

In this embodiment, the second method described above is used to perform joint coding on the symbol layer shown in (3) of FIG. 8 and the other layers (the first to seventh layer sequences described above). First, run-length coding is performed separately, and the results obtained are as follows: As shown in (4) of FIG. 8, EOP (end of plane) indicates that all 0 from the current coefficient index to the end of the layer (index 63). The LEVEL of topn may not be 1, except for EOP, the LEVEL of all other layers is 1. For the LEVEL value corresponding to (RUN, LEVEL), if the sign bit of the corresponding AC coefficient is not coded, the symbol will be arranged in it. After; if the sign bit corresponding to the AC coefficient has been coded, it will not be inserted any more. Among them, (RUN, LEVEL) means that a LEVEL appears after RUN zeros. Perform Huffman coding on the sequence of each layer (RUN, LEVEL) and [sign bit] to obtain the code word sequence of each layer. Different Huffman code tables can be used for each layer, or the same Huffman code table can be used. The result of performing Huffman coding can be shown in Figure 8 (5), and then the code streams of each layer can be obtained, as shown in Figure 8 (6).

It should be noted that, in some embodiments, before performing bit-layered coding, a saturation operation may be performed on the coefficient sequence to saturate to L bits, for example, L=11.

The code streams of each layer of all the macroblocks belonging to a slice are respectively spliced in series and then packaged. For example, RTP packaging is performed as shown in FIG. 7 to obtain multiple RTP packets of each layer.

According to the bit order, each layer of code stream is sent from high to low. Or, each layer of code stream is sent at the same time, and different sending parameters are used for each layer of code stream, for example, RTP packets of different layers are mapped to different QoS levels.

In some embodiments, the window management module may send the code stream of the segment within the sending time window of the segment, and discard the unsent code stream of the segment if the sending time window exceeds the sending time window, thereby ensuring low latency. The window management module may be a functional module in the communication interface of the above-mentioned source device, which may be implemented by software code.

The fragmented code stream is encapsulated by the MAC layer and the PHY layer and sent to the decoder through the radio frequency interface.

In this embodiment, in the encoding process, through shift processing, the loss rate of low-bit information can be smoothed, the distribution of uniform code rate in each layer can be smoothed, and the change of PNSR with layer loss can be smoothed. When the bit stream is lost due to poor channel capacity, the decoder will restore the myopia value of the AC coefficient based on the received partial bit stream to obtain a relatively low-quality reconstructed image and avoid the failure of image blocks to be reconstructed. Phenomena such as mosaic and stuttering.

Figure 9 is a flowchart of a video encoding method according to an embodiment of the application. This embodiment relates to a source device and a destination device. The source device includes an encoder, and the destination device includes a decoder. On the basis of this, it is also possible to adjust the transmission parameters and/or coding parameters of the encoder. As shown in FIG. 9, the method of this embodiment may include:

Step 201: The destination device sends link information to the source device.

The source device receives the link information sent by the destination device. The link information is used to feed back the change in the channel capacity of the transmission code stream, that is, information related to the channel quality of the transmission code stream. For example, the link information may be the signal-to-noise ratio Any one or more of (signal noise ratio, SNR), error vector magnitude (Error Vector Magnitude, EVM), etc.

Exemplarily, the destination device may send the link information to the source device through the communication interface of the destination device, and the link information may be carried in any message or data packet. After the communication interface of the source device receives the link information , The link information can be passed to the decoder.

Step 202: The source device adjusts at least one of a sending parameter or an encoding parameter according to the link information.

The sending parameter is used to send the code stream corresponding to the image block. The coding parameter includes the coding type (for example, I frame, P frame, B frame, etc.) and quantization processing parameters, and the quantization processing parameters are the parameters used in the above quantization processing. .

Exemplarily, the encoder of the source device may adjust the encoding parameter according to the link information, and the source device may adjust the transmission parameter according to the link information.

Step 203: The source device sends a code stream corresponding to at least one image block to the destination device using at least one of the adjusted sending parameter or encoding parameter.

Exemplarily, the encoder encodes at least one image block with the adjusted encoding parameters, obtains the code stream corresponding to the at least one image block, and sends the code stream corresponding to the at least one image block to the decoder through the communication interface of the source device .

In this embodiment, the source device adjusts the sending parameters and/or coding parameters based on the link information fed back by the destination device, so that the code rate of the code stream sent by the source device adapts to the channel capacity, which can improve the quality and stability of code stream transmission. , To ensure low latency and improve user viewing experience.

Based on the same inventive concept as the above method, an embodiment of the present application also provides a video encoding device, which can be applied to a video encoder.

FIG. 10 is a schematic structural diagram of a video encoding device according to an embodiment of the application. As shown in FIG. 10, the video encoding device 100 includes: an acquisition unit 101, a bit layering module 102, an entropy encoding module 103, and a code stream acquisition module 104 Wherein, the acquisition module 101 is configured to acquire a coefficient sequence and a first parameter of at least one image block, the coefficient sequence is a sequence of the at least one image block after quantization processing, and the first parameter includes resolution, synchronization word, motion At least one of vector or DC component. The bit layering module 102 is configured to perform bit layering on the coefficient sequence of the at least one image block to obtain multiple layer sequences of each image block, and each layer sequence of the multiple layer sequences includes the coefficient of the image block The same bit information of multiple AC coefficients in the sequence. The entropy coding module 103 is configured to perform entropy coding on the multiple layer sequences of each image block to obtain multiple layer codeword sequences of each image block. The code stream obtaining module 104 is further configured to obtain the code stream corresponding to the at least one image block according to the first parameter of the at least one image block and the multiple layer code word sequence of each image block, and the code stream is used for the decoder to reproduce the code stream. Construct the at least one image block.

In some embodiments, each layer sequence in the plurality of layer sequences includes one or more bits of information of the binary representation of each AC coefficient in the coefficient sequence of the image block.

In some embodiments, the multiple layer sequence of each image block includes the symbol layer sequence of the image block, the first layer sequence to the k+1th layer sequence of the image block; wherein, the symbol layer sequence of the image block includes The sign bit in the binary representation of all the AC coefficients of the image block, the first layer sequence of the image block includes the high n bits in the binary representation of all the AC coefficients of the image block, and the high n bits include the value of each AC coefficient. From the Nth bit to the N-n+1th bit in the binary representation, the Nth bit is the highest bit in the binary representation of all AC coefficients except for the sign bit. The second layer sequence of the image block to the k+th bit The 1-layer sequence includes one of the low-k bits in the binary representation of all AC coefficients of the image block, and the low-k bit includes the first to k-th bits in the binary representation of each AC coefficient; N is greater than An integer of 2, n is any positive integer less than N, k is any positive integer less than N, and N=n+k.

In some embodiments, the entropy encoding module 103 is configured to: perform run-length encoding and Huffman encoding on the first layer sequence and the second layer sequence to the k+1 layer sequence of each image block. , Acquiring the first layer codeword sequence and the second layer codeword sequence to the k+1th layer codeword sequence of each image block.

In some embodiments, the code stream obtaining module 104 is configured to: perform serial splicing of the first parameter of the at least one image block to obtain the code stream of the first parameter of the at least one image block; Serially splicing the symbol layer sequence of the at least one image block to obtain the code stream of the symbol layer of the at least one image block; the first layer code word sequence and the second layer code word sequence to the k+1 layer code of the at least one image block The word sequences are respectively serially spliced to obtain the code streams of the first layer to the k+1th layer of the at least one image block.

In some embodiments, the code stream of the first parameter of the at least one image block, the code stream of the symbol layer of the at least one image block, and the code stream of the first layer to the k+1th layer of the at least one image block correspond to Multiple quality of service QoS levels.

In some embodiments, the device further includes: a transceiver module 105, configured to sequentially send the code stream of the first parameter of the at least one image block, the code stream of the symbol layer of the at least one image block, and the code stream of the at least one image block. The code stream from the first layer to the k+1th layer.

In some embodiments, the entropy encoding module 103 is configured to: perform the first layer sequence and the second layer sequence to the k+1 layer sequence of each image block according to the symbol layer sequence of each image block. Run-length coding and Huffman coding to obtain the first layer code word sequence and the second layer code word sequence to the k+1 layer code word sequence of each image block, the first layer code word sequence, and the second layer code word sequence The layer codeword sequence to the k+1 layer codeword sequence carry the sign bit information of the non-zero AC coefficient, and the sign bit information of the non-zero AC coefficient is located in the i-th layer corresponding to the highest bit of the non-zero AC coefficient In the code word sequence, i takes 1 to k+1.

In some embodiments, the code stream obtaining module 104 is configured to: perform serial splicing of the first parameter of the at least one image block to obtain the code stream of the first parameter of the at least one image block; The first layer code word sequence and the second layer code word sequence to the k+1 layer code word sequence are respectively serially spliced to obtain the code stream from the first layer to the k+1 layer of the at least one image block.

In some embodiments, the code stream of the first parameter of the at least one image block and the code stream of the first layer to the k+1th layer of the at least one image block correspond to multiple QoS levels.

In some embodiments, the transceiver module 105 is configured to send the code stream corresponding to the at least one image block within the sending time window of the slice to which the at least one image block belongs.

In some embodiments, the transceiver module 105 is further configured to discard the code stream corresponding to the unsent image block of the segment when the transmission time window of the segment is exceeded.

In some embodiments, the transceiver module 105 is used to receive link information sent by the decoding end, and the link information is used to feed back changes in the channel capacity for transmitting the code stream; the entropy encoding module 103 is also used to Link information adjusts at least one of a sending parameter or an encoding parameter, the sending parameter is used to send a code stream corresponding to the image block, and the encoding parameter includes an encoding type and a quantization processing parameter.

In some embodiments, the acquisition module 101 is further configured to: acquire the transform coefficient of the at least one image block; perform quantization processing on the transform coefficient of each image block to obtain the quantized transform coefficient of each image block; The quantized transform coefficients of each image block are shifted and sequentially scanned according to the shift matrix to obtain the coefficient sequence of each image block.

It should be noted that the aforementioned acquisition module 101, bit layering module 102, entropy encoding module 103, and code stream acquisition module 104 can be applied to the entropy encoding process at the encoding end. The video encoding device 100 described above may also be referred to as a layered encoding device 100.

It should also be noted that the specific implementation process of the acquisition module 101, the bit layering module 102, the entropy encoding module 103, and the code stream acquisition module 104 can refer to the detailed description of the foregoing method embodiment. For the sake of brevity of the description, it will not be repeated here.

Based on the same inventive concept as the above method, an embodiment of the present application provides a video encoder. The video encoder is used to encode image blocks, including: The video encoding device is used for encoding and generating the corresponding code stream.

Based on the same inventive concept as the above method, an embodiment of the present application provides a device for encoding video data. The device includes: a memory for storing video data, the video data including one or more image blocks; video encoding A device for obtaining a coefficient sequence and a first parameter of at least one image block, the coefficient sequence is a sequence after the at least one image block is quantized, and the first parameter includes at least one of resolution, synchronization word, motion vector or DC component One item. Perform bit layering on the coefficient sequence of at least one image block to obtain multiple layer sequences of each image block, and each layer sequence of the multiple layer sequences includes the same bits of multiple AC coefficients in the coefficient sequence of the image block Information. Entropy coding is performed on multiple layer sequences of each image block to obtain multiple layer codeword sequences of each image block. According to the first parameter of the at least one image block and the multiple layer code word sequence of each image block, a code stream corresponding to the at least one image block is obtained, and the code stream is used for the decoder to reconstruct the at least one image block.

Based on the same inventive concept as the above method, an embodiment of the application provides a device for decoding video data. The device includes: a memory for storing video data in the form of a code stream; and a video decoder for performing the same The reverse process of the video encoder parses the code stream and reconstructs the image block.

Based on the same inventive concept as the above method, an embodiment of the present application provides an encoding device, including: a non-volatile memory and a processor coupled with each other, the processor calls the program code stored in the memory to execute such as Part or all of the steps of the video encoding method described in one or more of the above embodiments.

Based on the same inventive concept as the above method, an embodiment of the present application provides a computer-readable storage medium that stores program code, wherein the program code includes one or more Instructions for part or all of the steps of the video encoding method described in the embodiment.

Based on the same inventive concept as the above method, embodiments of the present application provide a computer program product, which when the computer program product runs on a computer, causes the computer to execute the video as described in one or more of the above embodiments. Part or all of the steps of the encoding method.

Those skilled in the art can understand that the functions described in conjunction with the various illustrative logical blocks, modules, and algorithm steps disclosed herein can be implemented by hardware, software, firmware, or any combination thereof. If implemented in software, the functions described by various illustrative logical blocks, modules, and steps can be stored or transmitted as one or more instructions or codes on a computer-readable medium and executed by a hardware-based processing unit. The computer-readable medium may include a computer-readable storage medium, which corresponds to a tangible medium, such as a data storage medium, or a communication medium that includes any medium that facilitates the transfer of a computer program from one place to another (for example, according to a communication protocol) . In this manner, a computer-readable medium may generally correspond to (1) a non-transitory tangible computer-readable storage medium, or (2) a communication medium, such as a signal or carrier wave. Data storage media may be any available media that can be accessed by one or more computers or one or more processors to retrieve instructions, codes, and/or data structures for implementing the techniques described in this application. The computer program product may include a computer-readable medium.

By way of example and not limitation, such computer-readable storage media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage devices, magnetic disk storage devices or other magnetic storage devices, flash memory, or structures that can be used to store instructions or data Any other media that can be accessed by the computer in the form of desired program code. And, any connection is properly termed a computer-readable medium. For example, if you use coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave to transmit instructions from a website, server, or other remote source, then the coaxial cable Wire, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of media. However, it should be understood that the computer-readable storage media and data storage media do not include connections, carrier waves, signals, or other temporary media, but are actually directed to non-transitory tangible storage media. As used herein, magnetic disks and optical disks include compact disks (CDs), laser disks, optical disks, digital versatile disks (DVD) and Blu-ray disks, where disks usually reproduce data magnetically, while optical disks use lasers to reproduce data optically data. Combinations of the above should also be included in the scope of computer-readable media.

It can be processed by one or more digital signal processors (DSP), general-purpose microprocessors, application-specific integrated circuits (ASIC), field programmable logic arrays (FPGA) or other equivalent integrated or discrete logic circuits, for example To execute instructions. Therefore, the term "processor" as used herein may refer to any of the foregoing structure or any other structure suitable for implementing the techniques described herein. In addition, in some aspects, the functions described by the various illustrative logical blocks, modules, and steps described herein may be provided in dedicated hardware and/or software modules configured for encoding and decoding, or combined Into the combined codec. Moreover, the technology may be fully implemented in one or more circuits or logic elements.

The technology of this application can be implemented in a variety of devices or devices, including wireless handsets, integrated circuits (ICs), or a set of ICs (for example, chipsets). Various components, modules, or units are described in this application to emphasize the functional aspects of the device for implementing the disclosed technology, but they do not necessarily need to be implemented by different hardware units. In fact, as described above, various units can be combined with appropriate software and/or firmware in the codec hardware unit, or by interoperating hardware units (including one or more processors as described above). supply.

In the above-mentioned embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in an embodiment, reference may be made to related descriptions of other embodiments.

The above are only exemplary specific implementations of this application, but the protection scope of this application is not limited thereto. Any person skilled in the art can easily think of changes or changes within the technical scope disclosed in this application. Replacement shall be covered within the scope of protection of this application. Therefore, the protection scope of this application should be subject to the protection scope of the claims.

Claims

A video coding method, characterized in that it comprises:

Obtain a coefficient sequence of at least one image block and a first parameter of the at least one image block, where the coefficient sequence is a sequence after the at least one image block is quantized, and the first parameter includes resolution, synchronization word, At least one of motion vector or DC component;

The coefficient sequence of the at least one image block is layered according to the bit position, and multiple layer sequences of each image block are obtained. Each layer sequence of the multiple layer sequences includes the coefficient sequence of the image block. The same bit information of a plurality of AC coefficients, where the AC coefficient represents the amplitude of the AC component;

Performing entropy coding on the multiple layer sequences of each image block to obtain multiple layer codeword sequences of each image block;

Obtain a code stream corresponding to the at least one image block according to the first parameter of the at least one image block and the multiple layer code word sequence of each image block, and the code stream is used for the decoder to reconstruct the at least one image Piece.
The method according to claim 1, wherein each layer sequence in the plurality of layer sequences includes one or more bits of the binary representation of each AC coefficient in the coefficient sequence of the image block. information.
The method according to claim 2, wherein the multiple layer sequences of each image block include the symbol layer sequence of the image block, the first layer sequence to the k+1th layer sequence of the image block;

Wherein, the symbol layer sequence of the image block includes the symbol bits in the binary representation of all the AC coefficients of the image block, and the first layer sequence of the image block includes the symbol bits in the binary representation of all the AC coefficients of the image block. High n bits, the high n bits include the Nth to N-n+1 bits in the binary representation of each AC coefficient, and the Nth bit is the binary representation of all the AC coefficients except for the sign bit The highest bit of the image block from the second layer sequence to the k+1 layer sequence respectively includes one of the low-k bits in the binary representation of all the AC coefficients of the image block, and the low-k bits include each Bit 1 to bit k in the binary representation of the AC coefficients;

N is an integer greater than 2, n is any positive integer less than N, k is any positive integer less than N, and N=n+k.
The method according to claim 3, wherein the separately entropy coding the multiple layer sequences of each image block to obtain the multiple layer code word sequences of each image block comprises:

Perform run-length coding and Huffman coding on the first layer sequence and the second layer sequence to the k+1 layer sequence of each image block, respectively, to obtain the first layer codeword of each image block Sequence, and the second layer codeword sequence to the k+1th layer codeword sequence.
The method according to claim 4, wherein the code stream corresponding to the at least one image block is obtained according to the first parameter of the at least one image block and the multiple layer code word sequence of each image block ,include:

Performing serial splicing on the first parameter of the at least one image block to obtain a code stream of the first parameter of the at least one image block;

Serially splicing the symbol layer sequence of the at least one image block to obtain the code stream of the symbol layer of the at least one image block;

Serial splicing is performed on the first layer codeword sequence of the at least one image block, and the second layer codeword sequence to the k+1th layer codeword sequence, respectively, to obtain the first layer to the first layer of the at least one image block The code stream of the k+1 layer.
The method according to claim 5, wherein the code stream of the first parameter of the at least one image block, the code stream of the symbol layer of the at least one image block, and the first layer of the at least one image block The code stream to the k+1 layer corresponds to multiple QoS levels.
The method according to claim 5, wherein the method further comprises:

The code stream of the first parameter of the at least one image block, the code stream of the symbol layer of the at least one image block, and the code stream of the first layer to the k+1th layer of the at least one image block are sequentially sent.
The method according to claim 3, wherein the separately entropy coding the multiple layer sequences of each image block to obtain the multiple layer code word sequences of each image block comprises:

According to the symbol layer sequence of each image block, run-length coding and Huffman coding are performed on the first layer sequence and the second layer sequence to the k+1 layer sequence of each image block to obtain each image block The first layer codeword sequence, and the second layer codeword sequence to the k+1 layer codeword sequence, the first layer codeword sequence, and the second layer codeword sequence to the k+1 layer codeword sequence Carries the sign bit information of the non-zero AC coefficient, and the sign bit information of the non-zero AC coefficient is located in the i-th layer codeword sequence corresponding to the highest bit of the non-zero AC coefficient, and i is from 1 to k+1 .
The method according to claim 8, wherein the code stream corresponding to the at least one image block is obtained according to the first parameter of the at least one image block and the multiple layer code word sequence of each image block ,include:

Performing serial splicing on the first parameter of the at least one image block to obtain a code stream of the first parameter of the at least one image block;

Serial splicing is performed on the first layer codeword sequence of the at least one image block, and the second layer codeword sequence to the k+1th layer codeword sequence, respectively, to obtain the first layer to the first layer of the at least one image block The code stream of the k+1 layer.
The method according to claim 9, wherein the code stream of the first parameter of the at least one image block and the code stream of the first layer to the k+1 layer of the at least one image block correspond to multiple QoS level.
The method according to any one of claims 1 to 10, wherein the method further comprises:

Send the code stream corresponding to the at least one image block within the sending time window of the slice to which the at least one image block belongs.
The method according to claim 11, wherein the method further comprises:

When the sending time window of the segment is exceeded, the code stream corresponding to the unsent image block of the segment is discarded.
The method according to any one of claims 1 to 12, wherein the method further comprises:

Receiving link information sent by a decoding end, where the link information is used to feed back changes in channel capacity for transmitting the code stream;

Adjust at least one of a sending parameter or an encoding parameter according to the link information, the sending parameter is used to send a code stream corresponding to an image block, and the encoding parameter includes an encoding type and a quantization processing parameter.
The method according to any one of claims 1 to 13, wherein the method further comprises:

Acquiring the transform coefficient of the at least one image block;

Perform quantization processing on the transform coefficient of each image block, and obtain the quantized transform coefficient of each image block;

The quantized transform coefficient of each image block is shifted and sequentially scanned according to the shift matrix to obtain the coefficient sequence of each image block.
A video encoding device, characterized in that it comprises:

The acquiring module is configured to acquire a coefficient sequence of at least one image block and a first parameter of the at least one image block, where the coefficient sequence is a sequence of the at least one image block after quantization processing, and the first parameter includes resolution At least one of rate, sync word, motion vector or DC component;

The bit layering module is configured to layer the coefficient sequence of the at least one image block according to the bit position, and obtain multiple layer sequences of each image block, and each layer sequence of the multiple layer sequences includes the The same bit information of multiple AC coefficients in the coefficient sequence of the image block, where the AC coefficient represents the amplitude of the AC component;

An entropy coding module, configured to perform entropy coding on the multiple layer sequences of each image block to obtain multiple layer codeword sequences of each image block;

The code stream obtaining module is further configured to obtain the code stream corresponding to the at least one image block according to the first parameter of the at least one image block and the multiple layer code word sequence of each image block, and the code stream is used for decoding The device reconstructs the at least one image block.
The apparatus according to claim 15, wherein each layer sequence in the plurality of layer sequences includes one or more bits of the binary representation of each AC coefficient in the coefficient sequence of the image block. information.
The device according to claim 16, wherein the multiple layer sequences of each image block include the symbol layer sequence of the image block, the first layer sequence to the k+1th layer sequence of the image block;

Wherein, the symbol layer sequence of the image block includes the symbol bits in the binary representation of all the AC coefficients of the image block, and the first layer sequence of the image block includes the symbol bits in the binary representation of all the AC coefficients of the image block. High n bits, the high n bits include the Nth to N-n+1 bits in the binary representation of each AC coefficient, and the Nth bit is the binary representation of all the AC coefficients except for the sign bit The highest bit of the image block from the second layer sequence to the k+1 layer sequence respectively includes one of the low-k bits in the binary representation of all the AC coefficients of the image block, and the low-k bits include each Bit 1 to bit k in the binary representation of the AC coefficients;

N is an integer greater than 2, n is any positive integer less than N, k is any positive integer less than N, and N=n+k.
The device according to claim 17, wherein the entropy coding module is configured to: respectively perform the first layer sequence and the second layer sequence to the k+1 layer sequence of each image block Perform run-length coding and Huffman coding to obtain the first-layer codeword sequence and the second-layer codeword sequence to the k+1-th layer codeword sequence of each image block.
The device according to claim 18, wherein the code stream acquisition module is configured to:

Performing serial splicing on the first parameter of the at least one image block to obtain a code stream of the first parameter of the at least one image block;

Serially splicing the symbol layer sequence of the at least one image block to obtain the code stream of the symbol layer of the at least one image block;

Serial splicing is performed on the first layer codeword sequence of the at least one image block, and the second layer codeword sequence to the k+1th layer codeword sequence, respectively, to obtain the first layer to the first layer of the at least one image block The code stream of the k+1 layer.
The device according to claim 19, wherein the code stream of the first parameter of the at least one image block, the code stream of the symbol layer of the at least one image block, and the first layer of the at least one image block The code stream to the k+1 layer corresponds to multiple QoS levels.
The device according to claim 19, wherein the device further comprises:

The transceiver module is configured to send the code stream of the first parameter of the at least one image block, the code stream of the symbol layer of the at least one image block, the first layer to the k+1th layer of the at least one image block in sequence The code stream of the layer.
The device according to claim 17, wherein the entropy coding module is configured to: according to the symbol layer sequence of each image block, perform the calculation of the first layer sequence and the second layer sequence to the kth layer sequence of each image block. +1 layer sequence, run-length coding and Huffman coding are performed respectively to obtain the first layer code word sequence and the second layer code word sequence to the k+1 layer code word sequence of each image block, the first The layer code word sequence and the second layer code word sequence to the k+1 layer code word sequence carry the sign bit information of the non-zero AC coefficient, and the sign bit information of the non-zero AC coefficient is located in the non-zero AC coefficient In the i-th layer codeword sequence corresponding to the highest bit of, i is from 1 to k+1.
The device according to claim 22, wherein the code stream obtaining module is used for:

Performing serial splicing on the first parameter of the at least one image block to obtain a code stream of the first parameter of the at least one image block;

Serial splicing is performed on the first layer codeword sequence of the at least one image block, and the second layer codeword sequence to the k+1th layer codeword sequence, respectively, to obtain the first layer to the first layer of the at least one image block The code stream of the k+1 layer.
The device according to claim 23, wherein the code stream of the first parameter of the at least one image block and the code stream of the first layer to the k+1 layer of the at least one image block correspond to multiple QoS level.
The device according to any one of claims 15 to 24, wherein the device further comprises:

The transceiver module is configured to send the code stream corresponding to the at least one image block within the sending time window of the slice to which the at least one image block belongs.
The device according to claim 25, wherein the transceiver module is further configured to:

When the sending time window of the segment is exceeded, the code stream corresponding to the unsent image block of the segment is discarded.
The device according to any one of claims 15 to 26, wherein the device further comprises: a transceiver module;

The transceiver module is configured to receive link information sent by a decoding end, where the link information is used to feed back changes in channel capacity for transmitting the code stream;

The entropy encoding module is further configured to adjust at least one of a sending parameter or an encoding parameter according to the link information, the sending parameter is used to send a code stream corresponding to an image block, and the encoding parameter includes an encoding type and quantization processing parameter.
The device according to any one of claims 15 to 27, wherein the acquisition module is further configured to: acquire the transform coefficient of the at least one image block; perform quantization processing on the transform coefficient of each image block to obtain The quantized transform coefficient of each image block; the quantized transform coefficient of each image block is shifted and sequentially scanned according to the shift matrix to obtain the coefficient sequence of each image block.
An encoding device, characterized by comprising: a non-volatile memory and a processor coupled with each other, and the processor calls the program code stored in the memory to execute any one of claims 1 to 14 Methods.
A video encoding and decoding device, characterized by comprising: an encoder, which is configured to execute the method according to any one of claims 1 to 14.