WO2021163282A1

WO2021163282A1 - Detailed design system for lattice structures

Info

Publication number: WO2021163282A1
Application number: PCT/US2021/017596
Authority: WO
Inventors: Arun Ramamurthy; Reed Williams; Tsz Ling Elaine TANG; Heng CHI; Lucia MIRABELLA; Sanjeev SRIVASTAVA; Gaurav AMETA
Original assignee: Siemens Aktiengesellschaft; Siemens Corporation
Priority date: 2020-02-14
Filing date: 2021-02-11
Publication date: 2021-08-19

Abstract

Methods and systems are disclosed for a computer aided design (CAD) system that creates and analyzes program-based representations of complex lattice structures based on structured requirements and manufacturing constraints. The CAD system can include a program synthesis module configured to receive data that defines one or more requirements of a component. Based on the data, the program synthesis module can generate a virtual lattice structure as a set of descriptive codes including an initial kernel, a starting point in space, and a series of transformations for a repetitive reproduction of the initial kernel into the virtual lattice structure. In various examples, the CAD system includes virtual test beds configured to obtain manufacturing constraints related to the component. Based on the manufacturing constraints, the virtual test beds can test the virtual lattice structure to determine whether the component can be produced in accordance with the manufacturing constraints.

Description

DETAILED DESIGN SYSTEM FOR LATTICE STRUCTURES

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of U.S. Provisional Application Serial No. 62/976,452 filed on February 14, 2020, the disclosure of which is incorporated herein by reference in its entirety.

BACKGROUND

[0002] Recent developments in geometric representation have demonstrated that complex designs, such as electric motors for example, can be modeled and represented in the form of periodic or cellular lattices structures. These lattice structures are an attractive class of materials that facilitate the construction of ultra-light solid body components. Some lattice structures also have demonstrated benefits in terms of mechanical and thermal properties. For example, aircraft design often includes lattice or honeycomb structures to reduce the weight of the fuselage with minimal impact on the aircraft’s structural performance. The advent of new manufacturing processes, such as additive manufacturing, allows ultra-complex lattice structures to be constructed. It is recognized herein, however, that current approaches to complex lattice design can include modeling and analysis that is extremely slow, imprecise, and in some cases, results in components that are unsuitable or impossible to manufacture.

SUMMARY

[0003] Methods and systems are disclosed for a computer aided design (CAD) system that creates and analyzes program-based representations of complex lattice structures based on structured requirements and manufacturing constraints. A computer aided design system for designing lattice structures representative of a component can include a memory having a plurality of application modules stored thereon, and a processor for executing the application modules. The application modules can include a program synthesis module configured to receive data that defines one or more requirements of the component. Based on the data, the program synthesis module can generate a virtual lattice structure as a set of descriptive codes including an initial kernel, a starting point in space, and a series of transformations for a repetitive reproduction of the initial kernel into the virtual lattice structure. The CAD system can further include a design by programming (DBP) module configured to edit the virtual lattice structure via a three-dimensional graphical user interface and hypertext editor without a full geometric representation of the virtual lattice structure being instantiated. In various examples, the CAD system includes virtual test beds configured to obtain manufacturing constraints related to the component. Based on the manufacturing constraints, the virtual test beds can test the virtual lattice structure to determine whether the component can be produced in accordance with the manufacturing constraints.

[0004] In an example, the CAD system includes a topology optimization module configured to generate an optimized design of the virtual lattice structure based on the manufacturing constraints. The topology optimization module can define a neural network configured to generate the optimized design of the virtual lattice structure based on structural and performance requirements associated with the component. The neural network can be further configured to be trained each time the neural network generates optimized designs of virtual lattice structures, such that the neural network is trained without pre-collected training data. In some examples, the program synthesis module defines a Bayesian generative model configured to generate lattice designs from an input that includes the one or more requirements of the component, such that the lattice designs are specific to the component.

BRIEF DESCRIPTION OF THE DRAWINGS

[0005] The foregoing and other aspects of the present invention are best understood from the following detailed description when read in connection with the accompanying drawings. For the purpose of illustrating the invention, there is shown in the drawings embodiments that are presently preferred, it being understood, however, that the invention is not limited to the specific instrumentalities disclosed. Included in the drawings are the following Figures:

[0006] FIG. 1 is a block diagram of an example CAD system according to an example embodiment.

[0007] FIG. 2 shows an example of a computing environment within which embodiments of this disclosure may be implemented. DET AILED DESCRIPTION

[0008] As an initial matter, the use of lattice structures or additively -manufactured structures are prevalent in various different domains, such as aerospace, automotive, electronics, and the like. It is recognized herein, however, that marine design applications can present issues related to corrosivity of lattice structures (e.g., honeycomb representations) and the lattice (e.g., metal) structure’s high thermal connectivity. In addition to engineering challenges associated with addressing such concerns, designing complex lattice structures presents its own challenges.

[0009] For example, computer aided design (CAD) systems can provide modeling and analysis tools that rely on boundary representations (B-Reps) for geometric representation of objects. B-Reps provide geometrically accurate data for representing various types of products (e.g., automobiles, airplanes, blenders, furniture). However, representing highly complex geometry (e.g., lattices, woven materials, cellular materials) using B-reps can place great demands on memory and computer processing resources via enormous computer file sizes that are produced. Consequently, practical design applications are often infeasible. In particular, for example, typical lattice-based components can include over 10¹⁶ elements, which cannot be physically represented in current CAD environments, thereby limiting or eliminating the ability to leverage the benefits of lattice-based designs for complex products. Similarly, traditional computer-aided engineering (CAE) systems are often incapable of fully exploiting the benefits of lattice-based representations. Current CAE systems lack the ability to generate representations for a large number of lattice cells, and typically lack capabilities to accurately model the material characteristics and the physical behavior of a non-uniform and non-identical lattice structure. [0010] To address the above-described technical issues, among others, a CAD system is described herein according to various embodiments that can generate designs based on structural and manufacturing requirements, so as to design components that incorporate manufacturing considerations. Further, the CAD system can include one or more virtual test beds configured to utilize machine learning to generate lattice structures for complex components.

[0011] It also recognized herein that lattice microstructures can result in engineered macro scale properties that meet mechanical and thermal requirements. By way of example, lattice parameters (e.g., density) can be modulated across different locations of a complex design so as to meet varying requirements related to material stiffness, thermal conductivity, etc. It is further recognized herein that such structures, at least in part due to their amenability to having their properties engineered, can be designed to provide higher specific strength than traditional honeycomb structures. Furthermore, such structures can be designed based on manufacturing considerations, in accordance with various embodiments described herein.

[0012] Referring initially to FIG. 1, CAD systems, for instance a CAD system 100, can define a lattice structure design framework 101 in accordance with various embodiments described herein. The lattice structure design framework 101, and thus the CAD system 100, can include one or more processors and memory having stored thereon applications, agents, and computer program modules including, for example, a program synthesis module 102, a design by programming (DBP) module 104, and an analysis module 103 that can include various simulation and optimization modules, for instance a topology optimization module 106 and virtual test beds 108. It will be appreciated that the program modules, applications, computer- executable instructions, code, or the like depicted in FIG. 1 are merely illustrative and not exhaustive, and that processing described as being supported by any particular module may alternatively be distributed across multiple modules or performed by a different module. In addition, various program module(s), script(s), plug-in(s), Application Programming Interface(s) (API(s)), or any other suitable computer-executable code may be provided to support functionality provided by the program modules, applications, or computer-executable code depicted in FIG. 1 and/or additional or alternate functionality. Further, functionality may be modularized differently such that processing described as being supported collectively by the collection of program modules depicted in FIG. 1 may be performed by a fewer or greater number of modules, or functionality described as being supported by any particular module may be supported, at least in part, by another module. In addition, program modules that support the functionality described herein may form part of one or more applications executable across any number of systems or devices in accordance with any suitable computing model such as, for example, a client-server model, a peer-to-peer model, and so forth. In addition, any of the functionality described as being supported by any of the program modules depicted in FIG. 1 may be implemented, at least partially, in hardware and/or firmware across any number of devices.

[0013] Still referring to FIG. 1, structured requirements 110 can be received by the program synthesis module 102. For example, the program synthesis module 102 can receive data that defines one or more requirements of a given component. Based on the structured requirements 110, the program synthesis module 102 can automatically generate geometric representations of the component or object associated with the structured requirements. In an example, based on received data, the program synthesis module 102 generates a virtual lattice structure as a set of descriptive codes including an initial kernel, a starting point in space, and a series of transformations for repetitive reproduction of the initial kernel into the virtual lattice structure. Such representations of components or objects can be consumed by the DBP module 104, as further described herein, and further transmitted for various detailed optimizations. In some examples, geometric representations are generated can define an exploration of the design space associated with the object. In some cases, for example, the program synthesis module 102 can generate geometric shapes that are outside the operation domain of the topology optimizer module 106, hence enabling the generation of novel and unseen geometric and lattice shapes or structures.

[0014] The program synthesis module 102 can include one or more generative models, for instance a Bayesian generative model, configured to perform neural program synthesis (NPS). Such models can be trained to operate based on inputs of structured requirements 110. Further, in various examples, the use of Bayesian representations allows domain knowledge to be incorporated, which can significantly accelerate the training of the model as compared to other representations. Based on the training, the program synthesis module 102 can generate lattices designs corresponding to specific requirements 110 that are under consideration at a given time. Thus, the program synthesis module 102 can define a Bayesian generative model configured to generate lattice designs from an input that includes one or more requirements of a given component, such that the lattice designs are specific to the component.

[0015] With continuing reference to FIG. 1, geometric designs, for instance lattice designs, that are generated by the program synthesis module 102, can be input into the DBP module 104. Using the DBP module 104, physical objects or products can be designed by a user manipulating text-based computer codes directly using the metaphors of computer programming (e.g., for loops). The DBP module 104 can be used to generate multi-scale, non-uniform lattice structures that can be optimized for performance across multiple physical domains simultaneously. For example, the DBP module 104 can be configured to edit a virtual lattice structure via a three- dimensional graphical user interface and hypertext editor without a full geometric representation of the virtual lattice structure being instantiated. Without being bound by theory, the DBP module 104 can benefit engineers by enabling ease of redesign and reuse of existing designs as compared to previous approaches in which feature-based designs (e.g., B-reps) are manipulated instead of programs. In particular, for example, the DBP module 104 can improve automation and flexibility during the design of metamaterials that can define repeated structural elements with precise spacing and shapes.

[0016] Designs, for instance designs of lattice structures, can be output from the DBP module 104 and input into the virtual test beds 108 for modeling and verification. It is recognized herein that modeling high definition lattice structure of an entire component can be computationally costly, even without optimizing its design, which adds to the computational cost associated with lattice structure design. With respect to structural design, it is recognized herein the macrostructure performance of lattices (e.g. stiffness of a given lattice as a whole) is often more relevant than local structural behaviors of a given lattice. Thus, in accordance with various embodiments, the virtual test beds 108 can utilize homogenization of a given lattice structure to characterize its effective material properties. For instance, the virtual test beds 108 can perform uniaxial and shearing tests on a given lattice design, so as to compute effective material properties (e.g., Young’s modulus, Poisson’s ratio).

[0017] In some examples, the virtual test beds 108 can represent a given lattice structure or cell with regular volumetric finite elements, so as to homogenize the lattice structure or cell. In particular, for example, the virtual test beds 108 can perform finite element analysis (FEA) in which a given lattice structure is represented with material properties that are substantially equivalent to the effective material properties of the lattice. The virtual test beds 108 can apply the effective material properties of a given lattice to a macroscopic model to obtain a continuous field of material property distribution for the entire component associated with the given lattice. The virtual test beds 108 can apply the material property field to a finite element model for FEA, so as to perform a homogenized lattice simulation. To ensure the right level of accuracy is achieved by the homogenized lattice simulation, in some cases, the virtual test beds 108 can identify the areas of the domain where more accurate simulations need to be performed.

[0018] In some cases, the virtual test beds 108 decompose a given lattice (domain), so as to compose different regions of the lattice into a single model. Such decomposition can vary depending on a desired balance between computation resources and accuracy. Thus, various homogenized properties of a lattice structure can be verified using the virtual test beds 108 that can be configured to mimic real physical behavior of a component represented by the lattice structure. Example virtual tests beds 108 that analyze various lattice structures include, for example and without limitation, test beds for structural and thermal analyses using FEA, test beds for fluid flow analysis using computational fluid dynamics (CFD), or the like.

[0019] With continuing reference to FIG. 1, in some examples, a lattice unit cell library is established following the material homogenization operations described above. For a given lattice unit cell, the library can include its corresponding homogenized properties (e.g., moduli, strength, thermal conductivity, etc.). The library can be used as a material basis for the topology optimization module 106 to formulate a multi-objective and multi -physics topology optimization for a given structural-level design. Example structure-level designs can define various structural (e.g., weight and strength) and performance requirements (e.g., thermal). Thus, in some cases, instead of using the heuristic material interpolation schemes that exist in current approaches, the CAD system 100 can develop a physics-based interpolation scheme from the lattice library. As a result, the topology optimization module 106 can optimize both the structural-level features and the micro-scale lattice type, in some cases, simultaneously. In some examples, because the structural-level topology optimization can be computationally expensive, the topology optimization module 106 can include a deep learning acceleration model or neural network. The deep learning acceleration model can explore design spaces in an efficient manner. In particular, the deep learning acceleration model, and thus the topology optimization module 106, can perform training and prediction during the same topology optimization, such that pre-collected training data is not needed, in some cases. Thus, the topology optimization module 106 can define a neural network that is configured to generate optimized designs of a virtual lattice structure based on structural and performance requirements associated with a given component. The neural network can be configured to be trained each time the neural network generates optimized designs of virtual lattice structures, such that the neural network is trained without pre collected training data.

[0020] In various examples, manufacturing constraints 112 can be input into the analysis module 103 or the program synthesis module 102. The CAD system 100 can generate lattice structure designs 114 in accordance with the manufacturing constraints so as to generate designs that can be manufactured, or are manufacturable. Manufacturability can be a problem in designs related to additive manufacturing (AM), among other manufacturing techniques. In example embodiments, the manufacturing constraints 112 are input such the lattice structure design framework 101 performs design for manufacturing, which can reduce design iterations as compared to designs that are generated without performing such design for manufacturing. For example, the virtual test beds 108 can obtain the manufacturing constraints 112 that are related to a given component. Based on the manufacturing constraints 112, the virtual test beds 108 can further be configured to test a virtual lattice structure to determine whether the component can be produced or fabricated in accordance with the manufacturing constraints 112. Complex geometries that might not otherwise be produced, such as lattices and components with multi materials, can be produced via additive manufacturing (AM). AM can be used with numerous different physical phenomena. In various examples, a given AM process may define its own physical phenomena and associated manufacturing constraints 112. Thus, the manufacturing constraints 112 may depend on the AM process and/or the material being used to construct the object. Example manufacturing constraints can relate to, without limitation, build directions, dimensions, geometric tolerances, surface finishes, etc. It is recognized herein that lattices can pose unique sets of manufacturing constraints because, for example, lattices can be constructed at micro and macro sizes. In various examples, the virtual test beds 108 that are used and manufacturing constraints 112 vary based on the specific process technology used to manufacture a given lattice. Further, the manufacturing constraints 112 can be input into the topology optimization module 106 such that topology optimizations are performed in accordance with the manufacturing constraints 112. For example, the topology module 106 can be configured to generate an optimized design of a virtual lattice structure based on the manufacturing constraints 112. In an example, the virtual test beds 108 include a design checker that verifies that a resultant design is suitable for AM.

[0021] Thus, the lattice structure design framework 101, in particular the program synthesis module 102, the DBP module 104, and the analysis module 103, can generate various lattice structure designs 114 that might not otherwise be created. Without being bound by theory, it is recognized herein that both computational and physical experiments on the lattice structure design framework 101 have produced representations of designs 114 that include over 10¹⁶ elements. For example, diverse and complex designs can be represented as programs by the DBP module 106. Further, given the inherent flexibility of the representation, complex shapes can be generated by the DBP module 106 can be virtually verified for manufacturability by the virtual test beds 108, without the need for tedious redesign. Further still, by generating non- uniform and non-identical lattice structure designs 114, it is recognized herein that components can be produced in accordance with the designs 114, and such components can define advanced structures that have optimal material properties engineered to meet specific requirements 110 and manufacturing constraints 112.

[0022] The CAD system 100 can generate lattice designs via an iterative loop formed by constructing virtual designs by the program synthesis module 102 and the DPB 104, and sending the designs to the analysis module 103. In some cases, after receiving results from the analysis module 103, the program synthesis module 102 or the DPB 104 may modify one or more parameters of the virtual design to generate an updated design. Similarly, in some cases, the topology optimization module 106 may receive one or more results from virtual test beds 108, and form one or more optimized designs (or candidates of an optimized design). Thus, in various examples, model lattice structures may be edited and revised based on analysis results. [0023] The program synthesis module 102 can define a solid-on-solid (SoS) program constructor module and the DPB module 104 can define an SoS program editor module. The constructor module may implement instructions in a high level language (HLL) (e.g., Python) to create a construct program having instructions for constructing a lattice kernel according to node spatial definitions, connections, and one or more morph operations. Node spatial definitions may include spatial coordinates for kernel nodes and connections between nodes. Each morph operation may be defined in different dimensions for potentially translating a single kernel into a cluster of kernels to form a lattice structure, where each translation may include scaling and/or rotating, growing the lattice with each addition of a translated kernel connected to a previous kernel. The construct program represents the lattice structure implicitly by the kernel definition and expressions of morph operations. In various examples, the program synthesis module 102 does not instantiate a full geometric representation of a given model lattice structure unless queried to do so, which allows the CAD system 100 to conserve computer resources. Further, the DPB module 104 can allow a user (designer) to perform edits to an existing model of a lattice structure, stored as a construct program, using a 3D GUI and hypertext editor. Further still, the program synthesis module 102 can obtain the manufacturing constraints during modeling iterations or when modeling iterates are completed and a final design is achieved, so as to evaluate and control the fabrication process for additive manufacturing of the modeled lattice structure.

[0024] The analysis module 103 can include one or more optimization modules (e.g., topology optimization module 106) for generating one or more optimized designs. For example, the topology optimization module 106 may perform a design space exploration (DSE) of the modeled lattice. In particular, the topology optimization module 106 can systematically analyze several design points on a given lattice representation, and then select one or more optimized design(s) based on parameters of interest and design requirements 110 or manufacturing constraints 112. In an embodiment, a designer may use a graphical user interface to select from a set of predefined set of query programs for the purpose of optimizing an initial modeled design using multiple parameters. The optimization module 106 can be configured to receive a modeled design from the DBP module 104, and to generate one or more queries useful for optimizing the modeled design in response to user input. In some cases, because the model is an abstract program-based representation, the optimization process is compact (e.g., the optimized design may involve changing a single value in the construct program as opposed to 50 or so parameters that would be revised using conventional full-scale geometry-based CAD analysis). The optimization module can receive query results, and in response, may vary design parameters and evaluate metrics used in computing an objective function of an optimization problem.

[0025] By way of example, a query and result exchange between may include the following. A query may initially be a statement such as “what is your volume?” for a lattice. The query may originate from a user via a GUI device, and may be translated by the optimization module 106 using textual recognition to trigger a volume function within a library, which may trigger a query message that includes a targeted query program in the analysis module 103. The result from the query program may be a value, such as “319.71cubic centimeters”. The optimization module 106 may include volume as a part of some objective function and may use the result value in computing the current value of the objective function, which is the function being minimized as part of the optimization procedure. From the current value of the objective function, the optimization module 106 may determine that the radius of one or more particular nodes in the kernel of the lattice should be reduced and that one or more particular connections within the kernel nodes should be removed to optimize the kernel. These changes may cause the next volume query to return a result value that moves the value of the objective function closer to a minimum and therefore produces a better result. In an example, the modified program code for the optimized design structure is the output of the topology optimization module, and can be modeled to render the structure (e.g., lattice 114) itself.

[0026] The virtual test beds 108 can include various query programs that interrogate the model of the lattice structure using a translation of the construct program representation. In an embodiment, each query program implements efficient algorithms including lazy evaluation, local variable evaluation, parallelization, or a combination of these to reduce computational cost. Processing by a graphical processing unit may be also be implemented for enhanced processing of the query programs. The query programs may be written in a lower level language (e.g., C, C++) for additional computational efficiency, and may include interfaces for interpreting the HLL construct programs. In an embodiment, a query program of the virtual test beds 108 queries the DBP module 104 using an interrogation to access the design loaded in memory. In some cases, the analysis module 103 operates only on the internal representation of the design, without having to read the design construct program itself. The virtual test beds 108 may execute one or more of the query programs that analyze the virtual lattice structure in response to a received query from the DBP 104 without a full geometric representation of the entire lattice structure being instantiated.

[0027] The virtual test beds 108 may include a module configured to answer a query about a single point within external boundaries of the virtual lattice structure. For example, the result of the single point query can include whether a single point X is on the lattice structure, or instead located in a void space inside the lattice structure boundary, or external to the lattice structure boundary. As another example, the module may analyze the distance between the single point and one of the external boundaries of the lattice structure. The virtual test beds 108 may include algorithms that solve queries about material distribution throughout the virtual lattice structure. As an example, a material-related query may be: “What is the electrical conductivity between point X and point Y based on the material(s) of which the lattice instances between those points are made?” The virtual text beds 108 may include a visualization module configured to render a portion of the virtual lattice structure using a rendering engine in response to a query via user request for a visualization of the lattice model.

[0028] The virtual test beds 108 may include a mass property module that is configured to solve a query about integral properties of the virtual lattice structure (i.e., properties that require numerical integration computation, such as volume or center of mass). For example, in response to a query for optimizing the lattice to strive for the lightest possible weight for the fabricated lattice structure, the mass property module analyzes the model kernel and lattice to determine where thinning of elements is possible or where density of connections can be decreased for reducing the weight. The mass property optimization can also be constrained by other factors, such as achieving minimal weight while meeting minimum requirements for structure strength or other properties. A mass property query program may, for example, solve for the center point of gravity in the virtual lattice. The virtual test beds 108 may include a multi-physics module configured to solve a query about predicting test results for simulation of one or more physical tests of the virtual lattice structure, such as simulating forces on one or more stress points for estimating physical responses and estimated measurements of various material properties (e.g., stiffness, tensile strength, and the like).

[0029] In various examples, the virtual test beds 108 include a manufacturability module that can include algorithms that solve queries about whether the current design is manufacturable for a given set of fabrication or manufacturing constraints 112. For example, given a fabrication limit for resolution of a 3D printer (i.e., minimum thickness of a fabricated lattice beam), the manufacturability module can analyze the geometry of the model lattice, without instantiating the entire lattice, and returns a result that indicates which areas of the lattice (e.g., by morph sequence) have features that are smaller than the resolution limit. Such features prevent the lattice fabrication to be entirely manufacturable by the 3D printer in question. Where problem areas are identified candidate solutions may be presented by the manufacturability module, such as one or more refinements to the model kernel or lattice, which could be ranked according to certain parameters (e.g., cost, weight, etc.).

[0030] The CAD system may also include a fabrication module configured to setup, monitor, evaluate, and control the fabrication of the virtual lattice structure.

[0031] As described above, the CAD system 100 utilizes construct programs to define and represent ultra-complex lattice SoS. The structures can be visualized, measured, simulated, optimized and manufactured with a collection of query programs.

[0032] FIG. 2 illustrates an example of a computing environment within which embodiments of the present disclosure may be implemented. A computing environment 600 includes a computer system 610 that may include a communication mechanism such as a system bus 621 or other communication mechanism for communicating information within the computer system 610. The computer system 610 further includes one or more processors 620 coupled with the system bus 621 for processing the information. In an embodiment, computing environment 600 corresponds to a CAD system, in which the computer system 610 relates to a computer described below in greater detail.

[0033] The processors 620 may include one or more central processing units (CPUs), graphical processing units (GPUs), or any other processor known in the art. More generally, a processor as described herein is a device for executing machine-readable instructions stored on a computer readable medium, for performing tasks and may comprise any one or combination of, hardware and firmware. A processor may also comprise memory storing machine-readable instructions executable for performing tasks. A processor acts upon information by manipulating, analyzing, modifying, converting or transmitting information for use by an executable procedure or an information device, and/or by routing the information to an output device. A processor may use or comprise the capabilities of a computer, controller or microprocessor, for example, and be conditioned using executable instructions to perform special purpose functions not performed by a general purpose computer. A processor may include any type of suitable processing unit including, but not limited to, a central processing unit, a microprocessor, a Reduced Instruction Set Computer (RISC) microprocessor, a Complex Instruction Set Computer (CISC) microprocessor, a microcontroller, an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), a System-on-a-Chip (SoC), a digital signal processor (DSP), and so forth. Further, the processor(s) 620 may have any suitable microarchitecture design that includes any number of constituent components such as, for example, registers, multiplexers, arithmetic logic units, cache controllers for controlling read/write operations to cache memory, branch predictors, or the like. The microarchitecture design of the processor may be capable of supporting any of a variety of instruction sets. A processor may be coupled (electrically and/or as comprising executable components) with any other processor enabling interaction and/or communication there-between. A user interface processor or generator is a known element comprising electronic circuitry or software or a combination of both for generating display images or portions thereof. A user interface comprises one or more display images enabling user interaction with a processor or other device. [0034] The system bus 621 may include at least one of a system bus, a memory bus, an address bus, or a message bus, and may permit exchange of information (e.g., data (including computer-executable code), signaling, etc.) between various components of the computer system 610. The system bus 621 may include, without limitation, a memory bus or a memory controller, a peripheral bus, an accelerated graphics port, and so forth. The system bus 621 may be associated with any suitable bus architecture including, without limitation, an Industry Standard Architecture (ISA), a Micro Channel Architecture (MCA), an Enhanced ISA (EISA), a Video Electronics Standards Association (VESA) architecture, an Accelerated Graphics Port (AGP) architecture, a Peripheral Component Interconnects (PCI) architecture, a PCI-Express architecture, a Personal Computer Memory Card International Association (PCMCIA) architecture, a Universal Serial Bus (USB) architecture, and so forth.

[0035] Continuing with reference to FIG. 2, the computer system 610 may also include a system memory 630 coupled to the system bus 621 for storing information and instructions to be executed by processors 620. The system memory 630 may include computer readable storage media in the form of volatile and/or nonvolatile memory, such as read only memory (ROM) 631 and/or random access memory (RAM) 632. The RAM 632 may include other dynamic storage device(s) (e.g., dynamic RAM, static RAM, and synchronous DRAM). The ROM 631 may include other static storage device(s) (e.g., programmable ROM, erasable PROM, and electrically erasable PROM). In addition, the system memory 630 may be used for storing temporary variables or other intermediate information during the execution of instructions by the processors 620. A basic input/output system 633 (BIOS) containing the basic routines that help to transfer information between elements within computer system 610, such as during start-up, may be stored in the ROM 631. RAM 632 may contain data and/or program modules that are immediately accessible to and/or presently being operated on by the processors 620. System memory 630 may additionally include, for example, operating system 634, application modules 635, and other program modules 636. Application modules 635 may include aforementioned modules described for FIG. 1 and may also include a user portal for development of the application program, allowing input parameters to be entered and modified as necessary.

[0036] The operating system 634 may be loaded into the memory 630 and may provide an interface between other application software executing on the computer system 610 and hardware resources of the computer system 610. More specifically, the operating system 634 may include a set of computer-executable instructions for managing hardware resources of the computer system 610 and for providing common services to other application programs (e.g., managing memory allocation among various application programs). In certain example embodiments, the operating system 634 may control execution of one or more of the program modules depicted as being stored in the data storage 640. The operating system 634 may include any operating system now known or which may be developed in the future including, but not limited to, any server operating system, any mainframe operating system, or any other proprietary or non-proprietary operating system.

[0037] The computer system 610 may also include a disk/media controller 643 coupled to the system bus 621 to control one or more storage devices for storing information and instructions, such as a magnetic hard disk 641 and/or a removable media drive 642 (e.g., floppy disk drive, compact disc drive, tape drive, flash drive, and/or solid state drive). Storage devices 640 may be added to the computer system 610 using an appropriate device interface (e.g., a small computer system interface (SCSI), integrated device electronics (IDE), Universal Serial Bus (USB), or FireWire). Storage devices 641, 642 may be external to the computer system 610. [0038] The computer system 610 may include a user input interface or graphical user interface (GUI) 661, which may comprise one or more input devices, such as a keyboard, touchscreen, tablet and/or a pointing device, for interacting with a computer user and providing information to the processors 620.

[0039] The computer system 610 may perform a portion or all of the processing steps of embodiments of the invention in response to the processors 620 executing one or more sequences of one or more instructions contained in a memory, such as the system memory 630. Such instructions may be read into the system memory 630 from another computer readable medium of storage 640, such as the magnetic hard disk 641 or the removable media drive 642. The magnetic hard disk 641 and/or removable media drive 642 may contain one or more data stores and data files used by embodiments of the present disclosure. The data store 640 may include, but are not limited to, databases (e.g., relational, object-oriented, etc.), file systems, flat files, distributed data stores in which data is stored on more than one node of a computer network, peer-to-peer network data stores, or the like. Data store contents and data files may be encrypted to improve security. The processors 620 may also be employed in a multi-processing arrangement to execute the one or more sequences of instructions contained in system memory 630. In alternative embodiments, hard- wired circuitry may be used in place of or in combination with software instructions. Thus, embodiments are not limited to any specific combination of hardware circuitry and software.

[0040] As stated above, the computer system 610 may include at least one computer readable medium or memory for holding instructions programmed according to embodiments of the invention and for containing data structures, tables, records, or other data described herein. The term “computer readable medium” as used herein refers to any medium that participates in providing instructions to the processors 620 for execution. A computer readable medium may take many forms including, but not limited to, non-transitory, non-volatile media, volatile media, and transmission media. Non-limiting examples of non-volatile media include optical disks, solid state drives, magnetic disks, and magneto-optical disks, such as magnetic hard disk 641 or removable media drive 642. Non-limiting examples of volatile media include dynamic memory, such as system memory 630. Non-limiting examples of transmission media include coaxial cables, copper wire, and fiber optics, including the wires that make up the system bus 621. Transmission media may also take the form of acoustic or light waves, such as those generated during radio wave and infrared data communications.

[0041] Computer readable medium instructions for carrying out operations of the present disclosure may be assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state-setting data, or either source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C++ or the like, and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The computer readable program instructions may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate arrays (FPGA), or programmable logic arrays (PLA) may execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects of the present disclosure.

[0042] Aspects of the present disclosure are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, may be implemented by computer readable medium instructions.

[0043] The computing environment 600 may further include the computer system 610 operating in a networked environment using logical connections to one or more remote computers, such as remote computing device 680. The network interface 670 may enable communication, for example, with other remote devices 680 or systems and/or the storage devices 641, 642 via the network 671. Remote computing device 680 may be a personal computer (laptop or desktop), a mobile device, a server, a router, a network PC, a peer device or other common network node, and typically includes many or all of the elements described above relative to computer system 610. When used in a networking environment, computer system 610 may include modem 672 for establishing communications over a network 671, such as the Internet. Modem 672 may be connected to system bus 621 via user network interface 670, or via another appropriate mechanism.

[0044] Network 671 may be any network or system generally known in the art, including the Internet, an intranet, a local area network (LAN), a wide area network (WAN), a metropolitan area network (MAN), a direct connection or series of connections, a cellular telephone network, or any other network or medium capable of facilitating communication between computer system 610 and other computers (e.g., remote computing device 680). The network 671 may be wired, wireless or a combination thereof. Wired connections may be implemented using Ethernet, Universal Serial Bus (USB), RJ-6, or any other wired connection generally known in the art. Wireless connections may be implemented using Wi-Fi, WiMAX, and Bluetooth, infrared, cellular networks, satellite or any other wireless connection methodology generally known in the art. Additionally, several networks may work alone or in communication with each other to facilitate communication in the network 671. [0045] It should be appreciated that the program modules, applications, computer-executable instructions, code, or the like depicted in FIG. 2 as being stored in the system memory 630 are merely illustrative and not exhaustive and that processing described as being supported by any particular module may alternatively be distributed across multiple modules or performed by a different module. In addition, various program module(s), script(s), plug-in(s), Application Programming Interface(s) (API(s)), or any other suitable computer-executable code hosted locally on the computer system 610, the remote device 680, and/or hosted on other computing device(s) accessible via one or more of the network(s) 671, may be provided to support functionality provided by the program modules, applications, or computer-executable code depicted in FIG. 2 and/or additional or alternate functionality. Further, functionality may be modularized differently such that processing described as being supported collectively by the collection of program modules depicted in FIG. 2 may be performed by a fewer or greater number of modules, or functionality described as being supported by any particular module may be supported, at least in part, by another module. In addition, program modules that support the functionality described herein may form part of one or more applications executable across any number of systems or devices in accordance with any suitable computing model such as, for example, a client-server model, a peer-to-peer model, and so forth. In addition, any of the functionality described as being supported by any of the program modules depicted in FIG. 2 may be implemented, at least partially, in hardware and/or firmware across any number of devices.

[0046] It should further be appreciated that the computer system 610 may include alternate and/or additional hardware, software, or firmware components beyond those described or depicted without departing from the scope of the disclosure. More particularly, it should be appreciated that software, firmware, or hardware components depicted as forming part of the computer system 610 are merely illustrative and that some components may not be present or additional components may be provided in various embodiments. While various illustrative program modules have been depicted and described as software modules stored in system memory 630, it should be appreciated that functionality described as being supported by the program modules may be enabled by any combination of hardware, software, and/or firmware. It should further be appreciated that each of the above-mentioned modules may, in various embodiments, represent a logical partitioning of supported functionality. This logical partitioning is depicted for ease of explanation of the functionality and may not be representative of the structure of software, hardware, and/or firmware for implementing the functionality.

Accordingly, it should be appreciated that functionality described as being provided by a particular module may, in various embodiments, be provided at least in part by one or more other modules. Further, one or more depicted modules may not be present in certain embodiments, while in other embodiments, additional modules not depicted may be present and may support at least a portion of the described functionality and/or additional functionality. Moreover, while certain modules may be depicted and described as sub-modules of another module, in certain embodiments, such modules may be provided as independent modules or as sub-modules of other modules.

[0047] Although specific embodiments of the disclosure have been described, one of ordinary skill in the art will recognize that numerous other modifications and alternative embodiments are within the scope of the disclosure. For example, any of the functionality and/or processing capabilities described with respect to a particular device or component may be performed by any other device or component. Further, while various illustrative implementations and architectures have been described in accordance with embodiments of the disclosure, one of ordinary skill in the art will appreciate that numerous other modifications to the illustrative implementations and architectures described herein are also within the scope of this disclosure.

In addition, it should be appreciated that any operation, element, component, data, or the like described herein as being based on another operation, element, component, data, or the like can be additionally based on one or more other operations, elements, components, data, or the like. Accordingly, the phrase “based on,” or variants thereof, should be interpreted as “based at least in part on.”

[0048] The flowchart and block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the Figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts or carry out combinations of special purpose hardware and computer instructions.

Claims

CLAIMS What is claimed is:

1. A computer aided design (CAD) system for designing lattice structures representative of a component, the CAD system comprising: a memory having a plurality of application modules stored thereon; and a processor for executing the application modules, the application modules comprising: a program synthesis module configured to: receive data that defines one or more requirements of the component; and based on the data, generate a virtual lattice structure as a set of descriptive codes including an initial kernel, a starting point in space, and a series of transformations for a repetitive reproduction of the initial kernel into the virtual lattice structure; a design by programming (DBP) module configured to: edit the virtual lattice structure via a three-dimensional graphical user interface and hypertext editor without a full geometric representation of the virtual lattice structure being instantiated; virtual test beds configured to: obtain manufacturing constraints related to the component; and based on the manufacturing constraints, test the virtual lattice structure to determine whether the component can be produced in accordance with the manufacturing constraints.

2. The CAD system of claim 1, the system further comprising: a topology optimization module configured to generate an optimized design of the virtual lattice structure based on the manufacturing constraints.

3. The CAD system of claim 2, wherein the topology optimization module defines a neural network configured to generate the optimized design of the virtual lattice structure based on structural and performance requirements associated with the component.

4. The CAD system of claim 3, wherein the neural network is further configured to be trained each time the neural network generates optimized designs of virtual lattice structures, such that the neural network is trained without pre-collected training data.

5. The CAD system of claim 1, wherein the program synthesis module defines a Bayesian generative model configured to generate lattice designs from an input that includes the one or more requirements of the component, such that the lattice designs are specific to the component.

6. A method performed by a computer system for generating a lattice structure representative of a physical component, the method comprising: receiving data that defines one or more requirements of the physical component; based on the data, generating a virtual lattice structure as a set of descriptive codes including an initial kernel, a starting point in space, and a series of transformations for a repetitive reproduction of the initial kernel into the virtual lattice structure; performing revisions on the virtual lattice structure that are received via a three- dimensional graphical user interface and hypertext editor without a full geometric representation of the virtual lattice structure being instantiated; obtaining manufacturing constraints related to the component; and based on the manufacturing constraints, testing the virtual lattice structure to determine whether the component can be produced in accordance with the manufacturing constraints.

7. The method of claim 6, the method further comprising: generating an optimized design of the virtual lattice structure based on the manufacturing constraints.

8. The method of claim 7, wherein the computer system comprises a neural network, the method further comprising: generating, by the neural network, the optimized design of the virtual lattice structure based on structural and performance requirements associated with the component.

9. The method of claim 8, the method further comprising: training the neural network each time the neural network generates optimized designs of virtual lattice structures, such that the neural network is trained without pre collected training data.

10. The method of claim 6, wherein the computer system comprises a Bayesian generative model, the method further comprising: the Bayesian generative model generating lattice designs from an input that includes the one or more requirements of the component, such that the lattice designs are specific to the component.