WO2021152363A3 - Layer 2 uplink data inline processing using integrated circuits - Google Patents

Layer 2 uplink data inline processing using integrated circuits Download PDF

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Publication number
WO2021152363A3
WO2021152363A3 PCT/IB2020/058238 IB2020058238W WO2021152363A3 WO 2021152363 A3 WO2021152363 A3 WO 2021152363A3 IB 2020058238 W IB2020058238 W IB 2020058238W WO 2021152363 A3 WO2021152363 A3 WO 2021152363A3
Authority
WO
WIPO (PCT)
Prior art keywords
layer
circuits
uplink data
integrated circuits
data packets
Prior art date
Application number
PCT/IB2020/058238
Other languages
French (fr)
Other versions
WO2021152363A2 (en
Inventor
Tianan Tim Ma
Hong Kui Yang
Su-Lin Low
Hausting Hong
Original Assignee
Zeku Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zeku Inc. filed Critical Zeku Inc.
Publication of WO2021152363A2 publication Critical patent/WO2021152363A2/en
Publication of WO2021152363A3 publication Critical patent/WO2021152363A3/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W80/00—Wireless network protocols or protocol adaptations to wireless operation
    • H04W80/02—Data link layer protocols
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W80/00—Wireless network protocols or protocol adaptations to wireless operation
    • H04W80/04—Network layer protocols, e.g. mobile IP [Internet Protocol]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W12/00—Security arrangements; Authentication; Protecting privacy or anonymity
    • H04W12/06—Authentication

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Communication Control (AREA)

Abstract

Embodiments of apparatus and method for Layer 2 uplink data processing are disclosed. In an example, a baseband chip includes a plurality of Layer 2 circuits and a microcontroller unit (MCU) operatively coupled to the Layer 2 circuits. The Layer 2 circuits are configured to receive Layer 3 data packets and generate Medium Access Control (MAC) protocol data units (PDUs) from the Layer 3 data packets in an inline manner. The MUC is configured to control the Layer 2 circuits to generate the MAC PDUs from the Layer 3 data packets through a plurality sets of commands.
PCT/IB2020/058238 2020-01-29 2020-09-04 Layer 2 uplink data inline processing using integrated circuits WO2021152363A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US202062967464P 2020-01-29 2020-01-29
US62/967,464 2020-01-29

Publications (2)

Publication Number Publication Date
WO2021152363A2 WO2021152363A2 (en) 2021-08-05
WO2021152363A3 true WO2021152363A3 (en) 2021-09-30

Family

ID=77078706

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2020/058238 WO2021152363A2 (en) 2020-01-29 2020-09-04 Layer 2 uplink data inline processing using integrated circuits

Country Status (1)

Country Link
WO (1) WO2021152363A2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080186988A1 (en) * 2007-02-07 2008-08-07 Agere Systems Inc. Crc checking and mac-hs processing in an hsdpa-compatible receiver in a 3g wireless network
WO2017216510A1 (en) * 2016-06-14 2017-12-21 Fujitsu Limited Providing service data flow description
CN109982386A (en) * 2013-09-27 2019-07-05 太阳专利信托公司 Integrated circuit, master control base station, communication system and method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080186988A1 (en) * 2007-02-07 2008-08-07 Agere Systems Inc. Crc checking and mac-hs processing in an hsdpa-compatible receiver in a 3g wireless network
CN109982386A (en) * 2013-09-27 2019-07-05 太阳专利信托公司 Integrated circuit, master control base station, communication system and method thereof
WO2017216510A1 (en) * 2016-06-14 2017-12-21 Fujitsu Limited Providing service data flow description

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
HESSEL SEBASTIAN, SZCZESNY DAVID, BRUNS FELIX, BILGIC ATTILA, HAUSNER JOSEF: "Architectural Analysis of a Smart DMA Controller for Protocol Stack Acceleration in LTE Terminals", VEHICULAR TECHNOLOGY CONFERENCE FALL (VTC 2010-FALL), 2010 IEEE 72ND, IEEE, PISCATAWAY, NJ, USA, 1 September 2010 (2010-09-01) - 9 September 2010 (2010-09-09), Piscataway, NJ, USA , pages 1 - 5, XP055862437, ISBN: 978-1-4244-3573-9, DOI: 10.1109/VETECF.2010.5594536 *

Also Published As

Publication number Publication date
WO2021152363A2 (en) 2021-08-05

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