WO2021147200A1 - 一种平板探测器的驱动电路以及时序驱动方法 - Google Patents

一种平板探测器的驱动电路以及时序驱动方法 Download PDF

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WO2021147200A1
WO2021147200A1 PCT/CN2020/087692 CN2020087692W WO2021147200A1 WO 2021147200 A1 WO2021147200 A1 WO 2021147200A1 CN 2020087692 W CN2020087692 W CN 2020087692W WO 2021147200 A1 WO2021147200 A1 WO 2021147200A1
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tft switch
voltage
node
flat panel
signal
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PCT/CN2020/087692
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French (fr)
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陈钢
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南京迪钛飞光电科技有限公司
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/30—Transforming light or analogous information into electric information
    • H04N5/32—Transforming X-rays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14643—Photodiode arrays; MOS imagers
    • H01L27/14658—X-ray, gamma-ray or corpuscular radiation imagers
    • H01L27/14663—Indirect radiation imagers, e.g. using luminescent members
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region

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  • the present invention relates to the technical field of flat panel detectors, in particular to a driving circuit and timing driving method of flat panel detectors.
  • the X-ray of the flat panel detector is first converted into visible light by the fluorescent medium material, and then the visible light signal is converted into an electric signal by the photosensitive element, and finally the analog electric signal is converted into a digital signal by A/D.
  • the generated photocurrent is small, and the leakage current and the process uniformity of the device are likely to interfere with the photocurrent, resulting in deviations in the grayscale reading accuracy.
  • the leakage current of the optoelectronic device and the uniformity of the Vth of the TFT device are two unavoidable problems.
  • the amplifier circuit of the existing flat panel detector can amplify the photocurrent and improve the detection sensitivity to a certain extent, the improvement effect is limited.
  • the object of the present invention is to provide a driving circuit and a timing driving method for a flat panel detector that can avoid charge leakage to the utmost.
  • the present invention provides a driving circuit for a flat panel detector, which includes an amplifying circuit and a first TFT switch that outputs a signal to a data line;
  • the amplifying circuit includes a second TFT switch, a photodiode, and a third TFT connected to a reverse bias voltage Switch and a fourth TFT switch connected to the working voltage; wherein the control terminal of the second TFT switch is connected to the power supply voltage, the first path terminal of the second TFT switch is connected to the reverse bias voltage, and the second path of the second TFT switch is connected to the reverse bias voltage.
  • the cathode of the photodiode is connected to the cathode of the photodiode; the anode of the photodiode is respectively connected to the first path end of the third TFT switch and the control end of the fourth TFT switch; the control end of the third TFT switch is connected to the reset signal voltage, and the third The second path end of the TFT switch is connected to the reference voltage; the first path end of the fourth TFT switch is connected to the operating voltage, the second path end of the fourth TFT switch is connected to the first path end of the first TFT switch; and The control terminal of the TFT switch is connected to the start signal, and the second channel terminal of the first TFT switch outputs a signal to the data line.
  • it further includes a memory compensation circuit partially overlapping the amplifying circuit, the memory compensation circuit detects the threshold voltage of the fourth TFT switch and stores the threshold voltage, and the memory compensation circuit is also connected to the first TFT switch.
  • the third TFT switch and the fourth TFT switch are overlapping parts between the amplifying circuit and the memory compensation circuit.
  • it further includes a first node located between the third TFT switch and the fourth TFT switch and a second node located between the memory compensation circuit and the first TFT switch;
  • the memory compensation circuit includes a bootstrap capacitor, the The bootstrap potential is located between the first node and the second node.
  • the memory compensation circuit further includes a fifth TFT switch, the control terminal of the fifth TFT switch is connected to the compensation signal voltage, the first path terminal of the fifth TFT switch is connected to the second node, and the second terminal of the fifth TFT switch is connected to the second node.
  • the reference voltage is connected to the channel end.
  • the first TFT switch, the second TFT switch, the third TFT switch, the fourth TFT switch and the fifth TFT switch are all metal oxide TFT switches.
  • the present invention also provides a timing driving method of a flat panel detector, which includes the following steps:
  • the compensation signal voltage is turned off, and the voltage at the first node is maintained as the sum of the reference voltage, the threshold voltage and the data line voltage.
  • the start signal is turned on row by row through the data line start gate, and readout The electrical signal in each pixel.
  • step S1 the reverse bias voltage is input to a high potential in N consecutive time sequences, the power supply voltage is low in 2 consecutive time sequences, the start signal is low in 3 consecutive time sequences, and the compensation signal voltage is at It is low level in 1 time sequence, and the working voltage and reset signal voltage are input high level in 1 time sequence, N ⁇ 10.
  • step S2 the reset signal voltage drops to a low level in the next N time sequences, and the operating voltage is at a low level for 2 consecutive time sequences.
  • step S4 when the compensation signal voltage drops to a low level in the next N time sequences, the power supply voltage of each row of pixels maintains a corresponding high voltage according to the light irradiation duration set in the overall time sequence.
  • a second TFT switch is arranged between the reverse bias voltage and the photodiode.
  • the photodiode is activated by the second TFT switch to convert optical signals into electrical signals.
  • the second TFT is turned off. The switch can avoid the leakage of electric charge to the maximum extent.
  • Fig. 1 is a schematic circuit diagram of the driving circuit of the flat panel detector of the present invention
  • Fig. 2 is a timing control diagram of the flat panel detector shown in Fig. 1.
  • the driving circuit of the flat panel detector includes an amplifying circuit 100, a memory compensation circuit 200 partially overlapping the amplifying circuit 100, and a first TFT switch 10 that outputs a signal to a data line.
  • the amplifying circuit 100 and the memory compensation circuit 200 are both connected to the first TFT switch 10.
  • Each TFT switch includes a control terminal, a first channel terminal, and a second channel terminal.
  • the control terminal is a gate
  • one channel terminal is a source and the other channel terminal is a drain.
  • the control terminal is high, the source and drain are connected, and the TFT switch is in the open state; when the control terminal is low, the source and drain are disconnected, and the TFT switch is in the off state.
  • the amplifying circuit 100 includes a second TFT switch 20, a photodiode 30, a third TFT switch 40, and a fourth TFT connected to a working voltage Vdd connected to the reverse bias voltage Vbias (that is, the rated voltage of the photoelectric conversion of the flat panel detector). Switch 50.
  • the photodiode 30 is used to collect light signals and convert the light signals into electrical signals.
  • the photodiode 30 has an anode and a cathode.
  • the second TFT switch 20 is a metal oxide TFT, the control terminal of which is connected to the power supply voltage Vint, the first channel terminal of the second TFT switch 20 is connected to the reverse bias voltage Vbias, and the second channel terminal of the second TFT switch 20 is connected to the photoelectric
  • the cathode of the diode 30 is connected; the anode of the photodiode 30 is respectively connected to the first path end of the third TFT switch 40 and the control end of the fourth TFT switch 50;
  • the control end of the third TFT switch 40 is connected to the reset signal voltage Vreset (reset Set the signal voltage Vreset, used at the beginning or end of each frame) connection, the second path end of the third TFT switch 40 is connected to the reference voltage Vref;
  • the first path end of the fourth TFT switch 50 is connected to the working voltage Vdd, and the fourth The second path end of the TFT switch 50 is connected to the first path end of the first TFT switch 10.
  • the amplifying circuit 100 is provided with a first node A between the third TFT switch 40 and the fourth TFT switch 50.
  • the memory compensation circuit 200 includes a third TFT switch 40, a fourth TFT switch 50, a bootstrap capacitor 60, and a fifth TFT switch 70.
  • the third TFT switch 40 and the fourth TFT switch 50 are the amplifier circuit 100 and the memory compensation circuit 200. Overlapping part.
  • the memory compensation circuit 200 has a second node B between the fourth TFT switch 50 and the first TFT switch 10, and the second node B is also located between the memory compensation circuit 200 and the first TFT switch 100.
  • One end of the bootstrap capacitor 60 is connected to the first node A, and the other end of the bootstrap capacitor 60 is connected to the second node B.
  • the control terminal of the fifth TFT switch 70 is connected to the compensation signal voltage Vcomp, the first path terminal of the fifth TFT switch 70 is connected to the second node B, and the second path terminal of the fifth TFT switch 70 is connected to the reference voltage Vref.
  • the first TFT switch 10 is used to lock the signal in the pixel, and send the signal to the data line Data until the set time.
  • the control end of the first TFT switch 10 is connected to the start signal Vread (that is, the start signal for transmitting the signal in the pixel of the flat panel detector to the IC), the first path end of the first TFT switch 10 is connected to the second node B, and the first The second path end of a TFT switch 10 outputs a signal to the data line Data.
  • the first TFT switch 10, the second TFT switch 20, the third TFT switch 40, the fourth TFT switch 50, and the fifth TFT switch 70 are all metal oxide TFT switches.
  • the metal oxide flat panel detector has low leakage current and electron migration. The advantage of high rate.
  • the function of the memory compensation circuit 200 is to first detect the threshold voltage Vth of the fourth TFT switch 50 and store the threshold voltage Vth in the bootstrap capacitor 60, that is to say, the memory compensation circuit 200 is used to detect the threshold voltage of the fourth TFT switch 50
  • the voltage Vth stores the threshold voltage Vth of the fourth TFT switch 50.
  • the reverse bias voltage Vbias is input to a high level
  • the power supply voltage Vint is at a low level and the second TFT switch 20 is closed
  • the reset signal voltage Vreset is at a high level
  • the third TFT switch 40 is opened.
  • the reference voltage Vref is input to the first node A through the third TFT switch 40, and the voltage VA_1 at the first node A is the reference voltage Vref; when the reset signal voltage Vreset drops to a low level, the third TFT switch 40 is turned off ,
  • the memory compensation circuit starts to work, the memory compensation circuit detects the threshold voltage Vth of the fourth TFT switch 50 (the threshold voltage Vth of the fourth TFT switch 50 is the reference voltage Vref) and stores the threshold voltage Vth in the bootstrap capacitor 60 until The voltage at point B of the second node becomes the reference voltage Vref minus the threshold voltage Vth (that is, Vref-Vth); when the working voltage Vdd drops to a low level, the compensation signal voltage Vcomp rises to a high level, and the fifth TFT switch 70 is turned on, The reference voltage Vref is input to the second node B through the fifth TFT switch 70, the voltage at the second node B becomes the reference voltage Vref, the voltage of the voltage VA_1 at the first
  • the photodiode 30 can convert the collected optical signal into an electrical signal; after the conversion of the photodiode 30 is completed, the compensation signal voltage Vcomp is turned off to maintain the voltage at point A of the first node At this time, the start signal Vread is turned on row by row through the data line start gate (G1, G2, G3, G4...), and the voltage of VA_1 at the first node A becomes Vref+Vth+Vdata (Vdata is the data line voltage) , Read out the electrical signal in each pixel.
  • the present invention also discloses a timing driving method of a flat panel detector, which includes the following steps:
  • the reverse bias voltage Vbias is input high potential (N ⁇ 10) for N consecutive time sequences, the power supply voltage Vint is low for 2 consecutive time sequences, and the start signal Vread is low for 3 consecutive time sequences.
  • the compensation signal voltage Vcomp is low in one time sequence, the working voltage Vdd and the reset signal voltage Vreset are input high in one time sequence and the third TFT switch 40 is turned on, which is input to the third TFT switch 40
  • the reference voltage Vref at the end of the second path passes through the first path end of the third TFT switch 40 to the first node A, where the reference voltage Vref is at the first node A;
  • the compensation signal voltage Vcomp is turned off, and the voltage at the first node A is maintained as the sum of the reference voltage Vref, the threshold voltage Vth, and the data line voltage Vdata (ie: Vref+Vth+Vdata).
  • the start signal Vread is opened line by line through the data line start gate (G1, G2, G3, G4...), and the electrical signal in each pixel is read out.
  • the timing design of the driving circuit of the flat panel detector of the present invention is fine-tuned according to the specifications and dimensions of the flat panel detector.
  • the purpose is to realize the functions of the driving circuit for amplification, compensation, and light conversion in one cycle, and to limit the leakage current to the greatest extent.
  • the timing includes, but is not limited to, the content shown in FIG. 2.
  • a second TFT switch 20 is provided between the reverse bias voltage Vbias and the photodiode 30.
  • the photodiode 30 is activated by the second TFT switch 20 to convert optical signals into electrical signals, and the photodiode 30 converts
  • the second TFT switch 20 is closed to avoid the leakage of electric charge to the utmost extent.
  • the threshold voltage Vth of the fourth TFT switch 50 can be read out and added to the first node A through the memory compensation circuit. Therefore, the influence of different threshold voltages Vth at each position of the flat panel detector on the weak light signal is avoided.

Abstract

一种平板探测器的驱动电路及其时序驱动方法，平板探测器的驱动电路包括放大电路（100）和输出信号至数据线的第一TFT开关（10）；放大电路（100）包括与反偏电压连接的第二TFT开关（20）、光电二极管（30）、第三TFT开关（40）以及与工作电压连接的第四TFT开关（50）；其中，第二TFT开关（20）的控制端连接电源电压，第二TFT开关（20）的第一通路端与反偏电压连接，第二TFT开关（20）的第二通路端与光电二极管（30）的负极连接。通过在反偏电压和光电二极管（30）之间设置第二TFT开关（20），在光电二极管（30）转换时，通过第二TFT开关（20）启动光电二极管（30）进行光信号转换成电信号，光电二极管（30）转换完成后，关闭第二TFT开关（20），最大限度避免电荷的泄露。

Description

一种平板探测器的驱动电路以及时序驱动方法 技术领域
本发明涉及平板探测器的技术领域，尤其涉及一种平板探测器的驱动电路以及时序驱动方法。
背景技术
平板探测器的X线先经荧光介质材料转换成可见光，再由光敏元件将可见光信号转换成电信号，最后将模拟电信号经A/D转换成数字信号。
由于平板探测器的光转换效率问题，产生的光电流较小，漏电流和器件的工艺均匀性都很容易对光电流产生干扰，造成灰阶的读取精度偏差。
光电器件反偏时的漏电流和TFT器件Vth的均一性是无法避免的两个问题。
现有的平板探测器的放大电路尽管能够将光电流放大，在一定程度上提高检测的灵敏度，但是改善效果有限。
发明内容
本发明的目的在于提供一种提供最大限度的避免电荷泄漏的平板探测器的驱动电路以及时序驱动方法。
本发明提供一种平板探测器的驱动电路，其包括放大电路和输出信号至数据线的第一TFT开关；所述放大电路包括与反偏电压连接的第二TFT开关、光电二极管、第三TFT开关以及与工作电压连接的第四TFT开关；其中，所述第二TFT开关的控制端连接电源电压，第二TFT开关的第一通路端与反偏电压连接，第二TFT开关的第二通路端与光电二极管的负极连接；光电二极管的正极分别与第三TF T开关的第一通路端和第四TFT开关的控制端连接；第三TFT开关的控制端与重置信号电压连接，第三TFT开关的第二通路端接入参考电压；第四TFT开关的第一通路端与工作电压连接，第四TFT开关的第二通路端与第一TFT开关的第一通路端连接；以及第一TFT开关的控制端接入启动信号，第一TFT开关的第二通路端输出信号给数据线。
优选地，还包括与所述放大电路部分重叠的记忆补偿电路，所述记忆补偿电路检测第四TFT开关的阈值电压并储存所述阈值电压，所述记忆补偿电路也与第一TFT开关连接。
优选地，所述第三TFT开关和第四TFT开关为所述放大电路和记忆补偿电路之间的重叠的部分。
优选地，还包括位于第三TFT开关和第四TFT开关之间的第一节点以及位于记忆补偿电路和第一TFT开关之间的第二节点；所述记忆补偿电路包括自举电容，所述自举电位位于第一节点和第二节点之间。
优选地，所述记忆补偿电路还包括第五TFT开关，第五TFT开关的控制端与补偿信号电压连接，第五TFT开关的第一通路端与第二节点连接，第五TFT开关的第二通路端接入参考电压。
优选地，所述第一TFT开关、第二TFT开关、第三TFT开关、第四TFT开关和第五TFT开关均为金属氧化物TFT开关。
本发明还提供一种平板探测器的时序驱动方法，包括如下步骤：
S1：启动后，反偏电压输入高电位，重置信号电压输入高电平且打开第三TFT开关，输入至第三TFT开关的第二通路端的参考电压经第三TFT开关的第一通路端至第一节点，第一节点处为参考电压；
S2：重置信号电压降至低电平时，第三TFT开关关闭，记忆补 偿电路开始工作，记忆补偿电路检测出第四TFT开关的阈值电压为参考电压并将阈值电压储存在自举电容内，直至第二节点的电压变为参考电压减去阈值电压；
S3：当工作电压下降至低电平时，补偿信号电压上升至高电平，第二节点处的电压变为参考电压，第一节点处的电压变为参考电压加阈值电压，完成记忆补偿动作；
S4：补偿信号电压下降至低电平时，电源电压上升至高电平，第二TFT开关打开，第二TFT开关驱动光电二极管工作，光电二极管将采集到的光信号转换成电信号；
S5：光电二极管转换完成后，补偿信号电压关闭，维持第一节点处的电压为参考电压、阈值电压和数据线电压之和，此时启动信号通过数据线启动栅极进行逐行打开，读出每一个像素中的电信号。
优选地，步骤S1中，反偏电压在连续N个时序内输入高电位，电源电压在连续2个时序内为低电平，启动信号在连续3个时序内为低电平，补偿信号电压在1个时序内为低电平，工作电压和重置信号电压在1个时序内输入高电平，N≥10。
优选地，步骤S2中，重置信号电压在接下来的N个时序内均降至低电平，工作电压连续2个时序为低电平。
优选地，步骤S4中，补偿信号电压在接下来的N个时序内下降至低电平时，每一行像素的电源电压按照整体时序所设定的光线照射时长维持相应的高电压。
本发明通过在反偏电压和光电二极管之间设置第二TFT开关，在光电二极管转换时，通过第二TFT开关启动光电二极管进行光信号转换成电信号，光电二极管转换完成后，关闭第二TFT开关,可以最大限度的避免电荷的泄露。
附图说明
下面将以明确易懂的方式，结合附图说明优选实施方式，对本发明予以进一步说明。
图1是本发明平板探测器的驱动电路的电路示意图；
图2是图1所述平板探测器的时序控制图。
具体实施方式
下面结合附图和具体实施例，进一步阐明本发明，应理解这些实施例仅用于说明本发明而不用于限制本发明的范围，在阅读了本发明之后，本领域技术人员对本发明的各种等价形式的修改均落于本申请所附权利要求所限定的范围。
为使图面简洁，各图中只示意性地表示出了与本发明相关的部分，它们并不代表其作为产品的实际结构。另外，以使图面简洁便于理解，在有些图中具有相同结构或功能的部件，仅示意性地绘示了其中的一个，或仅标出了其中的一个。在本文中，“一个”不仅表示“仅此一个”，也可以表示“多于一个”的情形。
图1是本发明平板探测器的驱动电路的电路示意图，平板探测器的驱动电路包括放大电路100、与放大电路100部分重叠的记忆补偿电路200以及输出信号至数据线的第一TFT开关10。其中，放大电路100和记忆补偿电路200均与第一TFT开关10连接。
每个TFT开关均包括控制端、第一通路端和第二通路端，在以下的实施例中，控制端为栅极，其中一个通路端为源极、另一个通路端为漏极。当给控制端高电平时，源极和漏极连通，此时TFT开关处于打开状态；当给控制端低电平时，源极和漏极断开，此时TFT开关处于关闭状态。
其中，放大电路100包括与反偏电压Vbias(即平板探测器的光 电转换的额定电压)连接的第二TFT开关20、光电二极管30、第三TFT开关40以及与工作电压Vdd连接的第四TFT开关50。
光电二极管30用于采集光信号并将光信号转化成电信号，光电二极管30具有正极和负极。
其中，第二TFT开关20为金属氧化物TFT，其控制端连接电源电压Vint，第二TFT开关20的第一通路端与反偏电压Vbias连接，第二TFT开关20的第二通路端与光电二极管30的负极连接；光电二极管30的正极分别与第三TFT开关40的第一通路端和第四TFT开关50的控制端连接；第三TFT开关40的控制端与重置信号电压Vreset(重置信号电压Vreset,每一帧的开始或者结尾使用)连接，第三TFT开关40的第二通路端接入参考电压Vref；第四TFT开关50的第一通路端与工作电压Vdd连接，第四TFT开关50的第二通路端与第一TFT开关10的第一通路端连接。
放大电路100在第三TFT开关40和第四TFT开关50之间设有第一节点A。
记忆补偿电路200包括第三TFT开关40、第四TFT开关50、自举电容60和第五TFT开关70，其中，第三TFT开关40和第四TFT开关50为放大电路100和记忆补偿电路200重叠的部分。
记忆补偿电路200在第四TFT开关50和第一TFT开关10之间设有第二节点B，第二节点B也位于记忆补偿电路200和第一TFT开关100之间。
其中，自举电容60的一端连接第一节点A，自举电容60的另一端连接第二节点B。
第五TFT开关70的控制端与补偿信号电压Vcomp连接，第五TFT开关70的第一通路端与第二节点B连接，第五TFT开关70的第 二通路端接入参考电压Vref。
其中，第一TFT开关10用于锁住像素里的信号，等到设定的时刻将信号送出至数据线Data。第一TFT开关10的控制端接入启动信号Vread(即将平板探测器的像素中的信号传送给IC用的启动信号)，第一TFT开关10的第一通路端与第二节点B连接，第一TFT开关10的第二通路端输出信号给数据线Data。
第一TFT开关10、第二TFT开关20、第三TFT开关40、第四TFT开关50和第五TFT开关70均为金属氧化物TFT开关，金属氧化物平板探测器具有漏电流低、电子迁移率高的优势。
记忆补偿电路200的作用是首先检测出第四TFT开关50的阈值电压Vth、并将阈值电压Vth储存在自举电容60内，也就是说记忆补偿电路200用于检测第四TFT开关50的阈值电压Vth并储存第四TFT开关50的阈值电压Vth。当平板探测器进行光电转换时，读取的电信号和第四TFT开关50的阈值电压Vth叠加后共同作用在输出电路上。
如图2所示，平板探测器驱动后，反偏电压Vbias输入高电位，电源电压Vint为低电位且第二TFT开关20关闭，重置信号电压Vreset为高电平且打开第三TFT开关40，参考电压Vref经第三TFT开关40输入至第一节点A处，第一节点A点处的电压VA_1为参考电压Vref；当重置信号电压Vreset下降至低电平时，第三TFT开关40关闭，记忆补偿电路开始工作，记忆补偿电路检测出第四TFT开关50的阈值电压Vth(第四TFT开关50的阈值电压Vth为参考电压Vref)并将阈值电压Vth储存在自举电容60内，直至第二节点B点处电压变为参考电压Vref减去阈值电压Vth(即Vref-Vth)；当工作电压Vdd下降至低电平时，补偿信号电压Vcomp上升至高电平，第五 TFT开关70打开，参考电压Vref经第五TFT开关70输入至第二节点B处，第二节点B处的电压变为参考电压Vref，第一节点A处的电压VA_1的电压变为Vref+Vth，完成记忆补偿动作；补偿信号电压Vcomp下降至低电平时，第五TFT开关70关闭，电源电压Vint上升至高电平，第二TFT开关20打开，第二TFT开关20驱动光电二极管30工作，平板探测器的光电二极管30是在反偏电压Vbias作用下工作的，此光电二极管30可将采集到的光信号转换成电信号；光电二极管30转换完成后，补偿信号电压Vcomp关闭，维持第一节点A点处的电压，此时启动信号Vread通过数据线启动栅极(G1、G2、G3、G4…)进行逐行打开，第一节点A处的VA_1的电压变为Vref+Vth+Vdata(Vdata为数据线电压)，读出每一个像素中的电信号。
本发明还揭示一种平板探测器的时序驱动方法，包括如下步骤：
S1：启动后，反偏电压Vbias连续N个时序内输入高电位(N≥10)，电源电压Vint在连续2个时序内为低电平，启动信号Vread在连续3个时序内为低电平，补偿信号电压Vcomp在1个时序内为低电平，工作电压Vdd和重置信号电压Vreset在1个时序内输入高电平且打开第三TFT开关40，输入至第三TFT开关40的第二通路端的参考电压Vref经第三TFT开关40的第一通路端至第一节点A点，第一节点A处为参考电压Vref；
S2：重置信号电压Vreset在接下来的N个时序内均降至低电平时，第三TFT开关40关闭，记忆补偿电路开始工作，记忆补偿电路检测出第四TFT开关的阈值电压Vth为参考电压Vref并将阈值电压储存在自举电容内，直至第二节点B点处电压变为参考电压Vref减去阈值电压Vth(即Vref-Vth)；
S3：当工作电压Vdd下降至低电平时，补偿信号电压Vcomp上升至高电平，第五TFT开关打开，参考电压经第五TFT开关输入至第二节点B处，第二节点B处的电压变为参考电压Vref，第一节点A处的电压变为Vref+Vth，完成记忆补偿动作；
S4：补偿信号电压Vcomp在接下来的N个时序内下降至低电平时，电源电压Vint上升至高电平(图2所示为连续3个时序内，实际上每一行像素的电源电压Vint按照整体时序所设定的光线照射时长维持相应的高电平)，第二TFT开关20打开，第二TFT开关20驱动光电二极管30工作，平板探测器的光电二极管30是在反偏电压Vbias作用下工作的，此光电二极管30可将采集到的光信号转换成电信号；
S5：光电二极管30转换完成后，补偿信号电压Vcomp关闭，维持第一节点A处的电压为参考电压Vref、阈值电压Vth和数据线电压Vdata之和(即：Vref+Vth+Vdata)，此时启动信号Vread通过数据线启动栅极(G1、G2、G3、G4…)进行逐行打开，读出每一个像素中的电信号。
本发明平板探测器的驱动电路的时序的设计按照平板探测器的规格和尺寸进行微调，目的为实现驱动电路在一个周期内进行放大、补偿、光转换的功能，并且最大限度的限制漏电流，时序包括但不限于图2所示的内容。
本发明通过在反偏电压Vbias和光电二极管30之间设置第二TFT开关20，在光电二极管30转换时，通过第二TFT开关20启动光电二极管30进行光信号转换成电信号，光电二极管30转换完成后，关闭第二TFT开关20,可以最大限度的避免电荷的泄露；同时通过记忆补偿电路，可将第四TFT开关50的阈值电压Vth的值读出，并加 至第一节点A处，从而避免平板探测器各个位置处不同阈值电压Vth对微弱光信号的影响。
以上详细描述了本发明的优选实施方式，但是本发明并不限于上述实施方式中的具体细节，在本发明的技术构思范围内，可以对本发明的技术方案进行多种等同变换(如数量、形状、位置等)，这些等同变换均属于本发明的保护范围。

Claims (10)

  1. 一种平板探测器的驱动电路，其包括放大电路和输出信号至数据线的第一TFT开关；其特征在于：所述放大电路包括与反偏电压连接的第二TFT开关、光电二极管、第三TFT开关以及与工作电压连接的第四TFT开关；
    其中，所述第二TFT开关的控制端连接电源电压，第二TFT开关的第一通路端与反偏电压连接，第二TFT开关的第二通路端与光电二极管的负极连接；
    光电二极管的正极分别与第三TFT开关的第一通路端和第四TFT开关的控制端连接；
    第三TFT开关的控制端与重置信号电压连接，第三TFT开关的第二通路端接入参考电压；
    第四TFT开关的第一通路端与工作电压连接，第四TFT开关的第二通路端与第一TFT开关的第一通路端连接；以及
    第一TFT开关的控制端接入启动信号，第一TFT开关的第二通路端输出信号给数据线。
  2. 根据权利要求1所述的平板探测器的驱动电路，其特征在于：还包括与所述放大电路部分重叠的记忆补偿电路，所述记忆补偿电路检测第四TFT开关的阈值电压并储存所述阈值电压，所述记忆补偿电路也与第一TFT开关连接。
  3. 根据权利要求2所述的平板探测器的驱动电路，其特征在于：所述第三TFT开关和第四TFT开关为所述放大电路和记忆补偿电路之间的重叠的部分。
  4. 根据权利要求2所述的平板探测器的驱动电路，其特征在于：还包括位于第三TFT开关和第四TFT开关之间的第一节点以及位于记忆补偿电路和第一TFT开关之间的第二节点；所述记忆补偿电路 包括自举电容，所述自举电位位于第一节点和第二节点之间。
  5. 根据权利要求4所述的平板探测器的驱动电路，其特征在于：所述记忆补偿电路还包括第五TFT开关，第五TFT开关的控制端与补偿信号电压连接，第五TFT开关的第一通路端与第二节点连接，第五TFT开关的第二通路端接入参考电压。
  6. 根据权利要求5所述的平板探测器的驱动电路，其特征在于：所述第一TFT开关、第二TFT开关、第三TFT开关、第四TFT开关和第五TFT开关均为金属氧化物TFT开关。
  7. 一种平板探测器的时序驱动方法，其特征在于：包括如下步骤：
    S1：启动后，反偏电压输入高电位，重置信号电压输入高电平且打开第三TFT开关，输入至第三TFT开关的第二通路端的参考电压经第三TFT开关的第一通路端至第一节点，第一节点处为参考电压；
    S2：重置信号电压降至低电平时，第三TFT开关关闭，记忆补偿电路开始工作，记忆补偿电路检测出第四TFT开关的阈值电压为参考电压并将阈值电压储存在自举电容内，直至第二节点的电压变为参考电压减去阈值电压；
    S3：当工作电压下降至低电平时，补偿信号电压上升至高电平，第五TFT开关打开，参考电压经第五TFT开关输入至第二节点，第二节点处的电压变为参考电压，第一节点处的电压变为参考电压加阈值电压，完成记忆补偿动作；
    S4：补偿信号电压下降至低电平时，电源电压上升至高电平，第二TFT开关打开，第二TFT开关驱动光电二极管工作，光电二极管将采集到的光信号转换成电信号；
    S5：光电二极管转换完成后，补偿信号电压关闭，维持第一节点 处的电压为参考电压、阈值电压和数据线电压之和，此时启动信号通过数据线启动栅极进行逐行打开，读出每一个像素中的电信号。
  8. 根据权利要求7所述的平板探测器的时序驱动方法，其特征在于：步骤S1中，反偏电压在连续N个时序内输入高电位，电源电压在连续2个时序内为低电平，启动信号在连续3个时序内为低电平，补偿信号电压在1个时序内为低电平，工作电压和重置信号电压在1个时序内输入高电平，其中N≥10。
  9. 根据权利要求7所述的平板探测器的时序驱动方法，其特征在于：步骤S2中，重置信号电压在接下来的N个时序内均降至低电平，工作电压连续2个时序为低电平。
  10. 根据权利要求7所述的平板探测器的时序驱动方法，其特征在于：步骤S4中，补偿信号电压在接下来的N个时序内下降至低电平时，每一行像素的电源电压按照整体时序所设定的光线照射时长维持相应的高电压。
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