WO2021144835A1 - Display device - Google Patents

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Publication number
WO2021144835A1
WO2021144835A1 PCT/JP2020/000850 JP2020000850W WO2021144835A1 WO 2021144835 A1 WO2021144835 A1 WO 2021144835A1 JP 2020000850 W JP2020000850 W JP 2020000850W WO 2021144835 A1 WO2021144835 A1 WO 2021144835A1
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WIPO (PCT)
Prior art keywords
display device
layer
electrode
organic
film
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PCT/JP2020/000850
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French (fr)
Japanese (ja)
Inventor
貴翁 斉藤
庸輔 神崎
雅貴 山中
屹 孫
昌彦 三輪
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シャープ株式会社
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Priority to PCT/JP2020/000850 priority Critical patent/WO2021144835A1/en
Publication of WO2021144835A1 publication Critical patent/WO2021144835A1/en

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/02Details
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/12Light sources with substantially two-dimensional radiating surfaces
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/12Light sources with substantially two-dimensional radiating surfaces
    • H05B33/22Light sources with substantially two-dimensional radiating surfaces characterised by the chemical or physical composition or the arrangement of auxiliary dielectric or reflective layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00

Definitions

  • the present invention relates to a display device.
  • This organic EL display device is, for example, a thin film transistor in which a flexible resin substrate and a semiconductor layer, an inorganic insulating film, a wiring layer, and a flattening film are sequentially laminated on the resin substrate (hereinafter referred to as “TFT””. It includes a layer (also referred to as) and an organic EL element layer in which a plurality of organic EL elements constituting a display region are arranged.
  • Patent Document 1 discloses an organic EL display device in which a plurality of first electrodes, an organic EL layer, and an edge cover are formed as an organic EL element layer, and a second electrode is formed so as to cover these. ing.
  • the edge cover (hereinafter, also referred to as “bank”) of the first electrode is formed in a grid pattern over the entire display region.
  • a bank material is applied on the first electrode, patterning is performed, and then bank baking is performed. During this bank baking, the bank material is thermally shrunk, so that the bank hole (opening of the edge cover, opening for light emission) on the first electrode expands, and at least a part of the peripheral end of the bank hole presses the first electrode. It may be missed.
  • the flattening film (hereinafter, also referred to as “base flattening film”) which is under the first electrode and the bank and is made of the same material as the bank material is compared with the first electrode made of the metal layer.
  • the bondability with the bank material is high, so that the shrinkage stress of the bank material is applied to the substrate flattening film.
  • the shrinkage rate of the bank material changes, causing the inconvenience of cracking the base flattening film.
  • there is an inconvenience that the function of the edge cover is lost. Due to the occurrence of these inconveniences, the reliability of the display device may decrease.
  • the present invention has been made in view of this point, and an object of the present invention is to suppress the occurrence of cracks in the flattening film under the edge cover in the display area.
  • the display device includes a resin substrate layer, a semiconductor layer, at least one first inorganic insulating film, a wiring layer, and a flattening film provided on the resin substrate layer.
  • a support portion is provided in the lower layer along the peripheral end portion of the first electrode, and at least a part of the upper surface of the support portion is from the upper surface of the flattening film that overlaps with the opening of the edge cover in a plan view. Is also characterized by being in a high position.
  • a support portion is provided in the lower layer of each first electrode along the peripheral end portion of the first electrode, and at least a part of the upper surface of the support portion is superimposed on the opening of the edge cover in a plan view. Since it is located higher than the upper surface of the flattening film, it is possible to suppress the occurrence of cracks in the flattening film under the edge cover in the display area.
  • FIG. 1 is a plan view showing a schematic configuration of an organic EL display device according to a first embodiment of the present invention.
  • FIG. 2 is a plan view of a display area of the organic EL display device according to the first embodiment of the present invention.
  • FIG. 3 is a cross-sectional view of a display area of the organic EL display device according to the first embodiment of the present invention.
  • FIG. 4 is an equivalent circuit diagram of a TFT layer constituting the organic EL display device according to the first embodiment of the present invention.
  • FIG. 5 is a cross-sectional view of an organic EL layer constituting the organic EL display device according to the first embodiment of the present invention.
  • FIG. 6 is an enlarged plan view of a display area of the organic EL display device according to the first embodiment of the present invention.
  • FIG. 7 is a cross-sectional view showing a modified example of the display area of the organic EL display device according to the first embodiment of the present invention, and is a view corresponding to FIG.
  • FIG. 8 is a cross-sectional view of a display area of the organic EL display device according to the second embodiment of the present invention, and is a view corresponding to FIG.
  • FIG. 9 is an enlarged plan view of a display area of the organic EL display device according to the second embodiment of the present invention, and is a view corresponding to FIG.
  • FIG. 10 is a cross-sectional view showing a modified example of the display area of the organic EL display device according to the second embodiment of the present invention, and is a view corresponding to FIG.
  • FIG. 1 is a plan view showing a schematic configuration of the organic EL display device 50a of the present embodiment.
  • FIG. 2 is a plan view of the display area D of the organic EL display device 50a.
  • FIG. 3 is a cross-sectional view of the display area D of the organic EL display device 50a.
  • FIG. 4 is an equivalent circuit diagram of the TFT layer 20 constituting the organic EL display device 50a. Further, FIG.
  • FIG. 5 is a cross-sectional view of the organic EL layer 23 constituting the organic EL display device 50a.
  • FIG. 6 is an enlarged plan view of the display area D of the organic EL display device 50a. In the enlarged plan view of FIG. 6, the edge cover 22, the organic EL layer 23, the second electrode 24, and the sealing layer 35 shown in FIG. 3 are omitted.
  • FIG. 7 is a cross-sectional view showing a modified example of the organic EL display device 50a, and is a view corresponding to FIG.
  • the organic EL display device 50a includes, for example, a rectangular display area D for displaying an image and a frame area F provided around the display area D in a rectangular frame shape. ing.
  • the rectangular display area D is illustrated, but the rectangular shape includes, for example, a shape in which the sides are arcuate, a shape in which the corners are arcuate, and a part of the sides.
  • a substantially rectangular shape such as a shape with a notch is also included.
  • a plurality of sub-pixels P are arranged in a matrix in the display area D. Further, in the display area D, as shown in FIG. 2, for example, a sub-pixel P having a red light emitting region Lr for displaying red, and a sub pixel P having a green light emitting region Lg for displaying green, And sub-pixels P having a blue light emitting region Lb for displaying blue are provided so as to be adjacent to each other. In the display area D, for example, one pixel is composed of three adjacent sub-pixels P having a red light emitting region Lr, a green light emitting region Lg, and a blue light emitting region Lb.
  • the terminal portion T is provided so as to extend in one direction (vertical direction in the figure). Further, in the frame area F, as shown in FIG. 1, between the display area D and the terminal portion T, the frame region F can be bent (in a U shape) at, for example, 180 ° with the vertical direction in the drawing as the bending axis.
  • the bent portion B is provided so as to extend in one direction (vertical direction in the figure).
  • the organic EL display device 50a is provided as a resin substrate layer 10, a TFT layer 20 provided on the resin substrate layer 10, and a light emitting element layer forming a display region D on the TFT layer 20.
  • the organic EL element layer 30 is provided, and the sealing layer 35 provided on the organic EL element layer 30 is provided.
  • the resin substrate layer 10 is made of, for example, polyimide or the like.
  • the TFT layer 20 is sequentially provided on the resin substrate layer 10 as semiconductor layers 12a and 12b and at least one first inorganic insulating film (hereinafter, also simply referred to as “first inorganic insulating film”).
  • the base coat film 11, the gate insulating film 13, the first interlayer insulating film 15, the second interlayer insulating film 17, the wiring layer described later, and the flattening film 19 are laminated.
  • the TFT layer 20 is provided as a base coat film 11 provided on the resin substrate layer 10 and as a pixel circuit (see FIG. 4) for each sub-pixel P on the base coat film 11.
  • the first TFT 9a, the second TFT 9b and the capacitor 9c are provided, and the flattening film 19 for the TFT provided on each of the first TFT 9a, each second TFT 9b and each capacitor 9c is provided.
  • the TFT layer 20 a plurality of pixel circuits are arranged in a matrix corresponding to the plurality of sub-pixels P.
  • the TFT layer 20 is provided with a plurality of gate wires 14 (wiring layers) so as to extend in parallel with each other in the horizontal direction in the drawing. Further, as shown in FIGS.
  • the TFT layer 20 is provided with a plurality of source lines 18f (wiring layers) so as to extend in parallel with each other in the vertical direction in the drawing. Further, as shown in FIGS. 2 and 4, the TFT layer 20 is provided with a plurality of power supply lines 18 g (wiring layers) so as to extend in parallel with each other in the vertical direction in the drawing. As shown in FIG. 3, each power supply line 18g is provided so as to be adjacent to each source line 18f.
  • the base coat film 11, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17 constituting the first inorganic insulating film are simply inorganic insulating films such as silicon nitride, silicon oxide, and silicon oxynitride. It is composed of a layered film or a laminated film.
  • the first TFT 9a is electrically connected to the corresponding gate line 14 and source line 18f in each sub-pixel P. Further, as shown in FIG. 3, the first TFT 9a includes a semiconductor layer 12a, a gate insulating film 13, a gate electrode 14a (wiring layer), a first interlayer insulating film 15, and a second interlayer insulating, which are sequentially provided on the base coat film 11. A film 17 and a source electrode 18a and a drain electrode 18b (wiring layer) are provided.
  • the semiconductor layer 12a is provided in an island shape on the base coat film 11 by, for example, a low-temperature polysilicon film, an In—Ga—Zn—O-based oxide semiconductor film, or the like, as shown in FIG.
  • the gate insulating film 13 is provided so as to cover the semiconductor layer 12a.
  • the gate electrode 14a is provided on the gate insulating film 13 so as to overlap the channel region of the semiconductor layer 12a.
  • the first interlayer insulating film 15 and the second interlayer insulating film 17 are provided in order so as to cover the gate electrode 14a as shown in FIG.
  • the source electrode 18a and the drain electrode 18b are provided on the second interlayer insulating film 17 so as to be separated from each other. Further, as shown in FIG.
  • the source electrode 18a and the drain electrode 18b are provided through the contact holes formed in the laminated film of the gate insulating film 13, the first interlayer insulating film 15 and the second interlayer insulating film 17. It is electrically connected to the source region and the drain region of the semiconductor layer 12a, respectively.
  • the second TFT 9b is electrically connected to the corresponding first TFT 9a and the power supply line 18g in each sub-pixel P.
  • the second TFT 9b includes a semiconductor layer 12b, a gate insulating film 13, a gate electrode 14b (wiring layer), a first interlayer insulating film 15, and a second interlayer insulating, which are sequentially provided on the base coat film 11.
  • a film 17 and a source electrode 18c and a drain electrode 18d (wiring layer) are provided.
  • the semiconductor layer 12b is provided in an island shape on the base coat film 11 by, for example, a low-temperature polysilicon film, an In—Ga—Zn—O-based oxide semiconductor film, or the like, as shown in FIG. It has a region, a source region and a drain region.
  • the gate insulating film 13 is provided so as to cover the semiconductor layer 12b.
  • the gate electrode 14b is provided on the gate insulating film 13 so as to overlap the channel region of the semiconductor layer 12b.
  • the first interlayer insulating film 15 and the second interlayer insulating film 17 are provided in order so as to cover the gate electrode 14b as shown in FIG. Further, as shown in FIG.
  • the source electrode 18c and the drain electrode 18d are provided on the second interlayer insulating film 17 so as to be separated from each other. Further, as shown in FIG. 3, the source electrode 18c and the drain electrode 18d pass through the contact holes formed in the laminated film of the gate insulating film 13, the first interlayer insulating film 15 and the second interlayer insulating film 17. It is electrically connected to the source region and the drain region of the semiconductor layer 12b, respectively.
  • the top gate type first TFT 9a and the second TFT 9b are illustrated, but the first TFT 9a and the second TFT 9b may be a bottom gate type TFT.
  • the capacitor 9c is electrically connected to the corresponding first TFT 9a and the power supply line 18g in each sub-pixel P.
  • the capacitor 9c is provided so as to cover the lower conductive layer 14c (wiring layer) formed in the same layer as the gate electrodes 14a and 14b and the lower conductive layer 14c.
  • a first interlayer insulating film 15 and an upper conductive layer 16 (wiring layer) provided on the first interlayer insulating film 15 so as to overlap the lower conductive layer 14c are provided.
  • the upper conductive layer 16 is electrically connected to the power supply line 18g via a contact hole formed in the second interlayer insulating film 17.
  • Each of the above-mentioned wiring layers is, for example, a metal single layer film such as molybdenum (Mo), titanium (Ti), aluminum (Al), copper (Cu), tungsten (W), or Mo (upper layer) / Al (middle layer). It is formed of a metal laminated film such as / Mo (lower layer), Ti / Al / Ti, Al (upper layer) / Ti (lower layer), Cu / Mo, and Cu / Ti.
  • the flattening film 19 has a flat surface in the display area D.
  • the flattening film 19 is made of, for example, an organic resin material such as a polyimide resin or an acrylic resin. Further, the flattening film 19 may be composed of a resin layer made of a positive photosensitive resin such as a polyimide resin, an acrylic resin, a polysiloxane resin, or a novolak resin.
  • the organic EL element layer 30 includes a plurality of organic EL elements 25 so as to be arranged in a matrix on the flattening film 19 corresponding to the plurality of pixel circuits in the display area D.
  • the organic EL element layer 30 is composed of a plurality of organic EL elements 25 arranged in a matrix, and as shown in FIG. 3, a plurality of first electrodes sequentially provided on the TFT layer 20. It includes 21, an edge cover 22, a plurality of organic EL layers 23 provided as a plurality of functional layers, and a second electrode 24.
  • the plurality of first electrodes 21 are provided in a matrix on the flattening film 19 so as to correspond to the plurality of sub-pixels P.
  • the first electrode 21 is electrically connected to the drain electrode 18d (or source electrode 18c) of each second TFT 9b via a contact hole formed in the flattening film 19.
  • the first electrode 21 has a function of injecting holes into the organic EL layer 23.
  • the first electrode 21 is more preferably formed of a material having a large work function in order to improve the hole injection efficiency into the organic EL layer 23.
  • Examples of the material constituting the first electrode 21 include silver (Ag), aluminum (Al), vanadium (V), cobalt (Co), nickel (Ni), tungsten (W), gold (Au), and titanium ( Ti), ruthenium (Ru), manganese (Mn), indium (In), itterbium (Yb), lithium fluoride (LiF), platinum (Pt), palladium (Pd), molybdenum (Mo), iridium (Ir), Examples include metal materials such as tin (Sn). Further, the material constituting the first electrode 21 may be, for example, an alloy such as astatine (At) / oxidized astatine (AtO 2).
  • the material constituting the first electrode 21 is, for example, a conductive oxide such as tin oxide (SnO), zinc oxide (ZnO), indium tin oxide (ITO), and indium zinc oxide (IZO).
  • a conductive oxide such as tin oxide (SnO), zinc oxide (ZnO), indium tin oxide (ITO), and indium zinc oxide (IZO).
  • the compound material having a large work function include indium tin oxide (ITO) and indium zinc oxide (IZO).
  • the first electrode 21 may be formed by laminating a plurality of layers made of the above materials.
  • the first electrode 21 has a layer made of indium tin oxide (ITO), a layer made of silver (Ag) as a reflective electrode, and indium tin oxide (ITO). ) Are laminated and formed.
  • the first electrode 21 has a laminated structure in which a layer made of silver (Ag) is interposed between two layers of indium tin oxide (ITO).
  • the reflective electrode means an electrode having a higher light reflectance than a metal layer such as a gate electrode 14a, for example.
  • the edge cover 22 is provided in a grid pattern so as to cover the peripheral end portion 21b of each first electrode 21 so as to be common to the plurality of sub-pixels P. More specifically, as shown in FIGS. 3 and 6, a plurality of openings 42 are formed in the edge cover 22 corresponding to the positions of the plurality of first electrodes 21. As described above, the opening 42 is a bank hole (light emitting opening) formed on the first electrode 21.
  • the shape of the opening 42 is not particularly limited, and is, for example, a rectangular shape (including a substantially rectangular shape such as a shape having arcuate sides and an arcuate corner), a circular shape, an elliptical shape, and the like. Can be mentioned.
  • the material (bank material) constituting the edge cover 22 includes, for example, a positive photosensitive resin (material constituting the flattening film 19) such as a polyimide resin, an acrylic resin, a polysiloxane resin, and a novolak resin. Similar organic resin materials).
  • a positive photosensitive resin material constituting the flattening film 19
  • a polyimide resin such as a polyimide resin, an acrylic resin, a polysiloxane resin, and a novolak resin. Similar organic resin materials).
  • the plurality of organic EL layers 23 are arranged on each of the first electrodes 21 and are provided in a matrix so as to correspond to the plurality of sub-pixels P.
  • the organic EL layer 23 includes a hole injection layer 1, a hole transport layer 2, a light emitting layer 3, an electron transport layer 4, and an electron injection layer, which are sequentially provided on the first electrode 21. It has 5.
  • the hole injection layer 1 is also called an anode buffer layer, and has a function of bringing the energy levels of the first electrode 21 and the organic EL layer 23 closer to each other and improving the hole injection efficiency from the first electrode 21 to the organic EL layer 23.
  • Examples include hydrazone derivatives and stillben derivatives.
  • the hole transport layer 2 has a function of improving the hole transport efficiency from the first electrode 21 to the organic EL layer 23.
  • examples of the material constituting the hole transport layer 2 include a porphyrin derivative, an aromatic tertiary amine compound, a styrylamine derivative, polyvinylcarbazole, a poly-p-phenylene vinylene, a polysilane, a triazole derivative, and an oxadiazole.
  • Derivatives imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, pyrazolone derivatives, phenylenediamine derivatives, arylamine derivatives, amine-substituted chalcone derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, stillben derivatives, hydride amorphous silicon, Examples thereof include hydride amorphous silicon carbide, zinc sulfide, and zinc selenium.
  • the light emitting layer 3 when a voltage is applied by the first electrode 21 and the second electrode 24, holes and electrons are injected from the first electrode 21 and the second electrode 24, respectively, and the holes and electrons are recombined.
  • the light emitting layer 3 is formed of a material having high luminous efficiency.
  • the material constituting the light emitting layer 3 include a metal oxinoid compound [8-hydroxyquinolin metal complex], a naphthalene derivative, an anthracene derivative, a diphenylethylene derivative, a vinylacetone derivative, a triphenylamine derivative, a butadiene derivative, and a coumarin derivative.
  • the electron transport layer 4 has a function of efficiently moving electrons to the light emitting layer 3.
  • the material constituting the electron transport layer 4 for example, as an organic compound, an oxadiazole derivative, a triazole derivative, a benzoquinone derivative, a naphthoquinone derivative, an anthraquinone derivative, a tetracyanoanthracinodimethane derivative, a diphenoquinone derivative, and a fluorenone derivative , Cyrol derivatives, metal oxinoid compounds and the like.
  • the electron injection layer 5 has a function of bringing the energy levels of the second electrode 24 and the organic EL layer 23 closer to each other and improving the efficiency of injecting electrons from the second electrode 24 into the organic EL layer 23.
  • the drive voltage of the organic EL element 25 can be lowered.
  • the electron injection layer 5 is also called a cathode buffer layer.
  • examples of the material constituting the electron injection layer 5 include lithium fluoride (LiF), magnesium fluoride (MgF 2 ), calcium fluoride (CaF 2 ), strontium fluoride (SrF 2 ), and barium fluoride.
  • Inorganic alkaline compounds such as (BaF 2 ), aluminum oxide (Al 2 O 3 ), strontium oxide (SrO) and the like can be mentioned.
  • the second electrode 24 is provided so as to cover the organic EL layer 23 of each sub-pixel P and the edge cover 22 common to all sub-pixels P. Further, the second electrode 24 has a function of injecting electrons into the organic EL layer 23. Further, the second electrode 24 is more preferably made of a material having a small work function in order to improve the electron injection efficiency into the organic EL layer 23.
  • the material constituting the second electrode 24 include silver (Ag), aluminum (Al), vanadium (V), cobalt (Co), nickel (Ni), tungsten (W), and gold (Au).
  • the second electrode 24 is, for example, magnesium (Mg) / copper (Cu), magnesium (Mg) / silver (Ag), sodium (Na) / potassium (K), asstatin (At) / oxidized asstatin (AtO 2).
  • the second electrode 24 may be formed of, for example, a conductive oxide such as tin oxide (SnO), zinc oxide (ZnO), indium tin oxide (ITO), and indium zinc oxide (IZO). .. Further, the second electrode 24 may be formed by laminating a plurality of layers made of the above materials.
  • Examples of materials having a small work function include magnesium (Mg), lithium (Li), lithium fluoride (LiF), magnesium (Mg) / copper (Cu), magnesium (Mg) / silver (Ag), and sodium.
  • (Na) / Potassium (K) Lithium (Li) / Aluminum (Al), Lithium (Li) / Calcium (Ca) / Aluminum (Al), Lithium Fluoride (LiF) / Calcium (Ca) / Aluminum (Al) And so on.
  • the sealing layer 35 is provided on the organic EL element layer 30 so as to cover each organic EL element 25.
  • the sealing layer 35 includes a first sealing inorganic film 31 provided on the resin substrate layer 10 side so as to cover the second electrode 24, and a first sealing inorganic film 31. It includes a sealing organic film 32 provided above and a second sealing inorganic film 33 provided so as to cover the sealing organic film 32.
  • the sealing layer 35 has a function of protecting the organic EL layer 23 from moisture, oxygen, and the like.
  • the first sealing inorganic film 31 and the second sealing inorganic film 33 are, for example, silicon oxide (SiO 2 ), aluminum oxide (Al 2 O 3 ), trisilicon tetroxide (Si 3 N 4 ), and the like. It is composed of an inorganic material such as silicon nitride (SiNx (x is a positive number)) and silicon nitride (SiCN). Further, the sealing organic film 32 is made of an organic material such as an acrylic resin, a polyurea resin, a parylene resin, a polyimide resin, or a polyamide resin.
  • a support portion S (FIG. 3) is formed on the lower layer (lower surface) of each first electrode 21 along the peripheral end portion 21b of the first electrode 21. 3 and FIG. 6 are provided with dots).
  • the support portion S supports the first electrode 21 at the peripheral end portion 21b.
  • the support portion S is provided on the entire circumference of the first electrode 21. Further, the upper surface Sa of the support portion S is in contact with the first electrode 21.
  • the support portion S is formed of a part of the flattening film 19.
  • the flattening film 19 is a resin layer.
  • This resin layer is photosensitive. That is, the flattening film 19 and the support portion S formed of a part thereof are composed of a resin layer made of a photosensitive resin.
  • a plurality of recesses 49 are formed in the flattening film 19 corresponding to the positions of the plurality of first electrodes 21.
  • the bottom surface portion 49a of the recess 49 overlaps the central portion 21a of the first electrode 21 and the opening 42 of the edge cover 22 in a plan view.
  • the bottom surface portion 49a of the recess 49 is the top surface 19a of the flattening film 19 that overlaps with the opening 42 of the edge cover 22 in a plan view.
  • the peripheral end portion 49b of the concave portion 49 overlaps with the peripheral end portion 21b of the first electrode 21 in a plan view.
  • the peripheral end portion 49b of the recess 49 is a support portion S (constituting the support portion S).
  • the support portion S (the outer peripheral end portion Sb of the support portion S) is surrounded by the peripheral end portion 21b of the first electrode 21 in a plan view. ing. In other words, the outer peripheral end portion Sb of the support portion S is arranged flush with the peripheral end portion 21b of the first electrode 21 or inside the peripheral end portion 21b.
  • the peripheral end of the opening 42 of the edge cover 22 is surrounded by the support portion S (the inner peripheral end portion Sd of the support portion S). In other words, the peripheral end portion of the opening 42 of the edge cover 22 is arranged inside the inner peripheral end portion Sd of the support portion S.
  • the organic EL display device 50a as shown in FIG. 3, at least a part of the upper surface Sa of the support portion S (peripheral end portion 49b of the recess 49) is seen in plan with the opening 42 of the edge cover 22 in a cross-sectional view. The position is higher than the upper surface 19a (bottom surface 49a of the recess 49) of the flattening film 19 superimposed on the above. In other words, as shown in FIG. 3, the thickness of the flattening film 19 at the peripheral end portion 49b is larger than the thickness of the flattening film 19 at the bottom surface portion 49a.
  • the upper surface of the peripheral end portion 49b (the upper surface Sa of the support portion S) is raised with respect to the bottom surface portion 49a by the thickness of the support portion S via the step portion 49c.
  • the step portion 49c may be inclined upward from the bottom surface portion 49a toward the upper surface of the peripheral end portion 49b, or may be curved upward.
  • the base flattening film 19 is formed by forming the recess 49 in the flattening film 19 (superimposed on the first electrode 21 in a plan view) under each first electrode 21. Unevenness (step) is formed on the surface.
  • the size of the step of the flattening film 19 (the thickness of the support portion S, the difference between the thickness of the bottom surface portion 49a and the thickness of the peripheral end portion 49b) is, for example, about 100 nm to 1000 nm.
  • the shape corresponds to the surface shape of the recess 49.
  • the upper surface of the first electrode 21 (the peripheral end portion 21b of the first electrode 21) that overlaps with the support portion S in a plan view is the opening 42 of the edge cover 22. It is higher than the upper surface of the first electrode 21 (central portion 21a of the first electrode 21) that overlaps with the above in a plan view. That is, the support portion S also forms a step on the first electrode 21.
  • the surface area of the first electrode 21 is increased, so that the surface tension (resistance) of the bank material with respect to the first electrode 21 is increased.
  • the bank hole after bank baking is the first electrode 21. It may extend to the vicinity of the peripheral end portion 21b. In other words, as shown in FIG. 7, at least a part of the support portion S may overlap with the opening 42 of the edge cover 22 in a plan view.
  • the recess 49 is formed in the flattening film 19, but instead of the recess 49, for example, the flattening film 19 is formed corresponding to the positions of the plurality of first electrodes 21.
  • a plurality of formed annular patterns C 19 may be provided.
  • each annular pattern C 19 (annular flattening film 19) of the flattening film 19 is the support portion S.
  • the organic EL display device 50a described above turns on the first TFT 9a by inputting a gate signal to the first TFT 9a via the gate line 14 in each sub-pixel P, and turns on the first TFT 9a, and the gate electrode of the second TFT 9b via the source line 18f.
  • a data signal to the 14b and the capacitor 9c and supplying a current from the power supply line 18g corresponding to the gate voltage of the second TFT 9b to the organic EL layer 23
  • the light emitting layer 3 of the organic EL layer 23 emits light, and the image It is configured to display.
  • the gate voltage of the second TFT 9b is held by the capacitor 9c, so that the light emitting layer 3 emits light until the gate signal of the next frame is input. Be maintained.
  • the method for manufacturing the organic EL display device 50a of the present embodiment includes a resin substrate layer forming step, a TFT layer forming step, an organic EL element layer forming step, a sealing layer forming step, and a mounting step. ..
  • a flexible resin substrate layer 10 is formed by applying a non-photosensitive polyimide resin on a support substrate (not shown) such as a glass substrate and then prebaking and post-baking the coated film. do.
  • the base coat film 11, the semiconductor layers 12a and 12b, the gate insulating film 13, the gate electrode 14a, and the first interlayer film are used.
  • the TFT layer 20 is formed by laminating the insulating film 15, the second interlayer insulating film 17, the wiring layer (source electrode 18a, drain electrode 18b, etc.), the flattening film 19, and the like in this order.
  • the base coat film 11, the first TFT 9a, the second TFT 9b, the capacitor 9c, and the flattening film 19 are formed on the resin substrate layer 10.
  • the flattening film 19 is formed in a resin layer made of a photosensitive resin, for example, by using a photosensitive resin.
  • a plurality of first electrodes 21 formed in the next organic EL element layer forming step by photolithography and subsequent patterning (etching) are formed on a part of the flattening film 19.
  • the support portion S is formed. More specifically, the flattening film 19 is patterned using a gray tone mask to form a plurality of recesses 49 or a plurality of annular patterns C 19 in the flattening film 19. At this time, the recess 49 and the contact hole may be formed in the flattening film 19 at the same time.
  • the peripheral end portion 49b or the plurality of annular patterns C 19 in the recess 49 of the flattening film 19 formed by this step serves as the support portion S.
  • ⁇ Organic EL element layer forming process> On the flattening film 19 of the TFT layer 20 formed in the TFT layer forming step, a plurality of first electrodes 21 are common to the plurality of sub-pixels P constituting the display region D by using a well-known method.
  • the organic EL element 25 is formed to form the organic EL element layer 30.
  • a metal layer for the first electrode 21 (reflection electrode) is formed on the surface of the flattening film 19 on which a plurality of recesses 49 or a plurality of annular patterns C 19 are formed in the TFT layer forming step. And photolithography and patterning. As a result, the first electrode 21 having a shape corresponding to the surface shape of the recess 49 or the annular pattern C 19 is formed. At this time, the first electrode 21 is formed so that the outer peripheral end portion Sb of the support portion S is arranged flush with the peripheral end portion 21b of the first electrode 21 or inside the peripheral end portion 21b.
  • the bank material is applied in a grid pattern so as to cover the peripheral end portion 21b of each first electrode 21, photolithography and patterning are performed, and then bank baking is performed.
  • a bank (edge cover 22) in which the opening 42 is formed is formed corresponding to the position of each first electrode 21.
  • the edge cover 22 is formed so that the peripheral end portion of the opening 42 of the edge cover 22 is arranged inside the inner peripheral end portion Sd of the support portion S.
  • the organic EL layer 23, the second electrode 24, etc. are formed on the first electrode 21 or the edge cover 22.
  • a mask is used so as to cover each organic EL element 25 on the organic EL element layer 30 formed in the organic EL element layer forming step, for example, a silicon nitride film, a silicon oxide film, a silicon oxynitride film, or the like.
  • the inorganic insulating film of No. 1 is formed by a plasma CVD (chemical vapor deposition) method to form the first sealing inorganic film 31.
  • an organic resin material such as an acrylic resin is formed on the surface of the substrate on which the first sealing inorganic film 31 is formed by, for example, an inkjet method to form the sealing organic film 32.
  • an inorganic insulating film such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film is formed by a plasma CVD method so as to cover the sealing organic film 32, and the second sealing is performed.
  • the inorganic film 33 is formed.
  • a protective sheet (not shown) is attached to the surface of the substrate on which the sealing layer 35 is formed in the sealing layer forming step, and then the resin substrate layer is irradiated with laser light from the glass substrate side of the resin substrate layer 10. The glass substrate is peeled off from the back surface of 10. Subsequently, a protective sheet (not shown) is attached to the back surface of the resin substrate layer 10 from which the glass substrate has been peeled off.
  • the mother substrate in which a plurality of display substrates manufactured by each of the above steps are arranged in a matrix is divided by, for example, laser light, and the display panels are individually cut out and individualized.
  • the protective sheet is partially removed by, for example, irradiating the protective sheet attached to the surface of the display substrate on which the sealing layer 35 is formed with laser light.
  • a functional film having various functions such as an optical compensation function, a touch sensor function, and a protective function is attached to the surface of the sealing layer 35 from which the protective sheet has been removed via an adhesive layer (OCA).
  • the organic EL display device 50a of the present embodiment can be manufactured.
  • the organic EL display device 50a of the present embodiment As described above, according to the organic EL display device 50a of the present embodiment, the following effects can be obtained.
  • the lower layer of each first electrode 21 has a support portion S along the peripheral end portion 21b of the first electrode 21. Is provided. Then, at least a part of the upper surface Sa of the support portion S is located higher than the upper surface 19a of the flattening film 19 that overlaps the opening 42 of the edge cover 22 in a plan view. As a result, at least a part of the upper surface of the peripheral end portion 21b that overlaps with the support portion S in a plan view of the first electrode 21 is at a position higher than the upper surface of the central portion 21a (the first electrode 21 has irregularities (steps). ) Can be done).
  • the surface tension (resistance) of the bank material with respect to the first electrode 21 becomes large, so that even if the bank material is thermally shrunk during bank baking, the opening 42 (bank hole, light emitting opening) of the edge cover 22 is the first. It is possible to suppress the spread beyond the step of one electrode 21. Therefore, it is possible to prevent at least a part of the peripheral end portion of the bank hole from stepping off the first electrode 21.
  • the bank hole is extended to the vicinity of the peripheral end portion 21b of the first electrode 21 as shown in FIG. Can be formed large.
  • the display quality of the organic EL display device 50a can be improved.
  • FIG. 8 to 10 show a second embodiment of the display device according to the present invention.
  • FIG. 8 is a cross-sectional view of the display area D of the organic EL display device 50b according to the present embodiment, and is a view corresponding to FIG.
  • FIG. 9 is an enlarged plan view of the display area D of the organic EL display device 50b, which corresponds to FIG. In the enlarged plan view of FIG. 9, the edge cover 22, the organic EL layer 23, the second electrode 24, and the sealing layer 35 shown in FIG. 8 are omitted.
  • a second inorganic insulating film 45 is provided on a flattening film 19 that overlaps each first electrode 21 in a plan view.
  • the support portion S is formed by the second inorganic insulating film 45.
  • a plurality of annular patterns C 45 formed of the second inorganic insulating film 45 are provided along the plurality of first electrodes 21.
  • the annular pattern C 45 (annular second inorganic insulating film 45) of the second inorganic insulating film 45 is the support portion S. That is, the support portion S is formed on the entire circumference of the first electrode 21.
  • the outer peripheral end portion Sb of the support portion S is surrounded by the peripheral end portion 21b of the first electrode 21.
  • the peripheral end of the opening 42 of the edge cover 22 is surrounded by the inner peripheral end Sd of the support portion S.
  • annular second inorganic insulating film 45 is independent and is not connected (not connected) to other inorganic insulating films constituting the adjacent sub-pixels P.
  • the support portion S is annular.
  • a second inorganic insulating film 45 is interposed.
  • the upper surface of the annular second inorganic insulating film 45 is in contact with the first electrode 21, and the lower surface thereof is in contact with the flattening film 19.
  • the annular pattern C 45 and the annular pattern C 45 are viewed in a plan view. At least a part of the upper surface of the first electrode 21 (the peripheral end portion 21b of the first electrode 21) to be superimposed overlaps with the opening 42 of the edge cover 22 in a plan view, the first electrode 21 (the central portion 21a of the first electrode 21). ) Is higher than the upper surface. That is, the annular pattern C 45 also forms a step on the first electrode 21.
  • the thickness of the annular second inorganic insulating film 45 (support portion S) is, for example, about 100 nm to 500 nm.
  • the material constituting the second inorganic insulating film 45 may be any material that can form a film at a temperature lower than the bake temperature (about 250 ° C.) of the base flattening film 19 under the first electrode 21, for example. four nitride three silicon (Si 3 N 4) or the like of a silicon nitride (SiNx (x is a positive number)), and inorganic materials such as silicon carbonitride (SiCN) is.
  • the second inorganic insulating film 45 is composed of a single-layer film or a laminated film of an inorganic insulating film made of the above-mentioned inorganic material.
  • the organic EL display device 50b is, for example, changed the TFT layer forming step as follows, and is organic after the TFT layer forming step. It can be manufactured by providing a second inorganic insulating film patterning step before the EL element layer forming step.
  • the semiconductor layers 12a and 12b, the first inorganic insulating film, and the wiring layer (source electrode 18a, drain electrode 18b, etc.) are used on the surface of the resin substrate layer 10.
  • the TFT layer 20 is formed by laminating the flattening film 19 and the like in order. Specifically, the base coat film 11, the first TFT 9a, the second TFT 9b, the capacitor 9c, and the flattening film 19 are formed on the resin substrate layer 10.
  • the flattening film 19 is formed in a resin layer made of a photosensitive resin, for example, by using a photosensitive resin.
  • the second inorganic insulating film 45 is formed by forming an inorganic insulating film such as a silicon film and patterning the film. More specifically, the second inorganic insulating film 45 is photolithographically and patterned using a mask to provide the annular pattern C 45 of the second inorganic insulating film 45. As a result, the support portion S is formed by the annular second inorganic insulating film 45.
  • the following effects can be obtained in addition to the effects (1) to (6) above.
  • a second inorganic insulating film 45 is provided on the flattening film 19, and the support portion S is provided by the second inorganic insulating film 45. It is formed.
  • a plurality of annular patterns C 45 formed of the second inorganic insulating film 45 are provided corresponding to the positions of the plurality of first electrodes 21, and each of the annular patterns C 45 serves as a support portion S. ing.
  • annular second inorganic insulating film 45 Since the annular second inorganic insulating film 45 is not connected to the other inorganic insulating films constituting the adjacent sub-pixels P independently of each other, it is possible to prevent the annular second inorganic insulating film 45 from peeling off from the flattening film 19 at the time of bank baking. can.
  • FIG. 10 is a cross-sectional view showing a modified example of the display area D of the organic EL display device 50b, and is a view corresponding to FIG.
  • the pattern shape of the second inorganic insulating film 45 may be changed.
  • a plurality of openings 46 are formed in the second inorganic insulating film 45 corresponding to the positions of the plurality of first electrodes 21. That is, at each opening 46, the second inorganic insulating film 45 is removed, and the flattening film 19 and the first electrode 21 are in contact with each other. Each opening 46 overlaps the central portion 21a of the first electrode 21 and the opening 42 of the edge cover 22 in a plan view.
  • the second inorganic insulating film 45 at the peripheral end of each opening 46 is the support portion S.
  • the second inorganic insulating film 45 at the portion around the opening 46 of the second inorganic insulating film 45 that overlaps with the first electrode 21 in a plan view is the support portion S.
  • the second inorganic insulation is also formed on the flattening film 19 in the portion other than the portion that overlaps with the first electrode 21 in a plan view.
  • the film 45 is formed.
  • each of the second inorganic insulating films 45 at the peripheral ends of the plurality of openings 46 among the second inorganic insulating films 45 in the display region D. Is the support portion S. That is, the support portion S is formed of a part of the second inorganic insulating film 45.
  • a modified example of the organic EL display device 50b can be manufactured by, for example, changing the pattern shape of the second inorganic insulating film 45 in the second inorganic insulating film patterning step in the above-mentioned manufacturing method of the organic EL display device 50b. More specifically, first, an inorganic insulating film such as a silicon nitride film is formed on the surface of the flattening film 19 in the display region D by using a well-known method, and the second inorganic insulating film 45 is formed. Form.
  • the second inorganic insulating film 45 is photolithographically and patterned using a mask, and a plurality of openings are formed in the second inorganic insulating film 45 at a portion that overlaps with the central portion 21a of the plurality of first electrodes 21 in a plan view. Form 46.
  • the support portion S is formed by the second inorganic insulating film 45 at the peripheral end of the opening 46, that is, a part of the second inorganic insulating film 45.
  • the support portion S is formed by a part of the second inorganic insulating film 45, and in the display region D, in a portion other than the portion that overlaps with the first electrode 21 in a plan view.
  • a second inorganic insulating film 45 is also formed on the flattening film 19.
  • the first inorganic insulating film is composed of four layers in which the base coating film 11, the gate insulating film 13, the first interlayer insulating film 15 and the second interlayer insulating film 17 are laminated in this order. It may be composed of one layer of the film 11, or may be composed of two layers of the base coat film 11 and the gate insulating film 13, and may be composed of three layers of the base coat film 11, the gate insulating film 13 and the first interlayer insulating film 15. It may be composed of.
  • an organic EL layer having a five-layer laminated structure of a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer has been exemplified. It may have a three-layer laminated structure of a layer / hole transport layer, a light emitting layer, and an electron transport layer / electron injection layer.
  • an organic EL display device in which the first electrode is used as an anode and the second electrode is used as a cathode is illustrated, but in the present invention, the laminated structure of the organic EL layer is inverted and the first electrode is used as a cathode. It can also be applied to an organic EL display device using the second electrode as an anode.
  • an organic EL display device in which the electrode of the TFT connected to the first electrode is used as the drain electrode is illustrated, but in the present invention, the electrode of the TFT connected to the first electrode is used as the source electrode. It can also be applied to an organic EL display device to be called.
  • the organic EL display device has been described as an example of the display device, but the present invention is not limited to the organic EL display device, and any flexible display device can be applied.
  • it can be applied to a flexible display device provided with a QLED (Quantum-dot light emission diode) or the like, which is a light emitting element using a quantum dot-containing layer.
  • QLED Quantum-dot light emission diode
  • the present invention is useful for flexible display devices.

Abstract

In the present invention, a TFT layer (20) comprising a planarized film (19) is provided on a resin substrate layer (10); an organic EL element layer (30) is provided on the TFT layer (20), the organic EL element layer having layered therein, in this order, a first electrode (21), an edge cover (22), an organic EL layer (23), and a second electrode (24); an opening (42) is formed in the edge cover (22), at a position corresponding to the position of the first electrode (21); a support part (S) is provided in a layer below the first electrode (21), along a peripheral edge (21b) of the first electrode (21); and at least a portion of an upper surface (Sa) of the support part (S) is at a higher position than an upper surface (19a) of the planarized film (19) that overlaps in a plan view with the opening (42) in the edge cover (22).

Description

表示装置Display device
 本発明は、表示装置に関するものである。 The present invention relates to a display device.
 近年、液晶表示装置に代わる表示装置として、有機エレクトロルミネッセンス(electroluminescence、以下「EL」とも称する)素子を用いた自発光型の有機EL表示装置が注目されている。この有機EL表示装置は、例えば、可撓性を有する樹脂基板と、樹脂基板上に半導体層、無機絶縁膜、配線層及び平坦化膜が順に積層された薄膜トランジスタ(thin film transistor、以下「TFT」とも称する)層と、表示領域を構成する複数の有機EL素子が配列された有機EL素子層とを備えている。 In recent years, as a display device that replaces a liquid crystal display device, a self-luminous organic EL display device that uses an organic electroluminescence (hereinafter, also referred to as “EL”) element has attracted attention. This organic EL display device is, for example, a thin film transistor in which a flexible resin substrate and a semiconductor layer, an inorganic insulating film, a wiring layer, and a flattening film are sequentially laminated on the resin substrate (hereinafter referred to as “TFT””. It includes a layer (also referred to as) and an organic EL element layer in which a plurality of organic EL elements constituting a display region are arranged.
 例えば、特許文献1には、有機EL素子層として、複数の第1電極、有機EL層、エッジカバーが形成され、これらを覆うように第2電極が形成されている有機EL表示装置が開示されている。 For example, Patent Document 1 discloses an organic EL display device in which a plurality of first electrodes, an organic EL layer, and an edge cover are formed as an organic EL element layer, and a second electrode is formed so as to cover these. ing.
特開2011-014504号公報Japanese Unexamined Patent Publication No. 2011-014504
 ところで、有機EL表示装置では、有機EL素子層を形成する工程において、最後に、第1電極のエッジカバー(以下「バンク」とも称する)を表示領域全体に格子状に形成する。バンクを形成する方法としては、例えば、第1電極上にバンク材料を塗布し、パターニングした後に、バンクベークを行う。このバンクベーク時に、バンク材料が熱収縮することで、第1電極上のバンクホール(エッジカバーの開口、発光用開口部)が拡がり、バンクホールの周端部の少なくとも一部が第1電極を踏み外す場合がある。 By the way, in the organic EL display device, in the step of forming the organic EL element layer, finally, the edge cover (hereinafter, also referred to as “bank”) of the first electrode is formed in a grid pattern over the entire display region. As a method of forming a bank, for example, a bank material is applied on the first electrode, patterning is performed, and then bank baking is performed. During this bank baking, the bank material is thermally shrunk, so that the bank hole (opening of the edge cover, opening for light emission) on the first electrode expands, and at least a part of the peripheral end of the bank hole presses the first electrode. It may be missed.
 この場合、第1電極及びバンクの下層にあり、バンク材料と同様の材料で構成された平坦化膜(以下「下地平坦化膜」とも称する)は、金属層で構成された第1電極と比較して、バンク材料との接合性が高いため、バンク材料の収縮応力が下地平坦化膜にかかる。その結果、バンク材料の収縮速度が変化して、下地平坦化膜にクラックが生じるという不都合が生じる。また、エッジカバーの機能が失われるという不都合も生じる。これら不都合の発生により、表示装置の信頼性が低下するおそれがある。 In this case, the flattening film (hereinafter, also referred to as “base flattening film”) which is under the first electrode and the bank and is made of the same material as the bank material is compared with the first electrode made of the metal layer. As a result, the bondability with the bank material is high, so that the shrinkage stress of the bank material is applied to the substrate flattening film. As a result, the shrinkage rate of the bank material changes, causing the inconvenience of cracking the base flattening film. In addition, there is an inconvenience that the function of the edge cover is lost. Due to the occurrence of these inconveniences, the reliability of the display device may decrease.
 本発明は、かかる点に鑑みてなされたものであり、その目的とするところは、表示領域におけるエッジカバーの下層にある平坦化膜のクラックの発生を抑制することにある。 The present invention has been made in view of this point, and an object of the present invention is to suppress the occurrence of cracks in the flattening film under the edge cover in the display area.
 上記目的を達成するために、本発明に係る表示装置は、樹脂基板層と、上記樹脂基板層上に設けられ、半導体層、少なくとも1層の第1無機絶縁膜、配線層及び平坦化膜が順に積層された薄膜トランジスタ層と、上記薄膜トランジスタ層上に設けられ、表示領域を構成する複数のサブ画素に対応して、複数の第1電極、共通のエッジカバー、複数の機能層及び共通の第2電極が順に積層された発光素子層とを備えた表示装置であって、上記エッジカバーには、上記複数の第1電極の位置に対応して、複数の開口が形成され、上記各第1電極の下層には、該第1電極の周端部に沿って支持部が設けられ、上記支持部の上面の少なくとも一部は、上記エッジカバーの開口と平面視で重畳する平坦化膜の上面よりも高い位置にあることを特徴とする。 In order to achieve the above object, the display device according to the present invention includes a resin substrate layer, a semiconductor layer, at least one first inorganic insulating film, a wiring layer, and a flattening film provided on the resin substrate layer. A plurality of first electrodes, a common edge cover, a plurality of functional layers, and a common second electrode corresponding to a plurality of thin film transistor layers stacked in order and a plurality of sub-pixels provided on the thin film transistor layer and constituting a display area. A display device including a light emitting element layer in which electrodes are sequentially laminated, and a plurality of openings are formed in the edge cover corresponding to the positions of the plurality of first electrodes, and each of the first electrodes is formed. A support portion is provided in the lower layer along the peripheral end portion of the first electrode, and at least a part of the upper surface of the support portion is from the upper surface of the flattening film that overlaps with the opening of the edge cover in a plan view. Is also characterized by being in a high position.
 本発明によれば、各第1電極の下層には、第1電極の周端部に沿って支持部が設けられ、支持部の上面の少なくとも一部は、エッジカバーの開口と平面視で重畳する平坦化膜の上面よりも高い位置にあるため、表示領域におけるエッジカバーの下層にある平坦化膜のクラックの発生を抑制できる。 According to the present invention, a support portion is provided in the lower layer of each first electrode along the peripheral end portion of the first electrode, and at least a part of the upper surface of the support portion is superimposed on the opening of the edge cover in a plan view. Since it is located higher than the upper surface of the flattening film, it is possible to suppress the occurrence of cracks in the flattening film under the edge cover in the display area.
図1は、本発明の第1の実施形態に係る有機EL表示装置の概略構成を示す平面図である。FIG. 1 is a plan view showing a schematic configuration of an organic EL display device according to a first embodiment of the present invention. 図2は、本発明の第1の実施形態に係る有機EL表示装置の表示領域の平面図である。FIG. 2 is a plan view of a display area of the organic EL display device according to the first embodiment of the present invention. 図3は、本発明の第1の実施形態に係る有機EL表示装置の表示領域の断面図である。FIG. 3 is a cross-sectional view of a display area of the organic EL display device according to the first embodiment of the present invention. 図4は、本発明の第1の実施形態に係る有機EL表示装置を構成するTFT層の等価回路図である。FIG. 4 is an equivalent circuit diagram of a TFT layer constituting the organic EL display device according to the first embodiment of the present invention. 図5は、本発明の第1の実施形態に係る有機EL表示装置を構成する有機EL層の断面図である。FIG. 5 is a cross-sectional view of an organic EL layer constituting the organic EL display device according to the first embodiment of the present invention. 図6は、本発明の第1の実施形態に係る有機EL表示装置の表示領域の拡大平面図である。FIG. 6 is an enlarged plan view of a display area of the organic EL display device according to the first embodiment of the present invention. 図7は、本発明の第1の実施形態に係る有機EL表示装置の表示領域の変形例を示す断面図であり、図3に相当する図である。FIG. 7 is a cross-sectional view showing a modified example of the display area of the organic EL display device according to the first embodiment of the present invention, and is a view corresponding to FIG. 図8は、本発明の第2の実施形態に係る有機EL表示装置の表示領域の断面図であり、図3に相当する図である。FIG. 8 is a cross-sectional view of a display area of the organic EL display device according to the second embodiment of the present invention, and is a view corresponding to FIG. 図9は、本発明の第2の実施形態に係る有機EL表示装置の表示領域の拡大平面図であり、図6に相当する図である。FIG. 9 is an enlarged plan view of a display area of the organic EL display device according to the second embodiment of the present invention, and is a view corresponding to FIG. 図10は、本発明の第2の実施形態に係る有機EL表示装置の表示領域の変形例を示す断面図であり、図3に相当する図である。FIG. 10 is a cross-sectional view showing a modified example of the display area of the organic EL display device according to the second embodiment of the present invention, and is a view corresponding to FIG.
 以下、本発明の実施形態を図面に基づいて詳細に説明する。なお、本発明は、以下の各実施形態に限定されるものではない。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following embodiments.
 《第1の実施形態》
 図1~図7は、本発明に係る表示装置の第1の実施形態を示している。なお、以下の各実施形態では、発光素子を備えた表示装置として、有機EL素子を備えた有機EL表示装置を例示する。ここで、図1は、本実施形態の有機EL表示装置50aの概略構成を示す平面図である。また、図2は、有機EL表示装置50aの表示領域Dの平面図である。また、図3は、有機EL表示装置50aの表示領域Dの断面図である。また、図4は、有機EL表示装置50aを構成するTFT層20の等価回路図である。また、図5は、有機EL表示装置50aを構成する有機EL層23の断面図である。また、図6は、有機EL表示装置50aの表示領域Dの拡大平面図である。なお、図6の拡大平面図では、図3に示すエッジカバー22、有機EL層23、第2電極24及び封止層35が省略されている。また、図7は、有機EL表示装置50aの変形例を示す断面図であり、図3に相当する図である。
<< First Embodiment >>
1 to 7 show a first embodiment of the display device according to the present invention. In each of the following embodiments, an organic EL display device provided with an organic EL element will be exemplified as a display device provided with a light emitting element. Here, FIG. 1 is a plan view showing a schematic configuration of the organic EL display device 50a of the present embodiment. Further, FIG. 2 is a plan view of the display area D of the organic EL display device 50a. Further, FIG. 3 is a cross-sectional view of the display area D of the organic EL display device 50a. Further, FIG. 4 is an equivalent circuit diagram of the TFT layer 20 constituting the organic EL display device 50a. Further, FIG. 5 is a cross-sectional view of the organic EL layer 23 constituting the organic EL display device 50a. Further, FIG. 6 is an enlarged plan view of the display area D of the organic EL display device 50a. In the enlarged plan view of FIG. 6, the edge cover 22, the organic EL layer 23, the second electrode 24, and the sealing layer 35 shown in FIG. 3 are omitted. Further, FIG. 7 is a cross-sectional view showing a modified example of the organic EL display device 50a, and is a view corresponding to FIG.
 有機EL表示装置50aは、図1に示すように、例えば、矩形状に設けられた画像表示を行う表示領域Dと、表示領域Dの周囲に矩形枠状に設けられた額縁領域Fとを備えている。なお、本実施形態では、矩形状の表示領域Dを例示したが、この矩形状には、例えば、辺が円弧状になった形状、角部が円弧状になった形状、辺の一部に切り欠きがある形状等の略矩形状も含まれている。 As shown in FIG. 1, the organic EL display device 50a includes, for example, a rectangular display area D for displaying an image and a frame area F provided around the display area D in a rectangular frame shape. ing. In the present embodiment, the rectangular display area D is illustrated, but the rectangular shape includes, for example, a shape in which the sides are arcuate, a shape in which the corners are arcuate, and a part of the sides. A substantially rectangular shape such as a shape with a notch is also included.
 表示領域Dには、図2に示すように、複数のサブ画素Pがマトリクス状に配列されている。また、表示領域Dでは、図2に示すように、例えば、赤色の表示を行うための赤色発光領域Lrを有するサブ画素P、緑色の表示を行うための緑色発光領域Lgを有するサブ画素P、及び青色の表示を行うための青色発光領域Lbを有するサブ画素Pが互いに隣り合うように設けられている。なお、表示領域Dでは、例えば、赤色発光領域Lr、緑色発光領域Lg及び青色発光領域Lbを有する隣り合う3つのサブ画素Pにより、1つの画素が構成されている。 As shown in FIG. 2, a plurality of sub-pixels P are arranged in a matrix in the display area D. Further, in the display area D, as shown in FIG. 2, for example, a sub-pixel P having a red light emitting region Lr for displaying red, and a sub pixel P having a green light emitting region Lg for displaying green, And sub-pixels P having a blue light emitting region Lb for displaying blue are provided so as to be adjacent to each other. In the display area D, for example, one pixel is composed of three adjacent sub-pixels P having a red light emitting region Lr, a green light emitting region Lg, and a blue light emitting region Lb.
 額縁領域Fの図1中左端部には、端子部Tが一方向(図中縦方向)に延びるように設けられている。また、額縁領域Fにおいて、図1に示すように、表示領域D及び端子部Tの間には、図中縦方向を折り曲げの軸として、例えば、180°に(U字状に)折り曲げ可能な折り曲げ部Bが一方向(図中縦方向)に延びるように設けられている。 At the left end of the frame area F in FIG. 1, the terminal portion T is provided so as to extend in one direction (vertical direction in the figure). Further, in the frame area F, as shown in FIG. 1, between the display area D and the terminal portion T, the frame region F can be bent (in a U shape) at, for example, 180 ° with the vertical direction in the drawing as the bending axis. The bent portion B is provided so as to extend in one direction (vertical direction in the figure).
 有機EL表示装置50aは、図3に示すように、樹脂基板層10と、樹脂基板層10上に設けられたTFT層20と、TFT層20上に表示領域Dを構成する発光素子層として設けられた有機EL素子層30と、有機EL素子層30上に設けられた封止層35とを備えている。 As shown in FIG. 3, the organic EL display device 50a is provided as a resin substrate layer 10, a TFT layer 20 provided on the resin substrate layer 10, and a light emitting element layer forming a display region D on the TFT layer 20. The organic EL element layer 30 is provided, and the sealing layer 35 provided on the organic EL element layer 30 is provided.
 樹脂基板層10は、例えば、ポリイミド等により構成されている。 The resin substrate layer 10 is made of, for example, polyimide or the like.
 TFT層20は、図3に示すように、樹脂基板層10上に、半導体層12a,12b、少なくとも1層の第1無機絶縁膜(以下単に「第1無機絶縁膜」とも称する)として順に設けられたベースコート膜11、ゲート絶縁膜13、第1層間絶縁膜15及び第2層間絶縁膜17、後述する配線層、及び平坦化膜19が積層されている。具体的には、TFT層20は、図3に示すように、樹脂基板層10上に設けられたベースコート膜11と、ベースコート膜11上にサブ画素P毎に画素回路(図4参照)として設けられた第1TFT9a、第2TFT9b及びキャパシタ9cと、各第1TFT9a、各第2TFT9b及び各キャパシタ9c上に設けられたTFT用の平坦化膜19とを備えている。ここで、TFT層20には、複数のサブ画素Pに対応して、複数の画素回路がマトリクス状に配列されている。また、TFT層20には、図2及び図4に示すように、図中横方向に互いに平行に延びるように複数のゲート線14(配線層)が設けられている。また、TFT層20には、図2及び図4に示すように、図中縦方向に互いに平行に延びるように複数のソース線18f(配線層)が設けられている。また、TFT層20には、図2及び図4に示すように、図中縦方向に互いに平行に延びるように複数の電源線18g(配線層)が設けられている。なお、各電源線18gは、図3に示すように、各ソース線18fと隣り合うように設けられている。 As shown in FIG. 3, the TFT layer 20 is sequentially provided on the resin substrate layer 10 as semiconductor layers 12a and 12b and at least one first inorganic insulating film (hereinafter, also simply referred to as “first inorganic insulating film”). The base coat film 11, the gate insulating film 13, the first interlayer insulating film 15, the second interlayer insulating film 17, the wiring layer described later, and the flattening film 19 are laminated. Specifically, as shown in FIG. 3, the TFT layer 20 is provided as a base coat film 11 provided on the resin substrate layer 10 and as a pixel circuit (see FIG. 4) for each sub-pixel P on the base coat film 11. The first TFT 9a, the second TFT 9b and the capacitor 9c are provided, and the flattening film 19 for the TFT provided on each of the first TFT 9a, each second TFT 9b and each capacitor 9c is provided. Here, in the TFT layer 20, a plurality of pixel circuits are arranged in a matrix corresponding to the plurality of sub-pixels P. Further, as shown in FIGS. 2 and 4, the TFT layer 20 is provided with a plurality of gate wires 14 (wiring layers) so as to extend in parallel with each other in the horizontal direction in the drawing. Further, as shown in FIGS. 2 and 4, the TFT layer 20 is provided with a plurality of source lines 18f (wiring layers) so as to extend in parallel with each other in the vertical direction in the drawing. Further, as shown in FIGS. 2 and 4, the TFT layer 20 is provided with a plurality of power supply lines 18 g (wiring layers) so as to extend in parallel with each other in the vertical direction in the drawing. As shown in FIG. 3, each power supply line 18g is provided so as to be adjacent to each source line 18f.
 第1無機絶縁膜を構成するベースコート膜11、ゲート絶縁膜13、第1層間絶縁膜15及び第2層間絶縁膜17は、例えば、窒化シリコン、酸化シリコン、酸窒化シリコン等の無機絶縁膜の単層膜又は積層膜により構成されている。 The base coat film 11, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17 constituting the first inorganic insulating film are simply inorganic insulating films such as silicon nitride, silicon oxide, and silicon oxynitride. It is composed of a layered film or a laminated film.
 第1TFT9aは、図4に示すように、各サブ画素Pにおいて、対応するゲート線14及びソース線18fに電気的に接続されている。また、第1TFT9aは、図3に示すように、ベースコート膜11上に順に設けられた半導体層12a、ゲート絶縁膜13、ゲート電極14a(配線層)、第1層間絶縁膜15、第2層間絶縁膜17、並びにソース電極18a及びドレイン電極18b(配線層)を備えている。ここで、半導体層12aは、例えば、低温ポリシリコン膜やIn-Ga-Zn-O系の酸化物半導体膜等により、図3に示すように、ベースコート膜11上に島状に設けられ、チャネル領域、ソース領域及びドレイン領域を有している。また、ゲート絶縁膜13は、図3に示すように、半導体層12aを覆うように設けられている。また、ゲート電極14aは、図3に示すように、ゲート絶縁膜13上に半導体層12aのチャネル領域と重なるように設けられている。また、第1層間絶縁膜15及び第2層間絶縁膜17は、図3に示すように、ゲート電極14aを覆うように順に設けられている。また、ソース電極18a及びドレイン電極18bは、図3に示すように、第2層間絶縁膜17上に互いに離間するように設けられている。また、ソース電極18a及びドレイン電極18bは、図3に示すように、ゲート絶縁膜13、第1層間絶縁膜15及び第2層間絶縁膜17の積層膜に形成された各コンタクトホールを介して、半導体層12aのソース領域及びドレイン領域にそれぞれ電気的に接続されている。 As shown in FIG. 4, the first TFT 9a is electrically connected to the corresponding gate line 14 and source line 18f in each sub-pixel P. Further, as shown in FIG. 3, the first TFT 9a includes a semiconductor layer 12a, a gate insulating film 13, a gate electrode 14a (wiring layer), a first interlayer insulating film 15, and a second interlayer insulating, which are sequentially provided on the base coat film 11. A film 17 and a source electrode 18a and a drain electrode 18b (wiring layer) are provided. Here, the semiconductor layer 12a is provided in an island shape on the base coat film 11 by, for example, a low-temperature polysilicon film, an In—Ga—Zn—O-based oxide semiconductor film, or the like, as shown in FIG. It has a region, a source region and a drain region. Further, as shown in FIG. 3, the gate insulating film 13 is provided so as to cover the semiconductor layer 12a. Further, as shown in FIG. 3, the gate electrode 14a is provided on the gate insulating film 13 so as to overlap the channel region of the semiconductor layer 12a. Further, the first interlayer insulating film 15 and the second interlayer insulating film 17 are provided in order so as to cover the gate electrode 14a as shown in FIG. Further, as shown in FIG. 3, the source electrode 18a and the drain electrode 18b are provided on the second interlayer insulating film 17 so as to be separated from each other. Further, as shown in FIG. 3, the source electrode 18a and the drain electrode 18b are provided through the contact holes formed in the laminated film of the gate insulating film 13, the first interlayer insulating film 15 and the second interlayer insulating film 17. It is electrically connected to the source region and the drain region of the semiconductor layer 12a, respectively.
 第2TFT9bは、図4に示すように、各サブ画素Pにおいて、対応する第1TFT9a及び電源線18gに電気的に接続されている。また、第2TFT9bは、図3に示すように、ベースコート膜11上に順に設けられた半導体層12b、ゲート絶縁膜13、ゲート電極14b(配線層)、第1層間絶縁膜15、第2層間絶縁膜17、並びにソース電極18c及びドレイン電極18d(配線層)を備えている。ここで、半導体層12bは、例えば、低温ポリシリコン膜やIn-Ga-Zn-O系の酸化物半導体膜等により、図3に示すように、ベースコート膜11上に島状に設けられ、チャネル領域、ソース領域及びドレイン領域を有している。また、ゲート絶縁膜13は、図3に示すように、半導体層12bを覆うように設けられている。また、ゲート電極14bは、図3に示すように、ゲート絶縁膜13上に半導体層12bのチャネル領域と重なるように設けられている。また、第1層間絶縁膜15及び第2層間絶縁膜17は、図3に示すように、ゲート電極14bを覆うように順に設けられている。また、ソース電極18c及びドレイン電極18dは、図3に示すように、第2層間絶縁膜17上に互いに離間するように設けられている。また、ソース電極18c及びドレイン電極18dは、図3に示すように、ゲート絶縁膜13、第1層間絶縁膜15及び第2層間絶縁膜17の積層膜に形成された各コンタクトホールを介して、半導体層12bのソース領域及びドレイン領域にそれぞれ電気的に接続されている。 As shown in FIG. 4, the second TFT 9b is electrically connected to the corresponding first TFT 9a and the power supply line 18g in each sub-pixel P. Further, as shown in FIG. 3, the second TFT 9b includes a semiconductor layer 12b, a gate insulating film 13, a gate electrode 14b (wiring layer), a first interlayer insulating film 15, and a second interlayer insulating, which are sequentially provided on the base coat film 11. A film 17 and a source electrode 18c and a drain electrode 18d (wiring layer) are provided. Here, the semiconductor layer 12b is provided in an island shape on the base coat film 11 by, for example, a low-temperature polysilicon film, an In—Ga—Zn—O-based oxide semiconductor film, or the like, as shown in FIG. It has a region, a source region and a drain region. Further, as shown in FIG. 3, the gate insulating film 13 is provided so as to cover the semiconductor layer 12b. Further, as shown in FIG. 3, the gate electrode 14b is provided on the gate insulating film 13 so as to overlap the channel region of the semiconductor layer 12b. Further, the first interlayer insulating film 15 and the second interlayer insulating film 17 are provided in order so as to cover the gate electrode 14b as shown in FIG. Further, as shown in FIG. 3, the source electrode 18c and the drain electrode 18d are provided on the second interlayer insulating film 17 so as to be separated from each other. Further, as shown in FIG. 3, the source electrode 18c and the drain electrode 18d pass through the contact holes formed in the laminated film of the gate insulating film 13, the first interlayer insulating film 15 and the second interlayer insulating film 17. It is electrically connected to the source region and the drain region of the semiconductor layer 12b, respectively.
 なお、本実施形態では、トップゲート型の第1TFT9a及び第2TFT9bを例示したが、第1TFT9a及び第2TFT9bは、ボトムゲート型のTFTであってもよい。 In the present embodiment, the top gate type first TFT 9a and the second TFT 9b are illustrated, but the first TFT 9a and the second TFT 9b may be a bottom gate type TFT.
 キャパシタ9cは、図4に示すように、各サブ画素Pにおいて、対応する第1TFT9a及び電源線18gに電気的に接続されている。ここで、キャパシタ9cは、図3に示すように、ゲート電極14a及び14bと同一材料により同一層に形成された下部導電層14c(配線層)と、下部導電層14cを覆うように設けられた第1層間絶縁膜15と、第1層間絶縁膜15上に下部導電層14cと重なるように設けられた上部導電層16(配線層)とを備えている。なお、上部導電層16は、図3に示すように、第2層間絶縁膜17に形成されたコンタクトホールを介して電源線18gに電気的に接続されている。 As shown in FIG. 4, the capacitor 9c is electrically connected to the corresponding first TFT 9a and the power supply line 18g in each sub-pixel P. Here, as shown in FIG. 3, the capacitor 9c is provided so as to cover the lower conductive layer 14c (wiring layer) formed in the same layer as the gate electrodes 14a and 14b and the lower conductive layer 14c. A first interlayer insulating film 15 and an upper conductive layer 16 (wiring layer) provided on the first interlayer insulating film 15 so as to overlap the lower conductive layer 14c are provided. As shown in FIG. 3, the upper conductive layer 16 is electrically connected to the power supply line 18g via a contact hole formed in the second interlayer insulating film 17.
 上述の各配線層は、例えば、モリブデン(Mo)、チタン(Ti)、アルミニウム(Al)、銅(Cu)、タングステン(W)等の金属単層膜、又はMo(上層)/Al(中層)/Mo(下層)、Ti/Al/Ti、Al(上層)/Ti(下層)、Cu/Mo、Cu/Ti等の金属積層膜により形成されている。 Each of the above-mentioned wiring layers is, for example, a metal single layer film such as molybdenum (Mo), titanium (Ti), aluminum (Al), copper (Cu), tungsten (W), or Mo (upper layer) / Al (middle layer). It is formed of a metal laminated film such as / Mo (lower layer), Ti / Al / Ti, Al (upper layer) / Ti (lower layer), Cu / Mo, and Cu / Ti.
 平坦化膜19は、表示領域Dにおいて平坦な表面を有する。この平坦化膜19は、例えば、ポリイミド系樹脂やアクリル樹脂等の有機樹脂材料により構成されている。また、平坦化膜19は、ポリイミド系樹脂、アクリル樹脂、ポリシロキサン系樹脂、ノボラック樹脂等のポジ型の感光性樹脂からなる樹脂層により構成されていてもよい。 The flattening film 19 has a flat surface in the display area D. The flattening film 19 is made of, for example, an organic resin material such as a polyimide resin or an acrylic resin. Further, the flattening film 19 may be composed of a resin layer made of a positive photosensitive resin such as a polyimide resin, an acrylic resin, a polysiloxane resin, or a novolak resin.
 有機EL素子層30は、図3に示すように、表示領域Dにおいて、複数の画素回路に対応して、平坦化膜19上にマトリクス状に配列するように複数の有機EL素子25を備えている。より具体的には、有機EL素子層30は、マトリクス状に配列された複数の有機EL素子25により構成され、図3に示すように、TFT層20上に順に設けられた複数の第1電極21、エッジカバー22、複数の機能層として設けられた複数の有機EL層23、及び第2電極24を備えている。 As shown in FIG. 3, the organic EL element layer 30 includes a plurality of organic EL elements 25 so as to be arranged in a matrix on the flattening film 19 corresponding to the plurality of pixel circuits in the display area D. There is. More specifically, the organic EL element layer 30 is composed of a plurality of organic EL elements 25 arranged in a matrix, and as shown in FIG. 3, a plurality of first electrodes sequentially provided on the TFT layer 20. It includes 21, an edge cover 22, a plurality of organic EL layers 23 provided as a plurality of functional layers, and a second electrode 24.
 複数の第1電極21は、図3に示すように、複数のサブ画素Pに対応するように、平坦化膜19上にマトリクス状に設けられている。ここで、第1電極21は、図3に示すように、平坦化膜19に形成されたコンタクトホールを介して、各第2TFT9bのドレイン電極18d(又はソース電極18c)に電気的に接続されている。また、第1電極21は、有機EL層23にホール(正孔)を注入する機能を有している。また、第1電極21は、有機EL層23への正孔注入効率を向上させるために、仕事関数の大きな材料で形成するのがより好ましい。第1電極21を構成する材料としては、例えば、銀(Ag)、アルミニウム(Al)、バナジウム(V)、コバルト(Co)、ニッケル(Ni)、タングステン(W)、金(Au)、チタン(Ti)、ルテニウム(Ru)、マンガン(Mn)、インジウム(In)、イッテルビウム(Yb)、フッ化リチウム(LiF)、白金(Pt)、パラジウム(Pd)、モリブデン(Mo)、イリジウム(Ir)、スズ(Sn)等の金属材料が挙げられる。また、第1電極21を構成する材料は、例えば、アスタチン(At)/酸化アスタチン(AtO)等の合金であっても構わない。さらに、第1電極21を構成する材料は、例えば、酸化スズ(SnO)、酸化亜鉛(ZnO)、インジウムスズ酸化物(ITO)、インジウム亜鉛酸化物(IZO)のような導電性酸化物等であってもよい。なお、仕事関数の大きな化合物材料としては、例えば、インジウムスズ酸化物(ITO)やインジウム亜鉛酸化物(IZO)等が挙げられる。また、第1電極21は、上記材料からなる層を複数積層して形成されていてもよい。ここで、本実施形態では、図3に示すように、第1電極21は、インジウムスズ酸化物(ITO)からなる層、反射電極として銀(Ag)からなる層、及びインジウムスズ酸化物(ITO)からなる層を積層して形成されている。換言すると、第1電極21は、2層のインジウムスズ酸化物(ITO)からなる層間に銀(Ag)からなる層が介在された積層構造を有する。なお、本明細書において、反射電極とは、例えば、ゲート電極14a等の金属層よりも高い光反射率を有する電極をいう。 As shown in FIG. 3, the plurality of first electrodes 21 are provided in a matrix on the flattening film 19 so as to correspond to the plurality of sub-pixels P. Here, as shown in FIG. 3, the first electrode 21 is electrically connected to the drain electrode 18d (or source electrode 18c) of each second TFT 9b via a contact hole formed in the flattening film 19. There is. Further, the first electrode 21 has a function of injecting holes into the organic EL layer 23. Further, the first electrode 21 is more preferably formed of a material having a large work function in order to improve the hole injection efficiency into the organic EL layer 23. Examples of the material constituting the first electrode 21 include silver (Ag), aluminum (Al), vanadium (V), cobalt (Co), nickel (Ni), tungsten (W), gold (Au), and titanium ( Ti), ruthenium (Ru), manganese (Mn), indium (In), itterbium (Yb), lithium fluoride (LiF), platinum (Pt), palladium (Pd), molybdenum (Mo), iridium (Ir), Examples include metal materials such as tin (Sn). Further, the material constituting the first electrode 21 may be, for example, an alloy such as astatine (At) / oxidized astatine (AtO 2). Further, the material constituting the first electrode 21 is, for example, a conductive oxide such as tin oxide (SnO), zinc oxide (ZnO), indium tin oxide (ITO), and indium zinc oxide (IZO). There may be. Examples of the compound material having a large work function include indium tin oxide (ITO) and indium zinc oxide (IZO). Further, the first electrode 21 may be formed by laminating a plurality of layers made of the above materials. Here, in the present embodiment, as shown in FIG. 3, the first electrode 21 has a layer made of indium tin oxide (ITO), a layer made of silver (Ag) as a reflective electrode, and indium tin oxide (ITO). ) Are laminated and formed. In other words, the first electrode 21 has a laminated structure in which a layer made of silver (Ag) is interposed between two layers of indium tin oxide (ITO). In the present specification, the reflective electrode means an electrode having a higher light reflectance than a metal layer such as a gate electrode 14a, for example.
 エッジカバー22は、図3に示すように、複数のサブ画素Pに共通するように、各第1電極21の周端部21bを覆うように格子状に設けられている。より具体的には、図3及び図6に示すように、エッジカバー22には、複数の第1電極21の位置に対応して、複数の開口42が形成されている。開口42は、上述のとおり、第1電極21上に形成されたバンクホール(発光用開口部)である。開口42の形状は、特に限定されず、例えば、矩形状(辺が円弧状になった形状、角部が円弧状になった形状等の略矩形状も含む。)、円形状、楕円形状等が挙げられる。なお、エッジカバー22を構成する材料(バンク材料)としては、例えば、ポリイミド系樹脂、アクリル樹脂、ポリシロキサン系樹脂、ノボラック樹脂等のポジ型の感光性樹脂(平坦化膜19を構成する材料と同様の有機樹脂材料)が挙げられる。 As shown in FIG. 3, the edge cover 22 is provided in a grid pattern so as to cover the peripheral end portion 21b of each first electrode 21 so as to be common to the plurality of sub-pixels P. More specifically, as shown in FIGS. 3 and 6, a plurality of openings 42 are formed in the edge cover 22 corresponding to the positions of the plurality of first electrodes 21. As described above, the opening 42 is a bank hole (light emitting opening) formed on the first electrode 21. The shape of the opening 42 is not particularly limited, and is, for example, a rectangular shape (including a substantially rectangular shape such as a shape having arcuate sides and an arcuate corner), a circular shape, an elliptical shape, and the like. Can be mentioned. The material (bank material) constituting the edge cover 22 includes, for example, a positive photosensitive resin (material constituting the flattening film 19) such as a polyimide resin, an acrylic resin, a polysiloxane resin, and a novolak resin. Similar organic resin materials).
 複数の有機EL層23は、図3に示すように、各第1電極21上に配置され、複数のサブ画素Pに対応するように、マトリクス状に設けられている。ここで、有機EL層23は、図5に示すように、第1電極21上に順に設けられた正孔注入層1、正孔輸送層2、発光層3、電子輸送層4及び電子注入層5を備えている。 As shown in FIG. 3, the plurality of organic EL layers 23 are arranged on each of the first electrodes 21 and are provided in a matrix so as to correspond to the plurality of sub-pixels P. Here, as shown in FIG. 5, the organic EL layer 23 includes a hole injection layer 1, a hole transport layer 2, a light emitting layer 3, an electron transport layer 4, and an electron injection layer, which are sequentially provided on the first electrode 21. It has 5.
 正孔注入層1は、陽極バッファ層とも呼ばれ、第1電極21と有機EL層23とのエネルギーレベルを近づけ、第1電極21から有機EL層23への正孔注入効率を改善する機能を有している。ここで、正孔注入層1を構成する材料としては、例えば、トリアゾール誘導体、オキサジアゾール誘導体、イミダゾール誘導体、ポリアリールアルカン誘導体、ピラゾリン誘導体、フェニレンジアミン誘導体、オキサゾール誘導体、スチリルアントラセン誘導体、フルオレノン誘導体、ヒドラゾン誘導体、スチルベン誘導体等が挙げられる。 The hole injection layer 1 is also called an anode buffer layer, and has a function of bringing the energy levels of the first electrode 21 and the organic EL layer 23 closer to each other and improving the hole injection efficiency from the first electrode 21 to the organic EL layer 23. Have. Here, as the material constituting the hole injection layer 1, for example, a triazole derivative, an oxadiazole derivative, an imidazole derivative, a polyarylalkane derivative, a pyrazoline derivative, a phenylenediamine derivative, an oxazole derivative, a styrylanthracene derivative, a fluorenone derivative, etc. Examples include hydrazone derivatives and stillben derivatives.
 正孔輸送層2は、第1電極21から有機EL層23への正孔の輸送効率を向上させる機能を有している。ここで、正孔輸送層2を構成する材料としては、例えば、ポルフィリン誘導体、芳香族第三級アミン化合物、スチリルアミン誘導体、ポリビニルカルバゾール、ポリ-p-フェニレンビニレン、ポリシラン、トリアゾール誘導体、オキサジアゾール誘導体、イミダゾール誘導体、ポリアリールアルカン誘導体、ピラゾリン誘導体、ピラゾロン誘導体、フェニレンジアミン誘導体、アリールアミン誘導体、アミン置換カルコン誘導体、オキサゾール誘導体、スチリルアントラセン誘導体、フルオレノン誘導体、ヒドラゾン誘導体、スチルベン誘導体、水素化アモルファスシリコン、水素化アモルファス炭化シリコン、硫化亜鉛、セレン化亜鉛等が挙げられる。 The hole transport layer 2 has a function of improving the hole transport efficiency from the first electrode 21 to the organic EL layer 23. Here, examples of the material constituting the hole transport layer 2 include a porphyrin derivative, an aromatic tertiary amine compound, a styrylamine derivative, polyvinylcarbazole, a poly-p-phenylene vinylene, a polysilane, a triazole derivative, and an oxadiazole. Derivatives, imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, pyrazolone derivatives, phenylenediamine derivatives, arylamine derivatives, amine-substituted chalcone derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, stillben derivatives, hydride amorphous silicon, Examples thereof include hydride amorphous silicon carbide, zinc sulfide, and zinc selenium.
 発光層3は、第1電極21及び第2電極24による電圧印加の際に、第1電極21及び第2電極24から正孔及び電子がそれぞれ注入されると共に、正孔及び電子が再結合する領域である。ここで、発光層3は、発光効率が高い材料により形成されている。そして、発光層3を構成する材料としては、例えば、金属オキシノイド化合物[8-ヒドロキシキノリン金属錯体]、ナフタレン誘導体、アントラセン誘導体、ジフェニルエチレン誘導体、ビニルアセトン誘導体、トリフェニルアミン誘導体、ブタジエン誘導体、クマリン誘導体、ベンズオキサゾール誘導体、オキサジアゾール誘導体、オキサゾール誘導体、ベンズイミダゾール誘導体、チアジアゾール誘導体、ベンズチアゾール誘導体、スチリル誘導体、スチリルアミン誘導体、ビススチリルベンゼン誘導体、トリススチリルベンゼン誘導体、ペリレン誘導体、ペリノン誘導体、アミノピレン誘導体、ピリジン誘導体、ローダミン誘導体、アクイジン誘導体、フェノキサゾン、キナクリドン誘導体、ルブレン、ポリ-p-フェニレンビニレン、ポリシラン等が挙げられる。 In the light emitting layer 3, when a voltage is applied by the first electrode 21 and the second electrode 24, holes and electrons are injected from the first electrode 21 and the second electrode 24, respectively, and the holes and electrons are recombined. The area. Here, the light emitting layer 3 is formed of a material having high luminous efficiency. Examples of the material constituting the light emitting layer 3 include a metal oxinoid compound [8-hydroxyquinolin metal complex], a naphthalene derivative, an anthracene derivative, a diphenylethylene derivative, a vinylacetone derivative, a triphenylamine derivative, a butadiene derivative, and a coumarin derivative. , Benzoxazole derivative, oxadiazole derivative, oxazole derivative, benzimidazole derivative, thiadiazole derivative, benzthiazole derivative, styryl derivative, styrylamine derivative, bisstyrylbenzene derivative, tristylylbenzene derivative, perylene derivative, perinone derivative, aminopyrene derivative, Examples thereof include pyridine derivatives, rhodamine derivatives, aquidin derivatives, phenoxazone, quinacridone derivatives, rubrene, poly-p-phenylene vinylene, and polysilane.
 電子輸送層4は、電子を発光層3まで効率良く移動させる機能を有している。ここで、電子輸送層4を構成する材料としては、例えば、有機化合物として、オキサジアゾール誘導体、トリアゾール誘導体、ベンゾキノン誘導体、ナフトキノン誘導体、アントラキノン誘導体、テトラシアノアントラキノジメタン誘導体、ジフェノキノン誘導体、フルオレノン誘導体、シロール誘導体、金属オキシノイド化合物等が挙げられる。 The electron transport layer 4 has a function of efficiently moving electrons to the light emitting layer 3. Here, as the material constituting the electron transport layer 4, for example, as an organic compound, an oxadiazole derivative, a triazole derivative, a benzoquinone derivative, a naphthoquinone derivative, an anthraquinone derivative, a tetracyanoanthracinodimethane derivative, a diphenoquinone derivative, and a fluorenone derivative , Cyrol derivatives, metal oxinoid compounds and the like.
 電子注入層5は、第2電極24と有機EL層23とのエネルギーレベルを近づけ、第2電極24から有機EL層23へ電子が注入される効率を向上させる機能を有し、この機能により、有機EL素子25の駆動電圧を下げることができる。なお、電子注入層5は、陰極バッファ層とも呼ばれる。ここで、電子注入層5を構成する材料としては、例えば、フッ化リチウム(LiF)、フッ化マグネシウム(MgF)、フッ化カルシウム(CaF)、フッ化ストロンチウム(SrF)、フッ化バリウム(BaF)のような無機アルカリ化合物、酸化アルミニウム(Al)、酸化ストロンチウム(SrO)等が挙げられる。 The electron injection layer 5 has a function of bringing the energy levels of the second electrode 24 and the organic EL layer 23 closer to each other and improving the efficiency of injecting electrons from the second electrode 24 into the organic EL layer 23. The drive voltage of the organic EL element 25 can be lowered. The electron injection layer 5 is also called a cathode buffer layer. Here, examples of the material constituting the electron injection layer 5 include lithium fluoride (LiF), magnesium fluoride (MgF 2 ), calcium fluoride (CaF 2 ), strontium fluoride (SrF 2 ), and barium fluoride. Inorganic alkaline compounds such as (BaF 2 ), aluminum oxide (Al 2 O 3 ), strontium oxide (SrO) and the like can be mentioned.
 第2電極24は、図3に示すように、各サブ画素Pの有機EL層23、及び全サブ画素Pに共通するエッジカバー22を覆うように設けられている。また、第2電極24は、有機EL層23に電子を注入する機能を有している。また、第2電極24は、有機EL層23への電子注入効率を向上させるために、仕事関数の小さな材料で構成するのがより好ましい。ここで、第2電極24を構成する材料としては、例えば、銀(Ag)、アルミニウム(Al)、バナジウム(V)、コバルト(Co)、ニッケル(Ni)、タングステン(W)、金(Au)、カルシウム(Ca)、チタン(Ti)、イットリウム(Y)、ナトリウム(Na)、ルテニウム(Ru)、マンガン(Mn)、インジウム(In)、マグネシウム(Mg)、リチウム(Li)、イッテルビウム(Yb)、フッ化リチウム(LiF)等が挙げられる。また、第2電極24は、例えば、マグネシウム(Mg)/銅(Cu)、マグネシウム(Mg)/銀(Ag)、ナトリウム(Na)/カリウム(K)、アスタチン(At)/酸化アスタチン(AtO)、リチウム(Li)/アルミニウム(Al)、リチウム(Li)/カルシウム(Ca)/アルミニウム(Al)、フッ化リチウム(LiF)/カルシウム(Ca)/アルミニウム(Al)等の合金により形成されていてもよい。また、第2電極24は、例えば、酸化スズ(SnO)、酸化亜鉛(ZnO)、インジウムスズ酸化物(ITO)、インジウム亜鉛酸化物(IZO)等の導電性酸化物により形成されていてもよい。また、第2電極24は、上記材料からなる層を複数積層して形成されていてもよい。なお、仕事関数が小さい材料としては、例えば、マグネシウム(Mg)、リチウム(Li)、フッ化リチウム(LiF)、マグネシウム(Mg)/銅(Cu)、マグネシウム(Mg)/銀(Ag)、ナトリウム(Na)/カリウム(K)、リチウム(Li)/アルミニウム(Al)、リチウム(Li)/カルシウム(Ca)/アルミニウム(Al)、フッ化リチウム(LiF)/カルシウム(Ca)/アルミニウム(Al)等が挙げられる。 As shown in FIG. 3, the second electrode 24 is provided so as to cover the organic EL layer 23 of each sub-pixel P and the edge cover 22 common to all sub-pixels P. Further, the second electrode 24 has a function of injecting electrons into the organic EL layer 23. Further, the second electrode 24 is more preferably made of a material having a small work function in order to improve the electron injection efficiency into the organic EL layer 23. Here, examples of the material constituting the second electrode 24 include silver (Ag), aluminum (Al), vanadium (V), cobalt (Co), nickel (Ni), tungsten (W), and gold (Au). , Calcium (Ca), Titanium (Ti), Yttrium (Y), Sodium (Na), Luthenium (Ru), Manganese (Mn), Indium (In), Magnesium (Mg), Lithium (Li), Itterbium (Yb) , Lithium fluoride (LiF) and the like. Further, the second electrode 24 is, for example, magnesium (Mg) / copper (Cu), magnesium (Mg) / silver (Ag), sodium (Na) / potassium (K), asstatin (At) / oxidized asstatin (AtO 2). ), Lithium (Li) / Aluminum (Al), Lithium (Li) / Calcium (Ca) / Aluminum (Al), Lithium Fluoride (LiF) / Calcium (Ca) / Aluminum (Al), etc. You may. Further, the second electrode 24 may be formed of, for example, a conductive oxide such as tin oxide (SnO), zinc oxide (ZnO), indium tin oxide (ITO), and indium zinc oxide (IZO). .. Further, the second electrode 24 may be formed by laminating a plurality of layers made of the above materials. Examples of materials having a small work function include magnesium (Mg), lithium (Li), lithium fluoride (LiF), magnesium (Mg) / copper (Cu), magnesium (Mg) / silver (Ag), and sodium. (Na) / Potassium (K), Lithium (Li) / Aluminum (Al), Lithium (Li) / Calcium (Ca) / Aluminum (Al), Lithium Fluoride (LiF) / Calcium (Ca) / Aluminum (Al) And so on.
 封止層35は、図3に示すように、各有機EL素子25を覆うように有機EL素子層30上に設けられている。具体的に、封止層35は、図3に示すように、第2電極24を覆うように樹脂基板層10側に設けられた第1封止無機膜31と、第1封止無機膜31上に設けられた封止有機膜32と、封止有機膜32を覆うように設けられた第2封止無機膜33とを備えている。この封止層35は、有機EL層23を水分や酸素等から保護する機能を有している。ここで、第1封止無機膜31及び第2封止無機膜33は、例えば、酸化シリコン(SiO)や酸化アルミニウム(Al)、四窒化三ケイ素(Si)のような窒化シリコン(SiNx(xは正数))、炭窒化ケイ素(SiCN)等の無機材料により構成されている。また、封止有機膜32は、例えば、アクリル樹脂、ポリ尿素系樹脂、パリレン樹脂、ポリイミド系樹脂、ポリアミド系樹脂等の有機材料により構成されている。 As shown in FIG. 3, the sealing layer 35 is provided on the organic EL element layer 30 so as to cover each organic EL element 25. Specifically, as shown in FIG. 3, the sealing layer 35 includes a first sealing inorganic film 31 provided on the resin substrate layer 10 side so as to cover the second electrode 24, and a first sealing inorganic film 31. It includes a sealing organic film 32 provided above and a second sealing inorganic film 33 provided so as to cover the sealing organic film 32. The sealing layer 35 has a function of protecting the organic EL layer 23 from moisture, oxygen, and the like. Here, the first sealing inorganic film 31 and the second sealing inorganic film 33 are, for example, silicon oxide (SiO 2 ), aluminum oxide (Al 2 O 3 ), trisilicon tetroxide (Si 3 N 4 ), and the like. It is composed of an inorganic material such as silicon nitride (SiNx (x is a positive number)) and silicon nitride (SiCN). Further, the sealing organic film 32 is made of an organic material such as an acrylic resin, a polyurea resin, a parylene resin, a polyimide resin, or a polyamide resin.
 ここで、有機EL表示装置50aでは、図3及び図6に示すように、各第1電極21の下層(下面)に、第1電極21の周端部21bに沿って、支持部S(図3及び図6において、ドットを付した部分)が設けられている。この支持部Sは、周端部21bにおける第1電極21を支持するものである。支持部Sは、第1電極21の全周に設けられている。また、支持部Sの上面Saは第1電極21と接触している。 Here, in the organic EL display device 50a, as shown in FIGS. 3 and 6, a support portion S (FIG. 3) is formed on the lower layer (lower surface) of each first electrode 21 along the peripheral end portion 21b of the first electrode 21. 3 and FIG. 6 are provided with dots). The support portion S supports the first electrode 21 at the peripheral end portion 21b. The support portion S is provided on the entire circumference of the first electrode 21. Further, the upper surface Sa of the support portion S is in contact with the first electrode 21.
 また、有機EL表示装置50aでは、支持部Sは、平坦化膜19の一部で形成されている。ここで、平坦化膜19は樹脂層である。この樹脂層は感光性を有する。即ち、平坦化膜19及びその一部で形成された支持部Sは、感光性樹脂からなる樹脂層で構成されている。 Further, in the organic EL display device 50a, the support portion S is formed of a part of the flattening film 19. Here, the flattening film 19 is a resin layer. This resin layer is photosensitive. That is, the flattening film 19 and the support portion S formed of a part thereof are composed of a resin layer made of a photosensitive resin.
 また、有機EL表示装置50aでは、図3及び図6に示すように、平坦化膜19には、複数の第1電極21の位置に対応して、複数の凹部49が形成されている。凹部49の底面部49aは、第1電極21の中央部21a及びエッジカバー22の開口42と平面視で重畳している。換言すると、凹部49の底面部49aは、エッジカバー22の開口42と平面視で重畳する平坦化膜19の上面19aである。また、凹部49の周端部49bは、第1電極21の周端部21bと平面視で重畳している。ここで、凹部49の周端部49bは、支持部Sである(支持部Sを構成している)。 Further, in the organic EL display device 50a, as shown in FIGS. 3 and 6, a plurality of recesses 49 are formed in the flattening film 19 corresponding to the positions of the plurality of first electrodes 21. The bottom surface portion 49a of the recess 49 overlaps the central portion 21a of the first electrode 21 and the opening 42 of the edge cover 22 in a plan view. In other words, the bottom surface portion 49a of the recess 49 is the top surface 19a of the flattening film 19 that overlaps with the opening 42 of the edge cover 22 in a plan view. Further, the peripheral end portion 49b of the concave portion 49 overlaps with the peripheral end portion 21b of the first electrode 21 in a plan view. Here, the peripheral end portion 49b of the recess 49 is a support portion S (constituting the support portion S).
 また、有機EL表示装置50aでは、図3及び図6に示すように、平面視で、支持部S(支持部Sの外周端部Sb)は、第1電極21の周端部21bに囲まれている。換言すると、支持部Sの外周端部Sbは、第1電極21の周端部21bと面一又は周端部21bよりも内側に配置されている。エッジカバー22の開口42の周端部は、支持部S(支持部Sの内周端部Sd)に囲まれている。換言すると、エッジカバー22の開口42の周端部は、支持部Sの内周端部Sdよりも内側に配置されている。 Further, in the organic EL display device 50a, as shown in FIGS. 3 and 6, the support portion S (the outer peripheral end portion Sb of the support portion S) is surrounded by the peripheral end portion 21b of the first electrode 21 in a plan view. ing. In other words, the outer peripheral end portion Sb of the support portion S is arranged flush with the peripheral end portion 21b of the first electrode 21 or inside the peripheral end portion 21b. The peripheral end of the opening 42 of the edge cover 22 is surrounded by the support portion S (the inner peripheral end portion Sd of the support portion S). In other words, the peripheral end portion of the opening 42 of the edge cover 22 is arranged inside the inner peripheral end portion Sd of the support portion S.
 また、有機EL表示装置50aでは、図3に示すように、断面視で、支持部S(凹部49の周端部49b)の上面Saの少なくとも一部が、エッジカバー22の開口42と平面視で重畳する平坦化膜19の上面19a(凹部49の底面部49a)よりも高い位置になっている。換言すると、図3に示すように、周端部49bにおける平坦化膜19の厚みが、底面部49aにおける平坦化膜19の厚みよりも大きくなっている。さらに換言すると、断面視で、周端部49bの上面(支持部Sの上面Sa)が、底面部49aに対して、段差部49cを介して、支持部Sの厚み分だけ盛り上がっている。なお、段差部49cは、底面部49aから周端部49bの上面に向かって、上方に傾斜していてもよく、上方に湾曲していてもよい。 Further, in the organic EL display device 50a, as shown in FIG. 3, at least a part of the upper surface Sa of the support portion S (peripheral end portion 49b of the recess 49) is seen in plan with the opening 42 of the edge cover 22 in a cross-sectional view. The position is higher than the upper surface 19a (bottom surface 49a of the recess 49) of the flattening film 19 superimposed on the above. In other words, as shown in FIG. 3, the thickness of the flattening film 19 at the peripheral end portion 49b is larger than the thickness of the flattening film 19 at the bottom surface portion 49a. In other words, in cross-sectional view, the upper surface of the peripheral end portion 49b (the upper surface Sa of the support portion S) is raised with respect to the bottom surface portion 49a by the thickness of the support portion S via the step portion 49c. The step portion 49c may be inclined upward from the bottom surface portion 49a toward the upper surface of the peripheral end portion 49b, or may be curved upward.
 このように、有機EL表示装置50aでは、各第1電極21の下層にある(第1電極21と平面視で重畳する)平坦化膜19に凹部49を形成することで、下地平坦化膜19に凹凸(段差)が形成されている。なお、平坦化膜19の段差の大きさ(支持部Sの厚み、底面部49aの厚みと周端部49bの厚みの差)は、例えば、100nm~1000nm程度である。 As described above, in the organic EL display device 50a, the base flattening film 19 is formed by forming the recess 49 in the flattening film 19 (superimposed on the first electrode 21 in a plan view) under each first electrode 21. Unevenness (step) is formed on the surface. The size of the step of the flattening film 19 (the thickness of the support portion S, the difference between the thickness of the bottom surface portion 49a and the thickness of the peripheral end portion 49b) is, for example, about 100 nm to 1000 nm.
 そして、有機EL表示装置50aでは、第1電極21は、凹部49における平坦化膜19上に形成されるため、凹部49の表面形状に応じた形状になる。具体的には、図3に示すように、支持部Sと平面視で重畳する第1電極21(第1電極21の周端部21b)の上面の少なくとも一部は、エッジカバー22の開口42と平面視で重畳する第1電極21(第1電極21の中央部21a)の上面よりも高くなる。即ち、支持部Sにより、第1電極21にも段差が形成される。その結果、第1電極21の表面積が大きくなるため、第1電極21に対するバンク材料の表面張力(抵抗)が大きくなる。 Then, in the organic EL display device 50a, since the first electrode 21 is formed on the flattening film 19 in the recess 49, the shape corresponds to the surface shape of the recess 49. Specifically, as shown in FIG. 3, at least a part of the upper surface of the first electrode 21 (the peripheral end portion 21b of the first electrode 21) that overlaps with the support portion S in a plan view is the opening 42 of the edge cover 22. It is higher than the upper surface of the first electrode 21 (central portion 21a of the first electrode 21) that overlaps with the above in a plan view. That is, the support portion S also forms a step on the first electrode 21. As a result, the surface area of the first electrode 21 is increased, so that the surface tension (resistance) of the bank material with respect to the first electrode 21 is increased.
 なお、有機EL表示装置50aでは、支持部Sにより第1電極21に対するバンク材料の表面張力(抵抗)が大きくなる結果、図7に示すように、バンクベーク後のバンクホールが第1電極21の周端部21b近傍まで拡がっていてもよい。換言すると、図7に示すように、支持部Sの少なくとも一部がエッジカバー22の開口42と平面視で重畳していてもよい。 In the organic EL display device 50a, as a result of the surface tension (resistance) of the bank material with respect to the first electrode 21 being increased by the support portion S, as shown in FIG. 7, the bank hole after bank baking is the first electrode 21. It may extend to the vicinity of the peripheral end portion 21b. In other words, as shown in FIG. 7, at least a part of the support portion S may overlap with the opening 42 of the edge cover 22 in a plan view.
 また、有機EL表示装置50aでは、平坦化膜19に凹部49が形成されているが、凹部49の代わりに、例えば、複数の第1電極21の位置に対応して、平坦化膜19で形成された複数の環状パターンC19が設けられていてもよい。この場合、平坦化膜19の各環状パターンC19(環状の平坦化膜19)が支持部Sである。 Further, in the organic EL display device 50a, the recess 49 is formed in the flattening film 19, but instead of the recess 49, for example, the flattening film 19 is formed corresponding to the positions of the plurality of first electrodes 21. A plurality of formed annular patterns C 19 may be provided. In this case, each annular pattern C 19 (annular flattening film 19) of the flattening film 19 is the support portion S.
 上述した有機EL表示装置50aは、各サブ画素Pにおいて、ゲート線14を介して第1TFT9aにゲート信号を入力することにより、第1TFT9aをオン状態にし、ソース線18fを介して第2TFT9bのゲート電極14b及びキャパシタ9cにデータ信号を書き込み、第2TFT9bのゲート電圧に応じた電源線18gからの電流が有機EL層23に供給されることにより、有機EL層23の発光層3が発光して、画像表示を行うように構成されている。なお、有機EL表示装置50aでは、第1TFT9aがオフ状態になっても、第2TFT9bのゲート電圧がキャパシタ9cによって保持されるので、次のフレームのゲート信号が入力されるまで発光層3による発光が維持される。 The organic EL display device 50a described above turns on the first TFT 9a by inputting a gate signal to the first TFT 9a via the gate line 14 in each sub-pixel P, and turns on the first TFT 9a, and the gate electrode of the second TFT 9b via the source line 18f. By writing a data signal to the 14b and the capacitor 9c and supplying a current from the power supply line 18g corresponding to the gate voltage of the second TFT 9b to the organic EL layer 23, the light emitting layer 3 of the organic EL layer 23 emits light, and the image It is configured to display. In the organic EL display device 50a, even if the first TFT 9a is turned off, the gate voltage of the second TFT 9b is held by the capacitor 9c, so that the light emitting layer 3 emits light until the gate signal of the next frame is input. Be maintained.
 次に、本実施形態の有機EL表示装置50aの製造方法について説明する。ここで、本実施形態の有機EL表示装置50aの製造方法は、樹脂基板層形成工程と、TFT層形成工程と、有機EL素子層形成工程と、封止層形成工程と、実装工程とを備える。 Next, a method of manufacturing the organic EL display device 50a of the present embodiment will be described. Here, the method for manufacturing the organic EL display device 50a of the present embodiment includes a resin substrate layer forming step, a TFT layer forming step, an organic EL element layer forming step, a sealing layer forming step, and a mounting step. ..
 <樹脂基板層形成工程>
 例えば、ガラス基板等の支持基板(不図示)上に、非感光性のポリイミド樹脂を塗布した後、その塗布膜に対して、プリベーク及びポストベークを行うことにより、フレキシブルな樹脂基板層10を形成する。
<Resin substrate layer forming process>
For example, a flexible resin substrate layer 10 is formed by applying a non-photosensitive polyimide resin on a support substrate (not shown) such as a glass substrate and then prebaking and post-baking the coated film. do.
 <TFT層形成工程>
 まず、樹脂基板層形成工程で形成された樹脂基板層10の表面に、例えば、周知の方法を用いて、ベースコート膜11、半導体層12a,12b、ゲート絶縁膜13、ゲート電極14a、第1層間絶縁膜15、第2層間絶縁膜17、配線層(ソース電極18aやドレイン電極18b等)及び平坦化膜19等を順に積層することによりTFT層20を形成する。具体的には、樹脂基板層10上に、ベースコート膜11、第1TFT9a、第2TFT9b、キャパシタ9c、及び平坦化膜19を形成する。なお、平坦化膜19は、例えば、感光性樹脂を用いて、感光性を有する樹脂からなる樹脂層に形成する。
<TFT layer forming process>
First, on the surface of the resin substrate layer 10 formed in the resin substrate layer forming step, for example, using a well-known method, the base coat film 11, the semiconductor layers 12a and 12b, the gate insulating film 13, the gate electrode 14a, and the first interlayer film are used. The TFT layer 20 is formed by laminating the insulating film 15, the second interlayer insulating film 17, the wiring layer (source electrode 18a, drain electrode 18b, etc.), the flattening film 19, and the like in this order. Specifically, the base coat film 11, the first TFT 9a, the second TFT 9b, the capacitor 9c, and the flattening film 19 are formed on the resin substrate layer 10. The flattening film 19 is formed in a resin layer made of a photosensitive resin, for example, by using a photosensitive resin.
 続いて、例えば、フォトリソグラフィ及びその後のパターニング(エッチング)により、次の有機EL素子層形成工程で形成する複数の第1電極21の位置に対応して、平坦化膜19の一部に複数の支持部Sを形成する。より具体的には、グレートーンマスクを用いて、平坦化膜19をパターニングして、平坦化膜19に複数の凹部49又は複数の環状パターンC19を形成する。このとき、平坦化膜19に、凹部49とコンタクトホールとを同時に形成してもよい。本工程により形成された平坦化膜19の凹部49における周端部49b又は複数の環状パターンC19が支持部Sとなる。 Subsequently, for example, a plurality of first electrodes 21 formed in the next organic EL element layer forming step by photolithography and subsequent patterning (etching) are formed on a part of the flattening film 19. The support portion S is formed. More specifically, the flattening film 19 is patterned using a gray tone mask to form a plurality of recesses 49 or a plurality of annular patterns C 19 in the flattening film 19. At this time, the recess 49 and the contact hole may be formed in the flattening film 19 at the same time. The peripheral end portion 49b or the plurality of annular patterns C 19 in the recess 49 of the flattening film 19 formed by this step serves as the support portion S.
 <有機EL素子層形成工程>
 TFT層形成工程で形成されたTFT層20の平坦化膜19上に、周知の方法を用いて、表示領域Dを構成する複数のサブ画素Pに対応して、複数の第1電極21、共通のエッジカバー22、複数の有機EL層23(正孔注入層1、正孔輸送層2、発光層3、電子輸送層4、電子注入層5)及び共通の第2電極24を備えた複数の有機EL素子25を形成して、有機EL素子層30を形成する。
<Organic EL element layer forming process>
On the flattening film 19 of the TFT layer 20 formed in the TFT layer forming step, a plurality of first electrodes 21 are common to the plurality of sub-pixels P constituting the display region D by using a well-known method. Edge cover 22, a plurality of organic EL layers 23 (hole injection layer 1, hole transport layer 2, light emitting layer 3, electron transport layer 4, electron injection layer 5) and a plurality of common second electrodes 24. The organic EL element 25 is formed to form the organic EL element layer 30.
 より具体的には、まず、TFT層形成工程において複数の凹部49又は複数の環状パターンC19が形成された平坦化膜19の表面に、第1電極21(反射電極)用金属層を成膜し、フォトリソグラフィ及びパターニングする。これにより、凹部49又は環状パターンC19の表面形状に応じた形状を有する第1電極21が形成される。このとき、支持部Sの外周端部Sbが第1電極21の周端部21bと面一又は周端部21bよりも内側に配置されるように、第1電極21を形成する。 More specifically, first, a metal layer for the first electrode 21 (reflection electrode) is formed on the surface of the flattening film 19 on which a plurality of recesses 49 or a plurality of annular patterns C 19 are formed in the TFT layer forming step. And photolithography and patterning. As a result, the first electrode 21 having a shape corresponding to the surface shape of the recess 49 or the annular pattern C 19 is formed. At this time, the first electrode 21 is formed so that the outer peripheral end portion Sb of the support portion S is arranged flush with the peripheral end portion 21b of the first electrode 21 or inside the peripheral end portion 21b.
 続いて、各第1電極21の周端部21bを覆うように格子状にバンク材料を塗布して、フォトリソグラフィ及びパターニングした後に、バンクベークを行う。これにより、各第1電極21の位置に対応して、開口42が形成されたバンク(エッジカバー22)を形成する。このとき、エッジカバー22の開口42の周端部が支持部Sの内周端部Sdよりも内側に配置されるように、エッジカバー22を形成する。 Subsequently, the bank material is applied in a grid pattern so as to cover the peripheral end portion 21b of each first electrode 21, photolithography and patterning are performed, and then bank baking is performed. As a result, a bank (edge cover 22) in which the opening 42 is formed is formed corresponding to the position of each first electrode 21. At this time, the edge cover 22 is formed so that the peripheral end portion of the opening 42 of the edge cover 22 is arranged inside the inner peripheral end portion Sd of the support portion S.
 その後、第1電極21又はエッジカバー22上に、有機EL層23、第2電極24等を形成する。 After that, the organic EL layer 23, the second electrode 24, etc. are formed on the first electrode 21 or the edge cover 22.
 <封止層形成工程>
 まず、有機EL素子層形成工程で形成された有機EL素子層30上に、各有機EL素子25を覆うように、マスクを用いて、例えば、窒化シリコン膜、酸化シリコン膜、酸窒化シリコン膜等の無機絶縁膜をプラズマCVD(chemical vapor deposition)法により成膜して、第1封止無機膜31を形成する。
<Encapsulation layer forming process>
First, a mask is used so as to cover each organic EL element 25 on the organic EL element layer 30 formed in the organic EL element layer forming step, for example, a silicon nitride film, a silicon oxide film, a silicon oxynitride film, or the like. The inorganic insulating film of No. 1 is formed by a plasma CVD (chemical vapor deposition) method to form the first sealing inorganic film 31.
 続いて、第1封止無機膜31が形成された基板表面に、例えば、インクジェット法により、アクリル樹脂等の有機樹脂材料を成膜して、封止有機膜32を形成する。 Subsequently, an organic resin material such as an acrylic resin is formed on the surface of the substrate on which the first sealing inorganic film 31 is formed by, for example, an inkjet method to form the sealing organic film 32.
 その後、封止有機膜32を覆うように、マスクを用いて、例えば、窒化シリコン膜、酸化シリコン膜、酸窒化シリコン膜等の無機絶縁膜をプラズマCVD法により成膜して、第2封止無機膜33を形成する。 Then, an inorganic insulating film such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film is formed by a plasma CVD method so as to cover the sealing organic film 32, and the second sealing is performed. The inorganic film 33 is formed.
 <実装工程>
 まず、封止層形成工程で封止層35が形成された基板表面に保護シート(不図示)を貼付した後に、樹脂基板層10のガラス基板側からレーザー光を照射することにより、樹脂基板層10の裏面からガラス基板を剥離させる。続いて、ガラス基板を剥離させた樹脂基板層10の裏面に保護シート(不図示)を貼付する。
<Mounting process>
First, a protective sheet (not shown) is attached to the surface of the substrate on which the sealing layer 35 is formed in the sealing layer forming step, and then the resin substrate layer is irradiated with laser light from the glass substrate side of the resin substrate layer 10. The glass substrate is peeled off from the back surface of 10. Subsequently, a protective sheet (not shown) is attached to the back surface of the resin substrate layer 10 from which the glass substrate has been peeled off.
 続いて、上述の各工程により製造された複数の表示基板がマトリクス状に配列された母基板を、例えば、レーザー光で分断して表示パネルを個々に切り出し、個片化する。 Subsequently, the mother substrate in which a plurality of display substrates manufactured by each of the above steps are arranged in a matrix is divided by, for example, laser light, and the display panels are individually cut out and individualized.
 最後に、封止層35が形成された表示基板の表面に貼付された保護シートに、例えば、レーザー光を照射することにより、保護シートを部分的に除去する。続いて、保護シートを除去した封止層35の表面に、粘着層(OCA)を介して、例えば、光学補償機能、タッチセンサ機能、保護機能等の各種機能を有する機能フィルムを貼付する。 Finally, the protective sheet is partially removed by, for example, irradiating the protective sheet attached to the surface of the display substrate on which the sealing layer 35 is formed with laser light. Subsequently, a functional film having various functions such as an optical compensation function, a touch sensor function, and a protective function is attached to the surface of the sealing layer 35 from which the protective sheet has been removed via an adhesive layer (OCA).
 以上のようにして、本実施形態の有機EL表示装置50aを製造できる。 As described above, the organic EL display device 50a of the present embodiment can be manufactured.
 以上説明したように、本実施形態の有機EL表示装置50aによれば、以下の効果を得ることができる。 As described above, according to the organic EL display device 50a of the present embodiment, the following effects can be obtained.
 (1)有機EL表示装置50aでは、図3及び図6に示すように、表示領域Dにおいて、各第1電極21の下層には、第1電極21の周端部21bに沿って支持部Sが設けられている。そして、支持部Sの上面Saの少なくとも一部が、エッジカバー22の開口42と平面視で重畳する平坦化膜19の上面19aよりも高い位置にある。これにより、第1電極21は、支持部Sと平面視で重畳する周端部21bの上面の少なくとも一部が、中央部21aの上面よりも高い位置になる(第1電極21に凹凸(段差)ができる)。その結果、第1電極21に対するバンク材料の表面張力(抵抗)が大きくなるため、バンクベーク時にバンク材料が熱収縮したとしても、エッジカバー22の開口42(バンクホール、発光用開口部)が第1電極21の段差を超えて拡がることを抑制できる。したがって、バンクホールの周端部の少なくとも一部が第1電極21を踏み外すことを抑制できる。 (1) In the organic EL display device 50a, as shown in FIGS. 3 and 6, in the display region D, the lower layer of each first electrode 21 has a support portion S along the peripheral end portion 21b of the first electrode 21. Is provided. Then, at least a part of the upper surface Sa of the support portion S is located higher than the upper surface 19a of the flattening film 19 that overlaps the opening 42 of the edge cover 22 in a plan view. As a result, at least a part of the upper surface of the peripheral end portion 21b that overlaps with the support portion S in a plan view of the first electrode 21 is at a position higher than the upper surface of the central portion 21a (the first electrode 21 has irregularities (steps). ) Can be done). As a result, the surface tension (resistance) of the bank material with respect to the first electrode 21 becomes large, so that even if the bank material is thermally shrunk during bank baking, the opening 42 (bank hole, light emitting opening) of the edge cover 22 is the first. It is possible to suppress the spread beyond the step of one electrode 21. Therefore, it is possible to prevent at least a part of the peripheral end portion of the bank hole from stepping off the first electrode 21.
 (2)バンクホールの周端部の少なくとも一部が第1電極21を踏み外すことが抑制される結果、表示領域Dにおける平坦化膜19のクラックの発生を抑制できる。 (2) As a result of suppressing the stepping off of the first electrode 21 at least a part of the peripheral end portion of the bank hole, the occurrence of cracks in the flattening film 19 in the display region D can be suppressed.
 (3)また、バンクホールの周端部の少なくとも一部が第1電極21を踏み外すことが抑制される結果、エッジカバー22の機能を維持できる。 (3) Further, as a result of suppressing the stepping off of the first electrode 21 by at least a part of the peripheral end portion of the bank hole, the function of the edge cover 22 can be maintained.
 (4)さらに、バンクホールの周端部の少なくとも一部が第1電極21を踏み外すことが抑制される結果、図7に示すように、バンクホールを第1電極21の周端部21b近傍まで大きく形成できる。この場合、サブ画素Pの発光面積を大きくできるため、有機EL表示装置50aの表示品質を向上できる。 (4) Further, as a result of suppressing that at least a part of the peripheral end portion of the bank hole is depressed from stepping on the first electrode 21, the bank hole is extended to the vicinity of the peripheral end portion 21b of the first electrode 21 as shown in FIG. Can be formed large. In this case, since the light emitting area of the sub-pixel P can be increased, the display quality of the organic EL display device 50a can be improved.
 (5)表示領域Dにおける平坦化膜19のクラックの発生が抑制され、且つエッジカバー22の機能が維持される結果、有機EL表示装置50aの信頼性を向上できる。 (5) As a result of suppressing the occurrence of cracks in the flattening film 19 in the display area D and maintaining the function of the edge cover 22, the reliability of the organic EL display device 50a can be improved.
 (6)バンクホールの周端部の少なくとも一部が第1電極21を踏み外す不良や、平坦化膜19にクラックが発生する不良が発生した場合に、有機EL素子層形成工程前の不良品検査が容易になる。その結果、有機EL表示装置50aの信頼性を向上できる。 (6) Defective product inspection before the organic EL element layer forming process when at least a part of the peripheral end of the bank hole has a defect of stepping off the first electrode 21 or a defect of cracking in the flattening film 19 occurs. Becomes easier. As a result, the reliability of the organic EL display device 50a can be improved.
 《第2の実施形態》
 次に、本発明の第2の実施形態について説明する。図8~図10は、本発明に係る表示装置の第2の実施形態を示している。図8は、本実施形態に係る有機EL表示装置50bの表示領域Dの断面図であり、図3に相当する図である。また、図9は、有機EL表示装置50bの表示領域Dの拡大平面図であり、図6に相当する図である。なお、図9の拡大平面図では、図8に示すエッジカバー22、有機EL層23、第2電極24及び封止層35が省略されている。
<< Second Embodiment >>
Next, a second embodiment of the present invention will be described. 8 to 10 show a second embodiment of the display device according to the present invention. FIG. 8 is a cross-sectional view of the display area D of the organic EL display device 50b according to the present embodiment, and is a view corresponding to FIG. Further, FIG. 9 is an enlarged plan view of the display area D of the organic EL display device 50b, which corresponds to FIG. In the enlarged plan view of FIG. 9, the edge cover 22, the organic EL layer 23, the second electrode 24, and the sealing layer 35 shown in FIG. 8 are omitted.
 支持部S以外の有機EL表示装置50bの全体構成は、上述の第1の実施形態の場合と同じであるため、ここでは詳しい説明を省略する。また、第1の実施形態と同様の構成部分については同一の符号を付してその説明を省略する。 Since the overall configuration of the organic EL display device 50b other than the support portion S is the same as that of the first embodiment described above, detailed description thereof will be omitted here. Further, the same components as those in the first embodiment are designated by the same reference numerals, and the description thereof will be omitted.
 有機EL表示装置50bでは、図8及び図9に示すように、各第1電極21と平面視で重畳する平坦化膜19上に、第2無機絶縁膜45が設けられている。この第2無機絶縁膜45により支持部Sが形成されている。 In the organic EL display device 50b, as shown in FIGS. 8 and 9, a second inorganic insulating film 45 is provided on a flattening film 19 that overlaps each first electrode 21 in a plan view. The support portion S is formed by the second inorganic insulating film 45.
 また、有機EL表示装置50bでは、図9に示すように、複数の第1電極21に沿って、第2無機絶縁膜45で形成された複数の環状パターンC45が設けられている。ここで、第2無機絶縁膜45の環状パターンC45(環状の第2無機絶縁膜45)が支持部Sである。即ち、支持部Sは、第1電極21の全周に形成されている。なお、図8及び図9に示すように、支持部Sの外周端部Sbは、第1電極21の周端部21bに囲まれている。エッジカバー22の開口42の周端部は、支持部Sの内周端部Sdに囲まれている。 Further, in the organic EL display device 50b, as shown in FIG. 9, a plurality of annular patterns C 45 formed of the second inorganic insulating film 45 are provided along the plurality of first electrodes 21. Here, the annular pattern C 45 (annular second inorganic insulating film 45) of the second inorganic insulating film 45 is the support portion S. That is, the support portion S is formed on the entire circumference of the first electrode 21. As shown in FIGS. 8 and 9, the outer peripheral end portion Sb of the support portion S is surrounded by the peripheral end portion 21b of the first electrode 21. The peripheral end of the opening 42 of the edge cover 22 is surrounded by the inner peripheral end Sd of the support portion S.
 また、環状の第2無機絶縁膜45は、独立し、隣り合うサブ画素Pを構成する他の無機絶縁膜とは接続されていない(繋がっていない)。 Further, the annular second inorganic insulating film 45 is independent and is not connected (not connected) to other inorganic insulating films constituting the adjacent sub-pixels P.
 このように、有機EL表示装置50bでは、図8及び図9に示すように、平坦化膜19の厚み方向において、平坦化膜19と第1電極21との間に、支持部Sとして環状の第2無機絶縁膜45が介在している。換言すると、環状の第2無機絶縁膜45は、その上面が第1電極21と接触し、その下面が平坦化膜19と接している。 As described above, in the organic EL display device 50b, as shown in FIGS. 8 and 9, in the thickness direction of the flattening film 19, between the flattening film 19 and the first electrode 21, the support portion S is annular. A second inorganic insulating film 45 is interposed. In other words, the upper surface of the annular second inorganic insulating film 45 is in contact with the first electrode 21, and the lower surface thereof is in contact with the flattening film 19.
 そして、有機EL表示装置50bでは、第1電極21は、平坦化膜19及び環状の第2無機絶縁膜45上に形成されるため、図8に示すように、環状パターンC45と平面視で重畳する第1電極21(第1電極21の周端部21b)の上面の少なくとも一部が、エッジカバー22の開口42と平面視で重畳する第1電極21(第1電極21の中央部21a)の上面よりも高くなる。即ち、環状パターンC45により、第1電極21にも段差が形成される。なお、環状の第2無機絶縁膜45(支持部S)の厚みは、例えば、100nm~500nm程度である。 Then, in the organic EL display device 50b, since the first electrode 21 is formed on the flattening film 19 and the annular second inorganic insulating film 45, as shown in FIG. 8, the annular pattern C 45 and the annular pattern C 45 are viewed in a plan view. At least a part of the upper surface of the first electrode 21 (the peripheral end portion 21b of the first electrode 21) to be superimposed overlaps with the opening 42 of the edge cover 22 in a plan view, the first electrode 21 (the central portion 21a of the first electrode 21). ) Is higher than the upper surface. That is, the annular pattern C 45 also forms a step on the first electrode 21. The thickness of the annular second inorganic insulating film 45 (support portion S) is, for example, about 100 nm to 500 nm.
 第2無機絶縁膜45を構成する材料としては、第1電極21の下層にある下地平坦化膜19のベーク温度(250℃程度)よりも低い温度で成膜できるものであればよく、例えば、四窒化三ケイ素(Si)等の窒化シリコン(SiNx(xは正数))、炭窒化ケイ素(SiCN)等の無機材料が挙げられる。第2無機絶縁膜45は、上述の無機材料からなる無機絶縁膜の単層膜又は積層膜により構成される。 The material constituting the second inorganic insulating film 45 may be any material that can form a film at a temperature lower than the bake temperature (about 250 ° C.) of the base flattening film 19 under the first electrode 21, for example. four nitride three silicon (Si 3 N 4) or the like of a silicon nitride (SiNx (x is a positive number)), and inorganic materials such as silicon carbonitride (SiCN) is. The second inorganic insulating film 45 is composed of a single-layer film or a laminated film of an inorganic insulating film made of the above-mentioned inorganic material.
 有機EL表示装置50bは、上述の第1の実施形態の有機EL表示装置50aの製造方法において、例えば、TFT層形成工程を以下のように変更すると共に、TFT層形成工程後であって、有機EL素子層形成工程前に、第2無機絶縁膜パターニング工程とを設けることにより製造できる。 In the method for manufacturing the organic EL display device 50a of the first embodiment described above, the organic EL display device 50b is, for example, changed the TFT layer forming step as follows, and is organic after the TFT layer forming step. It can be manufactured by providing a second inorganic insulating film patterning step before the EL element layer forming step.
 <TFT層形成工程>
 樹脂基板層形成工程で形成された樹脂基板層10の表面に、例えば、周知の方法を用いて、半導体層12a,12b、第1無機絶縁膜、配線層(ソース電極18aやドレイン電極18b等)及び平坦化膜19等を順に積層することによりTFT層20を形成する。具体的には、樹脂基板層10上に、ベースコート膜11、第1TFT9a、第2TFT9b、キャパシタ9c、及び平坦化膜19を形成する。なお、平坦化膜19は、例えば、感光性樹脂を用いて、感光性樹脂からなる樹脂層に形成する。
<TFT layer forming process>
On the surface of the resin substrate layer 10 formed in the resin substrate layer forming step, for example, the semiconductor layers 12a and 12b, the first inorganic insulating film, and the wiring layer (source electrode 18a, drain electrode 18b, etc.) are used on the surface of the resin substrate layer 10. The TFT layer 20 is formed by laminating the flattening film 19 and the like in order. Specifically, the base coat film 11, the first TFT 9a, the second TFT 9b, the capacitor 9c, and the flattening film 19 are formed on the resin substrate layer 10. The flattening film 19 is formed in a resin layer made of a photosensitive resin, for example, by using a photosensitive resin.
 <第2無機絶縁膜パターニング工程>
 TFT層形成工程で形成された平坦化膜19の表面に、次の有機EL素子層形成工程で形成する複数の第1電極21の位置に対応して、例えば、周知の方法を用いて、窒化シリコン膜等の無機絶縁膜を成膜してパターニングすることにより、第2無機絶縁膜45を形成する。より具体的には、マスクを用いて、第2無機絶縁膜45をフォトリソグラフィ及びパターニングして、第2無機絶縁膜45の環状パターンC45を設ける。これにより、環状の第2無機絶縁膜45で支持部Sが形成される。
<Second inorganic insulating film patterning process>
Nitride using, for example, a well-known method, corresponding to the positions of the plurality of first electrodes 21 formed in the next organic EL element layer forming step on the surface of the flattening film 19 formed in the TFT layer forming step. The second inorganic insulating film 45 is formed by forming an inorganic insulating film such as a silicon film and patterning the film. More specifically, the second inorganic insulating film 45 is photolithographically and patterned using a mask to provide the annular pattern C 45 of the second inorganic insulating film 45. As a result, the support portion S is formed by the annular second inorganic insulating film 45.
 以上に説明した有機EL表示装置50bによれば、上記(1)~(6)の効果に加えて、以下の効果を得ることができる。 According to the organic EL display device 50b described above, the following effects can be obtained in addition to the effects (1) to (6) above.
 (7)有機EL表示装置50bでは、図8及び図9に示すように、平坦化膜19上には、第2無機絶縁膜45が設けられ、この第2無機絶縁膜45により支持部Sが形成されている。本実施形態では、複数の第1電極21の位置に対応して、第2無機絶縁膜45で形成された複数の環状パターンC45が設けられ、この各環状パターンC45が支持部Sになっている。そして、環状の第2無機絶縁膜45は、各々独立して、隣り合うサブ画素Pを構成する他の無機絶縁膜とは繋がっていないため、バンクベーク時に平坦化膜19から剥離することを抑制できる。 (7) In the organic EL display device 50b, as shown in FIGS. 8 and 9, a second inorganic insulating film 45 is provided on the flattening film 19, and the support portion S is provided by the second inorganic insulating film 45. It is formed. In the present embodiment, a plurality of annular patterns C 45 formed of the second inorganic insulating film 45 are provided corresponding to the positions of the plurality of first electrodes 21, and each of the annular patterns C 45 serves as a support portion S. ing. Since the annular second inorganic insulating film 45 is not connected to the other inorganic insulating films constituting the adjacent sub-pixels P independently of each other, it is possible to prevent the annular second inorganic insulating film 45 from peeling off from the flattening film 19 at the time of bank baking. can.
 《第2の実施形態の変形例》
 図10は、有機EL表示装置50bの表示領域Dの変形例を示す断面図であり、図3に相当する図である。有機EL表示装置50bでは、第2無機絶縁膜45のパターン形状を変更してもよい。
<< Modified example of the second embodiment >>
FIG. 10 is a cross-sectional view showing a modified example of the display area D of the organic EL display device 50b, and is a view corresponding to FIG. In the organic EL display device 50b, the pattern shape of the second inorganic insulating film 45 may be changed.
 有機EL表示装置50bの変形例では、図10に示すように、第2無機絶縁膜45には、複数の第1電極21の位置に対応して、複数の開口46が形成されている。即ち、各開口46では、第2無機絶縁膜45が除去されて、平坦化膜19と第1電極21とが接触している。各開口46は、第1電極21の中央部21a及びエッジカバー22の開口42と平面視で重畳する。ここで、各開口46の周端部における第2無機絶縁膜45が支持部Sである。換言すると、第2無機絶縁膜45の開口46の周囲であって第1電極21と平面視で重畳する部分における第2無機絶縁膜45が支持部Sになっている。 In a modified example of the organic EL display device 50b, as shown in FIG. 10, a plurality of openings 46 are formed in the second inorganic insulating film 45 corresponding to the positions of the plurality of first electrodes 21. That is, at each opening 46, the second inorganic insulating film 45 is removed, and the flattening film 19 and the first electrode 21 are in contact with each other. Each opening 46 overlaps the central portion 21a of the first electrode 21 and the opening 42 of the edge cover 22 in a plan view. Here, the second inorganic insulating film 45 at the peripheral end of each opening 46 is the support portion S. In other words, the second inorganic insulating film 45 at the portion around the opening 46 of the second inorganic insulating film 45 that overlaps with the first electrode 21 in a plan view is the support portion S.
 また、有機EL表示装置50bの変形例では、図10に示すように、表示領域Dにおいて、第1電極21と平面視で重畳する部分以外の部分における平坦化膜19上にも第2無機絶縁膜45が形成されている。 Further, in the modified example of the organic EL display device 50b, as shown in FIG. 10, in the display region D, the second inorganic insulation is also formed on the flattening film 19 in the portion other than the portion that overlaps with the first electrode 21 in a plan view. The film 45 is formed.
 このように、有機EL表示装置50bの変形例では、図10に示すように、表示領域Dにおける第2無機絶縁膜45のうち、複数の開口46の周端部における各第2無機絶縁膜45が支持部Sになっている。即ち、支持部Sが第2無機絶縁膜45の一部で形成されている。 As described above, in the modified example of the organic EL display device 50b, as shown in FIG. 10, each of the second inorganic insulating films 45 at the peripheral ends of the plurality of openings 46 among the second inorganic insulating films 45 in the display region D. Is the support portion S. That is, the support portion S is formed of a part of the second inorganic insulating film 45.
 有機EL表示装置50bの変形例は、上述の有機EL表示装置50bの製造方法における第2無機絶縁膜パターニング工程において、例えば、第2無機絶縁膜45のパターン形状を変更することにより製造できる。より具体的には、まず、表示領域Dにおける平坦化膜19の表面に、例えば、周知の方法を用いて、窒化シリコン膜等の無機絶縁膜を成膜して、第2無機絶縁膜45を形成する。続いて、マスクを用いて、第2無機絶縁膜45をフォトリソグラフィ及びパターニングして、複数の第1電極21の中央部21aと平面視で重畳する部分における第2無機絶縁膜45に複数の開口46を形成する。これにより、開口46の周端部における第2無機絶縁膜45、即ち第2無機絶縁膜45の一部で支持部Sが形成される。 A modified example of the organic EL display device 50b can be manufactured by, for example, changing the pattern shape of the second inorganic insulating film 45 in the second inorganic insulating film patterning step in the above-mentioned manufacturing method of the organic EL display device 50b. More specifically, first, an inorganic insulating film such as a silicon nitride film is formed on the surface of the flattening film 19 in the display region D by using a well-known method, and the second inorganic insulating film 45 is formed. Form. Subsequently, the second inorganic insulating film 45 is photolithographically and patterned using a mask, and a plurality of openings are formed in the second inorganic insulating film 45 at a portion that overlaps with the central portion 21a of the plurality of first electrodes 21 in a plan view. Form 46. As a result, the support portion S is formed by the second inorganic insulating film 45 at the peripheral end of the opening 46, that is, a part of the second inorganic insulating film 45.
 以上に説明した有機EL表示装置50bの変形例によれば、上記(1)~(6)の効果に加えて、以下の効果を得ることができる。 According to the modification of the organic EL display device 50b described above, the following effects can be obtained in addition to the effects (1) to (6) above.
 (8)有機EL表示装置50bの変形例では、支持部Sが第2無機絶縁膜45の一部で形成され、表示領域Dにおいて、第1電極21と平面視で重畳する部分以外の部分における平坦化膜19上にも第2無機絶縁膜45が形成されている。これにより、バンクベーク時にバンクホールの周端部の少なくとも一部が第1電極21を踏み外したとしても、平坦化膜19の表面は第2無機絶縁膜45で覆われているため、バンク材料の収縮応力が平坦化膜19に伝わり難い。その結果、平坦化膜19のクラックの発生を抑制できる。 (8) In the modified example of the organic EL display device 50b, the support portion S is formed by a part of the second inorganic insulating film 45, and in the display region D, in a portion other than the portion that overlaps with the first electrode 21 in a plan view. A second inorganic insulating film 45 is also formed on the flattening film 19. As a result, even if at least a part of the peripheral end of the bank hole is stepped off from the first electrode 21 at the time of bank baking, the surface of the flattening film 19 is covered with the second inorganic insulating film 45, so that the bank material can be used. The contraction stress is difficult to be transmitted to the flattening film 19. As a result, the occurrence of cracks in the flattening film 19 can be suppressed.
 《その他の実施形態》
 上記各実施形態では、第1無機絶縁膜は、ベースコート膜11、ゲート絶縁膜13、第1層間絶縁膜15及び第2層間絶縁膜17の順に積層された4層により構成されているが、ベースコート膜11の1層により構成されていてもよく、ベースコート膜11及びゲート絶縁膜13の2層により構成されていてもよく、ベースコート膜11、ゲート絶縁膜13及び第1層間絶縁膜15の3層により構成されていてもよい。
<< Other Embodiments >>
In each of the above embodiments, the first inorganic insulating film is composed of four layers in which the base coating film 11, the gate insulating film 13, the first interlayer insulating film 15 and the second interlayer insulating film 17 are laminated in this order. It may be composed of one layer of the film 11, or may be composed of two layers of the base coat film 11 and the gate insulating film 13, and may be composed of three layers of the base coat film 11, the gate insulating film 13 and the first interlayer insulating film 15. It may be composed of.
 上記各実施形態では、正孔注入層、正孔輸送層、発光層、電子輸送層及び電子注入層の5層積層構造の有機EL層を例示したが、有機EL層は、例えば、正孔注入層兼正孔輸送層、発光層、及び電子輸送層兼電子注入層の3層積層構造であってもよい。 In each of the above embodiments, an organic EL layer having a five-layer laminated structure of a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer has been exemplified. It may have a three-layer laminated structure of a layer / hole transport layer, a light emitting layer, and an electron transport layer / electron injection layer.
 また、上記各実施形態では、第1電極を陽極とし、第2電極を陰極とした有機EL表示装置を例示したが、本発明は、有機EL層の積層構造を反転させ、第1電極を陰極とし、第2電極を陽極とした有機EL表示装置にも適用することができる。 Further, in each of the above embodiments, an organic EL display device in which the first electrode is used as an anode and the second electrode is used as a cathode is illustrated, but in the present invention, the laminated structure of the organic EL layer is inverted and the first electrode is used as a cathode. It can also be applied to an organic EL display device using the second electrode as an anode.
 また、上記各実施形態では、第1電極に接続されたTFTの電極をドレイン電極とした有機EL表示装置を例示したが、本発明は、第1電極に接続されたTFTの電極をソース電極と呼ぶ有機EL表示装置にも適用することができる。 Further, in each of the above embodiments, an organic EL display device in which the electrode of the TFT connected to the first electrode is used as the drain electrode is illustrated, but in the present invention, the electrode of the TFT connected to the first electrode is used as the source electrode. It can also be applied to an organic EL display device to be called.
 また、上記各実施形態では、表示装置として有機EL表示装置を例に挙げて説明したが、本発明は、有機EL表示装置に限定されず、フレキシブルな表示装置であれば適用可能である。例えば、量子ドット含有層を用いた発光素子であるQLED(Quantum-dot light emitting diode)等を備えたフレキシブルな表示装置に適用することができる。 Further, in each of the above embodiments, the organic EL display device has been described as an example of the display device, but the present invention is not limited to the organic EL display device, and any flexible display device can be applied. For example, it can be applied to a flexible display device provided with a QLED (Quantum-dot light emission diode) or the like, which is a light emitting element using a quantum dot-containing layer.
 以上説明したように、本発明は、フレキシブルな表示装置について有用である。 As described above, the present invention is useful for flexible display devices.
19     平坦化膜の環状パターン
45     第2無機絶縁膜の環状パターン
D     表示領域
F     額縁領域
P     サブ画素
S     支持部
Sa    支持部の上面
Sb    支持部の外周端部
Sd    支持部の内周端部
10    樹脂基板層
11    ベースコート膜(少なくとも1層の第1無機絶縁膜)
12a,12b   半導体層
13    ゲート絶縁膜(少なくとも1層の第1無機絶縁膜)
14    ゲート線(配線層)
14a,14b   ゲート電極(配線層)
14c   下部導電層(配線層)
15    第1層間絶縁膜(少なくとも1層の第1無機絶縁膜)
16    上部導電層(配線層)
17    第2層間絶縁膜(少なくとも1層の第1無機絶縁膜)
18a,18c,18f  ソース電極(配線層)
18b,18d  ドレイン電極(配線層)
19    平坦化膜
19a   平坦化膜の上面
20    TFT(薄膜トランジスタ)層
21    第1電極
21a   第1電極の中央部
21b   第1電極の周端部
22    エッジカバー
23    有機EL層(機能層)
24    第2電極
25    有機EL素子(有機エレクトロルミネッセンス素子、発光素子)
30    有機EL素子層(発光素子層)
35    封止層
42    エッジカバーの開口
45    第2無機絶縁膜
46    第2無機絶縁膜の開口
49    平坦化膜の凹部
49a   凹部の底面部
49b   凹部の周端部
50a,50b   有機EL表示装置
C 19 Circular pattern of flattening film C 45 Circular pattern of second inorganic insulating film D Display area F Frame area P Sub-pixel S Support part Sa Top surface of support part Sb Outer peripheral end of support part Sd Inner peripheral end of support part 10 Resin substrate layer 11 Base coat film (at least one first inorganic insulating film)
12a, 12b Semiconductor layer 13 Gate insulating film (at least one first inorganic insulating film)
14 Gate wire (wiring layer)
14a, 14b Gate electrode (wiring layer)
14c Lower conductive layer (wiring layer)
15 First interlayer insulating film (at least one first inorganic insulating film)
16 Upper conductive layer (wiring layer)
17 Second interlayer insulating film (at least one first inorganic insulating film)
18a, 18c, 18f Source electrode (wiring layer)
18b, 18d drain electrode (wiring layer)
19 Flattening film 19a Upper surface of flattening film 20 TFT (thin film transistor) layer 21 First electrode 21a Central part of first electrode 21b Peripheral end part of first electrode 22 Edge cover 23 Organic EL layer (functional layer)
24 Second electrode 25 Organic EL element (organic electroluminescence element, light emitting element)
30 Organic EL element layer (light emitting element layer)
35 Sealing layer 42 Edge cover opening 45 Second inorganic insulating film 46 Second inorganic insulating film opening 49 Flattening film recess 49a Bottom of recess 49b Peripheral end of recess 50a, 50b Organic EL display device

Claims (12)

  1.  樹脂基板層と、
     上記樹脂基板層上に設けられ、半導体層、少なくとも1層の第1無機絶縁膜、配線層及び平坦化膜が順に積層された薄膜トランジスタ層と、
     上記薄膜トランジスタ層上に設けられ、表示領域を構成する複数のサブ画素に対応して、複数の第1電極、共通のエッジカバー、複数の機能層及び共通の第2電極が順に積層された発光素子層とを備えた表示装置であって、
     上記エッジカバーには、上記複数の第1電極の位置に対応して、複数の開口が形成され、
     上記各第1電極の下層には、該第1電極の周端部に沿って支持部が設けられ、
     上記支持部の上面の少なくとも一部は、上記エッジカバーの開口と平面視で重畳する上記平坦化膜の上面よりも高い位置にあることを特徴とする表示装置。
    Resin substrate layer and
    A thin film transistor layer provided on the resin substrate layer and in which a semiconductor layer, at least one first inorganic insulating film, a wiring layer, and a flattening film are laminated in this order.
    A light emitting device provided on the thin film transistor layer in which a plurality of first electrodes, a common edge cover, a plurality of functional layers, and a common second electrode are sequentially laminated corresponding to a plurality of sub-pixels constituting a display area. A display device with layers
    A plurality of openings are formed in the edge cover corresponding to the positions of the plurality of first electrodes.
    A support portion is provided in the lower layer of each of the first electrodes along the peripheral end portion of the first electrode.
    A display device characterized in that at least a part of the upper surface of the support portion is located at a position higher than the upper surface of the flattening film that overlaps with the opening of the edge cover in a plan view.
  2.  請求項1に記載された表示装置において、
     上記支持部が上記平坦化膜の一部で形成されていることを特徴とする表示装置。
    In the display device according to claim 1,
    A display device characterized in that the support portion is formed of a part of the flattening film.
  3.  請求項2に記載された表示装置において、
     上記平坦化膜には、上記複数の第1電極の位置に対応して、複数の凹部が形成され、
     上記各凹部の周端部が上記支持部であることを特徴とする表示装置。
    In the display device according to claim 2,
    A plurality of recesses are formed in the flattening film corresponding to the positions of the plurality of first electrodes.
    A display device characterized in that the peripheral end portion of each of the recesses is the support portion.
  4.  請求項1に記載された表示装置において、
     上記複数の第1電極の位置に対応して、上記平坦化膜で形成された複数の環状パターンが設けられ、
     上記平坦化膜の各環状パターンが上記支持部であることを特徴とする表示装置。
    In the display device according to claim 1,
    A plurality of annular patterns formed of the flattening film are provided corresponding to the positions of the plurality of first electrodes.
    A display device characterized in that each annular pattern of the flattening film is the support portion.
  5.  請求項2~4のいずれか1項に記載された表示装置において、
     上記平坦化膜は樹脂層であることを特徴とする表示装置。
    In the display device according to any one of claims 2 to 4.
    A display device characterized in that the flattening film is a resin layer.
  6.  請求項5に記載された表示装置において、
     上記樹脂層は感光性を有することを特徴とする表示装置。
    In the display device according to claim 5,
    A display device characterized in that the resin layer has photosensitivity.
  7.  請求項1に記載された表示装置において、
     上記平坦化膜上には、第2無機絶縁膜が設けられ、
     上記第2無機絶縁膜により上記支持部が形成されていることを特徴とする表示装置。
    In the display device according to claim 1,
    A second inorganic insulating film is provided on the flattening film.
    A display device characterized in that the support portion is formed by the second inorganic insulating film.
  8.  請求項7に記載された表示装置において、
     上記支持部が上記第2無機絶縁膜の一部で形成されていることを特徴とする表示装置。
    In the display device according to claim 7,
    A display device characterized in that the support portion is formed of a part of the second inorganic insulating film.
  9.  請求項8に記載された表示装置において、
     上記第2無機絶縁膜には、上記複数の第1電極の位置に対応して、複数の開口が形成され、
     上記各開口の周端部における上記第2無機絶縁膜が上記支持部であることを特徴とする表示装置。
    In the display device according to claim 8,
    A plurality of openings are formed in the second inorganic insulating film corresponding to the positions of the plurality of first electrodes.
    A display device characterized in that the second inorganic insulating film at the peripheral end of each of the openings is the support portion.
  10.  請求項7に記載された表示装置において、
     上記複数の第1電極の位置に対応して、上記第2無機絶縁膜で形成された複数の環状パターンが設けられ、
     上記第2無機絶縁膜の各環状パターンが上記支持部であることを特徴とする表示装置。
    In the display device according to claim 7,
    A plurality of annular patterns formed of the second inorganic insulating film are provided corresponding to the positions of the plurality of first electrodes.
    A display device characterized in that each annular pattern of the second inorganic insulating film is the support portion.
  11.  請求項1~10のいずれか1項に記載された表示装置において、
     上記支持部の少なくとも一部が上記エッジカバーの開口と平面視で重畳することを特徴とする表示装置。
    In the display device according to any one of claims 1 to 10.
    A display device characterized in that at least a part of the support portion overlaps with the opening of the edge cover in a plan view.
  12.  請求項1~10のいずれか1項に記載された表示装置において、
     上記支持部が第1電極の周端部に囲まれ、上記エッジカバーの開口の周端部が該支持部に囲まれていることを特徴とする表示装置。
    In the display device according to any one of claims 1 to 10.
    A display device characterized in that the support portion is surrounded by the peripheral end portion of the first electrode, and the peripheral end portion of the opening of the edge cover is surrounded by the support portion.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005208603A (en) * 2003-12-26 2005-08-04 Semiconductor Energy Lab Co Ltd Light emitting device
JP2012204254A (en) * 2011-03-28 2012-10-22 Canon Inc Method for manufacturing organic el display device
JP2015138612A (en) * 2014-01-21 2015-07-30 株式会社ジャパンディスプレイ Organic electroluminescence display device
US20190115559A1 (en) * 2017-10-18 2019-04-18 Samsung Display Co., Ltd. Light emitting device having insulation layer of varying thickness and manufacturing method thereof
WO2019180878A1 (en) * 2018-03-22 2019-09-26 シャープ株式会社 Display device and method for producing display device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005208603A (en) * 2003-12-26 2005-08-04 Semiconductor Energy Lab Co Ltd Light emitting device
JP2012204254A (en) * 2011-03-28 2012-10-22 Canon Inc Method for manufacturing organic el display device
JP2015138612A (en) * 2014-01-21 2015-07-30 株式会社ジャパンディスプレイ Organic electroluminescence display device
US20190115559A1 (en) * 2017-10-18 2019-04-18 Samsung Display Co., Ltd. Light emitting device having insulation layer of varying thickness and manufacturing method thereof
WO2019180878A1 (en) * 2018-03-22 2019-09-26 シャープ株式会社 Display device and method for producing display device

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