WO2021109591A1

WO2021109591A1 - Power source circuit and current-equalizing method

Info

Publication number: WO2021109591A1
Application number: PCT/CN2020/104049
Authority: WO
Inventors: 张涛
Original assignee: 苏州浪潮智能科技有限公司
Priority date: 2019-12-06
Filing date: 2020-07-24
Publication date: 2021-06-10
Also published as: CN110994960A

Abstract

Provided are a power source circuit and a current-equalizing method. In the power source circuit, a power source input circuit (11) is mutually connected to a chip control circuit (12) and a current-equalizing circuit (13), wherein the current-equalizing circuit (13) comprises a plurality of fully controllable switching device units (131) which are connected in parallel and used for current equalization; an output end of each fully controllable switching device unit (131) is respectively connected to a corresponding current detection end of the chip control circuit (12); each current detection end of the chip control circuit (12) is respectively connected to the output end of each corresponding fully controllable switching device unit (131) before the output ends of all the fully controllable switching device units (131) are intersected; and the chip control circuit (12) acquires an output current value of each fully controllable switching device unit (131) and determines, according to the output current value of each fully controllable switching device unit (131), whether same is within a normal range, and if not, the chip control circuit generates a corresponding control signal and outputs the control signal to a control end of an out-of-limit fully controllable switching device unit (131) to adjust the current value output by the fully controllable switching device unit (131), so that active current equalization is achieved, and the reliability of the circuit is improved.

Description

Power supply circuit and current sharing method

This application claims the priority of a Chinese patent application filed with the Chinese Patent Office, the application number is 201911243217.4, and the invention title is "a power supply circuit and current sharing method" on December 6, 2019. The entire content is incorporated into this application by reference. in.

Technical field

The invention relates to the field of servers, in particular to a power supply circuit and a current sharing method.

Background technique

With the rapid development of Internet technology in recent years, especially the breakthrough of key technologies such as big data and cloud platforms, the demand for storage servers is increasing, and the requirements for product stability and functions of storage servers are also getting higher and higher. In order to meet the convenience of practical applications of storage servers, the storage server hot-swappable architecture has been widely used. How to improve the reliability of the storage server's hot-swappable architecture has become a key part of the storage server power supply design. At the same time, it is also an important part of improving the reliability and applicability of storage server products.

At present, most of the hot-swap solutions used in the industry are to connect multiple MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistor, metal-oxide semiconductor field-effect transistor, hereinafter referred to as MOS) on an EFUSE chip to realize the hot-swap of the circuit. Power-pulling and over-current protection functions. The number of MOS is determined according to the actual application of the power supply. When the power load is relatively heavy and the current is relatively large, a relatively large number of MOS is required.

This solution can only realize the current sharing of all MOSs through the internal impedance matching of the MOS, without active current sharing. In most cases, the internal impedance of the MOS is not much different, but as long as the internal impedance is slightly different, or even the impedance gap is slightly larger, each external MOS will have uneven current, resulting in a large current in one of the MOS. It may exceed the designed SPEC range, which will cause serious heat generation, which will cause a short circuit of the power supply, which will burn the board and damage the server.

For this reason, a more safe and reliable power supply circuit is needed.

Summary of the invention

In view of this, the purpose of the present invention is to provide a power supply circuit and a current sharing method to improve the reliability of the circuit. The specific plan is as follows:

A power supply circuit, including: a power input circuit, a chip control circuit, a current sharing circuit, and an output circuit;

The first output terminal of the power input circuit, the input terminal of the current sharing circuit, and the first input terminal of the chip control circuit are connected to each other, the second output terminal of the power input circuit is grounded, and the current sharing circuit The output terminal of and the output terminal of the output circuit are connected to each other;

The current sharing circuit includes a plurality of fully controllable switching device units connected in parallel for current sharing, and the input terminals of each fully controllable switching device unit are connected to each other as the input terminals of the current sharing circuit, each fully controllable The control terminals of the switching device units are respectively connected to the corresponding output terminals of the chip control circuit, the output terminals of each fully controllable switching device unit are connected to each other as the output terminals of the current sharing circuit, and each fully controllable switching device unit The output terminals of are respectively connected with the corresponding current detection terminals of the chip control circuit;

Wherein, each current detection terminal of the chip control circuit is respectively connected to the output terminal of each corresponding fully controllable switching device unit before the output terminals of each fully controllable switching device unit merge.

Optionally, the fully controllable switching device unit includes a resistor and a fully controllable switching device;

The first end of the resistor is used as the input end of the fully controllable switching device unit, the second end of the resistor is connected to the input end of the fully controllable switching device, and the output end of the fully controllable switching device is used as the fully controllable switching device. The output terminal of the controllable switching device unit, and the control terminal of the fully controllable switching device serves as the control terminal of the fully controllable switching device unit.

Optionally, the second input terminal of the chip control circuit is respectively connected with the input detection terminal of each fully controllable switch device unit;

The second end of the resistance of each fully controllable switch device unit and the input end of the fully controllable switch device serve as the input detection end of the fully controllable switch device unit.

Optionally, the chip control circuit includes a control chip circuit and a sampling resistor corresponding to each fully controllable switch device unit;

The first input terminal of the control chip circuit is used as the first input terminal of the chip control circuit, and the second input terminal of the control chip circuit is used as the second input terminal of the chip control circuit. A plurality of output terminals corresponding to each fully controllable switching device unit are used as corresponding output terminals of the chip control circuit, and a plurality of current detection terminals of the control chip circuit corresponding to each fully controllable switching device unit pass corresponding sampling The resistor is connected to the output terminal of each fully controllable switching device unit, and one side of the sampling resistor connected to the output terminal of the fully controllable switching device unit serves as the current detection terminal of the chip control circuit;

Among them, each sampling resistor is the same.

Optionally, the control chip circuit includes an EFUSE chip and a CPLD chip;

The first input terminal of the EFUSE chip is used as the first input terminal of the control chip circuit, the second input terminal of the EFUSE chip is used as the second input terminal of the control chip circuit, and multiple and The output terminal corresponding to each fully controllable switching device unit and the multiple output terminals of the CPLD chip corresponding to each fully controllable switching device unit serve as multiple output terminals of the control chip circuit, and the CPLD chip Multiple input terminals corresponding to each sampling resistor serve as multiple current detection terminals of the control chip circuit.

Optionally, the control chip circuit includes an EFUSE chip;

The first input terminal of the EFUSE chip is used as the first input terminal of the control chip circuit, the second input terminal of the EFUSE chip is used as the second input terminal of the control chip circuit, and multiple and The output terminal corresponding to each fully controllable switching device unit serves as the multiple output terminals of the control chip circuit, and the multiple third input terminals of the EFUSE chip corresponding to each sampling resistor serve as the multiple output terminals of the control chip circuit. A current detection terminal.

Optionally, the control chip circuit includes an LC filter circuit; the LC filter circuit includes a first resistor and a first capacitor;

The first terminal of the first resistor serves as the first input terminal of the control chip circuit, the second terminal of the first resistor, the first terminal of the first capacitor and the first input terminal of the EFUSE chip Connected, the second terminal of the first capacitor is connected to the second input terminal of the EFUSE chip, and serves as the second input terminal of the chip control circuit.

Optionally, the control chip circuit includes a control protection resistor corresponding to the control end of each fully controllable switching device unit;

The first end of each control protection resistor is connected as the output end of the control chip circuit to the control end of the corresponding fully controllable switching device unit, and the second end of each control protection resistor is connected to the corresponding output of the control chip circuit.端连接。 End connection.

The present invention also discloses a current sharing method for a power supply circuit, which is applied to the aforementioned power supply circuit, and includes:

Receive the voltage sampling signal output from the output terminal of each fully controllable switching device unit;

Determine whether the difference between the voltage sampling signal output by each fully controllable switching device unit and the preset voltage value exceeds the preset difference range;

If it exceeds, the control signal is output to the control end of the fully controllable switching device unit that exceeds the range to control the conduction time of the fully controllable switching device unit until the voltage sampling signal does not exceed the difference range.

Optionally, if the value exceeds, output a control signal to the control terminal of the fully controllable switching device unit that exceeds the range to control the conduction time of the fully controllable switching device unit until the voltage sampling signal does not exceed the difference The scope of the process includes:

If the upper limit of the difference range is exceeded, the control signal is output to the control end of the fully controllable switching device unit that exceeds the range, so as to reduce the duty cycle of the fully controllable switching device unit and reduce the on-time until the voltage The sampling signal does not exceed the difference range;

If the lower limit of the difference range is exceeded, the control signal is output to the control terminal of the fully controllable switching device unit that exceeds the range to increase the duty cycle of the fully controllable switching device unit and increase the on-time until the voltage The sampled signal does not exceed the difference range.

In the present invention, the power supply circuit includes: a power input circuit, a chip control circuit, a current equalization circuit, and an output circuit; the first output end of the power input circuit, the input end of the current equalization circuit, and the first input end of the chip control circuit are connected to each other , The second output terminal of the power input circuit is grounded, and the output terminal of the current sharing circuit is connected to the output terminal of the output circuit; the current sharing circuit includes a plurality of fully controllable switching device units for current sharing in parallel, each of which is fully controllable The input ends of the control switching device unit are connected to each other as the input end of the current sharing circuit, the control end of each fully controllable switching device unit is connected to the corresponding output end of the chip control circuit, and the output end of each fully controllable switching device unit The output terminals of each fully controllable switching device unit are respectively connected to the corresponding current detection terminals of the chip control circuit; among them, each current detection terminal of the chip control circuit is in each fully controllable circuit. The output terminals of the switching device units are respectively connected with the output terminals of each corresponding fully controllable switching device unit before they are converged.

The chip control circuit of the present invention is provided with a current detection terminal to obtain the output current value of each fully controllable switching device unit, and judge whether it is within the normal range according to the output current value of each fully controllable switching device unit, and if not, the chip controls The circuit generates the corresponding control signal, and the chip control circuit outputs the control signal to the control end of the fully controllable switching device unit that exceeds the limit, controls the on-time of the fully controllable switching device unit, and adjusts the current value output by the fully controllable switching device unit , Make it return to the normal level, realize active current sharing and improve the reliability of the circuit.

Description of the drawings

In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only It is an embodiment of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on the provided drawings without creative work.

FIG. 1 is a schematic diagram of the structure of a power circuit disclosed in an embodiment of the present invention;

2 is a schematic diagram of another power circuit topology disclosed in an embodiment of the present invention;

FIG. 3 is a schematic diagram of another power supply circuit topology disclosed in an embodiment of the present invention;

FIG. 4 is a schematic flowchart of a current sharing method for a power supply circuit disclosed in an embodiment of the present invention.

Detailed ways

The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.

The embodiment of the present invention discloses a power supply circuit. As shown in FIG. 1, the circuit includes a power input circuit 11, a chip control circuit 12, a current sharing circuit 13, and an output circuit 14;

The first output terminal of the power input circuit 11, the input terminal of the current sharing circuit 13 and the first input terminal of the chip control circuit 12 are connected to each other, the second output terminal of the power input circuit 11 is grounded, and the output terminal of the current sharing circuit 13 is connected to the output The output ends of the circuit 14 are connected to each other;

The current sharing circuit 13 includes a plurality of fully controllable switching device units 131 connected in parallel for current sharing. The input end of each fully controllable switching device unit 131 is connected to each other as the input end of the current sharing circuit 13, each fully controllable The control terminal of the switching device unit 131 is respectively connected to the corresponding output terminal of the chip control circuit 12, the output terminal of each fully controllable switching device unit 131 is connected to each other as the output terminal of the current sharing circuit 13, and each fully controllable switching device unit The output terminals of 131 are respectively connected to the corresponding current detection terminals of the chip control circuit 12.

Specifically, the chip control circuit 12 outputs a control signal such as a PWM signal to the control terminal of each fully controllable switching device unit 131 through the output terminal, and each fully controllable switching device unit 131 is turned off according to the control signal output by the chip control circuit 12 And conduction, so as to achieve current sharing.

Specifically, since the output terminal of each fully controllable switching device unit 131 will eventually converge on the output circuit 14 to output power, in order to be able to detect the respective output current of each fully controllable switching device unit 131, a chip control circuit is required Each current detection terminal of 12 is respectively connected to the output terminal of each fully controllable switching device unit 131 before the output terminal of each fully controllable switching device unit 131 meets, and the current transmission time difference is used to collect data before the current is collected. The output signal to each fully controllable switching device unit 131 is used to determine whether the current output by each fully controllable switching device unit 131 is the same.

Specifically, after collecting the current signal output by each fully controllable switching device unit 131, the corresponding chip in the chip control circuit 12 will determine whether the current output by each fully controllable switching device unit 131 according to preset judgment conditions Within a preset range, for example, it is determined whether the difference between the current sampling signal output by each fully controllable switching device unit 131 and the preset current value exceeds the preset difference range, and if it is within the preset range, For example, within plus or minus 1A, it means that the current error output by the fully controllable switching device unit 131 is within the allowable range. It is in a normal working state and does not need to be adjusted. If it exceeds the preset difference range, it exceeds the difference range, for example , Is greater than 1A, then the output current of the fully controllable switching device unit 131 that exceeds the limit is too large, which may cause burn-in, and the output current needs to be reduced. At this time, the chip control circuit 12 generates a corresponding control signal, which is controlled by the chip. The output terminal of the circuit 12 corresponding to the over-limit fully controllable switching device unit 131 sends a control signal to the control terminal of the over-limit fully controllable switching device unit 131 to reduce the amount of the over-limit fully controllable switching device unit 131. The conduction time, thereby reducing the output current value of the over-limit fully controllable switching device unit 131, restores it to a normal level, and avoiding malfunctions. Similarly, when the over-limit fully controllable switching device unit 131 output current exceeds Smaller, the chip control circuit 12 needs to output corresponding control signals to increase the conduction time of the over-limit fully controllable switching device unit 131, so as to increase the current value output by the over-limit fully controllable switching device unit 131 to make it Restore normal levels to ensure stable power supply.

Among them, the number of fully controllable switching device units 131 is related to the output power of the power supply. When the output power of the power supply is large and the load is large, due to the large current, in order to shunt, reduce the size of each current, more power supply is needed. The control switching device unit 131 performs current sharing, and the number of the fully controllable switching device unit 131 is not limited here, and can be adjusted according to actual application requirements.

It can be seen that the chip control circuit 12 of the embodiment of the present invention sets a current detection terminal to obtain the output current value of each fully controllable switching device unit 131, and judge whether it is within the normal range according to the output current value of each fully controllable switching device unit 131 If it is not present, the chip control circuit 12 generates a corresponding control signal, and the chip control circuit 12 outputs the control signal to the control terminal of the fully controllable switching device unit 131 that exceeds the limit to control the conduction time of the fully controllable switching device unit 131, The current value output by the fully controllable switching device unit 131 is adjusted to restore it to a normal level, and the realization of active current sharing improves the reliability of the circuit.

It is understandable that the power supply circuit of the embodiment of the present invention may be applied to a server, and the voltage output by the power input circuit 11 and the output circuit 14 may both be 12V.

The embodiment of the present invention discloses a specific power supply circuit. Compared with the previous embodiment, this embodiment further illustrates and optimizes the technical solution. As shown in Figure 2, specific:

Specifically, each of the above-mentioned fully controllable switching device units 131 may include a resistor (R1, R2, R3) and a fully controllable switching device (Q1, Q2, Q3);

The first end of the resistor (R1, R2, R3) is used as the input end of the fully controllable switching device unit 131, and the second end of the resistor (R1, R2, R3) is connected to the fully controllable switching device (Q1, Q2, Q3). The input terminal is connected, the output terminal of the fully controllable switching device (Q1, Q2, Q3) is used as the output terminal of the fully controllable switching device unit 131, and the control terminal of the fully controllable switching device (Q1, Q2, Q3) is used as the fully controllable The control terminal of the switching device unit 131.

Among them, the fully controllable switching devices (Q1, Q2, Q3) can be MOSFETs.

Specifically, since the power supply circuit needs to meet the hot plug requirements, the chip control circuit 12 also has input and output voltage isolation, protection, and power consumption monitoring functions. Among them, in order to realize the power consumption monitoring function, it also includes the second input of the chip control circuit 12 Terminals are respectively connected to the input detection terminals of each fully controllable switching device unit 131;

The second end of the resistance (R1, R2, R3) of each fully controllable switching device unit 131 and the input end of the fully controllable switching device (Q1, Q2, Q3) are used as the input detection end of the fully controllable switching device unit 131 .

Specifically, the chip control circuit 12 can detect the voltage input to the fully controllable switching device unit 131 through the input detection terminal, and then monitor the power consumption.

It can be understood that the first input terminal of the chip control circuit 12 is a power supply terminal, which provides power for the chip control circuit 12.

Specifically, the aforementioned chip control circuit 12 may include a control chip circuit 121 and a sampling resistor (R8, R9, R10) corresponding to each fully controllable switch device unit 131;

The first input terminal of the control chip circuit 121 is used as the first input terminal of the chip control circuit 12, the second input terminal of the control chip circuit 121 is used as the second input terminal of the chip control circuit 12, and each of the multiple and each of the control chip circuits 121 is controlled. The output terminal corresponding to the fully controllable switching device unit 131 is used as the corresponding output terminal of the chip control circuit 12. The multiple current detection terminals of the control chip circuit 121 corresponding to each fully controllable switching device unit 131 pass through the corresponding sampling resistor (R8 , R9, R10) are connected to the output terminal of each fully controllable switching device unit 131, and the sampling resistor (R8, R9, R10) is connected to the output terminal of the fully controllable switching device unit 131 as the current detection of the chip control circuit 12. end.

Specifically, since the current signal of the fully controllable switching device unit 131 cannot be directly collected, sampling resistors (R8, R9, R9, R9, R10), using sampling resistors (R8, R9, R10) to convert the current signal into a voltage signal for analysis by the chip in the control chip circuit 121, it can be understood that the resistance of the sampling resistor (R8, R9, R10) When the value is fixed, the voltage and the current have a linear relationship, and it is possible to infer whether the current is within the preset range directly from the magnitude of the voltage.

Among them, the resistance value, model and specification of each sampling resistor (R8, R9, R10) are all the same, for example, they are all precision resistors of 0.039Ω/1%/1206 model.

Specifically, the aforementioned control chip circuit 121 may include an EFUSE chip U1 and a CPLD chip U2 (CPLD, Complex Programmable Logic Device, complex programmable logic device);

The first input terminal of the EFUSE chip U1 is used as the first input terminal of the control chip circuit 121, and the second input terminal of the EFUSE chip U1 is used as the second input terminal of the control chip circuit 121. Multiple and each of the EFUSE chips U1 is fully controllable The output terminal corresponding to the switching device unit 131 and the multiple output terminals of the CPLD chip U2 corresponding to each fully controllable switching device unit 131 are used as multiple output terminals of the control chip circuit 121. The multiple output terminals of the CPLD chip U2 are related to each sample. The input terminals corresponding to the resistors (R8, R9, R10) are used as multiple current detection terminals of the control chip circuit 121.

Among them, the EFUSE chip U1 can perform the functions of input and output voltage isolation, protection and power consumption monitoring, and control the normal on and off of the fully controllable switching device unit 131. When the power input circuit 11 is short-circuited, the EFUSE chip U1 can detect the current increase. At this time, the EFUSE chip U1 can control the fully controllable switching devices (Q1, Q2, Q3) in each fully controllable switching device unit 131 to turn off, thereby avoiding the output circuit 14 from being affected and achieving isolation protection. The function of judging whether the current output by the fully controllable switching device unit 131 exceeds the difference range by using the output voltage signal of the fully controllable switching device unit 131 can be implemented by the CPLD chip U2.

Specifically, after receiving the voltage signal from each current detection terminal, the CPLD chip U2 obtains the voltage signal corresponding to each fully controllable switching device unit 131, and separately determines whether the current of each fully controllable switching device unit 131 is Exceeding the preset difference value range, of course, because the voltage signal is collected, therefore, the voltage value corresponding to the rated current value and the corresponding difference value range can also be preset to directly determine each fully controllable switching device unit 131 Whether the voltage value exceeds the preset difference range to determine whether a control signal needs to be output. When a control signal needs to be output, the CPLD chip U2 uses the output terminal corresponding to the fully controllable switching device unit 131 to output the control signal to fully controllable The control terminal of the fully controllable switching device (Q1, Q2, Q3) in the switching device unit 131, for example, the control terminal of a MOSFET, is used to adjust the current value output by the fully controllable switching device unit 131 and realize active current sharing. .

Specifically, referring to FIG. 3, the above-mentioned control chip circuit 121 may only include the EFUSE chip U1, and the EFUSE chip U1 alone completes the active control;

The first input terminal of the EFUSE chip U1 is used as the first input terminal of the control chip circuit 121, and the second input terminal of the EFUSE chip U1 is used as the second input terminal of the control chip circuit 121. Multiple and each of the EFUSE chips U1 is fully controllable The output terminals corresponding to the switching device unit 131 are used as multiple output terminals of the control chip circuit 121, and the multiple third input terminals of the EFUSE chip U1 corresponding to each sampling resistor (R8, R9, R10) are used as multiple output terminals of the control chip circuit 121. A current detection terminal.

Specifically, the aforementioned control chip circuit 121 may further include an LC filter circuit 122; the LC filter circuit 122 includes a first resistor R4 and a first capacitor C5;

The first end of the first resistor R4 serves as the first input end of the control chip circuit 121, the second end of the first resistor R4, the first end of the first capacitor C5 and the first input end of the EFUSE chip U1 are connected, and the first capacitor The second terminal of C5 is connected to the second input terminal of the EFUSE chip U1 and serves as the second input terminal of the chip control circuit 12.

Specifically, the LC filter circuit 122 can perform filtering and filtering between the first input terminal of the control chip circuit 121 and the power input circuit 11 and between the second input terminal of the control chip circuit 121 and the fully controllable switching device unit 131. The role of the EFUSE chip U1 in the protection control chip circuit 121.

Specifically, in order to protect the circuit, the control chip circuit 121 may further include a control protection resistor (R5, R6, R7) corresponding to the control end of each fully controllable switching device unit 131;

The first terminal of each control protection resistor (R5, R6, R7) is used as the output terminal of the control chip circuit 121 to be connected to the control terminal of the corresponding fully controllable switching device unit 131, and each control protection resistor (R5, R6, R7) is connected to the control terminal of the corresponding fully controllable switching device unit 131. The second terminal of) is connected to the corresponding output terminal of the control chip circuit 121.

Specifically, the aforementioned power input circuit 11 may specifically include a second capacitor C1 and a third capacitor C2 connected in parallel;

The first common terminal of the second capacitor C1 and the third capacitor C2 is connected to the 12V power input terminal as the first output terminal of the power input circuit 11, and the second common terminal of the second capacitor C1 and the third capacitor C2 is grounded as the power input circuit 11. The second output terminal.

Specifically, the aforementioned output circuit 14 may specifically include a fourth capacitor C3 and a fifth capacitor C5 connected in parallel;

The first common terminal of the fourth capacitor C3 and the fifth capacitor C5 is connected to the output terminal of each fully controllable switching device unit 131, and the second common terminal of the fourth capacitor C3 and the fifth capacitor C5 is grounded.

It should be noted that FIGS. 2 and 3 show an example in which the current sharing circuit 13 includes three fully controllable switching device units 131. In practical applications, the fully controllable switching device unit 131 can be changed according to actual conditions. Not limited.

Correspondingly, the embodiment of the present invention also discloses a current sharing method for a power supply circuit. As shown in FIG. 4, it is applied to the aforementioned power supply circuit, and the method includes:

S11: Receive the voltage sampling signal output from the output terminal of each fully controllable switching device unit;

S12: Determine whether the difference between the voltage sampling signal output by each fully controllable switching device unit and the preset voltage value exceeds the preset difference range;

S13: If it exceeds, output a control signal to the control end of the fully controllable switching device unit that is over the range to control the conduction time of the fully controllable switching device unit until the voltage sampling signal does not exceed the difference range.

Specifically, of course, no action will be taken if it is not exceeded.

It can be seen that the embodiment of the present invention obtains the output current value of each fully controllable switching device unit, determines whether it is within the normal range according to the output current value of each fully controllable switching device unit, and if not, generates a corresponding control signal, Output the control signal to the control end of the fully controllable switching device unit that exceeds the limit, control the conduction time of the fully controllable switching device unit, adjust the output current value of the fully controllable switching device unit, and restore it to the normal level to achieve active equalization. Flow improves the reliability of the circuit.

Specifically, if the above S13 exceeds, the control signal is output to the control end of the fully controllable switching device unit that exceeds the range to control the conduction time of the fully controllable switching device unit until the voltage sampling signal does not exceed the difference range. , Can specifically include S131 and S132; among them,

S131: If the upper limit of the difference range is exceeded, output the control signal to the control end of the fully controllable switching device unit that exceeds the range to reduce the duty cycle of the fully controllable switching device unit and reduce the on-time until the voltage sampling signal Does not exceed the difference range;

S132: If the lower limit of the difference range is exceeded, output the control signal to the control terminal of the fully controllable switching device unit that exceeds the range to increase the duty cycle of the fully controllable switching device unit and increase the on-time until the voltage sampling signal Do not exceed the difference range.

It is understandable that the current sharing method of the power supply circuit in the embodiment of the present invention can be applied to the EFUSE chip or the CPLD chip of the aforementioned power supply circuit.

Finally, it should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply these entities. Or there is any such actual relationship or sequence between operations. Moreover, the terms "including", "including" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes those that are not explicitly listed. Other elements of, or also include elements inherent to this process, method, article or equipment. If there are no more restrictions, the element defined by the sentence "including a..." does not exclude the existence of other identical elements in the process, method, article, or equipment that includes the element.

Professionals may further realize that the units and algorithm steps of the examples described in the embodiments disclosed in this article can be implemented by electronic hardware, computer software, or a combination of the two, in order to clearly illustrate the possibilities of hardware and software. Interchangeability, in the above description, the composition and steps of each example have been generally described in accordance with the function. Whether these functions are executed by hardware or software depends on the specific application and design constraint conditions of the technical solution. Professionals and technicians can use different methods for each specific application to implement the described functions, but such implementation should not be considered as going beyond the scope of the present invention.

The technical content provided by the present invention is described in detail above, and specific examples are used in this article to illustrate the principle and implementation of the present invention. The description of the above embodiments is only used to help understand the method and core idea of the present invention; At the same time, for those of ordinary skill in the art, according to the idea of the present invention, there will be changes in the specific implementation and the scope of application. In summary, the content of this specification should not be construed as limiting the present invention.

Claims

A power supply circuit, characterized by comprising: a power input circuit, a chip control circuit, a current sharing circuit, and an output circuit;

The first output terminal of the power input circuit, the input terminal of the current sharing circuit, and the first input terminal of the chip control circuit are connected to each other, the second output terminal of the power input circuit is grounded, and the current sharing circuit The output terminal of and the output terminal of the output circuit are connected to each other;

The current sharing circuit includes a plurality of fully controllable switching device units connected in parallel for current sharing, and the input terminals of each fully controllable switching device unit are connected to each other as the input terminals of the current sharing circuit, each fully controllable The control terminals of the switching device units are respectively connected to the corresponding output terminals of the chip control circuit, the output terminals of each fully controllable switching device unit are connected to each other as the output terminals of the current sharing circuit, and each fully controllable switching device unit The output terminals of are respectively connected with the corresponding current detection terminals of the chip control circuit;

Wherein, each current detection terminal of the chip control circuit is respectively connected to the output terminal of each corresponding fully controllable switching device unit before the output terminals of each fully controllable switching device unit merge.
The power supply circuit according to claim 1, wherein the fully controllable switching device unit comprises a resistor and a fully controllable switching device;

The first end of the resistor is used as the input end of the fully controllable switching device unit, the second end of the resistor is connected to the input end of the fully controllable switching device, and the output end of the fully controllable switching device is used as the fully controllable switching device. The output terminal of the controllable switching device unit, and the control terminal of the fully controllable switching device serves as the control terminal of the fully controllable switching device unit.
The power supply circuit according to claim 2, further comprising a second input terminal of the chip control circuit respectively connected to the input detection terminal of each fully controllable switching device unit;

The second end of the resistance of each fully controllable switch device unit and the input end of the fully controllable switch device serve as the input detection end of the fully controllable switch device unit.
The power supply circuit according to claim 3, wherein the chip control circuit comprises a control chip circuit and a sampling resistor corresponding to each fully controllable switching device unit;

The first input terminal of the control chip circuit is used as the first input terminal of the chip control circuit, and the second input terminal of the control chip circuit is used as the second input terminal of the chip control circuit. A plurality of output terminals corresponding to each fully controllable switching device unit are used as corresponding output terminals of the chip control circuit, and a plurality of current detection terminals of the control chip circuit corresponding to each fully controllable switching device unit pass corresponding sampling The resistor is connected to the output terminal of each fully controllable switching device unit, and one side of the sampling resistor connected to the output terminal of the fully controllable switching device unit serves as the current detection terminal of the chip control circuit;

Among them, each sampling resistor is the same.
The power supply circuit according to claim 4, wherein the control chip circuit comprises an EFUSE chip and a CPLD chip;

The first input terminal of the EFUSE chip is used as the first input terminal of the control chip circuit, the second input terminal of the EFUSE chip is used as the second input terminal of the control chip circuit, and multiple and The output terminal corresponding to each fully controllable switching device unit and the multiple output terminals of the CPLD chip corresponding to each fully controllable switching device unit serve as multiple output terminals of the control chip circuit, and the CPLD chip Multiple input terminals corresponding to each sampling resistor serve as multiple current detection terminals of the control chip circuit.
The power supply circuit according to claim 4, wherein the control chip circuit comprises an EFUSE chip;

The first input terminal of the EFUSE chip is used as the first input terminal of the control chip circuit, the second input terminal of the EFUSE chip is used as the second input terminal of the control chip circuit, and multiple and The output terminal corresponding to each fully controllable switching device unit serves as the multiple output terminals of the control chip circuit, and the multiple third input terminals of the EFUSE chip corresponding to each sampling resistor serve as the multiple output terminals of the control chip circuit. A current detection terminal.
The power supply circuit according to claim 5 or 6, wherein the control chip circuit includes an LC filter circuit; the LC filter circuit includes a first resistor and a first capacitor;

The first terminal of the first resistor serves as the first input terminal of the control chip circuit, the second terminal of the first resistor, the first terminal of the first capacitor and the first input terminal of the EFUSE chip Connected, the second terminal of the first capacitor is connected to the second input terminal of the EFUSE chip, and serves as the second input terminal of the chip control circuit.
The power supply circuit according to claim 5 or 6, wherein the control chip circuit includes a control protection resistor corresponding to the control end of each fully controllable switching device unit;

The first end of each control protection resistor is connected as the output end of the control chip circuit to the control end of the corresponding fully controllable switching device unit, and the second end of each control protection resistor is connected to the corresponding output of the control chip circuit.端连接。 End connection.
A current sharing method for a power supply circuit, characterized in that it is applied to the power supply circuit according to any one of claims 1 to 8, and comprises:

Receive the voltage sampling signal output from the output terminal of each fully controllable switching device unit;

Determine whether the difference between the voltage sampling signal output by each fully controllable switching device unit and the preset voltage value exceeds the preset difference range;

If it exceeds, the control signal is output to the control end of the fully controllable switching device unit that exceeds the range to control the conduction time of the fully controllable switching device unit until the voltage sampling signal does not exceed the difference range.
The current sharing method for a power supply circuit according to claim 9, wherein if the value exceeds, output a control signal to the control terminal of the fully controllable switching device unit beyond the range to control the conduction of the fully controllable switching device unit. The on-time until the voltage sampling signal does not exceed the difference range, including:

If the upper limit of the difference range is exceeded, the control signal is output to the control end of the fully controllable switching device unit that exceeds the range, so as to reduce the duty cycle of the fully controllable switching device unit and reduce the on-time until the voltage The sampling signal does not exceed the difference range;

If the lower limit of the difference range is exceeded, the control signal is output to the control terminal of the fully controllable switching device unit that exceeds the range to increase the duty cycle of the fully controllable switching device unit and increase the on-time until the voltage The sampled signal does not exceed the difference range.