WO2021106064A1

WO2021106064A1 - Programmable controller

Info

Publication number: WO2021106064A1
Application number: PCT/JP2019/046114
Authority: WO
Inventors: 貴也太田; 瞬也長谷川
Original assignee: 三菱電機株式会社
Priority date: 2019-11-26
Filing date: 2019-11-26
Publication date: 2021-06-03
Also published as: DE112019007840T5; CN114730168A; JPWO2021106064A1; CN114730168B; JP6739689B1

Abstract

A programmable controller (1) is provided with a storage unit (20) and a controller emulator unit (13). The storage unit (20) stores firmware and control programs that are executed on a programmable controller to be emulated, and hardware information required to emulate hardware of the programmable controller to be emulated. The controller emulator unit (13) emulates the operation of hardware in the programmable controller to be emulated on the basis of the hardware information. The controller emulator unit (13) executes firmware (211a) and a control program (221a) on the emulated hardware. The firmware and hardware information in the storage unit (20) can be changed depending on the programmable controller to be emulated.

Description

Programmable controller

The present invention relates to a programmable controller to which virtualization technology is applied.

A programmable controller is a controller generally used for device control in a factory, and executes a control program for device control created by a user such as a device manufacturer. Programmable controllers may be replaced due to failure or update to a new product. However, in the programmable controller, the program specifications are not unified for each product, so even if a new product of the same manufacturer is replaced, the conventional control program cannot be used as it is. Therefore, it is necessary to modify the control program corresponding to the replaced product.

Patent Document 1 discloses a process control device to which virtualization technology is applied for a control system for process control. Virtualization technology is a technology that runs software for existing systems on new hardware. The process control device described in Patent Document 1 has a virtualization unit that operates as a substitute for the hardware on the hardware. Further, in the process control device described in Patent Document 1, the replaced operating system is installed on the virtualization unit while the operating system in use is in an operable state. In addition, the same control program as the one in use is installed on the replaced operating system. Then, the operation of the control program on the operating system in use is compared with the operation of the control program on the replaced operating system to see if the control program operates normally on the replaced operating system. Is determined. If it works normally, it will be switched to the replaced operating system, but if it does not work properly, the new installed operating system will be stopped.

Japanese Unexamined Patent Publication No. 2015-5258

When considering the replacement of a programmable controller, it is desirable that the programmable controller after replacement can be executed without changing the control program that was being executed by the programmable controller before replacement. Generally, in the case of a programmable controller, there are many types of hardware architecture and types of firmware that is installed system software, depending on the product. Therefore, the hardware architecture and firmware of the programmable controller often differ between before and after replacement. When the process control device described in Patent Document 1 is applied to a programmable controller after replacement, it is necessary to modify a virtualization unit that simulates hardware for each programmable controller before replacement. In particular, when the instruction set architecture of the programmable controller to be simulated and the instruction set architecture of the hardware installed in the controller that executes the virtualization unit are different, emulation at the instruction set level is indispensable, and various types of emulation are required. It is necessary to prepare a kind of virtualization part. In order to deal with this, it is conceivable to prepare multiple types of programmable controllers equipped with virtualization units that simulate different hardware, but this method has the problem that the number of product types becomes enormous. was there.

The present invention has been made in view of the above, and when replacing a programmable controller, the control program before replacement is used without being dependent on the hardware and firmware of the programmable controller before replacement. The purpose is to obtain a programmable controller that can be used.

The programmable controller of the present invention includes a storage unit and a controller emulator unit in order to solve the above-mentioned problems and achieve the object. The storage unit stores the firmware and control program executed by the programmable controller to be simulated, and the hardware information required to simulate the hardware of the programmable controller to be simulated. The controller emulator unit simulates the operation of the hardware in the programmable controller to be simulated based on the hardware information. The controller emulator section executes the firmware and the control program on the simulated hardware. The firmware and hardware information in the storage unit can be changed according to the programmable controller to be simulated.

The programmable controller according to the present invention has an effect that when replacing a programmable controller, the control program before replacement can be used without being dependent on the hardware and firmware of the programmable controller before replacement.

A block diagram schematically showing an example of the configuration of the programmable controller according to the first embodiment. The figure which shows typically an example of the relationship of each block which concerns the execution of the control program in Embodiment 1. The figure which shows an example of the relationship between a controller emulator part and a memory area. A flowchart showing an example of the procedure of emulation processing in the programmable controller according to the first embodiment. The figure which shows an example of the method of converting the virtual output in a programmable controller by Embodiment 1 into the real output in a programmable controller. A block diagram schematically showing an example of the configuration of the programmable controller according to the second embodiment. A time chart schematically showing an example of adjusting the input / output refresh timing according to the second embodiment. A flowchart showing an example of the procedure of emulation processing in the programmable controller according to the second embodiment. The figure which shows an example of the method of converting the virtual output by emulation by Embodiment 2 into the real output in a programmable controller. A block diagram schematically showing an example of the configuration of the programmable controller according to the third embodiment. The figure which shows an example of the method of converting the virtual output by emulation by Embodiment 3 into the real output in a programmable controller. A block diagram schematically showing an example of the configuration of the programmable controller according to the fourth embodiment. The figure which shows an example of the switching timing of a plurality of controller emulator units executed on the same arithmetic unit.

The programmable controller according to the embodiment of the present invention will be described in detail below with reference to the drawings. The present invention is not limited to these embodiments.

In the following embodiment, when the programmable controller is replaced, the operation of the programmable controller before the replacement is simulated by the programmable controller after the replacement as an example. That is, the programmable controller before replacement is replaced with the programmable controller according to the embodiment. In the following, the programmable controller according to the embodiment is simply referred to as a "programmable controller", and the programmable controller to be replaced is referred to as a "programmable controller before replacement". Further, the virtualized "programmable controller before replacement" when the operation of the "programmable controller before replacement" is simulated on the programmable controller is referred to as a "virtual controller". Further, the "programmable controller before replacement" is one of the programmable controllers to be simulated.

Embodiment 1.
FIG. 1 is a block diagram schematically showing an example of the configuration of the programmable controller according to the first embodiment. The programmable controller 1 includes a calculation unit 10, a storage unit 20, a communication interface unit 30, and an input / output interface unit 40. The calculation unit 10, the storage unit 20, the communication interface unit 30, and the input / output interface unit 40 are connected via the bus 50.

The arithmetic unit 10 is a microprocessor and a chipset configured according to a predetermined hardware architecture. The arithmetic unit 10 is also referred to as a microcomputer or a microcomputer. The calculation unit 10 has a virtualization unit 11 which is a functional unit that simulates an execution environment in which a control program for the hardware of another type of programmable controller 1 is executed on the hardware of the programmable controller 1.

The virtualization unit 11 has a management unit 12, a controller emulator unit 13, a mapping information generation unit 15, and a memory-mapped I / O (Input / Output) area 14.

The management unit 12 is a functional unit that manages software executed by the calculation unit 10. In the first embodiment, the management unit 12 is an operating system (OS) having a scheduling function that enables a plurality of software to be executed in parallel.

The controller emulator unit 13 is a functional unit that simulates the operation of hardware in the programmable controller before replacement. Further, the controller emulator unit 13 is a functional unit that executes the firmware and the control program read from the storage unit 20 and used in the programmable controller before replacement on the hardware simulating the firmware and the control program. The programmable controller before replacement simulated by the controller emulator unit 13 becomes a virtual controller. The controller emulator unit 13 executes an instruction by using the hardware information described later regarding the programmable controller before replacement, and also simulates the operation of the peripheral device of the microcomputer in the programmable controller before replacement to execute the firmware. Further, the controller emulator unit 13 executes a control program on the firmware.

The memory-mapped I / O area 14 is an area for virtualizing the input / output between the controller emulator unit 13 and the peripheral devices of the microcomputer, which is generated when the firmware and the control program are simulated. In one example, the memory-mapped I / O area 14 is a virtualization of the input / output control registers of the microcomputer of the programmable controller before replacement. An address is assigned to the memory-mapped I / O area 14 as a memory area to be emulated.

The mapping information generation unit 15 is a functional unit that generates input / output mapping information in which the input / output numbers of the input / output terminals of the programmable controller 1 and the input / output numbers of the input / output terminals of the programmable controller before replacement are associated with each other. .. The mapping information generation unit 15 stores the generated input / output mapping information in the input / output mapping information storage unit 24 of the storage unit 20. In one example, the mapping information generation unit 15 generates input / output mapping information so that the input / output number of the programmable controller before replacement and the input / output number of the programmable controller 1 are the same. Further, in one example, the mapping information generation unit 15 refers to the input / output numbers in the control program, the input / output numbers in the control program, that is, the input / output numbers in the programmable controller before replacement, and the input / output numbers in the programmable controller 1. Correspond with the number.

The storage unit 20 includes a firmware storage unit 21, a control program storage unit 22, a hardware information storage unit 23, and an input / output mapping information storage unit 24. The storage unit 20 is a storage device that can rewrite the stored data, and for example, is a hard disk device or a non-volatile storage device such as an SSD (Solid State Drive). Further, the storage unit 20 has a volatile storage device such as a RAM (Random Access Memory) for loading a program or temporarily holding data when executing a process in the calculation unit 10. You may.

The firmware storage unit 21 is a functional unit that stores the firmware executed by the programmable controller before replacement. The programmable controller before replacement is one of the programmable controllers to be simulated. The firmware storage unit 21 stores the firmware in the binary data format. The control program storage unit 22 is a functional unit that stores the control program executed by the programmable controller before replacement.

The hardware information storage unit 23 is a functional unit that stores hardware information necessary for simulating the hardware of the programmable controller before replacement. The hardware information includes hardware configuration information that depends on the hardware of the programmable controller before replacement simulated by the controller emulator unit 13. The hardware configuration information includes a memory map, instruction simulation processing, register configuration, simulation processing at the time of each register operation, and the like.

The input / output mapping information storage unit 24 is a functional unit that stores input / output mapping information. The input / output mapping information is information in which the input / output numbers assigned to the input / output terminals in the input / output interface unit 40 of the programmable controller 1 are associated with the input / output numbers assigned to the input / output terminals in the virtual controller. .. The input / output numbers assigned to the input / output terminals in the virtual controller correspond to the input / output numbers assigned to the input / output terminals in the programmable controller before replacement. For the input / output mapping information, when the controller emulator unit 13 accesses the memory-mapped I / O area 14, the input / output number of the memory-mapped I / O area 14 is set to the actual input / output terminal of the input / output interface unit 40. Used when converting to input / output numbers.

The communication interface unit 30 is connected to the human interface 70, which is an external device of the programmable controller 1. The human interface 70 is a device that can access the storage unit 20 of the programmable controller 1. The human interface 70 is, for example, an information processing device such as a personal computer. The human interface 70 stores firmware, control program, hardware information, or input / output mapping information in the storage unit 20, or stores firmware, control program, hardware information, or input / output mapping information already stored in the storage unit 20. It can be deleted from the storage unit 20. Further, the human interface 70 is a device capable of receiving the result of automatic allocation of input / output mapping information and confirming the result by the user. Further, the human interface 70 is a device capable of modifying the contents of the input / output mapping information. For example, the user can perform wiring to the input / output terminals of the programmable controller 1 while viewing the input / output mapping information on the human interface 70. Further, when the user changes the wiring to the input / output terminals, the user can change the input / output mapping information on the human interface 70.

Hardware information and firmware define the operating environment of the programmable controller before replacement. Therefore, the hardware information and the firmware, which are the operating environment of the programmable controller before the replacement to be simulated, are written from the human interface 70 to the storage unit 20 and executed by the virtualization unit 11 before the replacement. It is possible to simulate the desired operation of the programmable controller of.

The input / output interface unit 40 has an input terminal 41, an output terminal 42, and an input / output control unit 43. The input terminal 41 is connected to the input device via wiring. An example of an input device is a switch, sensor or rotary encoder. The output terminal 42 is connected to the output device via wiring. An example of an output device is a relay, valve or actuator. The input terminals 41 are sequentially numbered from the input numbers "0" to "N" (N is an arbitrary natural number). The output terminals 42 are sequentially numbered from output numbers "0" to "N". In FIG. 1, the input number "i" is expressed as "Input i" (i is a natural number from 0 to N), and the output number "i" is expressed as "Output i". Further, in FIG. 1, a switch 81 is attached to the input terminal 41 of the input number “0”, and a lamp 91 is attached to the output terminal 42 of the output number “0”. In this specification, the input terminal 41 and the output terminal 42 are collectively referred to as an input / output terminal, and the input device and the output device are collectively referred to as an input / output device.

The input / output control unit 43 is a functional unit that controls the transfer of data between the memory-mapped I / O area 14 and the input / output device via the input terminal 41 and the output terminal 42. Specifically, when the input / output control unit 43 accesses the input terminal 41 or the output terminal 42, the input / output control unit 43 cooperates with the controller emulator unit 13 to execute the input / output refresh process. The input / output refresh process is a process of setting the calculated output information in the output device via the output terminal 42 and receiving the input information from the input device via the input terminal 41.

FIG. 1 shows a case where one input device and one output device are connected to the programmable controller 1, but the number of input devices and output devices connected to the programmable controller 1 is not limited. .. That is, a plurality of input devices or a plurality of output devices may be connected to the programmable controller 1.

Further, the way in which the input / output device is connected to the input / output terminal in the programmable controller before replacement may be different from the way in which the input / output device is connected to the input / output terminal in the programmable controller 1. In such a case, the input / output number assigned to the input / output terminal of the programmable controller 1 and the input / output number assigned to the input / output terminal of the programmable controller before replacement are associated with each other. Output mapping information is used. That is, the controller emulator unit 13 converts the output destination of the output information from the virtualized output destination in the memory-mapped I / O area 14 to the actual output destination of the programmable controller 1 by using the input / output mapping information. To do. Further, the controller emulator unit 13 converts the virtualized input source in the memory-mapped I / O area 14 into the actual input source in the programmable controller 1 and receives the input information.

FIG. 2 is a diagram schematically showing an example of the relationship of each block related to the execution of the control program in the first embodiment. Here, the controller emulator unit 13, the firmware 211a, and the control program 221a are shown as blocks.

Firmware 211a is provided as a binary data format file that can be executed by the microcomputer mounted on the programmable controller before replacement.

The controller emulator unit 13 is an instruction set simulator (ISS) that can decode a binary file indicating firmware 211a, interpret it with software, and execute it. Further, the controller emulator unit 13 is configured as one process on the management unit 12. Here, in order to execute the firmware 211a for hardware having a different instruction set architecture, the controller emulator unit 13 is specifically described as an ISS, but the controller emulator is provided by a hardware function having an equivalent function. Part 13 may be substituted. Further, when executing the firmware 211a for hardware having the same instruction set architecture, the firmware 211a may be directly executed by the process of the controller emulator unit 13.

The control program 221a is provided as data converted into a format that can be executed by the programmable controller before replacement. The data format and execution method of the control program 221a vary from programmable controller to programmable controller. As the execution method, a method executed by the firmware 211a in an interpreter method, a method equipped with dedicated hardware capable of directly executing the control program 221a, or a method combining both of them is assumed. In the first embodiment, the firmware 211a directly interprets and executes the control program 221a in an interpreter system. As shown in FIG. 2, when the firmware 211a is executed on the controller emulator unit 13, the logic for executing the control program 221a is executed, and as a result, the execution of the control program 221a can be realized. ..

FIG. 3 is a diagram showing an example of the relationship between the controller emulator unit and the memory area. FIG. 3 shows the controller emulator unit 13, the memory area 310 emulated by the controller emulator unit 13, and the memory space 350 allocated to the process of the controller emulator unit 13.

A memory address is assigned to the ROM (Read Only Memory), RAM, and memory-mapped I / O area 14 included in the virtual controller in the memory area 310. The memory-mapped I / O area 14 is a register area of the peripheral device of the microcomputer in the programmable controller before replacement.

In the memory space 350 allocated to the process of the controller emulator unit 13, the control program 221a converted into the execution code for the programmable controller 1, the firmware 211a in the binary data format, the hardware information 231 and the input / output mapping information 241 and are arranged.

The hardware information 231 and input / output mapping information 241 of the programmable controller before replacement, and the control program 221a and firmware 211a executed by the programmable controller to be simulated are the memory spaces allocated to the process of the controller emulator unit 13. Expanded to 350. In the control program 221a, the control program 221 in the memory area 310 is converted into an execution code for the programmable controller 1. The firmware 211a is obtained by converting the firmware 211 of the memory area 310 into a binary data format. These control programs 221a, firmware 211a, hardware information 231 and input / output mapping information 241 are referred to by the controller emulator unit 13 as necessary, or their values are updated.

In the input / output mapping information 241, the input number assigned to the input terminal 41 of the programmable controller 1 is assigned to the input number of the input terminal of the virtual controller. Therefore, the input number of the input terminal 41 in the programmable controller 1 is associated with the information for identifying the virtual controller to be assigned and the input number of the input terminal in this virtual controller. Further, in the input / output mapping information 241, the output number assigned to the output terminal 42 of the programmable controller 1 is assigned to the virtual controller. Therefore, the output number of the output terminal 42 in the programmable controller 1 is associated with the information that identifies the virtual controller to be assigned and the output number of the output terminal in this virtual controller.

The controller emulator unit 13 has a virtual program counter 131 and a virtual general-purpose register 132 in order to simulate the operation of the arithmetic unit including the CPU (Central Processing Unit). The substance of the virtual program counter 131 and the virtual general-purpose register 132 are both one data on the process of the controller emulator unit 13. The virtual general-purpose register 132 stores arbitrary data generated as a result of arithmetic processing in the controller emulator unit 13.

The virtual program counter 131 is data for indicating an address on the memory area currently being executed by the controller emulator unit 13, that is, on the memory area 310 to be emulated. The controller emulator unit 13 interprets and executes the firmware 211 at the address held in the virtual program counter 131. The substance of the firmware 211 is the firmware 211a on the memory space 350 allocated to the process of the controller emulator unit 13. Therefore, the controller emulator unit 13 converts the address stored in the virtual program counter 131 into the address of the memory space 350, and reads the data of the firmware 211a in the actual binary data format from the memory space 350.

The logic for interpreting and executing the binary data format firmware 211a as an instruction and the process for simulating the interpreted instruction are stored in the hardware information 231. Therefore, the controller emulator unit 13 simulates the instruction based on the hardware information 231.

When the memory-mapped I / O area 14 of the memory area 310 to be emulated is accessed by the execution of the firmware 211a, a process for simulating the corresponding hardware operation by software is executed. Since the simulated processing of the peripheral device of the microcomputer is stored in the hardware information 231, the controller emulator unit 13 simulates the hardware operation related to the access to the memory-mapped I / O area 14 based on the hardware information 231. To do. When the corresponding hardware operation is for controlling the input / output of the programmable controller 1, the controller emulator unit 13 further refers to the input / output mapping information 241 and follows the allocation of the input / output mapping information 241. Information is input / output via the actual input terminal 41 or output terminal 42. For example, the controller emulator unit 13 converts the input / output numbers of the virtual input / output terminals to be accessed into the input / output numbers of the actual input / output terminals, receives the input information from the actual input terminals 41, or actually outputs the data. Output information is output to the terminal 42. This is because the memory-mapped I / O area 14 calculated by the controller emulator unit 13 is in the programmable controller before replacement, so that the input / output numbers of the registers that actually perform the input / output control in the programmable controller 1 are used. This is because conversion is required.

Next, the operation of the programmable controller 1 having such a configuration will be described. FIG. 4 is a flowchart showing an example of the procedure of the emulation process in the programmable controller according to the first embodiment.

When the controller emulator unit 13 is generated as a process on the management unit 12 by the arithmetic unit 10, the controller emulator unit 13 includes the hardware information 231 and the input / output mapping information 241 about the programmable controller before the replacement, and the input / output mapping information 241 before the replacement. The firmware 211a and the control program 221a executed by the programmable controller are read from the storage unit 20 and loaded into the memory (step S11).

Next, the controller emulator unit 13 sets the virtual program counter 131 to the firmware startup address, which is the address for booting the firmware 211 (step S12). In the initial state, the controller emulator unit 13 sets the firmware startup address on the memory area 310 that emulates the address for fetching instructions.

After that, the controller emulator unit 13 converts the firmware startup address set in the virtual program counter 131 to the address of the firmware 211a in the binary data format loaded in the memory, and decodes the firmware 211a for one instruction at the corresponding address. , Execute (step S13). This process is called a microcomputer instruction decoding process. Here, there are various types of microcomputer instructions such as normal operation, logical operation, floating point operation, jump, comparison, memory transfer, NOP (no operation), and privileged instruction. Execute the process to simulate the instruction. The privileged instructions include control register operation, interrupt level change, supervisor call, and the like.

For example, it is assumed that the microcomputer of the programmable controller before replacement has the instruction "ADD R1, R2, # 100". This instruction realizes the process of "storing the result of adding the value of the R2 register and the immediate value 100 to the R1 register". The controller emulator unit 13 of the virtualization unit 11 executes equivalent processing according to this instruction, and stores the result in the virtual general-purpose register 132.

Next, the controller emulator unit 13 determines whether the instruction to be executed is an instruction to access the memory (step S14). When the instruction to be executed is not an instruction to access the memory (No in step S14), the controller emulator unit 13 refers to the hardware information 231 and executes the instruction process to be executed (step S15). ). This process is called a microcomputer instruction simulation process.

If the instruction to be executed is an instruction to access the memory (Yes in step S14), the controller emulator unit 13 determines whether the access destination address is the memory-mapped I / O area 14. (Step S16). When the access destination address is not the memory-mapped I / O area 14 (No in step S16), the microcomputer instruction simulation process in step S15 is executed. When the access destination address is the memory-mapped I / O area 14 (Yes in step S16), the controller emulator unit 13 refers to the hardware information 231 and performs instruction processing to be executed. The hardware simulation process for the corresponding peripheral device is executed (step S17). This process is called a microcomputer peripheral device simulation process. Here, the controller emulator unit 13 simulates the hardware operation according to the hardware information 231. Further, when the access target accesses the register that controls the input / output of the programmable controller 1, the controller emulator unit 13 obtains the input information or the output information via the actual input / output terminals according to the input / output mapping information 241. Reflect. Specifically, the controller emulator unit 13 refers to the input / output mapping information 241 and outputs the output information to the output device assigned to the input / output mapping information 241 via the input / output control unit 43 or from the input device. Import the input information.

After that or after step S15, the controller emulator unit 13 sets the virtual program counter 131 to the address corresponding to the next instruction of the firmware 211 (step S18), and the process returns to step S13.

FIG. 5 is a diagram showing an example of a method of converting the virtual output of the programmable controller according to the first embodiment into the actual output of the programmable controller. Here, it is assumed that the output control in the programmable controller before replacement is controlled by using the output control register 341. Further, the output control register 341 is a register mapped to the address "0x10001000" of the memory area 310 to be emulated, and each bit "b0" to "b15" is used as an output terminal of each output number of the programmable controller before replacement. It shall be supported.

In the programmable controller before replacement, for example, when it is desired to set the output terminal of the output number "1" to "ON", the first bit of the output control register 341 may be set to "1".

If the firmware on the controller emulator unit 13, that is, the virtual controller, executes a process for turning the output terminals of the output numbers "1" and "2" to "ON", the controller emulator unit 13 will perform the process. , The hardware simulation process of the output control register 341 is executed. That is, the controller emulator unit 13 performs virtual output to the virtual register 141 in the memory-mapped I / O area 14 corresponding to the output control register 341. At this time, the first bit "X1" and the second bit "X2" of the virtual register 141 are set to "ON". Since this output control register 341 is a register for controlling the input / output of the programmable controller 1, hardware simulation processing is performed on the actual input / output control register 441 of the programmable controller 1 with reference to the input / output mapping information 241. The result of is output. That is, the input / output control unit 43 controls "ON" or "OFF" of the input terminal 41 or the output terminal 42 based on the contents of the input / output control register 441.

In the input / output mapping information 241 of FIG. 5, the output numbers “0”, “1”, and “2” of the programmable controller 1 are the output numbers “2” and “1” on the virtual controller simulated by the controller emulator unit 13, respectively. , "0". Therefore, when the values of the output numbers "0", "1", and "2" on the virtual controller are "0", "1", and "1", respectively, the output number "0" of the output terminal 42, The values of "1" and "2" are set to "1", "1", and "0", respectively. Similarly, the values of the output terminals after the output number "3" on the virtual controller are set to the output terminal 42 of the associated programmable controller 1 output number with reference to the input / output mapping information 241. In the example of FIG. 5, all the values after the output number “3” on the virtual controller are “0”.

In the first embodiment, the controller emulator unit 13 executes while decoding one instruction of the firmware 211a, and simulates the instruction. If the instruction access destination is the memory-mapped I / O area 14, the hardware is simulated at the same time. When the simulation for one instruction is completed, the controller emulator unit 13 continues the process of performing the simulation while executing the next instruction. Here, the simulated processing of each instruction referred to when the firmware 211a is executed and the simulated processing of the hardware when the memory-mapped I / O area 14 is accessed are held in the hardware information 231 and the firmware 211 and The hardware information 231 can be changed through the communication interface unit 30. Therefore, by exchanging these, it is possible to freely exchange the programmable controller to be simulated. Further, since the input / output mapping information 241 referred to when accessing the input / output terminals of the programmable controller 1 in the hardware simulation process can be manually changed by the user, the virtual in the virtual controller simulated on the controller emulator unit 13 It is possible to freely change the correspondence between the input / output and the actual input / output of the programmable controller 1.

In the first embodiment, the programmable controller before replacement has been described as a method in which the firmware directly interprets and executes the control program. However, in the case of simulating a programmable controller equipped with dedicated hardware for executing the control program. Even if there is, the execution of the control program can be simulated in the same manner by preparing the hardware information for simulating this dedicated hardware.

Further, in the first embodiment, the firmware 211, the control program 221 and the hardware information 231 are replaced, or the contents of the input / output mapping information 241 are changed via the communication interface unit 30. However, the programmable controller 1 has an interface for attaching a storage medium in which such information is stored, and the programmable controller 1 is configured to read data from the storage medium via this interface and perform a simulated operation. You may. Examples of storage media are SD memory cards, CD (Compact Disc) -ROM, DVD (Digital Versatile Disc or Digital Video Disc) -ROM, BD (Blu-ray (registered trademark) Disc) -ROM, CompactFlash (registered trademark). ), Blu-ray (registered trademark) discs, etc.

Embodiment 2.
FIG. 6 is a block diagram schematically showing an example of the configuration of the programmable controller according to the second embodiment. Hereinafter, a part different from the first embodiment will be described. Further, the same components as those in the first embodiment are designated by the same reference numerals, and the description thereof will be omitted.

In the second embodiment, the controller emulator unit 13 estimates the time required to execute the firmware instruction in the programmable controller before replacement, calculates the start time of the input / output refresh process in the programmable controller before replacement, and obtains the result. Further has a function of notifying the input / output timing adjusting unit 431 described later. Specifically, the controller emulator unit 13 decodes one instruction statement of the firmware 211a and estimates the instruction execution time, which is the time when the instruction is actually executed by the programmable controller before replacement, each time the firmware 211a is executed. Further, the controller emulator unit 13 calculates the integrated instruction execution time by integrating the instruction execution time from the time when the previous input / output refresh process is completed. Then, when the controller emulator unit 13 accesses the register for input / output refresh, the time when the scan process for executing the control program on the programmable controller before replacement is completed by using the integrated instruction execution time at that time. That is, the time when the input / output refresh process actually starts is estimated. The controller emulator unit 13 outputs the estimated start time of the input / output refresh process to the input / output timing adjustment unit 431.

The input / output control unit 43 of the programmable controller 1 further includes an input / output timing adjusting unit 431. The input / output timing adjusting unit 431 has a function of making the timing of performing input / output refresh in the programmable controller 1 equal to the timing of performing input / output refresh in the programmable controller before replacement. The input / output timing adjustment unit 431 puts the input / output control unit 43 in the standby state until the start time of the input / output refresh process estimated by the controller emulator unit 13, and when the start time of the input / output refresh process is reached, the input / output control unit 431. The input / output refresh process by 43 can be executed.

FIG. 7 is a time chart schematically showing an example of adjusting the input / output refresh timing according to the second embodiment. In FIG. 7, the operation on the programmable controller before replacement is shown in the upper row, and the operation on the controller emulator unit 13 is shown in the lower row. As shown in the operation of the programmable controller before replacement, the programmable controller generally has a scan 511 that executes a control program and captures input information of an external input device or a calculation result to an external output device. I / O refresh 521, which outputs certain output information, is repeatedly executed. As a result, control of the device and the like is realized.

Here, consider the case where the programmable controller before replacement is old and the calculation speed is slow. In such a case, the execution of the scan 512 on the controller emulator unit 13 ends earlier than the execution of the scan 511 on the programmable controller before the replacement. Therefore, in the second embodiment, in such a case, after the scan 512 on the controller emulator unit 13, the input / output timing adjustment unit 431 provides the time for the timing adjustment 532 shown in FIG. 7. As a result, the input / output refresh 521 in the programmable controller before replacement and the input / output refresh 522 on the controller emulator unit 13 are adjusted so as to start at the same time. As a result, the input from the device to be controlled and the output timing to the device are the same as the operation of the actual device.

FIG. 8 is a flowchart showing an example of the procedure of emulation processing in the programmable controller according to the second embodiment. In the following, a part different from FIG. 4 of the first embodiment will be described.

After step S11, the controller emulator unit 13 initializes the integration instruction execution time (step S31). After that, the process moves to step S12.

After step S15, the controller emulator unit 13 estimates the instruction execution time in the programmable controller before the replacement of the emulated instruction and adds it to the integrated instruction execution time at that time (step S32). The integrated instruction execution time to which the instruction execution time is added becomes the new integrated instruction execution time. After that, the process proceeds to step S18.

When the access destination address is the memory-mapped I / O area 14 in step S16 (Yes in step S16), the controller emulator unit 13 determines whether the access destination address is an I / O refresh register. (Step S33). If the access destination address is not an I / O refresh register (No in step S33), the controller emulator unit 13 executes hardware simulation processing on the corresponding register (step S34). After that, the process proceeds to step S32.

When the access destination address is a register for input / output refresh (Yes in step S33), the controller emulator unit 13 acquires the integration instruction execution time at that time and simulates from the integration instruction execution time. The start time of the input / output refresh process in the programmable controller of the actual machine is estimated (step S35). Next, the controller emulator unit 13 outputs the estimated start time of the input / output refresh process to the input / output timing adjusting unit 431 (step S36). After that, the controller emulator unit 13 goes into a standby state until it receives a notification from the input / output timing adjusting unit 431 that the execution of the input / output refresh has been completed (step S37).

Upon receiving the start time of the input / output refresh process, the input / output timing adjustment unit 431 sets the start time of the input / output refresh process (step S38). Then, the input / output timing adjustment unit 431 determines whether the current time has reached the start time of the input / output refresh process (step S39), and when the current time has not become the start time of the input / output refresh process (step). In the case of No in S39), the standby state is set.

When the current time becomes the start time of the input / output refresh process (Yes in step S39), the input / output timing adjustment unit 431 permits the input / output control unit 43 to execute the input / output refresh process. To do. That is, the input / output control unit 43 executes an input / output refresh process for capturing input information or setting output information (step S40). After that, the input / output timing adjustment unit 431 notifies the controller emulator unit 13 of the completion of the execution of the input / output refresh process (step S41).

When the controller emulator unit 13 receives a notification from the input / output timing adjustment unit 431 that the execution of the input / output refresh process is completed (step S42), the process shifts to step S31.

Here, a method has been described in which the controller emulator unit 13 estimates the instruction execution time of the same instruction on the actual machine each time the instruction of the microcomputer is executed, and estimates the scan time on the actual machine based on the integrated instruction execution time. Other time estimation methods may be used. For example, the instruction execution time may be estimated for each instruction of the control program 221 and the scan time on the actual machine may be estimated based on the integrated instruction execution time.

FIG. 9 is a diagram showing an example of a method of converting the virtual output by emulation according to the second embodiment into the actual output in the programmable controller. Here, the operation at the time of output when a value is set in the virtual register 141 corresponding to the output control register 341 described in the first embodiment and reflected in the actual output will be described.

When the output control register 341 is accessed on the firmware 211a executed by the controller emulator unit 13, a virtual output is output to the virtual register 141 in the same manner as the output to the output control register 341 in the programmable controller before replacement. It is output. The virtual output is premised on the connection of input / output devices and the hardware configuration in the programmable controller before replacement. Therefore, when input / output is performed to the input / output terminals of the actual programmable controller 1, the output is converted according to the connection of the input / output devices in the programmable controller 1 and the hardware configuration. That is, the output number in the virtual output is converted into the actual output number by referring to the input / output mapping information 241. In the second embodiment, at this time, the controller emulator unit 13 calculates the input / output refresh start time “A” with reference to the integration instruction execution time 435. That is, in this case, the output time of the output information from the actual output terminal 42 is calculated. The actual output number and the input / output refresh start time "A" obtained here are held in the input / output timing adjusting unit 431. Then, when the start time "A" is reached, the input / output timing adjustment unit 431 notifies the input / output control unit 43 that the start time of the input / output refresh process has been reached, and the input / output control unit 43 informs the input / output control unit 43 of each output information. Output.

In the second embodiment, the controller emulator unit 13 estimates the instruction execution time required when the instruction executed by the controller emulator unit 13 is executed by the programmable controller to be simulated, and further estimates the integrated instruction execution time. Then, when the access destination address of the instruction to be executed is a register for input / output refresh, the controller emulator unit 13 starts the input / output refresh process in the programmable controller to be simulated by using the integrated instruction execution time. Estimate the time. The input / output timing adjustment unit 431 adjusts the timing of performing the input / output refresh process in the programmable controller 1 by using the start time of the input / output refresh process. This has the effect that the timing of input / output refresh in the programmable controller 1 can be made equal to that of the actual programmable controller to be simulated.

Embodiment 3.
FIG. 10 is a block diagram schematically showing an example of the configuration of the programmable controller according to the third embodiment. Hereinafter, a part different from the first embodiment will be described. Further, the same components as those in the first embodiment are designated by the same reference numerals, and the description thereof will be omitted.

In the third embodiment, the programmable controller 1 has a plurality of arithmetic units 10A and 10B. Each of the calculation units 10A and 10B has virtualization units 11A and 11B as described in the first embodiment. That is, the programmable controller 1 is provided with a plurality of virtualization units 11A and 11B. The virtualization unit 11A has a management unit 12A, a controller emulator unit 13A, a memory-mapped I / O area 14A, and a mapping information generation unit 15A, similarly to the calculation unit 10 of the first embodiment. Similarly, the virtualization unit 11B includes a management unit 12B, a controller emulator unit 13B, a memory-mapped I / O area 14B, and a mapping information generation unit 15B. Thereby, the programmable controller 1 can simulate a plurality of programmable controllers before replacement. That is, the firmware 211a is executed on the virtualization unit 11A, and the control program 221a is executed on the firmware 211a. The firmware 212a is executed on the virtualization unit 11B, and the control program 222a is executed on the firmware 212a. Although FIG. 10 shows a case where two calculation units 10A and 10B are provided, three or more calculation units may be provided.

With such a configuration, the hardware information storage unit 23 stores the number of hardware information of the controller emulator units 13A and 13B provided in the virtualization units 11A and 11B. Further, the firmware storage unit 21 stores the number of firmwares 211a and 212a of the controller emulator units 13A and 13B provided in the virtualization units 11A and 11B, and the control program storage unit 22 is provided in the virtualization units 11A and 11B. Stores the number of control programs 221a and 222a of the controller emulator units 13A and 13B. The input / output mapping information storage unit 24 stores one input / output mapping information common to the plurality of controller emulator units 13.

In FIG. 10, the switch 82 is further connected to the input terminal 41 of the input number “60”, and the magnet switch 92 is further connected to the output terminal 42 of the output number “60”.

In the programmable controller 1 shown in FIG. 10, the control program 221a is executed by the calculation unit 10A, the control program 222a is executed by the calculation unit 10B, and the external input devices and output devices are executed by these control programs 221a and 222a. Is controlled.

In the example of FIG. 10, the input terminal 41 from the input numbers "0" to "59" and the output terminal 42 from the output numbers "0" to "59" are controlled by the control program 221a. Further, the input terminals 41 from the input numbers "60" to "139" and the output terminals 42 from the output numbers "60" to "139" are controlled by the control program 222a.

The operations of the controller emulator units 13A and 13B are the same as those described in the flowchart of FIG. 4 of the first embodiment, and the respective controller emulator units 13A and 13B operate independently. Here, a case is shown in which the hardware of the programmable controller 1 has a plurality of arithmetic units 10A and 10B, and different controller emulator units 13A and 13B are executed in parallel on the respective arithmetic units 10A and 10B. .. However, when the hardware of the programmable controller 1 has one arithmetic unit 10, the virtualization unit 11 may have a plurality of controller emulator units 13A and 13B by switching the operation in a time division manner. In this case, the processes in the controller emulator units 13A and 13B are executed while switching the operation in a time division manner.

FIG. 11 is a diagram showing an example of a method of converting the virtual output by emulation according to the third embodiment into the actual output in the programmable controller. When the controller emulator unit 13A accesses the input / output interface unit 40, that is, when the firmware accesses the hardware for input / output control as in the process in step S17 of FIG. 4, the input / output is input / output. The mapping information 241 is referred to, and the corresponding actual output number is output to the output terminal 42.

Note that, in FIG. 11, the content of the input / output mapping information 241 is different from that in FIG. In the first embodiment, the calculation unit 10 simulates one virtual controller, but in the third embodiment, the calculation units 10A and 10B simulate two virtual controllers. Therefore, in the "Virtual controller allocation" field of the input / output mapping information 241, either the virtual controller A simulated by the calculation unit 10A or the virtual controller B simulated by the calculation unit 10B is input.

Here, the case where the firmware 211a executed on the controller emulator unit 13A accesses the actual input / output terminals will be described as an example. The output control register 341 is the same as that described in the first embodiment, is an output control register of the actual programmable controller to be simulated, and each bit corresponds to each output number of the programmable controller.

When writing to the 1st bit and the 2nd bit of this output control register 341 is performed on the controller emulator unit 13A, the corresponding hardware simulation process is executed. That is, the controller emulator unit 13A writes to the first bit and the second bit of the virtual register 141 of the memory-mapped I / O area 14 corresponding to the output control register 341. Then, the controller emulator unit 13A refers to the input / output mapping information 241 and reflects the information on the actual output terminal 42. In the input / output mapping information 241, output numbers "0" to "59" are assigned to "virtual controller A" simulated by the controller emulator unit 13A, and output numbers "0" and "1" of the programmable controller 1 are assigned. , "2" are associated with the output numbers "2", "1", and "0" of the virtual register on the controller emulator unit 13A, respectively. Therefore, the controller emulator unit 13A sets the values of the output numbers "0", "1", and "2" of the output terminal 42 to "1", "1", and "0", respectively, and sets the actual input / output control register. Output to 441. When the actual input / output terminals are accessed from the controller emulator unit 13B, the actual input / output terminals are similarly accessed based on the allocation of the input / output mapping information 241.

With reference to the common input / output mapping information 241 in this way, the input / output operations of the plurality of controller emulator units 13A and 13B are simulated. As a result, the input terminals 41 from the input numbers "0" to "59" and the output terminals 42 from the output numbers "0" to "59" are controlled by the control program 221a. Further, it is possible to realize an operation in which the input terminals 41 from the input numbers "60" to "139" and the output terminals 42 from the output numbers "60" to "139" are controlled by the control program 222a. Then, by changing the input / output mapping information 241 it is possible to change the actual allocation relationship between the plurality of controller emulator units 13A and 13B to the input terminal 41 and the output terminal 42.

In the above description, the input / output of the controller emulator units 13A and 13B are assigned to the actual input terminal 41 and output terminal 42 of any one of the programmable controllers 1. However, when it is necessary to connect the input / output between the controller emulator units 13A and 13B, the input / output between the controller emulator units 13A and 13B may be internally connected. In this case, for example, when the input / output relationship between the controller emulator units 13A and 13B is described in the input / output mapping information 241 and one controller emulator unit accesses the output connected to the other controller emulator unit, for example, It is possible to use a method of reflecting the output result in the input of the other controller emulator unit by inter-process communication.

In the third embodiment, the programmable controller 1 has a plurality of controller emulator units 13A and 13B, and the respective controller emulator units 13A and 13B simulate different operations of the programmable controller before replacement. This makes it possible to integrate a plurality of existing control programs 221a and 222a on the hardware of one programmable controller 1 and execute them at the same time.

Embodiment 4.
FIG. 12 is a block diagram schematically showing an example of the configuration of the programmable controller according to the fourth embodiment. Hereinafter, the parts different from the first and third embodiments will be described. Further, the same components as those in the first and third embodiments are designated by the same reference numerals, and the description thereof will be omitted.

As in the case of the third embodiment, the programmable controller 1 has a plurality of controller emulator units 13A and 13B. However, in the third embodiment, the programmable controller 1 has a plurality of physically different arithmetic units 10A and 10B, and the respective arithmetic units 10A and 10B have the controller emulator units 13A and 13B. In the fourth embodiment, the programmable controller 1 has one calculation unit 10, and the virtualization unit 11 in the calculation unit 10 has a plurality of controller emulator units 13A and 13B. As described above, in such a case, the arithmetic unit 10 operates while switching the plurality of controller emulator units 13A and 13B in a time division manner.

In FIG. 12, the rotary encoder 83 is connected to the input terminal 41 of the input number “0”, and the switch 82 is connected to the input terminal 41 of the input number “60”. Further, the lamp 91 is connected to the output terminal 42 of the output number “0”, and the magnet switch 92 is connected to the output terminal 42 of the output number “60”.

The input / output control unit 43 of the programmable controller 1 further includes a priority event detection unit 432. The priority event detection unit 432 detects the occurrence of an event associated with the interrupt program to be preferentially processed during the simulated operation processing by the plurality of controller emulator units 13A and 13B, and indicates that an event has occurred. It has a function of notifying the calculation unit 10 of the notification. In the following, the event associated with the interrupt program to be processed preferentially is referred to as a priority event.

The management unit 12 of the calculation unit 10 further has a switching unit 121. When the priority event detection unit 432 notifies the switching unit 121, the switching unit 121 executes the interrupt program even if a controller emulator unit other than the controller emulator unit that executes the interrupt program due to the occurrence of the priority event is operating. This is a functional unit that switches processing to the controller emulator unit.

The programmable controller 1 generally has an interrupt program execution function that operates at high speed triggered by a specific event. Events include rising or falling edges of input signals, fluctuations in pulse counter values, and internal timer count-ups. An interrupt program that operates with these events as a trigger operates with a higher priority than a running control program, and is required to have high-speed responsiveness.

When two controller emulator units 13A and 13B are executed on the same arithmetic unit 10, a priority event to be processed by the controller emulator unit 13B may occur while the controller emulator unit 13A is executing. In this case, the controller emulator unit 13B cannot execute the interrupt processing corresponding to the priority event until the time allotted to the controller emulator unit 13A elapses, so that the responsiveness of the interrupt program deteriorates.

Therefore, in the fourth embodiment, the input / output control unit 43 is provided with the priority event detection unit 432, and the management unit 12 is provided with the switching unit 121 in order to improve the response performance when the priority event occurs.

Here, an example in which an interrupt occurs will be described. It is assumed that the controller emulator unit 13B executes the interrupt program when the pulse count of the rotary encoder 83 reaches a predetermined set value.

The priority event detection unit 432 is set with conditions that require notification as a priority event. The priority event is an event in which the interrupt program must be executed preferentially when the event occurs. Here, "when the number of pulses for the input terminal 41 of the input number" 0 "is a predetermined set value" is set as a condition. How the firmwares 211a and 212a simulated on the controller emulator units 13A and 13B make this setting depends on the hardware specifications of the programmable controller to be simulated by the controller emulator units 13A and 13B. Here, it is assumed that the controller emulator unit 13A simulates a programmable controller equipped with dedicated hardware for performing pulse counting. Firmware for programmable controllers with dedicated hardware accesses the registers of this dedicated hardware. By accessing this register, hardware simulation processing by the controller emulator unit 13A is executed. In the hardware simulation process, the input number “0” that requires pulse monitoring for the priority event detection unit 432 and the number of pulses that are event conditions are set.

When the set priority event condition is satisfied, the priority event detection unit 432 notifies the switching unit 121 of the event occurrence. The switching unit 121 sets the hardware register information stored in the virtual general-purpose register 132 on the controller emulator unit 13B that should process the priority event to the state at the time of the event, and the controller emulator unit 13B that should process the priority event. If it is not executed, the controller emulator units 13A and 13B executed on the arithmetic unit 10 are switched.

FIG. 13 is a diagram showing an example of switching timing of a plurality of controller emulator units executed on the same arithmetic unit. In this figure, the upper part shows the operating state of the controller emulator unit 13A, and the lower part shows the operating state of the controller emulator unit 13B. The horizontal axis is time.

When the priority event has not occurred, the controller emulator units 13A and 13B execute the process while being switched in a time division based on a specific execution cycle. In FIG. 13, first, the controller emulator unit 13A executes the process in the execution cycle 551, and then the controller emulator unit 13B executes the process in the execution cycle 552. In the next execution cycle 553, the controller emulator unit 13A executes the process, and it is assumed that the priority event 560 occurs at time t1 in the execution cycle 553. Here, the priority event 560 is that the number of pulse counters by the rotary encoder 83 reaches the set value. The priority event detection unit 432 detects the occurrence of the priority event 560 and notifies the switching unit 121 of an event notification indicating the occurrence of the priority event. Upon receiving the event notification, the switching unit 121 switches the process from the controller emulator unit 13A to the controller emulator unit 13B even during the execution cycle 553 in which the controller emulator unit 13A is operating, and the controller emulator unit 13B switches the process. Make it operational. After that, the controller emulator unit 13B executes the interrupt program corresponding to the priority event.

Here, the interrupt program execution allocation time 570, which is the time for executing the interrupt program, is calculated based on a specific algorithm. Alternatively, the interrupt program execution allocation time 570 may change the firmware 212a itself and add a hook process when the interrupt program is completed, thereby detecting the completion of the interrupt program execution. In the case of the method of adding the hook processing, it is not necessary to predict the execution completion time of the interrupt program, so that the calculation of the interrupt program execution allocation time 570 is unnecessary. When the interrupt program execution allocation time 570 elapses, the switching unit 121 switches the process to the controller emulator unit 13A. Then, in the execution cycle 554, the hardware register information is returned to the state at the time of the occurrence of the priority event 560, and the controller emulator unit 13A performs processing.

In the above description, the priority event detection unit 432 has been described as a functional block having a pulse counting function, but the embodiment is not limited to this. For example, the priority event detection unit 432 may be configured to have a plurality of other event detection functions such as rising or falling edges of an input signal.

In the fourth embodiment, the programmable controller 1 includes a priority event detection unit 432 that detects a priority event, and a switching unit 121 that switches processing to controller emulator units 13A and 13B that should perform interrupt processing when a priority event is detected. , Equipped with. As a result, it is forcibly switched to the controller emulator units 13A and 13B that execute the interrupt program when the priority event occurs, and when a plurality of controller emulator units 13A and 13B are executed on the same arithmetic unit 10, the priority event is dealt with. The responsiveness can be enhanced.

Further, the above-described second embodiment may be combined with the third and fourth embodiments. As a result, the timing of input / output refresh in the programmable controller 1 can be made equivalent to that of the actual programmable controller to be simulated.

The configuration shown in the above-described embodiment shows an example of the content of the present invention, can be combined with another known technique, and is one of the configurations without departing from the gist of the present invention. It is also possible to omit or change the part.

1 Programmable controller, 10,10A, 10B calculation unit, 11,11A, 11B virtualization unit, 12,12A, 12B management unit, 13,13A, 13B controller emulator unit, 14,14A, 14B memory-mapped I / O area , 15, 15A, 15B Mapping information generation unit, 20 storage unit, 21 firmware storage unit, 22 control program storage unit, 23 hardware information storage unit, 24 input / output mapping information storage unit, 30 communication interface unit, 40 input / output interface Unit, 41 input terminal, 42 output terminal, 43 input / output control unit, 50 bus, 70 human interface, 81, 82 switch, 83 rotary encoder, 91 lamp, 92 magnet switch, 121 switching unit, 131 virtual program counter, 132 virtual General-purpose registers, 211,211a, 212a firmware, 211,221a, 222a control program, 231 hardware information, 241 input / output mapping information, 431 input / output timing adjustment unit, 432 priority event detection unit.

Claims

A storage unit that stores the firmware and control program executed by the programmable controller to be simulated, and the hardware information required to simulate the hardware of the programmable controller to be simulated.
A controller emulator unit that simulates the operation of the hardware in the programmable controller to be simulated based on the hardware information.
With
The controller emulator unit executes the firmware and the control program on the simulated hardware.
A programmable controller, characterized in that the firmware and the hardware information in the storage unit can be changed according to the programmable controller to be simulated.
Input / output terminals connected to input devices and output terminals,
An input / output control unit that controls the input / output of information to the input / output terminals,
With more
The storage unit defines input / output mapping information that defines a correspondence relationship between input / output to the input / output terminal and virtual input / output when the firmware and the control program are executed by the controller emulator unit. Memorize further,
The controller emulator unit is characterized in that the virtual input / output when the firmware and the control program are executed are converted into input / output to the input / output terminal with reference to the input / output mapping information. The programmable controller according to claim 1.
The second aspect of the present invention is characterized in that a communication interface unit for connecting to an external device capable of changing the relationship between the input / output of the input / output mapping information to the input / output terminal and the virtual input / output is further provided. Described programmable controller.
An input / output timing adjusting unit for adjusting the actual input / output timing from the virtual input / output to the input / output terminal by the input / output control unit is further provided.
When the programmable controller to be simulated is simulated according to the firmware and the control program, the controller emulator unit estimates the execution time when the programmable controller to be simulated actually executes the control program, and executes the execution. Based on the time, estimate the start time of input / output by the actual programmable controller to be simulated.
The input / output timing adjusting unit waits for control by the input / output control unit until the start time, and at the start time, permits the input / output control unit to control input / output to the input / output terminal. The programmable controller according to claim 2 or 3.
It is equipped with a plurality of the controller emulator units.
The programmable controller according to any one of claims 1 to 4, wherein the storage unit has the firmware, the control program, and the hardware information executed by the respective controller emulator units.
A switching unit that switches the simulation processing of the hardware in the programmable controller to be simulated by the plurality of controller emulator units, and
A priority event detector that detects events associated with interrupt processing,
With more
When the priority event detection unit detects the occurrence of a priority event, which is an event that preferentially executes the interrupt processing, the priority event detection unit notifies the switching unit of the occurrence of the priority event.
The programmable controller according to claim 5, wherein the switching unit controls switching of a plurality of the controller emulator units so that the interrupt processing associated with the priority event is executed.