WO2021105125A1

WO2021105125A1 - Frequency shift keying signal demodulator system and method

Info

Publication number: WO2021105125A1
Application number: PCT/EP2020/083213
Authority: WO
Inventors: Armin SABANOVIC; Masoud Babaie; Earl Mccune
Original assignee: Technische Universiteit Delft
Priority date: 2019-11-26
Filing date: 2020-11-24
Publication date: 2021-06-03
Also published as: NL2024309B1

Abstract

A method and system for frequency shift keying (FSK) demodulation for obtaining an output data packet (3) from an FSK modulated signal (2). An analogue processing part (4) comprises a phase demodulator (7) for receiving the FSK modulated signal (2) and for providing a received signal phase (ΦRX). The digital processing part (5) comprises a processing arrangement (9-13) that is arranged to execute a detection algorithm using the received signal phase (ΦRX) as input. The detection algorithm comprises tracking of the received signal phase over N symbols within a data packet length having Npacket symbols, N being an integer value larger than or equal to 1 and less than Npacket, determining a most likely phase profile associated with the N symbols within the data packet length and determining from the most likely phase profile the output data packet.

Description

Frequency Shift Keying signal demodulator system and method Field of the invention

The present invention relates to a method for frequency shift keying (FSK) demodulation for obtaining a data packet from an FSK modulated signal and to a system implementing such a method.

Background art

Known FSK demodulators use detection based on an instantaneous frequency for detection of the correct symbol, as a result often showing poor performance as to bit error rate and spectral performance.

A preamble detection mechanism for reception of asynchronous packets is disclosed in US patent publication US2019158335. The mechanism includes processing of a data packet (e.g. in accordance with a BT protocol) within a received wireless signal. A frequency modulation (FM) domain carrier frequency offset (CFO) estimate component and a phase domain CFO estimate component are determined from samples of a preamble field of the data packet (i.e. not the entire packet).

A method and apparatus for signal processing in RFID receivers is disclosed in international patent publication W02007087041 . This patent publication discloses methods for demodulation of backscattered RFID tag signals. Correlation coefficients for the in-phase and quadrature components of the received signal are calculated over a shifted bit interval. Performing a correlation over a shifted bit interval relative to the real bit interval allows the base-band receiver to involve a two-bit interval in making a decision about each transmitted bit.

European patent publication EP-A-3 264 701 discloses a frequency shift keying (FSK) demodulator and method, having a plurality of correlation circuits configured to output correlation metrics based on a buffered portion of an input signal, The correlation metrics look at long term (multi-symbol) patterns to be able to output a most likely symbol value for a current symbol.

Summary of the invention

The present invention seeks to provide an improved FSK signal demodulation method and an improved FSK signal demodulator system.

According to the present invention, a method for FSK demodulation for obtaining an output data packet from an FSK modulated signal as defined above is provided. The method comprises phase demodulation of the FSK modulated signal to provide a received signal phase and execution of a detection algorithm using the received signal phase as input. The detection algorithm comprises tracking of the received signal phase over N symbols within a data packet length having Npac_ket symbols, N being an integer value larger than or equal to 1 and less than Npac_ket, determining a most likely phase profile associated with the data packet length and determining from the most likely phase profile the output data packet. In a further aspect of the present invention, a FSK demodulator system for obtaining an output data packet from an FSK modulated signal as defined above is provided. The FSK demodulator system comprises an analogue processing part and a digital processing part. The analogue processing part comprises a phase demodulator for receiving the FSK modulated signal and for providing a received signal phase. The digital processing part comprises a processing arrangement that is arranged to execute a detection algorithm using the received signal phase as input. The detection algorithm comprises tracking of the received signal phase over N symbols of a data packet length Npacket, N being an integer value larger than or equal to 1 and less than Npacket, and determining a most likely phase profile associated with the output data packet.

The combination of these features results in an improved receiver sensitivity, as a result of which the transmitted power can be reduced in an FSK based communication system, or, if transmitted power is maintained at the same level, communication range can be improved. Further embodiments are described by the dependent claims.

Short description of drawings

The present invention will be discussed in more detail below, with reference to the attached drawings, in which:

Fig. 1 shows a schematic diagram of an FSK demodulator system according to an embodiment of the present invention;

Fig. 2 shows a flow chart of a detection algorithm implemented in an embodiment of the present invention.

Description of embodiments The present invention embodiments relate to signal processing used in frequency shift keying (FSK) demodulation, as e.g. used in wireless communication systems such as Bluetooth or GSM. Often, FSK modulation schemes have a poor bit error rate performance (often accompanied with poor spectral performance), as compared to other modulation schemes such as Quadrature Amplitude Modulation (QAM) and Phase Shift Keying (PSK). The present invention embodiments provide for an improvement in detection accuracy of FSK signals.

The present invention embodiments are based on the insight that although an FSK signal is technically related to instantaneous frequency, it is advantageous and useful to look at the phase of the FSK signal. The phase includes all information about the past of a signal, and this can be utilized when further noting that in an additive white Gaussian noise channel the noise on top of the signal is zero-mean. Because the additive noise is a generally zero-mean process, it is expected that (at least for narrow-band systems) the signal plus noise phase follows roughly the same phase trajectory as the modulation signal phase. Deviations from the actual transmitted phase profile over multiple symbol periods are unlikely to happen, and become increasingly less likely the more symbol periods are considered. It is found that two dominant error mechanisms may occur in FSK demodulator systems, i.e. click events, or phase rotation cancellation (PRC) events. The non-linear transfer from the input of the demodulatorto its output may lead to click events that are mostly prevalent in wide-band FSK systems. Phase rotation cancellation is defined as an event where the signal phasor rotation in an IQ plane is temporarily cancelled by the rotation of noise phasor. The PRC errors are the dominant error mechanism in narrow-band FSK systems.

Fig. 1 shows a schematic diagram of a frequency shift keying demodulator system 1 for obtaining an output data packet 3 from an FSK modulated signal 2 according to an embodiment of the present invention. The FSK demodulator system 1 can be a system that operates through an additive white Gaussian noise (AWGN) channel. The FSK demodulator system 1 comprises an analogue processing part 4 and a digital processing part 5. The analogue processing part 4 comprises a phase demodulator 7 for receiving the FSK modulated signal 2 and for providing a received signal phase ORX as an output. The analogue processing part 4 can be connected to an antenna for receiving the FSK modulated signal from which the signal is directed into the phase demodulator 7. As shown in Fig. 1 , the FSK modulated signal is a radio frequency (RF) signal, and the analogue processing part may further comprise a channel selection filter 6 connected to an input side of the phase demodulator 7, and a low pass filter 8 connected to an output side of the phase demodulator 7. The functionality of these components will be described below.

The analogue processing part 4 provides the received signal phase ORX as its output and this received signal phase ORX IS provided as an input to the digital processing part 5. The digital processing part 5 comprises a processing arrangement 9-13 arranged to execute a detection algorithm using the received signal phase ORX as input. The detection algorithm allows to take a decision, at the output of the digital processing part 5, on which symbol state the signal is estimated to have occupied during a particular symbol period. A set of consecutive decisions by the detection algorithm leads to an estimate of the originally transmitted symbol sequence of a(n) (entire) data packet. From the estimated symbol sequence, an estimation of the phase profile of the transmitted signal can be obtained. This process is also called phase tree reconstruction. When the demodulator system 1 makes no detection errors, then the phase profile of the transmitted signal exactly overlaps with the reconstructed phase profile. However, when a detection error does occur, then the reconstructed phase profile diverges from the transmitted phase profile at the point of the incorrectly detected symbol. The difference between the estimated phase profile and the originally transmitted phase profile is defined as the phase profile error.

As shown in the exemplary embodiment of Fig. 1 , the processing arrangement 9-13 that is arranged to execute the detection algorithm comprises a phase calibration unit 9, phase reference generator 10, an adder 11 , an integrator 12 and a comparator (CMP) 13. The input received signal phase ORX to the digital processing part 5 is fed into the phase calibration unit 9 and to the adder 11 , as a first input. The received signal phase ORX is calibrated by the phase calibration unit 9 and the calibrated signal is fed into the phase reference generator 10. The phase reference generator 10 generates a reference signal and this reference signal is fed as a second input into the adder 11 . The adder 11 subtracts the reference signal from the received signal phase ORX and generates a phase error vector <t>_e. The phase error vector <t>_e is fed into the integrator 12. The output of the comparator 13 is fed back into the phase reference generator 10 to execute an iterative process that is explained in more detail below. The comparator 13 detects the similarity between the reference signal and the received signal ORX, to eventually obtain the output data packet 3 from the demodulator system 1.

The processing arrangement 9-13 shown in Fig. 1 is an exemplary implementation of the present invention detection algorithm. The detection algorithm comprises tracking of the received signal phase ORX over N symbols within a data packet length having Npacket symbols, N being an integer value larger than or equal to 1 and less than or equal to Npacket, determining a most likely phase profile associated with the data packet length and determining from the most likely phase profile the output data packet.

In a further aspect of the present invention, a method for FSK demodulation for obtaining an output data packet from an FSK modulated signal is provided. The method comprises phase demodulation of the FSK modulated signal (in the analogue processing part 4) to provide a received signal phase ORX and execution of a detection algorithm (in the digital processing part 5) using the received signal phase ORX as input. The detection algorithm comprises tracking the received signal phase ORX over N symbols within a data packet length having Npac_ket symbols (e.g. Npac_ket bits), N being an integer value larger than or equal to 1 and less than or equal to Npacket, determining a most likely phase profile associated with the data packet length, and determining from the most likely phase profile the output data packet. Note that the value of N is advantageously chosen as 2 or higher to avoid incorrect interpretations as the deviations from the originally transmitted phase profile due to noise excursions that possibly last for more than one symbol period may be incorrectly interpreted by the detection algorithm. In order to obtain an approximate zero-mean characteristic of the noise, N is advantageously chosen larger than or equal to 2 (the higher the value of N, the better approximation is obtained). An embodiment wherein N equals 1 will still provide a better result than the prior art systems and methods as described above.

In an embodiment of the present invention, the FSK modulated signal is a modulated narrow-band signal. In narrow-band FSK systems, the total phase rotation per symbol is relatively small. Due to this, the output instantaneous frequency signal is more easily disturbed by the presence of noise. In the case where the rotation of the noise completely cancels or even overwhelms the rotation of the signal over a symbol period, a detection error is made at the demodulator output. The signal plus noise trajectory within that particular symbol period is then almost entirely radial, with (typically) nearly no change in the phase. For narrow-band FSK systems signal plus noise trajectories can be obtained with tiny phase rotations.

The narrow band signal can be a Gaussian frequency shift keying (GFSK) based signal that e.g. comprises Bluetooth signals. In a further embodiment of the present invention, the FSK modulated signal is a Gaussian minimum shift keying (GMSK) modulated signal. The GMSK scheme is e.g. used in Global System for Mobile communications (GSM) and several versions of Bluetooth, such as Bluetooth Low Energy (BLE). Since most modern FSK applications use narrow- band FSK signals (i.e., having a modulation index h of less than 1), these systems are dominated by phase rotation cancellation errors when an AWGN channel is considered. For these narrow- band signals the present invention embodiments can be advantageously used to improve their performance.

In a further embodiment of the present invention, the method of determining a most likely phase profile associated with the N symbols within a data packet length comprises for each subsequent symbol of the N symbols: determining phase profiles for all possible combinations of N symbols, determining the average deviation between the received signal phase ORX and each of the determined phase profiles, and selecting the symbol value having the minimum average deviation.

Fig. 2 shows a flow chart of the detection algorithm implemented as an embodiment of the present invention. The detection algorithm executes steps that are explained in more detail below. The detection algorithm comprises executing a phase calibration to obtain an initial phase reference vector F_Ϊ, and then executing an iterative process. In each iteration step, one further symbol state is estimated by generating all combinations of phase profiles for a length of N symbols. As N is chosen as an integer value that is larger than or equal to two, a total of 2^N reference phase profiles is generated, one for each unique combination of reference symbols y_n through g_h+N®, (block 21). The reference phase profiles are compared to the received phase (block 22) to obtain phase error vectors. The symbol state of the n^th symbol is obtained from whichever phase profile that has the smallest absolute value of an average phase error Oe.avg, which is obtained as mean value of all phase error vectors (block 23, 24). At the end of each iteration, the initial phase reference scalar F, for the next iteration is determined from the reference phase profile with the smallest phase profile error (block 24). This process is repeated until the (entire) symbol sequence for a(n) (entire) data packet length is verified by the detection algorithm.

With further reference to Fig. 2, in each iteration step, a phase reference vector F_9bh is determined by adding reference phase curves f(y„,y„_+i,...) to the initial phase reference scalar F, that is generated in the previous iteration step 21 . Following this, a phase error vector F_b is calculated as the difference between the received signal phase Frc and the phase reference vector F_9bh in step 22. When subtracting this reconstruction from the actual received phase, any large and longer-lasting deviation from zero indicates that an error has occurred. The demodulation algorithm uses this principle by considering all possible combinations of symbols for an N-symbol sequence, moving one symbol forward after every consideration. By looking at enough symbols at the same time (i.e. after a number of iterations), any short term deviation from the signal mean can be negated. Then, in step 23 an average phase error F_Q,Q^ is calculated as the mean value of the phase error vector F_b and the symbol is determined for the current iteration step based on the minimum average phase error F_Q^, in step 24. A next initial phase reference vector F, is determined for a next iteration step based on the determined symbol]. When subtracting all possible reconstructions from the received phase, and choosing the one with the minimum average deviation, significant improvements are found in the accuracy of detection with respect to implementations that only consider instantaneous frequency for detection. The initial phase reference vector F, can be calibrated e.g. by averaging the received signal phase during the preamble of the data packet, where no actual information is transmitted. This allows to eliminate any possible errors generated by the algorithm itself thereby to provide a more accurate phase profile. Thus, in a further embodiment of the present invention, the detection algorithm comprises a calibration. Under the assumption that the frequency drift does not vary much in between data packets, it is possible to first do a coarse frequency offset estimate with an FFT of the phase error vector <t>_e, followed by a finer estimate of the remaining frequency offset. For example, the remaining frequency offset can be determined by calculating the average slope of <t>_e over the packet length. Alternatively, the DC component of the FFT and its polarity can be used in a step-by-step (incremental) approach to estimate the remaining frequency offset. The calibration can also include determining a coarse estimate by calculating the fast Fourier transform (FFT) of the phase error vector <t>_e or the average phase error <t>_e,avg. The FFT provides peak magnitude corresponding to a frequency offset with respect to other peaks that is easily detectable. The frequency offset estimate is then used in the generation of the phase reference signals (by the phase reference generator 10) to account for the additional increase or decrease in phase rotation. The calibration can also include a subsequent determination of a fine estimate by calculating a DC component of the phase error vector F_b or the average phase error F_b,3\¾. The digital processing part 5 of the FSK demodulator system 1 is arranged to execute the above mentioned detection algorithm steps.

One exemplary embodiment of the present invention relates to a method wherein the symbols are binary symbols. In case of a binary FSK (BFSK) scheme, there are only two signal states possible. In BFSK, the phase either increases or decreases by l per symbol period. In a two-state (binary) system, each bit is acted upon individually rather than in groups, resulting in two possible symbols. As the options are finite, in such a case, it is possible to reconstruct the signal component at the receiver side based on estimations of what the bit polarity will be.

In a further embodiment of the present invention, the phase demodulation further comprises low pass filtering of the received signal phase Frc. The low pass filtering operation is performed on the signal in order to further limit the bandwidth to centre around that of the modulation signal. In this manner, the low pass filtering can further improve the phase demodulated signal. For the low pass filtering, the FSK demodulator system 1 comprises a low pass filter 8 that is connected to the output of the phase demodulator 7 as shown in the exemplary embodiment of Fig. 1 , i.e. as part of the analogue processing part 4. The low pass filter can be an adjustable low pass filter. In a further embodiment, the low pass filter 8 may be implemented as part of the digital processing part 5.

In an even further embodiment of the present invention, phase demodulation further comprises channel selection in the FSK modulated signal. For the channel selection, the FSK demodulator system 1 e.g. comprises a channel selection filter 6 connected to the input of the phase demodulator 7. The channel selection filter 6 may also be advantageously used for blocker rejection and noise power limiting.

The present invention embodiments exploit the concept of PRC as a previously unknown error mechanism in narrow-band FSK systems and include a new FSK demodulation algorithm to resolve errors resulting from PRC events. Based on the discovered characteristics of PRC-based errors, an FSK demodulation algorithm was developed and implemented in the present invention embodiments that greatly improves detection accuracy in FSK systems. Furthermore, the novel demodulation algorithm allows for sub-data rate receiver bandwidth operation, which offers both improved receiver sensitivity and better blocker performance. This new demodulation algorithm eliminates nearly all PRC-based errors, leaving only errors due to click events. For example, in a GFSK system with bandwidth-time = 0.5 and modulation index = 0.5, an improvement in receiver sensitivity of up to 4.4 dB can be achieved with the new demodulation algorithm.

According to an aspect of the present invention, a method for FSK demodulation for obtaining an output data packet from an FSK modulated signal as defined above is provided. The method comprises phase demodulation of the FSK modulated signal to provide a received signal phase and execution of a detection algorithm using the received signal phase as input. The detection algorithm comprises tracking of the received signal phase over N symbols within a data packet length having Npacket symbols, N being an integer value larger than or equal to 1 and less than or equal to Npacket, determining a most likely phase profile associated with the data packet length and determining from the most likely phase profile the output data packet.

In a further aspect of the present invention, a FSK demodulator system for obtaining an output data packet from an FSK modulated signal as defined above is provided. The FSK demodulator system comprises an analogue processing part and a digital processing part. The analogue processing part comprises a phase demodulator for receiving the FSK modulated signal and for providing a received signal phase. The digital processing part comprises a processing arrangement that is arranged to execute a detection algorithm using the received signal phase as input. The detection algorithm comprises tracking of the received signal phase over N symbols of a data packet length Npacket, N being an integer value larger than or equal to 1 and less than or equal to Npacket, and determining a most likely phase profile associated with the data packet.

The present invention has been described above with reference to a number of exemplary embodiments as shown in the drawings. Modifications and alternative implementations of some parts or elements are possible, and are included in the scope of protection as defined in the appended claims.

Claims

1. A method for frequency shift keying, FSK, demodulation for obtaining an output data packet (3) from an FSK modulated signal (2), comprising phase demodulation of the FSK modulated signal (2) to provide a received signal phase

( Rx), execution of a detection algorithm using the received signal phase (ORX) as input, wherein the detection algorithm comprises tracking of the received signal phase (ORX) over N symbols within a data packet length having N_paCket symbols, N being an integer value larger than or equal to 1 and less than Npacket, determining a most likely phase profile associated with the N symbols within the data packet length, and determining from the most likely phase profile the output data packet (3).

2. The method of FSK demodulation according to claim 1 , wherein the FSK modulated signal (2) is a modulated narrow-band signal.

3. The method of FSK demodulation according to claim 1 or 2, wherein determining a most likely phase profile associated with the N symbols within the data packet length comprises for each subsequent symbol of the N symbols: determining phase profiles for all possible combinations of N symbols, determining the average deviation between the received signal phase (ORX) and each of the determined phase profiles, and selecting the symbol value having the minimum average deviation.

4. The method of FSK demodulation according to claim 1 or 2, wherein determining a most likely phase profile associated with the N symbols within a data packet length comprises executing a phase calibration to obtain an initial phase reference scalar (F,), and executing an iterative process, wherein in each iteration step, a phase reference vector (<t>_gen) is determined by adding reference phase curves (f(y_n, y_n+1,...) to the initial phase reference scalar (F,) generated in the previous iteration, calculate a phase error vector (<t>_e) as the difference between the received signal phase (0RX) and the phase reference vector (<t>_gen), calculate an average phase error (Oe.a^) as the mean value of the phase error vector (<t>_e), determine the symbol for the current iteration step based on the minimum average phase error (Oe.a^), determine a next initial phase reference scalar (F,) for a next iteration step based on the determined symbol.

5. The method of FSK demodulation according to claim 4, wherein the detection algorithm further comprises a calibration, including: determining a coarse estimate by calculating the fast Fourier transform of the phase error vector (F ) or the average phase error (Oe.avg); subsequently determining a fine estimate by calculating a DC component of the phase error vector (F ) or the average phase error (F , ^).

6. The method of FSK demodulation according to any one of claims 1 -5, wherein the symbols are binary symbols.

7. The method of FSK demodulation according to any one of claims 1 -6, wherein the FSK modulated signal is a Gaussian minimum shift keying, GMSK, modulated signal.

8. The method of FSK demodulation according to any one of claims 1-7, wherein phase demodulation further comprises low pass filtering of the received signal phase (Frc).

9. The method of FSK demodulation according to any one of claims 1-8, wherein phase demodulation further comprises channel selection in the FSK modulated signal.

10. The method of FSK demodulation according to any one of claims 1-9, wherein N equals 2.

11 . The method of FSK demodulation according to any one of claims 1-9, wherein N equals 1 .

12. A frequency shift keying, FSK, demodulator system for obtaining an output data packet (3) from an FSK modulated signal (2), comprising an analogue processing part (4) and a digital processing part (5), the analogue processing part (4) comprising a phase demodulator (7) receiving the FSK modulated signal (2) and providing a received signal phase (Frc), the digital processing part (5) comprising a processing arrangement (9-13) arranged to execute a detection algorithm using the received signal phase (Frc) as input, wherein the detection algorithm comprises tracking of the received signal phase (Frc) over N symbols within a data packet length having Npac_ket symbols, N being an integer value larger than or equal to 1 and less than N pac_ket, determining a most likely phase profile associated with the N symbols within the data packet length and determining from the most likely phase profile the output data packet (3).

13. The FSK demodulator system according to claim 12, wherein the digital processing part (5) is further arranged to execute the method according to any one of claims 2-7.

14. The FSK demodulator system according to claim 12 or 13, further comprising a low pass filter (8) connected to an output of the phase demodulator (7).

15. The FSK demodulator system according to claim 12, 13 or 14, further comprising a channel selection filter (6) connected to an input of the phase demodulator (7).

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