WO2021093005A1 - 像素驱动电路及显示装置 - Google Patents

像素驱动电路及显示装置 Download PDF

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Publication number
WO2021093005A1
WO2021093005A1 PCT/CN2019/120391 CN2019120391W WO2021093005A1 WO 2021093005 A1 WO2021093005 A1 WO 2021093005A1 CN 2019120391 W CN2019120391 W CN 2019120391W WO 2021093005 A1 WO2021093005 A1 WO 2021093005A1
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Prior art keywords
thin film
module
film transistor
transistor
drain
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Ceased
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PCT/CN2019/120391
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English (en)
French (fr)
Inventor
侯学顺
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Original Assignee
Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to US16/754,766 priority Critical patent/US20210407415A1/en
Publication of WO2021093005A1 publication Critical patent/WO2021093005A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/007—Use of pixel shift techniques, e.g. by mechanical shift of the physical pixels or by optical shift of the perceived pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
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    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0465—Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
    • G—PHYSICS
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    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
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    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
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    • G09G2300/00—Aspects of the constitution of display devices
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    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
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    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance

Definitions

  • This application relates to the field of display technology, and in particular to a pixel driving circuit and a display device.
  • OLED Organic Light Emitting Diode
  • AM-OLED Active-matrix Organic light-emitting diode
  • the pixel driving circuit in the prior art has a relatively simple structure and has many defects. Among them, the obvious one is that the driving thin film transistor works in a forward bias state for a long time, which will cause the threshold voltage to shift. In view of the development of various panel manufacturers in the direction of high resolution and high frequency driving, the pixel driving circuit requires higher pixel resolution and refresh frequency, which makes the threshold voltage shift phenomenon more serious and affects the display quality of the OLED display device.
  • the present application provides a pixel driving circuit and a display device, which can compensate the threshold voltage of the thin film transistor in the driving module, prevent the threshold voltage from drifting, and improve the image quality of the display.
  • the present application provides a pixel driving circuit, the pixel driving circuit includes a driving module, a voltage writing module, an electrical recovery module, a reset module, and a light emitting module;
  • the input terminal of the voltage writing module is provided with a signal access port, the output terminal of the voltage writing module is electrically connected with the driving module and the light emitting module, and the voltage writing module is used to provide The drive module writes the compensation voltage;
  • Both ends of the reset module are respectively connected to the driving module and the light-emitting module, and the reset module is used to provide a preset voltage to the driving module during the reset phase of the pixel driving circuit, and to provide the light-emitting module with a preset voltage.
  • the module provides a reset voltage, where the preset voltage and the reset voltage are not equal, and both are non-positive values;
  • the driving module is electrically connected to the light-emitting module, and is configured to control the light-emitting module to emit light according to the preset voltage;
  • One end of the electrical recovery module is electrically connected to the driving module, and the other end is connected to a light-emitting control signal.
  • the driving module includes a first thin film transistor and a capacitor
  • the first thin film transistor is a drive transistor, and its source is connected to the electrical recovery module, its drain is connected to the light emitting module and the electrical recovery module, and its gate is connected to the reset module and voltage writing Module
  • One end of the capacitor is connected to the positive voltage of the power supply, and the other end is electrically connected to the gate of the first thin film transistor.
  • the voltage writing module includes a second thin film transistor and the third thin film transistor, and the second thin film transistor is a switching transistor;
  • the gate of the second thin film transistor is connected to a scan signal, the source of the second thin film transistor is connected to a data signal, and the drain of the second thin film transistor is connected to the gate of the first thin film transistor;
  • the third thin film transistor is arranged between the gate and the drain of the first thin film transistor, and the gate of the third thin film transistor is connected to a scan signal.
  • the electrical recovery module includes a fifth thin film transistor and a sixth thin film transistor
  • the source of the fifth thin film transistor is connected to the positive voltage of the power supply, and the drain of the fifth thin film transistor is connected to the source of the first thin film transistor;
  • the source of the sixth thin film transistor is connected to the drain of the first thin film transistor, and the drain of the sixth thin film transistor is connected to the light emitting module;
  • the gate of the fifth thin film transistor and the gate of the sixth thin film transistor are both connected to the light emitting control signal to control the light emitting time of the light emitting module.
  • the reset module is also connected to an electrical recovery signal, and the reset module includes a fourth thin film transistor and a seventh thin film transistor;
  • the drain of the fourth thin film transistor is connected to the gate of the first thin film transistor, the source of the fourth thin film transistor is connected to a preset voltage, and the gate of the fourth thin film transistor is connected to a reset signal;
  • the source of the seventh thin film transistor is connected to the input terminal of the light emitting module, and the drain of the seventh thin film transistor is connected to the output terminal of the light emitting module and is connected to a power signal.
  • the gate writes a reset voltage to the gate of the first thin film transistor by connecting the reset signal.
  • the fourth thin film transistor is a first double gate transistor, and the third thin film transistor is a second double gate transistor;
  • the first double-gate transistor includes a source transistor and a drain transistor, and the source transistor and the drain transistor respectively have a gate, a source, and a drain.
  • the source transistor The source of the source transistor is connected to the predetermined voltage, the drain of the source transistor is connected to the source of the drain transistor, and the drain of the drain transistor is electrically connected to the gate of the first thin film transistor ;
  • the second double-gate transistor includes a source transistor and a drain transistor, and the source transistor and the drain transistor respectively have a gate, a source, and a drain.
  • the source transistor The source of the drain transistor is connected to the drain of the first thin film transistor, the drain of the source transistor is connected to the source of the drain transistor, and the drain of the drain transistor is connected to the drain of the first thin film transistor.
  • the grid is electrically connected.
  • the light emitting module includes a plurality of light emitting diodes arranged in parallel, the anode of the light emitting diode is connected to the drain of the sixth thin film transistor, and the cathode of the light emitting diode is connected to the power signal.
  • the pixel driving circuit has a reset phase, a data signal writing and threshold voltage compensation phase, and a light-emitting phase:
  • the driving module When the pixel driving circuit is in the reset phase, the driving module is connected to the reset module, and the electrical recovery module and the voltage writing module are disconnected from the light emitting module;
  • the driving module and the voltage writing module are turned on, and the electrical recovery module and the voltage writing module are disconnected from the light emitting module ;
  • the driving module, the electrical recovery module and the light-emitting module are turned on, and the voltage writing module is disconnected from the reset module.
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, the fifth thin film transistor, the sixth thin film transistor, and the seventh thin film transistor are all It is a P-type thin film transistor;
  • the light-emitting control signal and the scanning signal are at a high potential, and the electrical recovery control signal is at a low potential;
  • the light emission control signal is at a high potential, and the electrical recovery control signal and the scanning signal are at a low potential;
  • the electrical recovery control signal and the scan signal are at a high potential, and the light-emitting control signal is at a low potential.
  • the light emission control signal is at a low potential, and the electrical recovery control signal and the scanning signal are at a high potential;
  • the electrical recovery control signal and the scan signal are at a low potential, and the light-emitting control signal is at a high potential.
  • the present application provides a display device.
  • the electronic device includes a timing controller and the pixel drive circuit according to any one of the first aspect, and the timing controller is used to control all the pixels in the pixel drive circuit.
  • the light emission control signal, the scanning signal and the electrical recovery control signal is used to control all the pixels in the pixel drive circuit.
  • the pixel drive circuit includes a drive module, a voltage write module, an electrical recovery module, a reset module, and a light emitting module.
  • the voltage write module is used for The drive module writes the compensation voltage
  • the reset module is used to provide a preset voltage to the drive module and a reset voltage to the light-emitting module during the reset stage of the pixel drive circuit
  • the drive module is used to control the light-emitting module to emit light according to the preset voltage.
  • the voltage writing module can write a compensation voltage to the driving module to prevent the threshold voltage of the driving module from drifting.
  • the pixel driving circuit is in the reset phase, and the potential of the driving module is reset to the preset voltage. It resets to the reset voltage value, and the preset voltage value is not equal to the reset voltage, and both are non-positive values, which can reduce the gate potential drift of the thin film transistor in the drive module caused by leakage during the reset phase, and improve the image quality of the display. .
  • FIG. 1 is a schematic diagram of the structure of a pixel driving circuit in the prior art.
  • FIG. 2 is a schematic structural diagram of a pixel driving circuit provided by an embodiment of the application.
  • FIG. 3 is a schematic diagram of another structure of a pixel driving circuit provided by an embodiment of the application.
  • FIG. 4 is a schematic diagram of another structure of a pixel driving circuit provided by an embodiment of the application.
  • FIG. 5 is a schematic diagram of another structure of a pixel driving circuit provided by an embodiment of the application.
  • FIG. 6 is a schematic diagram of another structure of a pixel driving circuit provided by an embodiment of the application.
  • FIG. 7 is a schematic diagram of another structure of a pixel driving circuit provided by an embodiment of the application.
  • FIG. 8 is a schematic diagram of another structure of a pixel driving circuit provided by an embodiment of the application.
  • FIG. 9 is a schematic diagram of a sequence provided by an embodiment of the application.
  • system and "network” in this article are often used interchangeably in this article.
  • and/or in this article is only an association relationship describing the associated objects, which means that there can be three relationships, for example, A and/or B, which can mean: A alone exists, A and B exist at the same time, exist alone B these three situations.
  • the character "/" in this text generally indicates that the associated objects before and after are in an "or” relationship.
  • the embodiments of the present invention provide a pixel driving circuit and a display device, which will be described in detail below.
  • FIG. 1 is a schematic structural diagram of a pixel driving circuit in the prior art, which is a conventional 2T1C pixel driving circuit for AMOLED, which specifically includes: a first thin film transistor T10, a second thin film transistor T20, and a capacitor C10 ,
  • the first thin film transistor T10 is a switching thin film transistor
  • the second thin film transistor T20 is a driving thin film transistor
  • the capacitor C10 is a storage capacitor.
  • the gate of the first thin film transistor T10 is connected to the scan signal Scan, the source is connected to the data signal Data, and the drain is electrically connected to the gate of the second thin film transistor T20 and one end of the capacitor C10;
  • the source of the thin film transistor T20 is electrically connected to the positive power supply voltage VDD, the drain is electrically connected to the anode of the organic light emitting diode D10; the cathode of the organic light emitting diode D10 is electrically connected to the negative power supply voltage VSS; one end of the capacitor C10 is electrically connected
  • the drain of the first thin film transistor T10 is connected, and the other end is electrically connected to the source of the second thin film transistor T20.
  • the scan signal Scan controls the first thin film transistor T10 to be turned on, and the data signal Data enters the gate of the second thin film transistor T20 and the capacitor C10 through the first thin film transistor T10, and then the first thin film transistor T10 is turned off due to the capacitor C10
  • the gate voltage of the second thin film transistor T20 can still maintain the data signal voltage, so that the second thin film transistor T20 is in the on state, and the driving current enters the organic light emitting diode D10 through the second thin film transistor T20 to drive the organic light emitting diode D10.
  • the light emitting diode D10 emits light.
  • the pixel driving circuit of FIG. 1 has a relatively simple structure and has many defects, and does not have a compensation function.
  • the driving thin film transistor that is, the second thin film transistor T20, works in a forward bias state for a long time, which will cause the threshold voltage to shift.
  • the pixel driving circuit requires higher pixel resolution and refresh frequency, which makes the threshold voltage shift phenomenon more serious.
  • FIG. 2 is a schematic structural diagram of a pixel driving circuit provided by an embodiment of the application.
  • the The pixel driving circuit includes a driving module 10, a voltage writing module 20, an electrical recovery module 30, a reset module 40, and a light emitting module 50;
  • the driving module 10 is electrically connected to the light emitting module 50, one end of the electrical recovery module 30 is electrically connected to the driving module 10, and the other end is connected to a light emitting control signal (EM), and the voltage writing module 20 Are respectively electrically connected to the driving module 10 and the light emitting module 50, the voltage writing module 20 is provided with ports for accessing the scan signal (SCAN) and the data signal (DATA), and both ends of the reset module 40 are connected to the The driving module 10 and the light emitting module 50;
  • the voltage writing module 20 is used to write a compensation voltage (U) to the drive module 10, and the reset module 40 is used to provide a preset voltage to the drive module 10 during the reset phase of the pixel drive circuit. (VI), and provide a power signal (VSS) to the light-emitting module 50, the driving module 10 is used to control the light-emitting module 50 to emit light according to the preset voltage (VI), wherein the preset voltage ( VI) is not equal to the power signal (VSS), and both are non-positive values.
  • FIG. 3 is a schematic structural diagram of another pixel driving circuit provided by an embodiment of the application.
  • the driving module 10 includes a first thin film transistor (T1) and a capacitor ( C);
  • the first thin film transistor (T1) is a driving transistor, and its source is connected to the electrical recovery module 30, its drain is connected to the light emitting module 50 and the electrical recovery module 30, and its gate is connected to the electrical recovery module 30.
  • One end of the capacitor (C) is connected to the positive power supply voltage (VDD), and the other end is electrically connected to the gate of the first thin film transistor (T1).
  • FIG. 4 is a schematic structural diagram of another pixel driving circuit provided by an embodiment of the application.
  • the voltage writing module 30 includes a second thin film transistor ( T2) and the third thin film transistor (T3), and the second thin film transistor (T2) is a switching transistor;
  • the gate of the second thin film transistor (T2) is connected to the scan signal (SCAN), the source is connected to the data signal (DATA), and the drain of the second thin film transistor (T2) is connected to the first thin film transistor (T1). )
  • the third thin film transistor (T3) is arranged between the gate and the drain of the first thin film transistor (T1), and the gate of the third thin film transistor (T3) is connected to a scan signal (SCAN).
  • FIG. 5 is a schematic structural diagram of another pixel driving circuit provided by an embodiment of the application.
  • the electrical recovery module 30 includes a fifth thin film transistor ( T5) and the sixth thin film transistor (T6);
  • the source of the fifth thin film transistor (T5) is connected to the positive power supply voltage (VDD), and the drain of the fifth thin film transistor (T5) is connected to the source of the first thin film transistor (T1);
  • the source of the sixth thin film transistor (T6) is connected to the drain of the first thin film transistor (T1), and the drain of the sixth thin film transistor (T6) is connected to the light emitting module 50;
  • the gate of the fifth thin film transistor (T5) and the gate of the sixth thin film transistor (T6) are both connected to the light emission control signal (EM) to control the light emission time of the light emitting module.
  • FIG. 6 is a schematic structural diagram of another pixel driving circuit provided by an embodiment of the application.
  • the reset module 40 is also connected to an electrical recovery signal ( RESET), and the reset module 40 includes a fourth thin film transistor (T4) and a seventh thin film transistor (T7);
  • the drain of the fourth thin film transistor (T4) is connected to the gate of the first thin film transistor (T1), the source of the fourth thin film transistor (T4) is connected to a preset voltage (VI), the The gate of the fourth thin film transistor (T4) is connected to the reset signal (RESET);
  • the source of the seventh thin film transistor (T7) is connected to the input terminal of the light emitting module 50, and the drain of the seventh thin film transistor (T7) is connected to the output terminal of the light emitting module 50 and is connected to a power signal (VSS), the gate of the seventh thin film transistor (T7) writes a power signal (VSS) to the gate of the first thin film transistor (T1) by connecting the reset signal (RESET).
  • VSS power signal
  • REET reset signal
  • the light-emitting module 50 includes a plurality of light-emitting diodes (L ), the anode of the light emitting diode (L) is connected to the drain of the sixth thin film transistor (T6), and the cathode of the light emitting diode (L) is connected to the power signal (VSS).
  • FIG. 8 is a schematic structural diagram of another pixel driving circuit provided by an embodiment of the application.
  • the fourth thin film transistor (T4) is a first double gate transistor.
  • the third thin film transistor (T3) is a second double gate transistor;
  • the first double-gate transistor includes a source transistor and a drain transistor, and the source transistor and the drain transistor respectively have a gate, a source, and a drain.
  • the source transistor The source of the drain transistor is connected to the preset voltage (VI), the drain of the source transistor is connected to the source of the drain transistor, and the drain of the drain transistor is connected to the first thin film transistor (T1 )
  • the grid is electrically connected;
  • the second double-gate transistor includes a source transistor and a drain transistor, and the source transistor and the drain transistor respectively have a gate, a source, and a drain.
  • the source transistor The source of the drain transistor is connected to the drain of the first thin film transistor (T1), the drain of the source transistor is connected to the source of the drain transistor, and the drain of the drain transistor is connected to the first The gate of the thin film transistor (T1) is electrically connected.
  • the thin film transistor (T4), the fifth thin film transistor (T5), the sixth thin film transistor (T6) and the seventh thin film transistor (T7) are all low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors and amorphous silicon thin films At least one of transistors.
  • the pixel driving circuit has a reset stage (TA), a data signal writing and threshold voltage compensation stage (TB), and a light-emitting stage (TC):
  • the driving module 10 When the pixel driving circuit is in the reset phase (TA), the driving module 10 is connected to the reset module 40, and the electrical recovery module 30 and the voltage writing module 20 are disconnected from the light emitting module 50;
  • the driving module 10 and the voltage writing module 20 are turned on, and the electrical recovery module 30 and the voltage writing module 40 Disconnected from the light-emitting module 50;
  • the driving module 10 and the electrical recovery module 30 are connected to the light emitting module 50, and the voltage writing module 20 is disconnected from the reset module 40.
  • FIG. 9 is a timing diagram provided by an embodiment of the application.
  • the thin film transistors can be divided into N-type thin film transistors and P-type thin film transistors according to their types:
  • the light emission control signal (EM) and the scan signal (SCAN) are at a high level, and the electrical recovery control signal (RESET) is at a low level;
  • the light emission control signal (EM) is at a high potential
  • the electrical recovery control signal (RESET) and the scan signal (SCAN) are at a low potential
  • the electrical recovery control signal (RESET) and the scan signal (SCAN) are at a high potential, and the light-emitting control signal (EM) is at a low potential.
  • the transistor (T5), the sixth thin film transistor (T6) and the seventh thin film transistor (T7) are all N-type thin film transistors;
  • the light emission control signal (EM) and the scan signal (SCAN) are at low potentials, and the electrical recovery control signal (RESET) is at high potentials;
  • the light emission control signal (EM) is at a low level
  • the electrical recovery control signal (RESET) and the scan signal (SCAN) are at a high level
  • the electrical recovery control signal (RESET) and the scan signal (SCAN) are at a low potential, and the light-emitting control signal (EM) is at a high potential.
  • the light emission control signal (EM), the scan signal (SCAN), and the electrical recovery control signal (RESET) all pass external time sequence
  • the controller generates.
  • an embodiment of the present application also provides a pixel driving method, which includes the following four steps:
  • Step 1 Provide a pixel driving circuit
  • the pixel driving circuit includes a driving module, a voltage writing module, an electrical recovery module, a reset module, and a light emitting module;
  • the driving module is electrically connected to the light emitting module, and is used to control the light emitting module to emit light;
  • One end of the electrical recovery module is electrically connected to the driving module, and the other end is connected to a light-emitting control signal, so that the driving module controls the light-emitting time of the light-emitting module;
  • Both ends of the reset module are connected to the driving module and the light-emitting module, and are used to provide a preset voltage to the driving module and a reset voltage to the light-emitting module, and the preset voltage value is the same as the reset voltage They are not equal, and they are all non-positive values.
  • Step two enter the reset phase:
  • the light emission control signal and the scan signal are connected to a first potential, and the electrical recovery control signal is connected to a second potential;
  • the driving module is connected to the reset module, the electrical recovery module and the voltage writing module are disconnected from the light emitting module, the potential of the driving module is reset to the preset voltage, and the light emitting module is reset To reset voltage;
  • Step 3 Enter the data signal writing and threshold voltage compensation stage:
  • the light emission control signal is connected to a first potential, and the electrical recovery control signal and the scanning signal are connected to a second potential;
  • the drive module is connected to the voltage writing module, the electrical recovery module and the electrical recovery module are disconnected from the light emitting module; the drive module stores the compensation voltage of the voltage writing module;
  • Step 4 Enter the light-emitting stage:
  • the electrical recovery control signal and the scanning signal are connected to a first potential, and the light-emitting control signal is connected to a second potential;
  • the driving module, the electrical recovery module and the light emitting module are turned on, and the voltage writing module is disconnected from the reset module;
  • the driving module discharges to the light-emitting module, and drives the light-emitting module to emit light.
  • first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, the fifth thin film transistor, the sixth thin film transistor, and the seventh thin film transistor are all N-type thin film transistors, or all P-type thin film transistors;
  • the first potential is a high potential
  • the second potential is a low potential
  • the first potential is a low potential
  • the second potential is a high potential
  • embodiments of the present invention also provide a display device and a timing controller, including the pixel driving circuit provided by any embodiment of the present invention.
  • the timing controller is used to control the light emission control signal, the scanning signal and the electrical recovery control signal in the pixel driving circuit.
  • an embodiment of the present invention provides a display panel, including: the pixel driving circuit provided by any embodiment of the present invention.
  • the display panel can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, etc.
  • the present invention provides a pixel drive circuit and a display device.
  • the pixel drive circuit includes a drive module, a voltage write module, an electrical recovery module, a reset module, and a light emitting module.
  • the voltage write module is used to write to the drive module.
  • the reset module is used to provide a preset voltage to the drive module and a reset voltage to the light-emitting module during the reset stage of the pixel drive circuit, and the drive module is used to control the light-emitting module to emit light according to the preset voltage.
  • the voltage writing module can write a compensation voltage to the driving module to prevent the threshold voltage of the driving module from drifting.
  • the pixel driving circuit is in the reset phase, and the potential of the driving module is reset to the preset voltage. It resets to the reset voltage value, and the preset voltage value is not equal to the reset voltage, and both are non-positive values, which can reduce the gate potential drift of the thin film transistor in the drive module caused by leakage during the reset phase, and improve the image quality of the display. .

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Abstract

一种像素驱动电路及显示装置，像素驱动电路包括驱动模块（10）、电压写入模块（20）、电性恢复模块（30）、复位模块（40）与发光模块（50），电压写入模块（20）用于给驱动模块（10）写入补偿电压，复位模块（40）用于在像素驱动电路的复位阶段，向驱动模块（10）提供预设电压，并向发光模块（50）提供复位电压，驱动模块（10）用于根据预设电压控制发光模块（50）发光。电压写入模块（20）可以给驱动模块（10）写入补偿电压，防止驱动模块（10）的阈值电压飘移，同时在复位阶段，驱动模块（10）电位复位至预设电压，源极复位到复位电压值，且预设电压值与复位电压不相等，并均为非正值，能够减少在复位阶段由于漏电引起的驱动模块（10）中的薄膜晶体管栅极电位漂移，提高显示画面画质。

Description

像素驱动电路及显示装置 技术领域
本申请涉及显示技术领域，尤其涉及一种像素驱动电路及显示装置。
 背景技术
有机发光二极管（Organic Light Emitting Diode，OLED）具有色域广、对比度高、节能、可折叠性，在目前显示器中具有强的竞争力。其中，有源阵列发光二极管（Active-matrix organic light-emitting diode，AM-OLED）技术是柔性显示重点发展方向之一。
现有技术的像素驱动电路结构较简单存在很多缺陷，其中比较明显的是：驱动薄膜晶体管长期工作在正向偏压状态，这会导致阈值电压偏移。鉴于各面板厂商都朝着高分辨率和高频驱动方向发展，使得像素驱动电路需要更高的像素分辨率和刷新频率，使得阈值电压偏移现象更严重，影响OLED显示装置的显示品质。
 技术问题
本申请提供一种像素驱动电路及显示装置，能够补偿驱动模块中的薄膜晶体管的阈值电压，防止阈值电压飘移，提高显示画面画质。
 技术解决方案
第一方面，本申请提供一种像素驱动电路，所述像素驱动电路包括驱动模块、电压写入模块、电性恢复模块、复位模块与发光模块；
所述电压写入模块的输入端设置有信号接入的端口，所述电压写入模块的输出端分别与所述驱动模块和所述发光模块电连接，所述电压写入模块用于给所述驱动模块写入补偿电压；
所述复位模块的两端分别连接所述驱动模块和所述发光模块，所述复位模块用于在所述像素驱动电路的复位阶段，向所述驱动模块提供预设电压，并向所述发光模块提供复位电压，其中，所述预设电压与所述复位电压不相等，且均为非正值；
所述驱动模块与所述发光模块电连接，用于根据所述预设电压控制所述发光模块发光；
所述电性恢复模块的一端与所述驱动模块电连接，另一端接入发光控制信号。
进一步的，所述驱动模块包括第一薄膜晶体管与电容；
所述第一薄膜晶体管为驱动晶体管，且其源极连接所述电性恢复模块，其漏极连接所述发光模块与所述电性恢复模块，其栅极连接所述复位模块和电压写入模块；
所述电容的一端接入所述电源正电压，另一端电性连接第一薄膜晶体管的栅极。
进一步的，所述电压写入模块包括第二薄膜晶体管与所述第三薄膜晶体管，且所述第二薄膜晶体管为开关晶体管；
所述第二薄膜晶体管的栅极接入扫描信号，源极接入数据信号，所述第二薄膜晶体管的漏极接入第一薄膜晶体管的栅极；
所述第三薄膜晶体管设置于所述第一薄膜晶体管的栅极与漏极之间，且所述第三薄膜晶体管的栅极接入扫描信号。
进一步的，所述电性恢复模块包括第五薄膜晶体管与第六薄膜晶体管；
所述第五薄膜晶体管的源极连接电源正电压，所述第五薄膜晶体管的漏极与所述第一薄膜晶体管的源极连接；
所述第六薄膜晶体管的源极与所述第一薄膜晶体管的漏极连接，所述第六薄膜晶体管的漏极与所述发光模块连接；
其中，所述第五薄膜晶体管的栅极与第六薄膜晶体管的栅极，均接入所述发光控制信号以控制发光模块的发光时间。
进一步的，所述复位模块还接入电性恢复信号，且所述复位模块包括第四薄膜晶体管与第七薄膜晶体管；
所述第四薄膜晶体管的漏极接入所述第一薄膜晶体管的栅极，所述第四薄膜晶体管的源极接入预设电压，所述第四薄膜晶体管的栅极接入复位信号；
所述第七薄膜晶体管的源极与所述发光模块的输入端连接，所述第七薄膜晶体管的漏极与所述发光模块的输出端连接并接入电源信号，所述第七薄膜晶体管的栅极通过接入所述复位信号向第一薄膜晶体管的栅极写入复位电压。
进一步的，所述第四薄膜晶体管为第一双栅极晶体管，所述第三薄膜晶体管为第二双栅极晶体管；
所述第一双栅极晶体管包括有一源极晶体管和一漏极晶体管，且所述源极晶体管与所述漏极晶体管分别具有一栅极、一源极和一漏极，所述源极晶体管的源极连接到所述预设电压，所述源极晶体管的漏极连接到所述漏极晶体管的源极，所述漏极晶体管的漏极与所述第一薄膜晶体管的栅极电连接；
所述第二双栅极晶体管包括有一源极晶体管和一漏极晶体管，且所述源极晶体管与所述漏极晶体管分别具有一栅极、一源极和一漏极，所述源极晶体管的源极连接到所述第一薄膜晶体管的漏极，所述源极晶体管的漏极连接到所述漏极晶体管的源极，所述漏极晶体管的漏极与所述第一薄膜晶体管的栅极电连接。
进一步的，所述发光模块包括多个并联设置的发光二极管，所述发光二极管的阳极接入所述第六薄膜晶体管的漏极，所述发光二极管的阴极接入所述电源信号。
进一步的，所述像素驱动电路具有复位阶段、数据信号写入与阈值电压补偿阶段及发光阶段：
当所述像素驱动电路处于复位阶段时，所述驱动模块与复位模块导通，所述电性恢复模块、所述电压写入模块与所述发光模块断开；
当所述像素驱动电路处于数据信号写入与阈值电压补偿阶段时，所述驱动模块与所述电压写入模块导通，所述电性恢复模块、电压写入模块与所述发光模块断开；
当所述像素驱动电路处于发光阶段时，所述驱动模块、电性恢复模块与发光模块导通，所述电压写入模块与所述复位模块断开。
进一步的，所述第一薄膜晶体管、所述第二薄膜晶体管、所述第三薄膜晶体管、所述第四薄膜晶体管、所述第五薄膜晶体管、所述第六薄膜晶体管与第七薄膜晶体管均为P型薄膜晶体管；
在所述复位阶段，所述发光控制信号与所述扫描信号为高电位，所述电性恢复控制信号为低电位；
在所述数据信号写入与阈值电压补偿阶段，所述发光控制信号为高电位，所述电性恢复控制信号与所述扫描信号为低电位；
在所述发光阶段，所述电性恢复控制信号与所述扫描信号为高电位，所述发光控制信号为低电位。
在所述数据信号写入与阈值电压补偿阶段，所述发光控制信号为低电位，所述电性恢复控制信号与所述扫描信号为高电位；
在所述发光阶段，所述电性恢复控制信号与所述扫描信号为低电位，所述发光控制信号为高电位。
第二方面，本申请提供一种显示装置，所述电子设备包括时序控制器以及如第一方面中任一所述的像素驱动电路，所述时序控制器用于控制所述像素驱动电路里的所述发光控制信号、所述扫描信号与所述电性恢复控制信号。
 有益效果
相较于现有技术，本申请提供一种像素驱动电路及显示装置，像素驱动电路包括驱动模块、电压写入模块、电性恢复模块、复位模块与发光模块，电压写入模块用于给所述驱动模块写入补偿电压，复位模块用于在像素驱动电路的复位阶段，向驱动模块提供预设电压，并向发光模块提供复位电压，驱动模块用于根据预设电压控制发光模块发光。本发明实施例中该电压写入模块可以给驱动模块写入补偿电压，防止驱动模块的阈值电压飘移，同时该像素驱动电路在复位阶段，所述驱动模块电位复位至所述预设电压，源极复位到复位电压值，且预设电压值与复位电压不相等，并均为非正值，能够减少在复位阶段由于漏电引起的驱动模块中的薄膜晶体管栅极电位漂移，提高显示画面画质。
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
 附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为现有技术的像素驱动电路的结构示意图。
图2为本申请实施例提供的像素驱动电路的结构示意图。
图3为本申请实施例提供的像素驱动电路的另一种结构示意图。
图4为本申请实施例提供的像素驱动电路的另一种结构示意图。
图5为本申请实施例提供的像素驱动电路的另一种结构示意图。
图6为本申请实施例提供的像素驱动电路的另一种结构示意图。
图7为本申请实施例提供的像素驱动电路的另一种结构示意图。
图8为本申请实施例提供的像素驱动电路的另一种结构示意图。
图9为本申请实施例所提供的时序示意图。
 本发明的实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
在本申请中，“示例性”一词用来表示“用作例子、例证或说明”。本申请中被描述为“示例性”的任何实施例不一定被解释为比其它实施例更优选或更具优势。为了使本领域任何技术人员能够实现和使用本发明，给出了以下描述。在以下描述中，为了解释的目的而列出了细节。应当明白的是，本领域普通技术人员可以认识到，在不使用这些特定细节的情况下也可以实现本发明。在其它实例中，不会对公知的结构和过程进行详细阐述，以避免不必要的细节使本发明的描述变得晦涩。因此，本发明并非旨在限于所示的实施例，而是与符合本申请所公开的原理和特征的最广范围相一致。
本发明的说明书和权利要求书及上述附图中的术语“第一”、“第二”、“第三”“第四”等(如果存在)是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换，以便这里描述的本发明的实施例能够以除了在这里图示或描述的那些以外的顺序实施。此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，例如，包含了一系列步骤或单元的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。
本文中术语“系统”和“网络”在本文中常被可互换使用。本文中术语“和/或”，仅仅是一种描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。另外，本文中字符“/”，一般表示前后关联对象是一种“或”的关系。
本发明实施例提供一种像素驱动电路及显示装置，以下分别进行详细说明。
如图1所示，图1为现有技术的像素驱动电路的结构示意图，为传统的用于AMOLED的2T1C像素驱动电路，具体包括：第一薄膜晶体管T10、第二薄膜晶体管T20、及电容C10，所述第一薄膜晶体管T10为开关薄膜晶体管，所述第二薄膜晶体管T20为驱动薄膜晶体管，所述电容C10为存储电容。具体地，第一薄膜晶体管T10的栅极接入扫描信号Scan，源极接入数据信号Data，漏极与第二薄膜晶体管T20的栅极、及电容C10的一端电性连接；所述第二薄膜晶体管T20的源极电性连接电源正电压VDD，漏极电性连接有机发光二级管D10的阳极；有机发光二级管D10的阴极电性连接电源负电压VSS；电容C10的一端电性连接第一薄膜晶体管T10的漏极，另一端电性连接第二薄膜晶体管T20的源极。AMOLED显示时，扫描信号Scan控制第一薄膜晶体管T10导通，数据信号Data经过第一薄膜晶体管T10进入到第二薄膜晶体管T20的栅极及电容C10，然后第一薄膜晶体管T10截止，由于电容C10的存储作用，第二薄膜晶体管T20的栅极电压仍可继续保持数据信号电压，使得第二薄膜晶体管T20处于导通状态，驱动电流通过第二薄膜晶体管T20进入有机发光二级管D10，驱动有机发光二极管D10发光。
图1的像素驱动电路结构较简单存在很多缺陷，不具有补偿功能，驱动薄膜晶体管即第二薄膜晶体管T20长期工作在正向偏压状态，这会导致阈值电压偏移。鉴于各面板厂商都朝着高分辨率和高频驱动方向发展，使得像素驱动电路需要更高的像素分辨率和刷新频率，使得阈值电压偏移现象更严重。
下面就针对上述阈值电压偏移严重的现象提出一种像素驱动电路，请参见图2，该图2为本申请实施例所提供的一种像素驱动电路结构示意图，在该图2中，所述像素驱动电路包括驱动模块10、电压写入模块20、电性恢复模块30、复位模块40与发光模块50；
所述驱动模块10与所述发光模块50电连接，所述电性恢复模块30的一端与所述驱动模块10电连接，另一端接入发光控制信号（EM），所述电压写入模块20分别与所述驱动模块10和所述发光模块50电连接，所述电压写入模块20设置有接入扫描信号（SCAN）与数据信号（DATA）的端口，所述复位模块40两端连接所述驱动模块10和所述发光模块50；
所述电压写入模块20用于给所述驱动模块10写入补偿电压（U），所述复位模块40用于在所述像素驱动电路的复位阶段，向所述驱动模块10提供预设电压（VI），并向所述发光模块50提供电源信号（VSS），所述驱动模块10用于根据所述预设电压（VI）控制所述发光模块50发光，其中，所述预设电压（VI）与所述电源信号（VSS）不相等，且均为非正值。
具体的，请参见图3，该图3为本申请实施例所提供的另一种像素驱动电路结构示意图，在该图3中，所述驱动模块10包括第一薄膜晶体管（T1）与电容（C）；
所述第一薄膜晶体管（T1）为驱动晶体管，且其源极连接所述电性恢复模块30，其漏极连接所述发光模块50与所述电性恢复模块30，其栅极连接所述复位模块40和电压写入模块20；
所述电容（C）的一端接入所述电源正电压（VDD），另一端电性连接第一薄膜晶体管（T1）的栅极。
在一些实施例中，请参见图4，该图4为本申请实施例所提供的另一种像素驱动电路结构示意图，在该图4中，所述电压写入模块30包括第二薄膜晶体管（T2）与所述第三薄膜晶体管（T3），且所述第二薄膜晶体管（T2）为开关晶体管；
所述第二薄膜晶体管（T2）的栅极接入扫描信号（SCAN），源极接入数据信号（DATA），所述第二薄膜晶体管（T2）的漏极接入第一薄膜晶体管（T1）的栅极；
所述第三薄膜晶体管（T3）设置于所述第一薄膜晶体管（T1）的栅极与漏极之间，且所述第三薄膜晶体管（T3）的栅极接入扫描信号（SCAN）。
在一些实施例中，请参见图5，该图5为本申请实施例所提供的另一种像素驱动电路结构示意图，在该图5中，所述电性恢复模块30包括第五薄膜晶体管（T5）与第六薄膜晶体管（T6）；
所述第五薄膜晶体管（T5）的源极连接电源正电压（VDD），所述第五薄膜晶体管（T5）的漏极与所述第一薄膜晶体管（T1）的源极连接；
所述第六薄膜晶体管（T6）的源极与所述第一薄膜晶体管（T1）的漏极连接，所述第六薄膜晶体管（T6）的漏极与所述发光模块50连接；
其中，所述第五薄膜晶体管（T5）的栅极与第六薄膜晶体管（T6）的栅极，均接入所述发光控制信号（EM）以控制发光模块的发光时间。
在一些实施例中，请参见图6，该图6为本申请实施例所提供的另一种像素驱动电路结构示意图，在该图6中，所述复位模块40还接入电性恢复信号（RESET），且所述复位模块40包括第四薄膜晶体管（T4）与第七薄膜晶体管（T7）；
所述第四薄膜晶体管（T4）的漏极接入所述第一薄膜晶体管（T1）的栅极，所述第四薄膜晶体管（T4）的源极接入预设电压（VI），所述第四薄膜晶体管（T4）的栅极接入复位信号（RESET）；
所述第七薄膜晶体管（T7）的源极与所述发光模块50的输入端连接，所述第七薄膜晶体管（T7）的漏极与所述发光模块50的输出端连接并接入电源信号（VSS），所述第七薄膜晶体管（T7）的栅极通过接入所述复位信号（RESET）向第一薄膜晶体管（T1）的栅极写入电源信号（VSS）。
在一些实施例中，请参见图7，该图7为本申请实施例所提供的另一种像素驱动电路，在该图7中，所述发光模块50包括多个并联设置的发光二极管（L），所述发光二极管（L）的阳极接入所述第六薄膜晶体管（T6）的漏极，所述发光二极管（L）的阴极接入所述电源信号（VSS）。
具体的，请参见图8，该图8为本申请实施例所提供的另一种像素驱动电路结构示意图，在该图8中，所述第四薄膜晶体管（T4）为第一双栅极晶体管，所述第三薄膜晶体管（T3）为第二双栅极晶体管；
所述第一双栅极晶体管包括有一源极晶体管和一漏极晶体管，且所述源极晶体管与所述漏极晶体管分别具有一栅极、一源极和一漏极，所述源极晶体管的源极连接到所述预设电压（VI），所述源极晶体管的漏极连接到所述漏极晶体管的源极，所述漏极晶体管的漏极与所述第一薄膜晶体管（T1）的栅极电连接；
所述第二双栅极晶体管包括有一源极晶体管和一漏极晶体管，且所述源极晶体管与所述漏极晶体管分别具有一栅极、一源极和一漏极，所述源极晶体管的源极连接到所述第一薄膜晶体管（T1）的漏极，所述源极晶体管的漏极连接到所述漏极晶体管的源极，所述漏极晶体管的漏极与所述第一薄膜晶体管（T1）的栅极电连接。
具体的，在本申请实施例所提供的像素驱动电路中，所述第一薄膜晶体管（T1）、所述第二薄膜晶体管（T2）、所述第三薄膜晶体管（T3）、所述第四薄膜晶体管（T4）、所述第五薄膜晶体管（T5）、所述第六薄膜晶体管（T6）与第七薄膜晶体管（T7）均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管与非晶硅薄膜晶体管中的至少一种。
需要说明的是，所述像素驱动电路具有复位阶段（TA）、数据信号写入与阈值电压补偿阶段（TB）及发光阶段（TC）：
当所述像素驱动电路处于复位阶段（TA）时，所述驱动模块10与复位模块40导通，所述电性恢复模块30、所述电压写入模块20与所述发光模块50断开；
当所述像素驱动电路处于数据信号写入与阈值电压补偿阶段（TB）时，所述驱动模块10与所述电压写入模块20导通，所述电性恢复模块30、电压写入模块40与所述发光模块50断开；
当所述像素驱动电路处于发光阶段（TC）时，所述驱动模块10、电性恢复模块30与发光模块50导通，所述电压写入模块20与所述复位模块40断开。
进一步的，请参见图9，该图9为本申请实施例所提供的时序示意图，薄膜晶体管按类型可划分为N型薄膜晶体管与P型薄膜晶体管：
当所述第一薄膜晶体管（T1）、所述第二薄膜晶体管（T2）、所述第三薄膜晶体管（T3）、所述第四薄膜晶体管（T4）、所述第五薄膜晶体管（T5）、所述第六薄膜晶体管（T6）与第七薄膜晶体管（T7）均为P型薄膜晶体管时；
在所述复位阶段（TA），所述发光控制信号（EM）与所述扫描信号（SCAN）为高电位，所述电性恢复控制信号（RESET）为低电位；
在所述数据信号写入与阈值电压补偿阶段（TB），所述发光控制信号（EM）为高电位，所述电性恢复控制信号（RESET）与所述扫描信号（SCAN）为低电位；
在所述发光阶段（TC），所述电性恢复控制信号（RESET）与所述扫描信号（SCAN）为高电位，所述发光控制信号（EM）为低电位。
与此同时，当所述第一薄膜晶体管（T1）、所述第二薄膜晶体管（T2）、所述第三薄膜晶体管（T3）、所述第四薄膜晶体管（T4）、所述第五薄膜晶体管（T5）、所述第六薄膜晶体管（T6）与第七薄膜晶体管（T7）均为N型薄膜晶体管时；
在所述复位阶段（TA），所述发光控制信号（EM）与所述扫描信号（SCAN）为低电位，所述电性恢复控制信号（RESET）为高电位；
在所述数据信号写入与阈值电压补偿阶段（TB），所述发光控制信号（EM）为低电位，所述电性恢复控制信号（RESET）与所述扫描信号（SCAN）为高电位；
在所述发光阶段（TC），所述电性恢复控制信号（RESET）与所述扫描信号（SCAN）为低电位，所述发光控制信号（EM）为高电位。
需要指出的是，在本申请实施例所提供的像素驱动电路中，所述发光控制信号（EM）、所述扫描信号（SCAN）与所述电性恢复控制信号（RESET）均通过外部的时序控制器产生。
除上述所提供的像素驱动电路外，本申请实施例还提供一种像素驱动方法，包括以下四步骤：
步骤一、提供一像素驱动电路；
所述像素驱动电路包括驱动模块、电压写入模块、电性恢复模块、复位模块与发光模块；
所述驱动模块与所述发光模块电连接，用于控制所述发光模块发光；
所述电压写入模块的接入扫描信号与数据信号，并同时与所述驱动模块、所述发光模块电连接，用于给所述驱动模块写入补偿电压；
所述电性恢复模块的一端与所述驱动模块电连接，另一端接入发光控制信号，以使所述驱动模块控制所述发光模块的发光时间；
所述复位模块两端连接所述驱动模块和所述发光模块，用于向所述驱动模块提供预设电压，向所述发光模块提供复位电压，且所述预设电压值与所述复位电压不相等，且均为非正值。
步骤二、进入复位阶段：
所述发光控制信号与所述扫描信号接入第一电位，所述电性恢复控制信号接入第二电位；
所述驱动模块与复位模块导通，所述电性恢复模块、所述电压写入模块与所述发光模块断开，所述驱动模块的电位复位至所述预设电压，所述发光模块复位至复位电压；
步骤三、进入数据信号写入与阈值电压补偿阶段：
所述发光控制信号接入第一电位，所述电性恢复控制信号与所述扫描信号接入第二电位；
所述驱动模块与所述电压写入模块导通，所述电性恢复模块、电性恢复模块与所述发光模块断开；所述驱动模块存储所述电压写入模块的补偿电压；
步骤四、进入发光阶段：
所述电性恢复控制信号与所述扫描信号接入第一电位，所述发光控制信号接入第二电位；
所述驱动模块、电性恢复模块与发光模块导通，所述电压写入模块与所述复位模块断开；
所述驱动模块向所述发光模块放电，驱动所述发光模块发光。
进一步的，所述第一薄膜晶体管、所述第二薄膜晶体管、所述第三薄膜晶体管、所述第四薄膜晶体管、所述第五薄膜晶体管、所述第六薄膜晶体管与第七薄膜晶体管均为N型薄膜晶体管，或者均为P型薄膜晶体管；
当其均为P型薄膜晶体管时，所述第一电位为高电位，所述第二电位为低电位；
当其均为N型薄膜晶体管时，所述第一电位为低电位，所述第二电位为高电位。
基于同一发明申请构思，本发明实施例还提供了一种显示装置以及时序控制器，包括本发明任意实施例提供的像素驱动电路。所述时序控制器用于控制所述像素驱动电路里的所述发光控制信号、所述扫描信号与所述电性恢复控制信号。
基于同一发明申请构思，本发明实施例提供了一种显示面板，包括：本发明任意实施例提供的像素驱动电路。该显示面板可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
 工业实用性
综合以上，本发明提供一种像素驱动电路及显示装置，像素驱动电路包括驱动模块、电压写入模块、电性恢复模块、复位模块与发光模块，电压写入模块用于给所述驱动模块写入补偿电压，复位模块用于在像素驱动电路的复位阶段，向驱动模块提供预设电压，并向发光模块提供复位电压，驱动模块用于根据预设电压控制发光模块发光。本发明实施例中该电压写入模块可以给驱动模块写入补偿电压，防止驱动模块的阈值电压飘移，同时该像素驱动电路在复位阶段，所述驱动模块电位复位至所述预设电压，源极复位到复位电压值，且预设电压值与复位电压不相等，并均为非正值，能够减少在复位阶段由于漏电引起的驱动模块中的薄膜晶体管栅极电位漂移，提高显示画面画质。
除上述实施例外，本申请还可以有其他实施方式。凡采用等同替换或等效替换形成的技术方案，均落在本申请要求的保护范围。
综上所述，虽然本发明已以较佳实施例揭露如上，但该较佳实施例并非用以限制本发明，该领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (18)

  1. 一种像素驱动电路，包括驱动模块、电压写入模块、电性恢复模块、复位模块与发光模块；
    所述电压写入模块的输入端设置有信号接入的端口，所述电压写入模块的输出端分别与所述驱动模块和所述发光模块电连接，所述电压写入模块用于给所述驱动模块写入补偿电压；
    所述复位模块的两端分别连接所述驱动模块和所述发光模块，所述复位模块用于在所述像素驱动电路的复位阶段，向所述驱动模块提供预设电压，并向所述发光模块提供复位电压，其中，所述预设电压与所述复位电压不相等，且均为非正值；
    所述驱动模块与所述发光模块电连接，用于根据所述预设电压控制所述发光模块发光；
    所述电性恢复模块的一端与所述驱动模块电连接，另一端接入发光控制信号。
  2. 根据权利要求1所述的像素驱动电路，其中所述驱动模块包括第一薄膜晶体管与电容；
    所述第一薄膜晶体管为驱动晶体管，且其源极连接所述电性恢复模块，其漏极连接所述发光模块与所述电性恢复模块，其栅极连接所述复位模块和电压写入模块；
    所述电容的一端接入所述电源正电压，另一端电性连接第一薄膜晶体管的栅极。
  3. 根据权利要求2所述的像素驱动电路，其中所述电压写入模块包括第二薄膜晶体管与所述第三薄膜晶体管，且所述第二薄膜晶体管为开关晶体管；
    所述第二薄膜晶体管的栅极接入扫描信号，源极接入数据信号，所述第二薄膜晶体管的漏极接入第一薄膜晶体管的栅极；
    所述第三薄膜晶体管设置于所述第一薄膜晶体管的栅极与漏极之间，且所述第三薄膜晶体管的栅极接入扫描信号。
  4. 根据权利要求3所述的像素驱动电路，其中所述电性恢复模块包括第五薄膜晶体管与第六薄膜晶体管；
    所述第五薄膜晶体管的源极连接电源正电压，所述第五薄膜晶体管的漏极与所述第一薄膜晶体管的源极连接；
    所述第六薄膜晶体管的源极与所述第一薄膜晶体管的漏极连接，所述第六薄膜晶体管的漏极与所述发光模块连接；
    其中，所述第五薄膜晶体管的栅极与第六薄膜晶体管的栅极，均接入所述发光控制信号以控制发光模块的发光时间。
  5. 根据权利要求4所述的像素驱动电路，其中所述复位模块包括第四薄膜晶体管与第七薄膜晶体管；
    所述第四薄膜晶体管的漏极接入所述第一薄膜晶体管的栅极，所述第四薄膜晶体管的源极接入预设电压，所述第四薄膜晶体管的栅极接入复位信号；
    所述第七薄膜晶体管的源极与所述发光模块的输入端连接，所述第七薄膜晶体管的漏极与所述发光模块的输出端连接并接入电源信号，所述第七薄膜晶体管的栅极通过接入所述复位信号向第一薄膜晶体管的栅极写入复位电压。
  6. 根据权利要求5所述的像素驱动电路，其中所述第四薄膜晶体管为第一双栅极晶体管，所述第三薄膜晶体管为第二双栅极晶体管；
    所述第一双栅极晶体管包括有一源极晶体管和一漏极晶体管，且所述源极晶体管与所述漏极晶体管分别具有一栅极、一源极和一漏极，所述源极晶体管的源极连接到所述预设电压，所述源极晶体管的漏极连接到所述漏极晶体管的源极，所述漏极晶体管的漏极与所述第一薄膜晶体管的栅极电连接；
    所述第二双栅极晶体管包括有一源极晶体管和一漏极晶体管，且所述源极晶体管与所述漏极晶体管分别具有一栅极、一源极和一漏极，所述源极晶体管的源极连接到所述第一薄膜晶体管的漏极，所述源极晶体管的漏极连接到所述漏极晶体管的源极，所述漏极晶体管的漏极与所述第一薄膜晶体管的栅极电连接。
  7. 根据权利要求5所述的像素驱动电路，其中所述发光模块包括多个并联设置的发光二极管，所述发光二极管的阳极接入所述第六薄膜晶体管的漏极，所述发光二极管的阴极接入所述电源信号。
  8. 根据权利要求1所述的像素驱动电路，其中所述像素驱动电路具有复位阶段、数据信号写入与阈值电压补偿阶段及发光阶段：
    当所述像素驱动电路处于复位阶段时，所述驱动模块与复位模块导通，所述电性恢复模块、所述电压写入模块与所述发光模块断开；
    当所述像素驱动电路处于数据信号写入与阈值电压补偿阶段时，所述驱动模块与所述电压写入模块导通，所述电性恢复模块、电压写入模块与所述发光模块断开；
    当所述像素驱动电路处于发光阶段时，所述驱动模块、电性恢复模块与发光模块导通，所述电压写入模块与所述复位模块断开。
  9. 根据权利要求8所述的像素驱动电路，其中所述第一薄膜晶体管、所述第二薄膜晶体管、所述第三薄膜晶体管、所述第四薄膜晶体管、所述第五薄膜晶体管、所述第六薄膜晶体管与第七薄膜晶体管均为P型薄膜晶体管；
    在所述复位阶段，所述发光控制信号与所述扫描信号为高电位，所述电性恢复控制信号为低电位；
    在所述数据信号写入与阈值电压补偿阶段，所述发光控制信号为高电位，所述电性恢复控制信号与所述扫描信号为低电位；
    在所述发光阶段，所述电性恢复控制信号与所述扫描信号为高电位，所述发光控制信号为低电位。
  10. 一种显示装置，其包括：
    时序控制器，用于控制发光控制信号、扫描信号与电性恢复控制信号；以及
    像素驱动电路，其包括驱动模块、电压写入模块、电性恢复模块、复位模块与发光模块；
    其中所述电压写入模块的输入端设置有信号接入的端口，所述电压写入模块的输出端分别与所述驱动模块和所述发光模块电连接，所述电压写入模块用于给所述驱动模块写入补偿电压；
    所述复位模块的两端分别连接所述驱动模块和所述发光模块，所述复位模块用于在所述像素驱动电路的复位阶段，向所述驱动模块提供预设电压，并向所述发光模块提供复位电压，其中，所述预设电压与所述复位电压不相等，且均为非正值；
    所述驱动模块与所述发光模块电连接，用于根据所述预设电压控制所述发光模块发光；
    所述电性恢复模块的一端与所述驱动模块电连接，另一端接入所述发光控制信号。
  11. 根据权利要求10所述的显示装置，其中所述驱动模块包括第一薄膜晶体管与电容；
    所述第一薄膜晶体管为驱动晶体管，且其源极连接所述电性恢复模块，其漏极连接所述发光模块与所述电性恢复模块，其栅极连接所述复位模块和电压写入模块；
    所述电容的一端接入所述电源正电压，另一端电性连接第一薄膜晶体管的栅极。
  12. 根据权利要求11所述的显示装置，其中所述电压写入模块包括第二薄膜晶体管与所述第三薄膜晶体管，且所述第二薄膜晶体管为开关晶体管；
    所述第二薄膜晶体管的栅极接入扫描信号，源极接入数据信号，所述第二薄膜晶体管的漏极接入第一薄膜晶体管的栅极；
    所述第三薄膜晶体管设置于所述第一薄膜晶体管的栅极与漏极之间，且所述第三薄膜晶体管的栅极接入扫描信号。
  13. 根据权利要求12所述的显示装置，其中所述电性恢复模块包括第五薄膜晶体管与第六薄膜晶体管；
    所述第五薄膜晶体管的源极连接电源正电压，所述第五薄膜晶体管的漏极与所述第一薄膜晶体管的源极连接；
    所述第六薄膜晶体管的源极与所述第一薄膜晶体管的漏极连接，所述第六薄膜晶体管的漏极与所述发光模块连接；
    其中，所述第五薄膜晶体管的栅极与第六薄膜晶体管的栅极，均接入所述发光控制信号以控制发光模块的发光时间。
  14. 根据权利要求13所述的显示装置，其中所述复位模块包括第四薄膜晶体管与第七薄膜晶体管；
    所述第四薄膜晶体管的漏极接入所述第一薄膜晶体管的栅极，所述第四薄膜晶体管的源极接入预设电压，所述第四薄膜晶体管的栅极接入复位信号；
    所述第七薄膜晶体管的源极与所述发光模块的输入端连接，所述第七薄膜晶体管的漏极与所述发光模块的输出端连接并接入电源信号，所述第七薄膜晶体管的栅极通过接入所述复位信号向第一薄膜晶体管的栅极写入复位电压。
  15. 根据权利要求14所述的显示装置，其中所述第四薄膜晶体管为第一双栅极晶体管，所述第三薄膜晶体管为第二双栅极晶体管；
    所述第一双栅极晶体管包括有一源极晶体管和一漏极晶体管，且所述源极晶体管与所述漏极晶体管分别具有一栅极、一源极和一漏极，所述源极晶体管的源极连接到所述预设电压，所述源极晶体管的漏极连接到所述漏极晶体管的源极，所述漏极晶体管的漏极与所述第一薄膜晶体管的栅极电连接；
    所述第二双栅极晶体管包括有一源极晶体管和一漏极晶体管，且所述源极晶体管与所述漏极晶体管分别具有一栅极、一源极和一漏极，所述源极晶体管的源极连接到所述第一薄膜晶体管的漏极，所述源极晶体管的漏极连接到所述漏极晶体管的源极，所述漏极晶体管的漏极与所述第一薄膜晶体管的栅极电连接。
  16. 根据权利要求14所述的显示装置，其中所述发光模块包括多个并联设置的发光二极管，所述发光二极管的阳极接入所述第六薄膜晶体管的漏极，所述发光二极管的阴极接入所述电源信号。
  17. 根据权利要求10所述的显示装置，其中所述像素驱动电路具有复位阶段、数据信号写入与阈值电压补偿阶段及发光阶段：
    当所述像素驱动电路处于复位阶段时，所述驱动模块与复位模块导通，所述电性恢复模块、所述电压写入模块与所述发光模块断开；
    当所述像素驱动电路处于数据信号写入与阈值电压补偿阶段时，所述驱动模块与所述电压写入模块导通，所述电性恢复模块、电压写入模块与所述发光模块断开；
    当所述像素驱动电路处于发光阶段时，所述驱动模块、电性恢复模块与发光模块导通，所述电压写入模块与所述复位模块断开。
  18. 根据权利要求17所述的显示装置，其中所述第一薄膜晶体管、所述第二薄膜晶体管、所述第三薄膜晶体管、所述第四薄膜晶体管、所述第五薄膜晶体管、所述第六薄膜晶体管与第七薄膜晶体管均为P型薄膜晶体管；
    在所述复位阶段，所述发光控制信号与所述扫描信号为高电位，所述电性恢复控制信号为低电位；
    在所述数据信号写入与阈值电压补偿阶段，所述发光控制信号为高电位，所述电性恢复控制信号与所述扫描信号为低电位；
    在所述发光阶段，所述电性恢复控制信号与所述扫描信号为高电位，所述发光控制信号为低电位。
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