WO2021059756A1 - Light source device - Google Patents

Light source device Download PDF

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Publication number
WO2021059756A1
WO2021059756A1 PCT/JP2020/029902 JP2020029902W WO2021059756A1 WO 2021059756 A1 WO2021059756 A1 WO 2021059756A1 JP 2020029902 W JP2020029902 W JP 2020029902W WO 2021059756 A1 WO2021059756 A1 WO 2021059756A1
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Prior art keywords
unit
light source
current
source device
voltage
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PCT/JP2020/029902
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French (fr)
Japanese (ja)
Inventor
満志 田畑
貴志 増田
鈴木 大輔
修 紅谷
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ソニーセミコンダクタソリューションズ株式会社
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Publication of WO2021059756A1 publication Critical patent/WO2021059756A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/04Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
    • H01S5/042Electrical excitation ; Circuits therefor

Definitions

  • This disclosure relates to a light source device.
  • a light emitting element such as a laser diode that emits light according to an electric current is known. If a current (overcurrent) that greatly exceeds the design value flows through such a light emitting element due to a defect in the power supply system or the like, light may be emitted with an unexpectedly large amount of light. In addition, there is a risk of causing destruction of the light emitting element itself. Therefore, a circuit that monitors the current flowing through the light emitting element and protects the light emitting element has been proposed.
  • Patent Document 1 the voltage on the anode side of the laser diode, the threshold voltage, and the comparator are compared, and the drive current of the laser diode is controlled based on the comparison result. Further, in Patent Document 2, a comparator and a current limiter are used to monitor the drive current of the laser diode.
  • the power supply voltage level may be increased. In that case, there is room for improvement in protecting the light emitting element.
  • the present disclosure proposes a light source device capable of appropriately protecting the light emitting element when the light emitting element and its driver circuit are realized in a semiconductor chip.
  • the light source device has a light emitting element that emits light with a predetermined amount of light when a predetermined drive current is supplied, a drive unit that supplies the drive current to the light emitting element, and an overcurrent for the drive current.
  • a reference level generator that generates a reference level that serves as a reference for detection, a comparison unit that compares the drive current with the reference level and outputs the comparison result as an output signal, and an output signal level of the comparison unit. It has a level shift unit that shifts and outputs the current, and detects an overcurrent of the drive current based on the output of the level shift unit.
  • FIG. 1 is a block diagram showing a configuration of an example of a light source device applicable to each embodiment of the present disclosure.
  • the light emitting element is a laser diode (LD).
  • Laser diodes are excellent in straightness and light collection, have a high response speed, and take advantage of their characteristics such as low power consumption in various fields such as distance measurement, optical transmission, and electrophotographic printers. It is used in.
  • the light emitting device applicable to the present disclosure is not limited to the laser diode.
  • an LED Light Emitting Diode
  • the light source device 1 includes a driver 10 and a laser diode (LD) 12.
  • the controller 11 may be included in the light source device 1.
  • the driver 10 drives the laser diode 12 under the control of the controller 11 to cause the laser diode 12 to emit light.
  • the controller 11 includes, for example, a CPU (Central Processing Unit) and a memory, and supplies a control signal 40 generated by the CPU according to a program stored in the memory in advance to the driver 10 to control the driver 10. Further, the controller 11 determines whether or not an overcurrent is supplied to the laser diode 12 based on the detection signal 42 output from the driver 10. When the controller 11 determines that an overcurrent is being supplied to the laser diode 12, it generates a control signal 43 indicating that fact and supplies the control signal 43 to the driver 10.
  • a control signal 43 indicating that fact and supplies the control signal 43 to the driver 10.
  • the overcurrent is a current larger than the current for causing the laser diode 12 to emit light with a predetermined amount of light, and the difference is equal to or more than the threshold value.
  • the driver 10 includes a drive unit 20 and a detection unit 21.
  • the drive unit 20 generates a drive current for causing the laser diode 12 to emit light according to the control signal 40 supplied from the controller 11, and supplies the generated drive current to the laser diode 12. Further, the drive unit 20 can control the on / off of the light emission of the laser diode 12 according to the control signal 43 supplied from the controller 11. Further, the drive unit 20 supplies the detection unit 21 with a signal 41 indicating the current value of the drive current that drives the laser diode 12. The detection unit 21 supplies the detection signal 42 based on the signal 41 supplied from the drive unit 20 to the controller 11.
  • the detection unit 21 determines whether or not an overcurrent is supplied to the laser diode 12. For example, the detection unit 21 determines whether or not an overcurrent is supplied to the laser diode 12 based on the signal 41 supplied from the drive unit 20. When the detection unit 21 determines that an overcurrent is being supplied to the laser diode 12 as a result, the detection unit 21 supplies a signal 44 indicating that fact to the drive unit 20. The drive unit 20 stops the light emission of the laser diode 12, for example, in response to the signal 44. In this way, the response speed can be further increased by directly supplying the signal 44 indicating that the overcurrent is supplied to the laser diode 12 from the detection unit 21 to the drive unit 20.
  • FIG. 2 is a diagram showing a configuration of a driver 10 of a light source device of a comparative example.
  • the driver 10 of the comparative example has a drive unit 20, a replica unit 20R, a level shift unit 13a, 13b, a laser diode 12 as a light emitting element, and current sources 103, 104, 113, 114, which are low. It has a region passing filter 105 and a comparison unit 110.
  • the laser diode 12 emits light with a predetermined amount of light when a predetermined drive current is supplied.
  • the coupling portions 100a and 100b are provided to connect the laser diode 12 and the driver 10 when they have different configurations.
  • the driver 10 is configured on one semiconductor chip, and the laser diode 12 is configured as a unit 120 separate from the semiconductor chip.
  • the laser diode 12 and the driver 10 are electrically connected by the coupling portions 100a and 100b.
  • the drive unit 20 supplies the drive current to the laser diode 12.
  • the drive unit 20 includes a transistor 101 for supplying a drive current due to the power supply voltage VDD to the laser diode 12, and a transistor 111 for outputting a voltage corresponding to the drive current by the source follower.
  • the transistors 101 and 111 are P-channel MOS (Metal Oxide Semiconductor) transistors.
  • the replica unit 20R has a configuration that imitates the drive unit 20.
  • the replica unit 20R has a transistor 102 corresponding to the transistor 101 and a transistor 112 corresponding to the transistor 111.
  • Transistors 102 and 112 are P-channel MOS transistors.
  • the transistors 101 and 102 are configured so that their on-resistors R ON-1 and R ON-2 are equal.
  • the transistors 101 and 102 are formed in the same size. Further, it is more preferable to arrange the transistors 101 and 102 at positions thermally close to each other.
  • the replica unit 20R functions as a reference level generation unit that generates a reference level that serves as a reference for detecting an overcurrent with respect to the drive current.
  • a voltage source that generates a reference level may be used instead of the replica unit 20R.
  • the drain of the transistor 101 is connected to the anode of the laser diode 12 via the coupling portion 100a.
  • the cathode of the laser diode 12 is connected to the current source 103 via the coupling portion 100b.
  • the drain of the transistor 102 is connected to the current source 104.
  • the voltage V 1 is taken out at the connection point where the drain of the transistor 101 and the anode of the laser diode 12 are connected, and is supplied to the comparison unit 110.
  • the voltage V 2 is taken out at the connection point where the drain of the transistor 102 and the current source 104 are connected, and is supplied to the comparison unit 110.
  • Each source of transistors 101 and 102 is connected to a common power supply voltage VDD.
  • the drain of the transistor 101 is connected to the anode of the laser diode 12 via the coupling portion 100a.
  • the drain of the transistor 102 is connected to the current source 104.
  • the voltage V 1 at the connection point where the drain of the transistor 101 and the anode of the laser diode 12 are connected is taken out.
  • the voltage V 3 obtained by subtracting the gate-source voltage of the transistor 111 from the voltage V 1 is taken out.
  • the voltage V 3 is supplied to the comparison unit 110 via the level shift unit 13a and the low-pass filter 105. Further, the voltage V 2 is taken out at the connection point where the drain of the transistor 102 and the current source 104 are connected.
  • the voltage V 4 obtained by subtracting the gate-source voltage of the transistor 112 from the voltage V 2 is taken out.
  • the voltage V 4 is supplied to the comparison unit 110 via the level shift unit 13b.
  • the cathode of the laser diode 12 is connected to the current source 103 via the coupling portion 100b.
  • the on-resistance R ON-1 of the transistor 101 and the on-resistance R ON-2 of the transistor 102 have substantially the same resistance value.
  • the on-resistors R ON-1 and R ON-2 will be described as the on-resistors R ON.
  • V 1 and V 2 are obtained by the following equations (1) and (2).
  • V 1 V DD -R ON ⁇ ( IL + ⁇ )...
  • V 2 V DD -R ON ⁇ (I L + I offset) ...
  • the current I L is the current supplied to the laser diode 12
  • the current I offset is over-current component of the current to the current I L.
  • the level shift unit 13a from voltages V 1 corresponding to the drive current output from the drive unit 20, an input voltage obtained by subtracting the gate-source voltage of the transistor 111.
  • the level shift unit 13b an input voltage output from the replica unit 20R, that is, the voltage obtained by subtracting the gate-source voltage of the transistor 112 from the voltage V 2.
  • the current sources 113 and 114 operate so that a predetermined current flows through the level shift portions 13a and 13b.
  • the level shift units 13a and 13b shift the voltage level so that the voltage is within the range of the power supply voltage at which the comparison unit 110 operates.
  • the low-pass filter 105 inputs the voltage level-shifted by the level shift unit 13a.
  • the low-pass filter 105 removes high-frequency components.
  • the current flowing through the laser diode 12 changes at a predetermined cycle, and the high frequency component is removed by the low-pass filter 105. Therefore, the output of the low-pass filter 105 becomes a DC voltage corresponding to the average value of the currents flowing through the laser diode 12. Therefore, the low-pass filter 105 functions as an averaging circuit that outputs an average value of the input signal within a predetermined time.
  • the low-pass filter 105 is realized, for example, by a time constant circuit with a resistor and a capacitor.
  • the comparison unit 110 compares the output level of the low-pass filter 105 with the reference level signal level-shifted by the level shift unit 13b.
  • the comparison unit 110 outputs different signals depending on whether the output level of the low-pass filter 105 exceeds the reference level signal or not. For example, the comparison unit 110 outputs an output signal having a relatively high voltage (high level) when the output level of the low-pass filter 105 exceeds the reference level, and the output level of the low-pass filter 105 is the reference. When it is below the level, an output signal with a relatively low voltage (low level) is output. Therefore, the comparison unit 110 can determine that an overcurrent is being supplied to the laser diode 12. Therefore, the comparison unit 110 functions as the detection unit 21 in FIG.
  • the power supply voltage VDD and the operating voltage range of the comparison unit 110 may be different.
  • the operating voltage range of the comparison unit 110 may be + 2V to + 5V.
  • the level shift units 13a and 13b perform level shift so as to be within the operating voltage range of the comparison unit 110, an appropriate voltage after the level shift can be input to the comparison unit 110. it can. This makes it possible to detect an overcurrent with respect to the drive current.
  • the driver 10 of the comparative example uses a path (referred to as a main line) for supplying the current IL to the laser diode 12 by the drive unit 20 and a replication path (referred to as a replica path) by the replica unit 20R.
  • the current of this replica path is regarded as the current flowing through the laser diode 12.
  • Current source 103 supplies a current I L.
  • Current I L supplied current source 103 is a current for lighting the laser diode 12 at a predetermined light amount.
  • the current value supplied by the current source 104 can be changed.
  • Current source 104 supplies a current I c.
  • Current I c is the current plus the current I offset to the current I L. That is, the current source 104 supplies a current I L + I offset to be the threshold value that is over-current to the laser diode 12.
  • the current I L + I offset is a current obtained by adding the current I offset overcurrent component with respect to the current I L.
  • the level shift unit 13a has transistors 13 11 , 13 12 and 13 13 .
  • Transistors 13 11 to 13 13 are respectively diode-connected, and resistance is generated by the PN junction.
  • a resistor is realized by connecting a plurality of stages of the transistors 13 11 to 13 13 connected by diodes.
  • the level shift unit 13b has transistors 13 21 , 13 22 and 13 23 .
  • the transistors 13 21 to 13 23 are respectively diode-connected, and resistance is generated by the PN junction.
  • a resistor is realized by connecting a plurality of stages of transistors 13 21 to 13 23 connected by diodes.
  • the resistance value of the transistors 13 11 to 13 13 and the resistance value of the transistors 13 21 to 13 23 are the same. Should be. However, when the variation of the transistors (for example, the variation in manufacturing) is large, the resistance value by the transistors 13 11 to 13 13 and the resistance value by the transistors 13 21 to 13 23 are not the same, and the main line side by the level shift portion 13a There is a possibility that the level shift amount of the above and the level shift amount on the replica path side by the level shift unit 13b do not match. This may reduce the accuracy of overcurrent detection.
  • the area of the level shift portion may be increased in order to suppress a decrease in the accuracy of overcurrent detection. However, when the mounting area of the level shift portion is limited, it may be difficult to increase the area, and as a result, it may be difficult to reduce the variation.
  • FIG. 3 is a diagram showing a driver 10a of a light source device according to the first embodiment of the present disclosure.
  • the output signal of the drive unit 20 is input to the comparison unit 110a via the low-pass filter 105 without level shifting.
  • the output signal of the replica unit 20R is also input to the comparison unit 110a without level shifting.
  • the output of the comparison unit 110a is level-shifted by the level shift unit 130. That is, the difference between the driver 10a of the light source device shown in FIG. 3 and the comparative example described with reference to FIG. 2 is the position of the level shift unit 130.
  • the operating voltage range of the comparison unit 110a is different from the operating voltage range of the comparison unit 110 described with reference to FIG.
  • the power supply voltage VDD is + 5V and the ground level is 0V
  • the operating voltage range of the comparison unit 110 is + 2V to + 5V.
  • the operating voltage range of the comparison unit 110a is, for example, + 5V to 0V. As a result, the comparison unit 110a can appropriately perform the comparison operation.
  • the comparison unit 110a compares the output signal of the drive unit 20 with the output signal of the replica unit 20R.
  • the comparison unit 110a outputs a high level signal, for example, when the voltage level of the output signal of the drive unit 20 is lower than the voltage level of the output signal of the replica unit 20R (when an overcurrent is flowing).
  • the comparison unit 110a outputs a low level signal, for example, when the voltage level of the output signal of the drive unit 20 is higher than the voltage level of the output signal of the replica unit 20R (when no overcurrent is flowing). That is, the comparison unit 110a outputs a high level or low level output signal depending on whether or not the threshold value for detecting an overcurrent is exceeded.
  • the level shift unit 130 performs level shift to match the voltage level of a circuit in the subsequent stage (not shown), that is, a circuit to which the output signal is transferred. As a result, even if the arrangement of the comparison unit 110a and the level shift unit 130 is different from the above-mentioned comparative example, the output signal can be passed.
  • the level shift unit 130 changes the voltage level of a high level or low level output signal indicating the result of the comparison operation by the comparison unit 110a.
  • the level shift unit 130 similarly shifts the voltage level for the high level output signal and the low level output signal, and the level shift unit 130 changes the high level, which is the result of the comparison operation, to the low level. On the contrary, it does not change. Therefore, even if the level shift unit 130 performs the level shift, the accuracy of the comparison operation by the comparison unit 110a is not affected.
  • the comparison is performed by the comparison unit 110 after the level shift is performed using the two level shift units 13a and 13b. Therefore, there is a possibility that the transistors constituting the level shift portions 13a and 13b may have variations due to a manufacturing process or the like. If there is such a variation, there is a limit to the accuracy of comparison by the comparison unit 110.
  • the level shift is performed by the level shift unit 130. Therefore, the above variation does not affect the accuracy of the comparison operation by the comparison unit 110a.
  • FIG. 4 is a diagram showing a configuration of an example of the driver 10b according to the first modification of the first embodiment. Since the connection relationship of each element shown in FIG. 4 is the same as that of the driver 10a shown in FIG. 3, the description thereof is omitted here.
  • the driver 10b sets the on-resistance of the transistor 102'of the replica path to a resistance value larger than the on-resistance R ON-2 of the transistor 102 shown in FIG.
  • the on-resistance of the transistor 102' is a resistor R ON-2 ⁇ N (N is an integer of 2 or more).
  • the current supplied by the current source 104 of the replica path is set to a small current according to the on-resistance R ON-2 ⁇ N of the transistor 102'.
  • the current source 104 ' is supplying current (I L + I offset) / N. Since the current supplied by the current source 104'is smaller than that of the configuration of FIG. 3, the power consumption of the driver 10b can be reduced with respect to the driver 10a of FIG.
  • FIG. 5 is a diagram showing a configuration of an example of the driver 10b'related to the second modification of the first embodiment. Since the connection relationship of each element shown in FIG. 5 is the same as that of the driver 10a shown in FIG. 3, the description thereof is omitted here.
  • a capacitor 140 connected between the drain of the transistor 101 and the ground potential is further added to the configuration of FIG.
  • the capacitor 140 stores an electric charge corresponding to the voltage V DD of the power supply supplied via the transistor 101.
  • PWM Pulse Width Modulation
  • the voltage V DD of the power supply is supplied from the external substrate of the LDD chip 1000 to the pad 1001 on the LDD chip 1000 by wire bonding, for example.
  • wire bonding for example.
  • FIG. 6 is a diagram showing an example of the level shift unit 130a.
  • the level shift unit 130a shown in FIG. 6 includes resistors 131 and 132 connected in series, a transistor 133, and an inverting circuit 139.
  • the output signal of the comparison unit 110 is input to the gate of the transistor 133 as an input signal IN.
  • the transistor 133 is turned on or off based on the output signal of the comparison unit 110.
  • the reference voltage is a voltage that serves as a reference for the voltage divided by the resistors 131 and 132, which are voltage dividing resistors. For example, ground can be used as a reference voltage, but the reference voltage is not limited thereto.
  • the inverting circuit 139 inverts and outputs the voltage divided by the resistors 131 and 132.
  • the transistor 133 is turned on or off based on the output signal of the comparison unit 110.
  • the resistors 131 and 132 function as voltage dividing resistors.
  • the level shift unit 130a inverts the voltage divided by the voltage dividing resistance by the resistors 131 and 132 by the inverting circuit 139 and outputs the voltage. That is, the level shift unit 130a outputs the voltage corresponding to the voltage divided by the voltage dividing resistor as the output signal OUT after the level shift. That is, the level shift unit 130a outputs a level-shifted output signal OUT with respect to the input signal IN.
  • the level shift can be realized by a simple configuration, the increase in the mounting area due to the provision of the level shift portion 130a can be minimized.
  • FIG. 7 is a diagram showing an example of the level shift unit 130b.
  • the level shift unit 130b shown in FIG. 7 includes a flip-flop unit FF, buffer units BF1 and BF2, transistors 134a and 134b, and an output unit 135.
  • the buffer unit BF1 and the buffer unit BF2 receive an input signal IN as an input.
  • the input signal IN is an output signal of the comparison unit 110.
  • the flip-flop unit FF is composed of four transistors.
  • the flip-flop unit FF has either a first state of outputting a relatively high voltage (high level) output signal or a second state of outputting a relatively low voltage (low level) output signal. Become in a state.
  • a power supply voltage V DDH is applied to the flip-flop portion FF via the transistors 134a or 134b.
  • the flip-flop unit FF has transistors F1 and F2 that are turned on by either one, and transistors F3 and F4 that are turned on by the power supply voltage V DDM.
  • the flip-flop unit FF is in the first state of outputting a high-level output signal or the second state of outputting a low-level output signal.
  • the output signal of the flip-flop unit FF is input to the output unit 135.
  • the output unit 135 has a CMOS inverter with transistors C1 and C2.
  • the buffer units BF1 and BF2, the transistors 134a and 134b are operated by the power supply voltage V DDH and the reference voltage V SSH.
  • the flip-flop unit FF operates by the power supply voltage V DDM and the reference voltage V SSL .
  • the output unit 135 operates by the power supply voltage V DDL and the reference voltage V SSL . Therefore, the flip-flop unit FF and the output unit 135 operate with different power supply voltages.
  • the power supply voltage V DDH is a voltage higher than the power supply voltage V DDM and the power supply voltage V DDL.
  • the power supply voltage V DDM is a voltage lower than the power supply voltage V DDH and higher than the power supply voltage V DDL.
  • the power supply voltage V DDL is a voltage lower than the power supply voltage V DDM and the power supply voltage V DDH.
  • the reference voltage V SSH is a voltage higher than the reference voltage V SSL.
  • the buffer unit BF1 outputs the input signal IN without inverting it.
  • the buffer unit BF2 inverts the input signal IN and outputs it.
  • the output signal of the buffer unit BF1 is input to the gate of the transistor 134a.
  • the output signal of the buffer unit BF2 is input to the gate of the transistor 134b. Therefore, when the transistor 134a is in the on state, the transistor 134b is in the on state. Further, when the transistor 134a is in the off state, the transistor 134b is in the on state.
  • the power supply voltage VDDH is applied to the flip-flop section FF via the transistor 134a, and the output of the flip-flop section FF is in the first state. For example, the output signal of the flip-flop section FF becomes a high level.
  • the transistor 134b is in the ON state, the power supply voltage VDDH is applied to the flip-flop section FF via the transistor 134b, and the output of the flip-flop section FF is in the second state. For example, the output signal of the flip-flop section FF becomes low level. That is, the flip-flop unit FF is set to the first state or the second state based on the output signal of the comparison unit 110.
  • the output signal of the flip-flop unit FF is input to the output unit 135.
  • the output unit 135 inverts the output signal of the flip-flop unit FF and outputs it as an output signal OUT. That is, the output unit 135 outputs a voltage corresponding to the state of the flip-flop unit FF.
  • the output unit 135 outputs an output signal OUT that is level-shifted with respect to the input signal IN.
  • FIGS. 8A and 8B are diagrams showing a first example and a second example of a configuration for driving a plurality of laser diodes 12 according to a fourth embodiment.
  • the configurations of the transistors 102 and 112, the current source 104, the low-pass filter 105, and the comparison unit 110 are the same as those of FIG. 3 described above, and detailed description thereof will be omitted. ..
  • LD arrays 1200a and 1200b are connected, including a 12 n.
  • the LD arrays 1200a and 1200b are, for example, VCSELs (Vertical Cavity Surface Emitting LASER).
  • Each of the laser diodes 12 1 , 12 2 , ..., 12 n is connected to each of the independently controllable current sources 103 1 , 103 2 , ..., 103 n on a one-to-one basis. That is, by controlling, for example, on / off of each of the current sources 103 1 , 103 2 , ..., 103 n by a drive circuit (not shown), one-to-one with each of the current sources 103 1 , 103 2 , ..., 103 n.
  • the light emission of each of the corresponding laser diodes 12 1 , 12 2 , ..., 12 n can be controlled independently.
  • FIG. 8A is a diagram showing a configuration example of the driver 10c according to the first example in the case of driving a plurality of laser diodes 12 according to the fourth embodiment.
  • each laser diode 12 1, 12 2, ... show examples of LD arrays 1200a to each anode and each cathode is independent of the 12 n.
  • the laser diode 12 1, 12 2, ..., each anode of the 12 n, coupling portions 100a 1, 100a 2, ..., are connected to the drain of the transistor 101 through the 100a n.
  • the respective coupling portions 100a 1, 100a 2, ..., and 100a n the voltage at the node where the drain of the transistor 101 is connected to the voltage V 1.
  • the voltage V 3 obtained by subtracting the gate-source voltage of the transistor 111 from the voltage V 1 is taken out.
  • the voltage V 3 is supplied to the comparison unit 110 via the low-pass filter 105.
  • the cathodes of the laser diodes 12 1 , 12 2 , ..., 12 n are connected to the coupling portions 100b 1 , 100b 2 , ..., 100 b n, and the current sources 103 1 , 103 2 , ..., 103. It is connected to n on a one-to-one basis.
  • FIG. 8B is a diagram showing a configuration example of the driver 10d according to the second example in the case of driving a plurality of laser diodes 12 according to the fourth embodiment.
  • FIG. 8B shows an example of an LD array 1200b in which the anodes of the laser diodes 12 1 , 12 2 , ..., 12 n are commonly connected and the cathodes are independent.
  • the anodes of the laser diodes 12 1 , 12 2 , ..., 12 n are commonly connected to the coupling portion 100a, and are connected to the drain of the transistor 101 via the coupling portion 100a.
  • the voltage V 1 is taken out from the connection point where the coupling portion 100a and the drain of the transistor 101 are connected. Then, the voltage V 3 obtained by subtracting the gate-source voltage of the transistor 111 from the voltage V 1 is taken out. The voltage V 3 is supplied to the comparison unit 110 via the low-pass filter 105.
  • each laser diode 12 1, 12 2, ..., 12 each cathode of n is, the coupling portion 100b 1, 100b 2, ..., 100b n, via a respective current source 103 1, 103 2, ..., 103 n Is connected one-to-one.
  • each current source 103 1 , 103 2 , ..., 103 n it is also possible to individually control each current source 103 1 , 103 2 , ..., 103 n and detect an overcurrent every 12 n 1 , 12 2 , ..., 12 n of the laser diode. is there.
  • a fifth embodiment relates to mounting the drivers 10c and 10d and the LD arrays 1200a and 1200b according to the fourth embodiment described above.
  • the driver 10d described with reference to FIG. 8B and the LD array 1200b having a common anode for each of the laser diodes 12 1 to 12 N will be described as an example.
  • the transistor 101 includes a plurality of transistors connected in parallel
  • the transistor 102 includes a plurality of transistors connected in parallel in the same manner.
  • FIGS 9A to 9C are diagrams schematically showing first to third mounting examples of the driver 10d and the LD array 1200b according to the fifth embodiment.
  • the LD array 1200b and other configurations included in the driver 10d are formed on another substrate.
  • FIG. 9A is a diagram schematically showing how the LD array 1200b is arranged on the LDD (laser diode driver) chip 1000 in which each element included in the driver 10d is arranged, which is applicable to the fifth embodiment. is there.
  • FIG. 9A shows the LDD chip 1000 and the LD array 1200b viewed from the surface (upper surface) on which the light emitting portion of each laser diode 12 included in the LD array 1200b is arranged.
  • the LD array 1200b is shown in a state where the side (back surface) connected to the LDD chip 1000 is seen through from the upper surface side where the light emitting portion of the laser diode 12 is arranged. There is.
  • the LDD chip 1000 is one semiconductor chip, and is connected to an external circuit by wire bonding to a plurality of pads 1001 arranged in a peripheral portion.
  • the LDD chip 1000 is supplied with a voltage V DD from the outside via the pad 1001.
  • the voltages V 1 and V 2 in FIG. 8B are supplied to the comparison unit 110 provided outside the LDD chip 1000 via the pad 1001.
  • the comparison unit 110 may be provided anywhere.
  • the comparison unit 110 may be provided inside the LDD chip 1000.
  • FIG. 9B is a diagram schematically showing the configuration of the LD array 1200b applicable to the fifth embodiment. As shown in FIG. 9B, the cathode terminals 1201 of each of the plurality of laser diodes 12 included in the LD array 1200b and the anode terminals 1202 common to the plurality of laser diodes 12 are aligned with respect to the back surface of the LD array 1200b. Be placed.
  • the cathode terminals 1201 are arranged in the central portion of the LD array 1200b by a grid-like arrangement of C rows ⁇ L columns. That is, in this example, (C ⁇ L) laser diodes 12 are arranged with respect to the LD array 1200b. Further, the anode terminals 1202 are arranged in a grid pattern of C rows ⁇ A 1 column on the left end side of the LD array 1200b and C rows ⁇ A 2 columns on the right end side.
  • each cathode terminal 1201 corresponds to, for example, the coupling portions 100b 1 , 100b 2 , ..., 100b n in FIG. 8B.
  • each anode terminal 1202 collectively corresponds to, for example, the coupling portion 100a in FIG. 8B.
  • FIG. 9C is a side view of the structure including the LDD chip 1000 and the LD array 1200b applicable to the fifth embodiment as viewed from the lower end side of FIG. 9A.
  • the LDD chip 1000 and the LD array 1200b have a structure in which the LD array 1200b is laminated on the LDD chip 1000.
  • Each cathode terminal 1201 and each anode terminal 1202 are connected to the LDD chip 1000 by, for example, micro bumps.
  • FIG. 10A is a diagram corresponding to FIG. 8B described above.
  • the driver 10e makes the size of the transistor 102 of FIG. 8B smaller than the size of the transistor 101.
  • a transistor 101 is composed of a plurality of transistors 101 1 , ..., 101 N , which are connected in parallel to one transistor 102 and can be independently turned on / off.
  • the on-resistance R ON-2 of the transistor 102 can be made higher than the on-resistance R ON-1 by the entire transistors 101 1 to 101 N.
  • the current I L + I offset current source 104 in the replica path, the size of the transistors 102 (number), the size (number) of the whole of the transistors 101 1 ⁇ 101 N, can be reduced based on the ratio of ..
  • the current current source 104 is supplied, to the current I c of the current source 104 in the example of FIG. 8B (i.e. I L + I offset), 1 /10 of the current (I L + I offset) / 10 It is said.
  • the on-resistance R ON-2 of the transistor 102 is 10 times, even 1/10 current I L + I offset, the value of the voltage V 2 obtained it can be seen that unchanged. Since the current of the replica path can be reduced in this way, the power consumption of the LDD chip 1000 can be reduced.
  • the size of the transistor 102 is increased by 10 times and the amount of current in the replica path is set to 1/10, but the power consumption can be further reduced by the same method.
  • the transistor 102 is shown as one element in FIG. 10A, the transistor 102 may also be configured by using a plurality of transistors that are connected in parallel and can be independently turned on / off. Good.
  • FIG. 10B is a diagram showing an example of arrangement of each element of the driver 10e on the LDD chip 1000, which is applicable to the fourth embodiment.
  • each element shown by a dotted line frame corresponding to each region 1300, 1301, 1302, and 1303 in FIG. 10A is arranged.
  • the region 1300 includes current sources 103 1 , 103 2 , ..., 103 n .
  • the LD array 1200b is arranged in the region 1310 corresponding to this region 1300.
  • the area 1301 and the area 1302 are arranged on the long side side of the area 1300.
  • Region 1301 includes transistors 101 1 to 101 N.
  • the region 1302 includes the transistor 102.
  • two regions 1301 including each of the transistors 101 1 to 101 N divided into two groups are arranged on both sides of the region 1302.
  • the region 1303 including the current source 104 is further arranged on the short side side of the region 1300.
  • the region 1300 including the current sources 103 1 to 103 n is arranged with respect to the region 1310 in which the LD array 1200b is arranged, but the present invention is not limited to this example.
  • the region 1310 other elements may be arranged in addition to the region 1300 including the current sources 103 1 to 103 n.
  • the region 1300 including the current sources 103 1 to 103 n may be arranged at another position of the LDD chip 1000.
  • a drive circuit (not shown) for driving each of the current sources 1031 to 103n and the like may be arranged on the LDD chip 1000.
  • FIG. 11A is a diagram showing an example in which a capacitor 140 commonly connected to the drain of each transistor 101 1 to 101 n is added to the configuration of FIG. 10A described above.
  • the capacitor 140 accumulates an electric charge corresponding to the voltage V DD of the power supply supplied via each of the transistors 101 1 to 101 n.
  • the currents are supplied to the laser diodes 12 1 to 12 n included in the LD array 1200b by the current sources 103 1 to 103 n by PWM drive, the electric charge accumulated in the capacitor 140 is used.
  • a current is supplied to each laser diode 12 1 to 12 n.
  • the voltage V DD of the power supply is supplied from the external substrate of the LDD chip 1000 to the pad 1001 on the LDD chip 1000 by wire bonding.
  • a steep voltage change occurs due to PWM drive, a large voltage drop occurs due to the inductance of the wire used for this wire bonding. Therefore, for each laser diode 12 1 ⁇ 12 n, by supplying the current I L on the basis of the charge stored in the capacitor 140, it is possible to avoid the influence of this voltage drop.
  • FIG. 11B is a diagram showing an example in which the region 1304 including the capacitor 140 is arranged on the LDD chip 1000.
  • the capacitor 140 has a relatively large size as compared with, for example, transistors 101 1 to 101 n, transistors 102, and the like. Therefore, in the example of FIG. 11B, the region 1304 including the capacitor 140 is arranged at a position corresponding to the region 1310 in which the LD array 1200b is arranged. As described above, since the region 1304 including the capacitor 140 has a relatively large size, such an arrangement facilitates the layout design of the LDD chip 1000.
  • the region 1300 including each current source 103 1 to 103 n is divided into two and arranged outside the long sides on both sides of the region 1304.
  • the entire region 1304 including the capacitor 140 is shown to be included in the region 1310 in which the LD array 1200b is arranged, but this is not limited to this example.
  • the area 1304 may be arranged so that a part thereof is included in the area 1310.
  • other elements may be arranged together with the area 1304 at a position corresponding to the area 1310.
  • FIG. 11C shows an example in which the region 1304 including the capacitor 140 shown in FIG. 11B is arranged on the LDD chip 1000, and the region 1301 including each transistor 101 1 to 101 n is divided into a plurality of regions 1301 and the transistor 102 is divided into a plurality of regions 1301. It is a figure which shows the example which included the region is also divided into a plurality of regions 1302. In this case, it is assumed that the transistor 102 is also configured by using a plurality of transistors that are connected in parallel and can be independently turned on / off, like the transistors 101 1 to 101 n.
  • each transistor 101 1 to 101 n or the size of the transistor 102 composed of a plurality of transistors is relatively large, variations due to a manufacturing process or the like occur for each transistor. there is a possibility.
  • the region 1301 including each transistor 101 1 to 101 n and the region 1302 including a plurality of transistors constituting the transistor 102 are divided into finer units, and each divided region 1301 is further divided. And each region 1302 are aligned and arranged alternately. As a result, it is possible to suppress variations in the transistors 101 1 to 101 n and the plurality of transistors constituting the transistor 102.
  • FIG. 10A and FIG. 11A described above the configuration corresponding to FIG. 6 described above is applied, and the voltages V 1 and V 2 are taken out directly in the main line and the replica path, respectively. Not limited to the example. That is, the configurations described with reference to FIGS. 3 to 5 can be applied to the configurations of FIGS. 10A and 11A.
  • the LD array 1200a instead of the LD array 1200b, the LD array 1200a to which the laser diodes 12 1 to 12 n described in FIG. 8A are independently connected may be used.
  • the sixth embodiment is an example in which the light source device 1 according to each of the above-described embodiments and modifications of each embodiment is applied to a distance measuring device that performs distance measuring using a laser beam.
  • FIG. 12 is a block diagram showing a configuration of an example of the distance measuring device according to the sixth embodiment.
  • the drivers 10a to 10d, the drivers 10d', and the drivers 10e (a) to 10e (c) according to the above-described embodiments and modifications of the embodiments will be described as represented by the driver 10. ..
  • the laser diode 12, the laser diode 12 1 to 12 n , the laser diode 12 1 to 12 N, and the like will be described by being represented by the laser diode 12. More preferably, it is conceivable to apply the configuration described with reference to FIG. 11B or FIG. 11C.
  • the distance measuring device 70 as an electronic device according to the sixth embodiment includes a driver 10, a laser diode 12, a controller 11, a distance measuring unit 51, and a light receiving unit 302.
  • the driver 10 generates a drive signal that drives the laser diode 12 to emit light in a pulsed manner in response to the control signal supplied from the controller 11, and causes the laser diode 12 to emit light based on the generated drive signal.
  • the driver 10 passes a signal indicating the timing at which the laser diode 12 is made to emit light to the ranging unit 51.
  • the controller 11 determines whether or not an overcurrent is supplied to the laser diode 12 based on the detection signal 42 supplied from the driver 10. When the controller 11 determines that an overcurrent is being supplied to the laser diode 12, the controller 11 outputs a control signal 43 for stopping the light emission of the laser diode 12 to the driver 10 and supplies the overcurrent. The indicated error signal is output. The controller 11 can output an error signal to, for example, the outside of the distance measuring device 70.
  • the light receiving unit 302 includes a light receiving element that outputs a light receiving signal by photoelectric conversion based on the received laser light.
  • a single photon avalanche diode can be applied as the light receiving element.
  • the single photon avalanche diode is also called SPAD (Single Photon Avalanche Diode), and has a characteristic that electrons generated in response to the incident of one photon cause avalanche multiplication and a large current flows. By utilizing this characteristic of SPAD, the incident of one photon can be detected with high sensitivity.
  • the light receiving element 302 to which the light receiving unit 302 can be applied is not limited to SPAD, but an avalanche photodiode (APD) or an ordinary photodiode can also be applied.
  • APD avalanche photodiode
  • the distance measuring unit 51 calculates the distance D between the object 61 and the object 61 based on the time t 0 when the laser beam is emitted from the laser diode 12 and the time t 1 when the light is received by the light receiving unit 302.
  • the laser beam 60 emitted from the laser diode 12 at the timing of time t 0 is reflected by the object 61, for example, and is received by the light receiving unit 302 at the timing of time t 1 as the reflected light 62. ..
  • the ranging unit 51 determines the distance D to the object 61 based on the difference between the time t 1 when the reflected light 62 is received by the light receiving unit 302 and the time t 0 when the laser light is emitted by the laser diode 12.
  • the distance D is calculated by the following equation (3) the constant c as light velocity (2.9979 ⁇ 10 8 [m / sec]).
  • D (c / 2) ⁇ (t 1 ⁇ t 0 )... (3)
  • the ranging unit 51 repeats the above-mentioned processing a plurality of times.
  • the distance D may be calculated based on each light receiving timing in which the light receiving unit 302 includes a plurality of light receiving elements and the reflected light 62 is received by each light receiving element.
  • the ranging unit 51 classifies the time t m (called the light receiving time t m ) from the light emitting timing time t 0 to the light receiving timing when the light is received by the light receiving unit 302 based on the class (bins). Generate a histogram.
  • the light received by the light receiving unit 302 during the light receiving time t m is not limited to the reflected light 62 in which the light emitted by the laser diode 12 is reflected by the object to be measured.
  • the ambient light around the light receiving unit 302 is also received by the light receiving unit 302.
  • FIG. 13 is a diagram showing an example histogram based on the time when the light receiving unit 302 receives light, which is applicable to the sixth embodiment.
  • the horizontal axis indicates the bin and the vertical axis indicates the frequency for each bin.
  • the bins are obtained by classifying the light receiving time t m for each predetermined unit time d. Specifically, bin # 0 is 0 ⁇ t m ⁇ d, bin # 1 is d ⁇ t m ⁇ 2 ⁇ d, bin # 2 is 2 ⁇ d ⁇ t m ⁇ 3 ⁇ d, ..., Bin # (N). -2) is (N-2) ⁇ d ⁇ t m ⁇ (N-1) ⁇ d.
  • the ranging unit 51 counts the number of times the light receiving time t m is acquired based on the bins to obtain the frequency 310 for each bin, and generates a histogram.
  • the light receiving unit 302 also receives light other than the reflected light reflected from the light emitted from the laser diode 12.
  • the ambient light there is the above-mentioned ambient light.
  • the portion indicated by the range 311 in the histogram includes the ambient light component due to the ambient light.
  • the ambient light is light that is randomly incident on the light receiving unit 302 and becomes noise with respect to the reflected light of interest.
  • the target reflected light is light received according to a specific distance, and appears as an active light component 312 in the histogram.
  • the bin corresponding to the frequency of the peak in the active light component 312 becomes the bin corresponding to the distance D of the object to be measured 303.
  • the distance measuring unit 51 acquires the representative time of the bottle (for example, the time in the center of the bottle) as the time t 1 described above, and calculates the distance D to the object to be measured 303 according to the above formula (3). be able to. In this way, by using a plurality of light receiving results, it is possible to perform appropriate distance measurement for random noise.
  • the driver 10 As described above, by applying the driver 10 according to the present disclosure to the distance measuring device 70 that directly measures the distance by the ToF (Time-of-Flight) method, whether or not an overcurrent is supplied to the laser diode 12. Can be detected with higher accuracy.
  • By controlling the light emission of the laser diode 12 based on this detection result it is possible to suppress the influence on the eyes when, for example, a laser diode stronger than expected due to an overcurrent is emitted from the laser diode 12. Further, it is possible to prevent the element itself of the laser diode 12 from being destroyed due to an overcurrent, and it is possible to improve the reliability of the distance measuring device 70.
  • the light source device 1 includes a light emitting element, a drive unit 20, a reference level generation unit, a comparison unit 110, and a level shift unit 130.
  • the light emitting element emits light with a predetermined amount of light when a predetermined drive current is supplied.
  • the drive unit 20 supplies a drive current to the light emitting element.
  • the reference level generator generates a reference level as a reference for detecting an overcurrent with respect to the drive current.
  • the comparison unit 110 compares the drive current with the reference level and outputs the comparison result as an output signal.
  • the level shift unit 130 shifts the level of the output signal of the comparison unit 110 and outputs the signal. The overcurrent of the drive current is detected based on the output of the level shift unit 130.
  • the light source device 1 performs a level shift on the comparison result by the comparison unit 110, so that it is possible to eliminate variations due to the provision of a plurality of level shift units, and when the level shift is performed before the comparison by the comparison unit 110. Compared with this, the accuracy of overcurrent detection can be improved.
  • the drive unit 20 of the light source device 1 includes a first resistor.
  • the first resistor is connected to a predetermined potential and is connected in series with the light emitting element.
  • the reference level generation unit is a replica unit 20R that imitates the drive unit 20.
  • the replica unit 20R includes a second resistor.
  • the second resistor is connected to a predetermined potential.
  • the light source device 1 includes a first current source.
  • the first current source supplies a current connected in series with the second resistor, which is the drive current plus the current of the overcurrent.
  • the comparison unit 110 compares the drive current with the reference level generated by the replica unit 20R.
  • the light source device 1 further has an averaging circuit that outputs an average value of the drive current within a predetermined time, and the comparison unit 110 compares the average value output from the averaging circuit with the reference level.
  • the light source device 1 can detect the overcurrent based on the average value of the drive currents flowing through the light emitting element.
  • the level shift unit 130a of the light source device 1 may have a voltage dividing resistor by the resistors 131 and 132 and a transistor 133 that gives a predetermined potential to the voltage dividing resistor.
  • the voltage dividing resistor divides the voltage between the predetermined potential and the reference voltage.
  • the transistor 133 is turned on or off based on the output signal of the comparison unit 110.
  • the level shift unit 130 outputs a voltage corresponding to the voltage divided by the voltage dividing resistor as the voltage after the level shift.
  • the light source device 1 can perform level shift by the voltage dividing resistor.
  • the level shift unit 130b of the light source device 1 may have a flip-flop unit FF and an output unit 135.
  • the flip-flop unit FF operates by the first power supply voltage V DDH and V SSH , and is set to either the first state or the second state based on the output signal of the comparison unit 110.
  • the output unit 135 operates by a second power supply voltage V DDL and V SSL different from the first power supply voltage V DDH and V SSH, and outputs a voltage corresponding to the state of the flip flop unit FF.
  • the level shift unit 130 outputs the output of the output unit 135 as the voltage after the level shift.
  • the light emitting element of the light source device 1 may be configured as an element array 1200a in which a plurality of elements that emit light independently are arranged.
  • the first current source supplies a predetermined drive current according to the number of light emitting elements among the plurality of elements included in the element array 1200a.
  • the light source device 1 can detect an overcurrent for a plurality of elements of the element array that emit light independently of each other.
  • the light source device 1 may further include a plurality of second current sources that independently supply a plurality of drive currents for driving the plurality of elements to each of the plurality of elements.
  • a first semiconductor chip in which a first resistor, a second resistor, a first current source, and a plurality of second current sources are arranged, and a second semiconductor chip including an element array.
  • the second semiconductor chip may be laminated on the first semiconductor chip.
  • the light source device 1 may further include a plurality of second current sources that independently supply a plurality of drive currents for driving the plurality of elements to each of the plurality of elements.
  • a second semiconductor including a first semiconductor chip in which a first resistor, a second resistor, a first current source, and the plurality of second current sources are arranged, and an element array.
  • the second semiconductor chip, including the chip, may be laminated on the first semiconductor chip.
  • Each of the plurality of elements included in the element array arranged on the second semiconductor chip and each of the plurality of second current sources arranged on the first semiconductor chip may be connected one-to-one.
  • the light source device 1 can independently control the light emission of each element corresponding to the current source on a one-to-one basis by controlling the on / off of each current source by the drive circuit.
  • a plurality of second current sources of the light source device 1 may be arranged in a predetermined region on the first semiconductor chip, and the element array may be stacked and arranged in a region corresponding to the predetermined region on the first semiconductor chip. ..
  • the light source device 1 can detect an overcurrent when the element array is laminated on the first semiconductor chip.
  • the first resistor of the light source device 1 may include a plurality of resistors connected in parallel, and the plurality of resistors may be divided into a plurality of blocks and arranged on the first semiconductor chip.
  • the light source device 1 can arrange the plurality of resistors on the semiconductor chip even when a plurality of resistors for causing the light emitting element to emit light are connected in parallel.
  • the light source device 1 can arrange the plurality of resistors on the semiconductor chip even when a plurality of resistors for causing the light emitting element to emit light are connected in parallel.
  • the mounting area does not increase even when a capacitor with a large capacity is required.
  • the first resistor and the second resistor of the light source device 1 may be the resistance between the source and the drain of the MOS transistor in the ON state, respectively.
  • the light source device 1 can be formed on the semiconductor chip.
  • the averaging circuit of the light source device 1 may include a low-pass filter 105 for removing the high-frequency component of the drive current, and output the drive current from which the high-pass component has been removed by the low-pass filter 105 as an average value. ..
  • the light source device 1 can detect the overcurrent based on the average value of the drive currents flowing through the light emitting element.
  • the present technology can also have the following configurations.
  • a light emitting element that emits light with a predetermined amount of light when a predetermined drive current is supplied, and A drive unit that supplies the drive current to the light emitting element, A reference level generator that generates a reference level that serves as a reference for detecting an overcurrent with respect to the drive current, and a reference level generator.
  • a comparison unit that compares the drive current with the reference level and outputs the comparison result as an output signal.
  • a level shift unit that shifts the level of the output signal of the comparison unit and outputs it, Have,
  • a light source device that detects an overcurrent of the drive current based on the output of the level shift unit.
  • the drive unit It comprises a first resistor connected to a predetermined potential and connected in series with the light emitting element.
  • the reference level generator It is a replica unit that includes a second resistor connected to the predetermined potential and imitates the drive unit. Further, It includes a first current source connected in series with the second resistor to supply a current obtained by adding a current corresponding to an overcurrent to the drive current.
  • the light source device according to (1) above, wherein the comparison unit compares the drive current with a reference level generated by the replica unit.
  • the light source device according to (1) or (2), wherein the comparison unit compares the average value output from the averaging circuit with the reference level.
  • the level shift unit is A voltage dividing resistor that divides the voltage between the predetermined potential and the reference voltage, A transistor that turns on or off based on the output signal of the comparison unit and gives the predetermined potential to the voltage dividing resistor when it is turned on.
  • the light source device according to any one of (1) to (3) above, which outputs a voltage corresponding to the voltage divided by the voltage dividing resistor as a voltage after level shifting.
  • the level shift unit is A flip-flop unit that operates by the first power supply voltage and is set to either the first state or the second state based on the output signal of the comparison unit. It operates with a second power supply voltage different from the first power supply voltage, and has an output unit that outputs a voltage corresponding to the state of the flip-flop unit.
  • the light source device according to any one of (1) to (3) above, which outputs the output of the output unit as a voltage after level shifting.
  • the light emitting element is It is configured as an element array in which a plurality of elements that emit light independently are arranged.
  • the first current source is The light source device according to (2), wherein the predetermined drive current is supplied according to the number of light emitting elements among the plurality of elements included in the element array.
  • a plurality of second current sources for independently supplying a plurality of drive currents for driving each of the plurality of elements to each of the plurality of elements are further provided.
  • a first semiconductor chip in which the first resistor, the second resistor, the first current source, and the plurality of second current sources are arranged.
  • a second semiconductor chip laminated on the first semiconductor chip which comprises the element array, and Including Each of the plurality of elements included in the element array arranged on the second semiconductor chip and each of the plurality of second current sources arranged on the first semiconductor chip are connected one-to-one.
  • the element array is The light source device according to (7) above, which is laminated and arranged in a region corresponding to the predetermined region on the first semiconductor chip.
  • the first resistor is The light source device according to (7), wherein the light source device includes a plurality of resistors connected in parallel, and the plurality of resistors are divided into a plurality of blocks and arranged on the first semiconductor chip. (10) The light source device according to (9) above, wherein the first resistor is divided into two blocks arranged in an aligned manner, and the second resistor is arranged between the two blocks. (11) The second resistor is A plurality of resistors connected in parallel are included, and the plurality of resistors are divided into a plurality of blocks and arranged on the first semiconductor chip.
  • Each of the plurality of blocks in which the plurality of resistors included in the first resistor is divided and each of the plurality of blocks in which the plurality of resistors contained in the second resistor are divided are The light source device according to (10) above, which is alternately arranged and arranged on the first semiconductor chip. (12) Further comprising a capacitor arranged in a predetermined region on the first semiconductor chip and connected to the first resistor.
  • the element array is The light source device according to (7), which is laminated and arranged in the predetermined region on the first semiconductor chip.
  • the first resistor and the second resistor are The light source device according to (7) above, each of which is a resistance between the source and drain of a MOS (Metal Oxide Semiconductor) type transistor in the on state.
  • MOS Metal Oxide Semiconductor
  • the averaging circuit The light source device according to (3), wherein the light source device includes a low-pass filter for removing a high-frequency component of the drive current, and outputs a drive current from which the high-frequency component has been removed by the low-pass filter as the average value.

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Abstract

The purpose of the present invention is to appropriately protect a light-emitting element in the case where the light-emitting element and a driver circuit therefor are realized in a semiconductor chip in a light source device. A light source device according to the present invention has: a light-emitting element for emitting a prescribed amount of light as a result of being supplied with a prescribed drive current; a drive unit for supplying the drive current to the light-emitting element; a reference-level generation unit for generating a reference level serving as a reference for detecting an overcurrent pertaining to the drive current; a comparison unit for comparing the drive current with the reference level and outputting the result of the comparison as an output signal; and a level shift unit for shifting and outputting the level of the output signal of the comparison unit. The light source device detects an overcurrent of the drive current on the basis of the output of the level shift unit.

Description

光源装置Light source device
 本開示は、光源装置に関する。 This disclosure relates to a light source device.
 レーザダイオードといった、電流に応じて発光する発光素子が知られている。このような発光素子に対し、電源系の不具合などにより例えば設計値を大きく上回る電流(過電流)が流れると、予期せぬ大光量で発光することがある。また、発光素子自体の破壊などを引き起こすおそれがある。そのため、発光素子に流す電流をモニタし、発光素子を保護する回路が提案されている。 A light emitting element such as a laser diode that emits light according to an electric current is known. If a current (overcurrent) that greatly exceeds the design value flows through such a light emitting element due to a defect in the power supply system or the like, light may be emitted with an unexpectedly large amount of light. In addition, there is a risk of causing destruction of the light emitting element itself. Therefore, a circuit that monitors the current flowing through the light emitting element and protects the light emitting element has been proposed.
 例えば、特許文献1では、レーザダイオードのアノード側の電圧と閾値電圧とコンパレータで比較し、比較結果に基づいてレーザダイオードの駆動電流を制御している。また、特許文献2では、コンパレータと電流リミッタとを用いて、レーザダイオードの駆動電流を監視している。 For example, in Patent Document 1, the voltage on the anode side of the laser diode, the threshold voltage, and the comparator are compared, and the drive current of the laser diode is controlled based on the comparison result. Further, in Patent Document 2, a comparator and a current limiter are used to monitor the drive current of the laser diode.
特開昭58-107692号公報Japanese Unexamined Patent Publication No. 58-107692 特開2004-355697号公報Japanese Unexamined Patent Publication No. 2004-355697
 発光素子とそのドライバ回路とを半導体チップにおいて実現する場合、電源電圧レベルを高くすることがある。その場合、発光素子を保護することに関して改善の余地がある。 When the light emitting element and its driver circuit are realized in a semiconductor chip, the power supply voltage level may be increased. In that case, there is room for improvement in protecting the light emitting element.
 そこで、本開示では、発光素子とそのドライバ回路とを半導体チップにおいて実現する場合に、発光素子を適切に保護できる光源装置を提案する。 Therefore, the present disclosure proposes a light source device capable of appropriately protecting the light emitting element when the light emitting element and its driver circuit are realized in a semiconductor chip.
 本開示に係る光源装置は、所定の駆動電流が供給されることで所定の光量で発光する発光素子と、前記駆動電流を前記発光素子に供給する駆動部と、前記駆動電流についての過電流を検出するための基準となる基準レベルを生成する基準レベル生成部と、前記駆動電流を前記基準レベルと比較し、その比較結果を出力信号として出力する比較部と、前記比較部の出力信号のレベルをシフトして出力するレベルシフト部と、を有し、前記レベルシフト部の出力に基づいて、前記駆動電流の過電流を検出する。 The light source device according to the present disclosure has a light emitting element that emits light with a predetermined amount of light when a predetermined drive current is supplied, a drive unit that supplies the drive current to the light emitting element, and an overcurrent for the drive current. A reference level generator that generates a reference level that serves as a reference for detection, a comparison unit that compares the drive current with the reference level and outputs the comparison result as an output signal, and an output signal level of the comparison unit. It has a level shift unit that shifts and outputs the current, and detects an overcurrent of the drive current based on the output of the level shift unit.
本開示の各実施形態に適用可能な光源装置の一例の構成を示すブロック図である。It is a block diagram which shows the structure of an example of the light source apparatus applicable to each embodiment of this disclosure. 比較例の光源装置のドライバの構成を示す図である。It is a figure which shows the structure of the driver of the light source device of the comparative example. 本開示の第1の実施形態による光源装置のドライバを示す図である。It is a figure which shows the driver of the light source apparatus by 1st Embodiment of this disclosure. 第1の実施形態の第1の変形例に係るドライバの一例の構成を示す図である。It is a figure which shows the structure of the example of the driver which concerns on the 1st modification of 1st Embodiment. 第1の実施形態の第2の変形例に係るドライバの一例の構成を示す図である。It is a figure which shows the structure of the example of the driver which concerns on the 2nd modification of 1st Embodiment. レベルシフト部の例を示す図である。It is a figure which shows the example of the level shift part. レベルシフト部の例を示す図である。It is a figure which shows the example of the level shift part. 第4の実施形態に係る、複数のレーザダイオードを駆動する場合の構成の第1の例を示す図である。It is a figure which shows the 1st example of the structure in the case of driving a plurality of laser diodes which concerns on 4th Embodiment. 第4の実施形態に係る、複数のレーザダイオードを駆動する場合の構成の第2の例を示す図である。It is a figure which shows the 2nd example of the structure in the case of driving a plurality of laser diodes which concerns on 4th Embodiment. 第5の実施形態に係る、複数のレーザダイオードを駆動する場合の構成の第1の実装例を示す図である。It is a figure which shows the 1st implementation example of the structure in the case of driving a plurality of laser diodes which concerns on 5th Embodiment. 第5の実施形態に係る、複数のレーザダイオードを駆動する場合の構成の第2の実装例を示す図である。It is a figure which shows the 2nd implementation example of the structure in the case of driving a plurality of laser diodes which concerns on 5th Embodiment. 第5の実施形態に係る、複数のレーザダイオードを駆動する場合の構成の第3の実装例を示す図である。It is a figure which shows the 3rd implementation example of the structure in the case of driving a plurality of laser diodes which concerns on 5th Embodiment. 第5の実施形態に係る、ドライバに含まれる各要素のLDDチップ上への配置の例について説明するための図である。It is a figure for demonstrating the example of the arrangement on the LDD chip of each element included in a driver which concerns on 5th Embodiment. 第5の実施形態に係る、ドライバに含まれる各要素のLDDチップ上への配置の例について説明するための図である。It is a figure for demonstrating the example of the arrangement on the LDD chip of each element included in a driver which concerns on 5th Embodiment. 第5の実施形態に係る、LDDチップに対してキャパシタをさらに配置する場合の例について説明するための図である。It is a figure for demonstrating the example of the case where the capacitor is further arranged with respect to the LDD chip which concerns on 5th Embodiment. 第5の実施形態に係る、LDDチップに対してキャパシタをさらに配置する場合の例について説明するための図である。It is a figure for demonstrating the example of the case where the capacitor is further arranged with respect to the LDD chip which concerns on 5th Embodiment. 第5の実施形態に係る、LDDチップに対してキャパシタをさらに配置する場合の例について説明するための図である。It is a figure for demonstrating the example of the case where the capacitor is further arranged with respect to the LDD chip which concerns on 5th Embodiment. 第6の実施形態に係る測距装置の一例の構成を示すブロック図である。It is a block diagram which shows the structure of an example of the distance measuring apparatus which concerns on 6th Embodiment. 第6の実施形態に適用可能な、受光部が受光した時刻に基づく一例のヒストグラムを示す図である。It is a figure which shows the histogram of an example based on the time when the light receiving part received light, which is applicable to 6th Embodiment.
 以下に、本開示の実施形態について図面に基づいて詳細に説明する。なお、以下の各実施形態において、同一の部位には同一の符号を付することにより重複する説明を省略する。 Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In each of the following embodiments, the same parts are designated by the same reference numerals, so that duplicate description will be omitted.
 また、以下に示す項目順序に従って本開示を説明する。
  0.各実施形態に共通の構成
   0.1 比較例
  1.第1の実施形態
   1.1 構成
   1.2 動作
   1.3 第1の実施形態の第1の変形例
   1.4 第1の実施形態の第2の変形例
   1.5 効果
  2.第2の実施形態
   2.1 構成
   2,2 動作
   2.3 効果
  3.第3の実施形態
   3.1 構成
   3.2 動作
   3.3 効果
  4.第4の実施形態
  5.第5の実施形態
  6.第6の実施形態
  7.まとめ
In addition, the present disclosure will be described according to the order of items shown below.
0. Configuration common to each embodiment 0.1 Comparative example 1. First Embodiment 1.1 Configuration 1.2 Operation 1.3 First Modification Example of First Embodiment 1.4 Second Modification Example of First Embodiment 1.5 Effect 2. Second Embodiment 2.1 Configuration 2, 2 Operation 2.3 Effect 3. Third Embodiment 3.1 Configuration 3.2 Operation 3.3 Effect 4. Fourth embodiment 5. Fifth embodiment 6. Sixth Embodiment 7. Summary
(0.各実施形態に共通の構成)
 本開示は、レーザダイオードなどの、電流に応じて発光する発光素子の制御に関するものである。図1は、本開示の各実施形態に適用可能な光源装置の一例の構成を示すブロック図である。
(0. Configuration common to each embodiment)
The present disclosure relates to the control of a light emitting element that emits light in response to an electric current, such as a laser diode. FIG. 1 is a block diagram showing a configuration of an example of a light source device applicable to each embodiment of the present disclosure.
 なお、以下では、発光素子がレーザダイオード(LD)であるものとして説明を行う。レーザダイオードは、光の直進性や集光性に優れ、応答速度が速く、また、低消費電力であるなどの特性を活かして、測距、光伝送、電子写真方式のプリンタなど、様々な分野に用いられている。なお、本開示に適用可能な発光素子は、レーザダイオードに限られない。例えば、発光素子としてLED(Light Emitting Diode)を適用することもできる。 In the following, it will be described assuming that the light emitting element is a laser diode (LD). Laser diodes are excellent in straightness and light collection, have a high response speed, and take advantage of their characteristics such as low power consumption in various fields such as distance measurement, optical transmission, and electrophotographic printers. It is used in. The light emitting device applicable to the present disclosure is not limited to the laser diode. For example, an LED (Light Emitting Diode) can be applied as a light emitting element.
 図1において、光源装置1は、ドライバ10と、レーザダイオード(LD)12と、を含む。コントローラ11を光源装置1に含めてもよい。ドライバ10は、コントローラ11の制御に従い、レーザダイオード12を駆動し、レーザダイオード12を発光させる。コントローラ11は、例えばCPU(Central Processing Unit)およびメモリを含み、CPUによりメモリに予め記憶されたプログラムに従い生成した制御信号40をドライバ10に供給し、ドライバ10を制御する。また、コントローラ11は、ドライバ10から出力される検出信号42に基づきレーザダイオード12に過電流が供給されているか否かを判定する。コントローラ11は、レーザダイオード12に過電流が供給されていると判定した場合、その旨を示す制御信号43を生成し、ドライバ10に供給する。 In FIG. 1, the light source device 1 includes a driver 10 and a laser diode (LD) 12. The controller 11 may be included in the light source device 1. The driver 10 drives the laser diode 12 under the control of the controller 11 to cause the laser diode 12 to emit light. The controller 11 includes, for example, a CPU (Central Processing Unit) and a memory, and supplies a control signal 40 generated by the CPU according to a program stored in the memory in advance to the driver 10 to control the driver 10. Further, the controller 11 determines whether or not an overcurrent is supplied to the laser diode 12 based on the detection signal 42 output from the driver 10. When the controller 11 determines that an overcurrent is being supplied to the laser diode 12, it generates a control signal 43 indicating that fact and supplies the control signal 43 to the driver 10.
 なお、過電流は、レーザダイオード12を所定の光量で発光させるための電流よりも大電流であって、その差が閾値以上である電流であるものとする。 It is assumed that the overcurrent is a current larger than the current for causing the laser diode 12 to emit light with a predetermined amount of light, and the difference is equal to or more than the threshold value.
 ドライバ10は、駆動部20および検出部21を含む。駆動部20は、コントローラ11から供給される制御信号40に従いレーザダイオード12を発光させるための駆動電流を生成し、生成した駆動電流をレーザダイオード12に供給する。また、駆動部20は、コントローラ11から供給される制御信号43に応じて、レーザダイオード12の発光のオン/オフを制御することができる。さらに、駆動部20は、レーザダイオード12を駆動する駆動電流の電流値を示す信号41を検出部21に供給する。検出部21は、駆動部20から供給された信号41に基づく検出信号42を、コントローラ11に供給する。 The driver 10 includes a drive unit 20 and a detection unit 21. The drive unit 20 generates a drive current for causing the laser diode 12 to emit light according to the control signal 40 supplied from the controller 11, and supplies the generated drive current to the laser diode 12. Further, the drive unit 20 can control the on / off of the light emission of the laser diode 12 according to the control signal 43 supplied from the controller 11. Further, the drive unit 20 supplies the detection unit 21 with a signal 41 indicating the current value of the drive current that drives the laser diode 12. The detection unit 21 supplies the detection signal 42 based on the signal 41 supplied from the drive unit 20 to the controller 11.
 なお、レーザダイオード12に過電流が供給されているか否かの判定を、検出部21において行うことも可能である。例えば、検出部21は、駆動部20から供給される信号41に基づきレーザダイオード12に過電流が供給されているか否かを判定する。検出部21は、その結果、レーザダイオード12に過電流が供給されていると判定した場合、その旨を示す信号44を、駆動部20に供給する。駆動部20は、この信号44に応じて、レーザダイオード12の発光を例えば停止させる。このように、レーザダイオード12に過電流が供給されている旨を示す信号44を、検出部21から直接的に駆動部20に供給することで、応答速度をより高速にすることができる。 It is also possible for the detection unit 21 to determine whether or not an overcurrent is supplied to the laser diode 12. For example, the detection unit 21 determines whether or not an overcurrent is supplied to the laser diode 12 based on the signal 41 supplied from the drive unit 20. When the detection unit 21 determines that an overcurrent is being supplied to the laser diode 12 as a result, the detection unit 21 supplies a signal 44 indicating that fact to the drive unit 20. The drive unit 20 stops the light emission of the laser diode 12, for example, in response to the signal 44. In this way, the response speed can be further increased by directly supplying the signal 44 indicating that the overcurrent is supplied to the laser diode 12 from the detection unit 21 to the drive unit 20.
 [0.1 比較例]
 本開示の実施形態の理解を容易にするため、比較例を先に説明する。図2は、比較例の光源装置のドライバ10の構成を示す図である。図2において、比較例のドライバ10は、駆動部20と、レプリカ部20Rと、レベルシフト部13a、13bと、発光素子であるレーザダイオード12と、電流源103、104、113、114と、低域通過フィルタ105と、比較部110とを有する。
[0.1 Comparative Example]
In order to facilitate understanding of the embodiments of the present disclosure, comparative examples will be described first. FIG. 2 is a diagram showing a configuration of a driver 10 of a light source device of a comparative example. In FIG. 2, the driver 10 of the comparative example has a drive unit 20, a replica unit 20R, a level shift unit 13a, 13b, a laser diode 12 as a light emitting element, and current sources 103, 104, 113, 114, which are low. It has a region passing filter 105 and a comparison unit 110.
 レーザダイオード12は、所定の駆動電流が供給されることで所定の光量で発光する。結合部100aおよび100bは、レーザダイオード12とドライバ10とが異なる構成とされている場合に、これらを接続するために設けられている。例えば、ドライバ10は、1個の半導体チップ上に構成され、レーザダイオード12は、その半導体チップとは別のユニット120として構成される。レーザダイオード12とドライバ10とは、結合部100aおよび100bにより電気的に接続される。 The laser diode 12 emits light with a predetermined amount of light when a predetermined drive current is supplied. The coupling portions 100a and 100b are provided to connect the laser diode 12 and the driver 10 when they have different configurations. For example, the driver 10 is configured on one semiconductor chip, and the laser diode 12 is configured as a unit 120 separate from the semiconductor chip. The laser diode 12 and the driver 10 are electrically connected by the coupling portions 100a and 100b.
 駆動部20は、駆動電流をレーザダイオード12に供給する。駆動部20は、電源電圧VDDによる駆動電流をレーザダイオード12に供給するためのトランジスタ101と、ソースフォロワによって駆動電流に対応する電圧を出力するためのトランジスタ111とを有する。トランジスタ101および111は、PチャネルのMOS(Metal Oxide Semiconductor)トランジスタである。 The drive unit 20 supplies the drive current to the laser diode 12. The drive unit 20 includes a transistor 101 for supplying a drive current due to the power supply voltage VDD to the laser diode 12, and a transistor 111 for outputting a voltage corresponding to the drive current by the source follower. The transistors 101 and 111 are P-channel MOS (Metal Oxide Semiconductor) transistors.
 レプリカ部20Rは、本実施形態においては、駆動部20を模した構成を有する。レプリカ部20Rは、トランジスタ101に対応するトランジスタ102と、トランジスタ111に対応するトランジスタ112とを有する。トランジスタ102および112は、PチャネルのMOSトランジスタである。トランジスタ101および102は、それぞれのオン抵抗RON-1およびRON-2が等しくなるように構成される。例えば、トランジスタ101および102は、同じサイズで形成される。さらに、トランジスタ101および102を熱的に近い位置に配置すると、より好ましい。レプリカ部20Rは、駆動電流についての過電流を検出するための基準となる基準レベルを生成する基準レベル生成部として機能する。なお、レプリカ部20Rの代わりに、基準レベルを生成する電圧源を用いてもよい。 In the present embodiment, the replica unit 20R has a configuration that imitates the drive unit 20. The replica unit 20R has a transistor 102 corresponding to the transistor 101 and a transistor 112 corresponding to the transistor 111. Transistors 102 and 112 are P-channel MOS transistors. The transistors 101 and 102 are configured so that their on-resistors R ON-1 and R ON-2 are equal. For example, the transistors 101 and 102 are formed in the same size. Further, it is more preferable to arrange the transistors 101 and 102 at positions thermally close to each other. The replica unit 20R functions as a reference level generation unit that generates a reference level that serves as a reference for detecting an overcurrent with respect to the drive current. A voltage source that generates a reference level may be used instead of the replica unit 20R.
 トランジスタ101のドレインは、結合部100aを介してレーザダイオード12のアノードに接続される。レーザダイオード12のカソードは、結合部100bを介して電流源103に接続される。一方、トランジスタ102は、ドレインが電流源104に接続される。トランジスタ101のドレインとレーザダイオード12のアノードとが接続される接続点において電圧V1が取り出され、比較部110に供給される。また、トランジスタ102のドレインと電流源104とが接続される接続点において電圧V2が取り出され、比較部110に供給される。 The drain of the transistor 101 is connected to the anode of the laser diode 12 via the coupling portion 100a. The cathode of the laser diode 12 is connected to the current source 103 via the coupling portion 100b. On the other hand, the drain of the transistor 102 is connected to the current source 104. The voltage V 1 is taken out at the connection point where the drain of the transistor 101 and the anode of the laser diode 12 are connected, and is supplied to the comparison unit 110. Further, the voltage V 2 is taken out at the connection point where the drain of the transistor 102 and the current source 104 are connected, and is supplied to the comparison unit 110.
 トランジスタ101および102の各ソースは、共通の電源電圧VDDに接続される。トランジスタ101のドレインは、結合部100aを介してレーザダイオード12のアノードに接続される。トランジスタ102のドレインは、電流源104に接続される。トランジスタ101のドレインとレーザダイオード12のアノードとが接続される接続点の電圧V1が取り出される。そして、電圧V1から、トランジスタ111のゲート・ソース間電圧を差し引いた電圧Vが取り出される。電圧Vは、レベルシフト部13aおよび低域通過フィルタ105を介して比較部110に供給される。また、トランジスタ102のドレインと電流源104とが接続される接続点において電圧V2が取り出される。そして、電圧V2から、トランジスタ112のゲート・ソース間電圧を差し引いた電圧Vが取り出される。電圧Vは、レベルシフト部13bを介して比較部110に供給される。レーザダイオード12のカソードは、結合部100bを介して電流源103に接続される。 Each source of transistors 101 and 102 is connected to a common power supply voltage VDD. The drain of the transistor 101 is connected to the anode of the laser diode 12 via the coupling portion 100a. The drain of the transistor 102 is connected to the current source 104. The voltage V 1 at the connection point where the drain of the transistor 101 and the anode of the laser diode 12 are connected is taken out. Then, the voltage V 3 obtained by subtracting the gate-source voltage of the transistor 111 from the voltage V 1 is taken out. The voltage V 3 is supplied to the comparison unit 110 via the level shift unit 13a and the low-pass filter 105. Further, the voltage V 2 is taken out at the connection point where the drain of the transistor 102 and the current source 104 are connected. Then, the voltage V 4 obtained by subtracting the gate-source voltage of the transistor 112 from the voltage V 2 is taken out. The voltage V 4 is supplied to the comparison unit 110 via the level shift unit 13b. The cathode of the laser diode 12 is connected to the current source 103 via the coupling portion 100b.
 ここで、トランジスタ101のオン抵抗RON-1と、トランジスタ102のオン抵抗RON-2は、抵抗値が略等しいものとする。以下、オン抵抗RON-1およびRON-2を、オン抵抗RONとして説明を行う。 Here, it is assumed that the on-resistance R ON-1 of the transistor 101 and the on-resistance R ON-2 of the transistor 102 have substantially the same resistance value. Hereinafter, the on-resistors R ON-1 and R ON-2 will be described as the on-resistors R ON.
 このような構成において、電圧V1およびV2は、次の式(1)および(2)により求められる。
1=VDD-RON×(IL+Δ)  …(1)
2=VDD-RON×(IL+Ioffset)  …(2)
 式(1)および(2)において、電流Iはレーザダイオード12に供給される電流、電流Ioffsetは電流ILに対する過電流分の電流である。
In such a configuration, the voltages V 1 and V 2 are obtained by the following equations (1) and (2).
V 1 = V DD -R ON × ( IL + Δ)… (1)
V 2 = V DD -R ON × (I L + I offset) ... (2)
In the formula (1) and (2), the current I L is the current supplied to the laser diode 12, the current I offset is over-current component of the current to the current I L.
 レベルシフト部13aは、駆動部20から出力される駆動電流に対応する電圧Vから、トランジスタ111のゲート・ソース間電圧を差し引いた電圧を入力とする。レベルシフト部13bは、レプリカ部20Rから出力される電圧、すなわち電圧Vからトランジスタ112のゲート・ソース間電圧を差し引いた電圧を入力とする。電流源113、114は、レベルシフト部13a、13bに所定の電流が流れるように動作する。レベルシフト部13aおよび13bは、比較部110が動作する電源電圧の範囲内の電圧になるように電圧レベルをシフトする。ここで、後述するように、レーザダイオードドライバの半導体チップに対してレーザダイオードアレイが積層された構造である場合、大きな電流を流す必要である。大きな電流を流すためには、電源電圧レベルを高くする必要がある。しかしながら、トランジスタの耐圧を考えると、高い電圧をかけることが難しい。このため、レベルシフト部13aおよび13bを設けて電圧レベルを変更、すなわちレベルシフトする必要がある。 The level shift unit 13a from voltages V 1 corresponding to the drive current output from the drive unit 20, an input voltage obtained by subtracting the gate-source voltage of the transistor 111. The level shift unit 13b, an input voltage output from the replica unit 20R, that is, the voltage obtained by subtracting the gate-source voltage of the transistor 112 from the voltage V 2. The current sources 113 and 114 operate so that a predetermined current flows through the level shift portions 13a and 13b. The level shift units 13a and 13b shift the voltage level so that the voltage is within the range of the power supply voltage at which the comparison unit 110 operates. Here, as will be described later, in the case of a structure in which the laser diode array is laminated on the semiconductor chip of the laser diode driver, it is necessary to pass a large current. In order to pass a large current, it is necessary to raise the power supply voltage level. However, considering the withstand voltage of the transistor, it is difficult to apply a high voltage. Therefore, it is necessary to provide the level shift portions 13a and 13b to change the voltage level, that is, to shift the level.
 低域通過フィルタ105は、レベルシフト部13aによってレベルシフトされた電圧を入力とする。低域通過フィルタ105は、高い周波数の成分を除去する。レーザダイオード12に流れる電流は所定の周期で変化し、低域通過フィルタ105によって高い周波数の成分が除去される。このため、低域通過フィルタ105の出力は、レーザダイオード12に流れる電流の平均値に対応する直流電圧になる。このため、低域通過フィルタ105は、入力される信号の所定時間内における平均値を出力する平均化回路として機能する。低域通過フィルタ105は、例えば、抵抗およびキャパシタによる時定数回路によって実現される。 The low-pass filter 105 inputs the voltage level-shifted by the level shift unit 13a. The low-pass filter 105 removes high-frequency components. The current flowing through the laser diode 12 changes at a predetermined cycle, and the high frequency component is removed by the low-pass filter 105. Therefore, the output of the low-pass filter 105 becomes a DC voltage corresponding to the average value of the currents flowing through the laser diode 12. Therefore, the low-pass filter 105 functions as an averaging circuit that outputs an average value of the input signal within a predetermined time. The low-pass filter 105 is realized, for example, by a time constant circuit with a resistor and a capacitor.
 比較部110は、低域通過フィルタ105の出力レベルとレベルシフト部13bによってレベルシフトされた基準レベルの信号とを比較する。比較部110は、低域通過フィルタ105の出力レベルが基準レベルの信号を超えている場合とそうでない場合とで異なる信号を出力する。例えば、比較部110は、低域通過フィルタ105の出力レベルが基準レベルを超えている場合に相対的に高い電圧(ハイレベル)の出力信号を出力し、低域通過フィルタ105の出力レベルが基準レベル以下である場合に相対的に低い電圧(ローレベル)の出力信号を出力する。このため、比較部110によって、レーザダイオード12に過電流が供給されていることを判定できる。したがって、比較部110は、図1中の検出部21として機能する。 The comparison unit 110 compares the output level of the low-pass filter 105 with the reference level signal level-shifted by the level shift unit 13b. The comparison unit 110 outputs different signals depending on whether the output level of the low-pass filter 105 exceeds the reference level signal or not. For example, the comparison unit 110 outputs an output signal having a relatively high voltage (high level) when the output level of the low-pass filter 105 exceeds the reference level, and the output level of the low-pass filter 105 is the reference. When it is below the level, an output signal with a relatively low voltage (low level) is output. Therefore, the comparison unit 110 can determine that an overcurrent is being supplied to the laser diode 12. Therefore, the comparison unit 110 functions as the detection unit 21 in FIG.
 ここで、電源電圧VDDと比較部110の動作電圧範囲とが異なる場合がある。例えば、電源電圧VDDが+5Vでグランドレベルが0Vであるのに対し、比較部110の動作電圧範囲が+2Vから+5Vである場合がある。そのような場合であっても、レベルシフト部13aおよび13bによって比較部110の動作電圧範囲内になるようにレベルシフトを行えば、レベルシフト後の適切な電圧を比較部110に入力することができる。これにより、駆動電流についての過電流を検出できる。 Here, the power supply voltage VDD and the operating voltage range of the comparison unit 110 may be different. For example, while the power supply voltage VDD is + 5V and the ground level is 0V, the operating voltage range of the comparison unit 110 may be + 2V to + 5V. Even in such a case, if the level shift units 13a and 13b perform level shift so as to be within the operating voltage range of the comparison unit 110, an appropriate voltage after the level shift can be input to the comparison unit 110. it can. This makes it possible to detect an overcurrent with respect to the drive current.
 図2において、比較例のドライバ10は、駆動部20によってレーザダイオード12に電流Iを供給する経路(本線と呼ぶ)と、レプリカ部20Rによる複製の経路(レプリカ経路と呼ぶ)とを用い、このレプリカ経路の電流を、レーザダイオード12に流れる電流であるとみなすようにしている。 In FIG. 2, the driver 10 of the comparative example uses a path (referred to as a main line) for supplying the current IL to the laser diode 12 by the drive unit 20 and a replication path (referred to as a replica path) by the replica unit 20R. The current of this replica path is regarded as the current flowing through the laser diode 12.
 電流源103は、電流ILを供給する。電流源103が供給する電流ILは、レーザダイオード12を所定の光量で発光させるための電流である。レーザダイオード12に供給される電流IL+Δは、過電流が無い場合には、電流ILと等しい。 Current source 103 supplies a current I L. Current I L supplied current source 103 is a current for lighting the laser diode 12 at a predetermined light amount. The current I L + delta supplied to the laser diode 12, when the overcurrent is not equal to the current I L.
 電流源104が供給する電流値は、変更できるようになっている。電流源104は、電流Iを供給する。電流Iは、電流ILに電流Ioffsetを加えた電流である。すなわち、電流源104は、レーザダイオード12に対して過電流とされる閾値となる電流IL+Ioffsetを供給する。換言すれば、電流IL+Ioffsetは、電流ILに対して過電流分の電流Ioffsetを上乗せした電流である。 The current value supplied by the current source 104 can be changed. Current source 104 supplies a current I c. Current I c is the current plus the current I offset to the current I L. That is, the current source 104 supplies a current I L + I offset to be the threshold value that is over-current to the laser diode 12. In other words, the current I L + I offset is a current obtained by adding the current I offset overcurrent component with respect to the current I L.
 レベルシフト部13aは、トランジスタ1311、1312および1313を有する。トランジスタ1311から1313は、それぞれダイオード接続されており、PN接合による抵抗が生じる。ダイオード接続されたトランジスタ1311から1313を複数段接続することによって抵抗体が実現される。レベルシフト部13bは、トランジスタ1321、1322および1323を有する。トランジスタ1321から1323は、それぞれダイオード接続されており、PN接合による抵抗が生じる。ダイオード接続されたトランジスタ1321から1323を複数段接続することによって抵抗体が実現される。 The level shift unit 13a has transistors 13 11 , 13 12 and 13 13 . Transistors 13 11 to 13 13 are respectively diode-connected, and resistance is generated by the PN junction. A resistor is realized by connecting a plurality of stages of the transistors 13 11 to 13 13 connected by diodes. The level shift unit 13b has transistors 13 21 , 13 22 and 13 23 . The transistors 13 21 to 13 23 are respectively diode-connected, and resistance is generated by the PN junction. A resistor is realized by connecting a plurality of stages of transistors 13 21 to 13 23 connected by diodes.
 ここで、レベルシフト部13aとレベルシフト部13bとは、ダイオード接続されている個数が同じであるため、トランジスタ1311から1313による抵抗値と、トランジスタ1321から1323による抵抗値とが同じになるはずである。しかしながら、トランジスタのばらつき(例えば製造上のばらつき)が大きい場合、トランジスタ1311から1313による抵抗値と、トランジスタ1321から1323による抵抗値とが同じにならず、レベルシフト部13aによる本線側のレベルシフト量とレベルシフト部13bによるレプリカ経路側のレベルシフト量とが一致しない可能性がある。これにより、過電流の検出の精度が低下する可能性がある。過電流の検出の精度の低下を抑えるためにレベルシフト部の面積を大きくすることがある。しかしながら、レベルシフト部の実装面積が限られている場合は、面積を大きくすることが難しく、結果としてばらつきを小さくすることが難しい場合がある。 Here, since the number of the level shift unit 13a and the level shift unit 13b connected to the diode is the same, the resistance value of the transistors 13 11 to 13 13 and the resistance value of the transistors 13 21 to 13 23 are the same. Should be. However, when the variation of the transistors (for example, the variation in manufacturing) is large, the resistance value by the transistors 13 11 to 13 13 and the resistance value by the transistors 13 21 to 13 23 are not the same, and the main line side by the level shift portion 13a There is a possibility that the level shift amount of the above and the level shift amount on the replica path side by the level shift unit 13b do not match. This may reduce the accuracy of overcurrent detection. The area of the level shift portion may be increased in order to suppress a decrease in the accuracy of overcurrent detection. However, when the mounting area of the level shift portion is limited, it may be difficult to increase the area, and as a result, it may be difficult to reduce the variation.
 また、後述するように、レーザダイオードドライバの半導体チップに対してレーザダイオードアレイが積層された構造である場合、大きな電流を流すことがある。大きな電流を流すためには、半導体チップの面積を大きくする必要がある。 Further, as will be described later, when the laser diode array is laminated on the semiconductor chip of the laser diode driver, a large current may flow. In order to pass a large current, it is necessary to increase the area of the semiconductor chip.
(1.第1の実施形態)
 次に、本開示の第1の実施形態について説明する。図3は、本開示の第1の実施形態による光源装置のドライバ10aを示す図である。
(1. First Embodiment)
Next, the first embodiment of the present disclosure will be described. FIG. 3 is a diagram showing a driver 10a of a light source device according to the first embodiment of the present disclosure.
 [1.1 構成]
 図3に示すドライバ10aでは、駆動部20の出力信号についてレベルシフトを行わずに、低域通過フィルタ105を介して比較部110aに入力している。レプリカ部20Rの出力信号についても、レベルシフトを行わずに、比較部110aに入力している。そして、比較部110aの出力についてレベルシフト部130によるレベルシフトを行っている。つまり、図3に示す光源装置のドライバ10aが、図2を参照して説明した比較例と異なる点は、レベルシフト部130の位置である。
[1.1 Configuration]
In the driver 10a shown in FIG. 3, the output signal of the drive unit 20 is input to the comparison unit 110a via the low-pass filter 105 without level shifting. The output signal of the replica unit 20R is also input to the comparison unit 110a without level shifting. Then, the output of the comparison unit 110a is level-shifted by the level shift unit 130. That is, the difference between the driver 10a of the light source device shown in FIG. 3 and the comparative example described with reference to FIG. 2 is the position of the level shift unit 130.
 比較部110aの動作電圧範囲は、図2を参照して説明した比較部110の動作電圧範囲とは異なる。上述した例では、電源電圧VDDが+5Vでグランドレベルが0Vであるのに対し、比較部110の動作電圧範囲が+2Vから+5Vであった。これに対し、比較部110aの動作電圧範囲は、例えば、+5Vから0Vである。これにより、比較部110aは、比較動作を適切に行うことができる。 The operating voltage range of the comparison unit 110a is different from the operating voltage range of the comparison unit 110 described with reference to FIG. In the above example, the power supply voltage VDD is + 5V and the ground level is 0V, whereas the operating voltage range of the comparison unit 110 is + 2V to + 5V. On the other hand, the operating voltage range of the comparison unit 110a is, for example, + 5V to 0V. As a result, the comparison unit 110a can appropriately perform the comparison operation.
 [1.2 動作]
 比較部110aは、駆動部20の出力信号とレプリカ部20Rの出力信号とを比較する。比較部110aは、例えば、駆動部20の出力信号の電圧レベルがレプリカ部20Rの出力信号の電圧レベルより低い場合(過電流が流れている場合)に、ハイレベルの信号を出力する。比較部110aは、例えば、駆動部20の出力信号の電圧レベルがレプリカ部20Rの出力信号の電圧レベルより高い場合(過電流が流れていない場合)に、ローレベルの信号を出力する。つまり、比較部110aは、過電流を検出するための閾値を超えているか否かによって、ハイレベルまたはローレベルの出力信号を出力する。
[1.2 Operation]
The comparison unit 110a compares the output signal of the drive unit 20 with the output signal of the replica unit 20R. The comparison unit 110a outputs a high level signal, for example, when the voltage level of the output signal of the drive unit 20 is lower than the voltage level of the output signal of the replica unit 20R (when an overcurrent is flowing). The comparison unit 110a outputs a low level signal, for example, when the voltage level of the output signal of the drive unit 20 is higher than the voltage level of the output signal of the replica unit 20R (when no overcurrent is flowing). That is, the comparison unit 110a outputs a high level or low level output signal depending on whether or not the threshold value for detecting an overcurrent is exceeded.
 レベルシフト部130は、図示しない後段の回路、すなわち出力信号の受け渡し先の回路の電圧レベルに合わせるためのレベルシフトを行う。これにより、比較部110aとレベルシフト部130との配置が上述した比較例と異なっていても、出力信号を受け渡すことができる。 The level shift unit 130 performs level shift to match the voltage level of a circuit in the subsequent stage (not shown), that is, a circuit to which the output signal is transferred. As a result, even if the arrangement of the comparison unit 110a and the level shift unit 130 is different from the above-mentioned comparative example, the output signal can be passed.
 レベルシフト部130は、比較部110aによる比較動作の結果を示すハイレベルまたはローレベルの出力信号について電圧レベルを変更する。レベルシフト部130は、ハイレベルの出力信号、ローレベルの出力信号について同様に電圧レベルをシフトするのであり、レベルシフト部130は、比較動作の結果であるハイレベルをローレベルに変更したり、その逆に変更したりすることはない。このため、レベルシフト部130によるレベルシフトを行っても、比較部110aによる比較動作の精度に影響を与えることはない。 The level shift unit 130 changes the voltage level of a high level or low level output signal indicating the result of the comparison operation by the comparison unit 110a. The level shift unit 130 similarly shifts the voltage level for the high level output signal and the low level output signal, and the level shift unit 130 changes the high level, which is the result of the comparison operation, to the low level. On the contrary, it does not change. Therefore, even if the level shift unit 130 performs the level shift, the accuracy of the comparison operation by the comparison unit 110a is not affected.
 図2を参照して説明した比較例では、2つのレベルシフト部13aおよび13bを用いてレベルシフトを行った後に比較部110による比較を行う。このため、レベルシフト部13a、13bを構成する各トランジスタに関して、製造時のプロセスなどに起因するばらつきが出る可能性がある。そのようなばらつきがあると、比較部110による比較の精度に限界がある。これに対し、第1の実施形態では、比較部110aによる比較を行った後、レベルシフト部130によるレベルシフトを行う。このため、上記のばらつきが比較部110aによる比較動作の精度に影響を与えることはない。 In the comparative example described with reference to FIG. 2, the comparison is performed by the comparison unit 110 after the level shift is performed using the two level shift units 13a and 13b. Therefore, there is a possibility that the transistors constituting the level shift portions 13a and 13b may have variations due to a manufacturing process or the like. If there is such a variation, there is a limit to the accuracy of comparison by the comparison unit 110. On the other hand, in the first embodiment, after the comparison is performed by the comparison unit 110a, the level shift is performed by the level shift unit 130. Therefore, the above variation does not affect the accuracy of the comparison operation by the comparison unit 110a.
 [1.3 第1の実施形態の第1の変形例]
 次に、第1の実施形態の第1の変形例について説明する。第1の実施形態の第1の変形例では、図3を用いて説明した第1の実施形態に係るドライバ10aの構成に対し、レプリカ経路において、トランジスタ102のオン抵抗RON-2を大きくすると共に、電流源104が供給する電流を少なくする。
[1.3 First Modified Example of First Embodiment]
Next, a first modification of the first embodiment will be described. In the first modification of the first embodiment, the on-resistance R ON-2 of the transistor 102 is increased in the replica path with respect to the configuration of the driver 10a according to the first embodiment described with reference to FIG. At the same time, the current supplied by the current source 104 is reduced.
 図4は、第1の実施形態の第1の変形例に係るドライバ10bの一例の構成を示す図である。図4に示す各要素の接続関係は、図3に示したドライバ10aと同様であるため、ここでの説明を省略する。図4において、ドライバ10bは、レプリカ経路のトランジスタ102’のオン抵抗を、図3に示したトランジスタ102のオン抵抗RON-2より大きな抵抗値とする。図4の例では、トランジスタ102’のオン抵抗が抵抗RON-2×N(Nは2以上の整数)とされている。 FIG. 4 is a diagram showing a configuration of an example of the driver 10b according to the first modification of the first embodiment. Since the connection relationship of each element shown in FIG. 4 is the same as that of the driver 10a shown in FIG. 3, the description thereof is omitted here. In FIG. 4, the driver 10b sets the on-resistance of the transistor 102'of the replica path to a resistance value larger than the on-resistance R ON-2 of the transistor 102 shown in FIG. In the example of FIG. 4, the on-resistance of the transistor 102'is a resistor R ON-2 × N (N is an integer of 2 or more).
 また、ドライバ10bにおいて、レプリカ経路の電流源104が供給する電流を、トランジスタ102’のオン抵抗RON-2×Nに応じて小さな電流とする。図4の例では、電流源104’が電流(IL+Ioffset)/Nを供給している。電流源104’により供給される電流が図3の構成に対して小さくなるため、ドライバ10bにおける消費電力を、図3のドライバ10aに対して削減することができる。 Further, in the driver 10b, the current supplied by the current source 104 of the replica path is set to a small current according to the on-resistance R ON-2 × N of the transistor 102'. In the example of FIG. 4, the current source 104 'is supplying current (I L + I offset) / N. Since the current supplied by the current source 104'is smaller than that of the configuration of FIG. 3, the power consumption of the driver 10b can be reduced with respect to the driver 10a of FIG.
 [1.4 第1の実施形態の第2の変形例]
 次に、第1の実施形態の第2の変形例について説明する。図5は、第1の実施形態の第2の変形例に係るドライバ10b’の一例の構成を示す図である。図5に示す各要素の接続関係は、図3に示したドライバ10aと同様であるため、ここでの説明を省略する。図5に示すドライバ10b’では、図4の構成に、トランジスタ101のドレインと接地電位との間に接続されるキャパシタ140がさらに追加されている。キャパシタ140は、トランジスタ101を介して供給された電源の電圧VDDに応じた電荷を蓄積する。例えば電流源103によるレーザダイオード12に対する電流の供給を、PWM(Pulse Width Modulation)駆動によって行う場合に、このキャパシタ140に蓄積された電荷を用いて、レーザダイオード12に対する電流の供給を行う。
[1.4 Example of Second Modification of First Embodiment]
Next, a second modification of the first embodiment will be described. FIG. 5 is a diagram showing a configuration of an example of the driver 10b'related to the second modification of the first embodiment. Since the connection relationship of each element shown in FIG. 5 is the same as that of the driver 10a shown in FIG. 3, the description thereof is omitted here. In the driver 10b'shown in FIG. 5, a capacitor 140 connected between the drain of the transistor 101 and the ground potential is further added to the configuration of FIG. The capacitor 140 stores an electric charge corresponding to the voltage V DD of the power supply supplied via the transistor 101. For example, when the current source 103 supplies the current to the laser diode 12 by PWM (Pulse Width Modulation) drive, the electric charge accumulated in the capacitor 140 is used to supply the current to the laser diode 12.
 すなわち、電源の電圧VDDは、LDDチップ1000の外部の基板からLDDチップ1000上のパッド1001に対して、例えば、ワイヤボンディングにより供給される。PWM駆動により急峻な電圧の変化が生じると、このワイヤボンディングに用いるワイヤのインダクタンスにより、大きな電圧降下が発生する。そのため、各レーザダイオード121~12nに対して、キャパシタ140に蓄積された電荷に基づき電流ILを供給することで、この電圧降下の影響を回避することができる。 That is, the voltage V DD of the power supply is supplied from the external substrate of the LDD chip 1000 to the pad 1001 on the LDD chip 1000 by wire bonding, for example. When a steep voltage change occurs due to PWM drive, a large voltage drop occurs due to the inductance of the wire used for this wire bonding. Therefore, for each laser diode 12 1 ~ 12 n, by supplying the current I L on the basis of the charge stored in the capacitor 140, it is possible to avoid the influence of this voltage drop.
 [1.5 効果]
 第1の実施形態によれば、レベルシフト部を複数設けることによるばらつきを排除することができ、面積を大きくすることなく、判定精度を高めることができる。
[1.5 effect]
According to the first embodiment, it is possible to eliminate variations due to the provision of a plurality of level shift portions, and it is possible to improve the determination accuracy without increasing the area.
(2.第2の実施形態)
 本開示の第2の実施形態について説明する。図6は、レベルシフト部130aの例を示す図である。
(2. Second embodiment)
A second embodiment of the present disclosure will be described. FIG. 6 is a diagram showing an example of the level shift unit 130a.
 [2.1 構成]
 図6に示すレベルシフト部130aは、直列接続された抵抗131および132と、トランジスタ133と、反転回路139とを有する。
[2.1 Configuration]
The level shift unit 130a shown in FIG. 6 includes resistors 131 and 132 connected in series, a transistor 133, and an inverting circuit 139.
 抵抗131の一端は、トランジスタ133を介して、所定電位である電源電圧VDDに接続される。抵抗131の他端は、抵抗132の一端に接続される。抵抗132の他端は、基準電圧に接続される。トランジスタ133のゲートには、比較部110の出力信号が入力信号INとして入力される。トランジスタ133は、比較部110の出力信号に基づいてオンまたはオフになる。基準電圧は、分圧抵抗である抵抗131および132によって分割する電圧の基準となる電圧である。例えば、グランドを基準電圧とすることができるが、それに限定されない。反転回路139は、抵抗131および132によって分割される電圧を反転し、出力する。 One end of the resistor 131 through the transistor 133 is connected to the power supply voltage V DD is a predetermined potential. The other end of the resistor 131 is connected to one end of the resistor 132. The other end of the resistor 132 is connected to the reference voltage. The output signal of the comparison unit 110 is input to the gate of the transistor 133 as an input signal IN. The transistor 133 is turned on or off based on the output signal of the comparison unit 110. The reference voltage is a voltage that serves as a reference for the voltage divided by the resistors 131 and 132, which are voltage dividing resistors. For example, ground can be used as a reference voltage, but the reference voltage is not limited thereto. The inverting circuit 139 inverts and outputs the voltage divided by the resistors 131 and 132.
 [2.2 動作]
 トランジスタ133は、比較部110の出力信号に基づいてオンまたはオフになる。トランジスタ133がオンのとき、抵抗131および132は、分圧抵抗として機能する。レベルシフト部130aは、抵抗131および132による分圧抵抗によって分圧された電圧を反転回路139で反転して出力する。つまり、レベルシフト部130aは、分圧抵抗によって分圧された電圧に対応する電圧を、レベルシフト後の出力信号OUTとして出力する。つまり、レベルシフト部130aは、入力信号INに対してレベルシフトした出力信号OUTを出力する。
[2.2 Operation]
The transistor 133 is turned on or off based on the output signal of the comparison unit 110. When the transistor 133 is on, the resistors 131 and 132 function as voltage dividing resistors. The level shift unit 130a inverts the voltage divided by the voltage dividing resistance by the resistors 131 and 132 by the inverting circuit 139 and outputs the voltage. That is, the level shift unit 130a outputs the voltage corresponding to the voltage divided by the voltage dividing resistor as the output signal OUT after the level shift. That is, the level shift unit 130a outputs a level-shifted output signal OUT with respect to the input signal IN.
 [2.3 効果]
 第2の実施形態によれば、シンプルな構成によってレベルシフトを実現できるので、レベルシフト部130aを設けることによる実装面積の増加を最小に抑えることができる。
[2.3 effect]
According to the second embodiment, since the level shift can be realized by a simple configuration, the increase in the mounting area due to the provision of the level shift portion 130a can be minimized.
(3.第3の実施形態)
 本開示の第3の実施形態について説明する。図7は、レベルシフト部130bの例を示す図である。
(3. Third Embodiment)
A third embodiment of the present disclosure will be described. FIG. 7 is a diagram showing an example of the level shift unit 130b.
 [3.1 構成]
 図7に示すレベルシフト部130bは、フリップフロップ部FFと、バッファ部BF1、BF2と、トランジスタ134aおよび134bと、出力部135とを有する。バッファ部BF1とバッファ部BF2とは、入力信号INを入力とする。入力信号INは、比較部110の出力信号である。
[3.1 Configuration]
The level shift unit 130b shown in FIG. 7 includes a flip-flop unit FF, buffer units BF1 and BF2, transistors 134a and 134b, and an output unit 135. The buffer unit BF1 and the buffer unit BF2 receive an input signal IN as an input. The input signal IN is an output signal of the comparison unit 110.
 図7に示すように、フリップフロップ部FFは、4つのトランジスタによって構成されている。フリップフロップ部FFは、相対的に高い電圧(ハイレベル)の出力信号を出力する第1状態と、相対的に低い電圧(ローレベル)の出力信号を出力する第2状態とのいずれか一方の状態になる。 As shown in FIG. 7, the flip-flop unit FF is composed of four transistors. The flip-flop unit FF has either a first state of outputting a relatively high voltage (high level) output signal or a second state of outputting a relatively low voltage (low level) output signal. Become in a state.
 フリップフロップ部FFには、トランジスタ134aまたは134bを介して電源電圧VDDHが印加される。フリップフロップ部FFは、いずれか一方がオンになるトランジスタF1およびF2と、電源電圧VDDMによってオンになるトランジスタF3およびF4と、を有する。フリップフロップ部FFは、ハイレベルの出力信号を出力する第1状態またはローレベルの出力信号を出力する第2状態になる。フリップフロップ部FFの出力信号は、出力部135に入力される。出力部135は、トランジスタC1およびC2によるCMOSインバータを有する。 A power supply voltage V DDH is applied to the flip-flop portion FF via the transistors 134a or 134b. The flip-flop unit FF has transistors F1 and F2 that are turned on by either one, and transistors F3 and F4 that are turned on by the power supply voltage V DDM. The flip-flop unit FF is in the first state of outputting a high-level output signal or the second state of outputting a low-level output signal. The output signal of the flip-flop unit FF is input to the output unit 135. The output unit 135 has a CMOS inverter with transistors C1 and C2.
 バッファ部BF1およびBF2、トランジスタ134aおよび134bは、電源電圧VDDHおよび基準電圧VSSHによって動作する。フリップフロップ部FFは、電源電圧VDDMおよび基準電圧VSSLによって動作する。出力部135は、電源電圧VDDLおよび基準電圧VSSLによって動作する。したがって、フリップフロップ部FFと出力部135とは異なる電源電圧によって動作する。 The buffer units BF1 and BF2, the transistors 134a and 134b are operated by the power supply voltage V DDH and the reference voltage V SSH. The flip-flop unit FF operates by the power supply voltage V DDM and the reference voltage V SSL . The output unit 135 operates by the power supply voltage V DDL and the reference voltage V SSL . Therefore, the flip-flop unit FF and the output unit 135 operate with different power supply voltages.
 ここで、電源電圧VDDHは、電源電圧VDDMおよび電源電圧VDDLより高い電圧である。電源電圧VDDMは、電源電圧VDDHより低く、かつ、電源電圧VDDLより高い電圧である。電源電圧VDDLは、電源電圧VDDMおよび電源電圧VDDHより低い電圧である。基準電圧VSSHは、基準電圧VSSLより高い電圧である。 Here, the power supply voltage V DDH is a voltage higher than the power supply voltage V DDM and the power supply voltage V DDL. The power supply voltage V DDM is a voltage lower than the power supply voltage V DDH and higher than the power supply voltage V DDL. The power supply voltage V DDL is a voltage lower than the power supply voltage V DDM and the power supply voltage V DDH. The reference voltage V SSH is a voltage higher than the reference voltage V SSL.
 [3.2 動作]
 バッファ部BF1は入力信号INを反転させずに出力する。バッファ部BF2は入力信号INを反転して出力する。バッファ部BF1の出力信号は、トランジスタ134aのゲートに入力される。バッファ部BF2の出力信号は、トランジスタ134bのゲートに入力される。したがって、トランジスタ134aがオンの状態であるときにトランジスタ134bがオンの状態になる。また、トランジスタ134aがオフの状態であるときにトランジスタ134bがオンの状態になる。
[3.2 Operation]
The buffer unit BF1 outputs the input signal IN without inverting it. The buffer unit BF2 inverts the input signal IN and outputs it. The output signal of the buffer unit BF1 is input to the gate of the transistor 134a. The output signal of the buffer unit BF2 is input to the gate of the transistor 134b. Therefore, when the transistor 134a is in the on state, the transistor 134b is in the on state. Further, when the transistor 134a is in the off state, the transistor 134b is in the on state.
 トランジスタ134aがオンの状態であるとき、トランジスタ134aを介して電源電圧VDDHがフリップフロップ部FFに与えられ、フリップフロップ部FFの出力は第1状態になる。例えば、フリップフロップ部FFの出力信号はハイレベルになる。一方、トランジスタ134bがオンの状態であるとき、トランジスタ134bを介して電源電圧VDDHがフリップフロップ部FFに与えられ、フリップフロップ部FFの出力は第2状態になる。例えば、フリップフロップ部FFの出力信号はローレベルになる。つまり、フリップフロップ部FFは、比較部110の出力信号に基づいて、第1状態または第2状態に設定される。 When the transistor 134a is in the ON state, the power supply voltage VDDH is applied to the flip-flop section FF via the transistor 134a, and the output of the flip-flop section FF is in the first state. For example, the output signal of the flip-flop section FF becomes a high level. On the other hand, when the transistor 134b is in the ON state, the power supply voltage VDDH is applied to the flip-flop section FF via the transistor 134b, and the output of the flip-flop section FF is in the second state. For example, the output signal of the flip-flop section FF becomes low level. That is, the flip-flop unit FF is set to the first state or the second state based on the output signal of the comparison unit 110.
 フリップフロップ部FFの出力信号は、出力部135に入力される。出力部135は、フリップフロップ部FFの出力信号を反転し、出力信号OUTとして出力する。つまり、出力部135は、フリップフロップ部FFの状態に対応する電圧を出力する。出力部135は、入力信号INに対してレベルシフトした出力信号OUTを出力する。 The output signal of the flip-flop unit FF is input to the output unit 135. The output unit 135 inverts the output signal of the flip-flop unit FF and outputs it as an output signal OUT. That is, the output unit 135 outputs a voltage corresponding to the state of the flip-flop unit FF. The output unit 135 outputs an output signal OUT that is level-shifted with respect to the input signal IN.
 [3.3 効果]
 第3の実施形態によれば、レベルシフト部を複数設けることによるばらつきを排除することができ、面積を大きくすることなく、判定精度を高めることができる。
[3.3 effect]
According to the third embodiment, it is possible to eliminate variations due to the provision of a plurality of level shift portions, and it is possible to improve the determination accuracy without increasing the area.
(4.第4の実施形態)
 次に、第4の実施形態について説明する。上述した第1の実施形態から第3の実施形態、ならびに、各変形例では、各ドライバが1個のレーザダイオード12を駆動する構成について説明した。これらに対して、第4の実施形態に係るドライバは、複数のレーザダイオード12を駆動する。
(4. Fourth Embodiment)
Next, a fourth embodiment will be described. In the first to third embodiments described above, and in each modification, a configuration in which each driver drives one laser diode 12 has been described. On the other hand, the driver according to the fourth embodiment drives a plurality of laser diodes 12.
 図8Aおよび図8Bは、第4の実施形態に係る、複数のレーザダイオード12を駆動する場合の構成の第1の例、第2の例を示す図である。なお、図8A、図8Bにおいて、トランジスタ102、112、電流源104、低域通過フィルタ105および比較部110に係る構成は、上述した図3の構成と同様であるので、詳細な説明を省略する。 8A and 8B are diagrams showing a first example and a second example of a configuration for driving a plurality of laser diodes 12 according to a fourth embodiment. In FIGS. 8A and 8B, the configurations of the transistors 102 and 112, the current source 104, the low-pass filter 105, and the comparison unit 110 are the same as those of FIG. 3 described above, and detailed description thereof will be omitted. ..
 図8A、図8Bは、それぞれ、トランジスタ101のドレインに対して複数のレーザダイオード121、122、…、12nを含むLD(レーザダイオード)アレイ1200aおよび1200bが接続されている。LDアレイ1200a、1200bは、例えばVCSEL(Vertical Cavity Surface Emitting LASER)である。 8A, 8B, respectively, the laser diode 12 1, 12 2 more with respect to the drain of the transistor 101, ..., LD (laser diode) arrays 1200a and 1200b are connected, including a 12 n. The LD arrays 1200a and 1200b are, for example, VCSELs (Vertical Cavity Surface Emitting LASER).
 各レーザダイオード121、122、…、12nそれぞれは、それぞれ独立して制御可能な電流源1031、1032、…、103nそれぞれが一対一に接続される。すなわち、図示されない駆動回路により、各電流源1031、1032、…、103nの例えばオン/オフをそれぞれ制御することで、各電流源1031、1032、…、103nに一対一に対応する各レーザダイオード121、122、…、12nの発光を、それぞれ独立して制御できる。 Each of the laser diodes 12 1 , 12 2 , ..., 12 n is connected to each of the independently controllable current sources 103 1 , 103 2 , ..., 103 n on a one-to-one basis. That is, by controlling, for example, on / off of each of the current sources 103 1 , 103 2 , ..., 103 n by a drive circuit (not shown), one-to-one with each of the current sources 103 1 , 103 2 , ..., 103 n. The light emission of each of the corresponding laser diodes 12 1 , 12 2 , ..., 12 n can be controlled independently.
 図8Aは、第4実施形態に係る、複数のレーザダイオード12を駆動する場合の第1の例によるドライバ10cの構成例を示す図である。図8Aは、各レーザダイオード121、122、…、12nの各アノードおよび各カソードが独立しているLDアレイ1200aの例を示す。LDアレイ1200aにおいて、各レーザダイオード121、122、…、12nの各アノードが、結合部100a1、100a2、…、100anを介してトランジスタ101のドレインに接続される。ドライバ10cにおいて、この各結合部100a1、100a2、…、100anと、トランジスタ101のドレインとが接続される接続点の電圧は電圧Vとなる。電圧Vから、トランジスタ111のゲート・ソース間電圧を差し引いた電圧Vが取り出される。電圧Vは、低域通過フィルタ105を介して比較部110に供給される。 FIG. 8A is a diagram showing a configuration example of the driver 10c according to the first example in the case of driving a plurality of laser diodes 12 according to the fourth embodiment. Figure 8A, each laser diode 12 1, 12 2, ..., show examples of LD arrays 1200a to each anode and each cathode is independent of the 12 n. In LD array 1200a, the laser diode 12 1, 12 2, ..., each anode of the 12 n, coupling portions 100a 1, 100a 2, ..., are connected to the drain of the transistor 101 through the 100a n. In the driver 10c, the respective coupling portions 100a 1, 100a 2, ..., and 100a n, the voltage at the node where the drain of the transistor 101 is connected to the voltage V 1. The voltage V 3 obtained by subtracting the gate-source voltage of the transistor 111 from the voltage V 1 is taken out. The voltage V 3 is supplied to the comparison unit 110 via the low-pass filter 105.
 また、各レーザダイオード121、122、…、12nの各カソードが、結合部100b1、100b2、…、100bnと、を介して、各電流源1031、1032、…、103nに一対一で接続される。 Further, the cathodes of the laser diodes 12 1 , 12 2 , ..., 12 n are connected to the coupling portions 100b 1 , 100b 2 , ..., 100 b n, and the current sources 103 1 , 103 2 , ..., 103. It is connected to n on a one-to-one basis.
 図8Bは、第4の実施形態に係る、複数のレーザダイオード12を駆動する場合の第2の例によるドライバ10dの構成例を示す図である。図8Bは、各レーザダイオード121、122、…、12nの各アノードが共通に接続され、各カソードが独立しているLDアレイ1200bの例を示す。LDアレイ1200bにおいて、各レーザダイオード121、122、…、12nの各アノードが結合部100aに共通に接続され、結合部100aを介してトランジスタ101のドレインに接続される。ドライバ10dにおいて、この結合部100aと、トランジスタ101のドレインとが接続される接続点から電圧V1が取り出される。そして、電圧V1から、トランジスタ111のゲート・ソース間電圧を差し引いた電圧Vが取り出される。電圧Vは、低域通過フィルタ105を介して比較部110に供給される。 FIG. 8B is a diagram showing a configuration example of the driver 10d according to the second example in the case of driving a plurality of laser diodes 12 according to the fourth embodiment. FIG. 8B shows an example of an LD array 1200b in which the anodes of the laser diodes 12 1 , 12 2 , ..., 12 n are commonly connected and the cathodes are independent. In the LD array 1200b, the anodes of the laser diodes 12 1 , 12 2 , ..., 12 n are commonly connected to the coupling portion 100a, and are connected to the drain of the transistor 101 via the coupling portion 100a. In the driver 10d, the voltage V 1 is taken out from the connection point where the coupling portion 100a and the drain of the transistor 101 are connected. Then, the voltage V 3 obtained by subtracting the gate-source voltage of the transistor 111 from the voltage V 1 is taken out. The voltage V 3 is supplied to the comparison unit 110 via the low-pass filter 105.
 また、各レーザダイオード121、122、…、12nの各カソードが、結合部100b1、100b2、…、100bn、を介して、各電流源1031、1032、…、103nに一対一で接続される。 Also, each laser diode 12 1, 12 2, ..., 12 each cathode of n is, the coupling portion 100b 1, 100b 2, ..., 100b n, via a respective current source 103 1, 103 2, ..., 103 n Is connected one-to-one.
 図8Aおよび図8Bのいずれの例においても、本線において取り出される電圧V1は、各レーザダイオード121、122、…、12nを流れる電流の総和に対応する電圧となる。したがって、レプリカ経路における電流源104も、この総和の電流に対応する電流IL+Ioffsetを供給する必要がある。 In any of the examples of FIGS. 8A and 8B, voltages V 1 to be taken out in the main line, each laser diode 12 1, 12 2, ..., a voltage corresponding to the sum of the currents flowing through 12 n. Thus, the current source 104 in the replica routing also, it is necessary to supply a current I L + I offset that corresponds to the current of the summation.
 これに限らず、例えば、各電流源1031、1032、…、103nを個別に制御して、過電流をレーザダイオード121、122、…、12n毎に検出することも可能である。 Not limited to this, for example, it is also possible to individually control each current source 103 1 , 103 2 , ..., 103 n and detect an overcurrent every 12 n 1 , 12 2 , ..., 12 n of the laser diode. is there.
 このように、複数のレーザダイオード121、122、…、12nが接続される場合であっても、レーザダイオード121、122、…、12nに対する過電流の検出が可能である。 Thus, a plurality of laser diodes 12 1, 12 2, ..., even if the 12 n are connected, the laser diode 12 1, 12 2, ..., it is possible to detect the overcurrent for 12 n.
(5.第5の実施形態)
 次に、第5の実施形態について説明する。第5の実施形態は、上述した第4の実施形態に係るドライバ10c、10d、および、LDアレイ1200a、1200bの実装に関するものである。
(5. Fifth Embodiment)
Next, a fifth embodiment will be described. A fifth embodiment relates to mounting the drivers 10c and 10d and the LD arrays 1200a and 1200b according to the fourth embodiment described above.
 以下では、図8Bを用いて説明したドライバ10dと、各レーザダイオード121~12Nのアノードが共通とされたLDアレイ1200bと、を例として、説明を行う。この場合において、トランジスタ101は、並列接続された複数のトランジスタを含み、トランジスタ102は、同様に並列接続された複数のトランジスタを含むものとする。 In the following, the driver 10d described with reference to FIG. 8B and the LD array 1200b having a common anode for each of the laser diodes 12 1 to 12 N will be described as an example. In this case, the transistor 101 includes a plurality of transistors connected in parallel, and the transistor 102 includes a plurality of transistors connected in parallel in the same manner.
 図9A~図9Cは、第5の実施形態に係るドライバ10dおよびLDアレイ1200bの第1~第3の実装例を概略的に示す図である。第4の実施形態では、LDアレイ1200bと、ドライバ10dに含まれる他の構成とを、別の基板上に形成する。 9A to 9C are diagrams schematically showing first to third mounting examples of the driver 10d and the LD array 1200b according to the fifth embodiment. In the fourth embodiment, the LD array 1200b and other configurations included in the driver 10d are formed on another substrate.
 図9Aは、第5の実施形態に適用可能な、ドライバ10dに含まれる各要素が配置されるLDD(レーザダイオードドライバ)チップ1000上にLDアレイ1200bが配置される様子を模式的に示す図である。図9Aは、LDDチップ1000およびLDアレイ1200bを、LDアレイ1200bに含まれる各レーザダイオード12の発光部が配置される面(上面とする)から見た様子を示している。なお、この図9Aおよび後述する図9Bにおいて、LDアレイ1200bは、LDDチップ1000と接続される側(裏面)を、レーザダイオード12の発光部が配置される上面側から透視した状態で示されている。 FIG. 9A is a diagram schematically showing how the LD array 1200b is arranged on the LDD (laser diode driver) chip 1000 in which each element included in the driver 10d is arranged, which is applicable to the fifth embodiment. is there. FIG. 9A shows the LDD chip 1000 and the LD array 1200b viewed from the surface (upper surface) on which the light emitting portion of each laser diode 12 included in the LD array 1200b is arranged. In FIG. 9A and FIG. 9B described later, the LD array 1200b is shown in a state where the side (back surface) connected to the LDD chip 1000 is seen through from the upper surface side where the light emitting portion of the laser diode 12 is arranged. There is.
 LDDチップ1000は、1つの半導体チップであって、周辺部に配置される複数のパッド1001に対するワイヤボンディングにより、外部の回路と接続される。例えば、LDDチップ1000に対して、パッド1001を介して外部から電圧VDDの電源が供給される。また、図8Bにおける電圧V1およびV2は、LDDチップ1000の外部に設けられる比較部110に対して、パッド1001を介して供給される。なお、比較部110は、どこに設けられていてもよい。比較部110は、LDDチップ1000の内部に設けられていてもよい。 The LDD chip 1000 is one semiconductor chip, and is connected to an external circuit by wire bonding to a plurality of pads 1001 arranged in a peripheral portion. For example, the LDD chip 1000 is supplied with a voltage V DD from the outside via the pad 1001. Further, the voltages V 1 and V 2 in FIG. 8B are supplied to the comparison unit 110 provided outside the LDD chip 1000 via the pad 1001. The comparison unit 110 may be provided anywhere. The comparison unit 110 may be provided inside the LDD chip 1000.
 図9Bは、第5の実施形態に適用可能なLDアレイ1200bの構成を模式的に示す図である。図9Bに示すように、LDアレイ1200bの裏面に対し、LDアレイ1200bに含まれる複数のレーザダイオード12それぞれのカソード端子1201と、当該複数のレーザダイオード12に共通するアノード端子1202とが整列して配置される。 FIG. 9B is a diagram schematically showing the configuration of the LD array 1200b applicable to the fifth embodiment. As shown in FIG. 9B, the cathode terminals 1201 of each of the plurality of laser diodes 12 included in the LD array 1200b and the anode terminals 1202 common to the plurality of laser diodes 12 are aligned with respect to the back surface of the LD array 1200b. Be placed.
 図9Bの例では、図の横方向を行、縦方向を列とするとき、カソード端子1201は、C行×L列の格子状の配列により、LDアレイ1200bの中央部に配置されている。すなわち、この例では、LDアレイ1200bに対して、(C×L)個のレーザダイオード12が配置されることになる。また、アノード端子1202は、LDアレイ1200bの左端側にC行×A1列、右端側にC行×A2列の各格子状の配列により配置されている。 In the example of FIG. 9B, when the horizontal direction of the figure is a row and the vertical direction is a column, the cathode terminals 1201 are arranged in the central portion of the LD array 1200b by a grid-like arrangement of C rows × L columns. That is, in this example, (C × L) laser diodes 12 are arranged with respect to the LD array 1200b. Further, the anode terminals 1202 are arranged in a grid pattern of C rows × A 1 column on the left end side of the LD array 1200b and C rows × A 2 columns on the right end side.
 ここで、各カソード端子1201は、例えば図8Bにおける結合部100b1、100b2、…、100bnに対応する。また、各アノード端子1202は、纏めて、例えば図8Bにおける結合部100aに対応する。各レーザダイオード12のアノードが共通して接続される結合部100aを複数のアノード端子1202により複数形成することで、当該各アノードをLDDチップ1000に接続する際の接続抵抗を低く抑えることが可能となる。 Here, each cathode terminal 1201 corresponds to, for example, the coupling portions 100b 1 , 100b 2 , ..., 100b n in FIG. 8B. In addition, each anode terminal 1202 collectively corresponds to, for example, the coupling portion 100a in FIG. 8B. By forming a plurality of coupling portions 100a in which the anodes of the laser diodes 12 are commonly connected by the plurality of anode terminals 1202, it is possible to suppress the connection resistance when connecting each anode to the LDD chip 1000. Become.
 図9Cは、第5の実施形態に適用可能な、LDDチップ1000およびLDアレイ1200bからなる構造を、図9Aの下端側から見た側面図である。このように、LDDチップ1000およびLDアレイ1200bは、LDDチップ1000に対してLDアレイ1200bが積層された構造とされる。各カソード端子1201および各アノード端子1202は、例えばマイクロバンプによりLDDチップ1000に接続される。 FIG. 9C is a side view of the structure including the LDD chip 1000 and the LD array 1200b applicable to the fifth embodiment as viewed from the lower end side of FIG. 9A. As described above, the LDD chip 1000 and the LD array 1200b have a structure in which the LD array 1200b is laminated on the LDD chip 1000. Each cathode terminal 1201 and each anode terminal 1202 are connected to the LDD chip 1000 by, for example, micro bumps.
 次に、ドライバ10dに含まれる各要素のLDDチップ1000上への配置の例について、図10Aおよび図10Bを用いて説明する。 Next, an example of arranging each element included in the driver 10d on the LDD chip 1000 will be described with reference to FIGS. 10A and 10B.
 図10Aは、上述した図8Bと対応する図である。この図10Aの例では、ドライバ10eは、図8Bのトランジスタ102のサイズを、トランジスタ101のサイズより小さくしている。例えば、1個のトランジスタ102に対し、並列接続され、それぞれ独立してオン/オフの制御が可能な複数のトランジスタ1011、…、101Nによりトランジスタ101を構成する。図10Aの例では、N個のトランジスタ1011~101Nに対し、N/10個のトランジスタ102が用いられる。例えば、N=10個であれば、トランジスタ102の個数は、1個である。 FIG. 10A is a diagram corresponding to FIG. 8B described above. In the example of FIG. 10A, the driver 10e makes the size of the transistor 102 of FIG. 8B smaller than the size of the transistor 101. For example, a transistor 101 is composed of a plurality of transistors 101 1 , ..., 101 N , which are connected in parallel to one transistor 102 and can be independently turned on / off. In the example of FIG. 10A, N / 10 transistors 102 are used for N transistors 101 1 to 101 N. For example, if N = 10, the number of transistors 102 is one.
 これにより、トランジスタ102のオン抵抗RON-2を、トランジスタ1011~101N全体によるオン抵抗RON-1に対して高くすることができる。また、レプリカ経路における電流源104の電流IL+Ioffsetを、トランジスタ102のサイズ(個数)と、トランジスタ1011~101Nの全体としてのサイズ(個数)と、の比率に基づき小さくすることができる。 As a result, the on-resistance R ON-2 of the transistor 102 can be made higher than the on-resistance R ON-1 by the entire transistors 101 1 to 101 N. Further, the current I L + I offset current source 104 in the replica path, the size of the transistors 102 (number), the size (number) of the whole of the transistors 101 1 ~ 101 N, can be reduced based on the ratio of ..
 図10Aの例では、電流源104が供給する電流を、図8Bの例の電流源104の電流I(すなわちIL+Ioffset)に対し、1/10の電流(IL+Ioffset)/10としている。上述した式(2)によれば、トランジスタ102のオン抵抗RON-2を10倍とし、電流IL+Ioffsetを1/10としても、求められる電圧V2の値が変わらないことが分かる。このようにレプリカ経路の電流を減らすことができるため、LDDチップ1000における消費電力を削減することができる。なお、図10Aの例では、トランジスタ102のサイズを10倍とし、レプリカ経路の電流量を1/10としたが、同様の方法によりさらに消費電力を削減することもできる。 In the example of FIG. 10A, the current current source 104 is supplied, to the current I c of the current source 104 in the example of FIG. 8B (i.e. I L + I offset), 1 /10 of the current (I L + I offset) / 10 It is said. According to equation (2) described above, the on-resistance R ON-2 of the transistor 102 is 10 times, even 1/10 current I L + I offset, the value of the voltage V 2 obtained it can be seen that unchanged. Since the current of the replica path can be reduced in this way, the power consumption of the LDD chip 1000 can be reduced. In the example of FIG. 10A, the size of the transistor 102 is increased by 10 times and the amount of current in the replica path is set to 1/10, but the power consumption can be further reduced by the same method.
 なお、図10Aでは、トランジスタ102が1個の素子として示されているが、トランジスタ102も、並列接続され、それぞれ独立してオン/オフの制御が可能な複数のトランジスタを用いて構成してもよい。 Although the transistor 102 is shown as one element in FIG. 10A, the transistor 102 may also be configured by using a plurality of transistors that are connected in parallel and can be independently turned on / off. Good.
 図10Bは、第4の実施形態に適用可能な、ドライバ10eの各要素のLDDチップ1000上への配置の例を示す図である。図10Bにおける各領域1300、1301、1302および1303は、図10Aにおいて当該各領域1300、1301、1302および1303に対応させて点線枠で囲って示す各要素が配置される。 FIG. 10B is a diagram showing an example of arrangement of each element of the driver 10e on the LDD chip 1000, which is applicable to the fourth embodiment. In each region 1300, 1301, 1302, and 1303 in FIG. 10B, each element shown by a dotted line frame corresponding to each region 1300, 1301, 1302, and 1303 in FIG. 10A is arranged.
 具体的には、図10Bの例では、領域1300は、電流源1031、1032、…、103nを含む。図10Bの例では、この領域1300に対応する領域1310にLDアレイ1200bが配置される。図10Bにおいて、領域1300の長辺側に領域1301と領域1302とが配置されている。領域1301は、トランジスタ1011~101Nを含む。また、領域1302は、トランジスタ102を含む。図10Bの例では、領域1301は、トランジスタ1011~101Nを2つのグループに分けたそれぞれが含まれる2つの領域1301が、領域1302の両側に配置されている。このように、トランジスタ1011~101Nに対してトランジスタ102を近接させ、かつ、挟むように配置することで、トランジスタ1011~101Nの特性と、トランジスタ102の特性と、を近付けることができる。 Specifically, in the example of FIG. 10B, the region 1300 includes current sources 103 1 , 103 2 , ..., 103 n . In the example of FIG. 10B, the LD array 1200b is arranged in the region 1310 corresponding to this region 1300. In FIG. 10B, the area 1301 and the area 1302 are arranged on the long side side of the area 1300. Region 1301 includes transistors 101 1 to 101 N. Further, the region 1302 includes the transistor 102. In the example of FIG. 10B, in the region 1301, two regions 1301 including each of the transistors 101 1 to 101 N divided into two groups are arranged on both sides of the region 1302. Thus, to close the transistor 102 relative to transistors 101 1 ~ 101 N, and, by arranging so as to sandwich, can close the characteristics of the transistors 101 1 ~ 101 N, and characteristics of the transistor 102, the ..
 図10Bの例では、さらに、領域1300の短辺側に、電流源104を含む領域1303が配置されている。 In the example of FIG. 10B, the region 1303 including the current source 104 is further arranged on the short side side of the region 1300.
 なお、図10Bでは、LDアレイ1200bが配置される領域1310に対して電流源1031~103nが含まれる領域1300を配置しているが、この例に限定されない。例えば、領域1310に、電流源1031~103nが含まれる領域1300に加えてさらに他の要素を配置してもよい。また、電流源1031~103nが含まれる領域1300をLDDチップ1000の別の位置に配置してもよい。さらに、各電流源1031~103nなどを駆動する図示されない駆動回路をLDDチップ1000上に配置してもよい。 In FIG. 10B, the region 1300 including the current sources 103 1 to 103 n is arranged with respect to the region 1310 in which the LD array 1200b is arranged, but the present invention is not limited to this example. For example, in the region 1310, other elements may be arranged in addition to the region 1300 including the current sources 103 1 to 103 n. Further, the region 1300 including the current sources 103 1 to 103 n may be arranged at another position of the LDD chip 1000. Further, a drive circuit (not shown) for driving each of the current sources 1031 to 103n and the like may be arranged on the LDD chip 1000.
 [キャパシタを配置する場合の例]
 次に、LDDチップ1000に対してキャパシタをさらに配置したドライバ10fの例について、図11A、図11Bおよび図11Cを用いて説明する。図11Aは、上述した図10Aの構成に対して、各トランジスタ1011~101nのドレインに共通して接続されるキャパシタ140を追加した例を示す図である。
[Example when arranging capacitors]
Next, an example of the driver 10f in which the capacitor is further arranged with respect to the LDD chip 1000 will be described with reference to FIGS. 11A, 11B and 11C. FIG. 11A is a diagram showing an example in which a capacitor 140 commonly connected to the drain of each transistor 101 1 to 101 n is added to the configuration of FIG. 10A described above.
 図5を用いて説明したように、キャパシタ140は、各トランジスタ1011~101nを介して供給された電源の電圧VDDに応じた電荷を蓄積する。各電流源1031~103nによる、LDアレイ1200bに含まれる各レーザダイオード121~12nに対する電流の供給を、PWM駆動によりを行う場合に、このキャパシタ140に蓄積された電荷を用いて、各レーザダイオード121~12nに対する電流の供給を行う。 As described with reference to FIG. 5, the capacitor 140 accumulates an electric charge corresponding to the voltage V DD of the power supply supplied via each of the transistors 101 1 to 101 n. When the currents are supplied to the laser diodes 12 1 to 12 n included in the LD array 1200b by the current sources 103 1 to 103 n by PWM drive, the electric charge accumulated in the capacitor 140 is used. A current is supplied to each laser diode 12 1 to 12 n.
 すなわち、電源の電圧VDDは、LDDチップ1000の外部の基板からLDDチップ1000上のパッド1001に対して、ワイヤボンディングにより供給される。PWM駆動により急峻な電圧の変化が生じると、このワイヤボンディングに用いるワイヤのインダクタンスにより、大きな電圧降下が発生する。そのため、各レーザダイオード121~12nに対して、キャパシタ140に蓄積された電荷に基づき電流ILを供給することで、この電圧降下の影響を回避することができる。 That is, the voltage V DD of the power supply is supplied from the external substrate of the LDD chip 1000 to the pad 1001 on the LDD chip 1000 by wire bonding. When a steep voltage change occurs due to PWM drive, a large voltage drop occurs due to the inductance of the wire used for this wire bonding. Therefore, for each laser diode 12 1 ~ 12 n, by supplying the current I L on the basis of the charge stored in the capacitor 140, it is possible to avoid the influence of this voltage drop.
 図11Bは、キャパシタ140を含む領域1304をLDDチップ1000上に配置した例を示す図である。キャパシタ140は、例えば各トランジスタ1011~101n、トランジスタ102などと比較して、比較的大きなサイズを有する。そこで、図11Bの例では、キャパシタ140を含む領域1304を、LDアレイ1200bが配置される領域1310に対応する位置に配置している。このように、キャパシタ140を含む領域1304は、比較的サイズが大きいため、このような配置とすることで、LDDチップ1000におけるレイアウトの設計が容易となる。 FIG. 11B is a diagram showing an example in which the region 1304 including the capacitor 140 is arranged on the LDD chip 1000. The capacitor 140 has a relatively large size as compared with, for example, transistors 101 1 to 101 n, transistors 102, and the like. Therefore, in the example of FIG. 11B, the region 1304 including the capacitor 140 is arranged at a position corresponding to the region 1310 in which the LD array 1200b is arranged. As described above, since the region 1304 including the capacitor 140 has a relatively large size, such an arrangement facilitates the layout design of the LDD chip 1000.
 また、図11Bの例では、各電流源1031~103nを含む領域1300を2つに分けて、領域1304の両側の長辺の外側に配置している。 Further, in the example of FIG. 11B, the region 1300 including each current source 103 1 to 103 n is divided into two and arranged outside the long sides on both sides of the region 1304.
 なお、図11Bの例では、キャパシタ140を含む領域1304の全体が、LDアレイ1200bが配置される領域1310に含まれるように示しているが、これはこの例に限定されない。例えば、領域1304は、その一部が領域1310に含まれるように配置してもよい。また、領域1304のサイズが領域1310に対して小さい場合、領域1304と共に、他の要素を領域1310に対応する位置に配置してもよい。 In the example of FIG. 11B, the entire region 1304 including the capacitor 140 is shown to be included in the region 1310 in which the LD array 1200b is arranged, but this is not limited to this example. For example, the area 1304 may be arranged so that a part thereof is included in the area 1310. When the size of the area 1304 is smaller than that of the area 1310, other elements may be arranged together with the area 1304 at a position corresponding to the area 1310.
 図11Cは、図11Bに示したキャパシタ140を含む領域1304をLDDチップ1000上に配置した例において、各トランジスタ1011~101nを含む領域1301を複数の領域1301に分割すると共に、トランジスタ102を含む領域も、複数の領域1302に分割した例を示す図である。なお、この場合、トランジスタ102も、各トランジスタ1011~101nと同様に、並列接続され、それぞれ独立してオン/オフの制御が可能な複数のトランジスタを用いて構成されているものとする。 FIG. 11C shows an example in which the region 1304 including the capacitor 140 shown in FIG. 11B is arranged on the LDD chip 1000, and the region 1301 including each transistor 101 1 to 101 n is divided into a plurality of regions 1301 and the transistor 102 is divided into a plurality of regions 1301. It is a figure which shows the example which included the region is also divided into a plurality of regions 1302. In this case, it is assumed that the transistor 102 is also configured by using a plurality of transistors that are connected in parallel and can be independently turned on / off, like the transistors 101 1 to 101 n.
 ここで、各トランジスタ1011~101nの全体のサイズや、複数のトランジスタにより構成されるトランジスタ102のサイズが比較的大きな場合、各トランジスタに対して、製造時のプロセスなどに起因するばらつきが出る可能性がある。図11Cの例では、各トランジスタ1011~101nが含まれる領域1301と、トランジスタ102を構成する複数のトランジスタが含まれる領域1302とをより細かい単位で分割し、さらに、分割された各領域1301と、各領域1302と、を整列させ、交互に配置している。これにより、各トランジスタ1011~101n、および、トランジスタ102を構成する複数のトランジスタのばらつきを抑えることが可能となる。 Here, when the overall size of each transistor 101 1 to 101 n or the size of the transistor 102 composed of a plurality of transistors is relatively large, variations due to a manufacturing process or the like occur for each transistor. there is a possibility. In the example of FIG. 11C, the region 1301 including each transistor 101 1 to 101 n and the region 1302 including a plurality of transistors constituting the transistor 102 are divided into finer units, and each divided region 1301 is further divided. And each region 1302 are aligned and arranged alternately. As a result, it is possible to suppress variations in the transistors 101 1 to 101 n and the plurality of transistors constituting the transistor 102.
 なお、上述した図10Aおよび図11Aは、上述の図6と対応する構成が適用され、本線とレプリカ経路とにおいてそれぞれ直接的に電圧V1およびV2を取り出すようにしているが、これはこの例に限定されない。すなわち、図10Aおよび図11Aの構成に対して、図3~図5を用いて説明した構成を適用することができる。 In addition, in FIG. 10A and FIG. 11A described above, the configuration corresponding to FIG. 6 described above is applied, and the voltages V 1 and V 2 are taken out directly in the main line and the replica path, respectively. Not limited to the example. That is, the configurations described with reference to FIGS. 3 to 5 can be applied to the configurations of FIGS. 10A and 11A.
 さらに、LDアレイ1200bの代わりに、図8Aで説明した、各レーザダイオード121~12nが独立して接続されるLDアレイ1200aを用いてもよい。 Further, instead of the LD array 1200b, the LD array 1200a to which the laser diodes 12 1 to 12 n described in FIG. 8A are independently connected may be used.
(6.第6の実施形態)
 次に、第6の実施形態について説明する。第6の実施形態は、上述した各実施形態および各実施形態の各変形例による光源装置1を、レーザ光を用いて測距を行う測距装置に適用した場合の例である。
(6. Sixth Embodiment)
Next, the sixth embodiment will be described. The sixth embodiment is an example in which the light source device 1 according to each of the above-described embodiments and modifications of each embodiment is applied to a distance measuring device that performs distance measuring using a laser beam.
 図12は、第6の実施形態に係る測距装置の一例の構成を示すブロック図である。なお、以下では、上述した各実施形態および各実施形態の各変形例によるドライバ10a~10d、ドライバ10d’、および、ドライバ10e(a)~10e(c)をドライバ10で代表させて説明を行う。同様に、レーザダイオード12、レーザダイオード121~12n、レーザダイオード121~12Nなどを、レーザダイオード12で代表させて説明を行う。より好ましくは、図11Bまたは図11Cを用いて説明した構成を適用することが考えられる。 FIG. 12 is a block diagram showing a configuration of an example of the distance measuring device according to the sixth embodiment. In the following, the drivers 10a to 10d, the drivers 10d', and the drivers 10e (a) to 10e (c) according to the above-described embodiments and modifications of the embodiments will be described as represented by the driver 10. .. Similarly, the laser diode 12, the laser diode 12 1 to 12 n , the laser diode 12 1 to 12 N, and the like will be described by being represented by the laser diode 12. More preferably, it is conceivable to apply the configuration described with reference to FIG. 11B or FIG. 11C.
 図12において、第6の実施形態に係る、電子機器としての測距装置70は、ドライバ10と、レーザダイオード12と、コントローラ11と、測距部51と、受光部302と、を含む。ドライバ10は、コントローラ11から供給される制御信号に応じて、レーザダイオード12をパルス状に発光させるように駆動する駆動信号を生成し、生成した駆動信号に基づきレーザダイオード12を発光させる。ドライバ10は、レーザダイオード12を発光させたタイミングを示す信号を、測距部51に渡す。 In FIG. 12, the distance measuring device 70 as an electronic device according to the sixth embodiment includes a driver 10, a laser diode 12, a controller 11, a distance measuring unit 51, and a light receiving unit 302. The driver 10 generates a drive signal that drives the laser diode 12 to emit light in a pulsed manner in response to the control signal supplied from the controller 11, and causes the laser diode 12 to emit light based on the generated drive signal. The driver 10 passes a signal indicating the timing at which the laser diode 12 is made to emit light to the ranging unit 51.
 コントローラ11は、ドライバ10から供給される検出信号42に基づき、レーザダイオード12に対して過電流が供給されているか否かを判定する。コントローラ11は、レーザダイオード12に対して過電流が供給されていると判定した場合、ドライバ10に対してレーザダイオード12の発光を停止させるための制御信号43を出力すると共に、過電流の供給を示すエラー信号を出力する。コントローラ11は、エラー信号を、例えば測距装置70の外部に出力することができる。 The controller 11 determines whether or not an overcurrent is supplied to the laser diode 12 based on the detection signal 42 supplied from the driver 10. When the controller 11 determines that an overcurrent is being supplied to the laser diode 12, the controller 11 outputs a control signal 43 for stopping the light emission of the laser diode 12 to the driver 10 and supplies the overcurrent. The indicated error signal is output. The controller 11 can output an error signal to, for example, the outside of the distance measuring device 70.
 受光部302は、受光したレーザ光に基づく光電変換により受光信号を出力する受光素子を含む。受光素子としては、例えば単一フォトンアバランシェダイオードを適用することができる。単一フォトンアバランシェダイオードは、SPAD(Single Photon Avalanche Diode)とも呼ばれ、1フォトンの入射に応じて発生した電子がアバランシェ増倍を生じ、大電流が流れる特性を有する。SPADのこの特性を利用することで、1フォトンの入射を高感度で検知することができる。受光部302適用可能な受光素子は、SPADに限らず、アバランシェフォトダイオード(APD)や、通常のフォトダイオードを適用することも可能である。 The light receiving unit 302 includes a light receiving element that outputs a light receiving signal by photoelectric conversion based on the received laser light. As the light receiving element, for example, a single photon avalanche diode can be applied. The single photon avalanche diode is also called SPAD (Single Photon Avalanche Diode), and has a characteristic that electrons generated in response to the incident of one photon cause avalanche multiplication and a large current flows. By utilizing this characteristic of SPAD, the incident of one photon can be detected with high sensitivity. The light receiving element 302 to which the light receiving unit 302 can be applied is not limited to SPAD, but an avalanche photodiode (APD) or an ordinary photodiode can also be applied.
 測距部51は、レーザダイオード12からレーザ光が射出された時間t0と、受光部302に光が受光された時間t1とに基づき、対象物61との間の距離Dを算出する。 The distance measuring unit 51 calculates the distance D between the object 61 and the object 61 based on the time t 0 when the laser beam is emitted from the laser diode 12 and the time t 1 when the light is received by the light receiving unit 302.
 上述の構成において、レーザダイオード12から例えば時間t0のタイミングで射出されたレーザ光60は、例えば対象物61により反射され、反射光62として、時間t1のタイミングで受光部302に受光される。測距部51は、受光部302で反射光62が受光された時間t1と、レーザダイオード12にてレーザ光が射出された時間t0との差分に基づき、対象物61までの距離Dを求める。距離Dは、定数cを光速度(2.9979×108[m/sec])として次式(3)により計算される。
D=(c/2)×(t1-t0)  …(3)
In the above configuration, the laser beam 60 emitted from the laser diode 12 at the timing of time t 0 is reflected by the object 61, for example, and is received by the light receiving unit 302 at the timing of time t 1 as the reflected light 62. .. The ranging unit 51 determines the distance D to the object 61 based on the difference between the time t 1 when the reflected light 62 is received by the light receiving unit 302 and the time t 0 when the laser light is emitted by the laser diode 12. Ask. The distance D is calculated by the following equation (3) the constant c as light velocity (2.9979 × 10 8 [m / sec]).
D = (c / 2) × (t 1 −t 0 )… (3)
 測距部51は、上述の処理を、複数回繰り返して実行する。受光部302が複数の受光素子を含み、各受光素子に反射光62が受光された各受光タイミングに基づき距離Dをそれぞれ算出してもよい。測距部51は、発光タイミングの時間t0から受光部302に光が受光された受光タイミングまでの時間tm(受光時間tmと呼ぶ)を階級(ビン(bins))に基づき分類し、ヒストグラムを生成する。 The ranging unit 51 repeats the above-mentioned processing a plurality of times. The distance D may be calculated based on each light receiving timing in which the light receiving unit 302 includes a plurality of light receiving elements and the reflected light 62 is received by each light receiving element. The ranging unit 51 classifies the time t m (called the light receiving time t m ) from the light emitting timing time t 0 to the light receiving timing when the light is received by the light receiving unit 302 based on the class (bins). Generate a histogram.
 なお、受光部302が受光時間tmに受光した光は、レーザダイオード12が発光した光が被測定物により反射された反射光62に限られない。例えば、受光部302の周囲の環境光も、受光部302に受光される。 The light received by the light receiving unit 302 during the light receiving time t m is not limited to the reflected light 62 in which the light emitted by the laser diode 12 is reflected by the object to be measured. For example, the ambient light around the light receiving unit 302 is also received by the light receiving unit 302.
 図13は、第6の実施形態に適用可能な、受光部302が受光した時刻に基づく一例のヒストグラムを示す図である。図13において、横軸はビン、縦軸は、ビン毎の頻度を示す。ビンは、受光時間tmを所定の単位時間d毎に分類したものである。具体的には、ビン#0が0≦tm<d、ビン#1がd≦tm<2×d、ビン#2が2×d≦tm<3×d、…、ビン#(N-2)が(N-2)×d≦tm<(N-1)×dとなる。受光部302の露光時間を時間tepとした場合、tep=N×dである。 FIG. 13 is a diagram showing an example histogram based on the time when the light receiving unit 302 receives light, which is applicable to the sixth embodiment. In FIG. 13, the horizontal axis indicates the bin and the vertical axis indicates the frequency for each bin. The bins are obtained by classifying the light receiving time t m for each predetermined unit time d. Specifically, bin # 0 is 0 ≦ t m <d, bin # 1 is d ≦ t m <2 × d, bin # 2 is 2 × d ≦ t m <3 × d, ..., Bin # (N). -2) is (N-2) × d ≦ t m <(N-1) × d. When the exposure time of the light receiving unit 302 is time t ep , t ep = N × d.
 測距部51は、受光時間tmを取得した回数をビンに基づき計数してビン毎の頻度310を求め、ヒストグラムを生成する。ここで、受光部302は、レーザダイオード12から射出された光が反射された反射光以外の光も受光する。このような、対象となる反射光以外の光の例として、上述した環境光がある。ヒストグラムにおいて範囲311で示される部分は、環境光による環境光成分を含む。環境光は、受光部302にランダムに入射される光であって、対象となる反射光に対するノイズとなる。 The ranging unit 51 counts the number of times the light receiving time t m is acquired based on the bins to obtain the frequency 310 for each bin, and generates a histogram. Here, the light receiving unit 302 also receives light other than the reflected light reflected from the light emitted from the laser diode 12. As an example of such light other than the target reflected light, there is the above-mentioned ambient light. The portion indicated by the range 311 in the histogram includes the ambient light component due to the ambient light. The ambient light is light that is randomly incident on the light receiving unit 302 and becomes noise with respect to the reflected light of interest.
 一方、対象となる反射光は、特定の距離に応じて受光される光であって、ヒストグラムにおいてアクティブ光成分312として現れる。このアクティブ光成分312内のピークの頻度に対応するビンが、被測定物303の距離Dに対応するビンとなる。測距部51は、そのビンの代表時間(例えばビンの中央の時間)を上述した時間t1として取得することで、上述した式(3)に従い、被測定物303までの距離Dを算出することができる。このように、複数の受光結果を用いることで、ランダムなノイズに対して適切な測距を実行可能となる。 On the other hand, the target reflected light is light received according to a specific distance, and appears as an active light component 312 in the histogram. The bin corresponding to the frequency of the peak in the active light component 312 becomes the bin corresponding to the distance D of the object to be measured 303. The distance measuring unit 51 acquires the representative time of the bottle (for example, the time in the center of the bottle) as the time t 1 described above, and calculates the distance D to the object to be measured 303 according to the above formula (3). be able to. In this way, by using a plurality of light receiving results, it is possible to perform appropriate distance measurement for random noise.
 このように、本開示に係るドライバ10を、直接ToF(Time-of-Flight)方式により測距を行う測距装置70に適用することで、レーザダイオード12に対して過電流が供給されたか否かをより高精度に検出できる。この検出結果に基づきレーザダイオード12の発光を制御することで、例えば過電流により想定より強力なレーザ光がレーザダイオード12から射出された場合の、眼に対する影響を抑制することができる。また、過電流による、レーザダイオード12の素子自身の破壊を防ぐことができ、測距装置70の信頼性を向上できる。 As described above, by applying the driver 10 according to the present disclosure to the distance measuring device 70 that directly measures the distance by the ToF (Time-of-Flight) method, whether or not an overcurrent is supplied to the laser diode 12. Can be detected with higher accuracy. By controlling the light emission of the laser diode 12 based on this detection result, it is possible to suppress the influence on the eyes when, for example, a laser diode stronger than expected due to an overcurrent is emitted from the laser diode 12. Further, it is possible to prevent the element itself of the laser diode 12 from being destroyed due to an overcurrent, and it is possible to improve the reliability of the distance measuring device 70.
(7.まとめ)
 光源装置1は、発光素子と、駆動部20と、基準レベル生成部と、比較部110と、レベルシフト部130とを有する。発光素子は、所定の駆動電流が供給されることで所定の光量で発光する。駆動部20は、駆動電流を発光素子に供給する。基準レベル生成部は、駆動電流についての過電流を検出するための基準となる基準レベルを生成する。比較部110は、駆動電流を基準レベルと比較し、その比較結果を出力信号として出力する。レベルシフト部130は、比較部110の出力信号のレベルをシフトして出力する。レベルシフト部130の出力に基づいて、駆動電流の過電流を検出する。
(7. Summary)
The light source device 1 includes a light emitting element, a drive unit 20, a reference level generation unit, a comparison unit 110, and a level shift unit 130. The light emitting element emits light with a predetermined amount of light when a predetermined drive current is supplied. The drive unit 20 supplies a drive current to the light emitting element. The reference level generator generates a reference level as a reference for detecting an overcurrent with respect to the drive current. The comparison unit 110 compares the drive current with the reference level and outputs the comparison result as an output signal. The level shift unit 130 shifts the level of the output signal of the comparison unit 110 and outputs the signal. The overcurrent of the drive current is detected based on the output of the level shift unit 130.
 これにより、光源装置1は、比較部110による比較結果についてレベルシフトを行うので、レベルシフト部を複数設けることによるばらつきを排除することができ、比較部110による比較前にレベルシフトを行う場合に比べて過電流検出の精度を高めることができる。 As a result, the light source device 1 performs a level shift on the comparison result by the comparison unit 110, so that it is possible to eliminate variations due to the provision of a plurality of level shift units, and when the level shift is performed before the comparison by the comparison unit 110. Compared with this, the accuracy of overcurrent detection can be improved.
 光源装置1の駆動部20は第1の抵抗体を含む。第1の抵抗体は、所定の電位に接続され、かつ、発光素子に直列に接続される。基準レベル生成部は、駆動部20を模したレプリカ部20Rである。レプリカ部20Rは、第2の抵抗体を含む。第2の抵抗体は、所定の電位に接続される。さらに、光源装置1は、第1の電流源を含む。第1の電流源は、第2の抵抗体に直列に接続される、駆動電流に過電流分の電流を加えた電流を供給する。比較部110は、駆動電流を、レプリカ部20Rによって生成される基準レベルと比較する。 The drive unit 20 of the light source device 1 includes a first resistor. The first resistor is connected to a predetermined potential and is connected in series with the light emitting element. The reference level generation unit is a replica unit 20R that imitates the drive unit 20. The replica unit 20R includes a second resistor. The second resistor is connected to a predetermined potential. Further, the light source device 1 includes a first current source. The first current source supplies a current connected in series with the second resistor, which is the drive current plus the current of the overcurrent. The comparison unit 110 compares the drive current with the reference level generated by the replica unit 20R.
 これにより、光源装置1は、過電流を適切に検出することができる。 Thereby, the light source device 1 can appropriately detect the overcurrent.
 光源装置1は、駆動電流の所定時間内における平均値を出力する平均化回路をさらに有し、比較部110は、平均化回路から出力される平均値を基準レベルと比較する。 The light source device 1 further has an averaging circuit that outputs an average value of the drive current within a predetermined time, and the comparison unit 110 compares the average value output from the averaging circuit with the reference level.
 これにより、光源装置1は、発光素子に流れる駆動電流の平均値に基づいて過電流を検出することができる。 Thereby, the light source device 1 can detect the overcurrent based on the average value of the drive currents flowing through the light emitting element.
 光源装置1のレベルシフト部130aは、抵抗131および132による分圧抵抗と、分圧抵抗に所定電位を与えるトランジスタ133とを有していてもよい。分圧抵抗は、所定電位と基準電圧との間の電圧を分圧する。トランジスタ133は、比較部110の出力信号に基づいてオンまたはオフとなる。レベルシフト部130は、分圧抵抗によって分圧された電圧に対応する電圧をレベルシフト後の電圧として出力する。 The level shift unit 130a of the light source device 1 may have a voltage dividing resistor by the resistors 131 and 132 and a transistor 133 that gives a predetermined potential to the voltage dividing resistor. The voltage dividing resistor divides the voltage between the predetermined potential and the reference voltage. The transistor 133 is turned on or off based on the output signal of the comparison unit 110. The level shift unit 130 outputs a voltage corresponding to the voltage divided by the voltage dividing resistor as the voltage after the level shift.
 これにより、光源装置1は、分圧抵抗によってレベルシフトを行うことができる。 As a result, the light source device 1 can perform level shift by the voltage dividing resistor.
 光源装置1のレベルシフト部130bは、フリップフロップ部FFと、出力部135とを有していてもよい。フリップフロップ部FFは、第1電源電圧VDDHおよびVSSHによって動作し、比較部110の出力信号に基づいて第1状態と第2状態とのいずれか一方の状態に設定される。出力部135は、第1電源電圧VDDHおよびVSSHとは異なる第2電源電圧VDDLおよびVSSLによって動作し、フリップフロップ部FFの状態に対応する電圧を出力する。レベルシフト部130は、出力部135の出力をレベルシフト後の電圧として出力する. The level shift unit 130b of the light source device 1 may have a flip-flop unit FF and an output unit 135. The flip-flop unit FF operates by the first power supply voltage V DDH and V SSH , and is set to either the first state or the second state based on the output signal of the comparison unit 110. The output unit 135 operates by a second power supply voltage V DDL and V SSL different from the first power supply voltage V DDH and V SSH, and outputs a voltage corresponding to the state of the flip flop unit FF. The level shift unit 130 outputs the output of the output unit 135 as the voltage after the level shift.
 これにより、光源装置1は、フリップフロップ部FFの第1状態または第2状態に基づいてレベルシフトを行うことができる。 As a result, the light source device 1 can perform level shift based on the first state or the second state of the flip-flop unit FF.
 光源装置1の発光素子は、それぞれ独立して発光する複数の素子が配列される素子アレイ1200aとして構成されてもよい。第1の電流源は、素子アレイ1200aに含まれる複数の素子のうち発光させる素子の数に応じた所定の駆動電流を供給する。 The light emitting element of the light source device 1 may be configured as an element array 1200a in which a plurality of elements that emit light independently are arranged. The first current source supplies a predetermined drive current according to the number of light emitting elements among the plurality of elements included in the element array 1200a.
 これにより、光源装置1は、素子アレイの、それぞれ独立して発光する複数の素子について過電流を検出することができる。 As a result, the light source device 1 can detect an overcurrent for a plurality of elements of the element array that emit light independently of each other.
 光源装置1は、複数の素子それぞれを駆動する複数の駆動電流を複数の素子それぞれに独立して供給する複数の第2の電流源をさらに備えていてもよい。第1の抵抗体と、第2の抵抗体と、第1の電流源と、複数の第2の電流源と、が配置される第1の半導体チップと、素子アレイを備える第2の半導体チップとを含み、第2の半導体チップは、第1の半導体チップに積層されてもよい。 The light source device 1 may further include a plurality of second current sources that independently supply a plurality of drive currents for driving the plurality of elements to each of the plurality of elements. A first semiconductor chip in which a first resistor, a second resistor, a first current source, and a plurality of second current sources are arranged, and a second semiconductor chip including an element array. The second semiconductor chip may be laminated on the first semiconductor chip.
 光源装置1は、複数の素子それぞれを駆動する複数の駆動電流を該複数の素子それぞれに独立して供給する複数の第2の電流源をさらに備えていてもよい。第1の抵抗体と、第2の抵抗体と、第1の電流源と、前記複数の第2の電流源と、が配置される第1の半導体チップと、素子アレイを備える第2の半導体チップとを含み、第2の半導体チップは、第1の半導体チップに積層されてもよい。第2の半導体チップに配置される素子アレイに含まれる複数の素子それぞれと、第1の半導体チップに配置される複数の第2の電流源それぞれと、が一対一に接続されてもよい。 The light source device 1 may further include a plurality of second current sources that independently supply a plurality of drive currents for driving the plurality of elements to each of the plurality of elements. A second semiconductor including a first semiconductor chip in which a first resistor, a second resistor, a first current source, and the plurality of second current sources are arranged, and an element array. The second semiconductor chip, including the chip, may be laminated on the first semiconductor chip. Each of the plurality of elements included in the element array arranged on the second semiconductor chip and each of the plurality of second current sources arranged on the first semiconductor chip may be connected one-to-one.
 これにより、光源装置1は、駆動回路により、各電流源のオン/オフをそれぞれ制御することで、電流源に一対一に対応する各素子の発光を、それぞれ独立して制御できる。 As a result, the light source device 1 can independently control the light emission of each element corresponding to the current source on a one-to-one basis by controlling the on / off of each current source by the drive circuit.
 光源装置1の複数の第2の電流源が第1の半導体チップ上の所定領域に配置され、素子アレイが第1の半導体チップ上の所定領域に対応する領域に積層して配置されてもよい。 A plurality of second current sources of the light source device 1 may be arranged in a predetermined region on the first semiconductor chip, and the element array may be stacked and arranged in a region corresponding to the predetermined region on the first semiconductor chip. ..
 これにより、光源装置1は、素子アレイが第1の半導体チップ上に積層されている場合において、過電流を検出することができる。 Thereby, the light source device 1 can detect an overcurrent when the element array is laminated on the first semiconductor chip.
 光源装置1の第1の抵抗体は、並列接続される複数の抵抗体を含み、複数の抵抗体が複数のブロックに分割されて第1の半導体チップに配置されていてもよい。 The first resistor of the light source device 1 may include a plurality of resistors connected in parallel, and the plurality of resistors may be divided into a plurality of blocks and arranged on the first semiconductor chip.
 これにより、光源装置1は、発光素子を発光させるための複数の抵抗体が並列接続される場合でも、複数の抵抗体を半導体チップ上に配置させることができる。 As a result, the light source device 1 can arrange the plurality of resistors on the semiconductor chip even when a plurality of resistors for causing the light emitting element to emit light are connected in parallel.
 光源装置1の第2の抵抗体は、並列接続される複数の抵抗体を含み、複数の抵抗体が複数のブロックに分割されて第1の半導体チップに配置されていてもよい。また、第1の抵抗体に含まれる複数の抵抗体が分割された複数のブロックそれぞれと、第2の抵抗体に含まれる複数の抵抗体が分割された複数のブロックのそれぞれと、が交互に、整列して第1の半導体チップに配置されていてもよい。 The second resistor of the light source device 1 may include a plurality of resistors connected in parallel, and the plurality of resistors may be divided into a plurality of blocks and arranged on the first semiconductor chip. Further, each of the plurality of blocks in which the plurality of resistors included in the first resistor is divided and each of the plurality of blocks in which the plurality of resistors included in the second resistor are divided alternate with each other. , They may be aligned and arranged on the first semiconductor chip.
 これにより、光源装置1は、発光素子を発光させるための複数の抵抗体が並列接続される場合でも、複数の抵抗体を半導体チップ上に配置させることができる。 As a result, the light source device 1 can arrange the plurality of resistors on the semiconductor chip even when a plurality of resistors for causing the light emitting element to emit light are connected in parallel.
 光源装置1は、第1の半導体チップ上の所定領域に配置され、第1の抵抗体に接続されるキャパシタをさらに備えていてもよい。素子アレイは、第1の半導体チップ上の所定領域に積層して配置されていてもよい。 The light source device 1 may further include a capacitor arranged in a predetermined region on the first semiconductor chip and connected to the first resistor. The element arrays may be stacked and arranged in a predetermined region on the first semiconductor chip.
 これにより、容量の大きなキャパシタを必要とする場合でも実装面積が増大することがない。 As a result, the mounting area does not increase even when a capacitor with a large capacity is required.
 光源装置1の第1の抵抗体および第2の抵抗体は、それぞれ、オン状態におけるMOS型トランジスタのソース-ドレイン間の抵抗であってもよい。 The first resistor and the second resistor of the light source device 1 may be the resistance between the source and the drain of the MOS transistor in the ON state, respectively.
 これにより、半導体チップ上に光源装置1を形成することができる。 Thereby, the light source device 1 can be formed on the semiconductor chip.
 光源装置1の平均化回路は、駆動電流の高域成分を除去する低域通過フィルタ105を含み、低域通過フィルタ105によって高域成分が除去された駆動電流を平均値として出力してもよい。 The averaging circuit of the light source device 1 may include a low-pass filter 105 for removing the high-frequency component of the drive current, and output the drive current from which the high-pass component has been removed by the low-pass filter 105 as an average value. ..
 これにより、光源装置1は、発光素子に流れる駆動電流の平均値に基づいて過電流を検出することができる。 Thereby, the light source device 1 can detect the overcurrent based on the average value of the drive currents flowing through the light emitting element.
 なお、本明細書に記載された効果はあくまで例示であって限定されるものでは無く、また他の効果があってもよい。また、本明細書に記載された構成は適宜組み合わせることが可能である。 Note that the effects described in this specification are merely examples and are not limited, and other effects may be obtained. In addition, the configurations described in the present specification can be combined as appropriate.
 なお、本技術は以下のような構成も取ることができる。
(1)
 所定の駆動電流が供給されることで所定の光量で発光する発光素子と、
 前記駆動電流を前記発光素子に供給する駆動部と、
 前記駆動電流についての過電流を検出するための基準となる基準レベルを生成する基準レベル生成部と、
 前記駆動電流を前記基準レベルと比較し、その比較結果を出力信号として出力する比較部と、
 前記比較部の出力信号のレベルをシフトして出力するレベルシフト部と、
を有し、
 前記レベルシフト部の出力に基づいて、前記駆動電流の過電流を検出する光源装置。
(2)
 前記駆動部は、
 所定の電位に接続され、かつ、前記発光素子に直列に接続される第1の抵抗体を含み、
 前記基準レベル生成部は、
 前記所定の電位に接続される第2の抵抗体を含み、前記駆動部を模したレプリカ部であり、
 さらに、
 前記第2の抵抗体に直列に接続される、前記駆動電流に過電流分の電流を加えた電流を供給する第1の電流源を含んでおり、
 前記比較部は、前記駆動電流を、前記レプリカ部によって生成される基準レベルと比較する、前記(1)に記載の光源装置。
(3)
 前記駆動電流の所定時間内における平均値を出力する平均化回路をさらに有し、
 前記比較部は、前記平均化回路から出力される前記平均値を前記基準レベルと比較する、前記(1)または(2)に記載の光源装置。
(4)
 前記レベルシフト部は、
 所定電位と基準電圧との間の電圧を分圧する分圧抵抗と、
 前記比較部の出力信号に基づいてオンまたはオフとなり、オンのときに前記分圧抵抗に前記所定電位を与えるトランジスタと、
 を有し、
 前記分圧抵抗によって分圧された電圧に対応する電圧をレベルシフト後の電圧として出力する、前記(1)から(3)のいずれか1つに記載の光源装置。
(5)
 前記レベルシフト部は、
 第1電源電圧によって動作し、前記比較部の出力信号に基づいて第1状態と第2状態とのいずれか一方の状態に設定されるフリップフロップ部と、
 前記第1電源電圧とは異なる第2電源電圧によって動作し、前記フリップフロップ部の状態に対応する電圧を出力する出力部とを有し、
 前記出力部の出力をレベルシフト後の電圧として出力する、前記(1)から(3)のいずれか1つに記載の光源装置。
(6)
 前記発光素子は、
 それぞれ独立して発光する複数の素子が配列される素子アレイとして構成され、
 前記第1の電流源は、
 前記素子アレイに含まれる前記複数の素子のうち発光させる素子の数に応じた前記所定の駆動電流を供給する前記(2)に記載の光源装置。
(7)
 前記複数の素子それぞれを駆動する複数の駆動電流を該複数の素子それぞれに独立して供給する複数の第2の電流源をさらに備え、
 前記第1の抵抗体と、前記第2の抵抗体と、前記第1の電流源と、前記複数の第2の電流源と、が配置される第1の半導体チップと、
 前記素子アレイを備える、前記第1の半導体チップに積層される第2の半導体チップと、
を含み、
 前記第2の半導体チップに配置される前記素子アレイに含まれる前記複数の素子それぞれと、前記第1の半導体チップに配置される前記複数の第2の電流源それぞれと、が一対一に接続される、前記(6)に記載の光源装置。
(8)
 前記複数の第2の電流源は、
 前記第1の半導体チップ上の所定領域に配置され、
 前記素子アレイは、
 前記第1の半導体チップ上の前記所定領域に対応する領域に積層して配置される、前記(7)に記載の光源装置。
(9)
 前記第1の抵抗体は、
 並列接続される複数の抵抗体を含み、該複数の抵抗体が複数のブロックに分割されて前記第1の半導体チップに配置される、前記(7)に記載の光源装置。
(10)
 前記第1の抵抗体は、整列して配置される2のブロックに分割され、該2のブロックの間に前記第2の抵抗体が配置される、前記(9)に記載の光源装置。
(11)
 前記第2の抵抗体は、
 並列接続される複数の抵抗体を含み、該複数の抵抗体が複数のブロックに分割されて前記第1の半導体チップに配置され、
 前記第1の抵抗体に含まれる前記複数の抵抗体が分割された複数のブロックそれぞれと、前記第2の抵抗体に含まれる複数の抵抗体が分割された前記複数のブロックのそれぞれと、が交互に、整列して前記第1の半導体チップに配置される、前記(10)に記載の光源装置。
(12)
 前記第1の半導体チップ上の所定領域に配置され、前記第1の抵抗体に接続されるキャパシタをさらに備え、
 前記素子アレイは、
 前記第1の半導体チップ上の前記所定領域に積層して配置される、前記(7)に記載の光源装置。
(13)
 前記第1の抵抗体および前記第2の抵抗体は、
 それぞれ、オン状態におけるMOS(Metal Oxide Semiconductor)型トランジスタのソース-ドレイン間の抵抗である、前記(7)に記載の光源装置。
(14)
 前記平均化回路は、
 前記駆動電流の高域成分を除去する低域通過フィルタを含み、前記低域通過フィルタによって高域成分が除去された駆動電流を前記平均値として出力する、前記(3)に記載の光源装置。
The present technology can also have the following configurations.
(1)
A light emitting element that emits light with a predetermined amount of light when a predetermined drive current is supplied, and
A drive unit that supplies the drive current to the light emitting element,
A reference level generator that generates a reference level that serves as a reference for detecting an overcurrent with respect to the drive current, and a reference level generator.
A comparison unit that compares the drive current with the reference level and outputs the comparison result as an output signal.
A level shift unit that shifts the level of the output signal of the comparison unit and outputs it,
Have,
A light source device that detects an overcurrent of the drive current based on the output of the level shift unit.
(2)
The drive unit
It comprises a first resistor connected to a predetermined potential and connected in series with the light emitting element.
The reference level generator
It is a replica unit that includes a second resistor connected to the predetermined potential and imitates the drive unit.
further,
It includes a first current source connected in series with the second resistor to supply a current obtained by adding a current corresponding to an overcurrent to the drive current.
The light source device according to (1) above, wherein the comparison unit compares the drive current with a reference level generated by the replica unit.
(3)
It further has an averaging circuit that outputs an average value of the drive current within a predetermined time.
The light source device according to (1) or (2), wherein the comparison unit compares the average value output from the averaging circuit with the reference level.
(4)
The level shift unit is
A voltage dividing resistor that divides the voltage between the predetermined potential and the reference voltage,
A transistor that turns on or off based on the output signal of the comparison unit and gives the predetermined potential to the voltage dividing resistor when it is turned on.
Have,
The light source device according to any one of (1) to (3) above, which outputs a voltage corresponding to the voltage divided by the voltage dividing resistor as a voltage after level shifting.
(5)
The level shift unit is
A flip-flop unit that operates by the first power supply voltage and is set to either the first state or the second state based on the output signal of the comparison unit.
It operates with a second power supply voltage different from the first power supply voltage, and has an output unit that outputs a voltage corresponding to the state of the flip-flop unit.
The light source device according to any one of (1) to (3) above, which outputs the output of the output unit as a voltage after level shifting.
(6)
The light emitting element is
It is configured as an element array in which a plurality of elements that emit light independently are arranged.
The first current source is
The light source device according to (2), wherein the predetermined drive current is supplied according to the number of light emitting elements among the plurality of elements included in the element array.
(7)
A plurality of second current sources for independently supplying a plurality of drive currents for driving each of the plurality of elements to each of the plurality of elements are further provided.
A first semiconductor chip in which the first resistor, the second resistor, the first current source, and the plurality of second current sources are arranged.
A second semiconductor chip laminated on the first semiconductor chip, which comprises the element array, and
Including
Each of the plurality of elements included in the element array arranged on the second semiconductor chip and each of the plurality of second current sources arranged on the first semiconductor chip are connected one-to-one. The light source device according to (6) above.
(8)
The plurality of second current sources
Arranged in a predetermined region on the first semiconductor chip,
The element array is
The light source device according to (7) above, which is laminated and arranged in a region corresponding to the predetermined region on the first semiconductor chip.
(9)
The first resistor is
The light source device according to (7), wherein the light source device includes a plurality of resistors connected in parallel, and the plurality of resistors are divided into a plurality of blocks and arranged on the first semiconductor chip.
(10)
The light source device according to (9) above, wherein the first resistor is divided into two blocks arranged in an aligned manner, and the second resistor is arranged between the two blocks.
(11)
The second resistor is
A plurality of resistors connected in parallel are included, and the plurality of resistors are divided into a plurality of blocks and arranged on the first semiconductor chip.
Each of the plurality of blocks in which the plurality of resistors included in the first resistor is divided and each of the plurality of blocks in which the plurality of resistors contained in the second resistor are divided are The light source device according to (10) above, which is alternately arranged and arranged on the first semiconductor chip.
(12)
Further comprising a capacitor arranged in a predetermined region on the first semiconductor chip and connected to the first resistor.
The element array is
The light source device according to (7), which is laminated and arranged in the predetermined region on the first semiconductor chip.
(13)
The first resistor and the second resistor are
The light source device according to (7) above, each of which is a resistance between the source and drain of a MOS (Metal Oxide Semiconductor) type transistor in the on state.
(14)
The averaging circuit
The light source device according to (3), wherein the light source device includes a low-pass filter for removing a high-frequency component of the drive current, and outputs a drive current from which the high-frequency component has been removed by the low-pass filter as the average value.
1 光源装置
10、10a~10f ドライバ
11 コントローラ
12 レーザダイオード
13a、13b レベルシフト部
20 駆動部
20R レプリカ部
21 検出部
51 測距部
61 対象物
70 測距装置
101、102、111、112、133、134a、
134b、137、C1、C2、F1~F4、M1、M2 トランジスタ
103、104、113、136 電流源
105 低域通過フィルタ
110、110a 比較部
130、130a、130b レベルシフト部
131、132 抵抗
135 出力部
138~138 インバータ
140 キャパシタ
302 受光部
1381、1382、BF1、BF2 バッファ部
CM カレントミラー部
FF フリップフロップ部
1 Light source device 10, 10a to 10f Driver 11 Controller 12 Laser diode 13a, 13b Level shift unit 20 Drive unit 20R Replica unit 21 Detection unit 51 Distance measurement unit 61 Object 70 Distance measurement device 101, 102, 111, 112, 133, 134a,
134b, 137, C1, C2, F1 to F4, M1, M2 Transistors 103, 104, 113, 136 Current source 105 Low- pass filter 110, 110a Comparison unit 130, 130a, 130b Level shift unit 131, 132 Resistance 135 Output unit 138 1 to 138 4 Inverter 140 Capacitor 302 Light receiving part 1381, 1382, BF1, BF2 Buffer part CM Current mirror part FF Flip-flop part

Claims (14)

  1.  所定の駆動電流が供給されることで所定の光量で発光する発光素子と、
     前記駆動電流を前記発光素子に供給する駆動部と、
     前記駆動電流についての過電流を検出するための基準となる基準レベルを生成する基準レベル生成部と、
     前記駆動電流を前記基準レベルと比較し、その比較結果を出力信号として出力する比較部と、
     前記比較部の出力信号のレベルをシフトして出力するレベルシフト部と、
    を有し、
     前記レベルシフト部の出力に基づいて、前記駆動電流の過電流を検出する光源装置。
    A light emitting element that emits light with a predetermined amount of light when a predetermined drive current is supplied, and
    A drive unit that supplies the drive current to the light emitting element,
    A reference level generator that generates a reference level that serves as a reference for detecting an overcurrent with respect to the drive current, and a reference level generator.
    A comparison unit that compares the drive current with the reference level and outputs the comparison result as an output signal.
    A level shift unit that shifts the level of the output signal of the comparison unit and outputs it,
    Have,
    A light source device that detects an overcurrent of the drive current based on the output of the level shift unit.
  2.  前記駆動部は、
     所定の電位に接続され、かつ、前記発光素子に直列に接続される第1の抵抗体を含み、
     前記基準レベル生成部は、
     前記所定の電位に接続される第2の抵抗体を含み、前記駆動部を模したレプリカ部であり、
     さらに、
     前記第2の抵抗体に直列に接続される、前記駆動電流に過電流分の電流を加えた電流を供給する第1の電流源を含んでおり、
     前記比較部は、前記駆動電流を、前記レプリカ部によって生成される基準レベルと比較する
    請求項1に記載の光源装置。
    The drive unit
    It comprises a first resistor connected to a predetermined potential and connected in series with the light emitting element.
    The reference level generator
    It is a replica unit that includes a second resistor connected to the predetermined potential and imitates the drive unit.
    further,
    It includes a first current source connected in series with the second resistor to supply a current obtained by adding a current corresponding to an overcurrent to the drive current.
    The light source device according to claim 1, wherein the comparison unit compares the drive current with a reference level generated by the replica unit.
  3.  前記駆動電流の所定時間内における平均値を出力する平均化回路をさらに有し、
     前記比較部は、前記平均化回路から出力される前記平均値を前記基準レベルと比較する
    請求項1に記載の光源装置。
    It further has an averaging circuit that outputs an average value of the drive current within a predetermined time.
    The light source device according to claim 1, wherein the comparison unit compares the average value output from the averaging circuit with the reference level.
  4.  前記レベルシフト部は、
     所定電位と基準電圧との間の電圧を分圧する分圧抵抗と、
     前記比較部の出力信号に基づいてオンまたはオフとなり、オンのときに前記分圧抵抗に前記所定電位を与えるトランジスタと、
     を有し、
     前記分圧抵抗によって分圧された電圧に対応する電圧をレベルシフト後の電圧として出力する
    請求項1に記載の光源装置。
    The level shift unit is
    A voltage dividing resistor that divides the voltage between the predetermined potential and the reference voltage,
    A transistor that turns on or off based on the output signal of the comparison unit and gives the predetermined potential to the voltage dividing resistor when it is turned on.
    Have,
    The light source device according to claim 1, wherein a voltage corresponding to the voltage divided by the voltage dividing resistor is output as a voltage after level shifting.
  5.  前記レベルシフト部は、
     第1電源電圧によって動作し、前記比較部の出力信号に基づいて第1状態と第2状態とのいずれか一方の状態に設定されるフリップフロップ部と、
     前記第1電源電圧とは異なる第2電源電圧によって動作し、前記フリップフロップ部の状態に対応する電圧を出力する出力部とを有し、
     前記出力部の出力をレベルシフト後の電圧として出力する
    請求項1に記載の光源装置。
    The level shift unit is
    A flip-flop unit that operates by the first power supply voltage and is set to either the first state or the second state based on the output signal of the comparison unit.
    It operates with a second power supply voltage different from the first power supply voltage, and has an output unit that outputs a voltage corresponding to the state of the flip-flop unit.
    The light source device according to claim 1, wherein the output of the output unit is output as a voltage after level shifting.
  6.  前記発光素子は、
     それぞれ独立して発光する複数の素子が配列される素子アレイとして構成され、
     前記第1の電流源は、
     前記素子アレイに含まれる前記複数の素子のうち発光させる素子の数に応じた前記所定の駆動電流を供給する
    請求項2に記載の光源装置。
    The light emitting element is
    It is configured as an element array in which a plurality of elements that emit light independently are arranged.
    The first current source is
    The light source device according to claim 2, wherein the predetermined drive current is supplied according to the number of elements to emit light among the plurality of elements included in the element array.
  7.  前記複数の素子それぞれを駆動する複数の駆動電流を該複数の素子それぞれに独立して供給する複数の第2の電流源をさらに備え、
     前記第1の抵抗体と、前記第2の抵抗体と、前記第1の電流源と、前記複数の第2の電流源と、が配置される第1の半導体チップと、
     前記素子アレイを備える、前記第1の半導体チップに積層される第2の半導体チップと、
    を含み、
     前記第2の半導体チップに配置される前記素子アレイに含まれる前記複数の素子それぞれと、前記第1の半導体チップに配置される前記複数の第2の電流源それぞれと、が一対一に接続される
    請求項6に記載の光源装置。
    A plurality of second current sources for independently supplying a plurality of drive currents for driving each of the plurality of elements to each of the plurality of elements are further provided.
    A first semiconductor chip in which the first resistor, the second resistor, the first current source, and the plurality of second current sources are arranged.
    A second semiconductor chip laminated on the first semiconductor chip, which comprises the element array, and
    Including
    Each of the plurality of elements included in the element array arranged on the second semiconductor chip and each of the plurality of second current sources arranged on the first semiconductor chip are connected one-to-one. The light source device according to claim 6.
  8.  前記複数の第2の電流源は、
     前記第1の半導体チップ上の所定領域に配置され、
     前記素子アレイは、
     前記第1の半導体チップ上の前記所定領域に対応する領域に積層して配置される
    請求項7に記載の光源装置。
    The plurality of second current sources
    Arranged in a predetermined region on the first semiconductor chip,
    The element array is
    The light source device according to claim 7, wherein the light source device is arranged so as to be laminated on a region corresponding to the predetermined region on the first semiconductor chip.
  9.  前記第1の抵抗体は、
     並列接続される複数の抵抗体を含み、該複数の抵抗体が複数のブロックに分割されて前記第1の半導体チップに配置される
    請求項7に記載の光源装置。
    The first resistor is
    The light source device according to claim 7, further comprising a plurality of resistors connected in parallel, the plurality of resistors being divided into a plurality of blocks and arranged on the first semiconductor chip.
  10.  前記第1の抵抗体は、整列して配置される2のブロックに分割され、該2のブロックの間に前記第2の抵抗体が配置される
    請求項9に記載の光源装置。
    The light source device according to claim 9, wherein the first resistor is divided into two blocks arranged in an aligned manner, and the second resistor is arranged between the two blocks.
  11.  前記第2の抵抗体は、
     並列接続される複数の抵抗体を含み、該複数の抵抗体が複数のブロックに分割されて前記第1の半導体チップに配置され、
     前記第1の抵抗体に含まれる前記複数の抵抗体が分割された複数のブロックそれぞれと、前記第2の抵抗体に含まれる複数の抵抗体が分割された前記複数のブロックのそれぞれと、が交互に、整列して前記第1の半導体チップに配置される
    請求項10に記載の光源装置。
    The second resistor is
    A plurality of resistors connected in parallel are included, and the plurality of resistors are divided into a plurality of blocks and arranged on the first semiconductor chip.
    Each of the plurality of blocks in which the plurality of resistors included in the first resistor is divided and each of the plurality of blocks in which the plurality of resistors contained in the second resistor are divided are The light source device according to claim 10, wherein the light source devices are alternately arranged and arranged on the first semiconductor chip.
  12.  前記第1の半導体チップ上の所定領域に配置され、前記第1の抵抗体に接続されるキャパシタをさらに備え、
     前記素子アレイは、
     前記第1の半導体チップ上の前記所定領域に積層して配置される
    請求項7に記載の光源装置。
    Further comprising a capacitor arranged in a predetermined region on the first semiconductor chip and connected to the first resistor.
    The element array is
    The light source device according to claim 7, wherein the light source device is stacked and arranged in the predetermined region on the first semiconductor chip.
  13.  前記第1の抵抗体および前記第2の抵抗体は、
     それぞれ、オン状態におけるMOS(Metal Oxide Semiconductor)型トランジスタのソース-ドレイン間の抵抗である
    請求項7に記載の光源装置。
    The first resistor and the second resistor are
    The light source device according to claim 7, wherein each is a resistance between the source and drain of a MOS (Metal Oxide Semiconductor) type transistor in the on state.
  14.  前記平均化回路は、
     前記駆動電流の高域成分を除去する低域通過フィルタを含み、前記低域通過フィルタによって高域成分が除去された駆動電流を前記平均値として出力する
    請求項3に記載の光源装置。
    The averaging circuit
    The light source device according to claim 3, further comprising a low-pass filter for removing a high-frequency component of the drive current, and outputting the drive current from which the high-frequency component has been removed by the low-pass filter as the average value.
PCT/JP2020/029902 2019-09-23 2020-08-04 Light source device WO2021059756A1 (en)

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JP2016105582A (en) * 2014-11-19 2016-06-09 パナソニックIpマネジメント株式会社 Bias circuit for amplifier circuit, control method therefor and signal amplifier device
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* Cited by examiner, † Cited by third party
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JP2003218455A (en) * 2002-01-23 2003-07-31 Teac Corp Semiconductor laser driving apparatus and optical disk device
JP2005032798A (en) * 2003-07-08 2005-02-03 Ricoh Co Ltd Semiconductor laser driving device, image forming apparatus using the same, and method of determining deterioration of semiconductor laser
CN101821916A (en) * 2007-06-07 2010-09-01 英特尔公司 Controlling bias current for optical source
JP2011029615A (en) * 2009-07-02 2011-02-10 Fujitsu Semiconductor Ltd Led driving circuit, and semiconductor device
JP2016105582A (en) * 2014-11-19 2016-06-09 パナソニックIpマネジメント株式会社 Bias circuit for amplifier circuit, control method therefor and signal amplifier device
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