WO2021056033A3 - Apparatus and method of intelligent power and performance management - Google Patents

Apparatus and method of intelligent power and performance management Download PDF

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Publication number
WO2021056033A3
WO2021056033A3 PCT/US2021/014235 US2021014235W WO2021056033A3 WO 2021056033 A3 WO2021056033 A3 WO 2021056033A3 US 2021014235 W US2021014235 W US 2021014235W WO 2021056033 A3 WO2021056033 A3 WO 2021056033A3
Authority
WO
WIPO (PCT)
Prior art keywords
training system
configuration
configuration training
information
power
Prior art date
Application number
PCT/US2021/014235
Other languages
French (fr)
Other versions
WO2021056033A2 (en
Inventor
Jing Wu
Jian Huang
Yu Zhang
Original Assignee
Zeku, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zeku, Inc. filed Critical Zeku, Inc.
Priority to PCT/US2021/014235 priority Critical patent/WO2021056033A2/en
Publication of WO2021056033A2 publication Critical patent/WO2021056033A2/en
Publication of WO2021056033A3 publication Critical patent/WO2021056033A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)
  • Supply And Distribution Of Alternating Current (AREA)
  • Feedback Control In General (AREA)

Abstract

Embodiments include a configuration training system for configurable power management. The configuration training system may receive application information associated with a plurality of functional blocks. The configuration training system may receive first status feedback information from the plurality of functional blocks. The configuration training system may generate first power control information based on the application information and the first status feedback information. The configuration training system may generate first function execution control state information based on the application information and the first status feedback information. The configuration training system may send the first power control information to a power controller. The configuration training system may send the first function execution control state information to the plurality of functional blocks. The configuration training system may perform these operations in a loop with one or more iterations until an optimal power and performance control configuration is found at certain conditions.
PCT/US2021/014235 2021-01-20 2021-01-20 Apparatus and method of intelligent power and performance management WO2021056033A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/US2021/014235 WO2021056033A2 (en) 2021-01-20 2021-01-20 Apparatus and method of intelligent power and performance management

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2021/014235 WO2021056033A2 (en) 2021-01-20 2021-01-20 Apparatus and method of intelligent power and performance management

Publications (2)

Publication Number Publication Date
WO2021056033A2 WO2021056033A2 (en) 2021-03-25
WO2021056033A3 true WO2021056033A3 (en) 2021-06-03

Family

ID=74884240

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2021/014235 WO2021056033A2 (en) 2021-01-20 2021-01-20 Apparatus and method of intelligent power and performance management

Country Status (1)

Country Link
WO (1) WO2021056033A2 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110022871A1 (en) * 2009-07-21 2011-01-27 Bouvier Daniel L System-On-Chip Queue Status Power Management
US20140317427A1 (en) * 2013-04-17 2014-10-23 Qualcomm Incorporated Dynamic clock voltage scaling (dcvs) based on application performance in a system-on-a-chip (soc), and related methods and processor-based systems
US20160091957A1 (en) * 2014-09-26 2016-03-31 Suketu R. Partiwala Power management for memory accesses in a system-on-chip
US20160239065A1 (en) * 2015-02-13 2016-08-18 Victor W. Lee Performing power management in a multicore processor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110022871A1 (en) * 2009-07-21 2011-01-27 Bouvier Daniel L System-On-Chip Queue Status Power Management
US20140317427A1 (en) * 2013-04-17 2014-10-23 Qualcomm Incorporated Dynamic clock voltage scaling (dcvs) based on application performance in a system-on-a-chip (soc), and related methods and processor-based systems
US20160091957A1 (en) * 2014-09-26 2016-03-31 Suketu R. Partiwala Power management for memory accesses in a system-on-chip
US20160239065A1 (en) * 2015-02-13 2016-08-18 Victor W. Lee Performing power management in a multicore processor

Also Published As

Publication number Publication date
WO2021056033A2 (en) 2021-03-25

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