WO2021036748A1 - 控制方法、装置、芯片与设备 - Google Patents

控制方法、装置、芯片与设备 Download PDF

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Publication number
WO2021036748A1
WO2021036748A1 PCT/CN2020/107812 CN2020107812W WO2021036748A1 WO 2021036748 A1 WO2021036748 A1 WO 2021036748A1 CN 2020107812 W CN2020107812 W CN 2020107812W WO 2021036748 A1 WO2021036748 A1 WO 2021036748A1
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Prior art keywords
chip
sleep mode
scene
time period
value
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PCT/CN2020/107812
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English (en)
French (fr)
Inventor
吕文贵
赵旭罡
王远国
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华为技术有限公司
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Publication of WO2021036748A1 publication Critical patent/WO2021036748A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215—Monitoring of peripheral devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
    • H04W52/02—Power saving arrangements
    • H04W52/0209—Power saving arrangements in terminal devices
    • H04W52/0261—Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level
    • H04W52/0287—Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level changing the clock frequency of a controller in the equipment
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Definitions

  • This application relates to the field of electronic technology, and more specifically, to control methods, devices, chips, and equipment.
  • the WLAN 802.11 protocol supports a power saving mode.
  • the WIFI chip can turn off its antenna, that is, the WIFI chip may be in two modes: active Mode or sleep mode.
  • the WIFI chip transmits data.
  • the transmission power of the WIFI chip is positively related to the transmission rate.
  • the power consumption increases with the increase of the transmission power.
  • the power consumption in the active mode generally reaches tens to more than 100 mA.
  • the WIFI chip In sleep mode, the WIFI chip will turn off the antenna and wake up periodically to receive Beacon frames, thereby judging whether there is data to be transmitted according to the Beacon frames.
  • the general power consumption is only a few milliamperes. Before the active mode enters the sleep mode, there is a 200ms timeout period. The timeout period is counted by the internal counter of the WIFI chip. Data transmission will trigger the counter to be cleared. During this time, the WIFI chip is in idle mode. The power consumption generally reaches tens of milliamps, which is much larger than the power consumption in sleep mode, but lower than the power consumption in active mode.
  • This application provides a control method that can reduce the power consumption of a WIFI chip.
  • a control method which is executed by a chip and includes: entering a first sleep mode at least once in a target time period, wherein there is no data transmission in the target time period, and the target time period The segment is a time period after the chip completes one data transmission, and the duration of the first sleep mode is less than the duration of the second sleep mode.
  • the chip when there is no data transmission, the chip enters the sleep mode at least once to avoid the chip from always being in the idle mode when there is no data transmission, thereby reducing the power consumption of the chip.
  • the entering the first sleep mode at least once includes: entering the idle mode before entering the first sleep mode; and/or, entering the idle mode after the first sleep mode ends .
  • the chip can transmit data in the idle mode, when there is no data transmission, the chip is in the idle mode for a period of time before and/or after the sleep mode, thereby reducing the power consumption of the chip. While ensuring normal data transmission.
  • the duration of the idle mode is t 1
  • the duration of the first sleep mode is t 2
  • the method further includes: determining the value of t 1 and the value of t 1 according to the data transmission scenario The value of t 2.
  • the determined duration of the sleep mode and the duration of the idle mode can match the data transmission scenario For example, for data transmission scenarios that require a faster response speed of the chip, the duration of the sleep mode can be made shorter than that of the idle mode; for data transmission scenarios that require a lower response speed of the chip, the duration of the sleep mode can be made The duration is greater than the duration of the idle mode, so as to achieve a balance between the power consumption of the chip and the response speed of the chip.
  • the value of t 1 is greater than the value of t 2
  • the data transmission scenario is the first transmission scenario
  • the value of t 1 is less than the value of t 2
  • the data transmission The scene is the second transmission scene; wherein the response speed of the chip required by the first transmission scene is greater than the response speed of the chip required by the second transmission scene.
  • the first transmission scene includes an online game scene or a video call scene
  • the second transmission scene includes an online video playback scene or an e-book reading scene.
  • the method further includes:
  • the chip is a wireless network WIFI chip.
  • a control device configured to execute the foregoing first aspect or the method in any possible implementation manner of the first aspect.
  • the device may include a module for executing the control method in the first aspect and any one of its possible implementation manners.
  • a chip is provided, and the chip is configured with a memory and a processor.
  • the memory is used to store instructions; the processor executes the instructions stored in the memory, so that the device executes the control method in the first aspect and any one of its possible implementation manners.
  • a device configured with the chip of the fourth aspect, and the chip is configured with a memory and a processor.
  • the memory is used to store instructions; the processor executes the instructions stored in the memory, so that the device executes the control method in the first aspect and any one of its possible implementation manners.
  • a program is provided, when the program is executed by a processor, it is used to execute any method in the first aspect and its possible implementation manners.
  • a program product comprising: program code, which when the program code is executed by a chip, causes the chip to execute any method in the first aspect and its possible implementation manners.
  • a computer-readable storage medium stores instructions. When the instructions run on a computer, the computer executes the first aspect and any one of its possible implementations. Control Method.
  • Fig. 1 is a schematic flow chart of the control method provided by the present application
  • Figure 2 is a graph of the power consumption of the WIFI chip corresponding to mode #1 over time
  • Figure 3 is a graph of the power consumption of the WIFI chip corresponding to mode #2 over time
  • Figure 4 is a graph of the power consumption of the WIFI chip corresponding to mode #3 over time
  • Figure 5 is another graph showing the power consumption of the WIFI chip over time
  • FIG. 6 is a schematic diagram of the structure of the control device provided by this application.
  • FIG. 7 is a schematic diagram of the structure of the chip provided by this application.
  • the WLAN 802.11 protocol supports a power saving mode.
  • the WIFI chip can turn off its antenna, that is, the WIFI chip may be in two modes: active Mode or sleep mode.
  • the WIFI chip transmits data.
  • the transmission power of the WIFI chip is positively related to the transmission rate.
  • the power consumption increases with the increase of the transmission power.
  • the power consumption in the active mode generally reaches tens to more than 100 mA.
  • the WIFI chip In sleep mode, the WIFI chip will turn off the antenna and wake up periodically to receive Beacon frames, thereby judging whether there is data to be transmitted according to the Beacon frames.
  • the general power consumption is only a few milliamperes.
  • the timeout period is counted by the internal counter of the WIFI chip. Data transmission will trigger the counter to be cleared.
  • the WIFI chip is in idle mode.
  • the power consumption in idle mode generally reaches tens of milliamps, which is much larger than the power consumption in sleep mode, but lower than the power consumption in active mode.
  • the duration of the idle mode is set to 60ms, that is, reduces the WIFI chip by reducing the duration of the idle mode Power consumption.
  • the duration of the idle mode will affect the response speed of the WIFI chip. For example, when the duration of the idle mode is set to be larger, the response speed will increase, but it will also cause serious waste of power consumption; When the duration of the mode is set to be small, the waste of power consumption will be reduced, but at the same time, the response speed will be slowed down. Therefore, it is difficult to achieve a better balance between the power consumption of the WIFI chip and the performance of the WIFI chip simply by adjusting the duration of the idle mode.
  • this application provides a control method in order to reduce the power consumption of the WIFI chip.
  • control method 200 provided by the present application will be described in detail with reference to FIGS. 1 to 5.
  • FIG. 1 is a schematic flowchart of a control method 200 provided in the present application. Hereinafter, each step of the method 200 will be described in detail.
  • the chip in the target time period, enters the first sleep mode at least once, wherein there is no data transmission in the target time period, the target time period the chip is a time period after completing a data transmission, and the first sleep mode The duration is less than the duration of the second sleep mode.
  • the chip (for example, the WIFI chip) will transmit data in the active mode. When there is no data transmission, the WIFI chip will enter the idle mode. When the WIFI chip is in the idle mode for a preset period of time (for example, 200ms) , WIFI chip will enter sleep mode.
  • the sleep mode here is sleep mode #2 below (ie, an example of the second sleep mode).
  • the preset time is counted by the internal counter of the WIFI chip (hereinafter referred to as "counter #1"). After the WIFI chip enters sleep mode #2, it usually wakes up to receive Beacon frames, so as to determine whether there is data to be transmitted according to the Beacon frame.
  • the WIFI chip will enter the active mode again , And will trigger counter #1 to be cleared, counter #1 will re-timing after the completion of this data transmission, that is, repeat the above process. It can be seen that within the preset time period, if there is no data transmission during this period, the WIFI chip will always be in the idle mode. During the preset period of time during which the idle mode continues, there is actually no effective data transmission, but for the WIFI chip in the idle mode, it will still consume relatively large power consumption during the preset period of time.
  • the WIFI chip will enter sleep mode #1 at least once in time period #1 (That is, an example of the first sleep mode), wherein the duration of sleep mode #1 is shorter than sleep mode #2.
  • the method 200 may further include:
  • the length of time period #1 is equal to the length of the preset time period, and the WIFI chip will enter sleep mode #2 immediately after time period #1 .
  • time period #1-1 the time period during which the WIFI chip is in sleep mode #1 in time period #1. It should be understood that in the time period #1, for the time period when the WIFI chip is not in the sleep mode #1 (for example, the time period #1-2), the WIFI chip may be in the idle mode in the time period #1-2.
  • the above S210 can also be implemented in the following ways:
  • the WIFI chip In time period #1, the WIFI chip enters idle mode before entering sleep mode #1.
  • the WIFI chip can enter the idle mode before entering sleep mode #1.
  • the WIFI chip can start counter #2.
  • the WIFI chip enters the idle mode. 2
  • the timeout expires the idle mode ends, and the time period corresponding to counter #2 is time period #1-2.
  • the WIFI chip can start counter #3.
  • the WIFI chip enters sleep mode #1.
  • the counter #3 times out sleep mode #1 ends.
  • the time period corresponding to counter #3 is the time period. #1-1.
  • Figure 2 shows a graph of the power consumption of the WIFI chip corresponding to mode #1 over time.
  • the WIFI chip In the time period #1, the WIFI chip enters the idle mode after the sleep mode #1 ends.
  • the WIFI chip in time period #1, can enter sleep mode #1 first, and then enter the idle mode after sleep mode #1 ends.
  • the WIFI chip can start counter #3, when counter# When 3 starts counting, the WIFI chip enters sleep mode #1. When the counter #3 times out, sleep mode #1 ends.
  • the time period corresponding to counter #3 is time period #1-1.
  • the WIFI chip can start the counter #2. When the counter #2 starts counting, the WIFI chip enters the idle mode. When the counter #2 times out, the idle mode ends.
  • the time period corresponding to the counter #2 is the time period #1-2 .
  • Figure 3 shows a graph of the power consumption of the WIFI chip corresponding to mode #2 over time.
  • the WIFI chip In time period #1, the WIFI chip enters the idle mode before entering sleep mode #1 and after sleep mode #1 ends.
  • the WIFI chip in time period #1, can enter idle mode before entering sleep mode #1, and then enter sleep mode #1 after the idle mode ends, and then wait until sleep mode #1 ends.
  • the WIFI chip can start the counter #2, when the counter #2 starts counting, the WIFI chip enters the idle mode, when the counter #2 times out, the idle mode ends, where the time period corresponding to the counter #2 For time period #1-2.
  • the WIFI chip can start counter #3.
  • the WIFI chip starts counting, the WIFI chip enters sleep mode #1.
  • sleep mode #1 ends.
  • the time period corresponding to counter #3 is the time period. #1-1.
  • the WIFI chip starts counter #2 again.
  • the WIFI chip enters the idle mode.
  • the idle mode ends.
  • Fig. 4 shows a graph of the power consumption of the WIFI chip corresponding to mode #3 over time.
  • this application only takes the WIFI chip to enter sleep mode #1 in the above-mentioned ways in time period #1 as an exemplary description, but this application is not limited to this.
  • sleep mode #1 and idle mode All modes can be turned on periodically in time period #1.
  • timing function implemented by the counter #1 to counter #3 can be implemented by one counter, or can also be implemented by two or three counters, which is not particularly limited in this application.
  • the chip can transmit data in the idle mode, when there is no data transmission, the chip is in the idle mode for a period of time before and/or after the sleep mode #1, thereby reducing the power consumption of the chip. At the same time, normal data transmission is guaranteed.
  • the timing duration of counter #2 can be set to t 1 , which represents the duration of counter #2 in idle mode as t 1
  • the timing duration of counter #3 can be set to t 2 , which represents counter
  • the duration of #3 in sleep mode #1 is t 2 .
  • the values of t 1 and t 2 can be determined according to the data transmission scenario.
  • the value of t 1 may be greater than the value of t 2 ; or, when the data transmission scene is transmission scene #2 (that is, In an example of the second transmission scenario), the value of t 1 may be smaller than the value of t 2.
  • the values of t 1 and t 2 can be set by the operating system running on the electronic device equipped with the WIFI chip. For example, the operating system can set the values of t 1 and t 2 for the WIFI chip according to the data transmission scenario, so that The WIFI chip can determine the duration t 1 for the idle mode and the transmission duration t 2 for the sleep mode #1 according to the data transmission scenario.
  • transmission scene #1 may include an online game scene or a video call scene
  • transmission scene #2 may include an online video playback scene or an e-book reading scene.
  • transmission scenario #1 has a higher requirement for the response speed of the WIFI chip than transmission scenario #2 for the response speed of the WIFI chip.
  • the response speed of the WIFI chip here can represent the speed at which the WIFI chip enters the active mode from other modes.
  • the value of t 1 can also be made equal to the value of t 2 , that is, the duration of the WIFI chip in sleep mode #1 is equal to the duration of the idle mode.
  • the power consumption of the WIFI chip in the idle mode can be reduced by 50% compared to the power consumption of the WIFI chip in the idle mode when there is no data transmission.
  • control method provided by the present application is described in detail above with reference to FIGS. 1 to 5, and the control device and chip provided by the present application are described in detail below with reference to FIGS. 6 to 7.
  • FIG. 6 is a schematic block diagram of the control device 300 provided by this application, including a processing module 301.
  • the processing module 301 is configured to control the chip to enter the first sleep mode at least once in a target time period, wherein there is no data transmission in the target time period, and the target time period is a time period after one data transmission is completed, And the duration of the first sleep mode is less than the duration of the second sleep mode.
  • the processing module 301 is specifically configured to: before entering the first sleep mode, control the chip to enter the idle mode; and/or, after the first sleep mode ends, control the chip to enter the idle mode.
  • the duration of the idle mode is t 1
  • the duration of the first sleep mode is t 2
  • the processing module 301 is specifically configured to: determine the value of t 1 and t 2 according to the data transmission scenario The value of.
  • the value of t 1 is greater than the value of t 2 , and the data transmission scenario is the first transmission scenario; or, the value of t 1 is less than the value of t 2 , and the data transmission scenario is the first Two transmission scenarios; wherein the response speed of the chip required by the first transmission scenario is greater than the response speed of the chip required by the second transmission scenario.
  • the first transmission scene includes an online game scene or a video call scene
  • the second transmission scene includes an online video playback scene or an e-book reading scene.
  • the processing module 301 is further configured to: control the chip to enter the second sleep mode after the target time period.
  • the device 300 of the present application may be implemented by an application-specific integrated circuit (ASIC) or a programmable logic device (PLD).
  • the above-mentioned PLD may be a complex program logic device (complex logic device).
  • CPLD programmable logical device
  • FPGA field-programmable gate array
  • GAL generic array logic
  • the control method shown in FIG. 1 may also be implemented through software.
  • the device 300 and its various modules may also be software modules.
  • the device 300 of the present application may correspond to executing the method described in the embodiments of the present application, and the above and other operations and/or functions of each module in the device 300 are used to implement the corresponding process in the method shown in FIG. This will not be repeated here.
  • FIG. 7 is a schematic diagram of the structure of the chip provided by this application.
  • the device 400 includes a processor 401, a memory 402, a communication interface 403, and a bus 404.
  • the processor 401, the memory 402, and the communication interface 403 communicate through the bus 404, and may also communicate through other means such as wireless transmission.
  • the memory 402 is used to store instructions, and the processor 401 is used to execute the instructions stored in the memory 402.
  • the memory 402 stores program codes 4021, and the processor 401 can call the program codes 4021 stored in the memory 402 to execute the control method shown in FIG. 1.
  • the processor 401 may be a CPU, and the processor 401 may also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA), or Other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.
  • DSP digital signal processors
  • ASIC application-specific integrated circuits
  • FPGA field programmable gate arrays
  • the general-purpose processor may be a microprocessor or any conventional processor.
  • the memory 402 may include a read-only memory and a random access memory, and provides instructions and data to the processor 401.
  • the memory 402 may also include non-volatile random access memory.
  • the memory 402 may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory.
  • the non-volatile memory can be read-only memory (ROM), programmable read-only memory (programmable ROM, PROM), erasable programmable read-only memory (erasable PROM, EPROM), and electrically available Erase programmable read-only memory (electrically EPROM, EEPROM) or flash memory.
  • the volatile memory may be random access memory (RAM), which is used as an external cache.
  • RAM random access memory
  • SRAM static random access memory
  • DRAM dynamic random access memory
  • SDRAM synchronous dynamic random access memory
  • Double data rate synchronous dynamic random access memory double data date SDRAM, DDR SDRAM
  • enhanced SDRAM enhanced synchronous dynamic random access memory
  • SLDRAM synchronous connection dynamic random access memory
  • direct rambus RAM direct rambus RAM
  • the bus 404 may also include a power bus, a control bus, and a status signal bus. However, for clear description, various buses are marked as the bus 404 in FIG. 7.
  • the chip 400 according to the present application may correspond to the device 300 in the present application, and the above-mentioned and other operations and/or functions of each module in the chip 400 are used to implement the operation steps of the control method in FIG. 1, or the chip 400 The above-mentioned and other operations and/or functions of each module in 400 are used to implement the operation steps of the control method in FIG. 1, and are not repeated here for brevity.
  • the foregoing embodiments may be implemented in whole or in part by software, hardware, firmware or any other combination.
  • the above-mentioned embodiments may be implemented in the form of a computer program product in whole or in part.
  • the computer program product includes one or more computer instructions.
  • the computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.
  • the computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium.
  • the computer instructions may be transmitted from a website, computer, server, or data center.
  • the computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or a data center that includes one or more sets of available media.
  • the usable medium may be a magnetic medium (for example, a floppy disk, a hard disk, a magnetic tape), an optical medium (for example, a DVD), or a semiconductor medium.
  • the semiconductor medium may be a solid state drive (SSD).
  • the disclosed system, device, and method may be implemented in other ways.
  • the device embodiments described above are merely illustrative, for example, the division of the units is only a logical function division, and there may be other divisions in actual implementation, for example, multiple units or components may be combined or It can be integrated into another system, or some features can be ignored or not implemented.
  • the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, and may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the solutions of the embodiments.
  • the functional units in the various embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit.
  • the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer readable storage medium.
  • the technical solution of the present application essentially or the part that contributes to the existing technology or the part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including Several instructions are used to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the methods described in the various embodiments of the present application.
  • the aforementioned storage media include: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic disk or optical disk and other media that can store program code .

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Abstract

本申请提供了一种控制方法，当没有数据传输时，通过使芯片至少一次进入休眠模式，避免芯片在没有数据传输时始终处于空闲模式，为降低芯片的功耗提供了一种解决方案。

Description

控制方法、装置、芯片与设备
本申请要求于2019年8月29日提交中国专利局、申请号为201910807784.1、申请名称为“控制方法、装置、芯片与设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及电子技术领域，并且更具体地，涉及控制方法、装置、芯片与设备。
背景技术
目前，使用无线局域网(wireless local area networks，WLAN)的大多数是便携式设备。由于便携式设备的电池电力有限，为了尽可能节约电池电力，WLAN 802.11协议支持省电模式，在没有数据传输时，WIFI芯片可以关闭自己的天线，即WIFI芯片可能处于两种模式：工作(active)模式或休眠(sleep)模式。active模式下WIFI芯片传输数据，该模式下WIFI芯片的发射功率与传输速率正相关，功耗随着发射功率的增加而增加，active模式下功耗一般会达到几十至一百多毫安。sleep模式下WIFI芯片会关闭天线，同时会定期醒来接收Beacon帧，从而根据Beacon帧判断是否有数据需要传输，sleep模式下一般功耗只有几毫安。active模式进入sleep模式之前有200ms的超时时间，该超时时间由WIFI芯片的内部计数器进行统计，发生数据传输会触发该计数器清零，这段时间WIFI芯片处于空闲(idle)模式，idle模式下的功耗一般会达到几十毫安，远大于sleep模式下的功耗，但低于active模式下的功耗。
在idle模式持续的这段时间内，实际并无有效数据的传输，但对于处于idle模式下的WIFI芯片，其在这段时间内依然会消耗比较大的功耗。
发明内容
本申请提供一种控制方法，能够降低WIFI芯片的功耗。
第一方面，提供了一种控制方法，所述方法由芯片执行，包括：在目标时间段内，至少一次进入第一休眠模式，其中，所述目标时间段内没有数据传输，所述目标时间段为所述芯片完成一次数据传输之后的一个时间段，且所述第一休眠模式的持续时长小于第二休眠模式的持续时长。
基于上述技术方案，当没有数据传输时，通过使芯片至少一次进入休眠模式，避免芯片在没有数据传输时始终处于空闲模式，从而降低芯片的功耗。在一种实现方式中，所述至少一次进入第一休眠模式，包括：在进入所述第一休眠模式之前，进入空闲模式；和/或，在所述第一休眠模式结束之后，进入空闲模式。
基于上述技术方案，由于芯片在空闲模式下能够传输数据，在没有数据传输时，通过使芯片在处于休眠模式之前的一段时间和/或之后的一段时间内处于空闲模式，从而在降 低芯片功耗的同时保证正常的数据传输。
在一种实现方式中，所述空闲模式的持续时长为t 1，所述第一休眠模式的持续时长为t 2，所述方法还包括：根据数据的传输场景，确定t 1的取值与t 2的取值。
基于上述技术方案，通过根据数据的传输场景确定芯片在休眠模式的持续时长与芯片在空闲模式的持续时长，使得确定的休眠模式的持续时长与空闲模式的持续时长能够与数据的传输场景相匹配，例如，对于要求芯片的响应速度较快的数据的传输场景，可以使得休眠模式的持续时长小于空闲模式的持续时长；对于芯片的响应速度要求较低的数据的传输场景，可以使得休眠模式的持续时长大于空闲模式的持续时长，从而实现芯片的功耗与芯片的响应速度之间的平衡。
在一种实现方式中，t 1的取值大于t 2的取值，所述数据的传输场景为第一传输场景；或，t 1的取值小于t 2的取值，所述数据的传输场景为第二传输场景；其中，第一传输场景所需的所述芯片的响应速度大于第二传输场景所需的所述芯片的响应速度。
在一种实现方式中，第一传输场景包括在线游戏场景或视频通话场景，第二传输场景包括在线视频播放场景或电子书阅读场景。
在一种实现方式中，所述方法还包括：
在所述目标时间段之后，进入所述第二休眠模式。在一种实现方式中，所述芯片为无线网WIFI芯片。
第二方面，提供一种控制装置，该装置用于执行上述第一方面或第一方面的任一可能的实现方式中的方法。具体地，该装置可以包括用于执行第一方面及其任意一种可能的实现方式中的控制方法的模块。
第三方面，提供一种芯片，该芯片配置有存储器与处理器。该存储器用于存储指令；该处理器执行该存储器存储的指令，使得该设备执行第一方面及其任意一种可能的实现方式中的控制方法。
第四方面，提供一种设备，该设备配置有第四方面的芯片，该芯片配置有存储器与处理器。该存储器用于存储指令；该处理器执行该存储器存储的指令，使得该设备执行第一方面及其任意一种可能的实现方式中的控制方法。
第五方面，提供了一种程序，该程序在被处理器执行时，用于执行第一方面及其可能的实施方式中的任一方法。
第六方面，提供了一种程序产品，所述程序产品包括：程序代码，当所述程序代码被芯片运行时，使得芯片执行上述第一方面及其可能的实施方式中的任一方法。
第七方面，提供一种计算机可读存储介质，该计算机可读存储介质中存储有指令，当该指令在计算机上运行时，使得计算机执行第一方面及其任意一种可能的实现方式中的控制方法。
本申请在上述各方面提供的实现方式的基础上，还可以进行进一步组合以提供更多实现方式。
附图说明
图1是本申请提供的控制方法的示意性流程图；
图2是方式#1对应的WIFI芯片的功耗随时间变化的曲线图；
图3是方式#2对应的WIFI芯片的功耗随时间变化的曲线图；
图4是方式#3对应的WIFI芯片的功耗随时间变化的曲线图；
图5是WIFI芯片的功耗随时间变化的另一曲线图；
图6为本申请提供的控制装置的结构示意图；
图7为本申请提供的芯片的结构示意图。
具体实施方式
下面将结合附图，对本申请中的技术方案进行描述。
目前，使用WLAN的大多数是便携式设备。由于便携式设备的电池电力有限，为了尽可能节约电池电力，WLAN 802.11协议支持省电模式，在没有数据传输时，WIFI芯片可以关闭自己的天线，即WIFI芯片可能处于两种模式：工作(active)模式或休眠(sleep)模式。active模式下WIFI芯片传输数据，该模式下WIFI芯片的发射功率与传输速率正相关，功耗随着发射功率的增加而增加，active模式下功耗一般会达到几十至一百多毫安。sleep模式下WIFI芯片会关闭天线，同时会定期醒来接收Beacon帧，从而根据Beacon帧判断是否有数据需要传输，sleep模式下一般功耗只有几毫安。active模式进入sleep模式之前有200毫秒(ms)的超时时间，该超时时间由WIFI芯片的内部计数器进行统计，发生数据传输会触发该计数器清零，这段时间WIFI芯片处于空闲(idle)模式，idle模式下的功耗一般会达到几十毫安，远大于sleep模式下的功耗，但低于active模式下的功耗。
在idle模式持续的这段时间内，实际并无有效数据的传输，但对于处于idle模式下的WIFI芯片，其在这段时间内依然会消耗比较大的功耗。
为了降低WIFI芯片的功耗，已知一种解决方案，该方案通过调整idle模式的持续时长，例如，将idle模式的持续时长设置为60ms，即通过减小idle模式的持续时长来降低WIFI芯片的功耗。
然而，由于idle模式的持续时长的大小会影响WIFI芯片的响应速度，例如，当idle模式的持续时长设置较大时，则会使得响应速度提高，但同时也会使得功耗浪费严重；当idle模式的持续时长设置较小时，则会使得功耗浪费得到降低，但同时也会使得响应速度变慢。因此，单纯通过调整idle模式的持续时长难以使得WIFI芯片的功耗与WIFI芯片的性能之间实现较好的平衡。
因此，本申请提供了一种控制方法，以期降低WIFI芯片的功耗。
以下，结合图1至图5，对本申请提供的控制方法200进行详细说明。
图1是本申请提供的控制方法200的示意性流程图。下面，对方法200的每个步骤进行详细说明。
在S210中，在目标时间段内，芯片至少一次进入第一休眠模式，其中，目标时间段内没有数据传输，目标时间段芯片为完成一次数据传输之后的一个时间段，且第一休眠模式的持续时长小于第二休眠模式的持续时长。
一般而言，芯片(例如，WIFI芯片)在active模式下会传输数据，当没有数据传输时，WIFI芯片会进入idle模式，当WIFI芯片在idle模式下持续一段预设时间之后(例如，200ms)，WIFI芯片会进入sleep模式。此处的sleep模式为下文中的sleep模式#2(即，第二休眠模式的一例)。该段预设时间由WIFI芯片的内部计数器(下文中称为“计数器#1”) 进行统计。WIFI芯片在进入sleep模式#2后，一般会定期醒来接收Beacon帧，从而根据Beacon帧判断是否有数据需要传输，如果在计数器#1计时期间再次发生数据传输，则WIFI芯片会再次进入active模式，并会触发计数器#1清零，计数器#1会在完成本次数据传输后重新计时，即重复上述过程。可以看出，在该预设时间段之内，如果在此期间没有数据传输，则WIFI芯片会始终处于idle模式。在idle模式持续的该段预设时间内，实际并无有效数据的传输，但对于处于idle模式下的WIFI芯片，其在该段预设时间内依然会消耗比较大的功耗。
在本申请中，如果在上述预设时间段内的时间段#1(即，目标时间段的一例)内没有数据传输，则WIFI芯片会在时间段#1内至少一次进入sleep模式#1(即，第一休眠模式的一例)，其中，sleep模式#1的持续时长小于sleep模式#2。
此外，根据前面的描述，方法200还可以包括：
S220，在时间段#1之后，WIFI芯片进入sleep模式#2。
具体而言，如果在上述预设时间段内始终没有数据传输，则时间段#1的长度与该预设时间段的长度相等，则WIFI芯片会在时间段#1之后立即进入sleep模式#2。
因此，当没有数据传输时，通过使芯片至少一次进入sleep模式#1，避免芯片在没有数据传输时始终处于idle模式，从而降低芯片的功耗。
下文中将时间段#1内WIFI芯片处于sleep模式#1的时间段称为时间段#1-1。应理解，在时间段#1内，对于WIFI芯片未处于sleep模式#1的时间段(例如，时间段#1-2)，WIFI芯片可以在时间段#1-2内处于idle模式。此时，上述S210还可以通过以下方式实现：
方式#1
在时间段#1内，WIFI芯片在进入sleep模式#1之前，进入空闲模式。
在时间段#1内，WIFI芯片可以在进入sleep模式#1之前，先进入idle模式，例如，WIFI芯片可以启动计数器#2，当计数器#2开始计数时，WIFI芯片进入idle模式，当计数器#2超时时，idle模式结束，其中，计数器#2对应的时间段为时间段#1-2。之后WIFI芯片可以启动计数器#3，当计数器#3开始计数时，WIFI芯片进入sleep模式#1，当计数器#3超时时，sleep模式#1结束，其中，计数器#3对应的时间段为时间段#1-1。图2示出了方式#1对应的WIFI芯片的功耗随时间变化的曲线图。
方式#2
在时间段#1内，WIFI芯片在sleep模式#1结束之后，进入空闲模式。
如图3所示，在时间段#1内，WIFI芯片可以先进入sleep模式#1，并在sleep模式#1结束之后，再进入idle模式，例如，WIFI芯片可以启动计数器#3，当计数器#3开始计数时，WIFI芯片进入sleep模式#1，当计数器#3超时时，sleep模式#1结束，其中，计数器#3对应的时间段为时间段#1-1。之后WIFI芯片可以启动计数器#2，当计数器#2开始计数时，WIFI芯片进入idle模式，当计数器#2超时时，idle模式结束，其中，计数器#2对应的时间段为时间段#1-2。图3示出了方式#2对应的WIFI芯片的功耗随时间变化的曲线图。
方式#3
在时间段#1内，WIFI芯片在进入sleep模式#1之前与在sleep模式#1结束之后，进入空闲模式。
如图4所示，在时间段#1内，WIFI芯片可以在进入sleep模式#1之前，先进入idle 模式，待idle模式结束之后，再进入sleep模式#1，之后待sleep模式#1结束之后，再次进入idle模式，例如，WIFI芯片可以启动计数器#2，当计数器#2开始计数时，WIFI芯片进入idle模式，当计数器#2超时时，idle模式结束，其中，计数器#2对应的时间段为时间段#1-2。之后WIFI芯片可以启动计数器#3，当计数器#3开始计数时，WIFI芯片进入sleep模式#1，当计数器#3超时时，sleep模式#1结束，其中，计数器#3对应的时间段为时间段#1-1。之后WIFI芯片再次启动计数器#2，当计数器#2开始计数时，WIFI芯片进入idle模式，当计数器#2超时时，idle模式结束。图4示出了方式#3对应的WIFI芯片的功耗随时间变化的曲线图。
应理解，本申请仅以WIFI芯片在时间段#1内以上述几种方式进入sleep模式#1作为示例性说明，但本申请并不限定于此，在具体实现时，sleep模式#1与idle模式均可以在时间段#1内周期性开启。
还应理解，在具体实现时，上述计数器#1至计数器#3所实现的计时功能可以由一个计数器实现，或者，也可以由两个或者三个计数器实现，本申请对此不作特别限定。
因此，由于芯片在idle模式下能够传输数据，在没有数据传输时，通过使芯片在处于sleep模式#1之前的一段时间和/或之后的一段时间内处于idle模式，从而在降低芯片功耗的同时保证正常的数据传输。
在方式#1至方式#3中，计数器#2的计时时长可以设置为t 1，代表计数器#2在idle模式的持续时长为t 1，计数器#3的计时时长可以设置为t 2，代表计数器#3在sleep模式#1的持续时长为t 2。其中，t 1与t 2的取值可以根据数据的传输场景确定。
例如，当数据传输场景为传输场景#1(即，第一传输场景的一例)时，t 1的取值可以大于t 2的取值；或者，当数据传输场景为传输场景#2(即，第二传输场景的一例)时，t 1的取值可以小于t 2的取值。t 1与t 2的取值可以由配置有WIFI芯片的电子设备上运行的操作系统进行设置，例如，操作系统可以根据数据的传输场景，为WIFI芯片设置t 1与t 2的取值，以使WIFI芯片可以根据数据的传输场景，为idle模式确定持续时长t 1，为sleep模式#1确定传输时长t 2。
例如，传输场景#1可以包括在线游戏场景或视频通话场景，传输场景#2可以包括在线视频播放场景或电子书阅读场景。通常情况下，传输场景#1对WIFI芯片的响应速度的要求要高于传输场景#2对WIFI芯片的响应速度的要求。此处的WIFI芯片的响应速度可以代表WIFI芯片从其他模式进入active模式的快慢。
此外，还可以使得t 1的取值等于t 2的取值，即使得WIFI芯片在sleep模式#1持续时长与在idle模式的持续时长相等。通过使t 1的取值等于t 2的取值，可以使得WIFI芯片处于idle模式下产生的功耗比在没有数据传输时，WIFI芯片始终处于idle模式下产生的功耗，降低50％。
当t 1的取值等于t 2的取值，且当sleep模式#1与idle模式在时间段#1内周期性开启时，WIFI芯片的功耗随时间变化的曲线图可以如图5所示。
应理解，上述仅以WIFI芯片为例，对降低芯片的功耗的控制方法进行说明，但本申请并不限定于此，例如，方法200还可以适用于其他类型的芯片。
上文结合图1至图5详细介绍了本申请提供的控制方法，下文结合图6至图7详细地描述本申请的提供的控制装置与芯片。
图6为本申请提供的控制装置300的示意性框图，包括处理模块301。
处理模块301，用于在目标时间段内，控制芯片至少一次进入第一休眠模式，其中，所述目标时间段内没有数据传输，所述目标时间段为完成一次数据传输之后的一个时间段，且所述第一休眠模式的持续时长小于第二休眠模式的持续时长。
可选的，处理模块301具体用于：在进入所述第一休眠模式之前，控制芯片进入空闲模式；和/或，在所述第一休眠模式结束之后，控制芯片进入空闲模式。
可选的，所述空闲模式的持续时长为t 1，所述第一休眠模式的持续时长为t 2，处理模块301具体用于：根据数据的传输场景，确定t 1的取值与t 2的取值。
可选的，t 1的取值大于t 2的取值，所述数据的传输场景为第一传输场景；或，t 1的取值小于t 2的取值，所述数据的传输场景为第二传输场景；其中，第一传输场景所需的所述芯片的响应速度大于第二传输场景所需的所述芯片的响应速度。
可选的，第一传输场景包括在线游戏场景或视频通话场景，第二传输场景包括在线视频播放场景或电子书阅读场景。
可选的，处理模块301还用于：在所述目标时间段之后，控制芯片进入所述第二休眠模式。应理解的是，本申请的装置300可以通过专用集成电路(application-specific integrated circuit，ASIC)实现，或可编程逻辑器件(programmable logic device，PLD)实现，上述PLD可以是复杂程序逻辑器件(complex programmable logical device，CPLD)，现场可编程门阵列(field-programmable gate array，FPGA)，通用阵列逻辑(generic array logic，GAL)或其任意组合。也可以通过软件实现图1所示的控制方法，当通过软件实现图1所示的控制方法时，装置300及其各个模块也可以为软件模块。
本申请的装置300可对应于执行本申请实施例中描述的方法，并且装置300中的各个模块的上述和其它操作和/或功能为了实现图1所示方法中的相应流程，为了简洁，在此不再赘述。
图7为本申请提供的芯片的结构示意图。如图7所示，所述设备400包括处理器401、存储器402、通信接口403和总线404。其中，处理器401、存储器402、通信接口403通过总线404进行通信，也可以通过无线传输等其他手段实现通信。该存储器402用于存储指令，该处理器401用于执行该存储器402存储的指令。该存储器402存储程序代码4021，且处理器401可以调用存储器402中存储的程序代码4021执行图1所示的控制方法。
应理解，在本申请中，处理器401可以是CPU，处理器401还可以是其他通用处理器、数字信号处理器(DSP)、专用集成电路(ASIC)、现场可编程门阵列(FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件等。通用处理器可以是微处理器或者是任何常规的处理器等。
该存储器402可以包括只读存储器和随机存取存储器，并向处理器401提供指令和数据。存储器402还可以包括非易失性随机存取存储器。该存储器402可以是易失性存储器或非易失性存储器，或可包括易失性和非易失性存储器两者。其中，非易失性存储器可以是只读存储器(read-only memory，ROM)、可编程只读存储器(programmable ROM，PROM)、可擦除可编程只读存储器(erasable PROM，EPROM)、电可擦除可编程只读存储器(electrically EPROM，EEPROM)或闪存。易失性存储器可以是随机存取存储器(random access memory，RAM)，其用作外部高速缓存。通过示例性但不是限制性说明， 许多形式的RAM可用，例如静态随机存取存储器(static RAM，SRAM)、动态随机存取存储器(DRAM)、同步动态随机存取存储器(synchronous DRAM，SDRAM)、双倍数据速率同步动态随机存取存储器(double data date SDRAM，DDR SDRAM)、增强型同步动态随机存取存储器(enhanced SDRAM，ESDRAM)、同步连接动态随机存取存储器(synchlink DRAM，SLDRAM)和直接内存总线随机存取存储器(direct rambus RAM，DR RAM)。
该总线404除包括数据总线之外，还可以包括电源总线、控制总线和状态信号总线等。但是为了清楚说明起见，在图7中将各种总线都标为总线404。
应理解，根据本申请的芯片400可对应于本申请中的装置300，芯片400中的各个模块的上述和其它操作和/或功能分别为了实现图1中的控制方法的操作步骤，或者，芯片400中的各个模块的上述和其它操作和/或功能分别为了实现图1中的控制方法的操作步骤，为了简洁，在此不再赘述。
上述实施例，可以全部或部分地通过软件、硬件、固件或其他任意组合来实现。当使用软件实现时，上述实施例可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载或执行所述计算机程序指令时，全部或部分地产生按照本申请实施例所述的流程或功能。所述计算机可以为通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包含一个或多个可用介质集合的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质(例如，软盘、硬盘、磁带)、光介质(例如，DVD)、或者半导体介质。半导体介质可以是固态硬盘(solid state drive，SSD)。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统、装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络 单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(Read-Only Memory，ROM)、随机存取存储器(Random Access Memory，RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (19)

  1. 一种控制方法，其特征在于，所述方法由芯片执行，包括：
    在目标时间段内，至少一次进入第一休眠模式，其中，所述目标时间段内没有数据传输，所述目标时间段为所述芯片完成一次数据传输之后的一个时间段，且所述第一休眠模式的持续时长小于第二休眠模式的持续时长。
  2. 根据权利要求1所述的方法，其特征在于，所述至少一次进入第一休眠模式，包括：
    在进入所述第一休眠模式之前，进入空闲模式；和/或，
    在所述第一休眠模式结束之后，进入空闲模式。
  3. 根据权利要求2所述的方法，其特征在于，所述空闲模式的持续时长为t 1，所述第一休眠模式的持续时长为t 2，所述方法还包括：
    根据数据的传输场景，确定t 1的取值与t 2的取值。
  4. 根据权利要求3所述的方法，其特征在于，t 1的取值大于t 2的取值，所述数据的传输场景为第一传输场景；或，t 1的取值小于t 2的取值，所述数据的传输场景为第二传输场景；
    其中，第一传输场景所需的所述芯片的响应速度大于第二传输场景所需的所述芯片的响应速度。
  5. 根据权利要求4所述的方法，其特征在于，第一传输场景包括在线游戏场景或视频通话场景，第二传输场景包括在线视频播放场景或电子书阅读场景。
  6. 根据权利要求1至5中任一项所述的方法，其特征在于，所述方法还包括：
    在所述目标时间段之后，进入所述第二休眠模式。
  7. 根据权利要求1至6中任一项所述的方法，其特征在于，所述芯片为无线网WIFI芯片。
  8. 一种控制装置，其特征在于，包括：
    处理模块，用于在目标时间段内，控制芯片至少一次进入第一休眠模式，其中，所述目标时间段内没有数据传输，所述目标时间段为所述芯片完成一次数据传输之后的一个时间段，且所述第一休眠模式的持续时长小于第二休眠模式的持续时长。
  9. 根据权利要求8所述的装置，其特征在于，所述处理模块具体用于：
    在进入所述第一休眠模式之前，控制所述芯片进入空闲模式；和/或，
    在所述第一休眠模式结束之后，控制所述芯片进入空闲模式。
  10. 根据权利要求9所述的装置，其特征在于，所述空闲模式的持续时长为t 1，所述第一休眠模式的持续时长为t 2，所述处理模块具体用于：
    根据数据的传输场景，确定t 1的取值与t 2的取值。
  11. 根据权利要求10所述的装置，其特征在于，t 1的取值大于t 2的取值，所述数据的传输场景为第一传输场景；或，t 1的取值小于t 2的取值，所述数据的传输场景为第二传输场景；
    其中，第一传输场景所需的所述芯片的响应速度大于第二传输场景所需的所述芯片的 响应速度。
  12. 根据权利要求11所述的装置，其特征在于，第一传输场景包括在线游戏场景或视频通话场景，第二传输场景包括在线视频播放场景或电子书阅读场景。
  13. 根据权利要求8至12中任一项所述的装置，其特征在于，所述处理模块还用于：
    在所述目标时间段之后，控制所述芯片进入所述第二休眠模式。
  14. 一种芯片，其特征在于，包括：
    存储器，用于存储程序代码；
    所述存储器与处理器相连，所述程序代码被所述处理器执行之后，使得所述芯片执行：
    在目标时间段内，至少一次进入第一休眠模式，其中，所述目标时间段内没有数据传输，所述目标时间段为所述芯片完成一次数据传输之后的一个时间段，且所述第一休眠模式的持续时长小于第二休眠模式的持续时长。
  15. 根据权利要求14所述的芯片，其特征在于，所述芯片具体用于执行以下操作：
    在进入所述第一休眠模式之前，进入空闲模式；和/或，
    在所述第一休眠模式结束之后，进入空闲模式。
  16. 根据权利要求15所述的芯片，其特征在于，所述空闲模式的持续时长为t 1，所述第一休眠模式的持续时长为t 2，所述芯片具体用于执行以下操作：
    根据数据的传输场景，确定t 1的取值与t 2的取值。
  17. 根据权利要求16所述的芯片，其特征在于，t 1的取值大于t 2的取值，所述数据的传输场景为第一传输场景；或，t 1的取值小于t 2的取值，所述数据的传输场景为第二传输场景；
    其中，第一传输场景所需的所述芯片的响应速度大于第二传输场景所需的所述芯片的响应速度。
  18. 根据权利要求17所述的芯片，其特征在于，第一传输场景包括在线游戏场景或视频通话场景，第二传输场景包括在线视频播放场景或电子书阅读场景。
  19. 根据权利要求14至18中任一项所述的芯片，其特征在于，所述程序代码被所述处理器执行之后，使得所述芯片还执行：
    在所述目标时间段之后，进入所述第二休眠模式。
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