WO2021026868A1 - Methods and apparatus to recover a mobile device when a command-mode panel timing synchronization signal is lost - Google Patents

Methods and apparatus to recover a mobile device when a command-mode panel timing synchronization signal is lost Download PDF

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Publication number
WO2021026868A1
WO2021026868A1 PCT/CN2019/100745 CN2019100745W WO2021026868A1 WO 2021026868 A1 WO2021026868 A1 WO 2021026868A1 CN 2019100745 W CN2019100745 W CN 2019100745W WO 2021026868 A1 WO2021026868 A1 WO 2021026868A1
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WIPO (PCT)
Prior art keywords
mode
display
display panel
video
operating
Prior art date
Application number
PCT/CN2019/100745
Other languages
French (fr)
Inventor
Nan Zhang
Yongjun XU
Qi Zeng
Original Assignee
Qualcomm Incorporated
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Publication date
Application filed by Qualcomm Incorporated filed Critical Qualcomm Incorporated
Priority to PCT/CN2019/100745 priority Critical patent/WO2021026868A1/en
Publication of WO2021026868A1 publication Critical patent/WO2021026868A1/en

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006Details of the interface to the display terminal
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/12Synchronisation between the display unit and other units, e.g. other display units, video-disc players
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00Aspects of display data processing
    • G09G2340/04Changes in size, position or resolution of an image
    • G09G2340/0407Resolution change, inclusive of the use of different resolutions for different screen areas
    • G09G2340/0435Change or adaptation of the frame rate of the video stream
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00Aspects of data communication
    • G09G2370/04Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00Aspects of data communication
    • G09G2370/14Use of low voltage differential signaling [LVDS] for display data communication

Definitions

  • the present disclosure relates generally to processing systems and, more particularly, to one or more techniques for display or graphics processing.
  • GPUs graphics processing unit
  • Such computing devices may include, for example, computer workstations, mobile phones, such as so-called smartphones, embedded systems, personal computers, tablet computers, and video game consoles.
  • GPUs execute a graphics processing pipeline that includes one or more processing stages that operate together to execute graphics processing commands and output a frame.
  • a central processing unit may control the operation of the GPU by issuing one or more graphics processing commands to the GPU.
  • Modern day CPUs are typically capable of concurrently executing multiple applications, each of which may need to utilize the GPU during execution.
  • An electronic device may execute a program to present graphics content on a display.
  • an electronic device may execute a user interface application, video game application, and the like.
  • the apparatus may be a display processor, a display processing unit (DPU) , a graphics processing unit (GPU) , or a video processor (sometimes generally referred to as a “host processor” ) .
  • the apparatus can monitor for a display timeout exception associated with a display panel in a command-mode. Additionally, the apparatus can determine whether a transmission timeout occurred in response to detecting a display timeout exception. The apparatus can also perform a display panel check in response to determining that the transmission timeout occurred. Additionally, the apparatus can switch the display panel from operating in the command-mode to a video-mode based on the display panel check.
  • the transmission timeout may occur in response to the apparatus determining that a transmission timer expired and a previous frame was not successfully transmitted.
  • the apparatus can perform the display panel check by attempting to read a register of the display panel. In certain such examples, the apparatus can switch the display from operating in the command-mode to the video-mode upon determining that the register was unsuccessfully read. In some examples the apparatus can perform the display panel check by attempting to read a pin signal of a serial connection from the display panel, where the host processor and the display panel communicate via the serial connection. In certain such examples, the apparatus can switch the display panel from operating in the command-mode to the video-mode upon determining that the pin signal of the serial connection was unsuccessfully read.
  • the apparatus can determine whether a transmission timeout count satisfies a display mode switching threshold when the display panel check indicates that the display panel is active. In certain such examples, the apparatus can switch the display panel to the video-mode when the transmission timeout count satisfies the display mode switching threshold. The apparatus can also increment the transmission timeout count when the transmission timeout count is less than the display mode switching threshold. Also, the apparatus can reset the host processor when the transmission timeout count is less than the display mode switching threshold. Additionally, the apparatus can reset the host processor and the display panel when the display panel check indicates that the display panel is inactive. The apparatus can also detect a display suspend operation.
  • the apparatus can switch the display panel from operating in the video-mode to the command-mode at a display resume operation following the display suspend operation when the display panel is operating in the video-mode and a video-mode count satisfies a video-mode threshold. Additionally, the apparatus can increment the video-mode count at the display resume operation. Also, the apparatus can maintain operation of the display panel in the video-mode when the video-mode count is greater than or equal to the video-mode threshold.
  • FIG. 1 is a block diagram that illustrates an example content generation system, in accordance with one or more techniques of this disclosure.
  • FIG. 2 is a block diagram that illustrates an example display panel system, in accordance with one or more techniques of this disclosure.
  • FIG. 3 is a block diagram that illustrates an example display panel system, in accordance with one or more techniques of this disclosure.
  • FIGs. 4 and 5 illustrate example flowcharts of example methods, in accordance with one or more techniques of this disclosure.
  • Example techniques disclosed herein provide a host processor-based solution for when a synchronization signal (such as a tearing effect (TE) signal) is lost.
  • a display panel may operate in a command-mode, which utilizes a TE signal received from the display panel to determine when to transmit data for the next frame.
  • the display panel may become unsynchronized as data may be written to a frame buffer too fast (e.g., data in the frame buffer is being updated before the corresponding image is being displayed) or may be written to the frame buffer too slow.
  • the TE signal is typically transmitted over a pin of a bus connecting the display panel and the host processor, it may be possible for the TE signal to be lost due to a bad physical connection of the TE pin.
  • Example techniques disclosed herein monitor for display exceptions related to transmission timeouts that may correspond to a loss of TE signal.
  • disclosed techniques may switch the display panel from command-mode to video-mode as video-mode may not utilize a TE signal.
  • disclosed techniques may maintain a count related to the number of times a transmission timeout is detected and switch the display panel from the command-mode to the video-mode when the count satisfies a corresponding threshold (e.g., the count is greater than (or equal to) the corresponding threshold) .
  • the disclosed techniques may maintain a count related to the number of times that the display panel has been switched to the video-mode (e.g., due to transmission timeouts) and update the default display mode of the display panel to the video-mode when the count satisfies a corresponding threshold (e.g., the count is greater than (or equal to) the corresponding threshold) .
  • a corresponding threshold e.g., the count is greater than (or equal to) the corresponding threshold
  • processors include microprocessors, microcontrollers, graphics processing units (GPUs) , general purpose GPUs (GPGPUs) , central processing units (CPUs) , application processors, digital signal processors (DSPs) , reduced instruction set computing (RISC) processors, systems-on-chip (SOC) , baseband processors, application specific integrated circuits (ASICs) , field programmable gate arrays (FPGAs) , programmable logic devices (PLDs) , state machines, gated logic, discrete hardware circuits, and other suitable hardware configured to perform the various functionality described throughout this disclosure.
  • processors include microprocessors, microcontrollers, graphics processing units (GPUs) , general purpose GPUs (GPGPUs) , central processing units (CPUs) , application processors, digital signal processors (DSPs) , reduced instruction set computing (RISC) processors, systems-on-chip (SOC) , baseband processors, application specific integrated circuits (ASICs) ,
  • One or more processors in the processing system may execute software.
  • Software can be construed broadly to mean instructions, instruction sets, code, code segments, program code, programs, subprograms, software components, applications, software applications, software packages, routines, subroutines, objects, executables, threads of execution, procedures, functions, etc., whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise.
  • the term application may refer to software.
  • one or more techniques may refer to an application, i.e., software, being configured to perform one or more functions.
  • the application may be stored on a memory, e.g., on-chip memory of a processor, system memory, or any other memory.
  • Hardware described herein such as a processor may be configured to execute the application.
  • the application may be described as including code that, when executed by the hardware, causes the hardware to perform one or more techniques described herein.
  • the hardware may access the code from a memory and execute the code accessed from the memory to perform one or more techniques described herein.
  • components are identified in this disclosure.
  • the components may be hardware, software, or a combination thereof.
  • the components may be separate components or sub-components of a single component.
  • the functions described may be implemented in hardware, software, or any combination thereof. If implemented in software, the functions may be stored on or encoded as one or more instructions or code on a computer-readable medium.
  • Computer-readable media includes computer storage media. Storage media may be any available media that can be accessed by a computer.
  • such computer-readable media can comprise a random access memory (RAM) , a read-only memory (ROM) , an electrically erasable programmable ROM (EEPROM) , optical disk storage, magnetic disk storage, other magnetic storage devices, combinations of the aforementioned types of computer-readable media, or any other medium that can be used to store computer executable code in the form of instructions or data structures that can be accessed by a computer.
  • RAM random access memory
  • ROM read-only memory
  • EEPROM electrically erasable programmable ROM
  • optical disk storage magnetic disk storage
  • magnetic disk storage other magnetic storage devices
  • combinations of the aforementioned types of computer-readable media or any other medium that can be used to store computer executable code in the form of instructions or data structures that can be accessed by a computer.
  • this disclosure describes techniques for having a graphics processing pipeline in a single device or multiple devices, improving the rendering of graphical content, and/or reducing the load of a processing unit, i.e., any processing unit configured to perform one or more techniques described herein, such as a GPU.
  • a processing unit i.e., any processing unit configured to perform one or more techniques described herein, such as a GPU.
  • this disclosure describes techniques for graphics processing in any device that utilizes graphics processing. Other example benefits are described throughout this disclosure.
  • instances of the term “content” may refer to “graphical content, ” “image, ” and vice versa. This is true regardless of whether the terms are being used as an adjective, noun, or other parts of speech.
  • the term “graphical content” may refer to a content produced by one or more processes of a graphics processing pipeline.
  • the term “graphical content” may refer to a content produced by a processing unit configured to perform graphics processing.
  • the term “graphical content” may refer to a content produced by a graphics processing unit.
  • the term “display content” may refer to content generated by a processing unit configured to perform displaying processing.
  • the term “display content” may refer to content generated by a display processing unit.
  • Graphical content may be processed to become display content.
  • a graphics processing unit may output graphical content, such as a frame, to a buffer (which may be referred to as a framebuffer) .
  • a display processing unit may read the graphical content, such as one or more frames from the buffer, and perform one or more display processing techniques thereon to generate display content.
  • a display processing unit may be configured to perform composition on one or more rendered layers to generate a frame.
  • a display processing unit may be configured to compose, blend, or otherwise combine two or more layers together into a single frame.
  • a display processing unit may be configured to perform scaling, e.g., upscaling or downscaling, on a frame.
  • a frame may refer to a layer.
  • a frame may refer to two or more layers that have already been blended together to form the frame, i.e., the frame includes two or more layers, and the frame that includes two or more layers may subsequently be blended.
  • FIG. 1 is a block diagram that illustrates an example content generation system 100 configured to implement one or more techniques of this disclosure.
  • the content generation system 100 includes a device 104.
  • the device 104 may include one or more components or circuits for performing various functions described herein.
  • one or more components of the device 104 may be components of an SOC.
  • the device 104 may include one or more components configured to perform one or more techniques of this disclosure.
  • the device 104 may include a processing unit 120 and a system memory 124.
  • the device 104 can include a number of optional components, e.g., a communication interface 126, a transceiver 132, a receiver 128, a transmitter 130, a display processor 127, and one or more displays 131.
  • the display 131 may refer to the one or more displays 131.
  • the display 131 may include a single display or multiple displays.
  • the display 131 may include a first display and a second display.
  • the first display may be a left-eye display and the second display may be a right-eye display.
  • the first and second display may receive different frames for presentment thereon.
  • the first and second display may receive the same frames for presentment thereon.
  • the results of the graphics processing may not be displayed on the device, e.g., the first and second display may not receive any frames for presentment thereon. Instead, the frames or graphics processing results may be transferred to another device. In some aspects, this can be referred to as split-rendering.
  • the processing unit 120 may include an internal memory 121.
  • the processing unit 120 may be configured to perform graphics processing, such as in a graphics processing pipeline 107.
  • the device 104 may include a display processor, such as the display processor 127, to perform one or more display processing techniques on one or more frames generated by the processing unit 120 before presentment by the one or more displays 131.
  • the display processor 127 may be configured to perform one or more display processing techniques on one or more frames generated by the processing unit 120.
  • the one or more displays 131 may be configured to display or otherwise present frames processed by the display processor 127.
  • the one or more displays 131 may include one or more of: a liquid crystal display (LCD) , a plasma display, an organic light emitting diode (OLED) display, a projection display device, an augmented reality display device, a virtual reality display device, a head-mounted display, or any other type of display device.
  • the one or more displays 131 may include video-mode panels and/or command-mode panels.
  • a video-mode panel may be configured to operate in a video-mode
  • a command-mode panel may be configured to operate in a video-mode or a command-mode.
  • a display panel operating in the video-mode may be configured to display a real-time stream of image data
  • a display panel operating in the command-mode may be configured to display the image data based on a synchronization signal.
  • Memory external to the processing unit 120 may be accessible to the processing unit 120.
  • the processing unit 120 may be configured to read from and/or write to external memory, such as the system memory 124.
  • the processing unit 120 may be communicatively coupled to the system memory 124 over a bus. In some examples, the processing unit 120 may be communicatively coupled to each other over the bus or a different connection.
  • the system memory 124 may be configured to store received encoded or decoded graphical content.
  • the processing unit 120 may include and/or be in communication with a content encoder/decoder configured to receive encoded or decoded graphical content, e.g., from the system memory 124 and/or the communication interface 126, in the form of encoded pixel data.
  • the content encoder/decoder may be configured to encode or decode any graphical content.
  • the internal memory 121 or the system memory 124 may include one or more volatile or non-volatile memories or storage devices.
  • the internal memory 121 or the system memory 124 may include RAM, SRAM, DRAM, erasable programmable ROM (EPROM) , electrically erasable programmable ROM (EEPROM) , flash memory, a magnetic data media or an optical storage media, or any other type of memory.
  • the internal memory 121 or the system memory 124 may be a non-transitory storage medium according to some examples.
  • the term “non-transitory” may indicate that the storage medium is not embodied in a carrier wave or a propagated signal. However, the term “non-transitory” should not be interpreted to mean that the internal memory 121 or the system memory 124 is non-movable or that its contents are static. As one example, the system memory 124 may be removed from the device 104 and moved to another device. As another example, the system memory 124 may not be removable from the device 104.
  • the processing unit 120 may be a central processing unit (CPU) , a graphics processing unit (GPU) , a general purpose GPU (GPGPU) , or any other processing unit that may be configured to perform graphics processing.
  • the processing unit 120 may be integrated into a motherboard of the device 104.
  • the processing unit 120 may be present on a graphics card that is installed in a port in a motherboard of the device 104, or may be otherwise incorporated within a peripheral device configured to interoperate with the device 104.
  • the processing unit 120 may include one or more processors, such as one or more microprocessors, GPUs, application specific integrated circuits (ASICs) , field programmable gate arrays (FPGAs) , arithmetic logic units (ALUs) , digital signal processors (DSPs) , discrete logic, software, hardware, firmware, other equivalent integrated or discrete logic circuitry, or any combinations thereof. If the techniques are implemented partially in software, the processing unit 120 may store instructions for the software in a suitable, non-transitory computer-readable storage medium, e.g., internal memory 121, and may execute the instructions in hardware using one or more processors to perform the techniques of this disclosure. Any of the foregoing, including hardware, software, a combination of hardware and software, etc., may be considered to be one or more processors.
  • processors such as one or more microprocessors, GPUs, application specific integrated circuits (ASICs) , field programmable gate arrays (FPGAs) , arithmetic logic units (A
  • the content generation system 100 can include a communication interface 126.
  • the communication interface 126 may include a receiver 128 and a transmitter 130.
  • the receiver 128 may be configured to perform any receiving function described herein with respect to the device 104. Additionally, the receiver 128 may be configured to receive information, e.g., eye or head position information, rendering commands, or location information, from another device.
  • the transmitter 130 may be configured to perform any transmitting function described herein with respect to the device 104. For example, the transmitter 130 may be configured to transmit information to another device, which may include a request for content.
  • the receiver 128 and the transmitter 130 may be combined into a transceiver 132. In such examples, the transceiver 132 may be configured to perform any receiving function and/or transmitting function described herein with respect to the device 104.
  • the processing unit 120 and/or the graphics processing pipeline 107 may include a display recovery component 198 configured to monitor for a display timeout exception associated with a display panel (e.g., the display 131 and/or the display panel 310 of FIG. 3) operating in a command-mode.
  • the display recovery component 198 can also be configured to determine whether a transmission timeout occurred in response to detecting a display timeout exception.
  • the display recovery component 198 can also be configured to perform a display panel check in response to determining that the transmission timeout occurred.
  • the display recovery component 198 can also be configured to switch the display panel from operating in the command-mode to a video-mode based on the display panel check.
  • the display recovery component 198 can also be configured to perform the display panel check by attempting to read a register of the display panel.
  • the display recovery component 198 can also be configured to switch the display from operating in the command-mode to the video-mode upon determining that the register was unsuccessfully read.
  • the display recovery component 198 can also be configured to perform the display panel check by attempting to read a pin signal of a serial connection from the display panel to a host processor (e.g., the processing unit 120 and/or the host processor 305 of FIG. 1) , where the host processor and the display panel communicate via the serial connection.
  • the display recovery component 198 can also be configured to switch the display panel from operating in the command-mode to operating in the video-mode upon determining that the pin signal of the serial connection was unsuccessfully read.
  • the display recovery component 198 can also be configured to determine whether a transmission timeout count satisfies a display mode switching threshold when the display panel check indicates that the display panel is active.
  • the display recovery component 198 can also be configured to switch the display panel to the video-mode when the transmission timeout count satisfies the display mode switching threshold.
  • the display recovery component 198 can also be configured to increment the transmission timeout count when the transmission timeout count is less than the display mode switching threshold.
  • the display recovery component 198 can also be configured to reset the host processor when the transmission timeout count is less than the display mode switching threshold.
  • the display recovery component 198 can also be configured to reset the host processor and the display panel when the display panel check indicates that the display panel is inactive.
  • the display recovery component 198 can also be configured to detect a display suspend operation.
  • the display recovery component 198 can also be configured to switch the display panel from operating in the video-mode to operating in the command-mode at a display resume operation following the display suspend operation when the display panel is operating in the video-mode and a video-mode count satisfies a video-mode threshold.
  • the display recovery component 198 can also be configured to increment the video-mode count at the display resume operation.
  • the display recovery component 198 can also be configured to maintain operation of the display panel in the video-mode when the video-mode count is greater than or equal to the video-mode threshold.
  • a device such as the device 104, may refer to any device, apparatus, or system configured to perform one or more techniques described herein.
  • a device may be a server, a base station, user equipment, a client device, a station, an access point, a computer, e.g., a personal computer, a desktop computer, a laptop computer, a tablet computer, a computer workstation, or a mainframe computer, an end product, an apparatus, a phone, a smart phone, a server, a video game platform or console, a handheld device, e.g., a portable video game device or a personal digital assistant (PDA) , a wearable computing device, e.g., a smart watch, an augmented reality device, or a virtual reality device, a non-wearable device, a display or display device, a television, a television set-top box, an intermediate network device, a digital media player, a video streaming device, a content streaming device, an in-car
  • PDA personal digital
  • Displays used in mobile devices can utilize video-mode panels or command-mode panels.
  • Video-mode panels can receive display lines or a group of pixels from a host processor in order to be displayed on the display screen.
  • Command-mode panels can include memory or RAM inside the panel.
  • the host processor can process the display lines or pixels and store the information in the memory.
  • the command-mode panels can then retrieve the layer or pixel information from the memory.
  • video-mode panels may be manufactured at a reduced cost compared to command-mode panels, but command-mode panels may function more efficiently.
  • a device e.g., a smartphone
  • FIG. 2 is a block diagram that illustrates an example display panel system 200, in accordance with one or more techniques of this disclosure.
  • the display panel system 200 may operate in a video-mode.
  • the example display panel system 200 includes a host processor 205 (or application processor) and a display panel 210, which communicate via communication bus ( “bus” ) 250.
  • the host processor 205 may send image data to the display panel 210 via the bus 250, and the host processor 205 and the display panel 210 may send control information via the bus 250.
  • the example host processor 205 of FIG. 2 includes a timing controller 220, a frame buffer 230, and a bus interface 240.
  • the timing controller 220 is in communication with the frame buffer 230 and may use synchronization signals to control the transfer of data from the frame buffer 230 to the bus interface 240.
  • the frame buffer 230 may receive image data 225, may temporarily store the image data 225, and may provide the image data 225 to the bus interface 240.
  • the image data 225 may include pixel information of a series of frames to be transferred to the display panel 210.
  • the host processor 205 may be implemented as one or more electronic hardware processors, such as the example processing unit 120 of FIG. 1.
  • the example host processor 205 of FIG. 2 includes the frame buffer 230, it should be appreciated that in additional or alternative examples, the host processor 205 may be in communication with the frame buffer 230.
  • the bus interface 240 is coupled to the bus 250, which is coupled to a bus interface 260 of the display panel 210.
  • the bus 250 may be implemented by a flexible panel cable facilitating communication between the host processor 205 and the display panel 210.
  • the display panel 210 includes the bus interface 260, which is coupled to the bus 250, and is configured to receive image data from the host processor 205 (e.g., the image data 225 via the frame buffer 230 and the bus interface 240) .
  • the display panel 210 of FIG. 2 also includes a display driver 270 and a display screen 290. It should be appreciated that the display panel 210 and/or the display screen 290 may be implemented as one or more displays, such as the example display (s) 131 of FIG. 1.
  • the display screen 290 includes a plurality of pixel elements for displaying image data.
  • the display driver 270 is coupled to the bus interface 260 and the display screen 290. It should be appreciated that the display driver 270 may be implemented as one or more components, such as the example display processor 127 of FIG. 1.
  • the display panel system 200 may operate in video-mode.
  • the image data 225 is transmitted from the host processor 205 to the display panel 210 as a real-time pixel stream.
  • the host processor 205 may refresh the image data 225 continuously at the display panel 210.
  • the host processor 205 may provide video data (e.g., pixel values) and synchronization information.
  • Operating in video-mode may be useful for display panels that do not include a frame buffer to store frames (e.g., the example display panel 210 of FIG. 2) .
  • the host processor 205 may transfer the image data 225 from the frame buffer 230 over the bus interface 240 and the bus 250 at a video rate, such as sixty (60) frames per second.
  • the display driver 270 may read the series of frames of image data 225 from the bus interface 260 and write the frames to the display screen 290.
  • Command-mode panels are used increasingly in the market (e.g., for use in smartphones or other display devices) as they offer power saving benefits. For example, because a command-mode panel includes a frame buffer, the host processor may not need to continuously refresh the display while the command-mode panel is operating in the command-mode, as is the case for a video-mode panel and/or a command-mode panel operating in the video-mode.
  • a display panel operating in video-mode utilizes real-time streaming and displaying of images
  • a display panel operating in command-mode utilizes a synchronization signal to prevent screen tearing.
  • Screen tearing may occur when the write time for data and the display time for the written data become out of synchronization. For example, tearing may occur when data is written out faster or written out slower to the frame buffer than the scan rate.
  • command-mode panels operating in the command-mode may utilize local frame buffers at the display panel, there is a possibility of data for a frame N+1 being written into the frame buffer before the data for a previous frame N being displayed, resulting in the screen tear.
  • display panels operating in the command-mode may utilize a synchronization signal.
  • the synchronization signal (sometimes referred to as a “tearing effect (TE) signal” or a “VSYNC (vertical synchronization) signal” ) is provided from the display panel to the host processor.
  • the display panel may generate the TE signal (e.g., at 16.667ms intervals for 60Hz panels) to notify the host processor that the display panel has completed drawing the image stored in the frame buffer and that the host processor should start sending the next frame to the display panel.
  • the host processor may use the TE signal to make sure that data is not written into the frame buffer of the display panel before data in the frame buffer has been read.
  • the TE signal is used for maintaining image quality for display panels operating in command-mode.
  • the TE signal is typically carried over a pin of a bus between the display panel and the host processor.
  • the bus may be a flexible panel cable facilitating communication between the display panel and the host processor.
  • the bus may include a TE signal pin for transmitting the TE signal from the display panel to the host processor.
  • the bus may include additional or alternative pins and/or signals, such as a power pin to signal whether the display panel is receiving power and/or data and command pins for transmitting data between the host processor and the display panel, etc.
  • a physical connector e.g., a pin
  • cable it may be possible for the physical connection to become loose or disconnected. For example, dropping the device, hitting the device against a hard surface, and/or heating the device may cause the TE pin to become loose.
  • other connectors of the cable such as a display serial interface (DSI) pin or a power pin may remain connected.
  • DSI display serial interface
  • data, commands, and/or power may be provided to the display panel, but the host processor and the display panel may not be synchronized.
  • Example techniques disclosed herein utilize a host-processor-based solution for addressing a loose TE pin or a lost TE signal.
  • a “lost TE signal” refers to instances when the TE signal is not being received by the host processor, but the display panel is “alive” or active (e.g., is receiving data, commands, and/or power) .
  • techniques disclosed herein monitor for display exceptions (or errors) , including, for example, transmission timeouts.
  • a transmission timeout may occur after a period (or a transmission timer) expires and a previous frame was not successfully transmitted.
  • a “ping pong” timeout may occur after 84ms if the previous frame (e.g., frame N-1) was not successfully transmitted during the 84ms.
  • disclosed techniques may determine whether the display panel is alive (e.g., is receiving data, commands, and/or power) . For example, disclosed techniques may attempt to read a register of the display panel and/or read a pin signal from the display panel (e.g., the power pin) . In certain such examples, if the display panel is determined to be alive, disclosed techniques may switch the display panel from operating in the command-mode to operating in the video-mode. As described above, the display panel operating in the video-mode does not use a TE signal to synchronize between the host processor and the display panel and, thus, the displaying of the image on the device remains consistent and provides a consistent user experience.
  • the display panel operating in the video-mode does not use a TE signal to synchronize between the host processor and the display panel and, thus, the displaying of the image on the device remains consistent and provides a consistent user experience.
  • techniques disclosed herein may switch the display panel from operating in the command-mode to operating in the video-mode after determining that a threshold number of transmission timeouts have been detected. For example, it may be acceptable to allow a frame (or less than the threshold number of frames) to drop (or for the display panel and the host processor to be out of synchronization) , but if a threshold number of transmission timeouts are detected, then it may be beneficial to switch the display panel to operating in the video-mode.
  • FIG. 3 is a block diagram that illustrates an example display panel system 300, in accordance with one or more techniques of this disclosure.
  • the display panel system 300 may operate in a command-mode or in a video-mode.
  • the example display panel system 300 includes a host processor 305 (or application processor) and a display panel 310, which communicate via communication bus ( “bus” ) 350.
  • the host processor 305 may send image data to the display panel 310 via the bus 350
  • the host processor 305 and the display panel 310 may send control information via the bus 350.
  • the example host processor 305 of FIG. 3 includes a timing controller 320, a frame buffer 330, and a bus interface 340.
  • the timing controller 320 is in communication with the frame buffer 330 and may use synchronization signals to control the transfer of data from the frame buffer 330 to the bus interface 340.
  • the frame buffer 330 may receive image data 325, may temporarily store the image data 325, and may provide the image data 325 to the bus interface 340.
  • the image data 325 may include pixel information of a series of frames to be transferred to the display panel 310.
  • the host processor 305 may be implemented as one or more electronic hardware processors, such as the example processing unit 120 of FIG. 1 and/or the host processor 205 of FIG. 2.
  • the example host processor 305 of FIG. 3 includes the frame buffer 330, it should be appreciated that in additional or alternative examples, the host processor 305 may be in communication with the frame buffer 330.
  • the bus interface 340 is coupled to the bus 350, which is coupled to a bus interface 360 of the display panel 310.
  • the bus 350 may be implemented by a flexible panel cable facilitating communication between the host processor 305 and the display panel 310.
  • the display panel 310 includes the bus interface 360, which is coupled to the bus 350, and is configured to receive image data from the host processor 305 (e.g., the image data 325 via the frame buffer 330 and the bus interface 340) .
  • the display panel 310 of FIG. 3 also includes a display controller 380, a frame buffer 385, and a display screen 390. It should be appreciated that the display panel 310 and/or the display screen 390 may be implemented as one or more displays, such as the example display (s) 131 of FIG. 1.
  • the display screen 390 includes a plurality of pixel elements for displaying image data.
  • the display controller 380 is coupled to the bus interface 360, is coupled to the display screen 390, and is also coupled to the frame buffer 385, which is coupled to the display screen 390. It should be appreciated that the display controller 380 may be implemented as one or more components, such as the example display processor 127 of FIG. 1 and/or the display driver 270 of FIG. 2.
  • the display panel system 300 may operate in command-mode or video-mode.
  • the image data 325 is transmitted from the host processor 305 to the display panel 310 as a real-time pixel stream, as described above in connection with the display panel system 200 of FIG. 2.
  • the display controller 380 may receive the image data 325 from the bus interface 360 and write the image data 325 to the display screen 390.
  • image data is transmitted via commands and data.
  • the host processor 305 can transfer the image data 325 over the bus interface 340 and the bus 350.
  • the display controller 380 may read the image data 325 (from the bus interface 360) and temporarily store the image data 325 in the frame buffer 385.
  • the display controller 380 may also write the image data 325 in the frame buffer 385 to the display screen 390.
  • image data transmitted over the bus while the display panel system is operating in the video mode may facilitate the real-time streaming of the image data (e.g., by the display driver 270 of FIG. 2 writing the received image data 225 to the display screen 290)
  • the image data is received and temporarily stored in the frame buffer 385 until the display screen 390 is available for displaying the image data.
  • the bus 350 includes a plurality of signals and/or pins.
  • the bus 350 includes a TE signal 350a that represents a synchronization signal provided by the display panel 310 to the host processor 305.
  • the host processor 305 may determine when to start to transfer the image data 325 to the display panel 310 and the frame buffer 385 while the display panel system 300 is operating in the command-mode.
  • the host processor 305 waits to receive the next TE signal 350a to transfer the next frame (e.g., frame N+1) .
  • the example bus 350 of FIG. 3 also includes a power pin 350n that indicates when power is being provided to the display panel 310.
  • the host processor 305 also includes a display mode handler 398.
  • the display mode handler 398 manages the display mode of the display panel 310.
  • the display mode handler 398 may switch the display panel 310 from operating in the video-mode to operating in the command-mode, may switch the display panel 310 from operating in the command-mode to operating in the video-mode, may set the default display mode of the display panel 310 to the video-mode, and/or may set the default display mode of the display panel 310 to the command-mode.
  • the example display mode handler 398 facilitates switching the display mode of the display panel 310 from operating in the command-mode to operating in the video-mode when the TE signal 350a is lost. For example, the display mode handler 398 may determine that the display panel 310 is alive and that a threshold quantity of transmission timeouts have occurred, which may indicate that the TE signal 350a is lost. In certain such examples, the display mode handler 398 may cause the display panel 310 to switch from operating in the command-mode to operating in the video-mode. As described above, image data is transferred differently in video-mode than compared to command-mode.
  • the TE signal 350a is not needed for displaying the image data 325 as the host processor 305 provides the image data 325 for the display panel 310 to display in real-time (e.g., without storing the image data in a frame buffer first) .
  • the display mode handler 398 may set a default display mode of the display panel 310.
  • the display mode handler 398 may set an initial default display mode of the display panel 310 to be command-mode. Accordingly, the host processor 305 and the display panel 310 may synchronize the transfer of the image data 325 based on the TE signal 350a. For example, the host processor 305 may wait to receive the TE signal 350a prior to transferring the image data 325 to the display panel 310.
  • the display mode handler 398 may also monitor display exceptions associated with the display panel 310. For example, the display mode handler 398 may monitor for transmission timeouts, power supply errors, and/or display pixel errors. In some examples, the display mode handler 398 may attempt to handle any non-transmission timeout display exceptions using any known exception handling techniques.
  • the display mode handler 398 may determine that a transmission timeout occurred.
  • a transmission timeout may occur in response to determining that a transmission timer expired and a previous frame was not successfully transmitted.
  • the transmission timeout may be indicated by a ping pong timeout signal or a control start timeout signal.
  • the display mode handler 398 may perform a display panel check to determine whether the display panel 310 is alive or active. For example, the display mode handler 398 may attempt to read a register of the display panel 310 to determine whether the display panel 310 is alive (e.g., is receiving data, commands, and/or power) . In some examples, the display mode handler 398 may attempt to read a pin signal of the bus 350 to determine whether the display panel 310 is alive. In certain such examples, the display mode handler 398 may use the result of the display panel check as an indication of whether the display panel 310 is alive.
  • the display mode handler 398 may determine that the display panel 310 is not alive. In some examples, if the display mode handler 398 is unable to read a pin signal (e.g., the power pin 350n) , the display mode handler 398 may determine that the display panel 310 is not alive.
  • a pin signal e.g., the power pin 350n
  • the display mode handler 398 may maintain a counter representing the number of times a transmission timeout occurred (e.g., a transmission timeout counter) . For example, when the display mode handler 398 detects a transmission timeout occurred, the display mode handler 398 may increment the count of the transmission timeout counter.
  • the display mode handler 398 may maintain a counter representing the number of times that the display panel 310 switched from operating in the command-mode to operating in the video-mode (e.g., a switching counter) . For example, when the display mode handler 398 switches the display panel 310 from operating in the command-mode to operating in the video-mode, the display mode handler 398 may increment the count of the switching counter.
  • a switching counter representing the number of times that the display panel 310 switched from operating in the command-mode to operating in the video-mode.
  • the display mode handler 398 may compare the transmission timeout count to a display mode switching threshold. For example, the display mode handler 398 may determine whether the transmission timeout count satisfies the display mode switching threshold (e.g., the transmission timeout count is greater than (or equal to) the display mode switching threshold) . It should be appreciated that the value of the display mode switching threshold may be any reasonable value greater than zero. In some examples, the display mode switching threshold may be a predetermined value.
  • the display mode switching threshold may be a dynamic value that varies based on, for example, a power level of the device, the operating mode of the display panel system 300 and/or the device 104, an application, etc.
  • the display mode switching threshold may be a relatively low value (e.g., 1) when the display panel system 300 and/or the device 104 is operating in a factory mode or a recovery mode, and the display mode switching threshold may be a relatively high value (e.g., 5) when the display panel system 300 and/or the device 104 is operating in a normal mode.
  • the display mode handler 398 may switch the display panel 310 from operating in the command-mode to operating in the video-mode when the transmission timeout count satisfies the display mode switching threshold. As described above, when operating in the video-mode, the display panel 310 does not provide a synchronization signal (e.g., the TE signal 350a) to the host processor 305 and, thus, the image data may be displayed without risks of screen tearing occurring.
  • a synchronization signal e.g., the TE signal 350a
  • the display mode handler 398 may change the default display mode of the display panel 310. For example, if the switching count satisfies (e.g., is greater than (or equal to) ) a video-mode default threshold, the display mode handler 398 may change the default display mode of the display panel 310 to the video-mode. Changing the default display mode may be beneficial as the display mode handler 398 determined that the display panel was being switched to the video-mode a threshold number of time (s) and, thus, it may be more efficient to start the display panel operating in the video-mode for subsequent image frames.
  • a threshold number of time s
  • the display mode handler 398 may perform a reset of the host processor 305 and/or the display panel 310.
  • the display mode handler 398 may perform a software reset of the host processor 305 and/or the display panel 310 in response to determining that the display panel 310 is not alive.
  • the display mode handler 398 may reset the host processor 305 in response to determining that the display panel 310 is alive, but that the transmission timeout count did not satisfy the display mode switching threshold.
  • the display mode of the display panel 310 may depend on the power status and/or transition of the display panel 310.
  • the display mode handler 398 may change or maintain the display mode of the display panel 310 based on, for example, when the display panel 310 is transitioning to a display resume state after a display suspend state (or a display power off state) .
  • the display mode handler 398 may maintain the command-mode if the display panel 310 is operating in the command-mode.
  • the display mode handler 398 may determine whether the switching count satisfies (e.g., is greater than (or equal to) ) the video-mode default threshold. In certain such examples, if the switching count satisfies the video-mode default threshold, the display mode handler 398 may maintain the video-mode operation of the display panel 310. In some examples, the display mode handler 398 may switch the display panel 310 from operating in the video-mode to operating in the command-mode and increment the switching count (e.g., when the switching count does not satisfy the video-mode default threshold) .
  • FIG. 4 illustrates an example flowchart 400 of an example method in accordance with one or more techniques disclosed herein.
  • the method may be performed by an apparatus such as the processing unit 120 of FIG. 1 (or a component of the processing unit 120) and/or the host processor 305 of FIG. 3 (or a component of the host processor 305, such as the example display mode handler 398) .
  • the apparatus may set the default display mode of a display panel to be the command-mode, as described in connection with the examples in FIGs. 1, 2, and/or 3.
  • the apparatus may set the display mode of the display panel to the default display mode, as described in connection with the examples in FIGs. 1, 2, and/or 3.
  • the apparatus may monitor for a display exception associated with the display panel in the command-mode, as described in connection with the examples in FIGs. 1, 2, and/or 3.
  • the apparatus may determine whether a transmission timeout occurred in response to detecting a display exception, as described in connection with the examples in FIGs. 1, 2, and/or 3.
  • the transmission timeout may occur in response to determining that a transmission timer expired and a previous frame was not successfully transmitted, as described in connection with the examples in FIGs. 1, 2, and/or 3.
  • the transmission timeout may be indicated by a ping pong timeout signal or a control start timeout signal, as described in connection with the examples in FIGs. 1, 2, and/or 3.
  • the apparatus may determine that a transmission timeout did not occur, as described in connection with the examples in FIGs. 1, 2, and/or 3.
  • the apparatus may utilize techniques for handling the non-transmission timeout-related display exception. Control may then return to 404 to set the display mode of the display panel for the next frame buffer. In certain such examples, the apparatus may not change the default display mode of the display panel (e.g., the default display remains the command-code) .
  • the apparatus may perform a display panel check in to response to determining that a transmission timeout occurred (at 410) , as described in connection with the examples in FIGs. 1, 2, and/or 3.
  • the apparatus may perform the display panel check by attempting to read a register of the display panel, as described in connection with the examples in FIGs. 1, 2, and/or 3.
  • the apparatus may perform the display panel check by attempting to read a pin signal of a serial connection from the display panel, where the apparatus and the display panel may communicate via the serial connection, as described in connection with the examples in FIGs. 1, 2, and/or 3.
  • the apparatus may determine whether the display panel is alive based on the outcome of the display panel check, as described in connection with the examples in FIGs. 1, 2, and/or 3. For example, the apparatus may be unsuccessful in reading the registers of the display panel and/or may be unsuccessful reading the pin signal of the serial connection. In certain such examples, the outcome of the display panel check may indicate that the display panel is inactive.
  • the apparatus may perform a reset of the host processor and the display panel in response to determining that the display panel is not alive (at 416) , as described in connection with the examples in FIGs. 1, 2, and/or 3.
  • the apparatus may perform the resetting of the host processor and the display panel by resetting the respective software. Control may then return to 404 to set the display mode of the display panel for the next frame buffer.
  • the apparatus may determine whether a transmission timeout count satisfies a display mode switching threshold in response to determining that the display panel is alive, as described in connection with the examples in FIGs. 1, 2, and/or 3.
  • the transmission timeout count may represent the number of times that a transmission timeout occurred.
  • the transmission timeout count may satisfy the display mode switching threshold when the transmission timeout count is greater than (or equal to) the display mode switching threshold.
  • the apparatus may increment the transmission timeout count in response to determining that the transmission timeout count does not satisfy the display mode switching threshold (e.g., the transmission timeout count is less than (or equal to) the display mode switching threshold) , as described in connection with the examples in FIGs. 1, 2, and/or 3.
  • the display mode switching threshold e.g., the transmission timeout count is less than (or equal to) the display mode switching threshold
  • the apparatus may reset the host processor, as described in connection with the examples in FIGs. 1, 2, and/or 3. In some examples, the apparatus may reset the host processor by resetting the software of the host processor. Control may then return to 404 to set the display mode of the display panel for the next frame buffer.
  • the apparatus may switch the display panel from operating in the command-mode to the video-mode based on the display panel check, as described in connection with the examples in FIGs. 1, 2, and/or 3. For example, the apparatus may switch the display panel to the video-mode when the transmission timeout count satisfies the display mode switching threshold (e.g., the transmission timeout count is greater than (or equal to) the display mode switching threshold) .
  • the display mode switching threshold e.g., the transmission timeout count is greater than (or equal to) the display mode switching threshold
  • the apparatus may determine whether the switching count satisfies the video-mode default threshold, as described in connection with the examples in FIGs. 1, 2, and/or 3.
  • the switching count may correspond to the number of times that the apparatus has switched the display mode of the display panel from the command-mode to the video-mode.
  • the apparatus may increment the switching count in response to determining that the switching count does not satisfy the video-mode default threshold (e.g., the switching count is less than (or equal to) the video-mode default threshold) , as described in connection with the examples in FIGs. 1, 2, and/or 3. Control may then return to 404 to set the display mode of the display panel for the next frame buffer.
  • the video-mode default threshold e.g., the switching count is less than (or equal to) the video-mode default threshold
  • the apparatus may set the default display mode of the display panel to the video-mode in response to determining that the switching count satisfies the video- mode default threshold (e.g., the switching count is greater than (or equal to) the video-mode default threshold) , as described in connection with the examples in FIGs. 1, 2, and/or 3. Control may then return to 404 to set the display mode of the display panel for the next frame buffer.
  • the video- mode default threshold e.g., the switching count is greater than (or equal to) the video-mode default threshold
  • FIG. 5 illustrates an example flowchart 500 of an example method in accordance with one or more techniques disclosed herein.
  • the method may be performed by an apparatus such as the processing unit 120 of FIG. 1 (or a component of the processing unit 120) and/or the host processor 305 of FIG. 3 (or a component of the host processor 305, such as the example display mode handler 398) .
  • the apparatus may detect a display suspend operation, as described in connection with the examples in FIGs. 1, 2, 3, and/or 4.
  • the apparatus may detect a display resume operation following the display suspend operation, as described in connection with the examples in FIGs. 1, 2, 3, and/or 4.
  • the apparatus may determine whether the display panel is operating in the video-mode, as described in connection with the examples in FIGs. 1, 2, 3, and/or 4.
  • the apparatus may maintain the display mode of the display panel in the command-mode in response to determining that the display panel is not operating in the video-mode, as described in connection with the examples in FIGs. 1, 2, 3, and/or 4.
  • the apparatus may determine whether the switching count satisfies the video-mode default threshold in response to determining that the display panel is operating in the video-mode, as described in connection with the examples in FIGs. 1, 2, 3, and/or 4.
  • the apparatus may switch the display mode of the display panel to the command-mode when the switching count does not satisfy the video-mode default threshold (e.g., the switching count is less than (or equal to) the video-mode default threshold) , as described in connection with the examples in FIGs. 1, 2, 3, and/or 4.
  • the apparatus may increment the switching count, as described in connection with the examples in FIGs. 1, 2, 3, and/or 4.
  • the apparatus may maintain the display mode of the display panel in the video-mode when the switching count satisfies the video-mode default threshold (e.g., the switching count is greater than (or equal to) the video-mode default threshold) , as described in connection with the examples in FIGs. 1, 2, 3, and/or 4.
  • the apparatus may also set the default display mode of the display panel to the video-mode.
  • disclosed techniques may re-configure the display subsystem to work in video-mode rather than the default command-mode.
  • disclosed techniques utilize that command-mode panels support video-mode and, thus, may be dynamically switched from operating in command-mode to operating in video-mode.
  • the display subsystem does not need to generate a TE signal and, thus, loss of the TE signal does not negatively impact the displaying of images.
  • the device appears to be working normally as there are no concerns for screen tearing and performance remains relatively the same.
  • a method or apparatus for display processing may be a display processor, a display processing unit (DPU) , a GPU, or a video processor or some other processor that can perform display processing.
  • the apparatus may be the processing unit 120 within the device 104, the display processor 127 within the device 104, or may be some other hardware within device 104 or another device.
  • the apparatus may include means for monitoring for a display exception associated with a display panel in a command-mode.
  • the apparatus may also include means for determining whether a transmission timeout occurred in response to detecting a display exception. Additionally, the apparatus may include means for performing a display panel check in response to determining that the transmission timeout occurred.
  • the apparatus may also include means for switching the display panel from operating in the command-mode to a video-mode based on the display panel check. Additionally, the apparatus may include means for determining that a transmission timer expired and a previous frame was not successfully transmitted. The apparatus may also include means for performing the display panel check by attempting to read a register of the display panel. In certain such examples, the display panel may be switched from operating in the command-mode to the video-mode upon determining that the register was unsuccessfully read. Additionally, the apparatus may include means for performing the display panel check by attempting to read a pin signal of a serial connection from the display panel, the display processor and the display panel may communicate via the serial connection.
  • the display panel may be switched from operating in the command-mode to the video-mode upon determining that the pin signal of the serial connection was unsuccessfully read.
  • the apparatus may also include means for determining whether a transmission timeout count satisfies a display mode switching threshold when the display panel check indicates that the display panel is active. In certain such examples, the switching of the display panel to the video-mode may occur when the transmission timeout count satisfies the display mode switching threshold. Additionally, the apparatus may include means for incrementing the transmission timeout count when the transmission timeout count is less than the display mode switching threshold. Also, the apparatus may include means for resetting the display processor when the transmission timeout count is less than the display mode switching threshold.
  • the apparatus may also include means for resetting the display processor and the display panel when the display panel check indicates that the display panel is inactive. Additionally, the apparatus may include means for detecting a display suspend operation. Also, the apparatus may include means for switching the display panel from operating in the video-mode to the command-mode at a display resume operation following the display suspend operation when the display panel is operating in the video-mode and a video-mode count satisfies a video-mode threshold. The apparatus may also include means for incrementing the video-mode count at the display resume operation. Also, the apparatus may include means for maintaining operation of the display panel in the video-mode when the video-mode count is greater than or equal to the video-mode threshold.
  • the described display and/or graphics processing techniques can be used by a display processor, a display processing unit (DPU) , a GPU, or a video processor or some other processor that can perform display processing to implement the display recovery techniques described herein.
  • a display processor a display processing unit (DPU)
  • a GPU a graphics processing unit
  • a video processor or some other processor that can perform display processing to implement the display recovery techniques described herein.
  • the term “or” may be interrupted as “and/or” where context does not dictate otherwise. Additionally, while phrases such as “one or more” or “at least one” or the like may have been used for some features disclosed herein but not others, the features for which such language was not used may be interpreted to have such a meaning implied where context does not dictate otherwise.
  • the functions described herein may be implemented in hardware, software, firmware, or any combination thereof.
  • processing unit has been used throughout this disclosure, such processing units may be implemented in hardware, software, firmware, or any combination thereof. If any function, processing unit, technique described herein, or other module is implemented in software, the function, processing unit, technique described herein, or other module may be stored on or transmitted over as one or more instructions or code on a computer-readable medium.
  • Computer-readable media may include computer data storage media or communication media including any medium that facilitates transfer of a computer program from one place to another. In this manner, computer-readable media generally may correspond to (1) tangible computer-readable storage media, which is non-transitory or (2) a communication medium such as a signal or carrier wave.
  • Data storage media may be any available media that can be accessed by one or more computers or one or more processors to retrieve instructions, code and/or data structures for implementation of the techniques described in this disclosure.
  • such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices.
  • Disk and disc includes compact disc (CD) , laser disc, optical disc, digital versatile disc (DVD) , floppy disk and Blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.
  • a computer program product may include a computer-readable medium.
  • the code may be executed by one or more processors, such as one or more digital signal processors (DSPs) , general purpose microprocessors, application specific integrated circuits (ASICs) , arithmetic logic units (ALUs) , field programmable logic arrays (FPGAs) , or other equivalent integrated or discrete logic circuitry.
  • DSPs digital signal processors
  • ASICs application specific integrated circuits
  • ALUs arithmetic logic units
  • FPGAs field programmable logic arrays
  • the techniques of this disclosure may be implemented in a wide variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC) or a set of ICs, e.g., a chip set.
  • IC integrated circuit
  • Various components, modules or units are described in this disclosure to emphasize functional aspects of devices configured to perform the disclosed techniques, but do not necessarily need realization by different hardware units. Rather, as described above, various units may be combined in any hardware unit or provided by a collection of interoperative hardware units, including one or more processors as described above, in conjunction with suitable software and/or firmware.

Abstract

The present disclosure relates to methods and apparatus for display processing. For example, disclosed techniques facilitate recovering a mobile device display when a command-mode panel timing synchronization signal is lost. In some examples, disclosed techniques may facilitate operation of a host processor. Example techniques disclosed herein can monitor for a display exception associated with a display panel operating in a command-mode. Example techniques disclosed herein can also determine whether a transmission timeout occurred in response to detecting a display exception. Further, example techniques disclosed herein can perform a display panel check in response to determining that the transmission timeout occurred. Example techniques disclosed herein can switch the display panel from operating in the command-mode to operating in a video-mode based on the display panel check.

Description

METHODS AND APPARATUS TO RECOVER A MOBILE DEVICE WHEN A COMMAND-MODE PANEL TIMING SYNCHRONIZATION SIGNAL IS LOST TECHNICAL FIELD
The present disclosure relates generally to processing systems and, more particularly, to one or more techniques for display or graphics processing.
INTRODUCTION
Computing devices often utilize a graphics processing unit (GPU) to accelerate the rendering of graphical data for display. Such computing devices may include, for example, computer workstations, mobile phones, such as so-called smartphones, embedded systems, personal computers, tablet computers, and video game consoles. GPUs execute a graphics processing pipeline that includes one or more processing stages that operate together to execute graphics processing commands and output a frame. A central processing unit (CPU) may control the operation of the GPU by issuing one or more graphics processing commands to the GPU. Modern day CPUs are typically capable of concurrently executing multiple applications, each of which may need to utilize the GPU during execution.
An electronic device may execute a program to present graphics content on a display. For example, an electronic device may execute a user interface application, video game application, and the like.
SUMMARY
The following presents a simplified summary of one or more aspects in order to provide a basic understanding of such aspects. This summary is not an extensive overview of all contemplated aspects, and is intended to neither identify key elements of all aspects nor delineate the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed description that is presented later.
In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a display processor, a display processing unit (DPU) , a graphics processing unit (GPU) , or a video processor (sometimes generally referred to as a “host processor” ) . The apparatus can monitor for a display timeout exception associated with a display panel in a command-mode.  Additionally, the apparatus can determine whether a transmission timeout occurred in response to detecting a display timeout exception. The apparatus can also perform a display panel check in response to determining that the transmission timeout occurred. Additionally, the apparatus can switch the display panel from operating in the command-mode to a video-mode based on the display panel check. In some examples, the transmission timeout may occur in response to the apparatus determining that a transmission timer expired and a previous frame was not successfully transmitted. In some examples, the apparatus can perform the display panel check by attempting to read a register of the display panel. In certain such examples, the apparatus can switch the display from operating in the command-mode to the video-mode upon determining that the register was unsuccessfully read. In some examples the apparatus can perform the display panel check by attempting to read a pin signal of a serial connection from the display panel, where the host processor and the display panel communicate via the serial connection. In certain such examples, the apparatus can switch the display panel from operating in the command-mode to the video-mode upon determining that the pin signal of the serial connection was unsuccessfully read. Additionally, the apparatus can determine whether a transmission timeout count satisfies a display mode switching threshold when the display panel check indicates that the display panel is active. In certain such examples, the apparatus can switch the display panel to the video-mode when the transmission timeout count satisfies the display mode switching threshold. The apparatus can also increment the transmission timeout count when the transmission timeout count is less than the display mode switching threshold. Also, the apparatus can reset the host processor when the transmission timeout count is less than the display mode switching threshold. Additionally, the apparatus can reset the host processor and the display panel when the display panel check indicates that the display panel is inactive. The apparatus can also detect a display suspend operation. Also, the apparatus can switch the display panel from operating in the video-mode to the command-mode at a display resume operation following the display suspend operation when the display panel is operating in the video-mode and a video-mode count satisfies a video-mode threshold. Additionally, the apparatus can increment the video-mode count at the display resume operation. Also, the apparatus can maintain operation of the display panel in the video-mode when the video-mode count is greater than or equal to the video-mode threshold.
The details of one or more examples of the disclosure are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the disclosure will be apparent from the description and drawings, and from the claims.
BRIEF DESCRIPTION OF DRAWINGS
FIG. 1 is a block diagram that illustrates an example content generation system, in accordance with one or more techniques of this disclosure.
FIG. 2 is a block diagram that illustrates an example display panel system, in accordance with one or more techniques of this disclosure.
FIG. 3 is a block diagram that illustrates an example display panel system, in accordance with one or more techniques of this disclosure.
FIGs. 4 and 5 illustrate example flowcharts of example methods, in accordance with one or more techniques of this disclosure.
DETAILED DESCRIPTION
Example techniques disclosed herein provide a host processor-based solution for when a synchronization signal (such as a tearing effect (TE) signal) is lost. For example, a display panel may operate in a command-mode, which utilizes a TE signal received from the display panel to determine when to transmit data for the next frame. When the TE signal is lost, the display panel may become unsynchronized as data may be written to a frame buffer too fast (e.g., data in the frame buffer is being updated before the corresponding image is being displayed) or may be written to the frame buffer too slow. However, as the TE signal is typically transmitted over a pin of a bus connecting the display panel and the host processor, it may be possible for the TE signal to be lost due to a bad physical connection of the TE pin.
Example techniques disclosed herein monitor for display exceptions related to transmission timeouts that may correspond to a loss of TE signal. In certain such examples, when a transmission timeout is detected, disclosed techniques may switch the display panel from command-mode to video-mode as video-mode may not utilize a TE signal. In some examples, disclosed techniques may maintain a count related to the number of times a transmission timeout is detected and switch the display panel from the command-mode to the video-mode when the count satisfies a corresponding threshold (e.g., the count is greater than (or equal to) the corresponding threshold) . In  some examples, the disclosed techniques may maintain a count related to the number of times that the display panel has been switched to the video-mode (e.g., due to transmission timeouts) and update the default display mode of the display panel to the video-mode when the count satisfies a corresponding threshold (e.g., the count is greater than (or equal to) the corresponding threshold) . By doing so, the disclosed techniques can maintain consistent display of images, thereby improving user experience with the device.
Various aspects of systems, apparatuses, computer program products, and methods are described more fully hereinafter with reference to the accompanying drawings. This disclosure may, however, be embodied in many different forms and should not be construed as limited to any specific structure or function presented throughout this disclosure. Rather, these aspects are provided so that this disclosure will be thorough and complete, and will fully convey the scope of this disclosure to those skilled in the art. Based on the teachings herein one skilled in the art should appreciate that the scope of this disclosure is intended to cover any aspect of the systems, apparatuses, computer program products, and methods disclosed herein, whether implemented independently of, or combined with, other aspects of the disclosure. For example, an apparatus may be implemented or a method may be practiced using any number of the aspects set forth herein. In addition, the scope of the disclosure is intended to cover such an apparatus or method which is practiced using other structure, functionality, or structure and functionality in addition to or other than the various aspects of the disclosure set forth herein. Any aspect disclosed herein may be embodied by one or more elements of a claim.
Although various aspects are described herein, many variations and permutations of these aspects fall within the scope of this disclosure. Although some potential benefits and advantages of aspects of this disclosure are mentioned, the scope of this disclosure is not intended to be limited to particular benefits, uses, or objectives. Rather, aspects of this disclosure are intended to be broadly applicable to different wireless technologies, system configurations, networks, and transmission protocols, some of which are illustrated by way of example in the figures and in the following description. The detailed description and drawings are merely illustrative of this disclosure rather than limiting, the scope of this disclosure being defined by the appended claims and equivalents thereof.
Several aspects are presented with reference to various apparatus and methods. These apparatus and methods are described in the following detailed description and illustrated in the accompanying drawings by various blocks, components, circuits, processes, algorithms, and the like (collectively referred to as “elements” ) . These elements may be implemented using electronic hardware, computer software, or any combination thereof. Whether such elements are implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system.
By way of example, an element, or any portion of an element, or any combination of elements may be implemented as a “processing system” that includes one or more processors (which may also be referred to as processing units) . Examples of processors include microprocessors, microcontrollers, graphics processing units (GPUs) , general purpose GPUs (GPGPUs) , central processing units (CPUs) , application processors, digital signal processors (DSPs) , reduced instruction set computing (RISC) processors, systems-on-chip (SOC) , baseband processors, application specific integrated circuits (ASICs) , field programmable gate arrays (FPGAs) , programmable logic devices (PLDs) , state machines, gated logic, discrete hardware circuits, and other suitable hardware configured to perform the various functionality described throughout this disclosure. One or more processors in the processing system may execute software. Software can be construed broadly to mean instructions, instruction sets, code, code segments, program code, programs, subprograms, software components, applications, software applications, software packages, routines, subroutines, objects, executables, threads of execution, procedures, functions, etc., whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise. The term application may refer to software. As described herein, one or more techniques may refer to an application, i.e., software, being configured to perform one or more functions. In such examples, the application may be stored on a memory, e.g., on-chip memory of a processor, system memory, or any other memory. Hardware described herein, such as a processor may be configured to execute the application. For example, the application may be described as including code that, when executed by the hardware, causes the hardware to perform one or more techniques described herein. As an example, the hardware may access the code from a memory and execute the code accessed from the memory to perform one or more techniques described herein. In  some examples, components are identified in this disclosure. In such examples, the components may be hardware, software, or a combination thereof. The components may be separate components or sub-components of a single component.
Accordingly, in one or more examples described herein, the functions described may be implemented in hardware, software, or any combination thereof. If implemented in software, the functions may be stored on or encoded as one or more instructions or code on a computer-readable medium. Computer-readable media includes computer storage media. Storage media may be any available media that can be accessed by a computer. By way of example, and not limitation, such computer-readable media can comprise a random access memory (RAM) , a read-only memory (ROM) , an electrically erasable programmable ROM (EEPROM) , optical disk storage, magnetic disk storage, other magnetic storage devices, combinations of the aforementioned types of computer-readable media, or any other medium that can be used to store computer executable code in the form of instructions or data structures that can be accessed by a computer.
In general, this disclosure describes techniques for having a graphics processing pipeline in a single device or multiple devices, improving the rendering of graphical content, and/or reducing the load of a processing unit, i.e., any processing unit configured to perform one or more techniques described herein, such as a GPU. For example, this disclosure describes techniques for graphics processing in any device that utilizes graphics processing. Other example benefits are described throughout this disclosure.
As used herein, instances of the term “content” may refer to “graphical content, ” “image, ” and vice versa. This is true regardless of whether the terms are being used as an adjective, noun, or other parts of speech. In some examples, as used herein, the term “graphical content” may refer to a content produced by one or more processes of a graphics processing pipeline. In some examples, as used herein, the term “graphical content” may refer to a content produced by a processing unit configured to perform graphics processing. In some examples, as used herein, the term “graphical content” may refer to a content produced by a graphics processing unit.
In some examples, as used herein, the term “display content” may refer to content generated by a processing unit configured to perform displaying processing. In some examples, as used herein, the term “display content” may refer to content generated by a display processing unit. Graphical content may be processed to become display  content. For example, a graphics processing unit may output graphical content, such as a frame, to a buffer (which may be referred to as a framebuffer) . A display processing unit may read the graphical content, such as one or more frames from the buffer, and perform one or more display processing techniques thereon to generate display content. For example, a display processing unit may be configured to perform composition on one or more rendered layers to generate a frame. As another example, a display processing unit may be configured to compose, blend, or otherwise combine two or more layers together into a single frame. A display processing unit may be configured to perform scaling, e.g., upscaling or downscaling, on a frame. In some examples, a frame may refer to a layer. In other examples, a frame may refer to two or more layers that have already been blended together to form the frame, i.e., the frame includes two or more layers, and the frame that includes two or more layers may subsequently be blended.
FIG. 1 is a block diagram that illustrates an example content generation system 100 configured to implement one or more techniques of this disclosure. The content generation system 100 includes a device 104. The device 104 may include one or more components or circuits for performing various functions described herein. In some examples, one or more components of the device 104 may be components of an SOC. The device 104 may include one or more components configured to perform one or more techniques of this disclosure. In the example shown, the device 104 may include a processing unit 120 and a system memory 124. In some aspects, the device 104 can include a number of optional components, e.g., a communication interface 126, a transceiver 132, a receiver 128, a transmitter 130, a display processor 127, and one or more displays 131. Reference to the display 131 may refer to the one or more displays 131. For example, the display 131 may include a single display or multiple displays. The display 131 may include a first display and a second display. The first display may be a left-eye display and the second display may be a right-eye display. In some examples, the first and second display may receive different frames for presentment thereon. In other examples, the first and second display may receive the same frames for presentment thereon. In further examples, the results of the graphics processing may not be displayed on the device, e.g., the first and second display may not receive any frames for presentment thereon. Instead, the frames or graphics processing results may be transferred to another device. In some aspects, this can be referred to as split-rendering.
The processing unit 120 may include an internal memory 121. The processing unit 120 may be configured to perform graphics processing, such as in a graphics processing pipeline 107. In some examples, the device 104 may include a display processor, such as the display processor 127, to perform one or more display processing techniques on one or more frames generated by the processing unit 120 before presentment by the one or more displays 131. For example, the display processor 127 may be configured to perform one or more display processing techniques on one or more frames generated by the processing unit 120. The one or more displays 131 may be configured to display or otherwise present frames processed by the display processor 127. In some examples, the one or more displays 131 may include one or more of: a liquid crystal display (LCD) , a plasma display, an organic light emitting diode (OLED) display, a projection display device, an augmented reality display device, a virtual reality display device, a head-mounted display, or any other type of display device. In some examples, the one or more displays 131 may include video-mode panels and/or command-mode panels. As described herein, a video-mode panel may be configured to operate in a video-mode, while a command-mode panel may be configured to operate in a video-mode or a command-mode. As described herein, a display panel operating in the video-mode may be configured to display a real-time stream of image data, while a display panel operating in the command-mode may be configured to display the image data based on a synchronization signal.
Memory external to the processing unit 120, such as system memory 124, may be accessible to the processing unit 120. For example, the processing unit 120 may be configured to read from and/or write to external memory, such as the system memory 124. The processing unit 120 may be communicatively coupled to the system memory 124 over a bus. In some examples, the processing unit 120 may be communicatively coupled to each other over the bus or a different connection.
The system memory 124 may be configured to store received encoded or decoded graphical content. In some examples, the processing unit 120 may include and/or be in communication with a content encoder/decoder configured to receive encoded or decoded graphical content, e.g., from the system memory 124 and/or the communication interface 126, in the form of encoded pixel data. In certain such examples, the content encoder/decoder may be configured to encode or decode any graphical content.
The internal memory 121 or the system memory 124 may include one or more volatile or non-volatile memories or storage devices. In some examples, the internal memory 121 or the system memory 124 may include RAM, SRAM, DRAM, erasable programmable ROM (EPROM) , electrically erasable programmable ROM (EEPROM) , flash memory, a magnetic data media or an optical storage media, or any other type of memory.
The internal memory 121 or the system memory 124 may be a non-transitory storage medium according to some examples. The term “non-transitory” may indicate that the storage medium is not embodied in a carrier wave or a propagated signal. However, the term “non-transitory” should not be interpreted to mean that the internal memory 121 or the system memory 124 is non-movable or that its contents are static. As one example, the system memory 124 may be removed from the device 104 and moved to another device. As another example, the system memory 124 may not be removable from the device 104.
The processing unit 120 may be a central processing unit (CPU) , a graphics processing unit (GPU) , a general purpose GPU (GPGPU) , or any other processing unit that may be configured to perform graphics processing. In some examples, the processing unit 120 may be integrated into a motherboard of the device 104. In some examples, the processing unit 120 may be present on a graphics card that is installed in a port in a motherboard of the device 104, or may be otherwise incorporated within a peripheral device configured to interoperate with the device 104. The processing unit 120 may include one or more processors, such as one or more microprocessors, GPUs, application specific integrated circuits (ASICs) , field programmable gate arrays (FPGAs) , arithmetic logic units (ALUs) , digital signal processors (DSPs) , discrete logic, software, hardware, firmware, other equivalent integrated or discrete logic circuitry, or any combinations thereof. If the techniques are implemented partially in software, the processing unit 120 may store instructions for the software in a suitable, non-transitory computer-readable storage medium, e.g., internal memory 121, and may execute the instructions in hardware using one or more processors to perform the techniques of this disclosure. Any of the foregoing, including hardware, software, a combination of hardware and software, etc., may be considered to be one or more processors.
In some aspects, the content generation system 100 can include a communication interface 126. The communication interface 126 may include a receiver 128 and a  transmitter 130. The receiver 128 may be configured to perform any receiving function described herein with respect to the device 104. Additionally, the receiver 128 may be configured to receive information, e.g., eye or head position information, rendering commands, or location information, from another device. The transmitter 130 may be configured to perform any transmitting function described herein with respect to the device 104. For example, the transmitter 130 may be configured to transmit information to another device, which may include a request for content. The receiver 128 and the transmitter 130 may be combined into a transceiver 132. In such examples, the transceiver 132 may be configured to perform any receiving function and/or transmitting function described herein with respect to the device 104.
Referring again to FIG. 1, in certain aspects, the processing unit 120 and/or the graphics processing pipeline 107 may include a display recovery component 198 configured to monitor for a display timeout exception associated with a display panel (e.g., the display 131 and/or the display panel 310 of FIG. 3) operating in a command-mode. The display recovery component 198 can also be configured to determine whether a transmission timeout occurred in response to detecting a display timeout exception. The display recovery component 198 can also be configured to perform a display panel check in response to determining that the transmission timeout occurred. The display recovery component 198 can also be configured to switch the display panel from operating in the command-mode to a video-mode based on the display panel check. The display recovery component 198 can also be configured to perform the display panel check by attempting to read a register of the display panel. The display recovery component 198 can also be configured to switch the display from operating in the command-mode to the video-mode upon determining that the register was unsuccessfully read. The display recovery component 198 can also be configured to perform the display panel check by attempting to read a pin signal of a serial connection from the display panel to a host processor (e.g., the processing unit 120 and/or the host processor 305 of FIG. 1) , where the host processor and the display panel communicate via the serial connection. The display recovery component 198 can also be configured to switch the display panel from operating in the command-mode to operating in the video-mode upon determining that the pin signal of the serial connection was unsuccessfully read. The display recovery component 198 can also be configured to determine whether a transmission timeout count satisfies a display mode switching threshold when the display panel check indicates that the display  panel is active. The display recovery component 198 can also be configured to switch the display panel to the video-mode when the transmission timeout count satisfies the display mode switching threshold. The display recovery component 198 can also be configured to increment the transmission timeout count when the transmission timeout count is less than the display mode switching threshold. The display recovery component 198 can also be configured to reset the host processor when the transmission timeout count is less than the display mode switching threshold. The display recovery component 198 can also be configured to reset the host processor and the display panel when the display panel check indicates that the display panel is inactive. The display recovery component 198 can also be configured to detect a display suspend operation. The display recovery component 198 can also be configured to switch the display panel from operating in the video-mode to operating in the command-mode at a display resume operation following the display suspend operation when the display panel is operating in the video-mode and a video-mode count satisfies a video-mode threshold. The display recovery component 198 can also be configured to increment the video-mode count at the display resume operation. The display recovery component 198 can also be configured to maintain operation of the display panel in the video-mode when the video-mode count is greater than or equal to the video-mode threshold.
As described herein, a device, such as the device 104, may refer to any device, apparatus, or system configured to perform one or more techniques described herein. For example, a device may be a server, a base station, user equipment, a client device, a station, an access point, a computer, e.g., a personal computer, a desktop computer, a laptop computer, a tablet computer, a computer workstation, or a mainframe computer, an end product, an apparatus, a phone, a smart phone, a server, a video game platform or console, a handheld device, e.g., a portable video game device or a personal digital assistant (PDA) , a wearable computing device, e.g., a smart watch, an augmented reality device, or a virtual reality device, a non-wearable device, a display or display device, a television, a television set-top box, an intermediate network device, a digital media player, a video streaming device, a content streaming device, an in-car computer, any mobile device, any device configured to generate graphical content, or any device configured to perform one or more techniques described herein. Processes herein may be described as performed by a particular  component (e.g., a GPU) , but, in further embodiments, can be performed using other components (e.g., a CPU) , consistent with disclosed embodiments.
Displays used in mobile devices, such as smartphones, can utilize video-mode panels or command-mode panels. Video-mode panels can receive display lines or a group of pixels from a host processor in order to be displayed on the display screen. Command-mode panels can include memory or RAM inside the panel. In some aspects, the host processor can process the display lines or pixels and store the information in the memory. The command-mode panels can then retrieve the layer or pixel information from the memory. In some aspects, video-mode panels may be manufactured at a reduced cost compared to command-mode panels, but command-mode panels may function more efficiently. In some aspects, a device (e.g., a smartphone) can include either video-mode panels or command-mode panels. While video-mode panels may be capable of running in video-mode, command-mode panels may be capable of running in both video-mode or command-mode.
FIG. 2 is a block diagram that illustrates an example display panel system 200, in accordance with one or more techniques of this disclosure. In the illustrated example of FIG. 2, the display panel system 200 may operate in a video-mode. The example display panel system 200 includes a host processor 205 (or application processor) and a display panel 210, which communicate via communication bus ( “bus” ) 250. In the illustrated example, the host processor 205 may send image data to the display panel 210 via the bus 250, and the host processor 205 and the display panel 210 may send control information via the bus 250.
The example host processor 205 of FIG. 2 includes a timing controller 220, a frame buffer 230, and a bus interface 240. The timing controller 220 is in communication with the frame buffer 230 and may use synchronization signals to control the transfer of data from the frame buffer 230 to the bus interface 240. In the illustrated example, the frame buffer 230 may receive image data 225, may temporarily store the image data 225, and may provide the image data 225 to the bus interface 240. The image data 225 may include pixel information of a series of frames to be transferred to the display panel 210. It should be appreciated that the host processor 205 may be implemented as one or more electronic hardware processors, such as the example processing unit 120 of FIG. 1. Although the example host processor 205 of FIG. 2 includes the frame buffer 230, it should be appreciated that in additional or alternative  examples, the host processor 205 may be in communication with the frame buffer 230.
In the illustrated example of FIG. 2, the bus interface 240 is coupled to the bus 250, which is coupled to a bus interface 260 of the display panel 210. The bus 250 may be implemented by a flexible panel cable facilitating communication between the host processor 205 and the display panel 210.
In the illustrated example of FIG. 2, the display panel 210 includes the bus interface 260, which is coupled to the bus 250, and is configured to receive image data from the host processor 205 (e.g., the image data 225 via the frame buffer 230 and the bus interface 240) . The display panel 210 of FIG. 2 also includes a display driver 270 and a display screen 290. It should be appreciated that the display panel 210 and/or the display screen 290 may be implemented as one or more displays, such as the example display (s) 131 of FIG. 1.
In the illustrated example, the display screen 290 includes a plurality of pixel elements for displaying image data. The display driver 270 is coupled to the bus interface 260 and the display screen 290. It should be appreciated that the display driver 270 may be implemented as one or more components, such as the example display processor 127 of FIG. 1.
As described above, the display panel system 200 may operate in video-mode. When operating in video-mode, the image data 225 is transmitted from the host processor 205 to the display panel 210 as a real-time pixel stream. For example, the host processor 205 may refresh the image data 225 continuously at the display panel 210. In certain such examples, the host processor 205 may provide video data (e.g., pixel values) and synchronization information. Operating in video-mode may be useful for display panels that do not include a frame buffer to store frames (e.g., the example display panel 210 of FIG. 2) . The host processor 205 may transfer the image data 225 from the frame buffer 230 over the bus interface 240 and the bus 250 at a video rate, such as sixty (60) frames per second. The display driver 270 may read the series of frames of image data 225 from the bus interface 260 and write the frames to the display screen 290.
Command-mode panels are used increasingly in the market (e.g., for use in smartphones or other display devices) as they offer power saving benefits. For example, because a command-mode panel includes a frame buffer, the host processor may not need to continuously refresh the display while the command-mode panel is  operating in the command-mode, as is the case for a video-mode panel and/or a command-mode panel operating in the video-mode.
While a display panel operating in video-mode utilizes real-time streaming and displaying of images, a display panel operating in command-mode utilizes a synchronization signal to prevent screen tearing. Screen tearing (or “tearing” ) may occur when the write time for data and the display time for the written data become out of synchronization. For example, tearing may occur when data is written out faster or written out slower to the frame buffer than the scan rate. Because command-mode panels operating in the command-mode may utilize local frame buffers at the display panel, there is a possibility of data for a frame N+1 being written into the frame buffer before the data for a previous frame N being displayed, resulting in the screen tear.
To synchronize when data in the frame buffer of the display panel should be updated, display panels operating in the command-mode may utilize a synchronization signal. The synchronization signal (sometimes referred to as a “tearing effect (TE) signal” or a “VSYNC (vertical synchronization) signal” ) is provided from the display panel to the host processor. In some examples, the display panel may generate the TE signal (e.g., at 16.667ms intervals for 60Hz panels) to notify the host processor that the display panel has completed drawing the image stored in the frame buffer and that the host processor should start sending the next frame to the display panel. The host processor may use the TE signal to make sure that data is not written into the frame buffer of the display panel before data in the frame buffer has been read.
Thus, it should be appreciated that the TE signal is used for maintaining image quality for display panels operating in command-mode. However, the TE signal is typically carried over a pin of a bus between the display panel and the host processor. For example, the bus may be a flexible panel cable facilitating communication between the display panel and the host processor. The bus may include a TE signal pin for transmitting the TE signal from the display panel to the host processor. In some examples, the bus may include additional or alternative pins and/or signals, such as a power pin to signal whether the display panel is receiving power and/or data and command pins for transmitting data between the host processor and the display panel, etc.
As the TE signal is carried over a physical connector (e.g., a pin) and cable, it may be possible for the physical connection to become loose or disconnected. For example,  dropping the device, hitting the device against a hard surface, and/or heating the device may cause the TE pin to become loose. However, other connectors of the cable, such as a display serial interface (DSI) pin or a power pin may remain connected. In certain such examples, data, commands, and/or power may be provided to the display panel, but the host processor and the display panel may not be synchronized.
Example techniques disclosed herein utilize a host-processor-based solution for addressing a loose TE pin or a lost TE signal. As used herein, a “lost TE signal” refers to instances when the TE signal is not being received by the host processor, but the display panel is “alive” or active (e.g., is receiving data, commands, and/or power) . For example, while the display panel is operating in the command-mode, techniques disclosed herein monitor for display exceptions (or errors) , including, for example, transmission timeouts. A transmission timeout may occur after a period (or a transmission timer) expires and a previous frame was not successfully transmitted. For example, a “ping pong” timeout may occur after 84ms if the previous frame (e.g., frame N-1) was not successfully transmitted during the 84ms.
In some examples, when a transmission timeout is detected, disclosed techniques may determine whether the display panel is alive (e.g., is receiving data, commands, and/or power) . For example, disclosed techniques may attempt to read a register of the display panel and/or read a pin signal from the display panel (e.g., the power pin) . In certain such examples, if the display panel is determined to be alive, disclosed techniques may switch the display panel from operating in the command-mode to operating in the video-mode. As described above, the display panel operating in the video-mode does not use a TE signal to synchronize between the host processor and the display panel and, thus, the displaying of the image on the device remains consistent and provides a consistent user experience.
In some examples, techniques disclosed herein may switch the display panel from operating in the command-mode to operating in the video-mode after determining that a threshold number of transmission timeouts have been detected. For example, it may be acceptable to allow a frame (or less than the threshold number of frames) to drop (or for the display panel and the host processor to be out of synchronization) , but if a threshold number of transmission timeouts are detected, then it may be beneficial to switch the display panel to operating in the video-mode.
Although the following description may provide examples based on a single display screen, it should be appreciated that the concepts described herein may be applicable to dual-screen displays and/or multi-screen displays in which one or more of the screens may operate in a command-mode and a TE signal may be used to synchronize the reading and writing of frame buffers between the host processor and the corresponding display panel.
FIG. 3 is a block diagram that illustrates an example display panel system 300, in accordance with one or more techniques of this disclosure. In the illustrated example of FIG. 3, the display panel system 300 may operate in a command-mode or in a video-mode. The example display panel system 300 includes a host processor 305 (or application processor) and a display panel 310, which communicate via communication bus ( “bus” ) 350. In the illustrated example, the host processor 305 may send image data to the display panel 310 via the bus 350, and the host processor 305 and the display panel 310 may send control information via the bus 350.
The example host processor 305 of FIG. 3 includes a timing controller 320, a frame buffer 330, and a bus interface 340. The timing controller 320 is in communication with the frame buffer 330 and may use synchronization signals to control the transfer of data from the frame buffer 330 to the bus interface 340. In the illustrated example, the frame buffer 330 may receive image data 325, may temporarily store the image data 325, and may provide the image data 325 to the bus interface 340. The image data 325 may include pixel information of a series of frames to be transferred to the display panel 310. It should be appreciated that the host processor 305 may be implemented as one or more electronic hardware processors, such as the example processing unit 120 of FIG. 1 and/or the host processor 205 of FIG. 2. Although the example host processor 305 of FIG. 3 includes the frame buffer 330, it should be appreciated that in additional or alternative examples, the host processor 305 may be in communication with the frame buffer 330.
In the illustrated example of FIG. 3, the bus interface 340 is coupled to the bus 350, which is coupled to a bus interface 360 of the display panel 310. The bus 350 may be implemented by a flexible panel cable facilitating communication between the host processor 305 and the display panel 310.
In the illustrated example of FIG. 3, the display panel 310 includes the bus interface 360, which is coupled to the bus 350, and is configured to receive image data from the host processor 305 (e.g., the image data 325 via the frame buffer 330 and the bus  interface 340) . The display panel 310 of FIG. 3 also includes a display controller 380, a frame buffer 385, and a display screen 390. It should be appreciated that the display panel 310 and/or the display screen 390 may be implemented as one or more displays, such as the example display (s) 131 of FIG. 1.
In the illustrated example, the display screen 390 includes a plurality of pixel elements for displaying image data. The display controller 380 is coupled to the bus interface 360, is coupled to the display screen 390, and is also coupled to the frame buffer 385, which is coupled to the display screen 390. It should be appreciated that the display controller 380 may be implemented as one or more components, such as the example display processor 127 of FIG. 1 and/or the display driver 270 of FIG. 2.
As described above, the display panel system 300 may operate in command-mode or video-mode. When operating in video-mode, the image data 325 is transmitted from the host processor 305 to the display panel 310 as a real-time pixel stream, as described above in connection with the display panel system 200 of FIG. 2. For example, the display controller 380 may receive the image data 325 from the bus interface 360 and write the image data 325 to the display screen 390.
When the display panel system 300 is operating in the command-mode, image data is transmitted via commands and data. For example, the host processor 305 can transfer the image data 325 over the bus interface 340 and the bus 350. The display controller 380 may read the image data 325 (from the bus interface 360) and temporarily store the image data 325 in the frame buffer 385. The display controller 380 may also write the image data 325 in the frame buffer 385 to the display screen 390. Thus, it should be appreciated that while image data transmitted over the bus while the display panel system is operating in the video mode may facilitate the real-time streaming of the image data (e.g., by the display driver 270 of FIG. 2 writing the received image data 225 to the display screen 290) , when the display panel system is operating in the command-mode, the image data is received and temporarily stored in the frame buffer 385 until the display screen 390 is available for displaying the image data.
In the illustrated example, the bus 350 includes a plurality of signals and/or pins. For example, the bus 350 includes a TE signal 350a that represents a synchronization signal provided by the display panel 310 to the host processor 305. Based on the TE signal 350a, the host processor 305 may determine when to start to transfer the image data 325 to the display panel 310 and the frame buffer 385 while the display panel system 300 is operating in the command-mode. When the image data 325 for a frame  (e.g., frame N) is transferred, the host processor 305 waits to receive the next TE signal 350a to transfer the next frame (e.g., frame N+1) . The example bus 350 of FIG. 3 also includes a power pin 350n that indicates when power is being provided to the display panel 310.
In the illustrated example of FIG. 3, the host processor 305 also includes a display mode handler 398. The display mode handler 398 manages the display mode of the display panel 310. For example, the display mode handler 398 may switch the display panel 310 from operating in the video-mode to operating in the command-mode, may switch the display panel 310 from operating in the command-mode to operating in the video-mode, may set the default display mode of the display panel 310 to the video-mode, and/or may set the default display mode of the display panel 310 to the command-mode.
The example display mode handler 398 facilitates switching the display mode of the display panel 310 from operating in the command-mode to operating in the video-mode when the TE signal 350a is lost. For example, the display mode handler 398 may determine that the display panel 310 is alive and that a threshold quantity of transmission timeouts have occurred, which may indicate that the TE signal 350a is lost. In certain such examples, the display mode handler 398 may cause the display panel 310 to switch from operating in the command-mode to operating in the video-mode. As described above, image data is transferred differently in video-mode than compared to command-mode. In particular, when operating in video-mode, the TE signal 350a is not needed for displaying the image data 325 as the host processor 305 provides the image data 325 for the display panel 310 to display in real-time (e.g., without storing the image data in a frame buffer first) .
In some examples, the display mode handler 398 may set a default display mode of the display panel 310. For example, the display mode handler 398 may set an initial default display mode of the display panel 310 to be command-mode. Accordingly, the host processor 305 and the display panel 310 may synchronize the transfer of the image data 325 based on the TE signal 350a. For example, the host processor 305 may wait to receive the TE signal 350a prior to transferring the image data 325 to the display panel 310.
The display mode handler 398 may also monitor display exceptions associated with the display panel 310. For example, the display mode handler 398 may monitor for transmission timeouts, power supply errors, and/or display pixel errors. In some  examples, the display mode handler 398 may attempt to handle any non-transmission timeout display exceptions using any known exception handling techniques.
In some examples, while monitoring for display exceptions, the display mode handler 398 may determine that a transmission timeout occurred. In some examples, a transmission timeout may occur in response to determining that a transmission timer expired and a previous frame was not successfully transmitted. For example, the transmission timeout may be indicated by a ping pong timeout signal or a control start timeout signal.
In some examples, the display mode handler 398 may perform a display panel check to determine whether the display panel 310 is alive or active. For example, the display mode handler 398 may attempt to read a register of the display panel 310 to determine whether the display panel 310 is alive (e.g., is receiving data, commands, and/or power) . In some examples, the display mode handler 398 may attempt to read a pin signal of the bus 350 to determine whether the display panel 310 is alive. In certain such examples, the display mode handler 398 may use the result of the display panel check as an indication of whether the display panel 310 is alive. For example, if the display mode handler 398 is unable to read a register of the display panel 310, the display mode handler 398 may determine that the display panel 310 is not alive. In some examples, if the display mode handler 398 is unable to read a pin signal (e.g., the power pin 350n) , the display mode handler 398 may determine that the display panel 310 is not alive.
In some examples, the display mode handler 398 may maintain a counter representing the number of times a transmission timeout occurred (e.g., a transmission timeout counter) . For example, when the display mode handler 398 detects a transmission timeout occurred, the display mode handler 398 may increment the count of the transmission timeout counter.
In some examples, the display mode handler 398 may maintain a counter representing the number of times that the display panel 310 switched from operating in the command-mode to operating in the video-mode (e.g., a switching counter) . For example, when the display mode handler 398 switches the display panel 310 from operating in the command-mode to operating in the video-mode, the display mode handler 398 may increment the count of the switching counter.
In some examples, when determining whether to switch the display mode of the display panel 310 from operating in the command-mode to operating in the video- mode, the display mode handler 398 may compare the transmission timeout count to a display mode switching threshold. For example, the display mode handler 398 may determine whether the transmission timeout count satisfies the display mode switching threshold (e.g., the transmission timeout count is greater than (or equal to) the display mode switching threshold) . It should be appreciated that the value of the display mode switching threshold may be any reasonable value greater than zero. In some examples, the display mode switching threshold may be a predetermined value. In some examples, the display mode switching threshold may be a dynamic value that varies based on, for example, a power level of the device, the operating mode of the display panel system 300 and/or the device 104, an application, etc. For example, the display mode switching threshold may be a relatively low value (e.g., 1) when the display panel system 300 and/or the device 104 is operating in a factory mode or a recovery mode, and the display mode switching threshold may be a relatively high value (e.g., 5) when the display panel system 300 and/or the device 104 is operating in a normal mode.
In some examples, the display mode handler 398 may switch the display panel 310 from operating in the command-mode to operating in the video-mode when the transmission timeout count satisfies the display mode switching threshold. As described above, when operating in the video-mode, the display panel 310 does not provide a synchronization signal (e.g., the TE signal 350a) to the host processor 305 and, thus, the image data may be displayed without risks of screen tearing occurring.
In some examples, the display mode handler 398 may change the default display mode of the display panel 310. For example, if the switching count satisfies (e.g., is greater than (or equal to) ) a video-mode default threshold, the display mode handler 398 may change the default display mode of the display panel 310 to the video-mode. Changing the default display mode may be beneficial as the display mode handler 398 determined that the display panel was being switched to the video-mode a threshold number of time (s) and, thus, it may be more efficient to start the display panel operating in the video-mode for subsequent image frames.
In some examples, the display mode handler 398 may perform a reset of the host processor 305 and/or the display panel 310. For example, the display mode handler 398 may perform a software reset of the host processor 305 and/or the display panel 310 in response to determining that the display panel 310 is not alive. In some examples, the display mode handler 398 may reset the host processor 305 in response  to determining that the display panel 310 is alive, but that the transmission timeout count did not satisfy the display mode switching threshold.
In some examples, the display mode of the display panel 310 may depend on the power status and/or transition of the display panel 310. For example, the display mode handler 398 may change or maintain the display mode of the display panel 310 based on, for example, when the display panel 310 is transitioning to a display resume state after a display suspend state (or a display power off state) .
In certain such examples (e.g., after detecting a display resume operation) , the display mode handler 398 may maintain the command-mode if the display panel 310 is operating in the command-mode.
In some examples, after detecting the display resume operation and determining that the display panel 310 is operating in the video-mode, the display mode handler 398 may determine whether the switching count satisfies (e.g., is greater than (or equal to) ) the video-mode default threshold. In certain such examples, if the switching count satisfies the video-mode default threshold, the display mode handler 398 may maintain the video-mode operation of the display panel 310. In some examples, the display mode handler 398 may switch the display panel 310 from operating in the video-mode to operating in the command-mode and increment the switching count (e.g., when the switching count does not satisfy the video-mode default threshold) .
FIG. 4 illustrates an example flowchart 400 of an example method in accordance with one or more techniques disclosed herein. The method may be performed by an apparatus such as the processing unit 120 of FIG. 1 (or a component of the processing unit 120) and/or the host processor 305 of FIG. 3 (or a component of the host processor 305, such as the example display mode handler 398) .
At 402, the apparatus may set the default display mode of a display panel to be the command-mode, as described in connection with the examples in FIGs. 1, 2, and/or 3. At 404, the apparatus may set the display mode of the display panel to the default display mode, as described in connection with the examples in FIGs. 1, 2, and/or 3. At 406, the apparatus may monitor for a display exception associated with the display panel in the command-mode, as described in connection with the examples in FIGs. 1, 2, and/or 3.
At 408, the apparatus may determine whether a transmission timeout occurred in response to detecting a display exception, as described in connection with the examples in FIGs. 1, 2, and/or 3. In some examples, the transmission timeout may  occur in response to determining that a transmission timer expired and a previous frame was not successfully transmitted, as described in connection with the examples in FIGs. 1, 2, and/or 3. In some examples, the transmission timeout may be indicated by a ping pong timeout signal or a control start timeout signal, as described in connection with the examples in FIGs. 1, 2, and/or 3.
At 410, the apparatus may determine that a transmission timeout did not occur, as described in connection with the examples in FIGs. 1, 2, and/or 3. At 412, the apparatus may utilize techniques for handling the non-transmission timeout-related display exception. Control may then return to 404 to set the display mode of the display panel for the next frame buffer. In certain such examples, the apparatus may not change the default display mode of the display panel (e.g., the default display remains the command-code) .
At 414, the apparatus may perform a display panel check in to response to determining that a transmission timeout occurred (at 410) , as described in connection with the examples in FIGs. 1, 2, and/or 3. In some examples, the apparatus may perform the display panel check by attempting to read a register of the display panel, as described in connection with the examples in FIGs. 1, 2, and/or 3. In some examples, the apparatus may perform the display panel check by attempting to read a pin signal of a serial connection from the display panel, where the apparatus and the display panel may communicate via the serial connection, as described in connection with the examples in FIGs. 1, 2, and/or 3.
At 416, the apparatus may determine whether the display panel is alive based on the outcome of the display panel check, as described in connection with the examples in FIGs. 1, 2, and/or 3. For example, the apparatus may be unsuccessful in reading the registers of the display panel and/or may be unsuccessful reading the pin signal of the serial connection. In certain such examples, the outcome of the display panel check may indicate that the display panel is inactive.
At 418, the apparatus may perform a reset of the host processor and the display panel in response to determining that the display panel is not alive (at 416) , as described in connection with the examples in FIGs. 1, 2, and/or 3. In some examples, the apparatus may perform the resetting of the host processor and the display panel by resetting the respective software. Control may then return to 404 to set the display mode of the display panel for the next frame buffer.
At 420, the apparatus may determine whether a transmission timeout count satisfies a display mode switching threshold in response to determining that the display panel is alive, as described in connection with the examples in FIGs. 1, 2, and/or 3. In some examples, the transmission timeout count may represent the number of times that a transmission timeout occurred. In some examples, the transmission timeout count may satisfy the display mode switching threshold when the transmission timeout count is greater than (or equal to) the display mode switching threshold.
At 422, the apparatus may increment the transmission timeout count in response to determining that the transmission timeout count does not satisfy the display mode switching threshold (e.g., the transmission timeout count is less than (or equal to) the display mode switching threshold) , as described in connection with the examples in FIGs. 1, 2, and/or 3.
At 424, the apparatus may reset the host processor, as described in connection with the examples in FIGs. 1, 2, and/or 3. In some examples, the apparatus may reset the host processor by resetting the software of the host processor. Control may then return to 404 to set the display mode of the display panel for the next frame buffer.
At 426, the apparatus may switch the display panel from operating in the command-mode to the video-mode based on the display panel check, as described in connection with the examples in FIGs. 1, 2, and/or 3. For example, the apparatus may switch the display panel to the video-mode when the transmission timeout count satisfies the display mode switching threshold (e.g., the transmission timeout count is greater than (or equal to) the display mode switching threshold) .
At 428, the apparatus may determine whether the switching count satisfies the video-mode default threshold, as described in connection with the examples in FIGs. 1, 2, and/or 3. In some examples, the switching count may correspond to the number of times that the apparatus has switched the display mode of the display panel from the command-mode to the video-mode.
At 430, the apparatus may increment the switching count in response to determining that the switching count does not satisfy the video-mode default threshold (e.g., the switching count is less than (or equal to) the video-mode default threshold) , as described in connection with the examples in FIGs. 1, 2, and/or 3. Control may then return to 404 to set the display mode of the display panel for the next frame buffer.
At 432, the apparatus may set the default display mode of the display panel to the video-mode in response to determining that the switching count satisfies the video- mode default threshold (e.g., the switching count is greater than (or equal to) the video-mode default threshold) , as described in connection with the examples in FIGs. 1, 2, and/or 3. Control may then return to 404 to set the display mode of the display panel for the next frame buffer.
FIG. 5 illustrates an example flowchart 500 of an example method in accordance with one or more techniques disclosed herein. The method may be performed by an apparatus such as the processing unit 120 of FIG. 1 (or a component of the processing unit 120) and/or the host processor 305 of FIG. 3 (or a component of the host processor 305, such as the example display mode handler 398) .
At 502, the apparatus may detect a display suspend operation, as described in connection with the examples in FIGs. 1, 2, 3, and/or 4. At 504, the apparatus may detect a display resume operation following the display suspend operation, as described in connection with the examples in FIGs. 1, 2, 3, and/or 4. At 506, the apparatus may determine whether the display panel is operating in the video-mode, as described in connection with the examples in FIGs. 1, 2, 3, and/or 4.
At 508, the apparatus may maintain the display mode of the display panel in the command-mode in response to determining that the display panel is not operating in the video-mode, as described in connection with the examples in FIGs. 1, 2, 3, and/or 4.
At 510, the apparatus may determine whether the switching count satisfies the video-mode default threshold in response to determining that the display panel is operating in the video-mode, as described in connection with the examples in FIGs. 1, 2, 3, and/or 4.
At 512, the apparatus may switch the display mode of the display panel to the command-mode when the switching count does not satisfy the video-mode default threshold (e.g., the switching count is less than (or equal to) the video-mode default threshold) , as described in connection with the examples in FIGs. 1, 2, 3, and/or 4. At 514, the apparatus may increment the switching count, as described in connection with the examples in FIGs. 1, 2, 3, and/or 4.
At 516, the apparatus may maintain the display mode of the display panel in the video-mode when the switching count satisfies the video-mode default threshold (e.g., the switching count is greater than (or equal to) the video-mode default threshold) , as described in connection with the examples in FIGs. 1, 2, 3, and/or 4. In some  examples, the apparatus may also set the default display mode of the display panel to the video-mode.
As indicated above, the present disclosure can reduce the likelihood of synchronization errors caused by a lost TE signal. For example, disclosed techniques may re-configure the display subsystem to work in video-mode rather than the default command-mode. For example, disclosed techniques utilize that command-mode panels support video-mode and, thus, may be dynamically switched from operating in command-mode to operating in video-mode. When a display panel is configured to operate in video-mode, the display subsystem does not need to generate a TE signal and, thus, loss of the TE signal does not negatively impact the displaying of images. In particular, to the user, the device appears to be working normally as there are no concerns for screen tearing and performance remains relatively the same.
In one configuration, a method or apparatus for display processing is provided. The apparatus may be a display processor, a display processing unit (DPU) , a GPU, or a video processor or some other processor that can perform display processing. In one aspect, the apparatus may be the processing unit 120 within the device 104, the display processor 127 within the device 104, or may be some other hardware within device 104 or another device. The apparatus may include means for monitoring for a display exception associated with a display panel in a command-mode. The apparatus may also include means for determining whether a transmission timeout occurred in response to detecting a display exception. Additionally, the apparatus may include means for performing a display panel check in response to determining that the transmission timeout occurred. The apparatus may also include means for switching the display panel from operating in the command-mode to a video-mode based on the display panel check. Additionally, the apparatus may include means for determining that a transmission timer expired and a previous frame was not successfully transmitted. The apparatus may also include means for performing the display panel check by attempting to read a register of the display panel. In certain such examples, the display panel may be switched from operating in the command-mode to the video-mode upon determining that the register was unsuccessfully read. Additionally, the apparatus may include means for performing the display panel check by attempting to read a pin signal of a serial connection from the display panel, the display processor and the display panel may communicate via the serial connection. In certain such examples, the display panel may be switched from operating in the command-mode  to the video-mode upon determining that the pin signal of the serial connection was unsuccessfully read. The apparatus may also include means for determining whether a transmission timeout count satisfies a display mode switching threshold when the display panel check indicates that the display panel is active. In certain such examples, the switching of the display panel to the video-mode may occur when the transmission timeout count satisfies the display mode switching threshold. Additionally, the apparatus may include means for incrementing the transmission timeout count when the transmission timeout count is less than the display mode switching threshold. Also, the apparatus may include means for resetting the display processor when the transmission timeout count is less than the display mode switching threshold. The apparatus may also include means for resetting the display processor and the display panel when the display panel check indicates that the display panel is inactive. Additionally, the apparatus may include means for detecting a display suspend operation. Also, the apparatus may include means for switching the display panel from operating in the video-mode to the command-mode at a display resume operation following the display suspend operation when the display panel is operating in the video-mode and a video-mode count satisfies a video-mode threshold. The apparatus may also include means for incrementing the video-mode count at the display resume operation. Also, the apparatus may include means for maintaining operation of the display panel in the video-mode when the video-mode count is greater than or equal to the video-mode threshold.
The subject matter described herein can be implemented to realize one or more benefits or advantages. For instance, the described display and/or graphics processing techniques can be used by a display processor, a display processing unit (DPU) , a GPU, or a video processor or some other processor that can perform display processing to implement the display recovery techniques described herein.
In accordance with this disclosure, the term “or” may be interrupted as “and/or” where context does not dictate otherwise. Additionally, while phrases such as “one or more” or “at least one” or the like may have been used for some features disclosed herein but not others, the features for which such language was not used may be interpreted to have such a meaning implied where context does not dictate otherwise.
In one or more examples, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. For example, although the term “processing unit” has been used throughout this disclosure, such processing units  may be implemented in hardware, software, firmware, or any combination thereof. If any function, processing unit, technique described herein, or other module is implemented in software, the function, processing unit, technique described herein, or other module may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media may include computer data storage media or communication media including any medium that facilitates transfer of a computer program from one place to another. In this manner, computer-readable media generally may correspond to (1) tangible computer-readable storage media, which is non-transitory or (2) a communication medium such as a signal or carrier wave. Data storage media may be any available media that can be accessed by one or more computers or one or more processors to retrieve instructions, code and/or data structures for implementation of the techniques described in this disclosure. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices. Disk and disc, as used herein, includes compact disc (CD) , laser disc, optical disc, digital versatile disc (DVD) , floppy disk and Blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media. A computer program product may include a computer-readable medium.
The code may be executed by one or more processors, such as one or more digital signal processors (DSPs) , general purpose microprocessors, application specific integrated circuits (ASICs) , arithmetic logic units (ALUs) , field programmable logic arrays (FPGAs) , or other equivalent integrated or discrete logic circuitry. Accordingly, the term “processor, ” as used herein may refer to any of the foregoing structure or any other structure suitable for implementation of the techniques described herein. Also, the techniques could be fully implemented in one or more circuits or logic elements.
The techniques of this disclosure may be implemented in a wide variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC) or a set of ICs, e.g., a chip set. Various components, modules or units are described in this disclosure to emphasize functional aspects of devices configured to perform the disclosed techniques, but do not necessarily need realization by different hardware units. Rather, as described above, various units may be combined in any hardware unit or  provided by a collection of interoperative hardware units, including one or more processors as described above, in conjunction with suitable software and/or firmware.
Various examples have been described. These and other examples are within the scope of the following claims.

Claims (22)

  1. A method of operation of a host processor, comprising:
    monitoring for a display exception associated with a display panel operating in a command-mode;
    determining whether a transmission timeout occurred in response to detecting a display exception;
    performing a display panel check in response to determining that the transmission timeout occurred; and
    switching the display panel from operating in the command-mode to operating in a video-mode based on the display panel check.
  2. The method of claim 1, wherein the transmission timeout occurs in response to determining that a transmission timer expired and a previous frame was not successfully transmitted.
  3. The method of claim 1, wherein the host processor performs the display panel check by attempting to read a register of the display panel, and the display panel is switched from operating in the command-mode to operating in the video-mode upon determining that the register was unsuccessfully read.
  4. The method of claim 1, wherein the host processor performs the display panel check by attempting to read a pin signal of a serial connection from the display panel to the host processor, the host processor and the display panel communicating via the serial connection, and the display panel is switched from operating in the command-mode to operating in the video-mode upon determining that the pin signal of the serial connection was unsuccessfully read.
  5. The method of claim 1, further comprising:
    determining whether a transmission timeout count satisfies a display mode switching threshold when the display panel check indicates that the display panel is active, and
    wherein the switching of the display panel to the video-mode occurs when the transmission timeout count satisfies the display mode switching threshold.
  6. The method of claim 5, further comprising:
    incrementing the transmission timeout count when the transmission timeout count is less than the display mode switching threshold; and
    resetting the host processor when the transmission timeout count is less than the display mode switching threshold.
  7. The method of claim 1, further comprising:
    resetting the host processor and the display panel when the display panel check indicates that the display panel is inactive.
  8. The method of claim 1, further comprising:
    detecting a display suspend operation; and
    switching the display panel from operating in the video-mode to operating in the command-mode at a display resume operation following the display suspend operation when the display panel is operating in the video-mode and a video-mode count satisfies a video-mode threshold.
  9. The method of claim 8, further comprising:
    incrementing the video-mode count at the display resume operation.
  10. The method of claim 8, further comprising:
    maintaining operation of the display panel in the video-mode when the video-mode count is greater than or equal to the video-mode threshold.
  11. An apparatus for display processing, comprising:
    a memory; and
    at least one processor coupled to the memory and configured to:
    monitor for a display exception associated with a display panel operating in a command-mode;
    determine whether a transmission timeout occurred in response to detecting a display exception;
    perform a display panel check in response to determining that the transmission timeout occurred; and
    switch the display panel from operating in the command-mode to operating in a video-mode based on the display panel check.
  12. The apparatus of claim 11, wherein the at least one processor is configured to determine that the transmission timeout occurs in response to a determination that a transmission timer expired and a previous frame was not successfully transmitted.
  13. The apparatus of claim 11, wherein the at least one processor is configured to perform the display panel check by attempting to read a register of the display panel, and the display panel is switched from operating in the command-mode to the video-mode upon determining that the register was unsuccessfully read.
  14. The apparatus of claim 11, wherein the at least one processor is configured to perform the display panel check by attempting to read a pin signal of a serial connection from the display panel, the display processor and the display panel communicating via the serial connection, and the display panel is switched from operating in the command-mode to the video-mode upon determining that the pin signal of the serial connection was unsuccessfully read.
  15. The apparatus of claim 11, wherein the at least one processor is further configured to:
    determine whether a transmission timeout count satisfies a display mode switching threshold when the display panel check indicates that the display panel is active, and
    wherein the switching of the display panel to the video-mode occurs when the transmission timeout count satisfies the display mode switching threshold.
  16. The apparatus of claim 15, wherein the at least one processor is further configured to:
    increment the transmission timeout count when the transmission timeout count is less than the display mode switching threshold; and
    reset the display processor when the transmission timeout count is less than the display mode switching threshold.
  17. The apparatus of claim 11, wherein the at least one processor is further configured to:
    reset the display processor and the display panel when the display panel check indicates that the display panel is inactive.
  18. The apparatus of claim 11, wherein the at least one processor is further configured to:
    detect a display suspend operation; and
    switch the display panel from operating in the video-mode to the command-mode at a display resume operation following the display suspend operation when the display panel is operating in the video-mode and a video-mode count satisfies a video-mode threshold.
  19. The apparatus of claim 18, wherein the at least one processor is further configured to:
    increment the video-mode count at the display resume operation.
  20. The apparatus of claim 18, wherein the at least one processor is further configured to:
    maintain operation of the display panel in the video-mode when the video-mode count is greater than or equal to the video-mode threshold.
  21. The apparatus of claim 11, further comprising a wireless communication device.
  22. A computer-readable medium storing computer executable code for display processing, comprising code to:
    monitor for a display exception associated with a display panel operating in a command-mode;
    determine whether a transmission timeout occurred in response to detecting a display exception;
    perform a display panel check in response to determining that the transmission timeout occurred; and
    switch the display panel from operating in the command-mode to operating in a video-mode based on the display panel check.
PCT/CN2019/100745 2019-08-15 2019-08-15 Methods and apparatus to recover a mobile device when a command-mode panel timing synchronization signal is lost WO2021026868A1 (en)

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Citations (5)

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US20130057763A1 (en) * 2011-09-02 2013-03-07 Chi Ho CHA Display driver, operating method thereof, host for controlling the display driver, and system having the display driver and the host
CN103823546A (en) * 2014-03-10 2014-05-28 联想(北京)有限公司 Information control method and electronic equipment
CN104615399A (en) * 2015-02-09 2015-05-13 上海与德通讯技术有限公司 Display data transmission method and electronic device
US20190089927A1 (en) * 2017-09-20 2019-03-21 Qualcomm Incorporated Block-based power efficient timing engine for smart display panels
US20190222855A1 (en) * 2018-01-17 2019-07-18 Qualcomm Incorporated Composition based dynamic panel mode switch

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130057763A1 (en) * 2011-09-02 2013-03-07 Chi Ho CHA Display driver, operating method thereof, host for controlling the display driver, and system having the display driver and the host
CN103823546A (en) * 2014-03-10 2014-05-28 联想(北京)有限公司 Information control method and electronic equipment
CN104615399A (en) * 2015-02-09 2015-05-13 上海与德通讯技术有限公司 Display data transmission method and electronic device
US20190089927A1 (en) * 2017-09-20 2019-03-21 Qualcomm Incorporated Block-based power efficient timing engine for smart display panels
US20190222855A1 (en) * 2018-01-17 2019-07-18 Qualcomm Incorporated Composition based dynamic panel mode switch

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