WO2021023277A1

WO2021023277A1 - Method for generating physically unclonable function tag, and circuit

Info

Publication number: WO2021023277A1
Application number: PCT/CN2020/107517
Authority: WO
Inventors: 张其文; 樊海涛; 葛晓欢
Original assignee: 浙江省北大信息技术高等研究院; 杭州未名信科科技有限公司
Priority date: 2019-08-07
Filing date: 2020-08-06
Publication date: 2021-02-11
Also published as: CN110633777A; CN110633777B

Abstract

Disclosed are a method for generating a physically unclonable function tag and a circuit. The method comprises: energizing a chip, enabling operations thereof, and performing, by means of an analog-to-digital conversion module, multiple analog voltage signal sampling operations on multiple analog function circuit modules on the chip; the analog-to-digital conversion module converting individual analog voltage signals obtained from the sampling operations into digital voltage signals, and transmitting the digital voltage signals to a microprocessor; and the microprocessor assembling voltage value data of all of the digital voltage signals according to a corresponding sampling sequence thereof, and generating a physically unclonable function tag. The method for generating a physically unclonable function tag provided by embodiments of the present invention is designed in a scientific manner, is easy and convenient to operate, and uses a simple circuit to sample voltage signals of multiple analog function modules of a chip itself to quickly generate a PUF tag, thereby reducing time taken, providing high efficiency, and fully meeting the randomness and uniqueness requirements of PUF tags.

Description

Method and circuit for generating physical non-copyable functional label

Technical field

The invention relates to the technical field of electronic chips, in particular to a method and circuit for generating a physically non-copyable functional label.

Background technique

As more and more electronic devices using integrated circuits are used to provide different types of information for various applications, there is an increasing need to adequately protect sensitive and critical information that may be stored in electronic devices in order to prevent access to such information. Only limited to other devices that allow access to this information. Some examples of applications include the certification of devices, the protection of confidential information within the devices, and the assurance of communication between two or more devices.

PUF (physical unclonable function) technology is a new method applied in the field of integrated circuit chip security. PUF is a "biological feature" recognition technology in the field of chips, which can also be called "chip fingerprint" technology. PUF extracts the unique "fingerprint" information of each chip from each chip. These "fingerprint" information can be used to verify the authenticity of the chip and protect the data in the memory. It has a huge application prospect in the field of chip security and anti-counterfeiting.

The principle of PUF technology is that different chips will always produce many inevitable individual differences in the manufacturing process. The manufacturing difference of the chip comes from two aspects, one is the inherent structural difference of the chip, and the other is the random difference caused by the influence of external conditions during the manufacturing process. Chips are made through wafer development, etching and other steps, and even the wafers cut from the same ingot, they also have their own structural differences. This physical structural difference is called the inherent structural difference of the chip; During the manufacturing process, due to random differences in external conditions such as temperature and voltage, even if the layout of the chips is completely the same, there will inevitably be differences in the manufactured chips. Such differences are called random differences in chips. By extracting the differences produced in the manufacturing process of the chip, the unique "fingerprint" information of the chip can be generated, which cannot be copied and predicted even by the manufacturer of the chip.

The prior art PUF label generation method is too complicated, inconvenient to operate, time-consuming, and inefficient.

Summary of the invention

An object of the present invention is to provide a new technical solution for the generation of physically non-copyable functional tags. In order to have a basic understanding of some aspects of the disclosed embodiments, a brief summary is given below. This summary is not a general review, nor is it intended to identify key/important elements or describe the scope of protection of these embodiments. Its sole purpose is to present some concepts in a simple form as a prelude to the detailed description that follows.

According to an aspect of the embodiments of the present invention, there is provided a method for generating a physical non-copyable function label, including:

The chip is energized to work, and several analog function circuit modules on the chip are sampled for multiple analog voltage signals through the analog-to-digital conversion module; the total number of sampling is determined by the preset physical non-copyable function label data bit width and analog-to-digital conversion module Determined by the ratio of bit width;

The analog-to-digital conversion module converts each sampled analog voltage signal into a digital voltage signal, and then transmits the digital voltage signal to the microprocessor;

The microprocessor splices the voltage value data of all the digital voltage signals according to their corresponding sampling order to generate a physical non-copyable functional label.

Further, the method further includes: the microprocessor storing the physical non-copyable function tag in a storage module.

Further, the total number of times of sampling the analog voltage signal multiple times is determined by a preset ratio of the data bit width of the physical non-copyable function label to the bit width of the analog-to-digital conversion module.

Further, the total number of sampling times is determined according to the following manner:

When the value of the data bit width of the physical non-copyable function label/the bit width of the analog-to-digital conversion module is not an integer, the total number of sampling = [the data bit width of the physical non-copyable function label/the bit width of the analog-to-digital conversion module]+1;

When the value of the data bit width of the physical non-copyable function label/the bit width of the analog-to-digital conversion module is an integer, the total number of sampling = the data bit width of the physical non-copyable function label/the bit width of the analog-to-digital conversion module.

Further, the sampling multiple analog voltage signals on the several analog function circuit modules on the chip includes: placing the chip in a certain working mode, and then selecting several analog functions from the several analog function circuit modules The circuit module performs analog voltage signal sampling to ensure that among all the operating modes of the chip, at least one analog voltage signal sampling is performed in each operating mode.

Further, the method is performed when the chip is in an uncalibrated state.

Further, the sampling multiple analog voltage signals on the several analog function circuit modules on the chip includes: sampling the analog voltage signal of each analog function circuit once or more than once.

According to another aspect of the embodiments of the present invention, there is provided a physical non-copyable functional label generating circuit, including:

The analog-digital conversion module is used to sample several analog voltage signals on several analog function circuit modules on the chip, convert each sampled analog voltage signal into a digital voltage signal, and then transmit the digital voltage signal to the microprocessor Device

The microprocessor is used to splice the voltage value data of all the digital voltage signals according to their corresponding sampling order to generate a physical non-copyable functional label.

Further, the circuit further includes: a storage module for storing the physical non-copyable function label.

Further, the memory module includes 9 programmable resistive memories arranged in a 3×3 array, wherein the memories in the same row are connected by a bit line, and the memories in the same column are connected by a word line; Configure to be in data state.

The technical solutions provided by the embodiments of the present invention may include the following beneficial effects:

The method for generating physical non-copyable functional labels provided by the embodiments of the present invention has a scientific design, simple and convenient operation, and uses simple circuits to sample the voltage signals of several analog function modules of the chip itself to quickly generate PUF labels, which consumes a short time and has high efficiency. And it fully meets the randomness and uniqueness requirements of PUF tags.

Other features and advantages of the present invention will be described in the following specification, and partly become obvious from the specification, or part of the features and advantages can be inferred from the specification or determined without doubt, or implemented by implementing the present invention Case understanding. The purpose and other advantages of the present invention can be realized and obtained by the structures specifically pointed out in the written description, claims, and drawings.

Description of the drawings

In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only These are some of the embodiments described in the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work.

FIG. 1 is a flowchart of a method for generating a physical non-copyable function label according to an embodiment of the present disclosure;

Fig. 2 is a block diagram of a physical non-copyable function label generating circuit structure according to an embodiment of the present disclosure.

detailed description

In order to make the objectives, technical solutions, and advantages of the present invention clearer, the following further describes the present invention with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, but not to limit the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.

Those skilled in the art can understand that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meanings as those commonly understood by those of ordinary skill in the art to which the present invention belongs. It should also be understood that terms such as those defined in general dictionaries should be understood to have a meaning consistent with the meaning in the context of the prior art, and unless specifically defined as here, they will not be idealized or overly Explain the formal meaning.

As shown in FIG. 1, an embodiment of the present application provides a method for generating a physical non-copyable function label, including:

S1. Make the chip work in an uncalibrated state, and sample several analog function circuit modules on the chip through the analog-to-digital conversion module (ADC); if the chip has multiple working modes, it can be adjusted The chip puts it in different working modes, and then selects several analog function circuit modules from the several analog function circuit modules to sample the analog voltage signal to ensure that in all the working modes of the chip, in each working mode Perform at least one analog voltage signal sampling, such as sampling the chip in low power consumption mode, standby mode, etc.; among them, one analog voltage signal sampling of the chip refers to selecting an analog functional circuit module on the chip to perform one sampling; Sampling the two analog voltage signals of the chip refers to selecting the same analog functional circuit module for two samplings or selecting two analog functional circuits to sample each one; sampling the two analog voltage signals of the chip refers to : Select one analog function circuit module to sample three times; or select two analog function circuit modules and sample one of them once and sample the other twice; or select three different analog function circuit modules to sample one of them Sample each one separately;

S2. The analog-to-digital conversion module converts each sampled analog voltage signal into a digital voltage signal, and then transmits the digital voltage signal to the microprocessor;

S3. The microprocessor splices the voltage value data of all the digital voltage signals according to their corresponding sampling order to generate a physical non-copyable functional label;

S4. The microprocessor stores the physical non-copyable function label in a storage module.

Among them, the number of times of sampling the analog voltage signal for each analog function circuit module may be one or more than once, and the same analog function circuit module may be sampled multiple times in different working modes of the chip;

The analog-to-digital conversion module can adopt ADCs with different bit widths, for example, it can be a 10-bit, 12-bit, or 16-bit ADC with equal bit width.

The total number of samplings performed on the several analog functional circuit modules is determined by the preset ratio of the data bit width of the physical non-copyable function tag to the ADC bit width, and the calculation method of the total number of samplings is:

When the value of the data bit width of the physical non-copyable function label/ADC bit width is not an integer, the total number of sampling = [the data bit width of the physical non-copyable function label/ADC bit width]+1;

When the value of the data bit width of the physical non-copyable function label/ADC bit width is an integer, the total number of sampling = the data bit width of the physical non-copyable function label/ADC bit width.

For example, if the preset data bit width of the physical non-copyable function tag is 64 bits and the ADC bit width is 10 bits, then the total number of times = [64/10]+1=7.

The analog function circuit module may be a clock module, a power supply module, a resistance module, an operational amplifier circuit module, a capacitive sensor, a feedback amplifier circuit module, a power amplifier circuit module, a signal generation circuit module, a signal processing and conversion circuit module, and a power stabilizer. Modules such as voltage circuit modules can also be analog functional circuit modules formed by combining any of these modules.

Preferably, the memory module is a memory array module, which may include 9 programmable resistive memories arranged in a 3×3 array, wherein the memories in the same row are connected by a bit line, and the memories in the same column are connected by one bit line. Word line connection; each of the memories is configured to be in a data state.

As shown in FIG. 2, another embodiment of the present application provides a physical non-copyable functional label generating circuit, including:

The circuit further includes: a storage module for the microprocessor to store the physical non-copyable function tag in the storage module.

The physical non-copyable functional label generating circuit has a simple structure and is easy to implement.

The above-mentioned physical non-copyable function label generation method is performed under the uncalibrated state of the chip. After the storage of the physical non-copyable function label is completed, an operation of loading the calibration value is performed on the chip. After loading the calibration value, the electrical performance parameter difference of the chip of the same layout becomes extremely small. If the operation of generating a physical non-copyable function label is performed after calibrating the chip, the physical non-copyable function label's requirements for the randomness and uniqueness of the data of each sampling module cannot be met, and the requirements for sampling accuracy need further Improve, increase the difficulty of operation.

It should be noted:

The term "module" is not intended to be limited to a specific physical form. Depending on the specific application, the module can be implemented as hardware, firmware, software, and/or a combination thereof. In addition, different modules can share common components or even be implemented by the same components. There may or may not be clear boundaries between different modules.

The algorithms and displays provided here are not inherently related to any particular computer, virtual device or other equipment. Various general-purpose devices can also be used with the teaching based on this. From the above description, the structure required to construct this type of device is obvious. In addition, the present invention is not directed to any specific programming language. It should be understood that various programming languages can be used to implement the content of the present invention described herein, and the above description of a specific language is to disclose the best embodiment of the present invention.

In the instructions provided here, a lot of specific details are explained. However, it can be understood that the embodiments of the present invention can be practiced without these specific details. In some instances, well-known methods, structures and technologies are not shown in detail, so as not to obscure the understanding of this specification.

Similarly, it should be understood that in order to simplify the present disclosure and help understand one or more of the various inventive aspects, in the above description of the exemplary embodiments of the present invention, the various features of the present invention are sometimes grouped together into a single embodiment, Figure, or its description. However, the disclosed method should not be interpreted as reflecting the intention that the claimed invention requires more features than those explicitly stated in each claim. More precisely, as reflected in the following claims, the inventive aspect lies in less than all the features of a single embodiment disclosed previously. Therefore, the claims following the specific embodiment are thus explicitly incorporated into the specific embodiment, wherein each claim itself serves as a separate embodiment of the present invention.

Those skilled in the art can understand that it is possible to adaptively change the modules in the device in the embodiment and set them in one or more devices different from the embodiment. The modules or units or components in the embodiments can be combined into one module or unit or component, and in addition, they can be divided into multiple sub-modules or sub-units or sub-components. Except that at least some of such features and/or processes or units are mutually exclusive, any combination can be used to compare all features disclosed in this specification (including the accompanying claims, abstract and drawings) and any method or methods disclosed in this manner or All the processes or units of the equipment are combined. Unless expressly stated otherwise, each feature disclosed in this specification (including the accompanying claims, abstract and drawings) may be replaced by an alternative feature providing the same, equivalent or similar purpose.

In addition, those skilled in the art can understand that although some embodiments described herein include certain features included in other embodiments but not other features, the combination of features of different embodiments means that they are within the scope of the present invention. Within and form different embodiments. For example, in the following claims, any one of the claimed embodiments can be used in any combination.

The various component embodiments of the present invention may be implemented by hardware, or by software modules running on one or more processors, or by their combination. Those skilled in the art should understand that a microprocessor or a digital signal processor (DSP) may be used in practice to implement some or all of the functions of some or all of the components in the virtual machine creation apparatus according to the embodiments of the present invention. The present invention can also be implemented as a device or device program (for example, a computer program and a computer program product) for executing part or all of the methods described herein. Such a program for realizing the present invention may be stored on a computer-readable medium, or may have the form of one or more signals. Such signals can be downloaded from Internet websites, or provided on carrier signals, or provided in any other form.

It should be noted that the above-mentioned embodiments illustrate the present invention rather than limit the present invention, and those skilled in the art can design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses should not be constructed as a limitation to the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of multiple such elements. The invention can be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In the unit claims enumerating several devices, several of these devices may be embodied by the same hardware item. The use of the words first, second, and third, etc. do not indicate any order. These words can be interpreted as names.

It should be understood that, although the various steps in the flowchart of the drawings are shown in sequence as indicated by the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless explicitly stated in this article, the execution of these steps is not strictly limited in order, and they can be executed in other orders. Moreover, at least part of the steps in the flowchart of the drawings may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and the order of execution is also It is not necessarily performed sequentially, but may be performed alternately or alternately with other steps or at least a part of sub-steps or stages of other steps.

The above-mentioned embodiments only express the implementation of the present invention, and the description is relatively specific and detailed, but it should not be understood as a limitation to the patent scope of the present invention. It should be pointed out that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can be made, and these all fall within the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention should be subject to the appended claims.

Claims

A method for generating a physically non-copyable functional label, which is characterized in that it includes:

Energize the chip to work, and perform multiple analog voltage signal sampling on several analog function circuit modules on the chip through an analog-to-digital conversion module;

The analog-to-digital conversion module converts each sampled analog voltage signal into a digital voltage signal, and then transmits the digital voltage signal to the microprocessor;

The microprocessor splices the voltage value data of all the digital voltage signals according to their corresponding sampling order to generate a physical non-copyable functional label.
The method according to claim 1, further comprising: the microprocessor storing the physical non-copyable function tag in a storage module.
The method according to claim 1, wherein the total number of sampling times of the multiple analog voltage signal sampling is determined by a preset ratio of the data bit width of the physical non-copyable function tag to the bit width of the analog-to-digital conversion module.
The method according to claim 3, wherein the total number of sampling times is determined according to the following manner:

When the value of the data bit width of the physical non-copyable function label/the bit width of the analog-to-digital conversion module is not an integer, the total number of sampling = [the data bit width of the physical non-copyable function label/the bit width of the analog-to-digital conversion module]+1;

When the value of the data bit width of the physical non-copyable function label/the bit width of the analog-to-digital conversion module is an integer, the total number of sampling = the data bit width of the physical non-copyable function label/the bit width of the analog-to-digital conversion module.
The method according to claim 1, wherein the sampling multiple analog voltage signals on several analog functional circuit modules on the chip comprises: placing the chip in a certain working mode, and then from the Several analog function circuit modules are selected from the several analog function circuit modules to sample the analog voltage signal to ensure that in all the working modes of the chip, the analog voltage signal is sampled at least once in each working mode.
The method according to claim 1, wherein the method is performed when the chip is in an uncalibrated state.
The method according to claim 1, wherein the sampling multiple analog voltage signals on the several analog function circuit modules on the chip comprises: sampling the analog voltage signal of each analog function circuit once or more than once. One sampling.
A physical non-copyable functional label generating circuit, which is characterized in that it comprises:

The analog-digital conversion module is used to sample several analog voltage signals on several analog function circuit modules on the chip, convert each sampled analog voltage signal into a digital voltage signal, and then transmit the digital voltage signal to the microprocessor Device

The microprocessor is used to splice the voltage value data of all the digital voltage signals according to their corresponding sampling order to generate a physical non-copyable functional label.
8. The circuit according to claim 8, wherein the circuit further comprises: a storage module for storing the physical non-copyable function label.
The circuit according to claim 9, wherein the memory module includes 9 programmable resistive memories arranged in a 3×3 array, wherein the memories in the same row are connected by a bit line, and the memories in the same column are connected by one Word line connection; each of the memories is configured to be in a data state.