WO2020258884A1 - Procédé de fabrication de cellule solaire en silicium cristallin et cellule solaire en silicium cristallin - Google Patents

Procédé de fabrication de cellule solaire en silicium cristallin et cellule solaire en silicium cristallin Download PDF

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Publication number
WO2020258884A1
WO2020258884A1 PCT/CN2020/074314 CN2020074314W WO2020258884A1 WO 2020258884 A1 WO2020258884 A1 WO 2020258884A1 CN 2020074314 W CN2020074314 W CN 2020074314W WO 2020258884 A1 WO2020258884 A1 WO 2020258884A1
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Prior art keywords
electroplating
layer
solar cell
area
crystalline silicon
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PCT/CN2020/074314
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English (en)
Chinese (zh)
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张洪超
童洪波
李华
刘继宇
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泰州隆基乐叶光伏科技有限公司
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Priority claimed from CN201910548673.3A external-priority patent/CN112133768A/zh
Priority claimed from CN201910548287.4A external-priority patent/CN112216766A/zh
Application filed by 泰州隆基乐叶光伏科技有限公司 filed Critical 泰州隆基乐叶光伏科技有限公司
Publication of WO2020258884A1 publication Critical patent/WO2020258884A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention generally relates to the technical field of solar photovoltaic power generation, in particular to a method for manufacturing a crystalline silicon solar cell and a crystalline silicon solar cell.
  • Crystal silicon solar cells are currently the solar cells with the highest market share due to their high energy conversion efficiency. How to improve the photoelectric conversion efficiency of crystalline silicon solar cells while reducing their production costs is the biggest problem facing the industry.
  • screen printing is usually used to realize the metallization process of crystalline silicon solar cells.
  • the precision of screen printing is limited, and the topography of printed electrodes fluctuates. After printing and sintering, the electrodes are widened. Large, resulting in a relatively low height and width of the grid formed, thereby reducing the effective light-receiving area of the light-receiving surface of the crystalline silicon solar cell, and the series resistance of the crystalline silicon solar cell made by screen printing is relatively large.
  • the grid of crystalline silicon solar cells can be selectively formed, effectively reducing the shading of the grid and effectively reducing the resistance of the grid and the series resistance of the crystalline silicon solar cell.
  • electroless plating and light-induced electroplating technology are used to replace the traditional screen printing technology, and a uniform and dense plating layer can be formed by electroplating nickel and copper with good efficiency.
  • the existing electroplating technology to form the grid lines and electrodes of crystalline silicon solar cells requires printing or electroless plating on a seed layer, and then electroplating on the seed layer by light-induced electroplating or electroplating to form electrodes, which need to be supplemented by light conditions and masks , The operation is complicated and the production efficiency is low.
  • the present invention provides a method for manufacturing a crystalline silicon solar cell, including the following steps:
  • a battery precursor is provided;
  • the battery precursor includes a crystalline silicon solar cell substrate, and a dielectric layer formed on the front and/or back of the crystalline silicon solar cell substrate; the dielectric layer is provided with exposed The gate electrode electroplating area and the electroplating contact forming area of the crystalline silicon solar cell substrate;
  • the present invention provides a crystalline silicon solar cell prepared by the above method, comprising a crystalline silicon solar cell substrate, and a dielectric layer is formed on the front and/or back of the crystalline silicon solar cell substrate;
  • the electric layer is provided with a gate electrode plating area and a plating contact forming area exposing the substrate of the crystalline silicon solar cell.
  • the gate electrode plating area is deposited with a metal electrode layer, the metal electrode layer and the crystal
  • the silicon solar cell substrate is in ohmic contact, and the electroplated contact forming area is sintered to form electroplated contacts.
  • the method for manufacturing a crystalline silicon solar cell is sintered to form electroplated contacts, and the electroplated contacts formed by sintering are in ohmic contact with the substrate of the crystalline silicon solar cell, so that there is no need to prepare an electroplating seed layer during electroplating, which simplifies the process flow and solves This solves the problem that the cells cannot be electroplated because they are not conductive.
  • FIG. 1 is a flowchart of a method for manufacturing a crystalline silicon solar cell according to an embodiment of the present invention
  • FIG. 2 is a front view of a battery precursor provided by an embodiment of the present invention.
  • Figure 3 is a cross-sectional view of Figure 2 A-A;
  • FIG. 4 is a schematic diagram of the structure of FIG. 3 after forming a metal electrode layer
  • FIG. 5 is a flowchart of another method for manufacturing a crystalline silicon solar cell according to an embodiment of the present invention.
  • Figure 6 is a front view of another battery precursor provided by an embodiment of the present invention.
  • Fig. 7 is a B-B sectional view of Fig. 6.
  • a method for manufacturing a crystalline silicon solar cell includes the following steps:
  • the battery precursor includes a crystalline silicon solar cell substrate, and a dielectric layer formed on the front and/or back of the crystalline silicon solar cell substrate; the dielectric layer is provided with The gate electrode plating area and the plating contact forming area of the crystalline silicon solar cell substrate are exposed.
  • the dielectric layer 5 can be formed on the front and/or back of the crystalline silicon solar cell substrate 1 by deposition. In this embodiment, the dielectric layer is formed on both the front and the back. 5.
  • any one or any combination of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, silicon carbide, amorphous silicon, and polysilicon may be used to form the dielectric layer 5.
  • the dielectric layer 5 may have a single-layer structure or a multi-layer structure, such as a three-layer or three-layer structure.
  • the dielectric layer of the multilayer structure can be, but is not limited to, silicon oxide layer/silicon oxynitride layer/silicon nitride layer, silicon oxide layer/aluminum oxide layer/silicon nitride layer, aluminum oxide layer/nitrogen A laminated structure of aluminum oxide layer/silicon nitride layer, silicon oxide layer/silicon carbide layer/silicon nitride layer.
  • the dielectric layer is patterned according to a predetermined pattern, and a grid electrode electroplating area and an electroplating contact forming area are opened that expose the substrate of the crystalline silicon solar cell sheet.
  • the gate line electrode electroplating area includes a fine gate electroplating area and a main grid electroplating area
  • the fine gate electroplating area includes a plurality of thin grid forming opening areas
  • the main grid electroplating area includes a plurality of bus grid forming openings Area, the thin grid forming film opening area 2 and the main grid forming film opening area 3 intersect.
  • the dielectric layer 5 can be patterned by means of hydrofluoric acid, laser, or the like.
  • the dielectric layer 5 is processed by laser ablation to form the thin grid forming open film area 2, the main grid forming open film area 3, and the plating contact forming area 4 exposing the crystalline silicon solar cell substrate 1 described above.
  • the number of the fine grid forming open film area 2 can be 100-200.
  • the main grid forming opening area 3 It is used to form the main grid by electroplating in the main grid forming opening area 3, and the number of the main grid forming opening area 3 can be 3-30.
  • the thin grid is used to collect the current generated by the solar cell.
  • the main grid is used to collect the current collected by the fine grid and to interconnect the cells.
  • the width of the area to be plated between the fine grid forming open film area 2 and the main grid forming open film area 3 is adjusted by changing the size of the laser spot, the laser power, the number of laser ablation times, or the interval of the laser pulse.
  • the open film area 3 of the main grid forming requires a wider gap, usually between 300 microns and 1 mm, which requires higher laser power, larger laser spot size, multiple laser ablation and slower use The processing speed.
  • the shape of the thin grid forming film opening region 2 may be a strip pattern with a uniform width
  • the shape of the bus grid forming film opening region 3 may be a strip pattern with a uniform width or may be an irregular pattern with different widths.
  • the thin gate forming opening area 2 and the main grid forming opening area 3 intersect in a vertical manner, so that the formed thin gate and the main grid are perpendicular to each other.
  • S12 Sintering to form electroplated contacts in the electroplated contact forming area of the battery precursor.
  • the second type Laying metal powder or alloy powder in the electroplating contact formation area 4, and forming electroplating contacts by laser sintering.
  • the shape of the electroplating contact forming area 4 includes, but is not limited to, a bar shape, a circle, a square, a character shape, or any irregular pattern.
  • the size of the electroplating contact forming area 4 does not need to be large, so as to facilitate the connection with the negative electrode of the power supply.
  • the electroplating contact formation area 4 is close to the edge of the crystalline silicon solar cell substrate, so as not to affect the appearance of the crystalline silicon solar cell.
  • the electroplating contact formation area 4 can also be formed in the main grid forming opening film area 3.
  • the electroplated contact is in ohmic contact with the crystalline silicon solar cell substrate 1 so that there is no need to prepare an electroplating seed layer during electroplating, which simplifies the process flow and solves the problem that the cell cannot be electroplated because the cell is not conductive .
  • the surface of the patterned crystalline silicon solar cell substrate 1 needs to be cleaned.
  • a fluorine-containing solution with a certain mass concentration can be used to clean the surface of the crystalline silicon solar cell substrate 1.
  • the cleaning time ranges from a few seconds to a few minutes, and the length of the cleaning time depends on the concentration of the cleaning solution.
  • the crystalline silicon solar cell substrate 1 is cleaned with a hydrofluoric acid solution, the mass concentration of the hydrofluoric acid solution used can be 0.5%-10%, and the cleaning time can be 5 to 300 seconds.
  • electroplating contacts are formed on the dielectric layers on the front and back sides, and the electroplating contacts on the front and back sides are connected to the same negative electrode, so that the front side of the crystalline silicon solar cell substrate 1 is A metal electrode layer is formed at the same time as the back side to improve plating efficiency.
  • electroplating contacts are formed on both the front and back dielectric layers, and the electroplating contacts on the front and back are connected to different negative electrodes.
  • the current magnitude of each negative electrode can be individually controlled to control the metal electrode layer 6 The deposition speed and thickness to improve the quality of electroplating.
  • electroplated contacts are formed on both the front and back dielectric layers 5, and the electroplated contacts on the front and back are alternately connected to the same negative electrode. That is, one of the front and back electroplating contacts is connected to the negative electrode. After a certain period of electroplating, the negative electrode is connected to the other electroplating contact, and after a certain period of electroplating, it is connected to the connection in the previous electroplating period.
  • the electroplated contacts on the front and back are alternately connected in this way until the end of electroplating. For example, but not limited to, during electroplating, first connect the front electroplating contact to the negative electrode of the electroplating tank, and deposit the metal electrode layer 6 on both sides of the crystalline silicon solar cell substrate 1 at the same time.
  • both sides The deposition rate is inconsistent. It is necessary to remove the negative electrode from the electroplated contact on the front side after a period of electroplating, and switch to the electroplated contact on the back side, and increase the deposition rate with the aid of current. At this time, the negative electrode is not connected. The deposition rate on one side is lower than the deposition rate on the side where the negative electrode is connected. After a period of deposition, the negative electrode can be removed from the electroplated contact on the back and switched to the electroplated contact on the front, and so on. , Until the end of electroplating.
  • the metal electrode layer 6 generally includes a stack of two, three or more layers of metal, and the thickness of the bottom metal layer is generally less than 3 microns.
  • One type of metal is deposited in each electroplating tank. After each metal is deposited, the crystalline silicon solar cell substrate 1 needs to be cleaned, and then enter the next electroplating tank to deposit another metal layer. The cleaning here is generally done by deionized water.
  • the metal electrode layer 6 may also have a single-layer structure.
  • the metal electrode layer 6 includes Ni layer/Ag layer, Co layer/Ag layer, Ni layer/Cu layer, Co layer/Cu layer, Ni layer/Cu layer/Sn layer, Co layer/Cu layer/Sn layer, Ni Any one of layer/Cu layer/Ag layer and Co layer/Cu layer/Ag layer electrode.
  • the temperature of the plating solution during electroplating is 20-100°C. Using a temperature in this range can ensure that the electroplating solution has better electrical conductivity, and improve the dispersion ability and deposition reaction speed of the electroplating solution.
  • it also includes after electroplating, annealing the crystalline silicon solar cell substrate on which the metal electrode layer is formed, so that the metal electrode layer and the crystalline silicon solar cell substrate form an ohmic contact to Strengthen the bonding force between the metal electrode layer and the silicon of the crystalline silicon solar cell substrate.
  • low-resistance nickel silicide NiSi
  • CoSi 2 low-resistance cobalt silicide
  • the temperature of the annealing treatment is 200°C to 900°C, and the annealing treatment time can range from a few seconds to a few minutes, depending on the temperature of the annealing treatment and the requirements of the process.
  • the underlying electroplating metal is nickel
  • the annealing temperature is 370°C
  • the annealing time is 3 minutes.
  • the annealing temperature is 500°C
  • the annealing time is 30s.
  • the ohmic contact layer can be formed under different annealing treatment temperatures and annealing times to achieve good ohmic contact.
  • the above annealing treatment can be divided into one annealing treatment and two annealing treatments, and during the two annealing treatments, the annealing temperature of the latter one is higher than the annealing temperature of the previous one.
  • a two-step annealing process is used to form a low-resistance nickel silicide.
  • the first annealing temperature is 260°C to 310°C for 30 seconds
  • the second annealing temperature is 400°C to 500°C for 30 seconds.
  • a two-step annealing process is used to form cobalt silicide.
  • the first annealing process temperature is 400°C to 550°C
  • the second annealing process temperature is 700°C to 850°C.
  • the two-step annealing treatment can effectively inhibit ion diffusion and reduce damage to the crystalline silicon solar cell substrate.
  • the silicide film has low resistivity and uniform properties, and can form a smooth morphology between the metal silicide and the crystalline silicon solar cell substrate.
  • the electroplated contacts formed by sintering are in ohmic contact with the substrate of the crystalline silicon solar cell, which eliminates the need to prepare an electroplating seed layer during electroplating, simplifies the process flow, and solves the problem of incapability of electroplating due to non-conductive cells.
  • an embodiment of the present invention also provides a crystalline silicon solar cell prepared by using the above-mentioned method embodiment 1, including a crystalline silicon solar cell substrate 1, and the front and/or back of the crystalline silicon solar cell substrate 1 are formed with Dielectric layer 5;
  • the dielectric layer 5 is provided with a grid electrode plating area and a plating contact formation area exposing the substrate of the crystalline silicon solar cell.
  • the grid electrode plating area is deposited with a metal electrode layer 6, a metal electrode layer 6 and
  • the substrate of the crystalline silicon solar cell sheet 1 is in ohmic contact, and the electroplated contact forming area is sintered to form electroplated contacts.
  • the present invention provides another method for manufacturing a crystalline silicon solar cell.
  • the cell precursor includes the crystalline silicon solar cell substrate and the substrate formed on the crystalline silicon solar cell substrate.
  • the dielectric layer on the back, that is, the crystalline silicon solar cell is a back contact solar cell, and the method includes the following steps:
  • the battery precursor includes a crystalline silicon solar cell substrate 1, a back doped layer formed on the back of the crystalline silicon solar cell substrate 1, and a dielectric layer 5 formed on the back doped layer, the back doped
  • the layer includes a p-type doped layer region 7 and an n-type doped layer region 8.
  • the p-type doped layer region 7 and the n-type doped layer region 8 are arranged interdigitally or spaced apart, and the dielectric layer 5 is provided with The positive electrode plating region 9 of the p-type doped layer region 7 is exposed, and the negative electrode plating region 10 of the n-type doped layer region 8 is exposed.
  • the front side referred to in this article is the side facing the sun when the back-contact solar cell is in use, and the back side is the side facing away from the sun.
  • the p-type doped layer region 7 and the n-type doped layer region 8 are arranged interdigitally at intervals.
  • a non-interdigital structure may also be used, such as a stripe structure arranged at intervals.
  • This article takes the interdigital structure as an example.
  • the back doped layer can be formed by using a low pressure chemical vapor deposition method to deposit an intrinsic polysilicon layer on the back of the crystalline silicon solar cell substrate 1.
  • the thickness of the intrinsic polysilicon layer may be 100 nm, 150 nm, etc., for example.
  • screen printing the boron-containing doped paste is used for coating, and the material coating area of the boron-containing doped paste appears at intervals in preparation for the subsequent formation of an interdigitated structure.
  • the backside p-type doped layer region 7 is prepared by thermal diffusion at 900°C.
  • a sufficient amount of oxygen is introduced into the furnace to at least oxidize the intrinsic polysilicon that is not coated with the boron-containing doped slurry at 900°C to form a relatively high temperature.
  • Thick silicon oxide oxide layer is used to partially open the film on the oxide layer, and the region to be prepared for the n-type doped layer region 8 is reserved for localization.
  • the open film area is etched and cleaned, and then POCl 3 thermal diffusion is performed to form the back n-type doped layer area 8.
  • the p-type doped layer region 7 and the n-type doped layer region 8 having an interdigitated structure are formed.
  • the process of forming the p-type doped layer region 7 there is no need to perform high-concentration boron doping on the p-type doped layer region 7 to form better contact with the subsequent aluminum-containing electrode, and there is no need High temperature advances. Thereby, the temperature of the process can be lowered, thereby avoiding the negative effects caused by the higher temperature thermal process.
  • a dielectric layer is formed on the back doped layer.
  • a dielectric layer can also be formed on the front surface of the substrate.
  • the material of the dielectric layer 5 may be any one or any combination of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, silicon carbide, amorphous silicon, and polysilicon.
  • the dielectric layer 5 can be a single-layer structure or a multi-layer structure, such as a two-layer structure.
  • 5-15nm aluminum oxide can be deposited on the back doped layer by ALD (Atomic Layer Deposition) as the back passivation.
  • the deposition layer for example, 5nm, 10nm or 15nm, etc., and then on the back passivation layer by PECVD (Plasma Enhanced Chemical Vapor Deposition; enhanced plasma chemical vapor deposition) deposition of 60-90nm thick silicon nitride, such as 70nm, 85nm Wait.
  • the dielectric layer 5 of the multilayer structure can be, but is not limited to, silicon oxide layer/silicon oxynitride layer/silicon nitride layer, silicon oxide layer/aluminum oxide layer/silicon nitride layer, aluminum oxide layer/ A laminated structure of aluminum oxynitride layer/silicon nitride layer, silicon oxide layer/silicon carbide layer/silicon nitride layer.
  • the dielectric layer 5 on the back of the back doped layer is patterned to form a positive electrode electroplating region 9 exposing the p-type doped layer region 7 and the n-type doped layer region is exposed 8 negative electrode plating area 10;
  • the dielectric layer 5 on the back of the back doped layer is etched according to a predetermined pattern to form a positive electrode electroplating area 9 that exposes the p-type doped layer region 7 and exposes the n-type doped
  • the negative electrode electroplating area 10 is located in the n-type doped layer area 8, the positive electrode electroplating area 9 is located in the p-type doped layer area 7, and the negative electrode electroplating area 10 is in the same shape as the positive electrode electroplating area 9 Interdigitated spaced. That is, the negative electrode electroplating area 10 includes a plurality of side-by-side negative electrode fine grid line opening regions 11 and a negative electrode connection line opening region 12 connected to the negative electrode fine grid line opening regions 11, and the positive electrode electroplating region 9 includes multiple side-by-side A positive electrode thin gate line opening area 13 and a positive electrode connection line opening area 14 connected to the positive electrode thin gate line opening area 13 are provided.
  • the widths of the negative electrode electroplating area 10 and the positive electrode electroplating area 9 are adjusted by changing the size of the laser spot, the laser power, the number of laser ablations, or the interval of the laser pulse.
  • S22 Sintering at least a part of at least one of the positive electrode electroplating zone 9 and the negative electrode electroplating zone 10 to form an electroplated contact, and the electroplated contact forms an ohmic contact with the back doped layer while firing.
  • a part of the negative electrode electroplating zone 10 can be sintered to form a plating contact; it can also be sintered in a part of the positive electrode electroplating zone 9 to form a plating contact; it can also be in the negative electrode electroplating zone 10.
  • a part of the area is sintered to form electroplated contacts, and a part of the area of the positive electrode electroplating area 9 is sintered to form electroplated contacts.
  • the electrode paste is printed on at least part of the positive electrode electroplating zone 9 and/or the negative electrode electroplating zone 10.
  • the electrode paste can be silver paste, and the electrode paste is sintered to form electroplated contacts. Electroplating contacts can be formed by laser sintering electrode paste; or,
  • At least part of the positive electrode electroplating zone 9 and/or the negative electrode electroplating zone 10 is laid with metal powder or alloy powder, and electroplated contacts are formed by laser sintering.
  • the shape of the electroplated contacts is strip, circle, square, polygon or character shape or any irregular figure.
  • the size of the electroplating contact does not need to be large, so as to facilitate the connection with the negative electrode of the power supply.
  • the surface of the patterned crystalline silicon solar cell substrate 1 needs to be cleaned.
  • a fluorine-containing solution with a certain mass concentration can be used to clean the surface of the crystalline silicon solar cell substrate 1.
  • the cleaning time ranges from a few seconds to a few minutes, and the length of the cleaning time depends on the concentration of the cleaning solution.
  • the crystalline silicon solar cell substrate 1 is cleaned with a hydrofluoric acid solution.
  • the mass concentration of the hydrofluoric acid solution used may be 0.5%-10%, and the cleaning time may be 5-300 seconds.
  • the temperature of the plating solution during electroplating is 20-100°C.
  • the temperature of the plating solution can be different.
  • increasing the temperature of the electroplating solution can increase the upper limit of the cathode current density.
  • the increase of the cathode current density will increase the cathode polarization, make the coating crystal smaller, and accelerate the deposition and reaction speed.
  • the solution temperature is not as high as possible. Too high electroplating solution temperature will reduce the cathodic polarization and make the coating crystal coarser.
  • the temperature of the electroplating solution is 25-80°C. Using a temperature in this range can ensure that the electroplating solution has good conductivity, improve the dispersion ability and deposition reaction speed of the electroplating solution, reduce pinholes, reduce the internal stress of the coating, and improve the uniformity of the coating.
  • the crystalline silicon solar cell substrate 1 on which the metal electrode layer 6 is formed is annealed to make the metal electrode layer 6 and the back doped layer form an ohmic contact. Specifically, an ohmic contact layer is formed between the metal electrode layer 6 and the corresponding p-type doped layer region 7 and the n-type doped layer region 8 to enhance the bonding force between the metal electrode layer 6 and the silicon of the back doped layer .
  • the manufacturing method of the crystalline silicon solar cell forms electroplating contacts, so that there is no need to prepare an electroplating seed layer during electroplating, which simplifies the process flow and solves the problem that the solar cell cannot be electroplated without a seed layer.
  • another crystalline silicon solar cell provided by this embodiment, namely a back contact solar cell, includes a crystalline silicon solar cell substrate 1, a back doped layer formed on the back of the crystalline silicon solar cell substrate 1 And the dielectric layer 5 formed on the back doped layer.
  • the back doped layer includes a p-type doped layer region 7 and an n-type doped layer region 8.
  • the p-type doped layer region 7 and the n-type doped layer region 8 are Interdigitally arranged or spaced apart, the dielectric layer 105 is provided with a positive electrode electroplating region exposing the p-type doped layer region 7 and a negative electrode electroplating region exposing the n-type doped layer region 8; at least in the positive At least part of one of the electrode electroplating area and the negative electrode electroplating area is sintered to form an electroplating contact, and the electroplating contact is in ohmic contact with the back doped layer; the positive electrode electroplating area and the negative electrode electroplating area are deposited with a metal electrode layer 6, metal The electrode layer 6 is in ohmic contact with the back doped layer.

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Abstract

Procédé de fabrication d'une cellule solaire en silicium cristallin et cellule solaire en silicium cristallin. Le procédé comprend les étapes suivantes consistant à : fournir un précurseur de cellule, le précurseur de cellule comprenant un substrat de cellule solaire en silicium cristallin, et une couche diélectrique formée sur l'avant et/ou l'arrière du substrat de cellule solaire en silicium cristallin, la couche diélectrique étant pourvue d'une région d'électrodéposition d'électrode de grille et d'une région de formation de contact d'électrodéposition qui exposent le substrat de cellule solaire en silicium cristallin; réaliser un frittage dans la région de formation de contact d'électrodéposition du précurseur de cellule pour former un contact d'électrodéposition; et effectuer l'électrodéposition du précurseur de cellule formé avec le contact d'électrodéposition pour former une couche d'électrode métallique dans la région d'électrodéposition d'électrode de grille, pendant l'électrodéposition, le contact d'électrodéposition étant électriquement connecté à l'électrode négative d'un dispositif d'électrodéposition. La solution met en œuvre une électrodéposition sans couche de germe.
PCT/CN2020/074314 2019-06-24 2020-02-05 Procédé de fabrication de cellule solaire en silicium cristallin et cellule solaire en silicium cristallin WO2020258884A1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
CN201910548673.3 2019-06-24
CN201910548673.3A CN112133768A (zh) 2019-06-24 2019-06-24 背接触太阳电池的制作方法及背接触太阳电池
CN201910548287.4 2019-06-24
CN201910548287.4A CN112216766A (zh) 2019-06-24 2019-06-24 晶体硅太阳能电池的制作方法及晶体硅太阳能电池

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102222729A (zh) * 2011-05-31 2011-10-19 浙江晶科能源有限公司 一种改善太阳电池前电极电镀质量的方法
CN104170095A (zh) * 2012-03-14 2014-11-26 Imec非营利协会 用于制造具有镀敷触点的光伏电池的方法
CN108123010A (zh) * 2016-11-29 2018-06-05 茂迪股份有限公司 太阳能电池及其制造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102222729A (zh) * 2011-05-31 2011-10-19 浙江晶科能源有限公司 一种改善太阳电池前电极电镀质量的方法
CN104170095A (zh) * 2012-03-14 2014-11-26 Imec非营利协会 用于制造具有镀敷触点的光伏电池的方法
CN108123010A (zh) * 2016-11-29 2018-06-05 茂迪股份有限公司 太阳能电池及其制造方法

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