WO2020253255A1 - Display panel, preparation method therefor, and display device - Google Patents
Display panel, preparation method therefor, and display device Download PDFInfo
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- WO2020253255A1 WO2020253255A1 PCT/CN2020/076227 CN2020076227W WO2020253255A1 WO 2020253255 A1 WO2020253255 A1 WO 2020253255A1 CN 2020076227 W CN2020076227 W CN 2020076227W WO 2020253255 A1 WO2020253255 A1 WO 2020253255A1
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- photoelectric converter
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- 238000002360 preparation method Methods 0.000 title claims abstract description 12
- 238000000034 method Methods 0.000 claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 39
- 230000008569 process Effects 0.000 claims abstract description 31
- 238000000206 photolithography Methods 0.000 claims abstract description 20
- 238000004519 manufacturing process Methods 0.000 claims abstract description 19
- 230000004888 barrier function Effects 0.000 claims description 70
- 239000010410 layer Substances 0.000 claims description 50
- 239000010408 film Substances 0.000 claims description 28
- 239000010409 thin film Substances 0.000 claims description 21
- 238000001514 detection method Methods 0.000 claims description 18
- 239000000463 material Substances 0.000 claims description 18
- 239000002245 particle Substances 0.000 claims description 14
- 229920002120 photoresistant polymer Polymers 0.000 claims description 7
- 239000011241 protective layer Substances 0.000 claims description 7
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 229910052732 germanium Inorganic materials 0.000 description 6
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
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- 238000002310 reflectometry Methods 0.000 description 5
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- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- FAWGZAFXDJGWBB-UHFFFAOYSA-N antimony(3+) Chemical compound [Sb+3] FAWGZAFXDJGWBB-UHFFFAOYSA-N 0.000 description 2
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- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
Definitions
- the present disclosure relates to the field of display technology, in particular to a display panel, a preparation method thereof, and a display device.
- Mini Light Emitting Diode In the Mini Light Emitting Diode (Mini-LED) display panel, in order to improve the light extraction efficiency of the LED chips, a layer of high reflectivity barrier material can be formed around each LED chip, which can greatly reduce the light emission. At the same time, it can prevent color mixing between adjacent pixels.
- the high-reflectivity barrier wall materials are all solutions added with scattering particles, the concentration of the scattering particles is relatively high. Therefore, after the barrier wall material is coated, the uniformity of the scattering particle concentration in the film layer is poor, and the exposure process At this time, due to the scattering action of the scattering particles on the ultraviolet light, the exposure of the entire film layer will be uneven, resulting in inconsistent patterns of the retaining wall and affecting the light extraction efficiency.
- the drive backplane includes: a base substrate, and a plurality of photoelectric converters located on the base substrate;
- a plurality of light-emitting diode chips located on the driving backplane located on the driving backplane;
- a retaining wall is located above the drive backplane; the retaining wall is located between the adjacent light-emitting diode chips;
- the photoelectric converter is located between the adjacent light-emitting diode chips; the photoelectric converter is configured to detect the amount of exposure during the photolithography process of making the retaining wall.
- the orthographic projection of the photoelectric converter on the base substrate and the orthographic projection of the retaining wall on the base substrate overlap each other.
- the area of the barrier wall parallel to the cross section of the driving backplane increases as the distance from the surface of the driving backplane decreases.
- the display panel is divided into a plurality of detection areas; each of the detection areas is provided with one photoelectric converter.
- the photoelectric converter is provided at every position between two adjacent light-emitting diode chips.
- the photoelectric converter includes: a first electrode, a second electrode located on a side of the first electrode away from the base substrate, and a second electrode located between the first electrode and the base substrate. The photodiode between the second electrodes.
- the driving backplane further includes: a plurality of thin film transistors and a plurality of connection electrodes on the base substrate;
- the drain electrode of the thin film transistor and the connection electrode are connected in a one-to-one correspondence;
- the first electrode and the drain electrode of the thin film transistor are arranged in the same layer, and the second electrode and the connecting electrode are arranged in the same layer.
- the material of the barrier film layer is a negative photoresist material doped with scattering particles.
- the barrier wall surrounds each of the light emitting diode chips.
- it further includes: a protective layer covering the light emitting diode chip.
- embodiments of the present disclosure also provide a method for manufacturing the above-mentioned display panel, which includes:
- the driving backplane includes: a base substrate, and a plurality of photoelectric converters located on the base substrate;
- a plurality of light emitting diode chips are formed on the side of the driving backplane with the photoelectric converter, and the photoelectric converter is located between the adjacent light emitting diode chips;
- the pattern of the barrier wall is formed on the side of the photoelectric converter away from the base substrate through a photolithography process, and during exposure, voltage is provided to each photoelectric converter, and the barrier wall is located according to the The output signal of the photoelectric converter compensates for the corresponding exposure at the position of the retaining wall.
- forming a pattern of a retaining wall on the side of the photoelectric converter away from the base substrate through a photolithography process specifically includes:
- barrier film layer covering the light-emitting diode chip, wherein the material of the barrier film layer is a negative photoresist material doped with scattering particles;
- An exposure machine is used to expose the barrier film layer, and the exposure amount of the exposure machine is adjusted according to the output signal of the photoelectric converter, so that the difference between the output signal of each photoelectric converter and the reference signal is expected Set within
- the barrier film layer is developed to form a pattern of barrier walls surrounding each of the light-emitting diode chips.
- a digital exposure machine is used to expose the barrier film layer.
- the pattern of the barrier wall is formed above the photoelectric converter through a photolithography process before, it also included:
- a protective layer covering the light-emitting diode chip is formed.
- the forming a plurality of light-emitting diode chips on the side of the driving backplane with the photoelectric converter includes:
- a light emitting diode chip is formed on the side of the driving backplane with the photoelectric converter by a transfer method.
- an embodiment of the present disclosure also provides a display device, which includes the above-mentioned display panel.
- FIG. 1 is a schematic structural diagram of a display panel provided by an embodiment of the disclosure
- FIG. 2 is a schematic top view of a display panel provided by an embodiment of the disclosure.
- FIG. 3 is a flowchart of a manufacturing method of a display panel provided by an embodiment of the disclosure
- FIG. 4 is a flowchart of a pattern of forming a retaining wall in the manufacturing method provided by an embodiment of the disclosure
- 5a to 5g are schematic diagrams of the corresponding structures after performing each step in the preparation method of the embodiment of the disclosure.
- the embodiment of the present disclosure provides a display panel, as shown in FIG. 1, including:
- the drive backplane includes: a base substrate 01, and a plurality of photoelectric converters 20 located on the base substrate 01;
- the retaining wall 51 is located above the driving backplane; the retaining wall 51 is located between the adjacent LED chips 30;
- the photoelectric converter 20 is located between adjacent light emitting diode chips 30; the photoelectric converter 30 is configured to detect the amount of exposure during the photolithography process of making the barrier wall 51.
- the display panel provided by the embodiment of the present disclosure has a plurality of photoelectric converters in the driving backplane.
- the voltage is provided to each photoelectric converter during the exposure process.
- the output signal of the photoelectric converter in the area can compensate for the exposure at the location of the barrier.
- the actual exposure of each area can be monitored by the photoelectric converter, so that the graphics of the barrier at each location can be kept consistent, so that each light is emitted.
- the light output efficiency of the diode chip is guaranteed to be consistent, and the light output uniformity of the display panel is improved.
- a barrier wall 51 is provided between adjacent light-emitting diode chips 30. Due to the high reflectivity of the barrier wall, it can reflect the light emitted from the light-emitting diode chip to the surroundings, which can reduce the light loss of the light-emitting diode chip 30, and , Which can prevent color mixing between adjacent LED chips.
- the area of the cross section of the barrier wall 51 parallel to the drive backplane increases as the distance from the surface of the drive backplane decreases, as shown in FIG.
- the shape of the cross section is a trapezoid, so that the light emitted from the light emitting diode chip 30 toward the surroundings can be reflected to emit toward the light emitting surface of the display panel, thereby improving the light energy utilization rate of the display panel.
- the orthographic projection of the photoelectric converter 20 on the base substrate 01 and the orthographic projection of the retaining wall 51 on the base substrate 01 overlap each other.
- the actual exposure of each area can be monitored during the exposure process, and the exposure of each area can be compensated according to the actual exposure of each area to improve the barrier film layer Exposure uniformity.
- Setting the photoelectric converter 20 to overlap with the orthographic projection of the barrier wall 51 on the base substrate 01 can make the actual exposure detected by the photoelectric converter 20 closer to the actual exposure of the barrier 01 at the corresponding position. Make the compensation effect of the exposure better, and then make the exposure uniformity better.
- the display panel is divided into a plurality of detection areas; each detection area is provided with a photoelectric converter.
- the exposure of the detection area can be compensated according to the output signal of the photoelectric converter located in the detection area.
- the detection areas in the display panel can be set to be uniform distributed.
- a photoelectric converter is provided at a position between two adjacent light-emitting diode chips, so that the detection area in the display panel is denser, and each detection can be controlled to the greatest extent. The exposure of the area.
- the photoelectric converter 20 includes a first electrode 24, and a second electrode 25 located on the side of the first electrode 24 away from the base substrate 01, And a photodiode located between the first electrode 24 and the second electrode 25.
- One end of the photodiode is electrically connected to the first electrode 24, and the other end is electrically connected to the second electrode 25.
- voltage can be supplied to the first electrode 24 and the second electrode 25 to detect the position of the photoelectric converter 20 The actual exposure at the location.
- the photoelectric converter 20 described above includes a photodiode, wherein the photodiode can convert the received optical signal into an electrical signal.
- the current External Quantum Efficiency (EQE) EQE of the photodiode at 400nm is about 40%, and the general photolithography process In the exposure, the ultraviolet band between the wavelengths of 365-435 is used, so the photodiode can be used as the photoelectric converter to monitor the exposure.
- EQE External Quantum Efficiency
- the photodiode generally includes a P-type doped region 21, an intrinsic region 22 and an N-type doped region 23;
- the intrinsic region is silicon crystal or germanium crystal, and the N-type doped region It is a silicon crystal or germanium crystal doped with a small amount of impurity phosphorus element (or antimony element):
- the P-type doped region is a silicon crystal or germanium crystal doped with a small amount of impurity boron element (or indium element).
- the above-mentioned driving backplane may further include: a plurality of thin film transistors 10 and a plurality of connecting electrodes 18 on the base substrate 01 ;
- the drain electrode 16 of the thin film transistor 10 and the connection electrode 18 are connected in a one-to-one correspondence;
- the first electrode 24 and the drain electrode 16 of the thin film transistor 10 are arranged in the same layer, and the second electrode 25 and the connection electrode 18 are arranged in the same layer.
- the above-mentioned connecting electrode 18 can be connected to the thin film transistor 10 and the corresponding light emitting diode chip 30, so that the light emitting diode chip 30 can be controlled to emit light through the thin film transistor 10 so as to realize screen display.
- the first electrode 24 and the drain electrode 16 of the thin film transistor 10 are arranged in the same layer. During the process, the first electrode 24 and the drain electrode 16 can be made by the same patterning process, which saves process steps and production costs. Similarly, the first The two electrodes 25 and the connecting electrode 18 can be manufactured by the same patterning process, which further saves process steps and manufacturing costs.
- the driving backplane may also include a gate 11, a gate insulating layer 12, an active layer 13, an interlayer dielectric layer 14, and a source electrode 15 which are sequentially formed on the base substrate 01. , The source electrode 15 and the drain electrode 16 are arranged in the same layer.
- the thin film transistors in the driving backplane may be bottom-gate transistors or top-gate transistors, which is not limited herein.
- the display panel further includes a passivation layer 17 covering the thin film transistor 10 and the photoelectric converter 20, and a planarization layer 19 covering the anode 18 and the second electrode 25, wherein the connecting electrode 18 and the second electrode
- the two electrodes 25 are located on the passivation layer 17, and the planarization layer 19 includes a through hole configured to electrically connect the light emitting diode chip 30 and the connection electrode 18.
- the material of the barrier film layer is a negative photoresist material doped with scattering particles.
- the barrier wall surrounds each light-emitting diode chip. In this way, the loss of light emitted from the light-emitting diode chip to the surroundings can be reduced and the light-emitting efficiency of the light-emitting diode chip can be improved.
- the retaining wall 51 may be in a grid shape as a whole, and each opening of the grid surrounds a light emitting diode chip 30.
- the shape of the opening of the grid may be the same as the shape of the light emitting diode chip 30.
- the display panel provided by the embodiment of the present disclosure, as shown in FIG. 1, it may further include a protective layer 40 covering the light-emitting diode chip 30.
- the display panel may further include a protective cover 02 located on the side of the retaining wall 51 facing away from the photoelectric converter 20.
- the protective cover plate may be a glass cover plate or a protective cover plate with a color filter layer, which is not limited here.
- the embodiments of the present disclosure also provide a manufacturing method of the above-mentioned display panel.
- the manufacturing method refer to the above-mentioned embodiment of the display panel, and the repetition will not be repeated.
- the manufacturing method of the above-mentioned display panel provided by the embodiment of the present disclosure, as shown in FIG. 3, includes:
- S101 Provide a driving backplane;
- the driving backplane includes: a base substrate and a plurality of photoelectric converters located on the base substrate;
- a plurality of light emitting diode chips are formed on the side of the drive backplane with the photoelectric converter, and the photoelectric converters are located between adjacent light emitting diode chips;
- the photoelectric converter before forming the pattern of the barrier wall, the photoelectric converter is formed first, and then the barrier wall pattern is formed on the side of the photoelectric converter away from the driving backplane through a photolithography process, and during exposure , Provide voltage to each photoelectric converter, according to the output signal of the photoelectric converter in the area of the barrier wall, compensate the corresponding exposure at the location of the barrier wall.
- the actual exposure of each area is monitored by the photoelectric converter, and the exposure is compensated, which improves the uniformity of exposure and keeps the pattern of the retaining wall at each position consistent, so that the light output efficiency of each LED chip is consistent and the display is improved.
- the uniformity of the panel light is improved.
- a pattern of a retaining wall is formed on the side of the photoelectric converter away from the base substrate through a photolithography process, as shown in FIG. 4, which specifically includes:
- S203 Use an exposure machine to expose the barrier film layer, and adjust the exposure amount of the exposure machine according to the output signal of the photoelectric converter, so that the difference between the output signal of each photoelectric converter and the reference signal is within a preset range;
- the light during exposure is converted into electrical signal output through the photoelectric converter.
- the exposure machine compensates the exposure of the detection area in real time according to the output signal of the photoelectric converter, so that the light intensity received by each photoelectric converter is maintained Consistent, eliminates the influence of the scattering particles on the uniformity of exposure caused by the scattering of ultraviolet light, and ultimately leads to the reduction of light extraction efficiency caused by the appearance of the retaining wall that does not meet the design requirements.
- the exposure amount of the exposure machine is adjusted according to the output signal of the photoelectric converter, so that the difference between the output signal of each photoelectric converter and the reference signal is within a preset range.
- the upper limit of the above preset range can be a smaller value, for example, the preset range can be 0 to 5%, and the upper limit of the preset range can also be other smaller values, which is not done here. limited. That is to say, by compensating the exposure of the exposure machine, the output signal of each photoelectric converter is close to the reference signal, so that the light intensity received by each photoelectric converter is consistent, that is, it is matched with the position of each photoelectric converter. The actual exposure is the same to improve the exposure uniformity of the retaining wall.
- the higher the concentration of scattered particles the higher the reflectivity of the barrier wall.
- the reflectivity of the general retaining wall can reach more than 90%.
- the barrier wall film layer is developed in step S204 to form the pattern of the barrier wall surrounding each light-emitting diode chip, it may also include performing post-processing on the pattern of the barrier wall. Bake to completely solidify the pattern of the retaining wall.
- a digital exposure machine is used to expose the barrier film layer, so that no mask is required, and through signal program control, a high-precision exposure process can be realized and the process can be simplified. cut costs.
- the display panel can be divided into a plurality of detection areas, each detection area is provided with a photoelectric converter, and the output signal of the photoelectric converter located in the detection area can be referred to.
- the exposure of the detection area is compensated. It is also possible to set a photoelectric converter between every two adjacent light-emitting diode chips, so that the exposure of each detection area can be controlled to the greatest extent.
- the driving backplane has a photoelectric converter. After the light-emitting diode chip is formed on the side, before the pattern of the barrier wall is formed on the side of the photoelectric converter away from the driving backplane through the photolithography process, it may further include:
- a protective layer covering the LED chip is formed.
- the foregoing step S102 may include:
- the light emitting diode chip is formed on the side of the driving backplane with the photoelectric converter by the transfer method.
- the above-mentioned driving backplane may further include a plurality of thin film transistors, and the thin film transistors are electrically connected to the corresponding light emitting diode chip through the connecting electrode, so that the light emitting diode chip can be controlled by the thin film transistor Glow to realize the screen display.
- photodiodes can convert received optical signals into electrical signals.
- the external quantum efficiency (EQE) EQE of photodiodes at 400nm is about 40%.
- the exposure is The ultraviolet band between the wavelengths of 365-435, so the use of photodiodes as photoelectric converters can realize the monitoring of exposure.
- preparation methods provided in the embodiments of the present disclosure include:
- Step 1 Form a driving backplane, which includes a thin film transistor 10, as shown in FIG. 5a.
- the driving backplane includes a gate 11, a gate insulating layer 12, an active layer 13, an interlayer dielectric layer 14, a source electrode 15 and a leakage current which are sequentially formed on the base substrate 01. Very 16 layers of film.
- the first electrode 24 of the photoelectric converter 20 may also be formed.
- Step 2 A plurality of photoelectric converters 20 are formed on the side of the driving backplane with thin film transistors 10, as shown in FIG. 5b.
- the photoelectric converter 20 is a photodiode, which specifically includes a P-type doped region 21, an intrinsic region 22 and an N-type doped region 23.
- the intrinsic region is silicon crystal or germanium crystal
- the N-type doped region is silicon crystal or germanium crystal doped with a small amount of impurity phosphorus element (or antimony element):
- the P-type doped region is doped with a small amount of impurity boron element (or indium). Element) of silicon crystal or germanium crystal.
- Step 4 The passivation layer 17, the anode 18, and the planarization layer 19 covering the thin film transistor 10 and the photoelectric converter 20 are sequentially formed, as shown in FIG. 5c.
- the second electrode 25 of the photoelectric converter 20 can be formed at the same time as the anode 18 is formed.
- Step 5 A plurality of light-emitting diode chips 30 are formed on the side of the driving backplane with the thin film transistor 10 by a transfer method, as shown in FIG. 5d.
- Step 4 Form a protective layer 40 covering the light emitting diode chip 30, as shown in FIG. 5e.
- Step 5 forming a barrier film layer 50 covering the light emitting diode chip 30, as shown in FIG. 5f.
- the material of the barrier film layer is a negative photoresist material doped with scattering particles
- Step 6 Provide voltage to each photoelectric converter; and use a digital exposure machine to expose the barrier film layer, and adjust the exposure of the exposure machine according to the output signal of the photoelectric converter, so that the output signal of each photoelectric converter and the reference The signal difference is within the preset range;
- Step 7 Develop the barrier film layer 50 to form a pattern of the barrier wall 51 surrounding each light-emitting diode chip 30, as shown in FIG. 5g.
- the photoelectric converter before forming the pattern of the barrier wall, the photoelectric converter is formed first, and then the barrier wall pattern is formed on the side of the photoelectric converter away from the base substrate through a photolithography process, and during exposure, the photoelectric conversion The voltage is provided by the photoelectric converter, and the light during exposure is converted into electrical signal output through the photoelectric converter.
- the exposure machine compensates the exposure of the detection area in real time according to the output signal of the photoelectric converter, so that the light intensity received by each photoelectric converter is consistent , Eliminate the impact on the uniformity of exposure caused by the scattering of ultraviolet light by the scattered particles, and ultimately lead to the reduction of the light extraction efficiency caused by the shape of the retaining wall that does not meet the design requirements, improve the uniformity of exposure, and make the retaining wall at each position
- the graphics are kept consistent, so that the light output efficiency of each LED chip is consistent, and the light output uniformity of the display panel is improved.
- the protective cover 02 may also be formed.
- the embodiments of the present disclosure also provide a display device, including any of the above-mentioned display panels provided by the embodiments of the present disclosure.
- the display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, etc.
- the implementation of the display device can refer to the above-mentioned embodiment of the LED display panel, and the repetition will not be repeated.
- the photoelectric converter before forming the pattern of the barrier wall, the photoelectric converter is formed first, and then the barrier wall is formed on the side of the photoelectric converter away from the base substrate through a photolithography process
- the voltage is provided to each photoelectric converter, and the corresponding exposure amount at the position of the barrier wall is compensated according to the output signal of the photoelectric converter in the area where the barrier wall is located.
- the actual exposure of each area is monitored by the photoelectric converter, which improves the uniformity of exposure and keeps the pattern of the retaining wall in each position consistent, so that the light output efficiency of each LED chip is guaranteed to be consistent, and the light output uniformity of the display panel is improved.
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Abstract
Description
Claims (16)
- 一种显示面板,其中,包括:A display panel, which includes:驱动背板;所述驱动背板,包括:衬底基板,以及位于所述衬底基板之上的多个光电转换器;Drive backplane; The drive backplane includes: a base substrate, and a plurality of photoelectric converters located on the base substrate;多个发光二极管芯片,位于所述驱动背板之上;A plurality of light-emitting diode chips located on the driving backplane;挡墙,位于所述驱动背板之上;所述挡墙位于相邻的所述发光二极管芯片之间;A retaining wall is located above the drive backplane; the retaining wall is located between the adjacent light-emitting diode chips;所述光电转换器位于相邻的所述发光二极管芯片之间;所述光电转换器被配置为检测制作所述挡墙的光刻工艺过程中的曝光量。The photoelectric converter is located between the adjacent light-emitting diode chips; the photoelectric converter is configured to detect the amount of exposure during the photolithography process of making the retaining wall.
- 如权利要求1所述的显示面板,其中,所述光电转换器在所述衬底基板上的正投影与所述挡墙在所述衬底基板上的正投影相互交叠。8. The display panel of claim 1, wherein the orthographic projection of the photoelectric converter on the base substrate and the orthographic projection of the retaining wall on the base substrate overlap each other.
- 如权利要求1所述的显示面板,其中,所述挡墙平行于所述驱动背板的横截面的面积,随着与所述驱动背板表面的距离减小而增大。8. The display panel of claim 1, wherein the area of the cross section of the barrier wall parallel to the driving backplane increases as the distance from the surface of the driving backplane decreases.
- 如权利要求1所述的显示面板,其中,所述显示面板分为多个检测区域;每一个所述检测区域内设置一个所述光电转换器。3. The display panel of claim 1, wherein the display panel is divided into a plurality of detection areas; each of the detection areas is provided with one photoelectric converter.
- 如权利要求1所述的显示面板,其中,每相邻两个发光二极管芯片之间的位置均设置所述光电转换器。8. The display panel of claim 1, wherein the photoelectric converter is provided at every position between two adjacent light-emitting diode chips.
- 如权利要求1所述的显示面板,其中,所述光电转换器,包括:第一电极,位于所述第一电极远离所述衬底基板一侧的第二电极,以及位于所述第一电极与所述第二电极之间的光电二极管。7. The display panel of claim 1, wherein the photoelectric converter comprises: a first electrode, a second electrode located on a side of the first electrode away from the base substrate, and a first electrode And the photodiode between the second electrode.
- 如权利要求6所述的显示面板,其中,所述驱动背板,还包括:位于所述衬底基板之上的多个薄膜晶体管以及多个连接电极;7. The display panel of claim 6, wherein the driving backplane further comprises: a plurality of thin film transistors and a plurality of connection electrodes on the base substrate;所述薄膜晶体管的漏电极与所述连接电极一一对应连接;The drain electrode of the thin film transistor and the connection electrode are connected in a one-to-one correspondence;所述第一电极与所述薄膜晶体管的漏电极同层设置,所述第二电极与所述连接电极同层设置。The first electrode and the drain electrode of the thin film transistor are arranged in the same layer, and the second electrode and the connecting electrode are arranged in the same layer.
- 如权利要求1所述的显示面板,其中,所述挡墙膜层的材料为掺有散 射粒子的负性光刻胶材料。The display panel of claim 1, wherein the material of the barrier film layer is a negative photoresist material doped with scattered particles.
- 如权利要求1所述的显示面板,其中,所述挡墙围绕各所述发光二极管芯片。8. The display panel of claim 1, wherein the barrier wall surrounds each of the light emitting diode chips.
- 如权利要求1~9任一项所述的显示面板,其中,还包括:包覆所述发光二极管芯片的保护层。9. The display panel according to any one of claims 1-9, further comprising: a protective layer covering the light-emitting diode chip.
- 一种如权利要求1~10任一项所述的显示面板的制备方法,其中,包括:A method for manufacturing a display panel according to any one of claims 1 to 10, which comprises:提供一驱动背板;所述驱动背板,包括:衬底基板,以及位于所述衬底基板之上的多个光电转换器;Provide a driving backplane; the driving backplane includes: a base substrate, and a plurality of photoelectric converters located on the base substrate;在所述驱动背板具有所述光电转换器的一侧形成多个发光二极管芯片,且所述光电转换器位于相邻的所述发光二极管芯片之间;A plurality of light emitting diode chips are formed on the side of the driving backplane with the photoelectric converter, and the photoelectric converter is located between the adjacent light emitting diode chips;通过光刻工艺在所述光电转换器背离所述衬底基板的一侧形成挡墙的图形,且在曝光时,向各所述光电转换器提供电压,并根据所述挡墙所在区域的所述光电转换器的输出信号,对所述挡墙位置处对应的曝光量进行补偿。The pattern of the barrier wall is formed on the side of the photoelectric converter away from the base substrate through a photolithography process, and during exposure, voltage is provided to each photoelectric converter, and the barrier wall is located according to the The output signal of the photoelectric converter compensates for the corresponding exposure at the position of the retaining wall.
- 如权利要求11所述的制备方法,其中,通过光刻工艺在所述光电转换器背离所述衬底基板的一侧形成挡墙的图形,具体包括:11. The manufacturing method of claim 11, wherein the step of forming a pattern of a retaining wall on the side of the photoelectric converter away from the base substrate through a photolithography process specifically comprises:形成覆盖所述发光二极管芯片的挡墙膜层,其中,所述挡墙膜层的材料为掺有散射粒子的负性光刻胶材料;Forming a barrier film layer covering the light-emitting diode chip, wherein the material of the barrier film layer is a negative photoresist material doped with scattering particles;向各所述光电转换器提供电压;Supply voltage to each of the photoelectric converters;采用曝光机对所述挡墙膜层进行曝光,并根据所述光电转换器的输出信号调节所述曝光机的曝光量,以使各所述光电转换器的输出信号与基准信号的差异在预设范围内;An exposure machine is used to expose the barrier film layer, and the exposure amount of the exposure machine is adjusted according to the output signal of the photoelectric converter, so that the difference between the output signal of each photoelectric converter and the reference signal is expected Set within对所述挡墙膜层进行显影,形成围绕各所述发光二极管芯片的挡墙的图形。The barrier film layer is developed to form a pattern of barrier walls surrounding each of the light-emitting diode chips.
- 如权利要求12所述的制备方法,其中,采用数字曝光机对所述挡墙膜层进行曝光。The preparation method according to claim 12, wherein a digital exposure machine is used to expose the barrier film layer.
- 如权利要求11所述的制备方法,其中,在所述驱动背板具有所述光 电转换器的一侧形成发光二极管芯片之后,在通过光刻工艺在所述光电转换器的上方形成挡墙的图形之前,还包括:The manufacturing method of claim 11, wherein after forming a light-emitting diode chip on the side of the driving backplane with the photoelectric converter, a barrier is formed above the photoelectric converter by a photolithography process Before graphics, it also includes:形成覆盖所述发光二极管芯片的保护层。A protective layer covering the light-emitting diode chip is formed.
- 如权利要求11所述的制备方法,其中,所述在所述驱动背板具有所述光电转换器的一侧形成多个发光二极管芯片,包括:11. The manufacturing method of claim 11, wherein the forming a plurality of light-emitting diode chips on the side of the driving backplane with the photoelectric converter comprises:通过转移的方法在所述驱动背板具有所述光电转换器的一侧形成发光二极管芯片。A light emitting diode chip is formed on the side of the driving backplane with the photoelectric converter by a transfer method.
- 一种显示装置,其中,包括如权利要求1~10任一项所述的显示面板。A display device comprising the display panel according to any one of claims 1-10.
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