WO2020248798A1 - Procédé et dispositif d'identification intelligente d'un bloc non fiable dans un support d'informations non volatil - Google Patents

Procédé et dispositif d'identification intelligente d'un bloc non fiable dans un support d'informations non volatil Download PDF

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WO2020248798A1
WO2020248798A1 PCT/CN2020/091803 CN2020091803W WO2020248798A1 WO 2020248798 A1 WO2020248798 A1 WO 2020248798A1 CN 2020091803 W CN2020091803 W CN 2020091803W WO 2020248798 A1 WO2020248798 A1 WO 2020248798A1
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block
programming
life prediction
value
bad block
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PCT/CN2020/091803
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English (en)
Chinese (zh)
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薛立成
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北京忆芯科技有限公司
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614Improving the reliability of storage systems
    • G06F3/0616Improving the reliability of storage systems in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638Organizing or formatting or addressing of data
    • G06F3/064Management of blocks
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
    • G06F3/0647Migration mechanisms
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
    • G06F3/0652Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • This application relates to the field of storage technology, and in particular to a method and device for identifying unreliable blocks of a non-volatile storage medium.
  • FIG. 1 shows a block diagram of a storage device in the prior art.
  • the storage device 100 is coupled with the host and is used to provide storage capabilities for the host.
  • the host and the storage device 100 can be coupled in a variety of ways, including but not limited to, for example, SATA (Serial Advanced Technology Attachment), SCSI (Small Computer System Interface, small computer system interface), SAS (Serial Attached SCSI), IDE (Integrated Drive Electronics), USB (Universal Serial Bus, Universal Serial Bus), PCIE (Peripheral Component Interconnect Express, PCIe, high-speed peripheral component interconnection), NVMe (NVM Express, high-speed non-volatile storage), Ethernet, fiber channel, wireless communication network, etc. connect the host and the storage device 100.
  • SATA Serial Advanced Technology Attachment
  • SCSI Serial Attached SCSI
  • IDE Integrated Drive Electronics
  • USB Universal Serial Bus
  • PCIE Peripheral Component Interconnect Express
  • PCIe Peripheral Component Interconnect Express
  • NVMe
  • the host may be an information processing device capable of communicating with the storage device in the above-mentioned manner, for example, a personal computer, a tablet computer, a server, a portable computer, a network switch, a router, a cellular phone, a personal digital assistant, etc.
  • the storage device 100 includes an interface 110, a control component 120, one or more NVM chips 130, and a DRAM (Dynamic Random Access Memory) 140.
  • DRAM Dynamic Random Access Memory
  • NAND flash memory phase change memory
  • FeRAM Feroelectric RAM, ferroelectric memory
  • MRAM Magnetic Random Access Memory, magnetoresistive memory
  • RRAM Resistive Random Access Memory, resistive random access memory
  • the interface 110 may be adapted to exchange data with the host through methods such as SATA, IDE, USB, PCIE, NVMe, SAS, Ethernet, and Fibre Channel.
  • the control component 120 is used to control data transmission between the interface 110, the NVM chip 130 and the DRAM 140, and is also used for storage management, physical address mapping from the host logical address to the NVM chip, erasure equalization, bad block management, and the like.
  • the control component 120 can be implemented in multiple ways of software, hardware, firmware, or a combination thereof.
  • the control component 120 can be FPGA (Field-programmable gate array), ASIC (Application Specific Integrated Circuit), and application specific Integrated circuit) or a combination thereof.
  • the control component 120 may also include a processor or a controller, in which software is executed to manipulate the hardware of the control component 120 to process IO (Input/Output) commands.
  • the control component 120 can also be coupled to the DRAM 140 and can access data of the DRAM 140. Store FTL table and/or cached IO command data in DRAM.
  • the control component 120 includes a flash memory interface controller (or referred to as a media interface, a media interface controller, or a flash channel controller).
  • the flash memory interface controller is coupled to the NVM chip 130, and transmits to the NVM chip 130 in a manner that follows the interface protocol of the NVM chip 130. 130 issues commands to operate the NVM chip 130 and receives command execution results output from the NVM chip 130.
  • Known NVM chip interface protocols include "Toggle", "ONFI" and so on.
  • a memory target is one or more logic units (LUN, Logic UNit) sharing a chip enable (CE, Chip Enable) signal in the NAND flash memory package.
  • the NAND flash memory package includes one or more dies (Die).
  • the logic unit corresponds to a single die.
  • the logic unit may include multiple planes. Multiple planes in the logic unit can be accessed in parallel, and multiple logic units in the NAND flash memory chip can execute commands and report status independently of each other.
  • NVM storage media usually stores and reads data in pages. Instead, erase data in blocks.
  • a block (also called a physical block) on the NVM storage medium contains multiple pages.
  • a page (referred to as a physical page) on the storage medium has a fixed size, for example, 17664 bytes. The physical page can also have other sizes.
  • FTL Flash Translation Layer, Flash Translation Layer
  • the logical address constitutes the storage space of the storage device as perceived by upper-layer software such as the operating system.
  • the physical address is the address used to access the physical storage unit of the solid-state storage device.
  • an intermediate address form can also be used to implement address mapping. For example, the logical address is mapped to an intermediate address, and the intermediate address is further mapped to a physical address.
  • the host that accesses the storage device provides FTL.
  • the table structure that stores the mapping information from the logical address to the physical address is called the FTL table.
  • the data items of the FTL table record the address mapping relationship in the storage device in units of data pages.
  • FIG. 2 shows a block diagram of the control part of the storage device in the prior art.
  • the control component 104 of the storage device includes a host interface 210, a front-end processing module 220, a flash management module 230, and one or more media interface controllers 240.
  • the host interface 210 is used to exchange commands and data with the host.
  • the flash memory management module 230 provides logical address to physical address mapping, wear leveling, garbage collection and other functions, and generates IO commands and sends them to the media interface controller 240.
  • the media interface controller 240 is coupled to the NVM chip 105.
  • the media interface controller 240 receives the IO command, and sends a command (read, program, erase, etc.) to the NVM chip to operate the NVM chip according to the IO command.
  • the media interface controller 240 includes an inbound queue 242 and an outbound queue 244.
  • the inbound queue 242 and the outbound queue 244 are used to couple the flash management module 230 and the media interface controller 240.
  • the media interface controller 240 receives the IO command through the inbound queue 242, and also outputs the IO command processing result through the outbound queue 244.
  • the flash memory management module 230 submits an IO command to the media interface controller 240 through the inbound queue 242, and obtains the processing result of the IO command from the outbound queue 244.
  • NAND flash memory has a fast read and write speed, and data must be erased before writing data, and the erasure is performed in blocks.
  • life span of NAND flash memory is limited. Generally speaking, the life span of NAND flash memory is defined by the number of erase and write cycles (Program and Erase cycle, PE cycle).
  • PE cycle Program and Erase cycle
  • the lifespan of common 3D TLC NAND flash memory is generally about 3000 times, which means that after about 3000 erasing and writing of a block of NAND flash memory, its life span will be exhausted and the block will no longer be used. As the lifespan approaches, the reliability of NAND flash memory blocks for storing data gradually decreases.
  • the control unit of the storage device including the NAND flash memory records whether each block of the NAND flash memory is available.
  • the identification of bad blocks in the prior art is mainly based on an afterthought strategy-based on the failure of the NAND flash memory to perform the operation, and the operated block is marked as a bad block, which leads to reading, programming and/ Or erase the command.
  • NAND flash memory needs to be erased before data can be written to it. Therefore, if a failure occurs when erasing a NAND flash memory block, the control component of the storage device marks the block where the erasing failure has occurred as a bad block, and the impact on the storage device is small. If a failure occurs during the programming operation to the NAND flash memory block, the data to be written in the programming operation may be lost, and the control unit of the storage device needs to perform complex data recovery operations (for example, using RAID technology to reconstruct the lost data from redundant data) , Both time-consuming and increased complexity. Similarly, if a failure occurs during a read operation from a NAND flash memory block, a complex data recovery operation also needs to be performed to reconstruct the data to be read, and the user will experience a longer delay, which is disadvantageous.
  • the first method for identifying unreliable blocks which includes the following steps: query the lifetime according to the time of processing the programming command and the number of erasing and writing of the block operated by the programming command
  • the prediction table obtains the life prediction value; if the life prediction value reaches or exceeds the life threshold, the block operated by the programming command is identified as a bad block, and the identification of the bad block is recorded in the bad block table.
  • the second method for identifying unreliable blocks according to the first aspect of the present application, wherein the time for processing a programming command is the amount of time each programming command is processed Time, or the time when one or more selected programming commands were processed.
  • the third method for identifying unreliable blocks according to the first aspect of the present application is provided, wherein the row header of the life prediction table records erasure Write cycle times interval, the list header of the life prediction table records the interval for processing the programming command time, and the data area of the life prediction table records the life of the block under the condition that the peer header corresponds to the content indicated by the list header.
  • the fourth method for identifying unreliable blocks according to the first aspect of the present application wherein the lifetime recorded in the data area of the lifetime prediction table is non-volatile storage The predicted value of the consumed life of the piece of media.
  • the fifth method for identifying unreliable blocks according to the first aspect of the present application is provided, wherein the time and/or programming time for processing a programming command is The number of erasing and writing of the block operated by the command is quantified as the value corresponding to the row header/list header item of the life prediction table, so as to facilitate the query of the life prediction table.
  • the sixth method for identifying unreliable blocks according to the first aspect of the present application, wherein only the block operated by the programming command If the number of erasing and writing is greater than the erasing threshold, the life prediction table is queried to obtain the life prediction value.
  • the seventh method for identifying unreliable blocks according to the first aspect of the present application is provided, wherein, in response to identifying a bad block, generating Filling data and one or more programming commands, and using the generated one or more programming commands to write the generated filling data into the identified bad block.
  • an eighth method for identifying unreliable blocks according to the first aspect of the present application wherein, in response to identifying a bad block, Move the data that has been written on the identified bad block to other blocks.
  • a ninth method for identifying unreliable blocks according to the first aspect of the present application wherein, in response to obtaining the bearer to be written For data blocks, query the bad block table to obtain available blocks; issue programming commands to the obtained available blocks to write data, and record the time for processing the programming commands and the number of erasures and writes of the blocks operated by the programming commands.
  • a tenth method for identifying unreliable blocks according to the first aspect of the present application, wherein each of all blocks of the storage device is recorded The number of erase and write cycles experienced is used to query the life prediction table for each block to obtain the life prediction value.
  • the eleventh method for identifying unreliable blocks according to the first aspect of the present application. It is the number of erasing cycles experienced by each block group in the unit to query the life prediction table for each block group to obtain the life prediction value, wherein each block in the block group has experienced the same number of erasing cycles.
  • the twelfth method for identifying unreliable blocks according to the first aspect of this application is provided, wherein, in a laboratory or a storage device The life prediction table is generated during the use process.
  • the thirteenth method for identifying unreliable blocks according to the first aspect of the present application wherein the reference block of the non-volatile storage medium is repeatedly implemented Erase and program operations, and record the interval of the reference block processing the program command time interval with the designated erasing and writing cycle times to generate a life prediction table.
  • the fourteenth method for identifying unreliable blocks according to the first aspect of the present application wherein, for reference blocks having a designated erasing cycle number interval Draw a curve with the programming time as the horizontal axis and the number of occurrences of the actual programming time of the reference block as the vertical axis. The area enclosed by the curve and the horizontal axis is taken as 1, and the curve position represented by the specified point on the curve The area enclosed by the same horizontal axis is used as the life prediction value to generate a life prediction table.
  • the fifteenth method for identifying unreliable blocks according to the first aspect of the present application wherein the reference block is a non-volatile storage One or more blocks selected in the medium.
  • a sixteenth method for identifying unreliable blocks according to the first aspect of the present application, wherein the execution failure in response to the programming command According to the value of the data area of the bad block programming schedule, the value of the corresponding position in the data area of the life prediction table is increased accordingly to update the life prediction table, where the bad block programming schedule has the same value as the life prediction table Table Structure.
  • the sixteenth method for identifying unreliable blocks according to the first aspect of the present application wherein the row header of the bad block programming schedule records In the interval of erasing and writing cycles, the list header of the bad block programming schedule records the interval of processing the programming command time; or the bad block programming schedule corresponds to the data area of the life prediction table one-to-one.
  • the eighteenth method for identifying unreliable blocks according to the first aspect of the present application wherein, according to the failed programming command The number of erasing and writing times of the accessed block determines the corresponding row/column in the header of the bad block programming schedule; according to the block accessed by the failed programming command, query the programming schedule that records the execution time of the most recent programming command.
  • the nineteenth method for identifying unreliable blocks according to the first aspect of the present application wherein, in response to the bad block programming schedule being updated, the cycle Or under specified conditions, use the bad block programming schedule to update the life prediction table.
  • the twentieth method for identifying unreliable blocks according to the first aspect of the present application there is provided the twenty-first method for identifying unreliable blocks according to the first aspect of the present application, wherein the position of the corresponding A value of the life prediction table is reduced Other values in the column above the position of the corresponding A value, and/or add other values below the position of the corresponding A value in the column of the life prediction table.
  • the twentieth method for identifying unreliable blocks according to the first aspect of the present application there is provided the twenty-second method for identifying unreliable blocks according to the first aspect of the present application, wherein the position of the corresponding A value of the life prediction table is decreased Other values in the column.
  • the twenty-third method for identifying unreliable blocks according to the first aspect of the present application is provided, wherein the lifetime is predicted
  • Ai is the ith value in column A of the data area of the bad block programming schedule
  • i is a positive integer
  • n is the number of data in column A of the data area of the bad block programming schedule
  • LAN is the number of data in the data area of the bad block programming schedule
  • the LA column of the life prediction table corresponds to the A column of the bad block programming schedule.
  • a twenty-fourth method for identifying unreliable blocks according to the first aspect of the present application, wherein, in response to programming The command is successfully executed, and the programming timetable is updated according to the block operated by the programming command and the execution time of the programming command, so as to record the execution time of the most recent programming command of the block in the programming timetable.
  • a method for identifying unreliable blocks according to the twenty-fifth aspect of the first aspect of the present application is provided, wherein the programming schedule Including multiple lines, each line records the execution time of the block and its most recent programming command.
  • the eighteenth method for identifying unreliable blocks according to the first aspect of the present application, wherein the block most recently programmed command
  • the execution time of is the execution time of the last programming command of the block, or the statistical value of the execution time of the most recent programming commands.
  • a twenty-seventh method for identifying unreliable blocks according to the first aspect of the present application, wherein the block is After erasing, until all physical pages of the block are filled with data, the execution time of its programming command is recorded only once in the programming schedule.
  • a method for identifying unreliable blocks according to the twenty-eighth aspect of the first aspect of the present application is provided, wherein the programming schedule Record the execution time range of multiple programming commands for the same block.
  • the twenty-eighth method for identifying unreliable blocks according to the first aspect of the present application provides a twenty-ninth method for identifying unreliable blocks according to the first aspect of the present application, wherein the maximum value and the minimum value represent multiple The execution time range of the programming command.
  • a method for identifying unreliable blocks according to the thirtieth aspect of the first aspect of the present application, wherein when the block is erased Divide, or the interval in which the number of times the block is erased changes relative to the interval indicated by the life prediction table, clear the record corresponding to the block in the programming schedule, and re-record the execution of the programming command for the block in the programming schedule Time or time range.
  • a first storage device including: a control component, a DRAM, and an NVM chip; the time for the control component to process a programming command according to the NVM chip and the size of the block operated by the programming command For the number of erasing and writing, query the life prediction table stored in the DRAM or the internal memory of the control component to obtain the life prediction value; if the life prediction value reaches or exceeds the life threshold, the control component recognizes the block operated by the programming command as a bad block , And record the bad block identification in the bad block table stored in DRAM.
  • the control component in response to obtaining a block carrying data to be written, queries the bad block table to obtain available The control component issues programming commands to the available blocks in the obtained NVM chip to write data, and records the time for processing the programming command and the number of erasing and writing of the block operated by the programming command.
  • the third storage device According to the first or second storage device of the second aspect of the present application, there is provided the third storage device according to the second aspect of the present application, wherein the row header of the life prediction table records the interval of erasing cycles, and the life prediction table The header of the list records the interval for processing the programming command time, and the data area of the life prediction table records the life of the block under the condition that the peer header corresponds to the content indicated by the list header.
  • the fourth storage device according to the second aspect of the present application, wherein, in response to identifying a bad block, the control component generates padding data and one or more programming Command, using the generated one or more programming commands to write padding data into the identified bad block that has not been filled with data.
  • the fifth storage device In response to identifying a bad block, the control component will The written data is moved to other blocks of the NVM chip.
  • the sixth storage device includes: a processor, a memory, and a media interface controller; a processor; It is coupled to the media interface controller to obtain the time for the NVM chip to process the programming command and the number of erasing and writing of the block operated by the programming command, and obtain the life prediction value by querying the life prediction table stored in the memory; the processor is based on the life prediction value And the lifetime threshold to identify bad blocks, and record the identification of the bad blocks in the bad block table stored in the DRAM.
  • the seventh storage device according to the second aspect of the present application, wherein, in response to an interrupt generated by the media interface controller, the processor acquires the time for processing the programming command and the location of the programming command The number of erases and writes of the operated block.
  • the media interface controller includes: an inbound queue for receiving IO commands and an outbound queue for outputting IO command processing results ;
  • the processor obtains the processed programming command from the outbound queue to obtain the time for processing the programming command and the number of erasing and writing of the block operated by the programming command.
  • the ninth storage device according to the second aspect of the present application, wherein the control component further includes a flash memory management module that generates IO commands, and the flash memory management module identifies Bad blocks, and fill the identified bad blocks into the bad block table.
  • the flash memory management module is based on the execution result of the erase command, the number of erasing of the block and/or the slave block Bad blocks are identified in the error rate of the read data.
  • the eleventh storage device according to the second aspect of the present application, wherein the flash memory management module provides the processor with a record of suspected damage identified by the flash memory management module.
  • the monitoring block table of the block in response to the accessed block being located in the monitoring block table, the processor accesses the life prediction table to obtain the life prediction value of the block.
  • the flash memory management module sets the number of erasing times higher than the threshold, and/or read data errors Blocks with a rate higher than the threshold are regarded as suspected bad blocks and filled in the monitoring block table.
  • the flash memory management module accesses the bad block table in the DRAM to obtain available The block writes data.
  • the fourteenth storage device according to the second aspect of the present application, wherein the processor has a dedicated instruction memory to be independent of the controller Front-end processing module and/or flash management module.
  • the fifteenth storage device according to the second aspect of the present application, wherein the processor and/or the memory for recording the life prediction table is set in Inside the media interface controller.
  • the sixteenth storage device wherein the control component further includes a first data moving module and a second data moving module.
  • the first data movement module moves the data to be written in the programming command in the DRAM to the media interface controller to process the programming command
  • the second data movement module moves the data read by the media interface controller from the NVM chip to the DRAM To process the read command.
  • the seventeenth storage device according to the second aspect of the present application, wherein the error correction encoder of the first data moving module performs error correction encoding on the moved data, And provide the encoded data to the media interface controller.
  • the sixteenth storage device of the second aspect of the present application there is provided the eighteenth storage device according to the second aspect of the present application, wherein the error correction decoder of the second data movement module performs processing on the data read from the NVM chip Error correction decoding, and move the decoded data to DRAM.
  • Figure 1 shows a block diagram of a storage device in the prior art
  • Figure 2 shows a block diagram of a control component of a storage device in the prior art
  • Figure 3 shows a life prediction table according to an embodiment of the present application
  • Figure 4A shows a block diagram of a storage device according to an embodiment of the present application
  • FIG. 4B shows a flowchart of bad block identification according to an embodiment of the present application
  • Fig. 5 shows a block diagram of a storage device according to another embodiment of the present application.
  • Fig. 6 shows a block diagram of a storage device according to another embodiment of the present application.
  • Fig. 7A shows a programming schedule according to another embodiment of the present application.
  • FIG. 7B shows a bad block programming schedule according to another embodiment of the present application.
  • Fig. 7C shows a flowchart of updating the life prediction table according to an embodiment of the present application.
  • the programming operation of the NAND flash memory is usually implemented through an ISPP (Incremental-step-pulse programming) algorithm.
  • ISPP Intelligent-step-pulse programming
  • multiple programming pulses are applied to the programmed page, and it is verified whether the data is successfully written after each programming pulse. If it is found after a certain programming pulse that the data has been successfully written into the NAND flash memory, the programming process is completed.
  • the speed of NAND flash memory processing programming commands is related to the number of programming pulses/verification.
  • the speed of processing programming commands In the early stage of the block life of NAND flash memory, the speed of processing programming commands is usually relatively close. However, for the end of the life of the block, the performance of some or all of the pages deteriorates, and more programming pulses and more verification processes are required. Therefore, the time to process the programming command is larger (the speed becomes slower). Therefore, the time for the NAND flash memory to process the programming command can be used as a basis for measuring the life of the NAND flash memory block.
  • it is intended to use the time for the NAND flash memory to process the programming command to estimate whether the life of the NAND flash memory block is about to end, and to reduce the impact of the end of life block on the data reading and writing of the storage device.
  • Fig. 3 shows a life prediction table according to an embodiment of the present application.
  • each row in the first column of the life prediction table (called the header) records the time interval for processing programming commands, for example, a time interval of less than 1ms (milliseconds), a time interval of 1 ⁇ 1.5ms, 1.5 ⁇ 2ms
  • the time interval of —The first row of the life prediction table (called the row header) records the interval of the erasing cycle times, for example, 0-499 times, 500-999 times, 1000-1499 times...
  • the data area of the life prediction table in FIG. 3 records the lifespan corresponding to the interval of erasing and writing cycles indicated by the header of the same line and the programming time interval indicated by the header of the list.
  • the lifetime recorded in the data area of the lifetime prediction table is the predicted value of the consumed lifetime of the NAND flash memory block, expressed as a percentage.
  • 1% represents the lifetime of the flash memory block has been consumed 1% (99% of the lifespan has not yet been consumed)
  • 21% represents that the lifespan of the flash memory block has been consumed 21% (there are 79% of the lifespan has not been consumed)
  • 100% represents that the life of the flash memory block has been exhausted (can no longer be used).
  • the "1%" indicated by the reference numeral 310 indicates that the erasing cycle times range from 0 to 499 times at the corresponding position of the row header, and the time interval for processing the programming command at the corresponding position of the list header is less than 1ms. It represents a block whose number of erase and write cycles of NAND flash memory is 0-499 times.
  • the predicted lifetime of the block is 1%; "21%” indicated by reference numeral 320 "In the corresponding position of the row header, the range of the number of erasing and writing cycles is 0-499, and the time period of processing the programming command in the corresponding position of the list header is 3 ⁇ 4ms, which represents the number of erasing and writing cycles of the NAND flash memory is 0-499.
  • the predicted lifetime of the block is 21%; the “100%” indicated by the reference numeral 340 indicates the number of erasing cycles at the corresponding position of the row header
  • the interval is 1500-1999 times, and the time interval for processing programming commands is indicated at the corresponding position of the list head is 4 ⁇ 5ms, which represents the block with 1500-1999 times of erasing and writing cycles of NAND flash memory. If it is the time interval for processing programming commands If it is 4 to 5 ms, the predicted lifetime of the block is 100% (it is predicted that its lifetime is exhausted).
  • the life prediction table shown in FIG. 3 can be consulted to know the life prediction of the block. Further, a life threshold (for example, 95%) is set, and if the life prediction value of the block obtained by the query reaches or exceeds the life threshold, the block is marked as a bad block and no more data is written to the block (no more Perform programming operations on this block). This reduces the probability of programming failure or reading failure during the use of unreliable blocks, thereby reducing the number of times that data recovery needs to be performed.
  • interval of the number of erasing cycles represented by each column of the row header of the life prediction table and/or the interval of processing the programming operation time represented by each row of the list header may take other values.
  • a smaller interval granularity helps to improve the prediction accuracy, but increases the size of the life prediction table and table lookup overhead.
  • a larger interval granularity helps to reduce the size of the life prediction table and reduce the table lookup overhead, but the prediction accuracy is correspondingly May be reduced.
  • the control unit of the storage device also records the number of erase and write cycles that each block of its NAND flash memory has gone through. For example, the control unit records the number of erasing cycles experienced by each of all blocks of the storage device. As another example, the control component implements the erasing operation in units of block groups (including multiple blocks). Each block in the block group has experienced the same number of erasing and writing cycles, so that the control component only records its experience for each block group. The number of erase and write cycles. The number of erasing cycles experienced by a block or block group is simply referred to as the number of erasing and writing cycles of the block or block group.
  • a life prediction table during the use of the laboratory or storage equipment. For example, one or more blocks of the NAND flash memory are selected as the reference block, the erasing and programming operations are repeated on the reference block, and the programming time distribution of the reference block with the specified erasing and writing times (interval) is recorded, which is used to predict the specified erasing The predicted life of the block with the number of write times (interval) when its programming time falls within the specified time interval.
  • a curve is drawn with the programming time as the horizontal axis, and the number of times the actual programming time of the reference block appears as the vertical axis, and the area enclosed by the curve and the horizontal axis is regarded as 1.
  • the area of the area enclosed by the curve position represented by the specified point on the curve and the horizontal axis is used as the life prediction value.
  • NAND flash memory is taken as an example to describe the bad block prediction method according to the embodiment of the present application, it is understandable that the bad block prediction method according to the embodiment of the present application is also applicable to other non-volatile storage media.
  • Fig. 4A shows a block diagram of a storage device according to an embodiment of the present application.
  • the storage device 400 includes an interface 430, a control unit 450, one or more NVM chips 420, and a DRAM 410.
  • the DRAM 410 stores a bad block table 412 and a life prediction table 414.
  • the bad block table 412 records the identifiers (for example, addresses) of all bad blocks in the NVM chip 420.
  • the control component queries the bad block table 412 to ensure that no data is written to the bad block.
  • the control unit 450 issues a programming command to the NVM chip to write data to the NVM chip, and records the time when the NVM chip 420 processes the programming command. According to the number of erasing and writing of the block operated by the programming command and the time for processing the programming command, the control component 450 also queries the life prediction table 414 to obtain the life prediction value of the block. If the acquired lifetime prediction value is greater than the specified threshold value (for example, 95%), the control component 450 also records the identifier of the block in the bad block table 412.
  • the specified threshold value for example, 97%
  • the control unit 450 also generates padding data (for example, using random numbers as padding data), and The padding data is written into the block to fill all its blank pages to improve the reliability of valid data on the block. Still optionally, in response to identifying the end of the life of the block according to the life prediction table 414, the control component 450 moves the valid data stored on the block to another block as soon as possible.
  • Fig. 4B shows a flowchart of bad block identification according to an embodiment of the present application.
  • the control component of the storage device obtains the time when the NVM chip of the storage device processes the programming command (460).
  • the control component obtains the processing time of each programming command, or selects the processing time of one or more programming commands.
  • the time for processing the program command is acquired once.
  • the average time for processing multiple programming commands in a certain block after being erased represents the time for processing the programming commands in the block.
  • the control unit also obtains the number of erasing and writing of the block accessed by the programming command.
  • the life prediction table 414 (see also FIG. 4A) (470) is used to query the life prediction table 414 (see also FIG. 4A) (470) with the number of erasing and writing of the block and the time for processing the programming command to obtain the life prediction of the block.
  • the number of times of erasing and writing of the block and/or the time for processing the programming command are quantified as values corresponding to the items of the row header/list header of the life prediction table as shown in FIG. 3, so as to query the life prediction table.
  • the control component does not predict the life of all blocks. For example, referring back to the life prediction table in Fig. 3, a block whose number of erasing and writing is 0-499 times, even if it takes a long time to process the programming command (for example, greater than 10ms), the predicted life will not exceed the specified threshold. Therefore, the control unit does not query the life prediction table for blocks whose number of erasing and writing times are less than the threshold value (for example, 500 times), nor does it try to predict the life of the blocks.
  • the threshold value for example, 500 times
  • the control component compares whether the predicted life queried from the life prediction table exceeds a specified threshold (for example, 95%) (480). If the predicted life does not exceed the specified threshold, the control component does not require further processing. If the predicted life span exceeds the specified threshold, the control component recognizes the block as a bad block with an end of life, and records the block identification (490) in the bad block table 412 (see also FIG. 4A). Optionally, for the identified bad block, one or more programming commands and padding data are also generated, and the generated padding data is written into the identified bad block with the programming command (495). Still alternatively or further, for the identified bad block, the control component moves the data written on it to other blocks as soon as possible.
  • a specified threshold for example, 95%) (480). If the predicted life does not exceed the specified threshold, the control component does not require further processing. If the predicted life span exceeds the specified threshold, the control component recognizes the block as a bad block with an end of life, and records the block identification (490) in the bad block table 412 (see also FIG
  • Fig. 5 shows a block diagram of a storage device according to another embodiment of the present application.
  • the control component 500 of the storage device includes a host interface 510, a front-end processing module 520, a flash management module 530, and one or more media interface controllers 540.
  • the media interface controller 540 is coupled to the NVM chip 105.
  • the media interface controller 540 includes an inbound queue 542 and an outbound queue 544.
  • the media interface controller 540 receives the IO command through the inbound queue 542, and also outputs the IO command processing result through the outbound queue 544.
  • the control part 500 also includes a processor 550.
  • the processor 550 is coupled to the media interface controller 540.
  • the control part 500 also includes a memory storing the life prediction table 514.
  • the processor 550 has a dedicated instruction memory (not shown), and the processor 550 is independent of the front-end processing module 520 and/or the flash management module 530, so as to reduce the influence on the existing part of the control component 500.
  • the life prediction table 514 has a small size, for example, several KB or less, and is thus stored in the memory inside the control section 500.
  • the control unit 500 is also coupled to an external memory (DRAM), and the bad block table 512 is stored in the external memory.
  • the flash memory management module 530 can access the bad block table 512 in the external memory to avoid allocating bad blocks to carry the data to be written.
  • the processor 550 monitors one, multiple, or all processed programming commands on the NVM 105 to obtain the time for the NVM 105 to process the programming commands, and further obtains the life prediction of the block of the NVM 105 by querying the life prediction table 514.
  • the processor 550 is in a standby state. If a programming command is processed, the media interface controller 540 generates an interrupt, and the processor 550 responds to the interrupt and obtains the execution time of the programming command, as well as the number of erasing and writing of the block operated by the programming command. The processor 550 queries the life prediction table 514 to obtain the life prediction of the block operated by the programming command, and in response to the life prediction exceeding the specified threshold, records the block in the bad block table 512, so that the flash management module 530 The block will no longer be used.
  • the processor 550 obtains the processed programming command from the outbound queue 544, and then obtains the execution time of the programming command and the number of erasing and writing of the block operated by the programming command.
  • the processor 550 identifies bad blocks according to the execution time of the programming command, and fills the identified bad blocks into the bad block table 512, and the flash memory management module 530 also identifies the bad blocks and fills the identified bad blocks into Bad block table 512.
  • the flash memory management module 530 identifies bad blocks according to the execution result of the erase command, the number of erasing and writing of the block, and/or the error rate of data read from the block, and fills the identified bad blocks into the bad block table. 512.
  • the flash memory management module 530 also provides a monitoring block table to the processor 550.
  • the "suspected" bad blocks identified by the flash memory management module 530 are recorded in the monitoring block table.
  • the flash memory management module 330 regards the blocks with the number of erasing and writing times higher than the threshold and/or the data error rate higher than the threshold as "suspected" bad blocks, and fills them in the monitoring block table.
  • the processor 550 obtains the life prediction of the "suspected" bad block according to the monitoring block table. Therefore, the processor 550 does not need to obtain life predictions for all blocks, which reduces the workload of the processor 550.
  • Fig. 6 shows a block diagram of a storage device according to another embodiment of the present application.
  • the control component 600 of the storage device includes a host interface 610, a front-end processing module 620, a flash memory management module 330, and one or more media interface controllers 640.
  • the media interface controller 640 is coupled to the NVM chip 105.
  • the media interface controller 640 includes an inbound queue 642 and an outbound queue 644.
  • the flash memory management module 630 submits an IO command to the media interface controller 640 through the inbound queue 642, and obtains the processing result of the IO command provided by the media interface controller 640 from the outbound queue 644.
  • the control part 600 also includes a processor 650 coupled to the media interface controller 640.
  • the control unit 600 also includes a memory in which the life prediction table 614 is stored.
  • the control unit 600 is also coupled to an external memory (DRAM), and the bad block table 612 is stored in the external memory.
  • DRAM external memory
  • the control component 600 further includes a data moving module 660 and a data moving module 662.
  • the data transfer module 660 transfers the data to be written in the programming command in the DRAM to the media interface controller.
  • the data transfer module 662 transfers the data read by the media interface controller 640 from the NVM 105 to the DRAM.
  • the data movement module 660 further includes an error correction encoder, which performs error correction encoding on the moved data, and provides the encoded data to the media interface controller 640.
  • the data movement module 662 also includes an error correction decoder, which performs error correction decoding on the data read from the NVM 105, and moves the decoded data to the DRAM.
  • the processor 650 monitors one, more or all of the programmed commands processed on the NVM 105 to obtain the time for processing the programmed commands, and further obtains the life prediction of the block of the NVM 105 by querying the life prediction table 614.
  • the processor 650 obtains the life prediction of the block operated by the programming command by querying the life prediction table 614, and in response to the life prediction exceeding the specified threshold, records the block in the bad block table 612, so that the flash management module 630 The block will no longer be used.
  • the processor 650 and/or the memory of the recording lifetime prediction table 614 are provided inside the media interface controller 640.
  • Fig. 7A shows a programming schedule according to another embodiment of the present application.
  • the life prediction table is updated to make the life of the block represented by the life prediction table more accurate.
  • the programming schedule of FIG. 7A includes multiple rows, and each row records the execution time of the block and its most recent programming command.
  • a block is represented by a block number or block address.
  • the programming schedule is updated according to the block operated by the programming command and the execution time of the programming command to record the execution time of the most recent programming command of the block in the programming schedule.
  • the execution time of the most recent programming command of the block is the execution time of the most recent programming command of the block, or a statistical value of the execution time of the most recent programming commands.
  • the execution time of its programming command is recorded only once in the programming schedule to reduce the task of updating the programming schedule load.
  • the range of execution time of multiple programming commands for the same block is recorded in the programming time table, for example, the maximum value and the minimum value represent the range of execution time of multiple programming commands.
  • the programming schedule is cleared Record the corresponding record of the block, and re-record the execution time or time range of the programming command for this block in the programming schedule.
  • Fig. 7B shows a bad block programming schedule according to another embodiment of the present application.
  • the bad block programming schedule has the same or similar table structure as the life prediction table.
  • the columns of the row table header indicate multiple ranges of erasing and writing times, and the column header indicates multiple ranges of program command execution time.
  • the bad block programming schedule is updated. Determine the corresponding column in the row header of the bad block programming schedule according to the number of erasing and writing of the block accessed by the failed programming command. According to the block accessed by the failed programming command, query the programming schedule shown in FIG. 7A to obtain the execution time of the most recently successfully executed programming command of the block, and use the execution time in the bad block programming schedule of FIG. 7B The header of the list determines the corresponding row. And according to the rows and columns of the determined bad block programming schedule, the number of times is recorded in the corresponding position of the determined bad block programming schedule (for example, the value of the position of the bad block programming schedule is incremented).
  • the number of erasing and writing of the programming command is 1200, and when the block has been successfully programmed recently, the execution time of the programming command is 12ms.
  • the column indicating the number of erasing and writing in the row table header of the bad block programming schedule is 1000-1499.
  • the row indicating ">10ms" in the header of the bad block programming schedule is obtained, and the corresponding position of the bad block programming schedule (indicated by reference numeral 710) The value is incremented.
  • the life prediction table is updated with the bad block programming schedule.
  • the bad block programming schedule corresponds to the data area of the life prediction table one-to-one.
  • the value of the data area of the bad block programming schedule is increased accordingly.
  • a certain value in the data area of the bad block programming schedule is A
  • the number of programming used for each column of data used to construct the life prediction table is LN
  • the values of column A in the data area of the bad block programming schedule are A1, A2...Ai,...An in order, where i is a positive integer, and column LA corresponding to column A of the life prediction table is updated accordingly .
  • the number of programming used to obtain the LA column of the life prediction table is LAN
  • the value of the position corresponding to the Ai value of the life prediction table is incremented And update the LAN to
  • the bad block programming schedule is not used, and in response to the execution failure of the programming command, the number of erasing and writing accessed by the programming command is obtained, and the block's recent successful execution is obtained through the programming schedule of FIG. 7A Program the execution time of the command, and increase the value corresponding to the number of erasing and writing and the position of the execution time in the life prediction table.
  • other values below (after) the column corresponding to the number of erasing and writing and the position of the execution time in the life prediction table are also added.
  • Fig. 7C shows a flowchart of updating the life prediction table according to an embodiment of the present application.
  • the control unit of the storage device issues a programming command (710) to write data to the NVM chip or read data from the NVM chip.
  • the programming schedule is updated (730).
  • the control component obtains the time for the NVM chip of the storage device to process the programming command, and updates the programming schedule according to the block operated by the programming command and the execution time of the programming command to record the execution time of the most recent programming command of the block in the programming schedule.
  • the bad block programming schedule is updated (740). Determine the corresponding column in the row header of the bad block programming schedule according to the number of erasing and writing of the block accessed by the failed programming command. According to the execution time of the most recently successfully executed programming command of the block accessed by the failed programming command, the corresponding row is determined at the head of the bad block programming schedule. And according to the rows and columns of the determined bad block programming schedule, the number of times is recorded in the corresponding position of the determined bad block programming schedule (for example, the value of the position of the bad block programming schedule is incremented).
  • the life prediction table is updated with the bad block programming schedule (750).
  • the method and device of the present application can be implemented by hardware, software, firmware, and any combination of the foregoing.
  • the hardware may include digital circuits, analog circuits, digital signal processors (DSP), dedicated inheritance circuits (ASIC), and so on.
  • the software may include computer-readable programs, which, when executed by a computer, implement the methods described in this application.
  • the software of this application can also be stored in a computer-readable storage medium, such as a hard disk, an optical disc, etc., which stores a program.
  • a computer-readable storage medium such as a hard disk, an optical disc, etc.
  • the program When the program is executed by a device, the device can perform the above Methods.

Abstract

L'invention concerne un procédé d'identification intelligente d'un bloc non fiable consistant à : rechercher dans une table de prédiction de durée de vie de service pour obtenir une valeur de durée de vie de service prédite conformément à une quantité de temps nécessaire pour traiter une instruction de programmation et le nombre d'opérations d'effacement/d'écriture qui ont été effectuées par rapport à un bloc concerné par l'instruction de programmation; si la valeur de durée de vie de service prédite atteint ou dépasse un seuil de durée de vie de service, identifier le bloc concerné par l'instruction de programmation en tant que bloc endommagé, et enregistrer un identifiant du bloc endommagé dans une table de blocs endommagés. L'invention permet d'identifier ou de prédire efficacement le fait qu'un bloc d'un support d'informations s'approche de la fin de durée de vie de service de façon à éviter une écriture de données sur ledit bloc, ce qui permet d'atténuer l'impact sur un appareil de mémorisation en raison d'une défaillance d'une opération d'effacement, d'une opération de programmation ou d'une opération de lecture.
PCT/CN2020/091803 2019-06-14 2020-05-22 Procédé et dispositif d'identification intelligente d'un bloc non fiable dans un support d'informations non volatil WO2020248798A1 (fr)

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