WO2020233542A1 - Led display device and preparation method thereof, and naked eye stereoscopic display system - Google Patents

Abstract

An LED display device preparation method, comprising: providing multiple layers of material; defining multiple micro-LED subpixel regions (2000-4000) and corresponding multiple HEMT regions (1000) in the multiple layers of material; forming in the multiple micro-LED subpixel regions (2000-4000) a multiple-quantum well layer pattern (440) and a P-type doping layer pattern (450); forming in the multiple micro-LED subpixel regions (2000-4000) an N-type doping layer pattern (530), and forming in the multiple HEMT regions (1000) a pair of N-type doping layer patterns (532); forming gate electrode material (660) between the pair of N-type doping layer patterns (532) in the multiple HEMT regions (1000); forming electrodes (770, 870, 872, 874) in the multiple micro-LED subpixel regions (2000-4000) and the multiple HEMT regions (1000); removing material of trench layers (310, 320) so as to form gaps (900) between adjacent multiple micro-LED subpixel regions (2000-4000) and multiple HEMT regions (1000); using an insulating material (1080) to fill in the gaps (900); forming circuit wiring connecting layer structures (920-940) of multiple micro-LED subpixels (10) and multiple HEMT layer structures (910). The present invention helps improve micro-LED display device yield rate; also provided are an LED display device and a naked-eye stereoscopic display system.

Description

LED display device, preparation method thereof, and naked-eye stereoscopic display system

This application claims the priority of a Chinese patent application filed with the Chinese Patent Office on May 20, 2019, with application number 201910422318.1, and the title of the invention is "GaN-based monolithic integrated inorganic LED display", the entire content of which is incorporated by reference In this application.

Technical field

This application relates to the field of display technology, for example, to an LED display device and a manufacturing method thereof, and a naked-eye stereoscopic display system.

Background technique

Currently, displays widely use glass substrate materials with thin film transistors (TFT) to control the backlight passing through the liquid crystal pixels.

With the widespread use of display technology in consumer electronic products such as mobile phones, tablet computers, personal computers, televisions, VR/AR, wearable devices, etc.

Recently, related products have introduced higher-efficiency displays, such as organic light-emitting diode (OLED), active matrix organic light-emitting diode (AMOLED)-based displays, which allow each pixel to emit no light at all when displaying black. The manufacturing process of AMOLED devices often involves evaporation of organic materials to form a light-emitting layer. Due to the limitation of the evaporation process, it is difficult to greatly increase the pixel density in AMOLED display devices.

Currently, it has been proposed to use Micro-LEDs in high-resolution displays. Compared with OLED, micro LED may be more energy-efficient, and has the possibility of achieving ultra-high resolution or ultra-fine display.

In the process of implementing the embodiments of the present disclosure, at least the following problems are found in related technologies:

Due to the extremely small size of the micro LED, the yield rate of the display device containing the micro LED is low.

Summary of the invention

In order to have a basic understanding of some aspects of the disclosed embodiments, a brief summary is given below. This summary is not a general comment, nor is it intended to determine key/important components or describe the scope of protection of these embodiments, but serves as a prelude to the detailed description that follows.

The embodiments of the present disclosure provide an LED display device, a manufacturing method thereof, and a naked-eye stereoscopic display system, so as to avoid the problem of low yield when manufacturing display devices containing micro LEDs.

The manufacturing method of the LED display device provided by the embodiment of the present disclosure includes:

S1. Multi-layer materials are provided. The multi-layer materials include a substrate, a channel layer on the substrate, an N-type doped layer on the channel layer, a multiple quantum well layer on the N-type doped layer, and P-type doped layer on the quantum well layer; multiple micro LED sub-pixel regions and corresponding multiple HEMT regions of high electron mobility transistors are defined in the multilayer material;

S2. Forming multiple quantum well layer patterns and P-type doped layer patterns in multiple micro LED sub-pixel regions by means of material removal;

S3, forming an N-type doped layer pattern in a plurality of micro LED sub-pixel regions and a pair of N-type doped layer patterns in a plurality of HEMT regions by means of material removal;

S4, forming a gate material between a pair of N-type doped layer patterns in a plurality of HEMT regions;

S5, forming electrodes in a plurality of micro LED sub-pixel regions and a plurality of HEMT regions;

S6. Remove the material of the channel layer to form a gap between the adjacent multiple micro LED sub-pixel regions and multiple HEMT regions, thereby forming a layer structure of multiple discrete micro LED sub-pixels and multiple HEMT layer structures ；

S7. Fill the gap with insulating material; and

S8, forming a circuit wiring that electrically connects the layer structure of the plurality of micro LED sub-pixels and the layer structure of the plurality of HEMTs.

In some embodiments, the substrate may be a sapphire substrate. Optionally, the channel layer may include a GaN layer and an AlGaN layer on the GaN layer. Optionally, the N-type doped layer may be an N-type doped GaN layer, and the P-type doped layer may be a P-type doped GaN layer. Optionally, the gate material may be SiO2. Optionally, the insulating material may be SiO2.

In some embodiments, multiple capacitor regions may be defined in the multilayer material, and capacitors are formed in the multiple capacitor regions.

In some embodiments, S3 may further include: forming N-type doped layer patterns in the plurality of capacitor regions by means of material removal. Optionally, S6 may further include: forming a gap between the capacitor area and the adjacent capacitor area, sub-pixel area or HEMT area by means of material removal, thereby forming multiple discrete capacitors.

In some embodiments, it is also possible to form a capacitor insulating layer pattern on the N-type doped layer pattern in the capacitor region; form an electrode on the capacitor insulating layer pattern; form a circuit wiring that electrically connects a plurality of capacitors and a plurality of HEMT layer structures .

In some embodiments, at least one driver IC integration area may also be defined in the multilayer material.

In some embodiments, a display driver may also be integrated in at least one driver IC integration area.

In some embodiments, it may further include S9: forming a color conversion layer on the layer structure of at least one micro LED sub-pixel.

In some embodiments, multiple micro LED sub-pixel regions and corresponding multiple HEMT regions can be defined in a multilayer material such that the multiple micro LED sub-pixel layer structures form a micro LED pixel array capable of full-color display , Or make multiple micro LED sub-pixel layer structures and multiple HEMT layer structures form a hybrid array capable of full-color display.

In some embodiments, the multiple micro LED sub-pixel layer structures may have at least one of the following layouts:

RGB red-green-blue;

RGBW red-green-blue-white;

RYYB red-yellow-yellow-blue;

RGBYC red-green-blue-yellow-cyan.

In some embodiments, it may further include S10: attaching a prism grating on the surface of the LED display device.

The LED display device provided by the embodiment of the present disclosure is manufactured according to the above-mentioned manufacturing method.

The LED display device provided by the embodiments of the present disclosure includes a single-piece substrate, a plurality of micro LED sub-pixel layer structures on the substrate, and a corresponding plurality of HEMT layer structures; wherein the micro LED sub-pixel layer structure includes a channel Layer, the N-type doped layer on the channel layer, the multiple quantum well layer on the N-type doped layer, the P-type doped layer on the multiple quantum well layer, and are connected to the N-type doped layer and the P A pair of electrodes of a type doped layer; the HEMT layer structure includes a channel layer, a pair of N-type doped layer patterns on the channel layer, a pair of electrodes connected to a pair of N-type doped layer patterns, and a pair of The gate between the N-type doped layer patterns; each of the multiple micro LED sub-pixel layer structures is electrically connected to a corresponding HEMT layer structure, multiple micro LED sub-pixel layer structures, and multiple HEMT layers through electrical wires The structure is separated from the adjacent layer structure by a gap.

In some embodiments, the channel layer of the micro LED sub-pixel layer structure and the multiple HEMT layer structures may have the same layer structure, material, and thickness, and/or, the micro LED sub-pixel layer structure and multiple The channel layer of each HEMT layer structure may be made of one or more layers of the same material. Optionally, the micro LED sub-pixel layer structure and the N-type doped layer of the multiple HEMT layer structures may have at least one of the same layer structure, material, and thickness, and/or the micro LED sub-pixel layer structure and multiple layers. The N-type doped layer of each HEMT layer structure may be made of the same material layer. Alternatively, the substrate may be a sapphire substrate. Optionally, the channel layer may include a GaN layer and an AlGaN layer on the GaN layer. Optionally, the N-type doped layer may be an N-type doped GaN layer, and the P-type doped layer may be a P-type doped GaN layer.

In some embodiments, a plurality of discrete capacitors may also be formed on a single-piece substrate, and each capacitor is electrically connected to a corresponding HEMT layer structure by an electrical wire.

In some embodiments, the capacitor may include a channel layer, an N-type doped layer on the channel layer, a capacitor insulating layer on the N-type doped layer, and a capacitor insulating layer connected to the N-type doped layer and the capacitor insulating layer, respectively. Pair of electrodes.

In some embodiments, the capacitive insulating layer may include SiO2 material.

In some embodiments, it is also possible to integrate a driver IC on a single-piece substrate.

In some embodiments, the LED display device may include: a micro LED sub-pixel layer structure array and an HEMT layer structure array distributed on different regions of the substrate.

In some embodiments, it may further include: a capacitor array.

In some embodiments, the LED display device may include: a hybrid array; wherein, the hybrid array may include a plurality of micro LED sub-pixel layer structure arrays and a plurality of HEMT layer structures.

In some embodiments, it may further include: multiple capacitors.

In some embodiments, multiple micro LED sub-pixel layer structures can be configured to be capable of full-color display.

In some embodiments, the micro LED sub-pixel layer structure may have at least one of the following layouts:

RGB red-green-blue;

RGBW red-green-blue-white;

RYYB red-yellow-yellow-blue;

RGBYC red-green-blue-yellow-cyan.

In some embodiments, the LED display device may be a display device for naked-eye stereoscopic display, including a prism grating attached to the surface of the display device.

The naked-eye stereoscopic display system provided by the embodiments of the present disclosure includes the above-mentioned LED display device and a driving controller.

The naked-eye stereoscopic display system provided by the embodiments of the present disclosure includes a plurality of the above-mentioned LED display devices and a driving controller that are spliced with each other.

The LED display device, the preparation method thereof, and the naked-eye stereoscopic display system provided by the embodiments of the present disclosure can achieve the following technical effects:

Try to avoid the problem of low yield when preparing display devices containing micro LEDs, which helps to improve the yield of micro LED display devices.

The above general description and the following description are only exemplary and explanatory, and are not used to limit the application.

Description of the drawings

One or more embodiments are exemplified by the accompanying drawings. These exemplified descriptions and drawings do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are shown as similar elements. The drawings do not constitute a scale limitation, and among them:

FIG. 1 is a schematic illustration of a display including a micro driver chip and a micro LED array according to an embodiment of the present disclosure.

Fig. 2 is a driving circuit diagram of a micro LED sub-pixel according to an embodiment of the present disclosure.

3 to 15 are cross-sectional side views of an exemplary process of manufacturing an LED display device according to an embodiment of the present disclosure.

FIG. 16 is a schematic top view of an LED display device according to an embodiment of the present disclosure, showing a micro LED sub-pixel array, a HEMT array, and a capacitor array.

FIG. 17 is a schematic top view of an LED display device according to an embodiment of the present disclosure, showing a hybrid array formed by a plurality of micro LED sub-pixels, HEMTs, and capacitors.

FIG. 18 is a cross-sectional side view of an LED display device according to an embodiment of the present disclosure.

FIG. 19 is a cross-sectional side view of an LED display device according to an embodiment of the present disclosure.

FIG. 20 is a cross-sectional side view of an LED display device according to an embodiment of the present disclosure.

Detailed ways

In order to have a more detailed understanding of the features and technical content of the embodiments of the present disclosure, the implementation of the embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. The attached drawings are for reference and explanation purposes only and are not used to limit the embodiments of the present disclosure. In the following technical description, for the convenience of explanation, a number of details are used to provide a sufficient understanding of the disclosed embodiments. However, without these details, one or more embodiments can still be implemented. In other cases, in order to simplify the drawings, well-known structures and devices may be simply shown.

The embodiment of the present disclosure provides a method for manufacturing an LED display device, including:

S1. Multi-layer materials are provided. The multi-layer materials include a substrate, a channel layer on the substrate, an N-type doped layer on the channel layer, a multiple quantum well layer on the N-type doped layer, and P-type doped layer on the quantum well layer; multiple micro LED sub-pixel regions and corresponding multiple HEMT regions of high electron mobility transistors are defined in the multilayer material;

S2. Forming multiple quantum well layer patterns and P-type doped layer patterns in multiple micro LED sub-pixel regions by means of material removal;

S3, forming an N-type doped layer pattern in a plurality of micro LED sub-pixel regions and a pair of N-type doped layer patterns in a plurality of HEMT regions by means of material removal;

S4, forming a gate material between a pair of N-type doped layer patterns in a plurality of HEMT regions;

S5, forming electrodes in a plurality of micro LED sub-pixel regions and a plurality of HEMT regions;

S6. Remove the material of the channel layer to form a gap between the adjacent multiple micro LED sub-pixel regions and multiple HEMT regions, thereby forming a layer structure of multiple discrete micro LED sub-pixels and multiple HEMT layer structures ；

S7. Fill the gap with insulating material; and

S8, forming a circuit wiring that electrically connects the layer structure of the plurality of micro LED sub-pixels and the layer structure of the plurality of HEMTs.

In this way, the problem of low yield when preparing display devices containing micro LEDs can be avoided as much as possible, which helps to improve the yield of micro LED display devices.

In some embodiments, the substrate may be a sapphire substrate. Optionally, the channel layer may include a GaN layer and an AlGaN layer on the GaN layer. Optionally, the N-type doped layer may be an N-type doped GaN layer, and the P-type doped layer may be a P-type doped GaN layer. Optionally, the gate material may be SiO2. Optionally, the insulating material may be SiO2.

In some embodiments, multiple capacitor regions may be defined in the multilayer material, and capacitors are formed in the multiple capacitor regions.

In some embodiments, S3 may further include: forming N-type doped layer patterns in the plurality of capacitor regions by means of material removal. Optionally, S6 may further include: forming a gap between the capacitor area and the adjacent capacitor area, sub-pixel area or HEMT area by means of material removal, thereby forming multiple discrete capacitors.

In some embodiments, it is also possible to form a capacitor insulating layer pattern on the N-type doped layer pattern in the capacitor region; form an electrode on the capacitor insulating layer pattern; form a circuit wiring that electrically connects a plurality of capacitors and a plurality of HEMT layer structures .

In some embodiments, at least one driver IC integration area may also be defined in the multilayer material.

In some embodiments, a display driver may also be integrated in at least one driver IC integration area.

In some embodiments, it may further include S9: forming a color conversion layer on the layer structure of at least one micro LED sub-pixel.

In some embodiments, multiple micro LED sub-pixel regions and corresponding multiple HEMT regions can be defined in a multilayer material such that the multiple micro LED sub-pixel layer structures form a micro LED pixel array capable of full-color display , Or make multiple micro LED sub-pixel layer structures and multiple HEMT layer structures form a hybrid array capable of full-color display.

In some embodiments, the multiple micro LED sub-pixel layer structures may have at least one of the following layouts:

RGB red-green-blue;

RGBW red-green-blue-white;

RYYB red-yellow-yellow-blue;

RGBYC red-green-blue-yellow-cyan.

In some embodiments, it may further include S10: attaching a prism grating on the surface of the LED display device.

The embodiment of the present disclosure provides an LED display device manufactured according to the above-mentioned manufacturing method.

The embodiment of the present disclosure provides an LED display device, including a single-piece substrate, a plurality of micro LED sub-pixel layer structures on the substrate, and a corresponding plurality of HEMT layer structures; wherein, the micro LED sub-pixel layer structure includes The channel layer, the N-type doped layer on the channel layer, the multiple quantum well layer on the N-type doped layer, the P-type doped layer on the multiple quantum well layer, and are respectively connected to the N-type doped layer And a pair of electrodes of the P-type doped layer; the HEMT layer structure includes a channel layer, a pair of N-type doped layer patterns on the channel layer, a pair of electrodes connected to a pair of N-type doped layer patterns, and A gate between a pair of N-type doped layer patterns; each of the plurality of micro LED sub-pixel layer structures is electrically connected to a corresponding HEMT layer structure by an electrical wire, a plurality of micro LED sub-pixel layer structures and a plurality of The HEMT layer structure is separated from the adjacent layer structure by a gap.

In some embodiments, the channel layer of the micro LED sub-pixel layer structure and the multiple HEMT layer structures may have the same layer structure, material, and thickness, and/or, the micro LED sub-pixel layer structure and multiple The channel layer of each HEMT layer structure may be made of one or more layers of the same material. Optionally, the micro LED sub-pixel layer structure and the N-type doped layer of the multiple HEMT layer structures may have at least one of the same layer structure, material, and thickness, and/or the micro LED sub-pixel layer structure and multiple layers. The N-type doped layer of each HEMT layer structure may be made of the same material layer. Alternatively, the substrate may be a sapphire substrate. Optionally, the channel layer may include a GaN layer and an AlGaN layer on the GaN layer. Optionally, the N-type doped layer may be an N-type doped GaN layer, and the P-type doped layer may be a P-type doped GaN layer.

In some embodiments, a plurality of discrete capacitors may also be formed on a single-piece substrate, and each capacitor is electrically connected to a corresponding HEMT layer structure by an electrical wire.

In some embodiments, the capacitor may include a channel layer, an N-type doped layer on the channel layer, a capacitor insulating layer on the N-type doped layer, and a capacitor insulating layer connected to the N-type doped layer and the capacitor insulating layer, respectively. Pair of electrodes.

In some embodiments, the capacitive insulating layer may include SiO2 material.

In some embodiments, it is also possible to integrate a driver IC on a single-piece substrate.

In some embodiments, the LED display device may include: a micro LED sub-pixel layer structure array and an HEMT layer structure array distributed on different regions of the substrate.

In some embodiments, it may further include: a capacitor array.

In some embodiments, the LED display device may include: a hybrid array; wherein, the hybrid array may include a plurality of micro LED sub-pixel layer structure arrays and a plurality of HEMT layer structures.

In some embodiments, it may further include: multiple capacitors.

In some embodiments, multiple micro LED sub-pixel layer structures can be configured to be capable of full-color display.

In some embodiments, the micro LED sub-pixel layer structure may have at least one of the following layouts:

RGB red-green-blue;

RGBW red-green-blue-white;

RYYB red-yellow-yellow-blue;

RGBYC red-green-blue-yellow-cyan.

In some embodiments, the LED display device may be a display device for naked-eye stereoscopic display, including a prism grating attached to the surface of the display device.

The naked-eye stereoscopic display system provided by the embodiments of the present disclosure includes the above-mentioned LED display device and a driving controller.

The naked-eye stereoscopic display system provided by the embodiments of the present disclosure includes a plurality of the above-mentioned LED display devices and a driving controller that are spliced with each other.

In this article, "Monolithical Integration" or its derivatives may refer to at least LED (sub)pixels and corresponding electronic devices such as transistors and optionally other functional components of display devices, such as capacitors and/or driver ICs. It is directly formed on a common substrate, instead of separately forming pixels and electronic devices or their main structures and then transferring them to the substrate.

In this context, "GaN-based" may mean that at least part of the functional layer or material is made of GaN and/or AlGaN.

In this context, "drive IC" may refer to a drive integrated circuit for driving LED display devices, such as multiple LED (sub) pixels or pixel arrays, and sometimes may be referred to as a driver chip, which may include scan drivers and data drivers.

In this context, the "drive controller" can also be referred to as the "emission controller", which can be used to control or communicate with a drive IC, such as a scan driver and a data driver, so as to control the display of each (sub)pixel. In the embodiments of the present disclosure, the driving IC (such as a scan driver and a data driver) may or may not be a component of the driving controller.

In this context, the "display device" may be a display, a display unit, a display module, etc., including but not limited to a display that can be formed separately or spliced together for viewing. In some embodiments, a display device or (single or spliced) display can be connected to and communicate with one or more emission controllers to provide a display system that can receive signals for display.

Refer to Figure 1 and Figure 2 in combination. Fig. 1 shows a schematic illustration of an active-driving LED display 1 including a micro driver chip and a micro LED array according to an embodiment of the present disclosure. FIG. 2 shows a driving circuit diagram of a single micro LED sub-pixel 10 according to an embodiment of the present disclosure.

As shown in FIG. 1, each micro LED sub-pixel 10 (for example, a micro LED sub-pixel array) is respectively connected to the scan line S1-SN and the data line D1-DM by means of its active driving circuit. The scan lines S1-SN are in turn connected to the scan driver 20, and the data lines D1-DM are in turn connected to the data driver 30. The scan driver 20 and the data driver 30 may be communicatively connected to a display or a transmission controller (not shown) of a display system, and may also be referred to as a driving controller.

In some embodiments, the transmission controller may receive content to be displayed on the display as input, for example, an input signal (for example, a data frame) corresponding to image information. This can be achieved by selectively making the micro LED emit visible light. In some embodiments, the transmission controller may receive a data signal (for example, a signal used to turn off or turn on the micro LED). The scan driver and/or the data driver may be a component of the emission controller or be connected to the emission controller. In the illustrated embodiment, the scan driver may allow the emission controller to communicate with and control the rows of micro LED (sub) pixels or their electronic devices. The data driver may allow the emission controller to communicate with and control the column of micro LED (sub)pixels or their electronic devices.

Referring to FIG. 2, there is shown a schematic active driving circuit (corresponding electronic device) of a micro LED display (sub) pixel. In the illustrated embodiment, the micro LED (sub) pixel and the first transistor T1 may be (first) high electron mobility transistor (HEMT) in series with an optional capacitor in the illustrated embodiment, and both ends of the circuit Connect to VDD (operating voltage of electronic devices) and VSS (common ground voltage) respectively. Optionally, a second transistor T2 is provided. In the illustrated embodiment, it may be a (first) high electron mobility transistor (HEMT), the electrodes at both ends of which are respectively connected to the data line and the gate of the first transistor T1, scanning The wire is connected to the gate of the second transistor T2.

As an exemplary explanation and not limitation, the micro LED (sub) pixel is a current device. In the driving circuit of the sub pixel, a capacitor is optionally provided to temporarily store the voltage, and a first transistor T1 can be provided. An embodiment may be a high electron mobility transistor (HEMT) in order to convert the stored voltage into current; thus, the transistor, here the HEMT, converts the current flowing through it under the voltage applied to its gate, and Transistor T1, here, HEMT and LED device are in series structure, that is, the current of transistor T1 is the current when the micro LED (sub) pixel is working; here, the gate voltage of transistor T1 can selectively be the data from the data line Voltage. As an exemplary explanation and not limitation, a second transistor T2 can also be provided, which is a HEMT here, so as to selectively connect the data signal to the gate of the transistor T1, so that when the corresponding scan line is an on signal , The data signal can enter the gate of the transistor T1. When the corresponding scan line is an off signal, due to the existence of the transistor T2, the data signal on the data line has nothing to do with the gate voltage of the transistor T1, and the gate voltage is controlled by the capacitor Cs maintain.

In some embodiments, more or fewer transistors can be provided for each sub-pixel, or as an alternative supplement to high electron mobility transistors (HEMT), other monolithically integrated layered electronic devices, such as other Group III-V electronic devices, including but not limited to heterojunction bipolar transistors (HBT) and metal semiconductor FET (MESFET) or other GaN-based electronic devices.

According to an embodiment of the present disclosure, an exemplary process for manufacturing an LED display device is provided, including the following steps:

S1. Provide a multilayer material, the multilayer material includes a substrate, a channel layer on the substrate, an N-type doped layer on the channel layer, a multiple quantum well layer on the N-type doped layer, and A P-type doped layer located on the multiple quantum well layer, defining a plurality of micro LED sub-pixel regions and a corresponding plurality of high electron mobility transistor (HEMT) regions in the multilayer material;

S2. Form a multiple quantum well layer pattern (which can be currently set or predetermined) and a P-type doped layer pattern (which can be currently set or predetermined) in the multiple micro LED sub-pixel regions by means of material removal ；

S3, by means of material removal, an N-type doped layer pattern (which can be currently set or predetermined) is formed in a plurality of micro LED sub-pixel regions and a pattern of a plurality of high electron mobility transistor (HEMT) regions is formed Pattern of N-type doped layer (can be currently set or predetermined);

S4, forming a gate material between the pair of N-type doped layer patterns in the plurality of high electron mobility transistor (HEMT) regions;

S5, forming electrodes in the plurality of micro LED sub-pixel regions and the plurality of high electron mobility transistor (HEMT) regions;

S6. Remove the material of the channel layer to form gaps between adjacent micro LED sub-pixel regions and multiple high electron mobility transistor (HEMT) regions, thereby forming a layer structure of discrete micro LED sub-pixels And multiple high electron mobility transistor (HEMT) layer structure;

S7, filling the gap with an insulating material; and

S8, forming a circuit wiring that electrically connects the layer structure of the plurality of micro LED sub-pixels and the layer structure of the plurality of high electron mobility transistors (HEMT).

In some embodiments, in step S1, additional multiple functional areas may be defined. Optionally, a plurality of capacitor regions may be defined in the multilayer material, and capacitors are formed in the capacitor regions. Optionally, at least one driver IC integration area may be defined in the multilayer material.

In some embodiments, as shown in FIG. 3, a high electron mobility transistor (HEMT) region 1000, a plurality of micro LED sub-pixel regions, such as a red sub-pixel region 2000, and a green sub-pixel region may be defined in the multilayer material. The pixel area 3000, the blue sub-pixel area 4000, the driver IC integration area 5000, and the capacitor area 6000.

In some embodiments, in step S1, the provided multilayer material may include optional additional material layers. Optionally, the multilayer material described in step S1 is a GaN-based multilayer material, and each functional layer may have a single layer or multiple layers.

In the embodiment shown in FIG. 3, the multilayer material includes a sapphire substrate 300, a channel layer on the substrate, an N-type doped layer 330 on the channel layer, and an N-type doped layer 330. The upper multiple quantum well layer 340 and the P-type doped layer 350 on the multiple quantum well layer 340. Optionally, the channel layer includes a GaN (channel) layer 310 and an AlGaN (channel) layer 330 on the GaN (channel) layer 320. Optionally, the N-type doped layer 340 is an N-type doped GaN layer 340. Optionally, the P-type doped layer 350 is a P-type doped GaN layer 350.

In some embodiments, in step S1, providing a multilayer material may include: providing a substrate (such as a sapphire substrate 100) and arranging or depositing multiple material layers on the sapphire substrate. For example, a GaN channel layer 310, an AlGaN channel layer 320, an N-type doped GaN layer, a multiple quantum well layer 340 and a P-type doped GaN layer are continuously epitaxially grown on the sapphire substrate 300. In some embodiments, other arrangements or deposition processes can also be applied to form multiple material layers, such as: physical vapor deposition (PVD), chemical vapor deposition (CVD), sputtering or atomic layer deposition (ALD) or various epitaxy Growth techniques such as molecular beam epitaxy (MBE). Alternatively, the chemical vapor deposition may include metal organic chemical vapor deposition (MOCVD), and the epitaxial growth technique may include molecular beam epitaxial growth (MBE).

4, in some embodiments, step S2 may include removing the area outside the sub-pixel area 2000-4000 (ie, the LED light-emitting area) by material removal, that is, the HEMT area 1000, the integrated IC area 5000, and the capacitor area 6000. The quantum well layer 340 and the P-type doped layer 350, such as a P-type doped GaN layer, and the above-mentioned material layers in the sub-pixel regions 2000-4000 can be partially removed to form multiple layers in the sub-pixel regions 2000-4000. The quantum well layer pattern 440 (may be currently set or predetermined) and the P-type doping layer pattern 450 (may be currently set or predetermined). here,

In some embodiments, the material removal may include etching (for example, plasma (ICP) etching) or the like.

Referring to FIG. 5, in some embodiments, step S3 may include removing the integrated IC region 5000 by material and optionally partially removing the N-type doped layer of the sub-pixel region and the HEMT region to form an N-type in the sub-pixel region 2000-4000 The doped layer pattern 530 (may be currently set or predetermined) and a pair of N-type doped layer patterns 532 (may be currently set or predetermined) are formed in a plurality of high electron mobility transistor (HEMT) regions. In the illustrated embodiment, for example, the N-type doped layer of the capacitor region 6000 is partially removed to form the N-type doped layer pattern 534 (which may be currently set or predetermined) in the capacitor region. By way of explanation and not limitation, the N-type doped layer patterns 530, 532 may be used for device conduction, for example, for electrically connecting electrodes (as described below). By way of explanation and not limitation, the N-type doped layer pattern 534 may be used for ohmic contact.

Referring to FIG. 6, in some embodiments, step S4 may include forming a gate material 660 between the pair of N-type doped layer patterns 532 in the HEMT region, and the gate material may be made of SiO2. In the illustrated embodiment, a capacitor insulating layer pattern 662 is also optionally formed on the N-type doped layer pattern 534 in the capacitor region 6000. The capacitor insulating layer may be made of SiO2.

Referring to FIGS. 7-8, step S5 of some embodiments is shown, namely forming electrodes in the micro LED sub-pixel area and the HEMT area.

As shown in FIG. 7, in some embodiments, step S5 may include forming electrodes 770 on the P-type doping pattern 450 in the sub-pixel regions 2000-4000, such as Ni and/or Au electrodes. Optionally, the aforementioned electrode may be a transparent electrode. In some embodiments, it may further include forming electrodes 772 on the capacitor insulating layer pattern 662 in the capacitor region 6000, for example, Ni and/or Au electrodes. Optionally, the aforementioned electrode may be a transparent electrode. The electrodes can be formed in a variety of ways, for example, by means of an electron beam evaporation process and forming electrode patterns by photolithography.

As shown in FIG. 8, in some embodiments, step S5 may include forming electrodes 870, such as Ti and/or Al electrodes, on the N-type doping pattern 530 in the sub-pixel regions 2000-4000. Optionally, the aforementioned electrode may be a transparent electrode. Step S5 may further include forming a pair of electrodes 872, 874, such as Ti and/or Al electrodes, on the N-type doping pattern 532 in the HEMT region 1000. Optionally, the aforementioned electrode may be a transparent electrode. This can be used as the source and drain of the HEMT, for example. In some embodiments, it may further include forming an electrode 876, such as a Ti and/or Al electrode, on the N-type doped layer pattern 534 in the capacitor region 6000. Optionally, the aforementioned electrode may be a transparent electrode. The electrode can be formed in a variety of ways, such as by means of an electron beam evaporation process, and an ohmic contact between the metal and the semiconductor can be formed by annealing.

The different electrode materials or preparations described in the illustrated embodiments can be used interchangeably to obtain new embodiments.

Referring to FIG. 9, in some embodiments, step S6 may include removing the material of the channel layer to form a gap 900 between the HEMT region 1000, adjacent micro LED sub-pixel regions 2000-4000, and the capacitor region 6000, thereby forming Discrete HEMT layer structure 910, micro LED sub-pixel layer structure 920-940, and optional capacitor (layer structure) 960. In the illustrated embodiment, the step S6 includes removing all channel layer materials in the integrated IC region, for example: all materials except the substrate.

The material removal means described herein can be applied to different embodiments and steps to obtain new embodiments when achievable.

Referring to FIG. 10, in some embodiments, step S7 may include filling the gap 900 with an insulating material (first filling/applying material 1080). Optionally, the insulating material is SiO2. The filling means may adopt multiple placement or deposition means described herein or other feasible. Optionally, the first filling material may form a flat surface. Optionally, the first filling material may be polished. In the embodiments of the present disclosure, various polishing methods may be used, such as chemical mechanical polishing.

Referring to FIG. 10, in some embodiments, it may further include forming a contact hole 1082 in the first filling material 1080, which may lead to the electrode (source, drain) and/or gate. The contact hole 1082 is formed by, for example, etching, fluorine-based reactive ion etching (RIE). It may also include filling the contact hole with a conductor. Optionally, the aforementioned conductor may be metal, such as tungsten. The tungsten is arranged by a deposition process, for example, it may include sputtering 200A TiN first, and then depositing tungsten by chemical vapor deposition.

Referring to FIG. 11, in some embodiments, step S8 may further include forming circuit wiring, which, for example, connects the HEMT layer structure 910, the sub-pixel layer structures 920-940, and the capacitor 960. In the illustrated embodiment, forming the circuit wiring may include forming a plurality of terminals 1110, 1112, 1114, 1120, 1122, 1130, 1132, 1140, 1142, 1150, 1160, 1162 in each area, at least a part of these terminals Can make electrical contact with conductors. The circuit wiring may be a metal wiring, such as a multilayer metal wiring, such as Ti/Al/Ti. The circuit wiring (for example, metal wiring) can be formed by deposition (such as PVD) and photolithography processes.

Referring to FIGS. 12-13, in some embodiments, it may further include step S9: forming a color conversion layer on the layer structure of at least one micro LED sub-pixel. As shown in FIG. 12, in the illustrated embodiment, it may include forming a color conversion layer 1220, such as red, on the sub-pixel layer structure 920. Optionally, the color conversion layer 1220 includes a red quantum dot material, or a yellow fluorescent material and a red filter material, etc., for converting blue light into red light. As shown in FIG. 12, in the illustrated embodiment, it may include forming a color conversion layer 1330, such as green, on the sub-pixel layer structure 930. Optionally, the color conversion layer 1330 includes a green quantum dot material, or a yellow fluorescent material, a green filter material, etc., for converting blue light into green light.

Referring to FIG. 14, in some embodiments, a second insulating material 1490 (a second applied material) may be covered on the display device, which may be made of SiO2. Optionally, the second insulating material can be polished one or more times, such as chemical mechanical polishing. Although not shown, contact holes may be optionally formed in the second insulating material and filled with metal as described above, such as TiN and tungsten filling. Optionally, a circuit wiring is formed on the second insulating material, for example, a metal line connected by photolithography as described above, and then a metal line for multi-layer interconnection is formed.

Referring to FIG. 15, in some embodiments, a contact hole 1550 filled with a conductor, such as metal, may also be formed, and a crimping terminal 1552 in the integrated IC region 5000 may be formed. Alternatively, the crimp terminal 1552 may be connected with an integrated driving IC such as a flexible circuit board (FPC).

Thus, the LED display device according to the embodiment of the present disclosure can be formed.

In an embodiment not shown, a prismatic grating can also be attached to the surface of the LED display device for naked eye stereoscopic display.

Referring to FIG. 16, there is shown a schematic top view of an LED display device according to an embodiment of the present disclosure. In the illustrated embodiment, the LED display device can form an HEMT array, a micro LED (sub)pixel array (such as an RGB subpixel array) 1620, and an optional capacitor array 1660 on a single substrate, respectively. In other words, an HEMT section including a plurality of HEMT regions 1000 is defined on a single substrate, in which an array 1610 of HEMT 1612 is arranged. A single substrate defines a micro LED display pixel section including a plurality of LED sub-pixel regions 2000-4000, in which a micro LED (sub) pixel array 1620 (such as RGB sub-pixels 1622 (R), 1624 (G ), 1626(B)). A single substrate defines a capacitor section including a plurality of capacitor regions 6000, in which an array 1660 of capacitors 1662 is arranged. In the illustrated embodiment, the driver IC 1650 can also be integrated on a single substrate. Here, a single-chip substrate defines a driver IC area, or a driver IC section.

FIG. 17 shows a schematic top view of an LED display device according to an embodiment of the present disclosure. The difference with Figure 16 is that there are multiple micro LED sub-pixels (such as RGB sub-pixels 1722(R), 1724(G), 1726(B)), HEMT1710 and optional capacitor 1760 on a single substrate. A monolithic integrated hybrid array 1710 is formed. Similarly, in the illustrated embodiment, the driver IC 1750 can also be integrated on a single substrate. Here, a single-chip substrate defines a driver IC area, or a driver IC section. In other words, a monolithic substrate defines a hybrid section (or functional device section) and a driver IC section including multiple HEMT regions, micro LED sub-pixel regions, and optional capacitor regions.

FIG. 18 is a cross-sectional side view of an LED display device according to an embodiment of the present disclosure. In the illustrated embodiment, the main difference from the LED display device made in FIGS. 3 to 15 may be that the capacitance (zone) is not monolithically integrated, but is, for example, a parasitic capacitance.

FIG. 19 is a cross-sectional side view of an LED display device according to an embodiment of the present disclosure. In the illustrated embodiment, the main difference from the LED display device made in FIGS. 3 to 15 may be that the driver IC area is not monolithically integrated.

FIG. 20 is a cross-sectional side view of an LED display device according to an embodiment of the present disclosure. In the illustrated embodiment, the driver IC area and capacitor (area) may not be monolithically integrated, and the main difference from the RGB (red-green-blue) sub-pixel arrangement of the LED display device in the previous figure is that In the embodiment of FIG. 20, an arrangement of four sub-pixels 2000, 3000, 4000, and 7000 per pixel can be set, for example, RGBW (red-green-blue-white) or RYYB (red-yellow-yellow-blue). Although an arrangement of three sub-pixels and 4 sub-pixels per pixel is illustrated, other full-color sub-pixel arrangements can be applied, such as RGBYC (red-green-blue-yellow-cyan).

In the embodiments of the present disclosure, different embodiments of the arrangement of sub-pixels can be combined with the embodiments of the LED display pixel array to obtain new embodiments.

In the embodiment of the present disclosure, a display system may be provided, including the LED display device and the driving controller described in the embodiment of the present disclosure. In an embodiment of the present disclosure, a naked-eye stereoscopic display system may be provided, which may include a plurality of LED display devices attached with prism gratings and a driving controller according to the embodiments of the present disclosure that are spliced with each other.

In some embodiments, the aforementioned LED display may be an inorganic LED display. Optionally, whether it is an inorganic LED display or not, the above-mentioned LED display may be a monolithic integrated LED display.

The LED display device, the preparation method thereof, and the naked-eye stereoscopic display system provided by the embodiments of the present disclosure can achieve the following technical effects:

Try to avoid the problem of low yield when preparing display devices containing micro LEDs, which helps to improve the yield of micro LED display devices.

The display device, display, and display system explained in the above embodiments can be applied to or implemented by various possible entities. Specifically, a typical application or implementation entity can be, for example, a TV with display function, such as a TV or smart TV with naked-eye stereoscopic display function, personal computer, laptop computer, vehicle-mounted human-computer interaction device, cellular phone, camera phone, smart Phones, personal digital assistants, media players, navigation devices, e-mail devices, game consoles, tablets, wearable devices, IoT systems, smart homes, industrial computers, or a combination of these devices.

The above description and drawings sufficiently illustrate the embodiments of the present disclosure to enable those skilled in the art to practice them. Other embodiments may include structural, logical, electrical, process, and other changes. The examples only represent possible changes. Unless explicitly required, individual components and functions are optional, and the order of operations can be changed. Parts and features of some embodiments may be included in or substituted for parts and features of other embodiments. The scope of the embodiments of the present disclosure includes the entire scope of the claims and all available equivalents of the claims. When used in this application, although the terms "first", "second", etc. may be used in this application to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without changing the meaning of the description, the first element can be called the second element, and similarly, the second element can be called the first element, as long as all occurrences of the "first element" are renamed consistently and all occurrences "Second component" can be renamed consistently. The first element and the second element are both elements, but they may not be the same element. Moreover, the terms used in this application are only used to describe the embodiments and are not used to limit the claims. As used in the description of the embodiments and claims, unless the context clearly indicates otherwise, the singular forms of "a" (a), "one" (an) and "the" (the) are intended to also include plural forms . Similarly, the term "and/or" as used in this application refers to any and all possible combinations of one or more of the associated lists. In addition, when used in this application, the term "comprise" (comprise) and its variants "comprises" and/or including (comprising) and the like refer to the stated features, wholes, steps, operations, elements, and/or The existence of components does not exclude the existence or addition of one or more other features, wholes, steps, operations, elements, components and/or groups of these. If there are no more restrictions, the element defined by the sentence "including a..." does not exclude the existence of other same elements in the process, method, or equipment that includes the element. In this article, each embodiment focuses on the differences from other embodiments, and the same or similar parts between the various embodiments can be referred to each other. For the methods, products, etc. disclosed in the embodiments, if they correspond to the method parts disclosed in the embodiments, then the related parts can be referred to the description of the method parts.

Those skilled in the art may realize that the units and algorithm steps of the examples described in combination with the embodiments disclosed in this document can be implemented by electronic hardware or a combination of computer software and electronic hardware. Whether these functions are performed by hardware or software may depend on the specific application and design constraint conditions of the technical solution. Those skilled in the art may use different methods for each specific application to realize the described functions, but such realization should not be considered as going beyond the scope of the embodiments of the present disclosure. Those skilled in the art can clearly understand that, for the convenience and conciseness of the description, the working process of the system, device and unit described above can refer to the corresponding process in the foregoing method embodiment, which will not be repeated here.

In the embodiments disclosed herein, the disclosed methods and products (including but not limited to devices, equipment, etc.) may be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of units may only be a logical function division, and there may be other divisions in actual implementation, for example, multiple units or components may be combined or may be Integrate into another system, or some features can be ignored or not implemented. In addition, the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection between devices or units through some interfaces, and may be in electrical, mechanical or other forms. The units described as separate components may or may not be physically separate, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units can be selected to implement this embodiment according to actual needs. In addition, the functional units in the embodiments of the present disclosure may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit.

In the drawings, the width, length, thickness, etc. of structures such as elements or layers may be exaggerated in consideration of clarity and description. When a structure such as an element or layer is referred to as being "disposed on" (or "installed on", "layed on", "applied on", "coated on" and the like, another element or layer is "above" or " In the case of "on", the element or layer or other structure can be directly "disposed" on or "on" another element or layer mentioned above, or there may be an intermediate element or layer between the other element or layer mentioned above, etc. The structure, even a part of it is embedded in another element or layer mentioned above.

Claims (27)

1. A method for preparing an LED display device includes:

   S1. Provide a multilayer material, the multilayer material includes a substrate, a channel layer on the substrate, an N-type doped layer on the channel layer, and an N-type doped layer on the N-type doped layer. A multiple quantum well layer and a P-type doped layer located on the multiple quantum well layer; a plurality of micro LED sub-pixel regions and corresponding multiple HEMT regions of high electron mobility transistors are defined in the multilayer material;

   S2, forming a multi-quantum well layer pattern and a P-type doped layer pattern in the plurality of micro LED sub-pixel regions by means of material removal;

   S3, forming an N-type doped layer pattern in the plurality of micro LED sub-pixel regions and a pair of N-type doped layer patterns in the plurality of HEMT regions by means of material removal;

   S4, forming a gate material between the pair of N-type doped layer patterns in the plurality of HEMT regions;

   S5, forming electrodes in the plurality of micro LED sub-pixel regions and the plurality of HEMT regions;

   S6. Remove the material of the channel layer to form gaps between the adjacent multiple micro LED sub-pixel regions and multiple HEMT regions, thereby forming a layer structure of multiple discrete micro LED sub-pixels and multiple HEMT Layer structure

   S7, filling the gap with an insulating material; and

   S8. Form a circuit wiring that electrically connects the layer structure of the plurality of micro LED sub-pixels and the layer structure of the plurality of HEMTs.
2. The preparation method according to claim 1, wherein:

   The substrate is a sapphire substrate; or

   The channel layer includes a GaN layer and an AlGaN layer on the GaN layer; or

   The N-type doped layer is an N-type doped GaN layer, and the P-type doped layer is a P-type doped GaN layer; or

   The gate material is SiO2; or

   The insulating material is SiO2.
3. The manufacturing method according to claim 1, further comprising defining a plurality of capacitor regions in the multilayer material, and forming capacitors in the plurality of capacitor regions.
4. The preparation method according to claim 3, wherein:

   S3 further includes: forming the N-type doped layer pattern in the plurality of capacitor regions by means of material removal; or

   S6 further includes: forming a gap between the capacitor area and the adjacent capacitor area, sub-pixel area or HEMT area by means of material removal, thereby forming a plurality of discrete capacitors.
5. The preparation method according to claim 4, further comprising:

   Forming a capacitor insulating layer pattern on the N-type doped layer pattern in the capacitor region;

   Forming electrodes on the capacitor insulating layer pattern;

   A circuit wiring that electrically connects the plurality of capacitors and the plurality of HEMT layer structures is formed.
6. The manufacturing method according to any one of claims 1 to 5, further comprising: defining at least one driver IC integration area in the multilayer material.
7. The manufacturing method according to claim 6, further comprising: integrating a display driver in the at least one driver IC integration area.
8. The manufacturing method according to any one of claims 1 to 7, further comprising S9: forming a color conversion layer on the layer structure of at least one micro LED sub-pixel.
9. The manufacturing method according to any one of claims 1 to 8, wherein a plurality of micro LED sub-pixel regions and a corresponding plurality of HEMT regions are defined in the multilayer material such that: The sub-pixel layer structure forms a micro LED pixel array capable of full-color display, or the multiple micro LED sub-pixel layer structures and the multiple HEMT layer structures form a hybrid array capable of full-color display.
10. The manufacturing method according to claim 9, wherein the plurality of micro LED sub-pixel layer structures have at least one of the following layouts:

    RGB red-green-blue;

    RGBW red-green-blue-white;

    RYYB red-yellow-yellow-blue;

    RGBYC red-green-blue-yellow-cyan.
11. The manufacturing method according to any one of claims 1 to 10, further comprising S10: attaching a prism grating on the surface of the LED display device.
12. An LED display device manufactured according to the manufacturing method of any one of claims 1 to 11.
13. An LED display device includes a single-piece substrate, a plurality of micro LED sub-pixel layer structures on the substrate, and a corresponding plurality of HEMT layer structures; wherein the micro LED sub-pixel layer structure includes a channel Layer, an N-type doped layer located on the channel layer, a multiple quantum well layer located on the N-type doped layer, a P-type doped layer located on the multiple quantum well layer, and are respectively connected to the N A pair of electrodes of a P-type doped layer and a P-type doped layer; the HEMT layer structure includes a channel layer, a pair of N-type doped layer patterns on the channel layer, and is connected to the pair of N-type doped layers. A pair of electrodes of a layer pattern and a gate located between the pair of N-type doped layer patterns; each of the plurality of micro LED sub-pixel layer structures is electrically connected to a corresponding HEMT layer structure by an electrical wire The multiple micro LED sub-pixel layer structures and multiple HEMT layer structures are separated from adjacent layer structures by gaps.
14. The LED display device according to claim 13, wherein:

    The channel layer of the micro LED sub-pixel layer structure and the plurality of HEMT layer structures have at least one of the same layer structure, material, and thickness, and/or, the micro LED sub-pixel layer structure and the plurality of HEMT layers The channel layer of the structure is made of one or more layers of the same material; or

    The micro LED sub-pixel layer structure and the N-type doped layer of the multiple HEMT layer structures have at least one of the same layer structure, material, and thickness, and/or, the micro LED sub-pixel layer structure and multiple The N-type doped layer of the HEMT layer structure is made of the same material layer; or

    The substrate is a sapphire substrate; or

    The channel layer includes a GaN layer and an AlGaN layer on the GaN layer; or

    The N-type doped layer is an N-type doped GaN layer, and the P-type doped layer is a P-type doped GaN layer.
15. The LED display device according to claim 13, further comprising: a plurality of discrete capacitors formed on the single-piece substrate, each capacitor is electrically connected to a corresponding HEMT layer structure by an electrical wire.
16. The LED display device according to claim 15, wherein the capacitor includes a channel layer, an N-type doped layer on the channel layer, a capacitor insulating layer on the N-type doped layer, and A pair of electrodes respectively connected to the N-type doped layer and the capacitor insulating layer.
17. The LED display device according to claim 16, wherein the capacitive insulating layer comprises SiO2 material.
18. The LED display device according to claim 15, further comprising: a driving IC integrated on the single-piece substrate.
19. The LED display device according to any one of claims 13 to 18, comprising: a micro LED sub-pixel layer structure array and an HEMT layer structure array distributed on different regions of the substrate.
20. The LED display device of claim 19, further comprising: a capacitor array.
21. The LED display device according to any one of claims 13 to 19, comprising: a hybrid array; wherein the hybrid array includes a plurality of micro LED sub-pixel layer structure arrays and a plurality of HEMT layer structures.
22. The LED display device of claim 21, further comprising: a plurality of capacitors.
23. The LED display device according to any one of claims 13 to 22, wherein the plurality of micro LED sub-pixel layer structures are configured to enable full-color display.
24. The LED display device of claim 23, wherein the micro LED sub-pixel layer structure has at least one of the following layouts:

    RGB red-green-blue;

    RGBW red-green-blue-white;

    RYYB red-yellow-yellow-blue;

    RGBYC red-green-blue-yellow-cyan.
25. The LED display device according to any one of claims 13 to 24, wherein the LED display device is a display device for naked-eye stereoscopic display, and includes a prism grating attached to the surface of the display device.
26. A naked eye stereoscopic display system, comprising at least one LED display device according to any one of claims 13 to 25 and a driving controller.
27. A naked-eye stereoscopic display system comprising a plurality of LED display devices and a driving controller according to any one of claims 13 to 25 that are spliced with each other.

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